#define一覧 - Access

No.	名称	値	ファイル名	説明
1	BOOTINFO_VERSION	1	freebsd_loader.c
2	NODEV	(-1)	freebsd_loader.c	non-existent device
3	PAGE_SHIFT	12	freebsd_loader.c	LOG2(PAGE_SIZE)
4	PAGE_SIZE	(1<<PAGE_SHIFT)	freebsd_loader.c	bytes/page
5	PAGE_MASK	(PAGE_SIZE-1)	freebsd_loader.c
6	N_BIOS_GEOM	8	freebsd_loader.c
7	max_align	( ( unsigned int ) _max_align )	relocate.c
8	MAX_ADDR	(0xfff00000UL)	relocate.c
9	TIMER2_TICKS_PER_SEC	1193180U	timer2.c
10	PPC_PORTB	0x61	timer2.c
11	PPCB_T2OUT	0x20	timer2.c	Bit 5
12	PPCB_SPKR	0x02	timer2.c	Bit 1
13	PPCB_T2GATE	0x01	timer2.c	Bit 0
14	TIMER2_PORT	0x42	timer2.c
15	TIMER_MODE_PORT	0x43	timer2.c
16	TIMER0_SEL	0x00	timer2.c
17	TIMER1_SEL	0x40	timer2.c
18	TIMER2_SEL	0x80	timer2.c
19	READBACK_SEL	0xC0	timer2.c
20	LATCH_COUNT	0x00	timer2.c
21	LOBYTE_ACCESS	0x10	timer2.c
22	HIBYTE_ACCESS	0x20	timer2.c
23	WORD_ACCESS	0x30	timer2.c
24	MODE0	0x00	timer2.c
25	MODE1	0x02	timer2.c
26	MODE2	0x04	timer2.c
27	MODE3	0x06	timer2.c
28	MODE4	0x08	timer2.c
29	MODE5	0x0A	timer2.c
30	BINARY_COUNT	0x00	timer2.c
31	BCD_COUNT	0x01	timer2.c
32	VIDBUFFER	0xB8000	video_subr.c
33	LOAD_DEBUG	0	wince_loader.c
34	BOOT_ARG_PTR_LOCATION	0x001FFFFC	wince_loader.c
35	PSIZE	(1500)	wince_loader.c	Max Packet Size
36	DSIZE	(PSIZE+12)	wince_loader.c
37	undi_loader	__use_data16 ( undi_loader )	undiload.c
38	undi_loader_entry	__use_data16 ( undi_loader_entry )	undiload.c
39	UNDI_HACK_EB54	0x0001	undinet.c
40	undinet_params	__use_data16 ( undinet_params )	undinet.c
41	undinet_entry_point	__use_data16 ( undinet_entry_point )	undinet.c
42	undiisr_irq	__use_data16 ( undiisr_irq )	undinet.c
43	undiisr_next_handler	__use_data16 ( undiisr_next_handler )	undinet.c
44	undiisr_trigger_count	__use_data16 ( undiisr_trigger_count )	undinet.c
45	undinet_tbd	__use_data16 ( undinet_tbd )	undinet.c
46	ATTR_BOLD	0x08	bios_console.c
47	ATTR_FCOL_MASK	0x07	bios_console.c
48	ATTR_FCOL_BLACK	0x00	bios_console.c
49	ATTR_FCOL_BLUE	0x01	bios_console.c
50	ATTR_FCOL_GREEN	0x02	bios_console.c
51	ATTR_FCOL_CYAN	0x03	bios_console.c
52	ATTR_FCOL_RED	0x04	bios_console.c
53	ATTR_FCOL_MAGENTA	0x05	bios_console.c
54	ATTR_FCOL_YELLOW	0x06	bios_console.c
55	ATTR_FCOL_WHITE	0x07	bios_console.c
56	ATTR_BCOL_MASK	0x70	bios_console.c
57	ATTR_BCOL_BLACK	0x00	bios_console.c
58	ATTR_BCOL_BLUE	0x10	bios_console.c
59	ATTR_BCOL_GREEN	0x20	bios_console.c
60	ATTR_BCOL_CYAN	0x30	bios_console.c
61	ATTR_BCOL_RED	0x40	bios_console.c
62	ATTR_BCOL_MAGENTA	0x50	bios_console.c
63	ATTR_BCOL_YELLOW	0x60	bios_console.c
64	ATTR_BCOL_WHITE	0x70	bios_console.c
65	ATTR_DEFAULT	ATTR_FCOL_WHITE	bios_console.c
66	BIOS_KEY_MIN	0x42	bios_console.c
67	real_int15_vector	__use_text16 ( real_int15_vector )	fakee820.c
68	E820_TYPE_RAM	1	fakee820.c	*< Normal memory
69	E820_TYPE_RSVD	2	fakee820.c	*< Reserved and unavailable
70	E820_TYPE_ACPI	3	fakee820.c	*< ACPI reclaim memory
71	E820_TYPE_NVS	4	fakee820.c	*< ACPI NVS memory
72	e820map	__use_text16 ( e820map )	fakee820.c
73	K_RDWR	0x60	gateA20.c	keyboard data & cmds (read/write)
74	K_STATUS	0x64	gateA20.c	keyboard status
75	K_CMD	0x64	gateA20.c	keybd ctlr command (write-only)
76	K_OBUF_FUL	0x01	gateA20.c	output buffer full
77	K_IBUF_FUL	0x02	gateA20.c	input buffer full
78	KC_CMD_WIN	0xd0	gateA20.c	read output port
79	KC_CMD_WOUT	0xd1	gateA20.c	write output port
80	KC_CMD_NULL	0xff	gateA20.c	null command ("pulse nothing")
81	KB_SET_A20	0xdf	gateA20.c	enable A20,
82	KB_UNSET_A20	0xdd	gateA20.c	enable A20,
83	SCP_A	0x92	gateA20.c	System Control Port A
84	A20_MAX_RETRIES	32	gateA20.c
85	A20_INT15_RETRIES	32	gateA20.c
86	A20_KBC_RETRIES	(2^21)	gateA20.c
87	A20_SCPA_RETRIES	(2^21)	gateA20.c
88	FAKE_E820	0	hidemem.c
89	ALIGN_HIDDEN	4096	hidemem.c	4kB page alignment should be enough
90	hidemem_base	__use_data16 ( hidemem_base )	hidemem.c
91	hidemem_umalloc	__use_data16 ( hidemem_umalloc )	hidemem.c
92	hidemem_textdata	__use_data16 ( hidemem_textdata )	hidemem.c
93	int15_vector	__use_text16 ( int15_vector )	hidemem.c
94	_text16_memsz	( ( unsigned int ) _text16_memsz )	hidemem.c
95	_data16_memsz	( ( unsigned int ) _data16_memsz )	hidemem.c
96	SMAP	( 0x534d4150 )	memmap.c
97	E820_TYPE_RAM	1	memmap.c	*< Normal memory
98	E820_TYPE_RESERVED	2	memmap.c	*< Reserved and unavailable
99	E820_TYPE_ACPI	3	memmap.c	*< ACPI reclaim memory
100	E820_TYPE_NVS	4	memmap.c	*< ACPI NVS memory
101	E820_ATTR_ENABLED	0x00000001UL	memmap.c
102	E820_ATTR_NONVOLATILE	0x00000002UL	memmap.c
103	E820_ATTR_UNKNOWN	0xfffffffcUL	memmap.c
104	E820_MIN_SIZE	20	memmap.c
105	e820buf	__use_data16 ( e820buf )	memmap.c
106	PNP_BIOS_SIGNATURE	( ( '$' << 0 ) + ( 'P' << 8 ) + ( 'n' << 16 ) + ( 'P' << 24 ) )	pnpbios.c
107	COMBOOT_PSP_CMDLINE_OFFSET	0x81	comboot.c
108	COMBOOT_MAX_CMDLINE_LEN	125	comboot.c
109	ISO9660_BLKSIZE	2048	eltorito.c
110	ELTORITO_VOL_DESC_OFFSET	( 17 * ISO9660_BLKSIZE )	eltorito.c
111	ELTORITO_BOOTABLE	0x88	eltorito.c
112	MAX_MODULES	8	multiboot.c
113	MB_MAX_CMDLINE	512	multiboot.c
114	MB_SUPPORTED_FLAGS	( MB_FLAG_PGALIGN \| MB_FLAG_MEMMAP \| \ MB_FLAG_VIDMODE \| MB_FLAG_RAW )	multiboot.c
115	MB_COMPULSORY_FLAGS	0x0000ffff	multiboot.c
116	MB_OPTIONAL_FLAGS	0xffff0000	multiboot.c
117	MB_UNSUPPORTED_FLAGS	( MB_COMPULSORY_FLAGS & ~MB_SUPPORTED_FLAGS )	multiboot.c
118	mb_cmdlines	__use_data16 ( mb_cmdlines )	multiboot.c
119	mbinfo	__use_data16 ( mbinfo )	multiboot.c
120	mb_bootloader_name	__use_data16 ( mb_bootloader_name )	multiboot.c
121	mbmemmap	__use_data16 ( mbmemmap )	multiboot.c
122	mbmodules	__use_data16 ( mbmodules )	multiboot.c
123	NBI_MAGIC	0x1B031336UL	nbi.c
124	NBI_HEADER_LENGTH	512	nbi.c
125	NBI_LOADADDR_ABS	0x00	nbi.c
126	NBI_LOADADDR_AFTER	0x01	nbi.c
127	NBI_LOADADDR_END	0x02	nbi.c
128	NBI_LOADADDR_BEFORE	0x03	nbi.c
129	BASEMEM_PACKET_LEN	1514	basemem_packet.h
130	basemem_packet	__use_data16 ( basemem_packet )	basemem_packet.h
131	BDA_SEG	0x0040	bios.h
132	BDA_FBMS	0x0013	bios.h
133	BDA_NUM_DRIVES	0x0075	bios.h
134	hooked_bios_interrupts	__use_text16 ( hooked_bios_interrupts )	biosint.h
135	BIOS_DISK_MAX_NAME_LEN	6	bios_disks.h
136	bochsbp	xchgw %bx, %bx	bochs.h
137	BOCHSBP	bochsbp	bochs.h
138	BZI_HDR_OFFSET	0x1f1	bzimage.h
139	BZI_SIGNATURE	0x53726448	bzimage.h
140	BZI_LOADER_TYPE_ETHERBOOT	0x40	bzimage.h
141	BZI_LOADER_TYPE_GPXE	( BZI_LOADER_TYPE_ETHERBOOT \| 0x06 )	bzimage.h
142	BZI_LOAD_HIGH	0x01	bzimage.h
143	BZI_LOAD_HIGH_ADDR	0x100000	bzimage.h
144	BZI_LOAD_LOW_ADDR	0x10000	bzimage.h
145	BZI_CAN_USE_HEAP	0x80	bzimage.h
146	BZI_VID_MODE_NORMAL	0xffff	bzimage.h
147	BZI_VID_MODE_EXT	0xfffe	bzimage.h
148	BZI_VID_MODE_ASK	0xfffd	bzimage.h
149	BZI_INITRD_MAX	0x37ffffff	bzimage.h
150	BZI_CMDLINE_OFFSET	0x20	bzimage.h
151	BZI_CMDLINE_MAGIC	0xa33f	bzimage.h
152	BZI_ASSUMED_RM_SIZE	0x8000	bzimage.h
153	BZI_STACK_SIZE	0x1000	bzimage.h
154	BZI_CMDLINE_SIZE	0x100	bzimage.h
155	GDT_TYPE_DATA	(0x0)	callbacks_arch.h
156	GDT_TYPE_STACK	(0x2)	callbacks_arch.h
157	GDT_TYPE_WRITEABLE	(0x1)	callbacks_arch.h
158	GDT_TYPE_CODE	(0x6)	callbacks_arch.h
159	GDT_TYPE_EXEC_ONLY_CODE	(0x4)	callbacks_arch.h
160	GDT_TYPE_CONFORMING	(0x1)	callbacks_arch.h
161	GDT_SFLAG_SYSTEM	(0)	callbacks_arch.h
162	GDT_SFLAG_NORMAL	(1)	callbacks_arch.h
163	GDT_AVL_NORMAL	(0)	callbacks_arch.h
164	GDT_SIZE_16BIT	(0x0)	callbacks_arch.h
165	GDT_SIZE_32BIT	(0x2)	callbacks_arch.h
166	GDT_SIZE_64BIT	(0x1)	callbacks_arch.h
167	GDT_SIZE_UNKNOWN	(0x3)	callbacks_arch.h
168	GDT_GRANULARITY_SMALL	(0)	callbacks_arch.h
169	GDT_GRANULARITY_LARGE	(1)	callbacks_arch.h
170	GDT_SEGMENT_PMCS_PHYS	GDT_SEGMENT_PMCS(0)	callbacks_arch.h
171	GDT_SEGMENT_PMDS_PHYS	GDT_SEGMENT_PMDS(0)	callbacks_arch.h
172	GDT_SEGMENT_LMCS_PHYS	GDT_SEGMENT_LMCS(0)	callbacks_arch.h
173	GDT_SEGMENT_LMDS_PHYS	GDT_SEGMENT_LMDS(0)	callbacks_arch.h
174	in_call_data_t	i386_in_call_data_t	callbacks_arch.h
175	RM_IN_CALL	(0)	callbacks_arch.h
176	RM_IN_CALL_FAR	(2)	callbacks_arch.h
177	COMBOOT_PSP_SEG	0x07C0	comboot.h
178	COM32_START_PHYS	0x101000	comboot.h
179	COM32_BOUNCE_SEG	0x07C0	comboot.h
180	COMBOOT_FILE_BLOCKSZ	512	comboot.h
181	COMBOOT_FEATURE_LOCAL_BOOT	(1 << 0)	comboot.h
182	COMBOOT_FEATURE_IDLE_LOOP	(1 << 1)	comboot.h
183	COMBOOT_MAX_SHUFFLE_DESCRIPTORS	682	comboot.h
184	COMBOOT_EXIT	1	comboot.h
185	COMBOOT_EXIT_RUN_KERNEL	2	comboot.h
186	COMBOOT_EXIT_COMMAND	3	comboot.h
187	COMBOOT_VIDEO_GRAPHICS	0x01	comboot.h
188	COMBOOT_VIDEO_NONSTANDARD	0x02	comboot.h
189	COMBOOT_VIDEO_VESA	0x04	comboot.h
190	COMBOOT_VIDEO_NOTEXT	0x08	comboot.h
191	INT13_RESET	0x00	int13.h
192	INT13_GET_LAST_STATUS	0x01	int13.h
193	INT13_READ_SECTORS	0x02	int13.h
194	INT13_WRITE_SECTORS	0x03	int13.h
195	INT13_GET_PARAMETERS	0x08	int13.h
196	INT13_GET_DISK_TYPE	0x15	int13.h
197	INT13_EXTENSION_CHECK	0x41	int13.h
198	INT13_EXTENDED_READ	0x42	int13.h
199	INT13_EXTENDED_WRITE	0x43	int13.h
200	INT13_GET_EXTENDED_PARAMETERS	0x48	int13.h
201	INT13_CDROM_STATUS_TERMINATE	0x4b	int13.h
202	INT13_STATUS_SUCCESS	0x00	int13.h
203	INT13_STATUS_INVALID	0x01	int13.h
204	INT13_STATUS_READ_ERROR	0x04	int13.h
205	INT13_STATUS_WRITE_ERROR	0xcc	int13.h
206	INT13_BLKSIZE	512	int13.h
207	INT13_DISK_TYPE_NONE	0x00	int13.h
208	INT13_DISK_TYPE_FDD	0x01	int13.h
209	INT13_DISK_TYPE_FDD_CL	0x02	int13.h
210	INT13_DISK_TYPE_HDD	0x03	int13.h
211	INT13_FL_DMA_TRANSPARENT	0x01	int13.h
212	INT13_FL_CHS_VALID	0x02	int13.h
213	INT13_FL_REMOVABLE	0x04	int13.h
214	INT13_FL_VERIFIABLE	0x08	int13.h
215	INT13_FL_CHANGE_LINE	0x10	int13.h
216	INT13_FL_LOCKABLE	0x20	int13.h
217	INT13_FL_CHS_MAX	0x40	int13.h
218	INT13_EXTENSION_LINEAR	0x01	int13.h
219	INT13_EXTENSION_REMOVABLE	0x02	int13.h
220	INT13_EXTENSION_EDD	0x04	int13.h
221	INT13_EXTENSION_VER_1_X	0x01	int13.h
222	INT13_EXTENSION_VER_2_0	0x20	int13.h
223	INT13_EXTENSION_VER_2_1	0x21	int13.h
224	INT13_EXTENSION_VER_3_0	0x30	int13.h
225	code32	code16gcc	kir.h
226	rm_cs	( _rm_cs() )	libkir.h
227	rm_ds	( _rm_ds() )	libkir.h
228	copy_to_real	copy_to_real_libkir	libkir.h
229	copy_from_real	copy_from_real_libkir	libkir.h
230	put_real	put_real_kir	libkir.h
231	get_real	get_real_kir	libkir.h
232	VIRTUAL_CS	0x08	librm.h
233	VIRTUAL_DS	0x10	librm.h
234	PHYSICAL_CS	0x18	librm.h
235	PHYSICAL_DS	0x20	librm.h
236	REAL_CS	0x28	librm.h
237	REAL_DS	0x30	librm.h
238	LONG_CS	0x38	librm.h
239	LONG_DS	0x40	librm.h
240	UACCESS_PREFIX_librm	__librm_	librm.h
241	rm_cs	__use_data16 ( rm_cs )	librm.h
242	rm_ds	__use_text16 ( rm_ds )	librm.h
243	LIMITS_H	1	limits.h
244	CHAR_BIT	8	limits.h
245	SCHAR_MIN	(-128)	limits.h
246	SCHAR_MAX	127	limits.h
247	UCHAR_MAX	255	limits.h
248	CHAR_MIN	SCHAR_MIN	limits.h
249	CHAR_MAX	SCHAR_MAX	limits.h
250	SHRT_MIN	(-32768)	limits.h
251	SHRT_MAX	32767	limits.h
252	USHRT_MAX	65535	limits.h
253	INT_MIN	(-INT_MAX - 1)	limits.h
254	INT_MAX	2147483647	limits.h
255	UINT_MAX	4294967295U	limits.h
256	INT_MAX	2147483647	limits.h
257	INT_MIN	(-INT_MAX - 1)	limits.h
258	UINT_MAX	4294967295U	limits.h
259	LONG_MAX	2147483647	limits.h
260	LONG_MIN	(-LONG_MAX - 1L)	limits.h
261	ULONG_MAX	4294967295UL	limits.h
262	LLONG_MAX	9223372036854775807LL	limits.h
263	LLONG_MIN	(-LONG_MAX - 1LL)	limits.h
264	ULLONG_MAX	18446744073709551615ULL	limits.h
265	MULTIBOOT_HEADER_MAGIC	0x1BADB002	multiboot.h
266	MB_FLAG_PGALIGN	0x00000001	multiboot.h
267	MB_FLAG_MEMMAP	0x00000002	multiboot.h
268	MB_FLAG_VIDMODE	0x00000004	multiboot.h
269	MB_FLAG_RAW	0x00010000	multiboot.h
270	MULTIBOOT_BOOTLOADER_MAGIC	0x2BADB002	multiboot.h
271	MBI_FLAG_MEM	0x00000001	multiboot.h
272	MBI_FLAG_BOOTDEV	0x00000002	multiboot.h
273	MBI_FLAG_CMDLINE	0x00000004	multiboot.h
274	MBI_FLAG_MODS	0x00000008	multiboot.h
275	MBI_FLAG_AOUT	0x00000010	multiboot.h
276	MBI_FLAG_ELF	0x00000020	multiboot.h
277	MBI_FLAG_MMAP	0x00000040	multiboot.h
278	MBI_FLAG_DRIVES	0x00000080	multiboot.h
279	MBI_FLAG_CFGTBL	0x00000100	multiboot.h
280	MBI_FLAG_LOADER	0x00000200	multiboot.h
281	MBI_FLAG_APM	0x00000400	multiboot.h
282	MBI_FLAG_VBE	0x00000800	multiboot.h
283	MBMEM_RAM	1	multiboot.h
284	IRQ_PIC_CUTOFF	8	pic8259.h
285	PIC1_ICW1	0x20	pic8259.h
286	PIC1_OCW2	0x20	pic8259.h
287	PIC1_OCW3	0x20	pic8259.h
288	PIC1_ICR	0x20	pic8259.h
289	PIC1_IRR	0x20	pic8259.h
290	PIC1_ISR	0x20	pic8259.h
291	PIC1_ICW2	0x21	pic8259.h
292	PIC1_ICW3	0x21	pic8259.h
293	PIC1_ICW4	0x21	pic8259.h
294	PIC1_IMR	0x21	pic8259.h
295	PIC2_ICW1	0xa0	pic8259.h
296	PIC2_OCW2	0xa0	pic8259.h
297	PIC2_OCW3	0xa0	pic8259.h
298	PIC2_ICR	0xa0	pic8259.h
299	PIC2_IRR	0xa0	pic8259.h
300	PIC2_ISR	0xa0	pic8259.h
301	PIC2_ICW2	0xa1	pic8259.h
302	PIC2_ICW3	0xa1	pic8259.h
303	PIC2_ICW4	0xa1	pic8259.h
304	PIC2_IMR	0xa1	pic8259.h
305	OCW3_ID	0x08	pic8259.h
306	OCW3_READ_IRR	0x03	pic8259.h
307	OCW3_READ_ISR	0x02	pic8259.h
308	ICR_EOI_NON_SPECIFIC	0x20	pic8259.h
309	ICR_EOI_NOP	0x40	pic8259.h
310	ICR_EOI_SPECIFIC	0x60	pic8259.h
311	ICR_EOI_SET_PRIORITY	0xc0	pic8259.h
312	CHAINED_IRQ	2	pic8259.h
313	IRQ_MAX	15	pic8259.h
314	IRQ_NONE	-1U	pic8259.h
315	BIOS_SEG	0xf000	pnpbios.h
316	ROM_SIGNATURE	0xaa55	pxe.h
317	UNDI_ROM_ID_SIGNATURE	( ( 'U' << 0 ) + ( 'N' << 8 ) + ( 'D' << 16 ) + ( 'I' << 24 ) )	pxe.h
318	PCIR_SIGNATURE	( ( 'P' << 0 ) + ( 'C' << 8 ) + ( 'I' << 16 ) + ( 'R' << 24 ) )	pxe.h
319	PXENV_UNLOAD_STACK	0x0070	pxe_api.h
320	PXENV_GET_CACHED_INFO	0x0071	pxe_api.h
321	PXENV_PACKET_TYPE_DHCP_DISCOVER	1	pxe_api.h
322	PXENV_PACKET_TYPE_DHCP_ACK	2	pxe_api.h
323	PXENV_PACKET_TYPE_CACHED_REPLY	3	pxe_api.h
324	BOOTP_REQ	1	pxe_api.h	*< A BOOTP request packet
325	BOOTP_REP	2	pxe_api.h	*< A BOOTP reply packet
326	BOOTP_BCAST	0x8000	pxe_api.h
327	VM_RFC1048	0x63825363L	pxe_api.h	*< DHCP magic cookie
328	BOOTP_DHCPVEND	1024	pxe_api.h
329	PXENV_RESTART_TFTP	0x0073	pxe_api.h
330	PXENV_START_UNDI	0x0000	pxe_api.h
331	PXENV_STOP_UNDI	0x0015	pxe_api.h
332	PXENV_START_BASE	0x0075	pxe_api.h
333	PXENV_STOP_BASE	0x0076	pxe_api.h
334	PXENV_TFTP_OPEN	0x0020	pxe_api.h
335	PXENV_TFTP_CLOSE	0x0021	pxe_api.h
336	PXENV_TFTP_READ	0x0022	pxe_api.h
337	PXENV_TFTP_READ_FILE	0x0023	pxe_api.h
338	PXENV_TFTP_GET_FSIZE	0x0025	pxe_api.h
339	PXENV_UDP_OPEN	0x0030	pxe_api.h
340	PXENV_UDP_CLOSE	0x0031	pxe_api.h
341	PXENV_UDP_WRITE	0x0033	pxe_api.h
342	PXENV_UDP_READ	0x0032	pxe_api.h
343	PXENV_UNDI_STARTUP	0x0001	pxe_api.h
344	PXENV_BUS_ISA	0	pxe_api.h	*< ISA bus type
345	PXENV_BUS_EISA	1	pxe_api.h	*< EISA bus type
346	PXENV_BUS_MCA	2	pxe_api.h	*< MCA bus type
347	PXENV_BUS_PCI	3	pxe_api.h	*< PCI bus type
348	PXENV_BUS_VESA	4	pxe_api.h	*< VESA bus type
349	PXENV_BUS_PCMCIA	5	pxe_api.h	*< PCMCIA bus type
350	PXENV_UNDI_CLEANUP	0x0002	pxe_api.h
351	PXENV_UNDI_INITIALIZE	0x0003	pxe_api.h
352	PXENV_UNDI_RESET_ADAPTER	0x0004	pxe_api.h
353	MAXNUM_MCADDR	8	pxe_api.h
354	PXENV_UNDI_SHUTDOWN	0x0005	pxe_api.h
355	PXENV_UNDI_OPEN	0x0006	pxe_api.h
356	FLTR_DIRECTED	0x0001	pxe_api.h
357	FLTR_BRDCST	0x0002	pxe_api.h
358	FLTR_PRMSCS	0x0004	pxe_api.h
359	FLTR_SRC_RTG	0x0008	pxe_api.h
360	PXENV_UNDI_CLOSE	0x0007	pxe_api.h
361	PXENV_UNDI_TRANSMIT	0x0008	pxe_api.h
362	P_UNKNOWN	0	pxe_api.h	*< Media header already filled in
363	P_IP	1	pxe_api.h	*< IP protocol
364	P_ARP	2	pxe_api.h	*< ARP protocol
365	P_RARP	3	pxe_api.h	*< RARP protocol
366	P_OTHER	4	pxe_api.h	*< Other protocol
367	XMT_DESTADDR	0x0000	pxe_api.h	*< Unicast packet
368	XMT_BROADCAST	0x0001	pxe_api.h	*< Broadcast packet
369	MAX_DATA_BLKS	8	pxe_api.h
370	PXENV_UNDI_SET_MCAST_ADDRESS	0x0009	pxe_api.h
371	PXENV_UNDI_SET_STATION_ADDRESS	0x000a	pxe_api.h
372	PXENV_UNDI_SET_PACKET_FILTER	0x000b	pxe_api.h
373	PXENV_UNDI_GET_INFORMATION	0x000c	pxe_api.h
374	ETHER_TYPE	1	pxe_api.h	*< Ethernet (10Mb)
375	EXP_ETHER_TYPE	2	pxe_api.h	*< Experimental Ethernet (3Mb)
376	AX25_TYPE	3	pxe_api.h	*< Amateur Radio AX.25
377	TOKEN_RING_TYPE	4	pxe_api.h	*< Proteon ProNET Token Ring
378	CHAOS_TYPE	5	pxe_api.h	*< Chaos
379	IEEE_TYPE	6	pxe_api.h	*< IEEE 802 Networks
380	ARCNET_TYPE	7	pxe_api.h	*< ARCNET
381	PXENV_UNDI_GET_STATISTICS	0x000d	pxe_api.h
382	PXENV_UNDI_CLEAR_STATISTICS	0x000e	pxe_api.h
383	PXENV_UNDI_INITIATE_DIAGS	0x000f	pxe_api.h
384	PXENV_UNDI_FORCE_INTERRUPT	0x0010	pxe_api.h
385	PXENV_UNDI_GET_MCAST_ADDRESS	0x0011	pxe_api.h
386	PXENV_UNDI_GET_NIC_TYPE	0x0012	pxe_api.h
387	PCI_NIC	2	pxe_api.h	*< PCI network card
388	PnP_NIC	3	pxe_api.h	*< ISAPnP network card
389	CardBus_NIC	4	pxe_api.h	*< CardBus network card
390	PXENV_UNDI_GET_IFACE_INFO	0x0013	pxe_api.h
391	PXENV_UNDI_GET_STATE	0x0015	pxe_api.h
392	PXE_UNDI_GET_STATE_STARTED	1	pxe_api.h
393	PXE_UNDI_GET_STATE_INITIALIZED	2	pxe_api.h
394	PXE_UNDI_GET_STATE_OPENED	3	pxe_api.h
395	PXENV_UNDI_ISR	0x0014	pxe_api.h
396	PXENV_UNDI_ISR_IN_START	1	pxe_api.h
397	PXENV_UNDI_ISR_IN_PROCESS	2	pxe_api.h
398	PXENV_UNDI_ISR_IN_GET_NEXT	3	pxe_api.h
399	PXENV_UNDI_ISR_OUT_OURS	0	pxe_api.h
400	PXENV_UNDI_ISR_OUT_NOT_OURS	1	pxe_api.h
401	PXENV_UNDI_ISR_OUT_DONE	0	pxe_api.h
402	PXENV_UNDI_ISR_OUT_TRANSMIT	2	pxe_api.h
403	PXENV_UNDI_ISR_OUT_RECEIVE	3	pxe_api.h
404	PXENV_UNDI_ISR_OUT_BUSY	4	pxe_api.h
405	P_DIRECTED	0	pxe_api.h
406	P_BROADCAST	1	pxe_api.h
407	P_MULTICAST	2	pxe_api.h
408	PXENV_FILE_OPEN	0x00e0	pxe_api.h
409	PXENV_FILE_CLOSE	0x00e1	pxe_api.h
410	PXENV_FILE_SELECT	0x00e2	pxe_api.h
411	RDY_READ	0x0001	pxe_api.h
412	PXENV_FILE_READ	0x00e3	pxe_api.h
413	PXENV_GET_FILE_SIZE	0x00e4	pxe_api.h
414	PXENV_FILE_EXEC	0x00e5	pxe_api.h
415	PXENV_FILE_API_CHECK	0x00e6	pxe_api.h
416	PXE_LOAD_SEGMENT	0	pxe_call.h
417	PXE_LOAD_OFFSET	0x7c00	pxe_call.h
418	PXE_LOAD_PHYS	( ( PXE_LOAD_SEGMENT << 4 ) + PXE_LOAD_OFFSET )	pxe_call.h
419	ppxe	__use_text16 ( ppxe )	pxe_call.h
420	pxenv	__use_text16 ( pxenv )	pxe_call.h
421	PXENV_EXIT_SUCCESS	0x0000	pxe_types.h	*< No error occurred
422	PXENV_EXIT_FAILURE	0x0001	pxe_types.h	*< An error occurred
423	MAC_ADDR_LEN	16	pxe_types.h
424	CF	( 1 << 0 )	registers.h
425	PF	( 1 << 2 )	registers.h
426	AF	( 1 << 4 )	registers.h
427	ZF	( 1 << 6 )	registers.h
428	SF	( 1 << 7 )	registers.h
429	OF	( 1 << 11 )	registers.h
430	UNDI_NO_PCI_BUSDEVFN	0xffff	undi.h
431	UNDI_NO_ISAPNP_CSN	0xffff	undi.h
432	UNDI_NO_ISAPNP_READ_PORT	0xffff	undi.h
433	UNDI_FL_STARTED	0x0001	undi.h
434	UNDI_FL_INITIALIZED	0x0002	undi.h
435	UNDI_FL_KEEP_ALL	0x0004	undi.h
436	preloaded_undi	__use_data16 ( preloaded_undi )	undipreload.h
437	VGA_H_INCL	1	vga.h
438	u8	unsigned char	vga.h
439	u16	unsigned short	vga.h
440	u32	unsigned int	vga.h
441	__u32	u32	vga.h
442	VERROR	-1	vga.h
443	CHAR_HEIGHT	16	vga.h
444	LINES	25	vga.h
445	COLS	80	vga.h
446	SYNC_HOR_HIGH_ACT	1	vga.h	horizontal sync high active
447	SYNC_VERT_HIGH_ACT	2	vga.h	vertical sync high active
448	SYNC_EXT	4	vga.h	external sync
449	SYNC_COMP_HIGH_ACT	8	vga.h	composite sync high active
450	SYNC_BROADCAST	16	vga.h	broadcast video timings
451	SYNC_ON_GREEN	32	vga.h	sync on green
452	VMODE_NONINTERLACED	0	vga.h	non interlaced
453	VMODE_INTERLACED	1	vga.h	interlaced
454	VMODE_DOUBLE	2	vga.h	double scan
455	VMODE_MASK	255	vga.h
456	VMODE_YWRAP	256	vga.h	ywrap instead of panning
457	VMODE_SMOOTH_XPAN	512	vga.h	smooth xpan possible (internally used)
458	VMODE_CONUPDATE	512	vga.h	don't update x/yoffset
459	CRT_DC	0x3D5	vga.h	CRT Controller Data Register - color emulation
460	CRT_DM	0x3B5	vga.h	CRT Controller Data Register - mono emulation
461	ATT_R	0x3C1	vga.h	Attribute Controller Data Read Register
462	GRA_D	0x3CF	vga.h	Graphics Controller Data Register
463	SEQ_D	0x3C5	vga.h	Sequencer Data Register
464	MIS_R	0x3CC	vga.h	Misc Output Read Register
465	MIS_W	0x3C2	vga.h	Misc Output Write Register
466	IS1_RC	0x3DA	vga.h	Input Status Register 1 - color emulation
467	IS1_RM	0x3BA	vga.h	Input Status Register 1 - mono emulation
468	PEL_D	0x3C9	vga.h	PEL Data Register
469	PEL_MSK	0x3C6	vga.h	PEL mask register
470	GRA_E0	0x3CC	vga.h	Graphics enable processor 0
471	GRA_E1	0x3CA	vga.h	Graphics enable processor 1
472	CRT_IC	0x3D4	vga.h	CRT Controller Index - color emulation
473	CRT_IM	0x3B4	vga.h	CRT Controller Index - mono emulation
474	ATT_IW	0x3C0	vga.h	Attribute Controller Index & Data Write Register
475	GRA_I	0x3CE	vga.h	Graphics Controller Index
476	SEQ_I	0x3C4	vga.h	Sequencer Index
477	PEL_IW	0x3C8	vga.h	PEL Write Index
478	PEL_IR	0x3C7	vga.h	PEL Read Index
479	CRTC_C	25	vga.h	25 CRT Controller Registers sequentially set
480	ATT_C	21	vga.h	21 Attribute Controller Registers
481	GRA_C	9	vga.h	9 Graphics Controller Registers
482	SEQ_C	5	vga.h	5 Sequencer Registers
483	MIS_C	1	vga.h	1 Misc Output Register
484	CRTC_H_TOTAL	0	vga.h
485	CRTC_H_DISP	1	vga.h
486	CRTC_H_BLANK_START	2	vga.h
487	CRTC_H_BLANK_END	3	vga.h
488	CRTC_H_SYNC_START	4	vga.h
489	CRTC_H_SYNC_END	5	vga.h
490	CRTC_V_TOTAL	6	vga.h
491	CRTC_OVERFLOW	7	vga.h
492	CRTC_PRESET_ROW	8	vga.h
493	CRTC_MAX_SCAN	9	vga.h
494	CRTC_CURSOR_START	0x0A	vga.h
495	CRTC_CURSOR_END	0x0B	vga.h
496	CRTC_START_HI	0x0C	vga.h
497	CRTC_START_LO	0x0D	vga.h
498	CRTC_CURSOR_HI	0x0E	vga.h
499	CRTC_CURSOR_LO	0x0F	vga.h
500	CRTC_V_SYNC_START	0x10	vga.h
501	CRTC_V_SYNC_END	0x11	vga.h
502	CRTC_V_DISP_END	0x12	vga.h
503	CRTC_OFFSET	0x13	vga.h
504	CRTC_UNDERLINE	0x14	vga.h
505	CRTC_V_BLANK_START	0x15	vga.h
506	CRTC_V_BLANK_END	0x16	vga.h
507	CRTC_MODE	0x17	vga.h
508	CRTC_LINE_COMPARE	0x18	vga.h
509	ATC_MODE	0x10	vga.h
510	ATC_OVERSCAN	0x11	vga.h
511	ATC_PLANE_ENABLE	0x12	vga.h
512	ATC_PEL	0x13	vga.h
513	ATC_COLOR_PAGE	0x14	vga.h
514	SEQ_CLOCK_MODE	0x01	vga.h
515	SEQ_PLANE_WRITE	0x02	vga.h
516	SEQ_CHARACTER_MAP	0x03	vga.h
517	SEQ_MEMORY_MODE	0x04	vga.h
518	GDC_SR_VALUE	0x00	vga.h
519	GDC_SR_ENABLE	0x01	vga.h
520	GDC_COMPARE_VALUE	0x02	vga.h
521	GDC_DATA_ROTATE	0x03	vga.h
522	GDC_PLANE_READ	0x04	vga.h
523	GDC_MODE	0x05	vga.h
524	GDC_MISC	0x06	vga.h
525	GDC_COMPARE_MASK	0x07	vga.h
526	GDC_BIT_MASK	0x08	vga.h
527	VGA_ATTR_CLR_RED	0x4	vga.h
528	VGA_ATTR_CLR_GRN	0x2	vga.h
529	VGA_ATTR_CLR_BLU	0x1	vga.h
530	VGA_ATTR_CLR_YEL	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN)	vga.h
531	VGA_ATTR_CLR_CYN	(VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
532	VGA_ATTR_CLR_MAG	(VGA_ATTR_CLR_BLU \| VGA_ATTR_CLR_RED)	vga.h
533	VGA_ATTR_CLR_BLK	0	vga.h
534	VGA_ATTR_CLR_WHT	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
535	VGA_ATTR_BNK	0x80	vga.h
536	VGA_ATTR_ITN	0x08	vga.h
537	__asmcall	__attribute__ (( cdecl, regparm(0) ))	compiler.h
538	__libgcc	__attribute__ (( cdecl ))	compiler.h
539	X86_FEATURE_FPU	0	cpu.h	Onboard FPU
540	X86_FEATURE_VME	1	cpu.h	Virtual Mode Extensions
541	X86_FEATURE_DE	2	cpu.h	Debugging Extensions
542	X86_FEATURE_PSE	3	cpu.h	Page Size Extensions
543	X86_FEATURE_TSC	4	cpu.h	Time Stamp Counter
544	X86_FEATURE_MSR	5	cpu.h	Model-Specific Registers, RDMSR, WRMSR
545	X86_FEATURE_PAE	6	cpu.h	Physical Address Extensions
546	X86_FEATURE_MCE	7	cpu.h	Machine Check Architecture
547	X86_FEATURE_CX8	8	cpu.h	CMPXCHG8 instruction
548	X86_FEATURE_APIC	9	cpu.h	Onboard APIC
549	X86_FEATURE_SEP	11	cpu.h	SYSENTER/SYSEXIT
550	X86_FEATURE_MTRR	12	cpu.h	Memory Type Range Registers
551	X86_FEATURE_PGE	13	cpu.h	Page Global Enable
552	X86_FEATURE_MCA	14	cpu.h	Machine Check Architecture
553	X86_FEATURE_CMOV	15	cpu.h	CMOV instruction (FCMOVCC and FCOMI too if FPU present)
554	X86_FEATURE_PAT	16	cpu.h	Page Attribute Table
555	X86_FEATURE_PSE36	17	cpu.h	36-bit PSEs
556	X86_FEATURE_PN	18	cpu.h	Processor serial number
557	X86_FEATURE_CLFLSH	19	cpu.h	Supports the CLFLUSH instruction
558	X86_FEATURE_DTES	21	cpu.h	Debug Trace Store
559	X86_FEATURE_ACPI	22	cpu.h	ACPI via MSR
560	X86_FEATURE_MMX	23	cpu.h	Multimedia Extensions
561	X86_FEATURE_FXSR	24	cpu.h	FXSAVE and FXRSTOR instructions (fast save and restore
562	X86_FEATURE_XMM	25	cpu.h	Streaming SIMD Extensions
563	X86_FEATURE_XMM2	26	cpu.h	Streaming SIMD Extensions-2
564	X86_FEATURE_SELFSNOOP	27	cpu.h	CPU self snoop
565	X86_FEATURE_HT	28	cpu.h	Hyper-Threading
566	X86_FEATURE_ACC	29	cpu.h	Automatic clock control
567	X86_FEATURE_IA64	30	cpu.h	IA-64 processor
568	X86_FEATURE_SYSCALL	11	cpu.h	SYSCALL/SYSRET
569	X86_FEATURE_MMXEXT	22	cpu.h	AMD MMX extensions
570	X86_FEATURE_LM	29	cpu.h	Long Mode (x86-64)
571	X86_FEATURE_3DNOWEXT	30	cpu.h	AMD 3DNow! extensions
572	X86_FEATURE_3DNOW	31	cpu.h	3DNow!
573	X86_EFLAGS_CF	0x00000001	cpu.h	Carry Flag
574	X86_EFLAGS_PF	0x00000004	cpu.h	Parity Flag
575	X86_EFLAGS_AF	0x00000010	cpu.h	Auxillary carry Flag
576	X86_EFLAGS_ZF	0x00000040	cpu.h	Zero Flag
577	X86_EFLAGS_SF	0x00000080	cpu.h	Sign Flag
578	X86_EFLAGS_TF	0x00000100	cpu.h	Trap Flag
579	X86_EFLAGS_IF	0x00000200	cpu.h	Interrupt Flag
580	X86_EFLAGS_DF	0x00000400	cpu.h	Direction Flag
581	X86_EFLAGS_OF	0x00000800	cpu.h	Overflow Flag
582	X86_EFLAGS_IOPL	0x00003000	cpu.h	IOPL mask
583	X86_EFLAGS_NT	0x00004000	cpu.h	Nested Task
584	X86_EFLAGS_RF	0x00010000	cpu.h	Resume Flag
585	X86_EFLAGS_VM	0x00020000	cpu.h	Virtual Mode
586	X86_EFLAGS_AC	0x00040000	cpu.h	Alignment Check
587	X86_EFLAGS_VIF	0x00080000	cpu.h	Virtual Interrupt Flag
588	X86_EFLAGS_VIP	0x00100000	cpu.h	Virtual Interrupt Pending
589	X86_EFLAGS_ID	0x00200000	cpu.h	CPUID detection flag
590	ELTORITO_PLATFORM	ELTORITO_PLATFORM_X86	eltorito.h
591	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
592	ERRFILE_memtop_umalloc	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00000000 )	errfile.h
593	ERRFILE_memmap	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00010000 )	errfile.h
594	ERRFILE_pnpbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00020000 )	errfile.h
595	ERRFILE_bios_smbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00030000 )	errfile.h
596	ERRFILE_biosint	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00040000 )	errfile.h
597	ERRFILE_int13	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00050000 )	errfile.h
598	ERRFILE_bootsector	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00000000 )	errfile.h
599	ERRFILE_bzimage	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00010000 )	errfile.h
600	ERRFILE_eltorito	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00020000 )	errfile.h
601	ERRFILE_multiboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00030000 )	errfile.h
602	ERRFILE_nbi	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00040000 )	errfile.h
603	ERRFILE_pxe_image	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00050000 )	errfile.h
604	ERRFILE_elfboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00060000 )	errfile.h
605	ERRFILE_comboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00070000 )	errfile.h
606	ERRFILE_com32	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00080000 )	errfile.h
607	ERRFILE_comboot_resolv	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00090000 )	errfile.h
608	ERRFILE_comboot_call	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x000a0000 )	errfile.h
609	ERRFILE_undi	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00000000 )	errfile.h
610	ERRFILE_undiload	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00010000 )	errfile.h
611	ERRFILE_undinet	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00020000 )	errfile.h
612	ERRFILE_undionly	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00030000 )	errfile.h
613	ERRFILE_undirom	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00040000 )	errfile.h
614	ERRFILE_timer_rdtsc	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00000000 )	errfile.h
615	ERRFILE_timer_bios	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00010000 )	errfile.h
616	ABFT_SIG	"aBFT"	abft.h
617	NAP_PREFIX_pcbios	__pcbios_	bios_nap.h
618	SMBIOS_PREFIX_pcbios	__pcbios_	bios_smbios.h
619	TIMER_PREFIX_pcbios	__pcbios_	bios_timer.h
620	IBFT_SIG	"iBFT"	ibft.h
621	IBFT_STRUCTURE_ID_CONTROL	0x01	ibft.h
622	IBFT_FL_CONTROL_SINGLE_LOGIN_ON	0x01	ibft.h
623	IBFT_STRUCTURE_ID_INITIATOR	0x02	ibft.h
624	IBFT_FL_INITIATOR_BLOCK_VALID	0x01	ibft.h
625	IBFT_FL_INITIATOR_FIRMWARE_BOOT	0x02	ibft.h
626	IBFT_STRUCTURE_ID_NIC	0x03	ibft.h
627	IBFT_FL_NIC_BLOCK_VALID	0x01	ibft.h
628	IBFT_FL_NIC_FIRMWARE_BOOT_SELEC	0x02	ibft.h
629	IBFT_FL_NIC_GLOBAL	0x04	ibft.h
630	IBFT_STRUCTURE_ID_TARGET	0x04	ibft.h
631	IBFT_FL_TARGET_BLOCK_VALID	0x01	ibft.h
632	IBFT_FL_TARGET_FIRMWARE_BOOT_SE	0x02	ibft.h
633	IBFT_FL_TARGET_USE_CHAP	0x04	ibft.h
634	IBFT_FL_TARGET_USE_RCHAP	0x08	ibft.h
635	IBFT_CHAP_NONE	0	ibft.h	*< No CHAP authentication
636	IBFT_CHAP_ONE_WAY	1	ibft.h	*< One-way CHAP
637	IBFT_CHAP_MUTUAL	2	ibft.h	*< Mutual CHAP
638	IBFT_STRINGS_SIZE	384	ibft.h
639	UMALLOC_PREFIX_memtop	__memtop_	memtop_umalloc.h
640	TIMER_PREFIX_rdtsc	__rdtsc_	rdtsc_timer.h
641	TSC_SHIFT	8	rdtsc_timer.h
642	IOAPI_PREFIX_x86	__x86_	x86_io.h
643	abftab	__use_data16 ( abftab )	abft.c
644	ibftab	__use_data16 ( ibftab )	ibft.c
645	int13_vector	__use_text16 ( int13_vector )	int13.c
646	EM_ALIGN	( 4 * 1024 )	memtop_umalloc.c
647	UNOWHERE	( ~UNULL )	memtop_umalloc.c
648	pxe_int_1a_vector	__use_text16 ( pxe_int_1a_vector )	pxe_call.c
649	cached_info	__use_data16 ( cached_info )	pxe_preboot.c
650	PXE_TFTP_URI_LEN	256	pxe_tftp.c
651	com32_regs	__use_data16 ( com32_regs )	com32_call.c
652	com32_int_vector	__use_data16 ( com32_int_vector )	com32_call.c
653	com32_farcall_proc	__use_data16 ( com32_farcall_proc )	com32_call.c
654	syslinux_version	__use_data16 ( syslinux_version )	comboot_call.c
655	syslinux_copyright	__use_data16 ( syslinux_copyright )	comboot_call.c
656	syslinux_configuration_file	__use_data16 ( syslinux_configuration_file )	comboot_call.c
657	comboot_feature_flags	__use_data16 ( comboot_feature_flags )	comboot_call.c
658	comboot_initial_regs	__use_text16 ( comboot_initial_regs )	comboot_call.c
659	int20_vector	__use_text16 ( int20_vector )	comboot_call.c
660	int21_vector	__use_text16 ( int21_vector )	comboot_call.c
661	int22_vector	__use_text16 ( int22_vector )	comboot_call.c
662	PCIAPI_PREFIX_pcbios	__pcbios_	pcibios.h
663	PCIBIOS_INSTALLATION_CHECK	0xb1010000	pcibios.h
664	PCIBIOS_READ_CONFIG_BYTE	0xb1080000	pcibios.h
665	PCIBIOS_READ_CONFIG_WORD	0xb1090000	pcibios.h
666	PCIBIOS_READ_CONFIG_DWORD	0xb10a0000	pcibios.h
667	PCIBIOS_WRITE_CONFIG_BYTE	0xb10b0000	pcibios.h
668	PCIBIOS_WRITE_CONFIG_WORD	0xb10c0000	pcibios.h
669	PCIBIOS_WRITE_CONFIG_DWORD	0xb10d0000	pcibios.h
670	PCIAPI_PREFIX_direct	__direct_	pcidirect.h
671	PCIDIRECT_CONFIG_ADDRESS	0xcf8	pcidirect.h
672	PCIDIRECT_CONFIG_DATA	0xcfc	pcidirect.h
673	NAP_PREFIX_efix86	__efix86_	efix86_nap.h
674	LIMITS_H	1	limits.h
675	CHAR_BIT	8	limits.h
676	SCHAR_MIN	(-128)	limits.h
677	SCHAR_MAX	127	limits.h
678	UCHAR_MAX	255	limits.h
679	CHAR_MIN	SCHAR_MIN	limits.h
680	CHAR_MAX	SCHAR_MAX	limits.h
681	SHRT_MIN	(-32768)	limits.h
682	SHRT_MAX	32767	limits.h
683	USHRT_MAX	65535	limits.h
684	INT_MIN	(-INT_MAX - 1)	limits.h
685	INT_MAX	2147483647	limits.h
686	UINT_MAX	4294967295U	limits.h
687	INT_MAX	2147483647	limits.h
688	INT_MIN	(-INT_MAX - 1)	limits.h
689	UINT_MAX	4294967295U	limits.h
690	LONG_MAX	9223372036854775807L	limits.h
691	LONG_MIN	(-LONG_MAX - 1L)	limits.h
692	ULONG_MAX	18446744073709551615UL	limits.h
693	LLONG_MAX	9223372036854775807LL	limits.h
694	LLONG_MIN	(-LONG_MAX - 1LL)	limits.h
695	ULLONG_MAX	18446744073709551615ULL	limits.h
696	__asmcall	__attribute__ (( regparm(0) ))	compiler.h
697	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
698	PRODUCT_NAME	""	general.h
699	PRODUCT_SHORT_NAME	"gPXE"	general.h
700	BANNER_TIMEOUT	20	general.h	Tenths of a second for which the shell
701	COMCONSOLE	0x3f8	serial.h	I/O port address
702	COMSPEED	115200	serial.h	Baud rate
703	COMDATA	8	serial.h	Data bits
704	COMPARITY	0	serial.h	Parity: 0=None, 1=Odd, 2=Even
705	COMSTOP	1	serial.h	Stop bits
706	CHAR_256	0	btext.c
707	cmapsz	(16*256)	btext.c
708	cmapsz	(16*96)	btext.c
709	BUILD_SERIAL_STR	" #" XSTR(BUILD_SERIAL_NUM)	config.c
710	BUILD_SERIAL_STR	""	config.c
711	BUILD_ID_STR	" " BUILD_ID	config.c
712	BUILD_ID_STR	""	config.c
713	BUILD_STRING	" [build" BUILD_ID_STR BUILD_SERIAL_STR "]"	config.c
714	BUILD_STRING	""	config.c
715	GUARD_SYMBOL	( ( 'M' << 24 ) \| ( 'I' << 16 ) \| ( 'N' << 8 ) \| 'E' )	debug.c
716	NUM_AUTO_COLOURS	6	debug.c
717	GETKEY_TIMEOUT	( TICKS_PER_SEC / 4 )	getkey.c
718	IS_VADEM	0x0001	i82365.c
719	IS_CIRRUS	0x0002	i82365.c
720	IS_TI	0x0004	i82365.c
721	IS_O2MICRO	0x0008	i82365.c
722	IS_VIA	0x0010	i82365.c
723	IS_TOPIC	0x0020	i82365.c
724	IS_RICOH	0x0040	i82365.c
725	IS_UNKNOWN	0x0400	i82365.c
726	IS_VG_PWR	0x0800	i82365.c
727	IS_DF_PWR	0x1000	i82365.c
728	IS_PCI	0x2000	i82365.c
729	IS_ALIVE	0x8000	i82365.c
730	NORMAL	"\033[0m"	main.c
731	BOLD	"\033[1m"	main.c
732	CYAN	"\033[36m"	main.c
733	MIN_MEMBLOCK_SIZE	( ( size_t ) ( 1 << ( fls ( sizeof ( struct memory_block ) - 1 ) ) ) )	malloc.c
734	NOWHERE	( ( void * ) ~( ( intptr_t ) 0 ) )	malloc.c
735	HEAP_SIZE	( 128 * 1024 )	malloc.c
736	CODE_STATUS	"alpha"	pcmcia.c
737	CODE_VERSION	"0.1.3"	pcmcia.c
738	NUM_DRIVERS	(sizeof(driver)/(sizeof(struct driver_interact_t)))	pcmcia.c
739	SHIFT	1	pc_kbd.c
740	CONTROL	2	pc_kbd.c
741	CAPS	4	pc_kbd.c
742	LACP_DEBUG	0	proto_eth_slow.c
743	SLOW_DST_MAC	"\x01\x80\xc2\x00\x00\x02"	proto_eth_slow.c
744	SLOW_SUBTYPE_LACP	1	proto_eth_slow.c
745	SLOW_SUBTYPE_MARKER	2	proto_eth_slow.c
746	LACP_CMP_LEN	(2 + 6 + 2 + 2 + 2)	proto_eth_slow.c
747	LACP_CP_LEN	(2 + 6 + 2 + 2 + 2 + 1)	proto_eth_slow.c
748	FAST_PERIODIC_TIME	(1*TICKS_PER_SEC)	proto_eth_slow.c
749	SLOW_PERIODIC_TIME	(30*TICKS_PER_SEC)	proto_eth_slow.c
750	SHORT_TIMEOUT_TIME	(3*FAST_PERIODIC_TIME)	proto_eth_slow.c
751	LONG_TIMEOUT_TIME	(3*SLOW_PERIODIC_TIME)	proto_eth_slow.c
752	CHURN_DETECTION_TIME	(60*TICKS_PER_SEC)	proto_eth_slow.c
753	AGGREGATE_WAIT_TIME	(2*TICKS_PER_SEC)	proto_eth_slow.c
754	LACP_ACTIVITY	(1 << 0)	proto_eth_slow.c
755	LACP_TIMEOUT	(1 << 1)	proto_eth_slow.c
756	LACP_AGGREGATION	(1 << 2)	proto_eth_slow.c
757	LACP_SYNCHRONIZATION	(1 << 3)	proto_eth_slow.c
758	LACP_COLLECTING	(1 << 4)	proto_eth_slow.c
759	LACP_DISTRIBUTING	(1 << 5)	proto_eth_slow.c
760	LACP_DEFAULTED	(1 << 6)	proto_eth_slow.c
761	LACP_EXPIRED	(1 << 7)	proto_eth_slow.c
762	UNSELECTED	0	proto_eth_slow.c
763	STANDBY	1	proto_eth_slow.c
764	SELECTED	2	proto_eth_slow.c
765	LACP_NTT_MASK	(LACP_ACTIVITY \| LACP_TIMEOUT \| \ LACP_SYNCHRONIZATION \| LACP_AGGREGATION)	proto_eth_slow.c
766	COMCONSOLE	0x3f8	serial.c
767	COMSPEED	9600	serial.c
768	COMDATA	8	serial.c
769	COMPARITY	0	serial.c
770	COMSTOP	1	serial.c
771	UART_BASE	( COMCONSOLE )	serial.c
772	UART_BAUD	( COMSPEED )	serial.c
773	COMBRD	(115200/UART_BAUD)	serial.c
774	UART_LCS	( ( ( (COMDATA) - 5 ) << 0 ) \| \ ( ( (COMPARITY) ) << 3 ) \| \ ( ( (COMSTOP) - 1 ) << 2 ) )	serial.c
775	UART_RBR	0x00	serial.c
776	UART_TBR	0x00	serial.c
777	UART_IER	0x01	serial.c
778	UART_IIR	0x02	serial.c
779	UART_FCR	0x02	serial.c
780	UART_LCR	0x03	serial.c
781	UART_MCR	0x04	serial.c
782	UART_DLL	0x00	serial.c
783	UART_DLM	0x01	serial.c
784	UART_LSR	0x05	serial.c
785	UART_LSR_TEMPT	0x40	serial.c	Transmitter empty
786	UART_LSR_THRE	0x20	serial.c	Transmit-hold-register empty
787	UART_LSR_BI	0x10	serial.c	Break interrupt indicator
788	UART_LSR_FE	0x08	serial.c	Frame error indicator
789	UART_LSR_PE	0x04	serial.c	Parity error indicator
790	UART_LSR_OE	0x02	serial.c	Overrun error indicator
791	UART_LSR_DR	0x01	serial.c	Receiver data ready
792	UART_MSR	0x06	serial.c
793	UART_SCR	0x07	serial.c
794	settings_root	simple_settings_root.settings	settings.c
795	CHAR_LEN	0	vsprintf.c	*< "hh" length modifier
796	SHORT_LEN	1	vsprintf.c	*< "h" length modifier
797	INT_LEN	2	vsprintf.c	*< no length modifier
798	LONG_LEN	3	vsprintf.c	*< "l" length modifier
799	LONGLONG_LEN	4	vsprintf.c	*< "ll" length modifier
800	SIZE_T_LEN	5	vsprintf.c	*< "z" length modifier
801	LCASE	0x20	vsprintf.c
802	ALT_FORM	0x02	vsprintf.c
803	AES_BLOCKSIZE	16	axtls_aes.c
804	__md5step	__attribute__ (( regparm ( 3 ) ))	md5.c
805	mt	0x80808080	aes.c
806	ml	0x7f7f7f7f	aes.c
807	mh	0xfefefefe	aes.c
808	mm	0x1b1b1b1b	aes.c
809	BIGINT_M_OFFSET	0	bigint_impl.h	*< Normal modulo offset.
810	BIGINT_P_OFFSET	1	bigint_impl.h	*< p modulo offset.
811	BIGINT_Q_OFFSET	2	bigint_impl.h	*< q module offset.
812	BIGINT_NUM_MODS	3	bigint_impl.h	*< The number of modulus constants used.
813	BIGINT_NUM_MODS	1	bigint_impl.h
814	COMP_RADIX	4294967296i64	bigint_impl.h
815	COMP_BIG_MSB	0x8000000000000000i64	bigint_impl.h
816	COMP_RADIX	4294967296ULL	bigint_impl.h	*< Max component + 1
817	COMP_BIG_MSB	0x8000000000000000ULL	bigint_impl.h	*< (Max dbl comp + 1)/ 2
818	COMP_BIT_SIZE	32	bigint_impl.h	*< Number of bits in a component.
819	COMP_BYTE_SIZE	4	bigint_impl.h	*< Number of bytes in a component.
820	COMP_NUM_NIBBLES	8	bigint_impl.h	*< Used For diagnostics only.
821	PERMANENT	0x7FFF55AA	bigint_impl.h	*< A magic number for permanents.
822	V1	v->comps[v->size-1]	bigint_impl.h	*< v1 for division
823	V2	v->comps[v->size-2]	bigint_impl.h	*< v2 for division
824	CONFIG_SSL_CERT_VERIFICATION	1	os_port.h
825	CONFIG_SSL_MAX_CERTS	1	os_port.h
826	CONFIG_X509_MAX_CA_CERTS	1	os_port.h
827	CONFIG_SSL_EXPIRY_TIME	24	os_port.h
828	CONFIG_SSL_ENABLE_CLIENT	1	os_port.h
829	CONFIG_BIGINT_CLASSICAL	1	os_port.h
830	SELECT_SLAVE	0	spi_bit.c
831	DESELECT_SLAVE	SPI_MODE_SSPOL	spi_bit.c
832	SCSI_MAX_DUMMY_READ_CAP	10	scsi.c
833	ISA_EXTRA_PROBE_ADDR_COUNT	( sizeof ( isa_extra_probe_addrs ) / sizeof ( isa_extra_probe_addrs[0] ) )	isa.c
834	ISAPNP_CARD_ID_FMT	"ID %04x:%04x (\"%s\") serial %x"	isapnp.c
835	ISAPNP_DEV_ID_FMT	"ID %04x:%04x (\"%s\")"	isapnp.c
836	LINDA_SEND_BUF_TOGGLE	0x80	linda.c
837	LINDA_EPB_ALL_CHANNELS	31	linda.c
838	LINDA_SERDES_PARAM_END	{ 0, 0, 0 }	linda.c
839	ARBEL_NUM_PORTS	2	arbel.h
840	ARBEL_PORT_BASE	1	arbel.h
841	ARBEL_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	arbel.h
842	ARBEL_PCI_CONFIG_BAR_SIZE	0x100000	arbel.h
843	ARBEL_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	arbel.h
844	ARBEL_PCI_UAR_IDX	1	arbel.h
845	ARBEL_PCI_UAR_SIZE	0x1000	arbel.h
846	ARBEL_UAR_RES_NONE	0x00	arbel.h
847	ARBEL_UAR_RES_CQ_CI	0x01	arbel.h
848	ARBEL_UAR_RES_CQ_ARM	0x02	arbel.h
849	ARBEL_UAR_RES_SQ	0x03	arbel.h
850	ARBEL_UAR_RES_RQ	0x04	arbel.h
851	ARBEL_UAR_RES_GROUP_SEP	0x07	arbel.h
852	ARBEL_OPCODE_SEND	0x0a	arbel.h
853	ARBEL_OPCODE_RECV_ERROR	0xfe	arbel.h
854	ARBEL_OPCODE_SEND_ERROR	0xff	arbel.h
855	ARBEL_HCR_QUERY_DEV_LIM	0x0003	arbel.h
856	ARBEL_HCR_QUERY_FW	0x0004	arbel.h
857	ARBEL_HCR_INIT_HCA	0x0007	arbel.h
858	ARBEL_HCR_CLOSE_HCA	0x0008	arbel.h
859	ARBEL_HCR_INIT_IB	0x0009	arbel.h
860	ARBEL_HCR_CLOSE_IB	0x000a	arbel.h
861	ARBEL_HCR_SW2HW_MPT	0x000d	arbel.h
862	ARBEL_HCR_MAP_EQ	0x0012	arbel.h
863	ARBEL_HCR_SW2HW_EQ	0x0013	arbel.h
864	ARBEL_HCR_HW2SW_EQ	0x0014	arbel.h
865	ARBEL_HCR_SW2HW_CQ	0x0016	arbel.h
866	ARBEL_HCR_HW2SW_CQ	0x0017	arbel.h
867	ARBEL_HCR_RST2INIT_QPEE	0x0019	arbel.h
868	ARBEL_HCR_INIT2RTR_QPEE	0x001a	arbel.h
869	ARBEL_HCR_RTR2RTS_QPEE	0x001b	arbel.h
870	ARBEL_HCR_RTS2RTS_QPEE	0x001c	arbel.h
871	ARBEL_HCR_2RST_QPEE	0x0021	arbel.h
872	ARBEL_HCR_MAD_IFC	0x0024	arbel.h
873	ARBEL_HCR_READ_MGM	0x0025	arbel.h
874	ARBEL_HCR_WRITE_MGM	0x0026	arbel.h
875	ARBEL_HCR_MGID_HASH	0x0027	arbel.h
876	ARBEL_HCR_RUN_FW	0x0ff6	arbel.h
877	ARBEL_HCR_DISABLE_LAM	0x0ff7	arbel.h
878	ARBEL_HCR_ENABLE_LAM	0x0ff8	arbel.h
879	ARBEL_HCR_UNMAP_ICM	0x0ff9	arbel.h
880	ARBEL_HCR_MAP_ICM	0x0ffa	arbel.h
881	ARBEL_HCR_UNMAP_ICM_AUX	0x0ffb	arbel.h
882	ARBEL_HCR_MAP_ICM_AUX	0x0ffc	arbel.h
883	ARBEL_HCR_SET_ICM_SIZE	0x0ffd	arbel.h
884	ARBEL_HCR_UNMAP_FA	0x0ffe	arbel.h
885	ARBEL_HCR_MAP_FA	0x0fff	arbel.h
886	ARBEL_ST_UD	0x03	arbel.h
887	ARBEL_MTU_2048	0x04	arbel.h
888	ARBEL_NO_EQ	64	arbel.h
889	ARBEL_INVALID_LKEY	0x00000100UL	arbel.h
890	ARBEL_PAGE_SIZE	4096	arbel.h
891	ARBEL_DB_POST_SND_OFFSET	0x10	arbel.h
892	ARBEL_QPEE_OPT_PARAM_QKEY	0x00000020UL	arbel.h
893	ARBEL_MAP_EQ	( 0UL << 31 )	arbel.h
894	ARBEL_UNMAP_EQ	( 1UL << 31 )	arbel.h
895	ARBEL_EV_PORT_STATE_CHANGE	0x09	arbel.h
896	ARBEL_MAX_GATHER	1	arbel.h
897	ARBEL_MAX_SCATTER	1	arbel.h
898	ARBEL_SEND_WQE_ALIGN	128	arbel.h
899	ARBEL_RECV_WQE_ALIGN	64	arbel.h
900	ARBEL_MAX_QPS	8	arbel.h
901	ARBEL_QPN_BASE	0x550000	arbel.h
902	ARBEL_MAX_CQS	8	arbel.h
903	ARBEL_MAX_EQS	64	arbel.h
904	ARBEL_NUM_EQES	4	arbel.h
905	ARBEL_GLOBAL_PD	0x123456	arbel.h
906	ARBEL_MKEY_PREFIX	0x77000000UL	arbel.h
907	ARBEL_HCR_BASE	0x80680	arbel.h
908	ARBEL_HCR_MAX_WAIT_MS	2000	arbel.h
909	ARBEL_MBOX_ALIGN	4096	arbel.h
910	ARBEL_MBOX_SIZE	512	arbel.h
911	ARBEL_HCR_IN_MBOX	0x00001000UL	arbel.h
912	ARBEL_HCR_OUT_MBOX	0x00002000UL	arbel.h
913	ARBEL_MAX_DOORBELL_RECORDS	512	arbel.h
914	ARBEL_GROUP_SEPARATOR_DOORBELL	( ARBEL_MAX_CQS + ARBEL_MAX_QPS )	arbel.h
915	HERMON_NUM_PORTS	2	hermon.h
916	HERMON_PORT_BASE	1	hermon.h
917	HERMON_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	hermon.h
918	HERMON_PCI_CONFIG_BAR_SIZE	0x100000	hermon.h
919	HERMON_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	hermon.h
920	HERMON_OPCODE_SEND	0x0a	hermon.h
921	HERMON_OPCODE_RECV_ERROR	0xfe	hermon.h
922	HERMON_OPCODE_SEND_ERROR	0xff	hermon.h
923	HERMON_HCR_QUERY_DEV_CAP	0x0003	hermon.h
924	HERMON_HCR_QUERY_FW	0x0004	hermon.h
925	HERMON_HCR_INIT_HCA	0x0007	hermon.h
926	HERMON_HCR_CLOSE_HCA	0x0008	hermon.h
927	HERMON_HCR_INIT_PORT	0x0009	hermon.h
928	HERMON_HCR_CLOSE_PORT	0x000a	hermon.h
929	HERMON_HCR_SW2HW_MPT	0x000d	hermon.h
930	HERMON_HCR_WRITE_MTT	0x0011	hermon.h
931	HERMON_HCR_MAP_EQ	0x0012	hermon.h
932	HERMON_HCR_SW2HW_EQ	0x0013	hermon.h
933	HERMON_HCR_HW2SW_EQ	0x0014	hermon.h
934	HERMON_HCR_QUERY_EQ	0x0015	hermon.h
935	HERMON_HCR_SW2HW_CQ	0x0016	hermon.h
936	HERMON_HCR_HW2SW_CQ	0x0017	hermon.h
937	HERMON_HCR_RST2INIT_QP	0x0019	hermon.h
938	HERMON_HCR_INIT2RTR_QP	0x001a	hermon.h
939	HERMON_HCR_RTR2RTS_QP	0x001b	hermon.h
940	HERMON_HCR_RTS2RTS_QP	0x001c	hermon.h
941	HERMON_HCR_2RST_QP	0x0021	hermon.h
942	HERMON_HCR_MAD_IFC	0x0024	hermon.h
943	HERMON_HCR_READ_MCG	0x0025	hermon.h
944	HERMON_HCR_WRITE_MCG	0x0026	hermon.h
945	HERMON_HCR_MGID_HASH	0x0027	hermon.h
946	HERMON_HCR_RUN_FW	0x0ff6	hermon.h
947	HERMON_HCR_DISABLE_LAM	0x0ff7	hermon.h
948	HERMON_HCR_ENABLE_LAM	0x0ff8	hermon.h
949	HERMON_HCR_UNMAP_ICM	0x0ff9	hermon.h
950	HERMON_HCR_MAP_ICM	0x0ffa	hermon.h
951	HERMON_HCR_UNMAP_ICM_AUX	0x0ffb	hermon.h
952	HERMON_HCR_MAP_ICM_AUX	0x0ffc	hermon.h
953	HERMON_HCR_SET_ICM_SIZE	0x0ffd	hermon.h
954	HERMON_HCR_UNMAP_FA	0x0ffe	hermon.h
955	HERMON_HCR_MAP_FA	0x0fff	hermon.h
956	HERMON_ST_UD	0x03	hermon.h
957	HERMON_MTU_2048	0x04	hermon.h
958	HERMON_INVALID_LKEY	0x00000100UL	hermon.h
959	HERMON_PAGE_SIZE	4096	hermon.h
960	HERMON_DB_POST_SND_OFFSET	0x14	hermon.h
961	HERMON_QP_OPT_PARAM_QKEY	0x00000020UL	hermon.h
962	HERMON_MAP_EQ	( 0UL << 31 )	hermon.h
963	HERMON_UNMAP_EQ	( 1UL << 31 )	hermon.h
964	HERMON_EV_PORT_STATE_CHANGE	0x09	hermon.h
965	HERMON_MAX_GATHER	1	hermon.h
966	HERMON_MAX_SCATTER	1	hermon.h
967	HERMON_CMPT_MAX_ENTRIES	( 1 << 24 )	hermon.h
968	HERMON_UAR_NON_EQ_PAGE	128	hermon.h
969	HERMON_MAX_MTTS	64	hermon.h
970	HERMON_SEND_WQE_ALIGN	128	hermon.h
971	HERMON_RECV_WQE_ALIGN	16	hermon.h
972	HERMON_MAX_QPS	8	hermon.h
973	HERMON_QPN_BASE	0x550000	hermon.h
974	HERMON_MAX_CQS	8	hermon.h
975	HERMON_MAX_EQS	8	hermon.h
976	HERMON_NUM_EQES	4	hermon.h
977	HERMON_GLOBAL_PD	0x123456	hermon.h
978	HERMON_MKEY_PREFIX	0x77000000UL	hermon.h
979	HERMON_HCR_BASE	0x80680	hermon.h
980	HERMON_HCR_MAX_WAIT_MS	2000	hermon.h
981	HERMON_MBOX_ALIGN	4096	hermon.h
982	HERMON_MBOX_SIZE	512	hermon.h
983	HERMON_HCR_IN_MBOX	0x00001000UL	hermon.h
984	HERMON_HCR_OUT_MBOX	0x00002000UL	hermon.h
985	LINDA_SENDBUFAVAIL_ALIGN	64	linda.h
986	LINDA_BAR0_SIZE	0x400000	linda.h
987	LINDA_GPIO_SCL	0	linda.h
988	LINDA_GPIO_SDA	1	linda.h
989	LINDA_EEPROM_GUID_OFFSET	3	linda.h
990	LINDA_EEPROM_GUID_SIZE	8	linda.h
991	LINDA_EEPROM_SERIAL_OFFSET	12	linda.h
992	LINDA_EEPROM_SERIAL_SIZE	12	linda.h
993	LINDA_MAX_SEND_BUFS	32	linda.h
994	LINDA_SEND_BUF_SIZE	4096	linda.h
995	LINDA_NUM_CONTEXTS	5	linda.h
996	LINDA_EAGER_ARRAY_SIZE_5CTX_0	2048	linda.h
997	LINDA_EAGER_ARRAY_SIZE_5CTX_OTH	4096	linda.h
998	LINDA_EAGER_ARRAY_SIZE_9CTX_0	2048	linda.h
999	LINDA_EAGER_ARRAY_SIZE_9CTX_OTH	2048	linda.h
1000	LINDA_EAGER_ARRAY_SIZE_17CTX_0	2048	linda.h
1001	LINDA_EAGER_ARRAY_SIZE_17CTX_OT	1024	linda.h
1002	LINDA_EAGER_BUFFER_ALIGN	2048	linda.h
1003	LINDA_RECV_HEADER_COUNT	8	linda.h
1004	LINDA_RECV_HEADER_SIZE	96	linda.h
1005	LINDA_RECV_HEADERS_SIZE	( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )	linda.h
1006	LINDA_RECV_HEADERS_ALIGN	64	linda.h
1007	LINDA_RECV_PAYLOAD_SIZE	2048	linda.h
1008	LINDA_QP_IDETH	0xdead0	linda.h
1009	LINDA_EPB_REQUEST_MAX_WAIT_US	500	linda.h
1010	LINDA_EPB_XACT_MAX_WAIT_US	500	linda.h
1011	LINDA_EPB_CS_SERDES	1	linda.h
1012	LINDA_EPB_CS_UC	2	linda.h
1013	LINDA_EPB_WRITE	0	linda.h
1014	LINDA_EPB_READ	1	linda.h
1015	LINDA_EPB_UC_CHANNEL	6	linda.h
1016	LINDA_EPB_UC_CTL	LINDA_EPB_UC_LOC ( 0 )	linda.h
1017	LINDA_EPB_UC_CTL_WRITE	1	linda.h
1018	LINDA_EPB_UC_CTL_READ	2	linda.h
1019	LINDA_EPB_UC_ADDR_LO	LINDA_EPB_UC_LOC ( 2 )	linda.h
1020	LINDA_EPB_UC_ADDR_HI	LINDA_EPB_UC_LOC ( 3 )	linda.h
1021	LINDA_EPB_UC_DATA	LINDA_EPB_UC_LOC ( 4 )	linda.h
1022	LINDA_EPB_UC_CHUNK_SIZE	64	linda.h
1023	LINDA_TRIM_DONE_MAX_WAIT_MS	1000	linda.h
1024	QIB_7220_Revision_offset	0x00000000UL	qib_7220_regs.h
1025	QIB_7220_Control_offset	0x00000008UL	qib_7220_regs.h
1026	QIB_7220_PageAlign_offset	0x00000010UL	qib_7220_regs.h
1027	QIB_7220_PortCnt_offset	0x00000018UL	qib_7220_regs.h
1028	QIB_7220_DbgPortSel_offset	0x00000020UL	qib_7220_regs.h
1029	QIB_7220_DebugSigsIntSel_offset	0x00000028UL	qib_7220_regs.h
1030	QIB_7220_SendRegBase_offset	0x00000030UL	qib_7220_regs.h
1031	QIB_7220_UserRegBase_offset	0x00000038UL	qib_7220_regs.h
1032	QIB_7220_CntrRegBase_offset	0x00000040UL	qib_7220_regs.h
1033	QIB_7220_Scratch_offset	0x00000048UL	qib_7220_regs.h
1034	QIB_7220_REG_000050_offset	0x00000050UL	qib_7220_regs.h
1035	QIB_7220_IntBlocked_offset	0x00000060UL	qib_7220_regs.h
1036	QIB_7220_IntMask_offset	0x00000068UL	qib_7220_regs.h
1037	QIB_7220_IntStatus_offset	0x00000070UL	qib_7220_regs.h
1038	QIB_7220_IntClear_offset	0x00000078UL	qib_7220_regs.h
1039	QIB_7220_ErrMask_offset	0x00000080UL	qib_7220_regs.h
1040	QIB_7220_ErrStatus_offset	0x00000088UL	qib_7220_regs.h
1041	QIB_7220_ErrClear_offset	0x00000090UL	qib_7220_regs.h
1042	QIB_7220_HwErrMask_offset	0x00000098UL	qib_7220_regs.h
1043	QIB_7220_HwErrStatus_offset	0x000000a0UL	qib_7220_regs.h
1044	QIB_7220_HwErrClear_offset	0x000000a8UL	qib_7220_regs.h
1045	QIB_7220_HwDiagCtrl_offset	0x000000b0UL	qib_7220_regs.h
1046	QIB_7220_REG_0000B8_offset	0x000000b8UL	qib_7220_regs.h
1047	QIB_7220_IBCStatus_offset	0x000000c0UL	qib_7220_regs.h
1048	QIB_7220_IBCCtrl_offset	0x000000c8UL	qib_7220_regs.h
1049	QIB_7220_EXTStatus_offset	0x000000d0UL	qib_7220_regs.h
1050	QIB_7220_EXTCtrl_offset	0x000000d8UL	qib_7220_regs.h
1051	QIB_7220_GPIOOut_offset	0x000000e0UL	qib_7220_regs.h
1052	QIB_7220_GPIOMask_offset	0x000000e8UL	qib_7220_regs.h
1053	QIB_7220_GPIOStatus_offset	0x000000f0UL	qib_7220_regs.h
1054	QIB_7220_GPIOClear_offset	0x000000f8UL	qib_7220_regs.h
1055	QIB_7220_RcvCtrl_offset	0x00000100UL	qib_7220_regs.h
1056	QIB_7220_RcvBTHQP_offset	0x00000108UL	qib_7220_regs.h
1057	QIB_7220_RcvHdrSize_offset	0x00000110UL	qib_7220_regs.h
1058	QIB_7220_RcvHdrCnt_offset	0x00000118UL	qib_7220_regs.h
1059	QIB_7220_RcvHdrEntSize_offset	0x00000120UL	qib_7220_regs.h
1060	QIB_7220_RcvTIDBase_offset	0x00000128UL	qib_7220_regs.h
1061	QIB_7220_RcvTIDCnt_offset	0x00000130UL	qib_7220_regs.h
1062	QIB_7220_RcvEgrBase_offset	0x00000138UL	qib_7220_regs.h
1063	QIB_7220_RcvEgrCnt_offset	0x00000140UL	qib_7220_regs.h
1064	QIB_7220_RcvBufBase_offset	0x00000148UL	qib_7220_regs.h
1065	QIB_7220_RcvBufSize_offset	0x00000150UL	qib_7220_regs.h
1066	QIB_7220_RxIntMemBase_offset	0x00000158UL	qib_7220_regs.h
1067	QIB_7220_RxIntMemSize_offset	0x00000160UL	qib_7220_regs.h
1068	QIB_7220_RcvPartitionKey_offset	0x00000168UL	qib_7220_regs.h
1069	QIB_7220_RcvQPMulticastPort_off	0x00000170UL	qib_7220_regs.h
1070	QIB_7220_RcvPktLEDCnt_offset	0x00000178UL	qib_7220_regs.h
1071	QIB_7220_IBCDDRCtrl_offset	0x00000180UL	qib_7220_regs.h
1072	QIB_7220_HRTBT_GUID_offset	0x00000188UL	qib_7220_regs.h
1073	QIB_7220_IB_SDTEST_IF_TX_offset	0x00000190UL	qib_7220_regs.h
1074	QIB_7220_IB_SDTEST_IF_RX_offset	0x00000198UL	qib_7220_regs.h
1075	QIB_7220_IBCDDRCtrl2_offset	0x000001a0UL	qib_7220_regs.h
1076	QIB_7220_IBCDDRStatus_offset	0x000001a8UL	qib_7220_regs.h
1077	QIB_7220_JIntReload_offset	0x000001b0UL	qib_7220_regs.h
1078	QIB_7220_IBNCModeCtrl_offset	0x000001b8UL	qib_7220_regs.h
1079	QIB_7220_SendCtrl_offset	0x000001c0UL	qib_7220_regs.h
1080	QIB_7220_SendBufBase_offset	0x000001c8UL	qib_7220_regs.h
1081	QIB_7220_SendBufSize_offset	0x000001d0UL	qib_7220_regs.h
1082	QIB_7220_SendBufCnt_offset	0x000001d8UL	qib_7220_regs.h
1083	QIB_7220_SendBufAvailAddr_offse	0x000001e0UL	qib_7220_regs.h
1084	QIB_7220_TxIntMemBase_offset	0x000001e8UL	qib_7220_regs.h
1085	QIB_7220_TxIntMemSize_offset	0x000001f0UL	qib_7220_regs.h
1086	QIB_7220_SendDmaBase_offset	0x000001f8UL	qib_7220_regs.h
1087	QIB_7220_SendDmaLenGen_offset	0x00000200UL	qib_7220_regs.h
1088	QIB_7220_SendDmaTail_offset	0x00000208UL	qib_7220_regs.h
1089	QIB_7220_SendDmaHead_offset	0x00000210UL	qib_7220_regs.h
1090	QIB_7220_SendDmaHeadAddr_offset	0x00000218UL	qib_7220_regs.h
1091	QIB_7220_SendDmaBufMask0_offset	0x00000220UL	qib_7220_regs.h
1092	QIB_7220_SendDmaStatus_offset	0x00000238UL	qib_7220_regs.h
1093	QIB_7220_SendBufErr0_offset	0x00000240UL	qib_7220_regs.h
1094	QIB_7220_REG_000258_offset	0x00000258UL	qib_7220_regs.h
1095	QIB_7220_AvailUpdCount_offset	0x00000268UL	qib_7220_regs.h
1096	QIB_7220_RcvHdrAddr0_offset	0x00000270UL	qib_7220_regs.h
1097	QIB_7220_REG_0002F8_offset	0x000002f8UL	qib_7220_regs.h
1098	QIB_7220_RcvHdrTailAddr0_offset	0x00000300UL	qib_7220_regs.h
1099	QIB_7220_REG_000388_offset	0x00000388UL	qib_7220_regs.h
1100	QIB_7220_ibsd_epb_access_ctrl_o	0x000003c0UL	qib_7220_regs.h
1101	QIB_7220_ibsd_epb_transaction_r	0x000003c8UL	qib_7220_regs.h
1102	QIB_7220_REG_0003D0_offset	0x000003d0UL	qib_7220_regs.h
1103	QIB_7220_XGXSCfg_offset	0x000003d8UL	qib_7220_regs.h
1104	QIB_7220_IBSerDesCtrl_offset	0x000003e0UL	qib_7220_regs.h
1105	QIB_7220_EEPCtlStat_offset	0x000003e8UL	qib_7220_regs.h
1106	QIB_7220_EEPAddrCmd_offset	0x000003f0UL	qib_7220_regs.h
1107	QIB_7220_EEPData_offset	0x000003f8UL	qib_7220_regs.h
1108	QIB_7220_pciesd_epb_access_ctrl	0x00000400UL	qib_7220_regs.h
1109	QIB_7220_pciesd_epb_transaction	0x00000408UL	qib_7220_regs.h
1110	QIB_7220_efuse_control_reg_offs	0x00000410UL	qib_7220_regs.h
1111	QIB_7220_efuse_rddata0_reg_offs	0x00000418UL	qib_7220_regs.h
1112	QIB_7220_procmon_register_offse	0x00000438UL	qib_7220_regs.h
1113	QIB_7220_PcieRbufTestReg0_offse	0x00000440UL	qib_7220_regs.h
1114	QIB_7220_PcieRBufTestReg1_offse	0x00000448UL	qib_7220_regs.h
1115	QIB_7220_SPC_JTAG_ACCESS_REG_of	0x00000460UL	qib_7220_regs.h
1116	QIB_7220_LAControlReg_offset	0x00000468UL	qib_7220_regs.h
1117	QIB_7220_GPIODebugSelReg_offset	0x00000470UL	qib_7220_regs.h
1118	QIB_7220_DebugPortValueReg_offs	0x00000478UL	qib_7220_regs.h
1119	QIB_7220_SendDmaBufUsed0_offset	0x00000480UL	qib_7220_regs.h
1120	QIB_7220_SendDmaReqTagUsed_offs	0x00000498UL	qib_7220_regs.h
1121	QIB_7220_efuse_pgm_data0_offset	0x000004a0UL	qib_7220_regs.h
1122	QIB_7220_MEM_0004B0_offset	0x000004b0UL	qib_7220_regs.h
1123	QIB_7220_SerDes_DDSRXEQ0_offset	0x00000500UL	qib_7220_regs.h
1124	QIB_7220_MEM_0005F0_offset	0x000005f0UL	qib_7220_regs.h
1125	QIB_7220_LAMemory_offset	0x00000600UL	qib_7220_regs.h
1126	QIB_7220_MEM_0007F0_offset	0x000007f0UL	qib_7220_regs.h
1127	QIB_7220_SendBufAvail0_offset	0x00001000UL	qib_7220_regs.h
1128	QIB_7220_MEM_001028_offset	0x00001028UL	qib_7220_regs.h
1129	QIB_7220_LBIntCnt_offset	0x00013000UL	qib_7220_regs.h
1130	QIB_7220_LBFlowStallCnt_offset	0x00013008UL	qib_7220_regs.h
1131	QIB_7220_TxSDmaDescCnt_offset	0x00013010UL	qib_7220_regs.h
1132	QIB_7220_TxUnsupVLErrCnt_offset	0x00013018UL	qib_7220_regs.h
1133	QIB_7220_TxDataPktCnt_offset	0x00013020UL	qib_7220_regs.h
1134	QIB_7220_TxFlowPktCnt_offset	0x00013028UL	qib_7220_regs.h
1135	QIB_7220_TxDwordCnt_offset	0x00013030UL	qib_7220_regs.h
1136	QIB_7220_TxLenErrCnt_offset	0x00013038UL	qib_7220_regs.h
1137	QIB_7220_TxMaxMinLenErrCnt_offs	0x00013040UL	qib_7220_regs.h
1138	QIB_7220_TxUnderrunCnt_offset	0x00013048UL	qib_7220_regs.h
1139	QIB_7220_TxFlowStallCnt_offset	0x00013050UL	qib_7220_regs.h
1140	QIB_7220_TxDroppedPktCnt_offset	0x00013058UL	qib_7220_regs.h
1141	QIB_7220_RxDroppedPktCnt_offset	0x00013060UL	qib_7220_regs.h
1142	QIB_7220_RxDataPktCnt_offset	0x00013068UL	qib_7220_regs.h
1143	QIB_7220_RxFlowPktCnt_offset	0x00013070UL	qib_7220_regs.h
1144	QIB_7220_RxDwordCnt_offset	0x00013078UL	qib_7220_regs.h
1145	QIB_7220_RxLenErrCnt_offset	0x00013080UL	qib_7220_regs.h
1146	QIB_7220_RxMaxMinLenErrCnt_offs	0x00013088UL	qib_7220_regs.h
1147	QIB_7220_RxICRCErrCnt_offset	0x00013090UL	qib_7220_regs.h
1148	QIB_7220_RxVCRCErrCnt_offset	0x00013098UL	qib_7220_regs.h
1149	QIB_7220_RxFlowCtrlViolCnt_offs	0x000130a0UL	qib_7220_regs.h
1150	QIB_7220_RxVersionErrCnt_offset	0x000130a8UL	qib_7220_regs.h
1151	QIB_7220_RxLinkMalformCnt_offse	0x000130b0UL	qib_7220_regs.h
1152	QIB_7220_RxEBPCnt_offset	0x000130b8UL	qib_7220_regs.h
1153	QIB_7220_RxLPCRCErrCnt_offset	0x000130c0UL	qib_7220_regs.h
1154	QIB_7220_RxBufOvflCnt_offset	0x000130c8UL	qib_7220_regs.h
1155	QIB_7220_RxTIDFullErrCnt_offset	0x000130d0UL	qib_7220_regs.h
1156	QIB_7220_RxTIDValidErrCnt_offse	0x000130d8UL	qib_7220_regs.h
1157	QIB_7220_RxPKeyMismatchCnt_offs	0x000130e0UL	qib_7220_regs.h
1158	QIB_7220_RxP0HdrEgrOvflCnt_offs	0x000130e8UL	qib_7220_regs.h
1159	QIB_7220_IBStatusChangeCnt_offs	0x00013170UL	qib_7220_regs.h
1160	QIB_7220_IBLinkErrRecoveryCnt_o	0x00013178UL	qib_7220_regs.h
1161	QIB_7220_IBLinkDownedCnt_offset	0x00013180UL	qib_7220_regs.h
1162	QIB_7220_IBSymbolErrCnt_offset	0x00013188UL	qib_7220_regs.h
1163	QIB_7220_RxVL15DroppedPktCnt_of	0x00013190UL	qib_7220_regs.h
1164	QIB_7220_RxOtherLocalPhyErrCnt_	0x00013198UL	qib_7220_regs.h
1165	QIB_7220_PcieRetryBufDiagQwordC	0x000131a0UL	qib_7220_regs.h
1166	QIB_7220_ExcessBufferOvflCnt_of	0x000131a8UL	qib_7220_regs.h
1167	QIB_7220_LocalLinkIntegrityErrC	0x000131b0UL	qib_7220_regs.h
1168	QIB_7220_RxVlErrCnt_offset	0x000131b8UL	qib_7220_regs.h
1169	QIB_7220_RxDlidFltrCnt_offset	0x000131c0UL	qib_7220_regs.h
1170	QIB_7220_CNT_0131C8_offset	0x000131c8UL	qib_7220_regs.h
1171	QIB_7220_PSStat_offset	0x00013200UL	qib_7220_regs.h
1172	QIB_7220_PSStart_offset	0x00013208UL	qib_7220_regs.h
1173	QIB_7220_PSInterval_offset	0x00013210UL	qib_7220_regs.h
1174	QIB_7220_PSRcvDataCount_offset	0x00013218UL	qib_7220_regs.h
1175	QIB_7220_PSRcvPktsCount_offset	0x00013220UL	qib_7220_regs.h
1176	QIB_7220_PSXmitDataCount_offset	0x00013228UL	qib_7220_regs.h
1177	QIB_7220_PSXmitPktsCount_offset	0x00013230UL	qib_7220_regs.h
1178	QIB_7220_PSXmitWaitCount_offset	0x00013238UL	qib_7220_regs.h
1179	QIB_7220_CNT_013240_offset	0x00013240UL	qib_7220_regs.h
1180	QIB_7220_RcvEgrArray_offset	0x00014000UL	qib_7220_regs.h
1181	QIB_7220_MEM_038000_offset	0x00038000UL	qib_7220_regs.h
1182	QIB_7220_RcvTIDArray0_offset	0x00053000UL	qib_7220_regs.h
1183	QIB_7220_PIOLaunchFIFO_offset	0x00064000UL	qib_7220_regs.h
1184	QIB_7220_MEM_064480_offset	0x00064480UL	qib_7220_regs.h
1185	QIB_7220_SendPIOpbcCache_offset	0x00064800UL	qib_7220_regs.h
1186	QIB_7220_MEM_064C80_offset	0x00064c80UL	qib_7220_regs.h
1187	QIB_7220_PreLaunchFIFO_offset	0x00065000UL	qib_7220_regs.h
1188	QIB_7220_MEM_065080_offset	0x00065080UL	qib_7220_regs.h
1189	QIB_7220_ScoreBoard_offset	0x00065400UL	qib_7220_regs.h
1190	QIB_7220_MEM_065440_offset	0x00065440UL	qib_7220_regs.h
1191	QIB_7220_DescriptorFIFO_offset	0x00065800UL	qib_7220_regs.h
1192	QIB_7220_MEM_065880_offset	0x00065880UL	qib_7220_regs.h
1193	QIB_7220_RcvBuf1_offset	0x00072000UL	qib_7220_regs.h
1194	QIB_7220_MEM_074800_offset	0x00074800UL	qib_7220_regs.h
1195	QIB_7220_RcvBuf2_offset	0x00075000UL	qib_7220_regs.h
1196	QIB_7220_MEM_076400_offset	0x00076400UL	qib_7220_regs.h
1197	QIB_7220_RcvFlags_offset	0x00077000UL	qib_7220_regs.h
1198	QIB_7220_MEM_078400_offset	0x00078400UL	qib_7220_regs.h
1199	QIB_7220_RcvLookupBuf1_offset	0x00079000UL	qib_7220_regs.h
1200	QIB_7220_MEM_07A400_offset	0x0007a400UL	qib_7220_regs.h
1201	QIB_7220_RcvDMADatBuf_offset	0x0007b000UL	qib_7220_regs.h
1202	QIB_7220_RcvDMAHdrBuf_offset	0x0007b800UL	qib_7220_regs.h
1203	QIB_7220_MiscRXEIntMem_offset	0x0007c000UL	qib_7220_regs.h
1204	QIB_7220_MEM_07D400_offset	0x0007d400UL	qib_7220_regs.h
1205	QIB_7220_PCIERcvBuf_offset	0x00080000UL	qib_7220_regs.h
1206	QIB_7220_PCIERetryBuf_offset	0x00084000UL	qib_7220_regs.h
1207	QIB_7220_PCIERcvBufRdToWrAddr_o	0x00088000UL	qib_7220_regs.h
1208	QIB_7220_PCIECplBuf_offset	0x00090000UL	qib_7220_regs.h
1209	QIB_7220_IBSerDesMappTable_offs	0x00094000UL	qib_7220_regs.h
1210	QIB_7220_MEM_095000_offset	0x00095000UL	qib_7220_regs.h
1211	QIB_7220_SendBuf0_MA_offset	0x00100000UL	qib_7220_regs.h
1212	QIB_7220_MEM_1A0000_offset	0x001a0000UL	qib_7220_regs.h
1213	QIB_7220_RcvHdrTail0_offset	0x00200000UL	qib_7220_regs.h
1214	QIB_7220_RcvHdrHead0_offset	0x00200008UL	qib_7220_regs.h
1215	QIB_7220_RcvEgrIndexTail0_offse	0x00200010UL	qib_7220_regs.h
1216	QIB_7220_RcvEgrIndexHead0_offse	0x00200018UL	qib_7220_regs.h
1217	QIB_7220_MEM_200020_offset	0x00200020UL	qib_7220_regs.h
1218	QIB_7220_RcvHdrTail1_offset	0x00210000UL	qib_7220_regs.h
1219	QIB_7220_RcvHdrHead1_offset	0x00210008UL	qib_7220_regs.h
1220	QIB_7220_RcvEgrIndexTail1_offse	0x00210010UL	qib_7220_regs.h
1221	QIB_7220_RcvEgrIndexHead1_offse	0x00210018UL	qib_7220_regs.h
1222	QIB_7220_MEM_210020_offset	0x00210020UL	qib_7220_regs.h
1223	QIB_7220_RcvHdrTail2_offset	0x00220000UL	qib_7220_regs.h
1224	QIB_7220_RcvHdrHead2_offset	0x00220008UL	qib_7220_regs.h
1225	QIB_7220_RcvEgrIndexTail2_offse	0x00220010UL	qib_7220_regs.h
1226	QIB_7220_RcvEgrIndexHead2_offse	0x00220018UL	qib_7220_regs.h
1227	QIB_7220_MEM_220020_offset	0x00220020UL	qib_7220_regs.h
1228	QIB_7220_RcvHdrTail3_offset	0x00230000UL	qib_7220_regs.h
1229	QIB_7220_RcvHdrHead3_offset	0x00230008UL	qib_7220_regs.h
1230	QIB_7220_RcvEgrIndexTail3_offse	0x00230010UL	qib_7220_regs.h
1231	QIB_7220_RcvEgrIndexHead3_offse	0x00230018UL	qib_7220_regs.h
1232	QIB_7220_MEM_230020_offset	0x00230020UL	qib_7220_regs.h
1233	QIB_7220_RcvHdrTail4_offset	0x00240000UL	qib_7220_regs.h
1234	QIB_7220_RcvHdrHead4_offset	0x00240008UL	qib_7220_regs.h
1235	QIB_7220_RcvEgrIndexTail4_offse	0x00240010UL	qib_7220_regs.h
1236	QIB_7220_RcvEgrIndexHead4_offse	0x00240018UL	qib_7220_regs.h
1237	QIB_7220_MEM_240020_offset	0x00240020UL	qib_7220_regs.h
1238	QIB_7220_RcvHdrTail5_offset	0x00250000UL	qib_7220_regs.h
1239	QIB_7220_RcvHdrHead5_offset	0x00250008UL	qib_7220_regs.h
1240	QIB_7220_RcvEgrIndexTail5_offse	0x00250010UL	qib_7220_regs.h
1241	QIB_7220_RcvEgrIndexHead5_offse	0x00250018UL	qib_7220_regs.h
1242	QIB_7220_MEM_250020_offset	0x00250020UL	qib_7220_regs.h
1243	QIB_7220_RcvHdrTail6_offset	0x00260000UL	qib_7220_regs.h
1244	QIB_7220_RcvHdrHead6_offset	0x00260008UL	qib_7220_regs.h
1245	QIB_7220_RcvEgrIndexTail6_offse	0x00260010UL	qib_7220_regs.h
1246	QIB_7220_RcvEgrIndexHead6_offse	0x00260018UL	qib_7220_regs.h
1247	QIB_7220_MEM_260020_offset	0x00260020UL	qib_7220_regs.h
1248	QIB_7220_RcvHdrTail7_offset	0x00270000UL	qib_7220_regs.h
1249	QIB_7220_RcvHdrHead7_offset	0x00270008UL	qib_7220_regs.h
1250	QIB_7220_RcvEgrIndexTail7_offse	0x00270010UL	qib_7220_regs.h
1251	QIB_7220_RcvEgrIndexHead7_offse	0x00270018UL	qib_7220_regs.h
1252	QIB_7220_MEM_270020_offset	0x00270020UL	qib_7220_regs.h
1253	QIB_7220_RcvHdrTail8_offset	0x00280000UL	qib_7220_regs.h
1254	QIB_7220_RcvHdrHead8_offset	0x00280008UL	qib_7220_regs.h
1255	QIB_7220_RcvEgrIndexTail8_offse	0x00280010UL	qib_7220_regs.h
1256	QIB_7220_RcvEgrIndexHead8_offse	0x00280018UL	qib_7220_regs.h
1257	QIB_7220_MEM_280020_offset	0x00280020UL	qib_7220_regs.h
1258	QIB_7220_RcvHdrTail9_offset	0x00290000UL	qib_7220_regs.h
1259	QIB_7220_RcvHdrHead9_offset	0x00290008UL	qib_7220_regs.h
1260	QIB_7220_RcvEgrIndexTail9_offse	0x00290010UL	qib_7220_regs.h
1261	QIB_7220_RcvEgrIndexHead9_offse	0x00290018UL	qib_7220_regs.h
1262	QIB_7220_MEM_290020_offset	0x00290020UL	qib_7220_regs.h
1263	QIB_7220_RcvHdrTail10_offset	0x002a0000UL	qib_7220_regs.h
1264	QIB_7220_RcvHdrHead10_offset	0x002a0008UL	qib_7220_regs.h
1265	QIB_7220_RcvEgrIndexTail10_offs	0x002a0010UL	qib_7220_regs.h
1266	QIB_7220_RcvEgrIndexHead10_offs	0x002a0018UL	qib_7220_regs.h
1267	QIB_7220_MEM_2A0020_offset	0x002a0020UL	qib_7220_regs.h
1268	QIB_7220_RcvHdrTail11_offset	0x002b0000UL	qib_7220_regs.h
1269	QIB_7220_RcvHdrHead11_offset	0x002b0008UL	qib_7220_regs.h
1270	QIB_7220_RcvEgrIndexTail11_offs	0x002b0010UL	qib_7220_regs.h
1271	QIB_7220_RcvEgrIndexHead11_offs	0x002b0018UL	qib_7220_regs.h
1272	QIB_7220_MEM_2B0020_offset	0x002b0020UL	qib_7220_regs.h
1273	QIB_7220_RcvHdrTail12_offset	0x002c0000UL	qib_7220_regs.h
1274	QIB_7220_RcvHdrHead12_offset	0x002c0008UL	qib_7220_regs.h
1275	QIB_7220_RcvEgrIndexTail12_offs	0x002c0010UL	qib_7220_regs.h
1276	QIB_7220_RcvEgrIndexHead12_offs	0x002c0018UL	qib_7220_regs.h
1277	QIB_7220_MEM_2C0020_offset	0x002c0020UL	qib_7220_regs.h
1278	QIB_7220_RcvHdrTail13_offset	0x002d0000UL	qib_7220_regs.h
1279	QIB_7220_RcvHdrHead13_offset	0x002d0008UL	qib_7220_regs.h
1280	QIB_7220_RcvEgrIndexTail13_offs	0x002d0010UL	qib_7220_regs.h
1281	QIB_7220_RcvEgrIndexHead13_offs	0x002d0018UL	qib_7220_regs.h
1282	QIB_7220_MEM_2D0020_offset	0x002d0020UL	qib_7220_regs.h
1283	QIB_7220_RcvHdrTail14_offset	0x002e0000UL	qib_7220_regs.h
1284	QIB_7220_RcvHdrHead14_offset	0x002e0008UL	qib_7220_regs.h
1285	QIB_7220_RcvEgrIndexTail14_offs	0x002e0010UL	qib_7220_regs.h
1286	QIB_7220_RcvEgrIndexHead14_offs	0x002e0018UL	qib_7220_regs.h
1287	QIB_7220_MEM_2E0020_offset	0x002e0020UL	qib_7220_regs.h
1288	QIB_7220_RcvHdrTail15_offset	0x002f0000UL	qib_7220_regs.h
1289	QIB_7220_RcvHdrHead15_offset	0x002f0008UL	qib_7220_regs.h
1290	QIB_7220_RcvEgrIndexTail15_offs	0x002f0010UL	qib_7220_regs.h
1291	QIB_7220_RcvEgrIndexHead15_offs	0x002f0018UL	qib_7220_regs.h
1292	QIB_7220_MEM_2F0020_offset	0x002f0020UL	qib_7220_regs.h
1293	QIB_7220_RcvHdrTail16_offset	0x00300000UL	qib_7220_regs.h
1294	QIB_7220_RcvHdrHead16_offset	0x00300008UL	qib_7220_regs.h
1295	QIB_7220_RcvEgrIndexTail16_offs	0x00300010UL	qib_7220_regs.h
1296	QIB_7220_RcvEgrIndexHead16_offs	0x00300018UL	qib_7220_regs.h
1297	QIB_7220_MEM_300020_offset	0x00300020UL	qib_7220_regs.h
1298	HZ	100	3c515.c
1299	CORKSCREW	1	3c515.c
1300	AUTOMEDIA	1	3c515.c
1301	TX_RING_SIZE	16	3c515.c
1302	RX_RING_SIZE	16	3c515.c
1303	PKT_BUF_SZ	1536	3c515.c	Size of each temporary Rx buffer.
1304	DRIVER_DEBUG	1	3c515.c
1305	CORKSCREW_ID	10	3c515.c
1306	EL3_CMD	0x0e	3c515.c
1307	EL3_STATUS	0x0e	3c515.c
1308	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c515.c
1309	XCVR_MAGIC	(0x5A00)	3c90x.c
1310	XMIT_RETRIES	250	3c90x.c
1311	INT_INTERRUPTLATCH	(1<<0)	3c90x.c
1312	INT_HOSTERROR	(1<<1)	3c90x.c
1313	INT_TXCOMPLETE	(1<<2)	3c90x.c
1314	INT_RXCOMPLETE	(1<<4)	3c90x.c
1315	INT_RXEARLY	(1<<5)	3c90x.c
1316	INT_INTREQUESTED	(1<<6)	3c90x.c
1317	INT_UPDATESTATS	(1<<7)	3c90x.c
1318	INT_LINKEVENT	(1<<8)	3c90x.c
1319	INT_DNCOMPLETE	(1<<9)	3c90x.c
1320	INT_UPCOMPLETE	(1<<10)	3c90x.c
1321	INT_CMDINPROGRESS	(1<<12)	3c90x.c
1322	INT_WINDOWNUMBER	(7<<13)	3c90x.c
1323	NUM_TX_SLOTS	2	amd8111e.c
1324	NUM_RX_SLOTS	4	amd8111e.c
1325	TX_SLOTS_MASK	1	amd8111e.c
1326	RX_SLOTS_MASK	3	amd8111e.c
1327	TX_BUF_LEN	1536	amd8111e.c
1328	RX_BUF_LEN	1536	amd8111e.c
1329	TX_PKT_LEN_MAX	(ETH_FRAME_LEN - ETH_HLEN)	amd8111e.c
1330	RX_PKT_LEN_MIN	60	amd8111e.c
1331	RX_PKT_LEN_MAX	ETH_FRAME_LEN	amd8111e.c
1332	TX_TIMEOUT	3000	amd8111e.c
1333	TX_PROCESS_TIME	10	amd8111e.c
1334	TX_RETRY	(TX_TIMEOUT / TX_PROCESS_TIME)	amd8111e.c
1335	PHY_RW_RETRY	10	amd8111e.c
1336	EBUSY	1	bnx2.c
1337	ENODEV	2	bnx2.c
1338	EINVAL	3	bnx2.c
1339	ENOMEM	4	bnx2.c
1340	EIO	5	bnx2.c
1341	ETHTOOL_ALL_FIBRE_SPEED	(ADVERTISED_1000baseT_Full)	bnx2.c
1342	ETHTOOL_ALL_COPPER_SPEED	(ADVERTISED_10baseT_Half \| ADVERTISED_10baseT_Full \| \ ADVERTISED_100baseT_Half \| ADVERTISED_100baseT_Full \| \ ADVERTISED_1	bnx2.c
1343	PHY_ALL_10_100_SPEED	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL \| ADVERTISE_CSMA)	bnx2.c
1344	PHY_ALL_1000_SPEED	(ADVERTISE_1000HALF \| ADVERTISE_1000FULL)	bnx2.c
1345	TX_TIME_OUT	2*TICKS_PER_SEC	davicom.c
1346	EEPROM_ADDRLEN	6	davicom.c
1347	EEPROM_SIZE	32	davicom.c	1 << EEPROM_ADDRLEN
1348	EE_WRITE_CMD	(5 << addr_len)	davicom.c
1349	EE_READ_CMD	(6 << addr_len)	davicom.c
1350	EE_ERASE_CMD	(7 << addr_len)	davicom.c
1351	EE_SHIFT_CLK	0x02	davicom.c	EEPROM shift clock.
1352	EE_CS	0x01	davicom.c	EEPROM chip select.
1353	EE_DATA_WRITE	0x04	davicom.c	EEPROM chip data in.
1354	EE_WRITE_0	0x01	davicom.c
1355	EE_WRITE_1	0x05	davicom.c
1356	EE_DATA_READ	0x08	davicom.c	EEPROM chip data out.
1357	EE_ENB	(0x4800 \| EE_CS)	davicom.c
1358	PHY_DATA_0	0x0	davicom.c
1359	PHY_DATA_1	0x20000	davicom.c
1360	MDCLKH	0x10000	davicom.c
1361	BUFLEN	1536	davicom.c
1362	NTXD	2	davicom.c
1363	NRXD	4	davicom.c
1364	txd	davicom_bufs.txd	davicom.c
1365	txb	davicom_bufs.txb	davicom.c
1366	rxd	davicom_bufs.rxd	davicom.c
1367	rxb	davicom_bufs.rxb	davicom.c
1368	DEPCA_NICSR	0x00	depca.c	Network interface CSR
1369	DEPCA_RBI	0x02	depca.c	RAM buffer index (2k buffer mode)
1370	DEPCA_DATA	0x04	depca.c	LANCE registers' data port
1371	DEPCA_ADDR	0x06	depca.c	LANCE registers' address port
1372	DEPCA_HBASE	0x08	depca.c	EISA high memory base address reg.
1373	DEPCA_PROM	0x0c	depca.c	Ethernet address ROM data port
1374	DEPCA_CNFG	0x0c	depca.c	EISA Configuration port
1375	DEPCA_RBSA	0x0e	depca.c	RAM buffer starting address (2k buff.)
1376	CSR0	0	depca.c
1377	CSR1	1	depca.c
1378	CSR2	2	depca.c
1379	CSR3	3	depca.c
1380	TO	0x0100	depca.c	Time Out for remote boot
1381	SHE	0x0080	depca.c	SHadow memory Enable
1382	BS	0x0040	depca.c	Bank Select
1383	BUF	0x0020	depca.c	BUFfer size (1->32k, 0->64k)
1384	RBE	0x0010	depca.c	Remote Boot Enable (1->net boot)
1385	AAC	0x0008	depca.c	Address ROM Address Counter (1->enable)
1386	_128KB	0x0008	depca.c	128kB Network RAM (1->enable)
1387	IM	0x0004	depca.c	Interrupt Mask (1->mask)
1388	IEN	0x0002	depca.c	Interrupt tristate ENable (1->enable)
1389	LED	0x0001	depca.c	LED control
1390	ERR	0x8000	depca.c	Error summary
1391	BABL	0x4000	depca.c	Babble transmitter timeout error
1392	CERR	0x2000	depca.c	Collision Error
1393	MISS	0x1000	depca.c	Missed packet
1394	MERR	0x0800	depca.c	Memory Error
1395	RINT	0x0400	depca.c	Receiver Interrupt
1396	TINT	0x0200	depca.c	Transmit Interrupt
1397	IDON	0x0100	depca.c	Initialization Done
1398	INTR	0x0080	depca.c	Interrupt Flag
1399	INEA	0x0040	depca.c	Interrupt Enable
1400	RXON	0x0020	depca.c	Receiver on
1401	TXON	0x0010	depca.c	Transmitter on
1402	TDMD	0x0008	depca.c	Transmit Demand
1403	STOP	0x0004	depca.c	Stop
1404	STRT	0x0002	depca.c	Start
1405	INIT	0x0001	depca.c	Initialize
1406	INTM	0xff00	depca.c	Interrupt Mask
1407	INTE	0xfff0	depca.c	Interrupt Enable
1408	BSWP	0x0004	depca.c	Byte SWaP
1409	ACON	0x0002	depca.c	ALE control
1410	BCON	0x0001	depca.c	Byte CONtrol
1411	PROM	0x8000	depca.c	Promiscuous Mode
1412	EMBA	0x0080	depca.c	Enable Modified Back-off Algorithm
1413	INTL	0x0040	depca.c	Internal Loopback
1414	DRTY	0x0020	depca.c	Disable Retry
1415	COLL	0x0010	depca.c	Force Collision
1416	DTCR	0x0008	depca.c	Disable Transmit CRC
1417	LOOP	0x0004	depca.c	Loopback
1418	DTX	0x0002	depca.c	Disable the Transmitter
1419	DRX	0x0001	depca.c	Disable the Receiver
1420	R_OWN	0x80000000	depca.c	Owner bit 0 = host, 1 = lance
1421	R_ERR	0x4000	depca.c	Error Summary
1422	R_FRAM	0x2000	depca.c	Framing Error
1423	R_OFLO	0x1000	depca.c	Overflow Error
1424	R_CRC	0x0800	depca.c	CRC Error
1425	R_BUFF	0x0400	depca.c	Buffer Error
1426	R_STP	0x0200	depca.c	Start of Packet
1427	R_ENP	0x0100	depca.c	End of Packet
1428	T_OWN	0x80000000	depca.c	Owner bit 0 = host, 1 = lance
1429	T_ERR	0x4000	depca.c	Error Summary
1430	T_ADD_FCS	0x2000	depca.c	More the 1 retry needed to Xmit
1431	T_MORE	0x1000	depca.c	>1 retry to transmit packet
1432	T_ONE	0x0800	depca.c	1 try needed to transmit the packet
1433	T_DEF	0x0400	depca.c	Deferred
1434	T_STP	0x02000000	depca.c	Start of Packet
1435	T_ENP	0x01000000	depca.c	End of Packet
1436	T_FLAGS	0xff000000	depca.c	TX Flags Field
1437	TMD3_BUFF	0x8000	depca.c	BUFFer error
1438	TMD3_UFLO	0x4000	depca.c	UnderFLOw error
1439	TMD3_RES	0x2000	depca.c	REServed
1440	TMD3_LCOL	0x1000	depca.c	Late COLlision
1441	TMD3_LCAR	0x0800	depca.c	Loss of CARrier
1442	TMD3_RTRY	0x0400	depca.c	ReTRY error
1443	PROBE_LENGTH	32	depca.c
1444	NUM_RX_DESC	2	depca.c	Number of RX descriptors
1445	NUM_TX_DESC	2	depca.c	Number of TX descriptors
1446	RX_BUFF_SZ	1536	depca.c	Buffer size for each Rx buffer
1447	TX_BUFF_SZ	1536	depca.c	Buffer size for each Tx buffer
1448	DEPCA_MODEL	DEPCA	depca.c
1449	DEPCA_RAM_BASE	0xd0000	depca.c
1450	ALIGN4	((u32)4 - 1)	depca.c	1 longword align
1451	ALIGN8	((u32)8 - 1)	depca.c	2 longword (quadword) align
1452	ALIGN	ALIGN8	depca.c	Keep the LANCE happy...
1453	LA_MASK	0x0000ffff	depca.c	LANCE address mask for mapping network RAM
1454	PCI_DM9132_ID	0x91321282	dmfe.c	Davicom DM9132 ID
1455	PCI_DM9102_ID	0x91021282	dmfe.c	Davicom DM9102 ID
1456	PCI_DM9100_ID	0x91001282	dmfe.c	Davicom DM9100 ID
1457	PCI_DM9009_ID	0x90091282	dmfe.c	Davicom DM9009 ID
1458	DM9102_IO_SIZE	0x80	dmfe.c
1459	DM9102A_IO_SIZE	0x100	dmfe.c
1460	TX_MAX_SEND_CNT	0x1	dmfe.c	Maximum tx packet per time
1461	TX_DESC_CNT	0x10	dmfe.c	Allocated Tx descriptors
1462	RX_DESC_CNT	0x20	dmfe.c	Allocated Rx descriptors
1463	TX_FREE_DESC_CNT	(TX_DESC_CNT - 2)	dmfe.c	Max TX packet count
1464	TX_WAKE_DESC_CNT	(TX_DESC_CNT - 3)	dmfe.c	TX wakeup count
1465	DESC_ALL_CNT	(TX_DESC_CNT + RX_DESC_CNT)	dmfe.c
1466	TX_BUF_ALLOC	0x600	dmfe.c
1467	RX_ALLOC_SIZE	0x620	dmfe.c
1468	DM910X_RESET	1	dmfe.c
1469	CR0_DEFAULT	0x00E00000	dmfe.c	TX & RX burst mode
1470	CR6_DEFAULT	0x00080000	dmfe.c	HD
1471	CR7_DEFAULT	0x180c1	dmfe.c
1472	CR15_DEFAULT	0x06	dmfe.c	TxJabber RxWatchdog
1473	TDES0_ERR_MASK	0x4302	dmfe.c	TXJT, LC, EC, FUE
1474	MAX_PACKET_SIZE	1514	dmfe.c
1475	DMFE_MAX_MULTICAST	14	dmfe.c
1476	RX_COPY_SIZE	100	dmfe.c
1477	MAX_CHECK_PACKET	0x8000	dmfe.c
1478	DM9801_NOISE_FLOOR	8	dmfe.c
1479	DM9802_NOISE_FLOOR	5	dmfe.c
1480	DMFE_10MHF	0	dmfe.c
1481	DMFE_100MHF	1	dmfe.c
1482	DMFE_10MFD	4	dmfe.c
1483	DMFE_100MFD	5	dmfe.c
1484	DMFE_AUTO	8	dmfe.c
1485	DMFE_1M_HPNA	0x10	dmfe.c
1486	DMFE_TXTH_72	0x400000	dmfe.c	TX TH 72 byte
1487	DMFE_TXTH_96	0x404000	dmfe.c	TX TH 96 byte
1488	DMFE_TXTH_128	0x0000	dmfe.c	TX TH 128 byte
1489	DMFE_TXTH_256	0x4000	dmfe.c	TX TH 256 byte
1490	DMFE_TXTH_512	0x8000	dmfe.c	TX TH 512 byte
1491	DMFE_TXTH_1K	0xC000	dmfe.c	TX TH 1K byte
1492	DMFE_TIMER_WUT	(jiffies + HZ * 1)	dmfe.c	timer wakeup time : 1 second
1493	DMFE_TX_TIMEOUT	((3*HZ)/2)	dmfe.c	tx packet time-out time 1.5 s"
1494	DMFE_TX_KICK	(HZ/2)	dmfe.c	tx packet Kick-out time 0.5 s"
1495	CR9_SROM_READ	0x4800	dmfe.c
1496	CR9_SRCS	0x1	dmfe.c
1497	CR9_SRCLK	0x2	dmfe.c
1498	CR9_CRDOUT	0x8	dmfe.c
1499	SROM_DATA_0	0x0	dmfe.c
1500	SROM_DATA_1	0x4	dmfe.c
1501	PHY_DATA_1	0x20000	dmfe.c
1502	PHY_DATA_0	0x00000	dmfe.c
1503	MDCLKH	0x10000	dmfe.c
1504	PHY_POWER_DOWN	0x800	dmfe.c
1505	SROM_V41_CODE	0x14	dmfe.c
1506	DEVICE	net_device	dmfe.c
1507	txd	dmfe_bufs.txd	dmfe.c
1508	txb	dmfe_bufs.txb	dmfe.c
1509	rxd	dmfe_bufs.rxd	dmfe.c
1510	rxb	dmfe_bufs.rxb	dmfe.c
1511	board_found	1	dmfe.c
1512	valid_link	0	dmfe.c
1513	LAN595	0	eepro.c
1514	LAN595TX	1	eepro.c
1515	LAN595FX	2	eepro.c
1516	LAN595FX_10ISA	3	eepro.c
1517	SLOW_DOWN	inb(0x80);	eepro.c
1518	SA_ADDR0	0x00	eepro.c	Etherexpress Pro/10
1519	SA_ADDR1	0xaa	eepro.c
1520	SA_ADDR2	0x00	eepro.c
1521	ee_PnP	0	eepro.c	Plug 'n Play enable bit
1522	ee_Word1	1	eepro.c	Word 1?
1523	ee_BusWidth	2	eepro.c	8/16 bit
1524	ee_FlashAddr	3	eepro.c	Flash Address
1525	ee_FlashMask	0x7	eepro.c	Mask
1526	ee_AutoIO	6	eepro.c
1527	ee_reserved0	7	eepro.c	=0!
1528	ee_Flash	8	eepro.c	Flash there?
1529	ee_AutoNeg	9	eepro.c	Auto Negotiation enabled?
1530	ee_IO0	10	eepro.c	IO Address LSB
1531	ee_IO0Mask	0x	eepro.c	...
1532	ee_IO1	15	eepro.c	IO MSB
1533	ee_IntSel	0	eepro.c	Interrupt
1534	ee_IntMask	0x7	eepro.c
1535	ee_LI	3	eepro.c	Link Integrity 0= enabled
1536	ee_PC	4	eepro.c	Polarity Correction 0= enabled
1537	ee_TPE_AUI	5	eepro.c	PortSelection 1=TPE
1538	ee_Jabber	6	eepro.c	Jabber prevention 0= enabled
1539	ee_AutoPort	7	eepro.c	Auto Port Selection 1= Disabled
1540	ee_SMOUT	8	eepro.c	SMout Pin Control 0= Input
1541	ee_PROM	9	eepro.c	Flash EPROM / PROM 0=Flash
1542	ee_reserved1	10	eepro.c	.. 12 =0!
1543	ee_AltReady	13	eepro.c	Alternate Ready, 0=normal
1544	ee_reserved2	14	eepro.c	=0!
1545	ee_Duplex	15	eepro.c
1546	ee_IA5	0	eepro.c	bit start for individual Addr Byte 5
1547	ee_IA4	8	eepro.c	bit start for individual Addr Byte 5
1548	ee_IA3	0	eepro.c	bit start for individual Addr Byte 5
1549	ee_IA2	8	eepro.c	bit start for individual Addr Byte 5
1550	ee_IA1	0	eepro.c	bit start for individual Addr Byte 5
1551	ee_IA0	8	eepro.c	bit start for individual Addr Byte 5
1552	ee_BNC_TPE	0	eepro.c	0=TPE
1553	ee_BootType	1	eepro.c	00=None, 01=IPX, 10=ODI, 11=NDIS
1554	ee_BootTypeMask	0x3	eepro.c
1555	ee_NumConn	3	eepro.c	Number of Connections 0= One or Two
1556	ee_FlashSock	4	eepro.c	Presence of Flash Socket 0= Present
1557	ee_PortTPE	5	eepro.c
1558	ee_PortBNC	6	eepro.c
1559	ee_PortAUI	7	eepro.c
1560	ee_PowerMgt	10	eepro.c	0= disabled
1561	ee_CP	13	eepro.c	Concurrent Processing
1562	ee_CPMask	0x7	eepro.c
1563	ee_Stepping	0	eepro.c	Stepping info
1564	ee_StepMask	0x0F	eepro.c
1565	ee_BoardID	4	eepro.c	Manucaturer Board ID, reserved
1566	ee_BoardMask	0x0FFF	eepro.c
1567	ee_INT_TO_IRQ	0	eepro.c	int to IRQ Mapping = 0x1EB8 for Pro/10+
1568	ee_FX_INT2IRQ	0x1EB8	eepro.c	the _only_ mapping allowed for FX chips
1569	ee_SIZE	0x40	eepro.c	total EEprom Size
1570	ee_Checksum	0xBABA	eepro.c	initial and final value for adding checksum
1571	ee_addr_vendor	0x10	eepro.c	Word offset for EISA Vendor ID
1572	ee_addr_id	0x11	eepro.c	Word offset for Card ID
1573	ee_addr_SN	0x12	eepro.c	Serial Number
1574	ee_addr_CRC_8	0x14	eepro.c	CRC over last thee Bytes
1575	ee_vendor_intel0	0x25	eepro.c	Vendor ID Intel
1576	ee_vendor_intel1	0xD4	eepro.c
1577	ee_id_eepro10p0	0x10	eepro.c	ID for eepro/10+
1578	ee_id_eepro10p1	0x31	eepro.c
1579	RAM_SIZE	0x8000	eepro.c
1580	RCV_HEADER	8	eepro.c
1581	RCV_DEFAULT_RAM	0x6000	eepro.c
1582	RCV_RAM	rcv_ram	eepro.c
1583	XMT_HEADER	8	eepro.c
1584	XMT_RAM	(RAM_SIZE - RCV_RAM)	eepro.c
1585	XMT_START	((rcv_start + RCV_RAM) % RAM_SIZE)	eepro.c
1586	RCV_LOWER_LIMIT	(rcv_start >> 8)	eepro.c
1587	RCV_UPPER_LIMIT	(((rcv_start + RCV_RAM) - 2) >> 8)	eepro.c
1588	XMT_LOWER_LIMIT	(XMT_START >> 8)	eepro.c
1589	XMT_UPPER_LIMIT	(((XMT_START + XMT_RAM) - 2) >> 8)	eepro.c
1590	RCV_START_PRO	0x00	eepro.c
1591	RCV_START_10	XMT_RAM	eepro.c
1592	RCV_DONE	0x0008	eepro.c
1593	RX_OK	0x2000	eepro.c
1594	RX_ERROR	0x0d81	eepro.c
1595	TX_DONE_BIT	0x0080	eepro.c
1596	CHAIN_BIT	0x8000	eepro.c
1597	XMT_STATUS	0x02	eepro.c
1598	XMT_CHAIN	0x04	eepro.c
1599	XMT_COUNT	0x06	eepro.c
1600	BANK0_SELECT	0x00	eepro.c
1601	BANK1_SELECT	0x40	eepro.c
1602	BANK2_SELECT	0x80	eepro.c
1603	COMMAND_REG	0x00	eepro.c	Register 0
1604	MC_SETUP	0x03	eepro.c
1605	XMT_CMD	0x04	eepro.c
1606	DIAGNOSE_CMD	0x07	eepro.c
1607	RCV_ENABLE_CMD	0x08	eepro.c
1608	RCV_DISABLE_CMD	0x0a	eepro.c
1609	STOP_RCV_CMD	0x0b	eepro.c
1610	RESET_CMD	0x0e	eepro.c
1611	POWER_DOWN_CMD	0x18	eepro.c
1612	RESUME_XMT_CMD	0x1c	eepro.c
1613	SEL_RESET_CMD	0x1e	eepro.c
1614	STATUS_REG	0x01	eepro.c	Register 1
1615	RX_INT	0x02	eepro.c
1616	TX_INT	0x04	eepro.c
1617	EXEC_STATUS	0x30	eepro.c
1618	ID_REG	0x02	eepro.c	Register 2
1619	R_ROBIN_BITS	0xc0	eepro.c	round robin counter
1620	ID_REG_MASK	0x2c	eepro.c
1621	ID_REG_SIG	0x24	eepro.c
1622	AUTO_ENABLE	0x10	eepro.c
1623	INT_MASK_REG	0x03	eepro.c	Register 3
1624	RX_STOP_MASK	0x01	eepro.c
1625	RX_MASK	0x02	eepro.c
1626	TX_MASK	0x04	eepro.c
1627	EXEC_MASK	0x08	eepro.c
1628	ALL_MASK	0x0f	eepro.c
1629	IO_32_BIT	0x10	eepro.c
1630	RCV_BAR	0x04	eepro.c	The following are word (16-bit) registers
1631	RCV_STOP	0x06	eepro.c
1632	XMT_BAR_PRO	0x0a	eepro.c
1633	XMT_BAR_10	0x0b	eepro.c
1634	HOST_ADDRESS_REG	0x0c	eepro.c
1635	IO_PORT	0x0e	eepro.c
1636	IO_PORT_32_BIT	0x0c	eepro.c
1637	REG1	0x01	eepro.c
1638	WORD_WIDTH	0x02	eepro.c
1639	INT_ENABLE	0x80	eepro.c
1640	INT_NO_REG	0x02	eepro.c
1641	RCV_LOWER_LIMIT_REG	0x08	eepro.c
1642	RCV_UPPER_LIMIT_REG	0x09	eepro.c
1643	XMT_LOWER_LIMIT_REG_PRO	0x0a	eepro.c
1644	XMT_UPPER_LIMIT_REG_PRO	0x0b	eepro.c
1645	XMT_LOWER_LIMIT_REG_10	0x0b	eepro.c
1646	XMT_UPPER_LIMIT_REG_10	0x0a	eepro.c
1647	XMT_Chain_Int	0x20	eepro.c	Interrupt at the end of the transmit chain
1648	XMT_Chain_ErrStop	0x40	eepro.c	Interrupt at the end of the chain even if there are errors
1649	RCV_Discard_BadFrame	0x80	eepro.c	Throw bad frames away, and continue to receive others
1650	REG2	0x02	eepro.c
1651	PRMSC_Mode	0x01	eepro.c
1652	Multi_IA	0x20	eepro.c
1653	REG3	0x03	eepro.c
1654	TPE_BIT	0x04	eepro.c
1655	BNC_BIT	0x20	eepro.c
1656	REG13	0x0d	eepro.c
1657	FDX	0x00	eepro.c
1658	A_N_ENABLE	0x02	eepro.c
1659	I_ADD_REG0	0x04	eepro.c
1660	I_ADD_REG1	0x05	eepro.c
1661	I_ADD_REG2	0x06	eepro.c
1662	I_ADD_REG3	0x07	eepro.c
1663	I_ADD_REG4	0x08	eepro.c
1664	I_ADD_REG5	0x09	eepro.c
1665	EEPROM_REG_PRO	0x0a	eepro.c
1666	EEPROM_REG_10	0x0b	eepro.c
1667	EESK	0x01	eepro.c
1668	EECS	0x02	eepro.c
1669	EEDI	0x04	eepro.c
1670	EEDO	0x08	eepro.c
1671	EE_READ_CMD	(6 << 6)	eepro.c
1672	EE_SHIFT_CLK	0x01	eepro100.c	EEPROM shift clock.
1673	EE_CS	0x02	eepro100.c	EEPROM chip select.
1674	EE_DATA_WRITE	0x04	eepro100.c	EEPROM chip data in.
1675	EE_DATA_READ	0x08	eepro100.c	EEPROM chip data out.
1676	EE_WRITE_0	0x4802	eepro100.c
1677	EE_WRITE_1	0x4806	eepro100.c
1678	EE_ENB	(0x4800 \| EE_CS)	eepro100.c
1679	EE_READ_CMD	6	eepro100.c
1680	CU_START	0x0010	eepro100.c
1681	CU_RESUME	0x0020	eepro100.c
1682	CU_STATSADDR	0x0040	eepro100.c
1683	CU_SHOWSTATS	0x0050	eepro100.c	Dump statistics counters.
1684	CU_CMD_BASE	0x0060	eepro100.c	Base address to add to add CU commands.
1685	CU_DUMPSTATS	0x0070	eepro100.c	Dump then reset stats counters.
1686	RX_START	0x0001	eepro100.c
1687	RX_RESUME	0x0002	eepro100.c
1688	RX_ABORT	0x0004	eepro100.c
1689	RX_ADDR_LOAD	0x0006	eepro100.c
1690	RX_RESUMENR	0x0007	eepro100.c
1691	INT_MASK	0x0100	eepro100.c
1692	DRVR_INT	0x0200	eepro100.c	Driver generated interrupt.
1693	RXFD_COUNT	4	eepro100.c
1694	rxfds	eepro100_bufs.rxfds	eepro100.c
1695	TX_RING_SIZE	2	epic100.c	use at least 2 buffers for TX
1696	RX_RING_SIZE	2	epic100.c
1697	PKT_BUF_SZ	1536	epic100.c	Size of each temporary Tx/Rx buffer.
1698	EPIC_DEBUG	0	epic100.c	debug level
1699	TD_STDFLAGS	TD_LASTDESC	epic100.c
1700	rx_ring	epic100_bufs.rx_ring	epic100.c
1701	tx_ring	epic100_bufs.tx_ring	epic100.c
1702	rx_packet	epic100_bufs.rx_packet	epic100.c
1703	tx_packet	epic100_bufs.tx_packet	epic100.c
1704	EE_SHIFT_CLK	0x04	epic100.c	EEPROM shift clock.
1705	EE_CS	0x02	epic100.c	EEPROM chip select.
1706	EE_DATA_WRITE	0x08	epic100.c	EEPROM chip data in.
1707	EE_WRITE_0	0x01	epic100.c
1708	EE_WRITE_1	0x09	epic100.c
1709	EE_DATA_READ	0x10	epic100.c	EEPROM chip data out.
1710	EE_ENB	(0x0001 \| EE_CS)	epic100.c
1711	EE_WRITE_CMD	(5 << 6)	epic100.c
1712	EE_READ_CMD	(6 << 6)	epic100.c
1713	EE_ERASE_CMD	(7 << 6)	epic100.c
1714	MII_READOP	1	epic100.c
1715	MII_WRITEOP	2	epic100.c
1716	FALCON_USE_IO_BAR	0	etherfabric.c
1717	HZ	100	etherfabric.c
1718	EFAB_BYTE	1	etherfabric.c
1719	MII_BMSR	0x01	etherfabric.c	Basic mode status register
1720	MII_ADVERTISE	0x04	etherfabric.c	Advertisement control register
1721	MII_LPA	0x05	etherfabric.c	Link partner ability register
1722	GMII_GTCR	0x09	etherfabric.c	1000BASE-T control register
1723	GMII_GTSR	0x0a	etherfabric.c	1000BASE-T status register
1724	GMII_PSSR	0x11	etherfabric.c	PHY-specific status register
1725	BMSR_LSTATUS	0x0004	etherfabric.c	Link status
1726	LPA_10HALF	0x0020	etherfabric.c	Can do 10mbps half-duplex
1727	LPA_10FULL	0x0040	etherfabric.c	Can do 10mbps full-duplex
1728	LPA_100HALF	0x0080	etherfabric.c	Can do 100mbps half-duplex
1729	LPA_100FULL	0x0100	etherfabric.c	Can do 100mbps full-duplex
1730	LPA_100BASE4	0x0200	etherfabric.c	Can do 100mbps 4k packets
1731	LPA_PAUSE	0x0400	etherfabric.c	Bit 10 - MAC pause
1732	LPA_1000FULL	0x00020000	etherfabric.c
1733	LPA_1000HALF	0x00010000	etherfabric.c
1734	LPA_10000FULL	0x00040000	etherfabric.c
1735	LPA_10000HALF	0x00080000	etherfabric.c
1736	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	etherfabric.c
1737	LPA_1000	( LPA_1000FULL \| LPA_1000HALF )	etherfabric.c
1738	LPA_10000	( LPA_10000FULL \| LPA_10000HALF )	etherfabric.c
1739	LPA_DUPLEX	( LPA_10FULL \| LPA_100FULL \| LPA_1000FULL \| \ LPA_10000FULL )	etherfabric.c
1740	LPA_OTHER	~( LPA_10FULL \| LPA_10HALF \| LPA_100FULL \| \ LPA_100HALF \| LPA_1000FULL \| LPA_1000HALF )	etherfabric.c
1741	PSSR_LSTATUS	0x0400	etherfabric.c	Bit 10 - link status
1742	MDIO_MMD_PMAPMD	(1)	etherfabric.c
1743	MDIO_MMD_WIS	(2)	etherfabric.c
1744	MDIO_MMD_PCS	(3)	etherfabric.c
1745	MDIO_MMD_PHYXS	(4)	etherfabric.c
1746	MDIO_MMD_DTEXS	(5)	etherfabric.c
1747	MDIO_MMD_TC	(6)	etherfabric.c
1748	MDIO_MMD_AN	(7)	etherfabric.c
1749	MDIO_MMDREG_CTRL1	(0)	etherfabric.c
1750	MDIO_MMDREG_STAT1	(1)	etherfabric.c
1751	MDIO_MMDREG_DEVS0	(5)	etherfabric.c
1752	MDIO_MMDREG_STAT2	(8)	etherfabric.c
1753	MDIO_MMDREG_CTRL1_RESET_LBN	(15)	etherfabric.c
1754	MDIO_MMDREG_CTRL1_RESET_WIDTH	(1)	etherfabric.c
1755	MDIO_MMDREG_STAT1_FAULT_LBN	(7)	etherfabric.c
1756	MDIO_MMDREG_STAT1_FAULT_WIDTH	(1)	etherfabric.c
1757	MDIO_MMDREG_STAT1_LINK_LBN	(2)	etherfabric.c
1758	MDIO_MMDREG_STAT1_LINK_WIDTH	(1)	etherfabric.c
1759	MDIO_MMDREG_DEVS0_DTEXS	DEV_PRESENT_BIT(MDIO_MMD_DTEXS)	etherfabric.c
1760	MDIO_MMDREG_DEVS0_PHYXS	DEV_PRESENT_BIT(MDIO_MMD_PHYXS)	etherfabric.c
1761	MDIO_MMDREG_DEVS0_PCS	DEV_PRESENT_BIT(MDIO_MMD_PCS)	etherfabric.c
1762	MDIO_MMDREG_DEVS0_WIS	DEV_PRESENT_BIT(MDIO_MMD_WIS)	etherfabric.c
1763	MDIO_MMDREG_DEVS0_PMAPMD	DEV_PRESENT_BIT(MDIO_MMD_PMAPMD)	etherfabric.c
1764	MDIO_MMDREG_DEVS0_AN	DEV_PRESENT_BIT(MDIO_MMD_AN)	etherfabric.c
1765	MDIO_MMDREG_STAT2_PRESENT_VAL	(2)	etherfabric.c
1766	MDIO_MMDREG_STAT2_PRESENT_LBN	(14)	etherfabric.c
1767	MDIO_MMDREG_STAT2_PRESENT_WIDTH	(2)	etherfabric.c
1768	MDIO_PHYXS_LANE_STATE	(0x18)	etherfabric.c
1769	MDIO_PHYXS_LANE_ALIGNED_LBN	(12)	etherfabric.c
1770	MDIO_PHYXS_LANE_SYNC0_LBN	(0)	etherfabric.c
1771	MDIO_PHYXS_LANE_SYNC1_LBN	(1)	etherfabric.c
1772	MDIO_PHYXS_LANE_SYNC2_LBN	(2)	etherfabric.c
1773	MDIO_PHYXS_LANE_SYNC3_LBN	(3)	etherfabric.c
1774	MDIO45_RESET_TRIES	100	etherfabric.c
1775	MDIO45_RESET_SPINTIME	10	etherfabric.c
1776	FCN_IOM_IND_ADR_REG	0x0	etherfabric.c
1777	FCN_IOM_IND_DAT_REG	0x4	etherfabric.c
1778	FCN_ADR_REGION_REG_KER	0x00	etherfabric.c
1779	FCN_ADR_REGION0_LBN	0	etherfabric.c
1780	FCN_ADR_REGION0_WIDTH	18	etherfabric.c
1781	FCN_ADR_REGION1_LBN	32	etherfabric.c
1782	FCN_ADR_REGION1_WIDTH	18	etherfabric.c
1783	FCN_ADR_REGION2_LBN	64	etherfabric.c
1784	FCN_ADR_REGION2_WIDTH	18	etherfabric.c
1785	FCN_ADR_REGION3_LBN	96	etherfabric.c
1786	FCN_ADR_REGION3_WIDTH	18	etherfabric.c
1787	FCN_INT_EN_REG_KER	0x0010	etherfabric.c
1788	FCN_MEM_PERR_INT_EN_KER_LBN	5	etherfabric.c
1789	FCN_MEM_PERR_INT_EN_KER_WIDTH	1	etherfabric.c
1790	FCN_KER_INT_CHAR_LBN	4	etherfabric.c
1791	FCN_KER_INT_CHAR_WIDTH	1	etherfabric.c
1792	FCN_KER_INT_KER_LBN	3	etherfabric.c
1793	FCN_KER_INT_KER_WIDTH	1	etherfabric.c
1794	FCN_ILL_ADR_ERR_INT_EN_KER_LBN	2	etherfabric.c
1795	FCN_ILL_ADR_ERR_INT_EN_KER_WIDT	1	etherfabric.c
1796	FCN_SRM_PERR_INT_EN_KER_LBN	1	etherfabric.c
1797	FCN_SRM_PERR_INT_EN_KER_WIDTH	1	etherfabric.c
1798	FCN_DRV_INT_EN_KER_LBN	0	etherfabric.c
1799	FCN_DRV_INT_EN_KER_WIDTH	1	etherfabric.c
1800	FCN_INT_ADR_REG_KER	0x0030	etherfabric.c
1801	FCN_INT_ADR_KER_LBN	0	etherfabric.c
1802	FCN_INT_ADR_KER_WIDTH	EFAB_DMA_TYPE_WIDTH ( 64 )	etherfabric.c
1803	INT_ISR0_B0	0x90	etherfabric.c
1804	INT_ISR1_B0	0xA0	etherfabric.c
1805	FCN_INT_ACK_KER_REG_A1	0x0050	etherfabric.c
1806	INT_ACK_DUMMY_DATA_LBN	0	etherfabric.c
1807	INT_ACK_DUMMY_DATA_WIDTH	32	etherfabric.c
1808	WORK_AROUND_BROKEN_PCI_READS_RE	0x0070	etherfabric.c
1809	FCN_HW_INIT_REG_KER	0x00c0	etherfabric.c
1810	FCN_BCSR_TARGET_MASK_LBN	101	etherfabric.c
1811	FCN_BCSR_TARGET_MASK_WIDTH	4	etherfabric.c
1812	FCN_EE_SPI_HCMD_REG	0x0100	etherfabric.c
1813	FCN_EE_SPI_HCMD_CMD_EN_LBN	31	etherfabric.c
1814	FCN_EE_SPI_HCMD_CMD_EN_WIDTH	1	etherfabric.c
1815	FCN_EE_WR_TIMER_ACTIVE_LBN	28	etherfabric.c
1816	FCN_EE_WR_TIMER_ACTIVE_WIDTH	1	etherfabric.c
1817	FCN_EE_SPI_HCMD_SF_SEL_LBN	24	etherfabric.c
1818	FCN_EE_SPI_HCMD_SF_SEL_WIDTH	1	etherfabric.c
1819	FCN_EE_SPI_EEPROM	0	etherfabric.c
1820	FCN_EE_SPI_FLASH	1	etherfabric.c
1821	FCN_EE_SPI_HCMD_DABCNT_LBN	16	etherfabric.c
1822	FCN_EE_SPI_HCMD_DABCNT_WIDTH	5	etherfabric.c
1823	FCN_EE_SPI_HCMD_READ_LBN	15	etherfabric.c
1824	FCN_EE_SPI_HCMD_READ_WIDTH	1	etherfabric.c
1825	FCN_EE_SPI_READ	1	etherfabric.c
1826	FCN_EE_SPI_WRITE	0	etherfabric.c
1827	FCN_EE_SPI_HCMD_DUBCNT_LBN	12	etherfabric.c
1828	FCN_EE_SPI_HCMD_DUBCNT_WIDTH	2	etherfabric.c
1829	FCN_EE_SPI_HCMD_ADBCNT_LBN	8	etherfabric.c
1830	FCN_EE_SPI_HCMD_ADBCNT_WIDTH	2	etherfabric.c
1831	FCN_EE_SPI_HCMD_ENC_LBN	0	etherfabric.c
1832	FCN_EE_SPI_HCMD_ENC_WIDTH	8	etherfabric.c
1833	FCN_EE_SPI_HADR_REG	0x0110	etherfabric.c
1834	FCN_EE_SPI_HADR_DUBYTE_LBN	24	etherfabric.c
1835	FCN_EE_SPI_HADR_DUBYTE_WIDTH	8	etherfabric.c
1836	FCN_EE_SPI_HADR_ADR_LBN	0	etherfabric.c
1837	FCN_EE_SPI_HADR_ADR_WIDTH	24	etherfabric.c
1838	FCN_EE_SPI_HDATA_REG	0x0120	etherfabric.c
1839	FCN_EE_SPI_HDATA3_LBN	96	etherfabric.c
1840	FCN_EE_SPI_HDATA3_WIDTH	32	etherfabric.c
1841	FCN_EE_SPI_HDATA2_LBN	64	etherfabric.c
1842	FCN_EE_SPI_HDATA2_WIDTH	32	etherfabric.c
1843	FCN_EE_SPI_HDATA1_LBN	32	etherfabric.c
1844	FCN_EE_SPI_HDATA1_WIDTH	32	etherfabric.c
1845	FCN_EE_SPI_HDATA0_LBN	0	etherfabric.c
1846	FCN_EE_SPI_HDATA0_WIDTH	32	etherfabric.c
1847	FCN_EE_VPD_CFG_REG	0x0140	etherfabric.c
1848	FCN_EE_VPD_EN_LBN	0	etherfabric.c
1849	FCN_EE_VPD_EN_WIDTH	1	etherfabric.c
1850	FCN_EE_VPD_EN_AD9_MODE_LBN	1	etherfabric.c
1851	FCN_EE_VPD_EN_AD9_MODE_WIDTH	1	etherfabric.c
1852	FCN_EE_EE_CLOCK_DIV_LBN	112	etherfabric.c
1853	FCN_EE_EE_CLOCK_DIV_WIDTH	7	etherfabric.c
1854	FCN_EE_SF_CLOCK_DIV_LBN	120	etherfabric.c
1855	FCN_EE_SF_CLOCK_DIV_WIDTH	7	etherfabric.c
1856	FCN_NIC_STAT_REG	0x0200	etherfabric.c
1857	FCN_ONCHIP_SRAM_LBN	16	etherfabric.c
1858	FCN_ONCHIP_SRAM_WIDTH	1	etherfabric.c
1859	FCN_SF_PRST_LBN	9	etherfabric.c
1860	FCN_SF_PRST_WIDTH	1	etherfabric.c
1861	FCN_EE_PRST_LBN	8	etherfabric.c
1862	FCN_EE_PRST_WIDTH	1	etherfabric.c
1863	FCN_EE_STRAP_LBN	7	etherfabric.c
1864	FCN_EE_STRAP_WIDTH	1	etherfabric.c
1865	FCN_PCI_PCIX_MODE_LBN	4	etherfabric.c
1866	FCN_PCI_PCIX_MODE_WIDTH	3	etherfabric.c
1867	FCN_PCI_PCIX_MODE_PCI33_DECODE	0	etherfabric.c
1868	FCN_PCI_PCIX_MODE_PCI66_DECODE	1	etherfabric.c
1869	FCN_PCI_PCIX_MODE_PCIX66_DECODE	5	etherfabric.c
1870	FCN_PCI_PCIX_MODE_PCIX100_DECOD	6	etherfabric.c
1871	FCN_PCI_PCIX_MODE_PCIX133_DECOD	7	etherfabric.c
1872	FCN_STRAP_ISCSI_EN_LBN	3	etherfabric.c
1873	FCN_STRAP_ISCSI_EN_WIDTH	1	etherfabric.c
1874	FCN_STRAP_PINS_LBN	0	etherfabric.c
1875	FCN_STRAP_PINS_WIDTH	3	etherfabric.c
1876	FCN_STRAP_10G_LBN	2	etherfabric.c
1877	FCN_STRAP_10G_WIDTH	1	etherfabric.c
1878	FCN_STRAP_DUAL_PORT_LBN	1	etherfabric.c
1879	FCN_STRAP_DUAL_PORT_WIDTH	1	etherfabric.c
1880	FCN_STRAP_PCIE_LBN	0	etherfabric.c
1881	FCN_STRAP_PCIE_WIDTH	1	etherfabric.c
1882	FALCON_REV_A0	0	etherfabric.c
1883	FALCON_REV_A1	1	etherfabric.c
1884	FALCON_REV_B0	2	etherfabric.c
1885	FCN_GPIO_CTL_REG_KER	0x0210	etherfabric.c
1886	FCN_GPIO_CTL_REG_KER	0x0210	etherfabric.c
1887	FCN_GPIO3_OEN_LBN	27	etherfabric.c
1888	FCN_GPIO3_OEN_WIDTH	1	etherfabric.c
1889	FCN_GPIO2_OEN_LBN	26	etherfabric.c
1890	FCN_GPIO2_OEN_WIDTH	1	etherfabric.c
1891	FCN_GPIO1_OEN_LBN	25	etherfabric.c
1892	FCN_GPIO1_OEN_WIDTH	1	etherfabric.c
1893	FCN_GPIO0_OEN_LBN	24	etherfabric.c
1894	FCN_GPIO0_OEN_WIDTH	1	etherfabric.c
1895	FCN_GPIO3_OUT_LBN	19	etherfabric.c
1896	FCN_GPIO3_OUT_WIDTH	1	etherfabric.c
1897	FCN_GPIO2_OUT_LBN	18	etherfabric.c
1898	FCN_GPIO2_OUT_WIDTH	1	etherfabric.c
1899	FCN_GPIO1_OUT_LBN	17	etherfabric.c
1900	FCN_GPIO1_OUT_WIDTH	1	etherfabric.c
1901	FCN_GPIO0_OUT_LBN	16	etherfabric.c
1902	FCN_GPIO0_OUT_WIDTH	1	etherfabric.c
1903	FCN_GPIO3_IN_LBN	11	etherfabric.c
1904	FCN_GPIO3_IN_WIDTH	1	etherfabric.c
1905	FCN_GPIO2_IN_LBN	10	etherfabric.c
1906	FCN_GPIO2_IN_WIDTH	1	etherfabric.c
1907	FCN_GPIO1_IN_LBN	9	etherfabric.c
1908	FCN_GPIO1_IN_WIDTH	1	etherfabric.c
1909	FCN_GPIO0_IN_LBN	8	etherfabric.c
1910	FCN_GPIO0_IN_WIDTH	1	etherfabric.c
1911	FCN_FLASH_PRESENT_LBN	7	etherfabric.c
1912	FCN_FLASH_PRESENT_WIDTH	1	etherfabric.c
1913	FCN_EEPROM_PRESENT_LBN	6	etherfabric.c
1914	FCN_EEPROM_PRESENT_WIDTH	1	etherfabric.c
1915	FCN_BOOTED_USING_NVDEVICE_LBN	3	etherfabric.c
1916	FCN_BOOTED_USING_NVDEVICE_WIDTH	1	etherfabric.c
1917	FCN_NV_MAGIC_NUMBER	0xFA1C	etherfabric.c
1918	FCN_GLB_CTL_REG_KER	0x0220	etherfabric.c
1919	FCN_EXT_PHY_RST_CTL_LBN	63	etherfabric.c
1920	FCN_EXT_PHY_RST_CTL_WIDTH	1	etherfabric.c
1921	FCN_PCIE_SD_RST_CTL_LBN	61	etherfabric.c
1922	FCN_PCIE_SD_RST_CTL_WIDTH	1	etherfabric.c
1923	FCN_PCIE_STCK_RST_CTL_LBN	59	etherfabric.c
1924	FCN_PCIE_STCK_RST_CTL_WIDTH	1	etherfabric.c
1925	FCN_PCIE_NSTCK_RST_CTL_LBN	58	etherfabric.c
1926	FCN_PCIE_NSTCK_RST_CTL_WIDTH	1	etherfabric.c
1927	FCN_PCIE_CORE_RST_CTL_LBN	57	etherfabric.c
1928	FCN_PCIE_CORE_RST_CTL_WIDTH	1	etherfabric.c
1929	FCN_EE_RST_CTL_LBN	49	etherfabric.c
1930	FCN_EE_RST_CTL_WIDTH	1	etherfabric.c
1931	FCN_RST_EXT_PHY_LBN	31	etherfabric.c
1932	FCN_RST_EXT_PHY_WIDTH	1	etherfabric.c
1933	FCN_EXT_PHY_RST_DUR_LBN	1	etherfabric.c
1934	FCN_EXT_PHY_RST_DUR_WIDTH	3	etherfabric.c
1935	FCN_SWRST_LBN	0	etherfabric.c
1936	FCN_SWRST_WIDTH	1	etherfabric.c
1937	INCLUDE_IN_RESET	0	etherfabric.c
1938	EXCLUDE_FROM_RESET	1	etherfabric.c
1939	FCN_ALTERA_BUILD_REG_KER	0x0300	etherfabric.c
1940	FCN_VER_MAJOR_LBN	24	etherfabric.c
1941	FCN_VER_MAJOR_WIDTH	8	etherfabric.c
1942	FCN_VER_MINOR_LBN	16	etherfabric.c
1943	FCN_VER_MINOR_WIDTH	8	etherfabric.c
1944	FCN_VER_BUILD_LBN	0	etherfabric.c
1945	FCN_VER_BUILD_WIDTH	16	etherfabric.c
1946	FCN_VER_ALL_LBN	0	etherfabric.c
1947	FCN_VER_ALL_WIDTH	32	etherfabric.c
1948	FCN_SPARE_REG_KER	0x310	etherfabric.c
1949	FCN_MEM_PERR_EN_TX_DATA_LBN	72	etherfabric.c
1950	FCN_MEM_PERR_EN_TX_DATA_WIDTH	2	etherfabric.c
1951	FCN_TIMER_CMD_REG_KER	0x420	etherfabric.c
1952	FCN_TIMER_MODE_LBN	12	etherfabric.c
1953	FCN_TIMER_MODE_WIDTH	2	etherfabric.c
1954	FCN_TIMER_MODE_DIS	0	etherfabric.c
1955	FCN_TIMER_MODE_INT_HLDOFF	1	etherfabric.c
1956	FCN_TIMER_VAL_LBN	0	etherfabric.c
1957	FCN_TIMER_VAL_WIDTH	12	etherfabric.c
1958	FCN_RX_CFG_REG_KER	0x800	etherfabric.c
1959	FCN_RX_XOFF_EN_LBN	0	etherfabric.c
1960	FCN_RX_XOFF_EN_WIDTH	1	etherfabric.c
1961	FCN_SRM_RX_DC_CFG_REG_KER	0x610	etherfabric.c
1962	FCN_SRM_RX_DC_BASE_ADR_LBN	0	etherfabric.c
1963	FCN_SRM_RX_DC_BASE_ADR_WIDTH	21	etherfabric.c
1964	FCN_SRM_TX_DC_CFG_REG_KER	0x620	etherfabric.c
1965	FCN_SRM_TX_DC_BASE_ADR_LBN	0	etherfabric.c
1966	FCN_SRM_TX_DC_BASE_ADR_WIDTH	21	etherfabric.c
1967	FCN_SRM_CFG_REG_KER	0x630	etherfabric.c
1968	FCN_SRAM_OOB_ADR_INTEN_LBN	5	etherfabric.c
1969	FCN_SRAM_OOB_ADR_INTEN_WIDTH	1	etherfabric.c
1970	FCN_SRAM_OOB_BUF_INTEN_LBN	4	etherfabric.c
1971	FCN_SRAM_OOB_BUF_INTEN_WIDTH	1	etherfabric.c
1972	FCN_SRAM_OOB_BT_INIT_EN_LBN	3	etherfabric.c
1973	FCN_SRAM_OOB_BT_INIT_EN_WIDTH	1	etherfabric.c
1974	FCN_SRM_NUM_BANK_LBN	2	etherfabric.c
1975	FCN_SRM_NUM_BANK_WIDTH	1	etherfabric.c
1976	FCN_SRM_BANK_SIZE_LBN	0	etherfabric.c
1977	FCN_SRM_BANK_SIZE_WIDTH	2	etherfabric.c
1978	FCN_SRM_NUM_BANKS_AND_BANK_SIZE	0	etherfabric.c
1979	FCN_SRM_NUM_BANKS_AND_BANK_SIZE	3	etherfabric.c
1980	FCN_RX_CFG_REG_KER	0x800	etherfabric.c
1981	FCN_RX_INGR_EN_B0_LBN	47	etherfabric.c
1982	FCN_RX_INGR_EN_B0_WIDTH	1	etherfabric.c
1983	FCN_RX_USR_BUF_SIZE_B0_LBN	19	etherfabric.c
1984	FCN_RX_USR_BUF_SIZE_B0_WIDTH	9	etherfabric.c
1985	FCN_RX_XON_MAC_TH_B0_LBN	10	etherfabric.c
1986	FCN_RX_XON_MAC_TH_B0_WIDTH	9	etherfabric.c
1987	FCN_RX_XOFF_MAC_TH_B0_LBN	1	etherfabric.c
1988	FCN_RX_XOFF_MAC_TH_B0_WIDTH	9	etherfabric.c
1989	FCN_RX_XOFF_MAC_EN_B0_LBN	0	etherfabric.c
1990	FCN_RX_XOFF_MAC_EN_B0_WIDTH	1	etherfabric.c
1991	FCN_RX_USR_BUF_SIZE_A1_LBN	11	etherfabric.c
1992	FCN_RX_USR_BUF_SIZE_A1_WIDTH	9	etherfabric.c
1993	FCN_RX_XON_MAC_TH_A1_LBN	6	etherfabric.c
1994	FCN_RX_XON_MAC_TH_A1_WIDTH	5	etherfabric.c
1995	FCN_RX_XOFF_MAC_TH_A1_LBN	1	etherfabric.c
1996	FCN_RX_XOFF_MAC_TH_A1_WIDTH	5	etherfabric.c
1997	FCN_RX_XOFF_MAC_EN_A1_LBN	0	etherfabric.c
1998	FCN_RX_XOFF_MAC_EN_A1_WIDTH	1	etherfabric.c
1999	FCN_RX_USR_BUF_SIZE_A1_LBN	11	etherfabric.c
2000	FCN_RX_USR_BUF_SIZE_A1_WIDTH	9	etherfabric.c
2001	FCN_RX_XOFF_MAC_EN_A1_LBN	0	etherfabric.c
2002	FCN_RX_XOFF_MAC_EN_A1_WIDTH	1	etherfabric.c
2003	FCN_RX_FILTER_CTL_REG_KER	0x810	etherfabric.c
2004	FCN_UDP_FULL_SRCH_LIMIT_LBN	32	etherfabric.c
2005	FCN_UDP_FULL_SRCH_LIMIT_WIDTH	8	etherfabric.c
2006	FCN_NUM_KER_LBN	24	etherfabric.c
2007	FCN_NUM_KER_WIDTH	2	etherfabric.c
2008	FCN_UDP_WILD_SRCH_LIMIT_LBN	16	etherfabric.c
2009	FCN_UDP_WILD_SRCH_LIMIT_WIDTH	8	etherfabric.c
2010	FCN_TCP_WILD_SRCH_LIMIT_LBN	8	etherfabric.c
2011	FCN_TCP_WILD_SRCH_LIMIT_WIDTH	8	etherfabric.c
2012	FCN_TCP_FULL_SRCH_LIMIT_LBN	0	etherfabric.c
2013	FCN_TCP_FULL_SRCH_LIMIT_WIDTH	8	etherfabric.c
2014	FCN_RX_FLUSH_DESCQ_REG_KER	0x0820	etherfabric.c
2015	FCN_RX_FLUSH_DESCQ_CMD_LBN	24	etherfabric.c
2016	FCN_RX_FLUSH_DESCQ_CMD_WIDTH	1	etherfabric.c
2017	FCN_RX_FLUSH_DESCQ_LBN	0	etherfabric.c
2018	FCN_RX_FLUSH_DESCQ_WIDTH	12	etherfabric.c
2019	FCN_RX_DESC_UPD_REG_KER	0x0830	etherfabric.c
2020	FCN_RX_DESC_WPTR_LBN	96	etherfabric.c
2021	FCN_RX_DESC_WPTR_WIDTH	12	etherfabric.c
2022	FCN_RX_DESC_UPD_REG_KER_DWORD	( FCN_RX_DESC_UPD_REG_KER + 12 )	etherfabric.c
2023	FCN_RX_DESC_WPTR_DWORD_LBN	0	etherfabric.c
2024	FCN_RX_DESC_WPTR_DWORD_WIDTH	12	etherfabric.c
2025	FCN_RX_DC_CFG_REG_KER	0x840	etherfabric.c
2026	FCN_RX_DC_SIZE_LBN	0	etherfabric.c
2027	FCN_RX_DC_SIZE_WIDTH	2	etherfabric.c
2028	FCN_RX_SELF_RST_REG_KER	0x890	etherfabric.c
2029	FCN_RX_ISCSI_DIS_LBN	17	etherfabric.c
2030	FCN_RX_ISCSI_DIS_WIDTH	1	etherfabric.c
2031	FCN_RX_NODESC_WAIT_DIS_LBN	9	etherfabric.c
2032	FCN_RX_NODESC_WAIT_DIS_WIDTH	1	etherfabric.c
2033	FCN_RX_RECOVERY_EN_LBN	8	etherfabric.c
2034	FCN_RX_RECOVERY_EN_WIDTH	1	etherfabric.c
2035	FCN_TX_FLUSH_DESCQ_REG_KER	0x0a00	etherfabric.c
2036	FCN_TX_FLUSH_DESCQ_CMD_LBN	12	etherfabric.c
2037	FCN_TX_FLUSH_DESCQ_CMD_WIDTH	1	etherfabric.c
2038	FCN_TX_FLUSH_DESCQ_LBN	0	etherfabric.c
2039	FCN_TX_FLUSH_DESCQ_WIDTH	12	etherfabric.c
2040	FCN_TX_CFG2_REG_KER	0xa80	etherfabric.c
2041	FCN_TX_DIS_NON_IP_EV_LBN	17	etherfabric.c
2042	FCN_TX_DIS_NON_IP_EV_WIDTH	1	etherfabric.c
2043	FCN_TX_DESC_UPD_REG_KER	0x0a10	etherfabric.c
2044	FCN_TX_DESC_WPTR_LBN	96	etherfabric.c
2045	FCN_TX_DESC_WPTR_WIDTH	12	etherfabric.c
2046	FCN_TX_DESC_UPD_REG_KER_DWORD	( FCN_TX_DESC_UPD_REG_KER + 12 )	etherfabric.c
2047	FCN_TX_DESC_WPTR_DWORD_LBN	0	etherfabric.c
2048	FCN_TX_DESC_WPTR_DWORD_WIDTH	12	etherfabric.c
2049	FCN_TX_DC_CFG_REG_KER	0xa20	etherfabric.c
2050	FCN_TX_DC_SIZE_LBN	0	etherfabric.c
2051	FCN_TX_DC_SIZE_WIDTH	2	etherfabric.c
2052	FCN_MD_TXD_REG_KER	0xc00	etherfabric.c
2053	FCN_MD_TXD_LBN	0	etherfabric.c
2054	FCN_MD_TXD_WIDTH	16	etherfabric.c
2055	FCN_MD_RXD_REG_KER	0xc10	etherfabric.c
2056	FCN_MD_RXD_LBN	0	etherfabric.c
2057	FCN_MD_RXD_WIDTH	16	etherfabric.c
2058	FCN_MD_CS_REG_KER	0xc20	etherfabric.c
2059	FCN_MD_GC_LBN	4	etherfabric.c
2060	FCN_MD_GC_WIDTH	1	etherfabric.c
2061	FCN_MD_RIC_LBN	2	etherfabric.c
2062	FCN_MD_RIC_WIDTH	1	etherfabric.c
2063	FCN_MD_RDC_LBN	1	etherfabric.c
2064	FCN_MD_RDC_WIDTH	1	etherfabric.c
2065	FCN_MD_WRC_LBN	0	etherfabric.c
2066	FCN_MD_WRC_WIDTH	1	etherfabric.c
2067	FCN_MD_PHY_ADR_REG_KER	0xc30	etherfabric.c
2068	FCN_MD_PHY_ADR_LBN	0	etherfabric.c
2069	FCN_MD_PHY_ADR_WIDTH	16	etherfabric.c
2070	FCN_MD_ID_REG_KER	0xc40	etherfabric.c
2071	FCN_MD_PRT_ADR_LBN	11	etherfabric.c
2072	FCN_MD_PRT_ADR_WIDTH	5	etherfabric.c
2073	FCN_MD_DEV_ADR_LBN	6	etherfabric.c
2074	FCN_MD_DEV_ADR_WIDTH	5	etherfabric.c
2075	FCN_MD_STAT_REG_KER	0xc50	etherfabric.c
2076	FCN_MD_PINT_LBN	4	etherfabric.c
2077	FCN_MD_PINT_WIDTH	1	etherfabric.c
2078	FCN_MD_DONE_LBN	3	etherfabric.c
2079	FCN_MD_DONE_WIDTH	1	etherfabric.c
2080	FCN_MD_BSERR_LBN	2	etherfabric.c
2081	FCN_MD_BSERR_WIDTH	1	etherfabric.c
2082	FCN_MD_LNFL_LBN	1	etherfabric.c
2083	FCN_MD_LNFL_WIDTH	1	etherfabric.c
2084	FCN_MD_BSY_LBN	0	etherfabric.c
2085	FCN_MD_BSY_WIDTH	1	etherfabric.c
2086	FCN_MAC0_CTRL_REG_KER	0xc80	etherfabric.c
2087	FCN_MAC1_CTRL_REG_KER	0xc90	etherfabric.c
2088	FCN_MAC_XOFF_VAL_LBN	16	etherfabric.c
2089	FCN_MAC_XOFF_VAL_WIDTH	16	etherfabric.c
2090	FCN_MAC_BCAD_ACPT_LBN	4	etherfabric.c
2091	FCN_MAC_BCAD_ACPT_WIDTH	1	etherfabric.c
2092	FCN_MAC_UC_PROM_LBN	3	etherfabric.c
2093	FCN_MAC_UC_PROM_WIDTH	1	etherfabric.c
2094	FCN_MAC_LINK_STATUS_LBN	2	etherfabric.c
2095	FCN_MAC_LINK_STATUS_WIDTH	1	etherfabric.c
2096	FCN_MAC_SPEED_LBN	0	etherfabric.c
2097	FCN_MAC_SPEED_WIDTH	2	etherfabric.c
2098	XX_TXDRV_DEQ_DEFAULT	0xe	etherfabric.c	deq=.6
2099	XX_TXDRV_DTX_DEFAULT	0x5	etherfabric.c	1.25
2100	XX_SD_CTL_DRV_DEFAULT	0	etherfabric.c	20mA
2101	FALCON_GMAC_REGBANK	0xe00	etherfabric.c
2102	FALCON_GMAC_REGBANK_SIZE	0x200	etherfabric.c
2103	FALCON_GMAC_REG_SIZE	0x10	etherfabric.c
2104	FALCON_XMAC_REGBANK	0x1200	etherfabric.c
2105	FALCON_XMAC_REGBANK_SIZE	0x200	etherfabric.c
2106	FALCON_XMAC_REG_SIZE	0x10	etherfabric.c
2107	FCN_XM_ADR_LO_REG_MAC	0x00	etherfabric.c
2108	FCN_XM_ADR_3_LBN	24	etherfabric.c
2109	FCN_XM_ADR_3_WIDTH	8	etherfabric.c
2110	FCN_XM_ADR_2_LBN	16	etherfabric.c
2111	FCN_XM_ADR_2_WIDTH	8	etherfabric.c
2112	FCN_XM_ADR_1_LBN	8	etherfabric.c
2113	FCN_XM_ADR_1_WIDTH	8	etherfabric.c
2114	FCN_XM_ADR_0_LBN	0	etherfabric.c
2115	FCN_XM_ADR_0_WIDTH	8	etherfabric.c
2116	FCN_XM_ADR_HI_REG_MAC	0x01	etherfabric.c
2117	FCN_XM_ADR_5_LBN	8	etherfabric.c
2118	FCN_XM_ADR_5_WIDTH	8	etherfabric.c
2119	FCN_XM_ADR_4_LBN	0	etherfabric.c
2120	FCN_XM_ADR_4_WIDTH	8	etherfabric.c
2121	FCN_XM_GLB_CFG_REG_MAC	0x02	etherfabric.c
2122	FCN_XM_RX_STAT_EN_LBN	11	etherfabric.c
2123	FCN_XM_RX_STAT_EN_WIDTH	1	etherfabric.c
2124	FCN_XM_TX_STAT_EN_LBN	10	etherfabric.c
2125	FCN_XM_TX_STAT_EN_WIDTH	1	etherfabric.c
2126	FCN_XM_RX_JUMBO_MODE_LBN	6	etherfabric.c
2127	FCN_XM_RX_JUMBO_MODE_WIDTH	1	etherfabric.c
2128	FCN_XM_CORE_RST_LBN	0	etherfabric.c
2129	FCN_XM_CORE_RST_WIDTH	1	etherfabric.c
2130	FCN_XM_TX_CFG_REG_MAC	0x03	etherfabric.c
2131	FCN_XM_IPG_LBN	16	etherfabric.c
2132	FCN_XM_IPG_WIDTH	4	etherfabric.c
2133	FCN_XM_FCNTL_LBN	10	etherfabric.c
2134	FCN_XM_FCNTL_WIDTH	1	etherfabric.c
2135	FCN_XM_TXCRC_LBN	8	etherfabric.c
2136	FCN_XM_TXCRC_WIDTH	1	etherfabric.c
2137	FCN_XM_AUTO_PAD_LBN	5	etherfabric.c
2138	FCN_XM_AUTO_PAD_WIDTH	1	etherfabric.c
2139	FCN_XM_TX_PRMBL_LBN	2	etherfabric.c
2140	FCN_XM_TX_PRMBL_WIDTH	1	etherfabric.c
2141	FCN_XM_TXEN_LBN	1	etherfabric.c
2142	FCN_XM_TXEN_WIDTH	1	etherfabric.c
2143	FCN_XM_RX_CFG_REG_MAC	0x04	etherfabric.c
2144	FCN_XM_PASS_CRC_ERR_LBN	25	etherfabric.c
2145	FCN_XM_PASS_CRC_ERR_WIDTH	1	etherfabric.c
2146	FCN_XM_AUTO_DEPAD_LBN	8	etherfabric.c
2147	FCN_XM_AUTO_DEPAD_WIDTH	1	etherfabric.c
2148	FCN_XM_RXEN_LBN	1	etherfabric.c
2149	FCN_XM_RXEN_WIDTH	1	etherfabric.c
2150	FCN_XM_MGT_INT_MSK_REG_MAC_B0	0x5	etherfabric.c
2151	FCN_XM_MSK_PRMBLE_ERR_LBN	2	etherfabric.c
2152	FCN_XM_MSK_PRMBLE_ERR_WIDTH	1	etherfabric.c
2153	FCN_XM_MSK_RMTFLT_LBN	1	etherfabric.c
2154	FCN_XM_MSK_RMTFLT_WIDTH	1	etherfabric.c
2155	FCN_XM_MSK_LCLFLT_LBN	0	etherfabric.c
2156	FCN_XM_MSK_LCLFLT_WIDTH	1	etherfabric.c
2157	FCN_XM_FC_REG_MAC	0x7	etherfabric.c
2158	FCN_XM_PAUSE_TIME_LBN	16	etherfabric.c
2159	FCN_XM_PAUSE_TIME_WIDTH	16	etherfabric.c
2160	FCN_XM_DIS_FCNTL_LBN	0	etherfabric.c
2161	FCN_XM_DIS_FCNTL_WIDTH	1	etherfabric.c
2162	FCN_XM_TX_PARAM_REG_MAC	0x0d	etherfabric.c
2163	FCN_XM_TX_JUMBO_MODE_LBN	31	etherfabric.c
2164	FCN_XM_TX_JUMBO_MODE_WIDTH	1	etherfabric.c
2165	FCN_XM_MAX_TX_FRM_SIZE_LBN	16	etherfabric.c
2166	FCN_XM_MAX_TX_FRM_SIZE_WIDTH	14	etherfabric.c
2167	FCN_XM_ACPT_ALL_MCAST_LBN	11	etherfabric.c
2168	FCN_XM_ACPT_ALL_MCAST_WIDTH	1	etherfabric.c
2169	FCN_XM_RX_PARAM_REG_MAC	0x0e	etherfabric.c
2170	FCN_XM_MAX_RX_FRM_SIZE_LBN	0	etherfabric.c
2171	FCN_XM_MAX_RX_FRM_SIZE_WIDTH	14	etherfabric.c
2172	FCN_XM_MGT_INT_REG_MAC_B0	0x0f	etherfabric.c
2173	FCN_XM_PRMBLE_ERR	2	etherfabric.c
2174	FCN_XM_PRMBLE_WIDTH	1	etherfabric.c
2175	FCN_XM_RMTFLT_LBN	1	etherfabric.c
2176	FCN_XM_RMTFLT_WIDTH	1	etherfabric.c
2177	FCN_XM_LCLFLT_LBN	0	etherfabric.c
2178	FCN_XM_LCLFLT_WIDTH	1	etherfabric.c
2179	FCN_XX_ALIGN_DONE_LBN	20	etherfabric.c
2180	FCN_XX_ALIGN_DONE_WIDTH	1	etherfabric.c
2181	FCN_XX_CORE_STAT_REG_MAC	0x16	etherfabric.c
2182	FCN_XX_SYNC_STAT_LBN	16	etherfabric.c
2183	FCN_XX_SYNC_STAT_WIDTH	4	etherfabric.c
2184	FCN_XX_SYNC_STAT_DECODE_SYNCED	0xf	etherfabric.c
2185	FCN_XX_COMMA_DET_LBN	12	etherfabric.c
2186	FCN_XX_COMMA_DET_WIDTH	4	etherfabric.c
2187	FCN_XX_COMMA_DET_RESET	0xf	etherfabric.c
2188	FCN_XX_CHARERR_LBN	4	etherfabric.c
2189	FCN_XX_CHARERR_WIDTH	4	etherfabric.c
2190	FCN_XX_CHARERR_RESET	0xf	etherfabric.c
2191	FCN_XX_DISPERR_LBN	0	etherfabric.c
2192	FCN_XX_DISPERR_WIDTH	4	etherfabric.c
2193	FCN_XX_DISPERR_RESET	0xf	etherfabric.c
2194	FCN_XX_PWR_RST_REG_MAC	0x10	etherfabric.c
2195	FCN_XX_PWRDND_EN_LBN	15	etherfabric.c
2196	FCN_XX_PWRDND_EN_WIDTH	1	etherfabric.c
2197	FCN_XX_PWRDNC_EN_LBN	14	etherfabric.c
2198	FCN_XX_PWRDNC_EN_WIDTH	1	etherfabric.c
2199	FCN_XX_PWRDNB_EN_LBN	13	etherfabric.c
2200	FCN_XX_PWRDNB_EN_WIDTH	1	etherfabric.c
2201	FCN_XX_PWRDNA_EN_LBN	12	etherfabric.c
2202	FCN_XX_PWRDNA_EN_WIDTH	1	etherfabric.c
2203	FCN_XX_RSTPLLCD_EN_LBN	9	etherfabric.c
2204	FCN_XX_RSTPLLCD_EN_WIDTH	1	etherfabric.c
2205	FCN_XX_RSTPLLAB_EN_LBN	8	etherfabric.c
2206	FCN_XX_RSTPLLAB_EN_WIDTH	1	etherfabric.c
2207	FCN_XX_RESETD_EN_LBN	7	etherfabric.c
2208	FCN_XX_RESETD_EN_WIDTH	1	etherfabric.c
2209	FCN_XX_RESETC_EN_LBN	6	etherfabric.c
2210	FCN_XX_RESETC_EN_WIDTH	1	etherfabric.c
2211	FCN_XX_RESETB_EN_LBN	5	etherfabric.c
2212	FCN_XX_RESETB_EN_WIDTH	1	etherfabric.c
2213	FCN_XX_RESETA_EN_LBN	4	etherfabric.c
2214	FCN_XX_RESETA_EN_WIDTH	1	etherfabric.c
2215	FCN_XX_RSTXGXSRX_EN_LBN	2	etherfabric.c
2216	FCN_XX_RSTXGXSRX_EN_WIDTH	1	etherfabric.c
2217	FCN_XX_RSTXGXSTX_EN_LBN	1	etherfabric.c
2218	FCN_XX_RSTXGXSTX_EN_WIDTH	1	etherfabric.c
2219	FCN_XX_RST_XX_EN_LBN	0	etherfabric.c
2220	FCN_XX_RST_XX_EN_WIDTH	1	etherfabric.c
2221	FCN_XX_SD_CTL_REG_MAC	0x11	etherfabric.c
2222	FCN_XX_TERMADJ1_LBN	17	etherfabric.c
2223	FCN_XX_TERMADJ1_WIDTH	1	etherfabric.c
2224	FCN_XX_TERMADJ0_LBN	16	etherfabric.c
2225	FCN_XX_TERMADJ0_WIDTH	1	etherfabric.c
2226	FCN_XX_HIDRVD_LBN	15	etherfabric.c
2227	FCN_XX_HIDRVD_WIDTH	1	etherfabric.c
2228	FCN_XX_LODRVD_LBN	14	etherfabric.c
2229	FCN_XX_LODRVD_WIDTH	1	etherfabric.c
2230	FCN_XX_HIDRVC_LBN	13	etherfabric.c
2231	FCN_XX_HIDRVC_WIDTH	1	etherfabric.c
2232	FCN_XX_LODRVC_LBN	12	etherfabric.c
2233	FCN_XX_LODRVC_WIDTH	1	etherfabric.c
2234	FCN_XX_HIDRVB_LBN	11	etherfabric.c
2235	FCN_XX_HIDRVB_WIDTH	1	etherfabric.c
2236	FCN_XX_LODRVB_LBN	10	etherfabric.c
2237	FCN_XX_LODRVB_WIDTH	1	etherfabric.c
2238	FCN_XX_HIDRVA_LBN	9	etherfabric.c
2239	FCN_XX_HIDRVA_WIDTH	1	etherfabric.c
2240	FCN_XX_LODRVA_LBN	8	etherfabric.c
2241	FCN_XX_LODRVA_WIDTH	1	etherfabric.c
2242	FCN_XX_LPBKD_LBN	3	etherfabric.c
2243	FCN_XX_LPBKD_WIDTH	1	etherfabric.c
2244	FCN_XX_LPBKC_LBN	2	etherfabric.c
2245	FCN_XX_LPBKC_WIDTH	1	etherfabric.c
2246	FCN_XX_LPBKB_LBN	1	etherfabric.c
2247	FCN_XX_LPBKB_WIDTH	1	etherfabric.c
2248	FCN_XX_LPBKA_LBN	0	etherfabric.c
2249	FCN_XX_LPBKA_WIDTH	1	etherfabric.c
2250	FCN_XX_TXDRV_CTL_REG_MAC	0x12	etherfabric.c
2251	FCN_XX_DEQD_LBN	28	etherfabric.c
2252	FCN_XX_DEQD_WIDTH	4	etherfabric.c
2253	FCN_XX_DEQC_LBN	24	etherfabric.c
2254	FCN_XX_DEQC_WIDTH	4	etherfabric.c
2255	FCN_XX_DEQB_LBN	20	etherfabric.c
2256	FCN_XX_DEQB_WIDTH	4	etherfabric.c
2257	FCN_XX_DEQA_LBN	16	etherfabric.c
2258	FCN_XX_DEQA_WIDTH	4	etherfabric.c
2259	FCN_XX_DTXD_LBN	12	etherfabric.c
2260	FCN_XX_DTXD_WIDTH	4	etherfabric.c
2261	FCN_XX_DTXC_LBN	8	etherfabric.c
2262	FCN_XX_DTXC_WIDTH	4	etherfabric.c
2263	FCN_XX_DTXB_LBN	4	etherfabric.c
2264	FCN_XX_DTXB_WIDTH	4	etherfabric.c
2265	FCN_XX_DTXA_LBN	0	etherfabric.c
2266	FCN_XX_DTXA_WIDTH	4	etherfabric.c
2267	FCN_RX_FILTER_TBL0	0xF00000	etherfabric.c
2268	FCN_RX_DESC_PTR_TBL_KER_A1	0x11800	etherfabric.c
2269	FCN_RX_DESC_PTR_TBL_KER_B0	0xF40000	etherfabric.c
2270	FCN_RX_ISCSI_DDIG_EN_LBN	88	etherfabric.c
2271	FCN_RX_ISCSI_DDIG_EN_WIDTH	1	etherfabric.c
2272	FCN_RX_ISCSI_HDIG_EN_LBN	87	etherfabric.c
2273	FCN_RX_ISCSI_HDIG_EN_WIDTH	1	etherfabric.c
2274	FCN_RX_DESCQ_BUF_BASE_ID_LBN	36	etherfabric.c
2275	FCN_RX_DESCQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
2276	FCN_RX_DESCQ_EVQ_ID_LBN	24	etherfabric.c
2277	FCN_RX_DESCQ_EVQ_ID_WIDTH	12	etherfabric.c
2278	FCN_RX_DESCQ_OWNER_ID_LBN	10	etherfabric.c
2279	FCN_RX_DESCQ_OWNER_ID_WIDTH	14	etherfabric.c
2280	FCN_RX_DESCQ_SIZE_LBN	3	etherfabric.c
2281	FCN_RX_DESCQ_SIZE_WIDTH	2	etherfabric.c
2282	FCN_RX_DESCQ_SIZE_4K	3	etherfabric.c
2283	FCN_RX_DESCQ_SIZE_2K	2	etherfabric.c
2284	FCN_RX_DESCQ_SIZE_1K	1	etherfabric.c
2285	FCN_RX_DESCQ_SIZE_512	0	etherfabric.c
2286	FCN_RX_DESCQ_TYPE_LBN	2	etherfabric.c
2287	FCN_RX_DESCQ_TYPE_WIDTH	1	etherfabric.c
2288	FCN_RX_DESCQ_JUMBO_LBN	1	etherfabric.c
2289	FCN_RX_DESCQ_JUMBO_WIDTH	1	etherfabric.c
2290	FCN_RX_DESCQ_EN_LBN	0	etherfabric.c
2291	FCN_RX_DESCQ_EN_WIDTH	1	etherfabric.c
2292	FCN_TX_DESC_PTR_TBL_KER_A1	0x11900	etherfabric.c
2293	FCN_TX_DESC_PTR_TBL_KER_B0	0xF50000	etherfabric.c
2294	FCN_TX_NON_IP_DROP_DIS_B0_LBN	91	etherfabric.c
2295	FCN_TX_NON_IP_DROP_DIS_B0_WIDTH	1	etherfabric.c
2296	FCN_TX_DESCQ_EN_LBN	88	etherfabric.c
2297	FCN_TX_DESCQ_EN_WIDTH	1	etherfabric.c
2298	FCN_TX_ISCSI_DDIG_EN_LBN	87	etherfabric.c
2299	FCN_TX_ISCSI_DDIG_EN_WIDTH	1	etherfabric.c
2300	FCN_TX_ISCSI_HDIG_EN_LBN	86	etherfabric.c
2301	FCN_TX_ISCSI_HDIG_EN_WIDTH	1	etherfabric.c
2302	FCN_TX_DESCQ_BUF_BASE_ID_LBN	36	etherfabric.c
2303	FCN_TX_DESCQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
2304	FCN_TX_DESCQ_EVQ_ID_LBN	24	etherfabric.c
2305	FCN_TX_DESCQ_EVQ_ID_WIDTH	12	etherfabric.c
2306	FCN_TX_DESCQ_OWNER_ID_LBN	10	etherfabric.c
2307	FCN_TX_DESCQ_OWNER_ID_WIDTH	14	etherfabric.c
2308	FCN_TX_DESCQ_SIZE_LBN	3	etherfabric.c
2309	FCN_TX_DESCQ_SIZE_WIDTH	2	etherfabric.c
2310	FCN_TX_DESCQ_SIZE_4K	3	etherfabric.c
2311	FCN_TX_DESCQ_SIZE_2K	2	etherfabric.c
2312	FCN_TX_DESCQ_SIZE_1K	1	etherfabric.c
2313	FCN_TX_DESCQ_SIZE_512	0	etherfabric.c
2314	FCN_TX_DESCQ_TYPE_LBN	1	etherfabric.c
2315	FCN_TX_DESCQ_TYPE_WIDTH	2	etherfabric.c
2316	FCN_TX_DESCQ_FLUSH_LBN	0	etherfabric.c
2317	FCN_TX_DESCQ_FLUSH_WIDTH	1	etherfabric.c
2318	FCN_EVQ_PTR_TBL_KER_A1	0x11a00	etherfabric.c
2319	FCN_EVQ_PTR_TBL_KER_B0	0xf60000	etherfabric.c
2320	FCN_EVQ_EN_LBN	23	etherfabric.c
2321	FCN_EVQ_EN_WIDTH	1	etherfabric.c
2322	FCN_EVQ_SIZE_LBN	20	etherfabric.c
2323	FCN_EVQ_SIZE_WIDTH	3	etherfabric.c
2324	FCN_EVQ_SIZE_32K	6	etherfabric.c
2325	FCN_EVQ_SIZE_16K	5	etherfabric.c
2326	FCN_EVQ_SIZE_8K	4	etherfabric.c
2327	FCN_EVQ_SIZE_4K	3	etherfabric.c
2328	FCN_EVQ_SIZE_2K	2	etherfabric.c
2329	FCN_EVQ_SIZE_1K	1	etherfabric.c
2330	FCN_EVQ_SIZE_512	0	etherfabric.c
2331	FCN_EVQ_BUF_BASE_ID_LBN	0	etherfabric.c
2332	FCN_EVQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
2333	FCN_RX_RSS_INDIR_TBL_B0	0xFB0000	etherfabric.c
2334	FCN_EVQ_RPTR_REG_KER_A1	0x11b00	etherfabric.c
2335	FCN_EVQ_RPTR_REG_KER_B0	0xfa0000	etherfabric.c
2336	FCN_EVQ_RPTR_LBN	0	etherfabric.c
2337	FCN_EVQ_RPTR_WIDTH	14	etherfabric.c
2338	FCN_EVQ_RPTR_REG_KER_DWORD_A1	( FCN_EVQ_RPTR_REG_KER_A1 + 0 )	etherfabric.c
2339	FCN_EVQ_RPTR_REG_KER_DWORD_B0	( FCN_EVQ_RPTR_REG_KER_B0 + 0 )	etherfabric.c
2340	FCN_EVQ_RPTR_DWORD_LBN	0	etherfabric.c
2341	FCN_EVQ_RPTR_DWORD_WIDTH	14	etherfabric.c
2342	FCN_BUF_FULL_TBL_KER_A1	0x18000	etherfabric.c
2343	FCN_BUF_FULL_TBL_KER_B0	0x800000	etherfabric.c
2344	FCN_IP_DAT_BUF_SIZE_LBN	50	etherfabric.c
2345	FCN_IP_DAT_BUF_SIZE_WIDTH	1	etherfabric.c
2346	FCN_IP_DAT_BUF_SIZE_8K	1	etherfabric.c
2347	FCN_IP_DAT_BUF_SIZE_4K	0	etherfabric.c
2348	FCN_BUF_ADR_FBUF_LBN	14	etherfabric.c
2349	FCN_BUF_ADR_FBUF_WIDTH	34	etherfabric.c
2350	FCN_BUF_OWNER_ID_FBUF_LBN	0	etherfabric.c
2351	FCN_BUF_OWNER_ID_FBUF_WIDTH	14	etherfabric.c
2352	FCN_MAC_DATA_LBN	0	etherfabric.c
2353	FCN_MAC_DATA_WIDTH	32	etherfabric.c
2354	FCN_TX_KER_PORT_LBN	63	etherfabric.c
2355	FCN_TX_KER_PORT_WIDTH	1	etherfabric.c
2356	FCN_TX_KER_BYTE_CNT_LBN	48	etherfabric.c
2357	FCN_TX_KER_BYTE_CNT_WIDTH	14	etherfabric.c
2358	FCN_TX_KER_BUF_ADR_LBN	0	etherfabric.c
2359	FCN_TX_KER_BUF_ADR_WIDTH	EFAB_DMA_TYPE_WIDTH ( 46 )	etherfabric.c
2360	FCN_RX_KER_BUF_SIZE_LBN	48	etherfabric.c
2361	FCN_RX_KER_BUF_SIZE_WIDTH	14	etherfabric.c
2362	FCN_RX_KER_BUF_ADR_LBN	0	etherfabric.c
2363	FCN_RX_KER_BUF_ADR_WIDTH	EFAB_DMA_TYPE_WIDTH ( 46 )	etherfabric.c
2364	FCN_EV_CODE_LBN	60	etherfabric.c
2365	FCN_EV_CODE_WIDTH	4	etherfabric.c
2366	FCN_RX_IP_EV_DECODE	0	etherfabric.c
2367	FCN_TX_IP_EV_DECODE	2	etherfabric.c
2368	FCN_DRIVER_EV_DECODE	5	etherfabric.c
2369	FCN_RX_EV_PKT_OK_LBN	56	etherfabric.c
2370	FCN_RX_EV_PKT_OK_WIDTH	1	etherfabric.c
2371	FCN_RX_PORT_LBN	30	etherfabric.c
2372	FCN_RX_PORT_WIDTH	1	etherfabric.c
2373	FCN_RX_EV_BYTE_CNT_LBN	16	etherfabric.c
2374	FCN_RX_EV_BYTE_CNT_WIDTH	14	etherfabric.c
2375	FCN_RX_EV_DESC_PTR_LBN	0	etherfabric.c
2376	FCN_RX_EV_DESC_PTR_WIDTH	12	etherfabric.c
2377	FCN_TX_EV_DESC_PTR_LBN	0	etherfabric.c
2378	FCN_TX_EV_DESC_PTR_WIDTH	12	etherfabric.c
2379	FALCON_SPI_MAX_LEN	16	etherfabric.c
2380	GM_CFG1_REG_MAC	0x00	etherfabric.c
2381	GM_SW_RST_LBN	31	etherfabric.c
2382	GM_SW_RST_WIDTH	1	etherfabric.c
2383	GM_RX_FC_EN_LBN	5	etherfabric.c
2384	GM_RX_FC_EN_WIDTH	1	etherfabric.c
2385	GM_TX_FC_EN_LBN	4	etherfabric.c
2386	GM_TX_FC_EN_WIDTH	1	etherfabric.c
2387	GM_RX_EN_LBN	2	etherfabric.c
2388	GM_RX_EN_WIDTH	1	etherfabric.c
2389	GM_TX_EN_LBN	0	etherfabric.c
2390	GM_TX_EN_WIDTH	1	etherfabric.c
2391	GM_CFG2_REG_MAC	0x01	etherfabric.c
2392	GM_PAMBL_LEN_LBN	12	etherfabric.c
2393	GM_PAMBL_LEN_WIDTH	4	etherfabric.c
2394	GM_IF_MODE_LBN	8	etherfabric.c
2395	GM_IF_MODE_WIDTH	2	etherfabric.c
2396	GM_PAD_CRC_EN_LBN	2	etherfabric.c
2397	GM_PAD_CRC_EN_WIDTH	1	etherfabric.c
2398	GM_FD_LBN	0	etherfabric.c
2399	GM_FD_WIDTH	1	etherfabric.c
2400	GM_MAX_FLEN_REG_MAC	0x04	etherfabric.c
2401	GM_MAX_FLEN_LBN	0	etherfabric.c
2402	GM_MAX_FLEN_WIDTH	16	etherfabric.c
2403	GM_MII_MGMT_CFG_REG_MAC	0x08	etherfabric.c
2404	GM_MGMT_CLK_SEL_LBN	0	etherfabric.c
2405	GM_MGMT_CLK_SEL_WIDTH	3	etherfabric.c
2406	GM_MII_MGMT_CMD_REG_MAC	0x09	etherfabric.c
2407	GM_MGMT_SCAN_CYC_LBN	1	etherfabric.c
2408	GM_MGMT_SCAN_CYC_WIDTH	1	etherfabric.c
2409	GM_MGMT_RD_CYC_LBN	0	etherfabric.c
2410	GM_MGMT_RD_CYC_WIDTH	1	etherfabric.c
2411	GM_MII_MGMT_ADR_REG_MAC	0x0a	etherfabric.c
2412	GM_MGMT_PHY_ADDR_LBN	8	etherfabric.c
2413	GM_MGMT_PHY_ADDR_WIDTH	5	etherfabric.c
2414	GM_MGMT_REG_ADDR_LBN	0	etherfabric.c
2415	GM_MGMT_REG_ADDR_WIDTH	5	etherfabric.c
2416	GM_MII_MGMT_CTL_REG_MAC	0x0b	etherfabric.c
2417	GM_MGMT_CTL_LBN	0	etherfabric.c
2418	GM_MGMT_CTL_WIDTH	16	etherfabric.c
2419	GM_MII_MGMT_STAT_REG_MAC	0x0c	etherfabric.c
2420	GM_MGMT_STAT_LBN	0	etherfabric.c
2421	GM_MGMT_STAT_WIDTH	16	etherfabric.c
2422	GM_MII_MGMT_IND_REG_MAC	0x0d	etherfabric.c
2423	GM_MGMT_BUSY_LBN	0	etherfabric.c
2424	GM_MGMT_BUSY_WIDTH	1	etherfabric.c
2425	GM_ADR1_REG_MAC	0x10	etherfabric.c
2426	GM_HWADDR_5_LBN	24	etherfabric.c
2427	GM_HWADDR_5_WIDTH	8	etherfabric.c
2428	GM_HWADDR_4_LBN	16	etherfabric.c
2429	GM_HWADDR_4_WIDTH	8	etherfabric.c
2430	GM_HWADDR_3_LBN	8	etherfabric.c
2431	GM_HWADDR_3_WIDTH	8	etherfabric.c
2432	GM_HWADDR_2_LBN	0	etherfabric.c
2433	GM_HWADDR_2_WIDTH	8	etherfabric.c
2434	GM_ADR2_REG_MAC	0x11	etherfabric.c
2435	GM_HWADDR_1_LBN	24	etherfabric.c
2436	GM_HWADDR_1_WIDTH	8	etherfabric.c
2437	GM_HWADDR_0_LBN	16	etherfabric.c
2438	GM_HWADDR_0_WIDTH	8	etherfabric.c
2439	GMF_CFG0_REG_MAC	0x12	etherfabric.c
2440	GMF_FTFENREQ_LBN	12	etherfabric.c
2441	GMF_FTFENREQ_WIDTH	1	etherfabric.c
2442	GMF_STFENREQ_LBN	11	etherfabric.c
2443	GMF_STFENREQ_WIDTH	1	etherfabric.c
2444	GMF_FRFENREQ_LBN	10	etherfabric.c
2445	GMF_FRFENREQ_WIDTH	1	etherfabric.c
2446	GMF_SRFENREQ_LBN	9	etherfabric.c
2447	GMF_SRFENREQ_WIDTH	1	etherfabric.c
2448	GMF_WTMENREQ_LBN	8	etherfabric.c
2449	GMF_WTMENREQ_WIDTH	1	etherfabric.c
2450	GMF_CFG1_REG_MAC	0x13	etherfabric.c
2451	GMF_CFGFRTH_LBN	16	etherfabric.c
2452	GMF_CFGFRTH_WIDTH	5	etherfabric.c
2453	GMF_CFGXOFFRTX_LBN	0	etherfabric.c
2454	GMF_CFGXOFFRTX_WIDTH	16	etherfabric.c
2455	GMF_CFG2_REG_MAC	0x14	etherfabric.c
2456	GMF_CFGHWM_LBN	16	etherfabric.c
2457	GMF_CFGHWM_WIDTH	6	etherfabric.c
2458	GMF_CFGLWM_LBN	0	etherfabric.c
2459	GMF_CFGLWM_WIDTH	6	etherfabric.c
2460	GMF_CFG3_REG_MAC	0x15	etherfabric.c
2461	GMF_CFGHWMFT_LBN	16	etherfabric.c
2462	GMF_CFGHWMFT_WIDTH	6	etherfabric.c
2463	GMF_CFGFTTH_LBN	0	etherfabric.c
2464	GMF_CFGFTTH_WIDTH	6	etherfabric.c
2465	GMF_CFG4_REG_MAC	0x16	etherfabric.c
2466	GMF_HSTFLTRFRM_PAUSE_LBN	12	etherfabric.c
2467	GMF_HSTFLTRFRM_PAUSE_WIDTH	12	etherfabric.c
2468	GMF_CFG5_REG_MAC	0x17	etherfabric.c
2469	GMF_CFGHDPLX_LBN	22	etherfabric.c
2470	GMF_CFGHDPLX_WIDTH	1	etherfabric.c
2471	GMF_CFGBYTMODE_LBN	19	etherfabric.c
2472	GMF_CFGBYTMODE_WIDTH	1	etherfabric.c
2473	GMF_HSTDRPLT64_LBN	18	etherfabric.c
2474	GMF_HSTDRPLT64_WIDTH	1	etherfabric.c
2475	GMF_HSTFLTRFRMDC_PAUSE_LBN	12	etherfabric.c
2476	GMF_HSTFLTRFRMDC_PAUSE_WIDTH	1	etherfabric.c
2477	XFP_REQUIRED_DEVS	( MDIO_MMDREG_DEVS0_PCS \| \ MDIO_MMDREG_DEVS0_PMAPMD \| \ MDIO_MMDREG_DEVS0_PHYXS )	etherfabric.c
2478	TXC_GLRGS_GLCMD	(0xc004)	etherfabric.c
2479	TXC_GLCMD_LMTSWRST_LBN	(14)	etherfabric.c
2480	TXC_ALRGS_ATXAMP0	(0xc041)	etherfabric.c
2481	TXC_ALRGS_ATXAMP1	(0xc042)	etherfabric.c
2482	TXC_ATXAMP_LANE02_LBN	(3)	etherfabric.c
2483	TXC_ATXAMP_LANE13_LBN	(11)	etherfabric.c
2484	TXC_ATXAMP_1280_mV	(0)	etherfabric.c
2485	TXC_ATXAMP_1200_mV	(8)	etherfabric.c
2486	TXC_ATXAMP_1120_mV	(12)	etherfabric.c
2487	TXC_ATXAMP_1060_mV	(14)	etherfabric.c
2488	TXC_ATXAMP_0820_mV	(25)	etherfabric.c
2489	TXC_ATXAMP_0720_mV	(26)	etherfabric.c
2490	TXC_ATXAMP_0580_mV	(27)	etherfabric.c
2491	TXC_ATXAMP_0440_mV	(28)	etherfabric.c
2492	TXC_ATXAMP_0820_BOTH	( (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE02_LBN) \| \ (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE13_LBN) )	etherfabric.c
2493	TXC_ATXAMP_DEFAULT	(0x6060)	etherfabric.c	From databook
2494	TXC_ALRGS_ATXPRE0	(0xc043)	etherfabric.c
2495	TXC_ALRGS_ATXPRE1	(0xc044)	etherfabric.c
2496	TXC_ATXPRE_NONE	(0)	etherfabric.c
2497	TXC_ATXPRE_DEFAULT	(0x1010)	etherfabric.c	From databook
2498	TXC_REQUIRED_DEVS	( MDIO_MMDREG_DEVS0_PCS \| \ MDIO_MMDREG_DEVS0_PMAPMD \| \ MDIO_MMDREG_DEVS0_PHYXS )	etherfabric.c
2499	TENXPRESS_REQUIRED_DEVS	( MDIO_MMDREG_DEVS0_PMAPMD \| \ MDIO_MMDREG_DEVS0_PCS \| \ MDIO_MMDREG_DEVS0_PHYXS )	etherfabric.c
2500	PCS_TEST_SELECT_REG	0xd807	etherfabric.c	PRM 10.5.8
2501	CLK312_EN_LBN	3	etherfabric.c
2502	CLK312_EN_WIDTH	1	etherfabric.c
2503	PCS_CLOCK_CTRL_REG	0xd801	etherfabric.c
2504	PLL312_RST_N_LBN	2	etherfabric.c
2505	PMA_PMD_EXT_CTRL_REG	49152	etherfabric.c
2506	PMA_PMD_EXT_SSR_LBN	15	etherfabric.c
2507	PCS_BOOT_STATUS_REG	0xd000	etherfabric.c
2508	PCS_BOOT_FATAL_ERR_LBN	0	etherfabric.c
2509	PCS_BOOT_PROGRESS_LBN	1	etherfabric.c
2510	PCS_BOOT_PROGRESS_WIDTH	2	etherfabric.c
2511	PCS_BOOT_COMPLETE_LBN	3	etherfabric.c
2512	PCS_SOFT_RST2_REG	0xd806	etherfabric.c
2513	SERDES_RST_N_LBN	13	etherfabric.c
2514	XGXS_RST_N_LBN	12	etherfabric.c
2515	PM8358_REQUIRED_DEVS	(MDIO_MMDREG_DEVS0_DTEXS)	etherfabric.c
2516	PMC_MASTER_REG	(0xd000)	etherfabric.c
2517	PMC_MASTER_ANLG_CTRL	(1<< 11)	etherfabric.c
2518	PMC_MCONF2_REG	(0xd002)	etherfabric.c
2519	PMC_MCONF2_TEDGE	(1 << 2)	etherfabric.c
2520	PMC_MCONF2_REDGE	(1 << 3)	etherfabric.c
2521	PMC_ANALOG_RX_CFG0	(0xd025)	etherfabric.c
2522	PMC_ANALOG_RX_CFG1	(0xd02d)	etherfabric.c
2523	PMC_ANALOG_RX_CFG2	(0xd035)	etherfabric.c
2524	PMC_ANALOG_RX_CFG3	(0xd03d)	etherfabric.c
2525	PMC_ANALOG_RX_TERM	(1 << 15)	etherfabric.c	Bit 15 of RX CFG: 0 for 100 ohms float,
2526	PMC_ANALOG_RX_EQ_MASK	(3 << 8)	etherfabric.c
2527	PMC_ANALOG_RX_EQ_NONE	(0 << 8)	etherfabric.c
2528	PMC_ANALOG_RX_EQ_HALF	(1 << 8)	etherfabric.c
2529	PMC_ANALOG_RX_EQ_FULL	(2 << 8)	etherfabric.c
2530	PMC_ANALOG_RX_EQ_RSVD	(3 << 8)	etherfabric.c
2531	MAX_TEMP_THRESH	90	etherfabric.c
2532	PCA9539	0x74	etherfabric.c
2533	P0_IN	0x00	etherfabric.c
2534	P0_OUT	0x02	etherfabric.c
2535	P0_CONFIG	0x06	etherfabric.c
2536	P0_EN_1V0X_LBN	0	etherfabric.c
2537	P0_EN_1V0X_WIDTH	1	etherfabric.c
2538	P0_EN_1V2_LBN	1	etherfabric.c
2539	P0_EN_1V2_WIDTH	1	etherfabric.c
2540	P0_EN_2V5_LBN	2	etherfabric.c
2541	P0_EN_2V5_WIDTH	1	etherfabric.c
2542	P0_EN_3V3X_LBN	3	etherfabric.c
2543	P0_EN_3V3X_WIDTH	1	etherfabric.c
2544	P0_EN_5V_LBN	4	etherfabric.c
2545	P0_EN_5V_WIDTH	1	etherfabric.c
2546	P0_X_TRST_LBN	6	etherfabric.c
2547	P0_X_TRST_WIDTH	1	etherfabric.c
2548	P1_IN	0x01	etherfabric.c
2549	P1_CONFIG	0x07	etherfabric.c
2550	P1_AFE_PWD_LBN	0	etherfabric.c
2551	P1_AFE_PWD_WIDTH	1	etherfabric.c
2552	P1_DSP_PWD25_LBN	1	etherfabric.c
2553	P1_DSP_PWD25_WIDTH	1	etherfabric.c
2554	P1_SPARE_LBN	4	etherfabric.c
2555	P1_SPARE_WIDTH	4	etherfabric.c
2556	MAX6647	0x4e	etherfabric.c
2557	RSL	0x02	etherfabric.c
2558	RLHN	0x05	etherfabric.c
2559	WLHO	0x0b	etherfabric.c
2560	FALCON_MAC_ADDRESS_OFFSET	0x310	etherfabric.c
2561	SF_NV_CONFIG_BASE	0x300	etherfabric.c
2562	SF_NV_CONFIG_EXTRA	0xA0	etherfabric.c
2563	drv_version	"v1.2"	forcedeth.c
2564	drv_date	"05-14-2005"	forcedeth.c
2565	ETH_DATA_LEN	1500	forcedeth.c
2566	PCI_DEVICE_ID_NVIDIA_NVENET_1	0x01c3	forcedeth.c
2567	PCI_DEVICE_ID_NVIDIA_NVENET_2	0x0066	forcedeth.c
2568	PCI_DEVICE_ID_NVIDIA_NVENET_4	0x0086	forcedeth.c
2569	PCI_DEVICE_ID_NVIDIA_NVENET_5	0x008c	forcedeth.c
2570	PCI_DEVICE_ID_NVIDIA_NVENET_3	0x00d6	forcedeth.c
2571	PCI_DEVICE_ID_NVIDIA_NVENET_7	0x00df	forcedeth.c
2572	PCI_DEVICE_ID_NVIDIA_NVENET_6	0x00e6	forcedeth.c
2573	PCI_DEVICE_ID_NVIDIA_NVENET_8	0x0056	forcedeth.c
2574	PCI_DEVICE_ID_NVIDIA_NVENET_9	0x0057	forcedeth.c
2575	PCI_DEVICE_ID_NVIDIA_NVENET_10	0x0037	forcedeth.c
2576	PCI_DEVICE_ID_NVIDIA_NVENET_11	0x0038	forcedeth.c
2577	PCI_DEVICE_ID_NVIDIA_NVENET_15	0x0373	forcedeth.c
2578	DEV_NEED_LASTPACKET1	0x0001	forcedeth.c	set LASTPACKET1 in tx flags
2579	DEV_IRQMASK_1	0x0002	forcedeth.c	use NVREG_IRQMASK_WANTED_1 for irq mask
2580	DEV_IRQMASK_2	0x0004	forcedeth.c	use NVREG_IRQMASK_WANTED_2 for irq mask
2581	DEV_NEED_TIMERIRQ	0x0008	forcedeth.c	set the timer irq flag in the irq mask
2582	DEV_NEED_LINKTIMER	0x0010	forcedeth.c	poll link settings. Relies on the timer irq
2583	FLAG_MASK_V1	0xffff0000	forcedeth.c
2584	FLAG_MASK_V2	0xffffc000	forcedeth.c
2585	LEN_MASK_V1	(0xffffffff ^ FLAG_MASK_V1)	forcedeth.c
2586	LEN_MASK_V2	(0xffffffff ^ FLAG_MASK_V2)	forcedeth.c
2587	NV_TX_LASTPACKET	(1<<16)	forcedeth.c
2588	NV_TX_RETRYERROR	(1<<19)	forcedeth.c
2589	NV_TX_LASTPACKET1	(1<<24)	forcedeth.c
2590	NV_TX_DEFERRED	(1<<26)	forcedeth.c
2591	NV_TX_CARRIERLOST	(1<<27)	forcedeth.c
2592	NV_TX_LATECOLLISION	(1<<28)	forcedeth.c
2593	NV_TX_UNDERFLOW	(1<<29)	forcedeth.c
2594	NV_TX_ERROR	(1<<30)	forcedeth.c
2595	NV_TX_VALID	(1<<31)	forcedeth.c
2596	NV_TX2_LASTPACKET	(1<<29)	forcedeth.c
2597	NV_TX2_RETRYERROR	(1<<18)	forcedeth.c
2598	NV_TX2_LASTPACKET1	(1<<23)	forcedeth.c
2599	NV_TX2_DEFERRED	(1<<25)	forcedeth.c
2600	NV_TX2_CARRIERLOST	(1<<26)	forcedeth.c
2601	NV_TX2_LATECOLLISION	(1<<27)	forcedeth.c
2602	NV_TX2_UNDERFLOW	(1<<28)	forcedeth.c
2603	NV_TX2_ERROR	(1<<30)	forcedeth.c
2604	NV_TX2_VALID	(1<<31)	forcedeth.c
2605	NV_RX_DESCRIPTORVALID	(1<<16)	forcedeth.c
2606	NV_RX_MISSEDFRAME	(1<<17)	forcedeth.c
2607	NV_RX_SUBSTRACT1	(1<<18)	forcedeth.c
2608	NV_RX_ERROR1	(1<<23)	forcedeth.c
2609	NV_RX_ERROR2	(1<<24)	forcedeth.c
2610	NV_RX_ERROR3	(1<<25)	forcedeth.c
2611	NV_RX_ERROR4	(1<<26)	forcedeth.c
2612	NV_RX_CRCERR	(1<<27)	forcedeth.c
2613	NV_RX_OVERFLOW	(1<<28)	forcedeth.c
2614	NV_RX_FRAMINGERR	(1<<29)	forcedeth.c
2615	NV_RX_ERROR	(1<<30)	forcedeth.c
2616	NV_RX_AVAIL	(1<<31)	forcedeth.c
2617	NV_RX2_CHECKSUMMASK	(0x1C000000)	forcedeth.c
2618	NV_RX2_CHECKSUMOK1	(0x10000000)	forcedeth.c
2619	NV_RX2_CHECKSUMOK2	(0x14000000)	forcedeth.c
2620	NV_RX2_CHECKSUMOK3	(0x18000000)	forcedeth.c
2621	NV_RX2_DESCRIPTORVALID	(1<<29)	forcedeth.c
2622	NV_RX2_SUBSTRACT1	(1<<25)	forcedeth.c
2623	NV_RX2_ERROR1	(1<<18)	forcedeth.c
2624	NV_RX2_ERROR2	(1<<19)	forcedeth.c
2625	NV_RX2_ERROR3	(1<<20)	forcedeth.c
2626	NV_RX2_ERROR4	(1<<21)	forcedeth.c
2627	NV_RX2_CRCERR	(1<<22)	forcedeth.c
2628	NV_RX2_OVERFLOW	(1<<23)	forcedeth.c
2629	NV_RX2_FRAMINGERR	(1<<24)	forcedeth.c
2630	NV_RX2_ERROR	(1<<30)	forcedeth.c
2631	NV_RX2_AVAIL	(1<<31)	forcedeth.c
2632	NV_PCI_REGSZ	0x270	forcedeth.c
2633	NV_TXRX_RESET_DELAY	4	forcedeth.c
2634	NV_TXSTOP_DELAY1	10	forcedeth.c
2635	NV_TXSTOP_DELAY1MAX	500000	forcedeth.c
2636	NV_TXSTOP_DELAY2	100	forcedeth.c
2637	NV_RXSTOP_DELAY1	10	forcedeth.c
2638	NV_RXSTOP_DELAY1MAX	500000	forcedeth.c
2639	NV_RXSTOP_DELAY2	100	forcedeth.c
2640	NV_SETUP5_DELAY	5	forcedeth.c
2641	NV_SETUP5_DELAYMAX	50000	forcedeth.c
2642	NV_POWERUP_DELAY	5	forcedeth.c
2643	NV_POWERUP_DELAYMAX	5000	forcedeth.c
2644	NV_MIIBUSY_DELAY	50	forcedeth.c
2645	NV_MIIPHY_DELAY	10	forcedeth.c
2646	NV_MIIPHY_DELAYMAX	10000	forcedeth.c
2647	NV_WAKEUPPATTERNS	5	forcedeth.c
2648	NV_WAKEUPMASKENTRIES	4	forcedeth.c
2649	NV_WATCHDOG_TIMEO	(5*HZ)	forcedeth.c
2650	RX_RING	4	forcedeth.c
2651	TX_RING	2	forcedeth.c
2652	TX_LIMIT_STOP	63	forcedeth.c
2653	TX_LIMIT_START	62	forcedeth.c
2654	RX_NIC_BUFSIZE	(ETH_DATA_LEN + 64)	forcedeth.c
2655	RX_ALLOC_BUFSIZE	(ETH_DATA_LEN + 128)	forcedeth.c
2656	OOM_REFILL	(1+HZ/20)	forcedeth.c
2657	POLL_WAIT	(1+HZ/100)	forcedeth.c
2658	LINK_TIMEOUT	(3*HZ)	forcedeth.c
2659	DESC_VER_1	0x0	forcedeth.c
2660	DESC_VER_2	(0x02100\|NVREG_TXRXCTL_RXCHECK)	forcedeth.c
2661	PHY_OUI_MARVELL	0x5043	forcedeth.c
2662	PHY_OUI_CICADA	0x03f1	forcedeth.c
2663	PHYID1_OUI_MASK	0x03ff	forcedeth.c
2664	PHYID1_OUI_SHFT	6	forcedeth.c
2665	PHYID2_OUI_MASK	0xfc00	forcedeth.c
2666	PHYID2_OUI_SHFT	10	forcedeth.c
2667	PHY_INIT1	0x0f000	forcedeth.c
2668	PHY_INIT2	0x0e00	forcedeth.c
2669	PHY_INIT3	0x01000	forcedeth.c
2670	PHY_INIT4	0x0200	forcedeth.c
2671	PHY_INIT5	0x0004	forcedeth.c
2672	PHY_INIT6	0x02000	forcedeth.c
2673	PHY_GIGABIT	0x0100	forcedeth.c
2674	PHY_TIMEOUT	0x1	forcedeth.c
2675	PHY_ERROR	0x2	forcedeth.c
2676	PHY_100	0x1	forcedeth.c
2677	PHY_1000	0x2	forcedeth.c
2678	PHY_HALF	0x100	forcedeth.c
2679	MII_1000BT_CR	0x09	forcedeth.c
2680	MII_1000BT_SR	0x0a	forcedeth.c
2681	ADVERTISE_1000FULL	0x0200	forcedeth.c
2682	ADVERTISE_1000HALF	0x0100	forcedeth.c
2683	LPA_1000FULL	0x0800	forcedeth.c
2684	LPA_1000HALF	0x0400	forcedeth.c
2685	tx_ring	forcedeth_bufs.tx_ring	forcedeth.c
2686	rx_ring	forcedeth_bufs.rx_ring	forcedeth.c
2687	txb	forcedeth_bufs.txb	forcedeth.c
2688	rxb	forcedeth_bufs.rxb	forcedeth.c
2689	MII_READ	(-1)	forcedeth.c
2690	MII_PHYSID1	0x02	forcedeth.c	PHYS ID 1
2691	MII_PHYSID2	0x03	forcedeth.c	PHYS ID 2
2692	MII_BMCR	0x00	forcedeth.c	Basic mode control register
2693	MII_BMSR	0x01	forcedeth.c	Basic mode status register
2694	MII_ADVERTISE	0x04	forcedeth.c	Advertisement control reg
2695	MII_LPA	0x05	forcedeth.c	Link partner ability reg
2696	BMSR_ANEGCOMPLETE	0x0020	forcedeth.c	Auto-negotiation complete
2697	LPA_SLCT	0x001f	forcedeth.c	Same as advertise selector
2698	LPA_10HALF	0x0020	forcedeth.c	Can do 10mbps half-duplex
2699	LPA_10FULL	0x0040	forcedeth.c	Can do 10mbps full-duplex
2700	LPA_100HALF	0x0080	forcedeth.c	Can do 100mbps half-duplex
2701	LPA_100FULL	0x0100	forcedeth.c	Can do 100mbps full-duplex
2702	LPA_100BASE4	0x0200	forcedeth.c	Can do 100mbps 4k packets
2703	LPA_RESV	0x1c00	forcedeth.c	Unused...
2704	LPA_RFAULT	0x2000	forcedeth.c	Link partner faulted
2705	LPA_LPACK	0x4000	forcedeth.c	Link partner acked us
2706	LPA_NPAGE	0x8000	forcedeth.c	Next page bit
2707	IORESOURCE_MEM	0x00000200	forcedeth.c
2708	board_found	1	forcedeth.c
2709	valid_link	0	forcedeth.c
2710	IPOIB_DATA_NUM_SEND_WQES	2	ipoib.c
2711	IPOIB_DATA_NUM_RECV_WQES	4	ipoib.c
2712	IPOIB_DATA_NUM_CQES	8	ipoib.c
2713	IPOIB_META_NUM_SEND_WQES	2	ipoib.c
2714	IPOIB_META_NUM_RECV_WQES	2	ipoib.c
2715	IPOIB_META_NUM_CQES	8	ipoib.c
2716	IPOIB_TID_GET_PATH_REC	0x11111111UL	ipoib.c
2717	IPOIB_TID_MC_MEMBER_REC	0x22222222UL	ipoib.c
2718	IPOIB_BROADCAST_QPN	0xffffffffUL	ipoib.c
2719	IPOIB_NUM_CACHED_PEERS	4	ipoib.c
2720	TX_RING_SIZE	2	mtd80x.c
2721	TX_QUEUE_LEN	10	mtd80x.c	Limit ring entries actually used.
2722	RX_RING_SIZE	4	mtd80x.c
2723	HZ	100	mtd80x.c
2724	TX_TIME_OUT	(6*HZ)	mtd80x.c
2725	PKT_BUF_SZ	1536	mtd80x.c
2726	MII_BMCR	0x00	mtd80x.c	Basic mode control register
2727	MII_BMSR	0x01	mtd80x.c	Basic mode status register
2728	MII_PHYSID1	0x02	mtd80x.c	PHYS ID 1
2729	MII_PHYSID2	0x03	mtd80x.c	PHYS ID 2
2730	MII_ADVERTISE	0x04	mtd80x.c	Advertisement control reg
2731	MII_LPA	0x05	mtd80x.c	Link partner ability reg
2732	MII_EXPANSION	0x06	mtd80x.c	Expansion register
2733	MII_DCOUNTER	0x12	mtd80x.c	Disconnect counter
2734	MII_FCSCOUNTER	0x13	mtd80x.c	False carrier counter
2735	MII_NWAYTEST	0x14	mtd80x.c	N-way auto-neg test reg
2736	MII_RERRCOUNTER	0x15	mtd80x.c	Receive error counter
2737	MII_SREVISION	0x16	mtd80x.c	Silicon revision
2738	MII_RESV1	0x17	mtd80x.c	Reserved...
2739	MII_LBRERROR	0x18	mtd80x.c	Lpback, rx, bypass error
2740	MII_PHYADDR	0x19	mtd80x.c	PHY address
2741	MII_RESV2	0x1a	mtd80x.c	Reserved...
2742	MII_TPISTATUS	0x1b	mtd80x.c	TPI status for 10mbps
2743	MII_NCONFIG	0x1c	mtd80x.c	Network interface config
2744	BMCR_RESV	0x007f	mtd80x.c	Unused...
2745	BMCR_CTST	0x0080	mtd80x.c	Collision test
2746	BMCR_FULLDPLX	0x0100	mtd80x.c	Full duplex
2747	BMCR_ANRESTART	0x0200	mtd80x.c	Auto negotiation restart
2748	BMCR_ISOLATE	0x0400	mtd80x.c	Disconnect DP83840 from MII
2749	BMCR_PDOWN	0x0800	mtd80x.c	Powerdown the DP83840
2750	BMCR_ANENABLE	0x1000	mtd80x.c	Enable auto negotiation
2751	BMCR_SPEED100	0x2000	mtd80x.c	Select 100Mbps
2752	BMCR_LOOPBACK	0x4000	mtd80x.c	TXD loopback bits
2753	BMCR_RESET	0x8000	mtd80x.c	Reset the DP83840
2754	BMSR_ERCAP	0x0001	mtd80x.c	Ext-reg capability
2755	BMSR_JCD	0x0002	mtd80x.c	Jabber detected
2756	BMSR_LSTATUS	0x0004	mtd80x.c	Link status
2757	BMSR_ANEGCAPABLE	0x0008	mtd80x.c	Able to do auto-negotiation
2758	BMSR_RFAULT	0x0010	mtd80x.c	Remote fault detected
2759	BMSR_ANEGCOMPLETE	0x0020	mtd80x.c	Auto-negotiation complete
2760	BMSR_RESV	0x07c0	mtd80x.c	Unused...
2761	BMSR_10HALF	0x0800	mtd80x.c	Can do 10mbps, half-duplex
2762	BMSR_10FULL	0x1000	mtd80x.c	Can do 10mbps, full-duplex
2763	BMSR_100HALF	0x2000	mtd80x.c	Can do 100mbps, half-duplex
2764	BMSR_100FULL	0x4000	mtd80x.c	Can do 100mbps, full-duplex
2765	BMSR_100BASE4	0x8000	mtd80x.c	Can do 100mbps, 4k packets
2766	ADVERTISE_SLCT	0x001f	mtd80x.c	Selector bits
2767	ADVERTISE_CSMA	0x0001	mtd80x.c	Only selector supported
2768	ADVERTISE_10HALF	0x0020	mtd80x.c	Try for 10mbps half-duplex
2769	ADVERTISE_10FULL	0x0040	mtd80x.c	Try for 10mbps full-duplex
2770	ADVERTISE_100HALF	0x0080	mtd80x.c	Try for 100mbps half-duplex
2771	ADVERTISE_100FULL	0x0100	mtd80x.c	Try for 100mbps full-duplex
2772	ADVERTISE_100BASE4	0x0200	mtd80x.c	Try for 100mbps 4k packets
2773	ADVERTISE_RESV	0x1c00	mtd80x.c	Unused...
2774	ADVERTISE_RFAULT	0x2000	mtd80x.c	Say we can detect faults
2775	ADVERTISE_LPACK	0x4000	mtd80x.c	Ack link partners response
2776	ADVERTISE_NPAGE	0x8000	mtd80x.c	Next page bit
2777	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	mtd80x.c
2778	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	mtd80x.c
2779	MASK_MIIR_MII_READ	0x00000000	mtd80x.c
2780	MASK_MIIR_MII_WRITE	0x00000008	mtd80x.c
2781	MASK_MIIR_MII_MDO	0x00000004	mtd80x.c
2782	MASK_MIIR_MII_MDI	0x00000002	mtd80x.c
2783	MASK_MIIR_MII_MDC	0x00000001	mtd80x.c
2784	OP_READ	0x6000	mtd80x.c	ST:01+OP:10+PHYAD+REGAD+TA:Z0
2785	OP_WRITE	0x5002	mtd80x.c	ST:01+OP:01+PHYAD+REGAD+TA:10
2786	MysonPHYID	0xd0000302	mtd80x.c
2787	MysonPHYID0	0x0302	mtd80x.c
2788	StatusRegister	18	mtd80x.c
2789	SPEED100	0x0400	mtd80x.c	bit10
2790	FULLMODE	0x0800	mtd80x.c	bit11
2791	SeeqPHYID0	0x0016	mtd80x.c
2792	MIIRegister18	18	mtd80x.c
2793	SPD_DET_100	0x80	mtd80x.c
2794	DPLX_DET_FULL	0x40	mtd80x.c
2795	AhdocPHYID0	0x0022	mtd80x.c
2796	DiagnosticReg	18	mtd80x.c
2797	DPLX_FULL	0x0800	mtd80x.c
2798	Speed_100	0x0400	mtd80x.c
2799	MarvellPHYID0	0x0141	mtd80x.c
2800	LevelOnePHYID0	0x0013	mtd80x.c
2801	MII1000BaseTControlReg	9	mtd80x.c
2802	MII1000BaseTStatusReg	10	mtd80x.c
2803	SpecificReg	17	mtd80x.c
2804	PHYAbletoPerform1000FullDuplex	0x0200	mtd80x.c
2805	PHYAbletoPerform1000HalfDuplex	0x0100	mtd80x.c
2806	PHY1000AbilityMask	0x300	mtd80x.c
2807	SpeedMask	0x0c000	mtd80x.c
2808	Speed_1000M	0x08000	mtd80x.c
2809	Speed_100M	0x4000	mtd80x.c
2810	Speed_10M	0	mtd80x.c
2811	Full_Duplex	0x2000	mtd80x.c
2812	LXT1000_100M	0x08000	mtd80x.c
2813	LXT1000_1000M	0x0c000	mtd80x.c
2814	LXT1000_Full	0x200	mtd80x.c
2815	PS10	0x00080000	mtd80x.c
2816	FD	0x00100000	mtd80x.c
2817	PS1000	0x00010000	mtd80x.c
2818	LinkIsUp	0x0004	mtd80x.c
2819	LinkIsUp2	0x00040000	mtd80x.c
2820	txb	mtd80x_bufs.txb	mtd80x.c
2821	rxb	mtd80x_bufs.rxb	mtd80x.c
2822	INCLUDE_NE	1	ne.c
2823	NE_SCAN	0x300,0x280,0x320,0x340,0x380	ne.c
2824	ASIC_PIO	NE_DATA	ne2k_isa.c
2825	HZ	100	ns83820.c
2826	USE_64BIT_ADDR	"+"	ns83820.c
2827	TRY_DAC	1	ns83820.c
2828	TRY_DAC	0	ns83820.c
2829	RX_BUF_SIZE	1500	ns83820.c	8192
2830	NR_RX_DESC	64	ns83820.c
2831	NR_TX_DESC	1	ns83820.c
2832	REAL_RX_BUF_SIZE	(RX_BUF_SIZE + 14 + 6)	ns83820.c	rx/tx mac addr + type
2833	MIN_TX_DESC_FREE	8	ns83820.c
2834	CFGCS	0x04	ns83820.c
2835	CR_TXE	0x00000001	ns83820.c
2836	CR_TXD	0x00000002	ns83820.c
2837	CR_RXE	0x00000004	ns83820.c
2838	CR_RXD	0x00000008	ns83820.c
2839	CR_TXR	0x00000010	ns83820.c
2840	CR_RXR	0x00000020	ns83820.c
2841	CR_SWI	0x00000080	ns83820.c
2842	CR_RST	0x00000100	ns83820.c
2843	PTSCR_EEBIST_FAIL	0x00000001	ns83820.c
2844	PTSCR_EEBIST_EN	0x00000002	ns83820.c
2845	PTSCR_EELOAD_EN	0x00000004	ns83820.c
2846	PTSCR_RBIST_FAIL	0x000001b8	ns83820.c
2847	PTSCR_RBIST_DONE	0x00000200	ns83820.c
2848	PTSCR_RBIST_EN	0x00000400	ns83820.c
2849	PTSCR_RBIST_RST	0x00002000	ns83820.c
2850	MEAR_EEDI	0x00000001	ns83820.c
2851	MEAR_EEDO	0x00000002	ns83820.c
2852	MEAR_EECLK	0x00000004	ns83820.c
2853	MEAR_EESEL	0x00000008	ns83820.c
2854	MEAR_MDIO	0x00000010	ns83820.c
2855	MEAR_MDDIR	0x00000020	ns83820.c
2856	MEAR_MDC	0x00000040	ns83820.c
2857	ISR_TXDESC3	0x40000000	ns83820.c
2858	ISR_TXDESC2	0x20000000	ns83820.c
2859	ISR_TXDESC1	0x10000000	ns83820.c
2860	ISR_TXDESC0	0x08000000	ns83820.c
2861	ISR_RXDESC3	0x04000000	ns83820.c
2862	ISR_RXDESC2	0x02000000	ns83820.c
2863	ISR_RXDESC1	0x01000000	ns83820.c
2864	ISR_RXDESC0	0x00800000	ns83820.c
2865	ISR_TXRCMP	0x00400000	ns83820.c
2866	ISR_RXRCMP	0x00200000	ns83820.c
2867	ISR_DPERR	0x00100000	ns83820.c
2868	ISR_SSERR	0x00080000	ns83820.c
2869	ISR_RMABT	0x00040000	ns83820.c
2870	ISR_RTABT	0x00020000	ns83820.c
2871	ISR_RXSOVR	0x00010000	ns83820.c
2872	ISR_HIBINT	0x00008000	ns83820.c
2873	ISR_PHY	0x00004000	ns83820.c
2874	ISR_PME	0x00002000	ns83820.c
2875	ISR_SWI	0x00001000	ns83820.c
2876	ISR_MIB	0x00000800	ns83820.c
2877	ISR_TXURN	0x00000400	ns83820.c
2878	ISR_TXIDLE	0x00000200	ns83820.c
2879	ISR_TXERR	0x00000100	ns83820.c
2880	ISR_TXDESC	0x00000080	ns83820.c
2881	ISR_TXOK	0x00000040	ns83820.c
2882	ISR_RXORN	0x00000020	ns83820.c
2883	ISR_RXIDLE	0x00000010	ns83820.c
2884	ISR_RXEARLY	0x00000008	ns83820.c
2885	ISR_RXERR	0x00000004	ns83820.c
2886	ISR_RXDESC	0x00000002	ns83820.c
2887	ISR_RXOK	0x00000001	ns83820.c
2888	TXCFG_CSI	0x80000000	ns83820.c
2889	TXCFG_HBI	0x40000000	ns83820.c
2890	TXCFG_MLB	0x20000000	ns83820.c
2891	TXCFG_ATP	0x10000000	ns83820.c
2892	TXCFG_ECRETRY	0x00800000	ns83820.c
2893	TXCFG_BRST_DIS	0x00080000	ns83820.c
2894	TXCFG_MXDMA1024	0x00000000	ns83820.c
2895	TXCFG_MXDMA512	0x00700000	ns83820.c
2896	TXCFG_MXDMA256	0x00600000	ns83820.c
2897	TXCFG_MXDMA128	0x00500000	ns83820.c
2898	TXCFG_MXDMA64	0x00400000	ns83820.c
2899	TXCFG_MXDMA32	0x00300000	ns83820.c
2900	TXCFG_MXDMA16	0x00200000	ns83820.c
2901	TXCFG_MXDMA8	0x00100000	ns83820.c
2902	CFG_LNKSTS	0x80000000	ns83820.c
2903	CFG_SPDSTS	0x60000000	ns83820.c
2904	CFG_SPDSTS1	0x40000000	ns83820.c
2905	CFG_SPDSTS0	0x20000000	ns83820.c
2906	CFG_DUPSTS	0x10000000	ns83820.c
2907	CFG_TBI_EN	0x01000000	ns83820.c
2908	CFG_MODE_1000	0x00400000	ns83820.c
2909	CFG_AUTO_1000	0x00200000	ns83820.c
2910	CFG_PINT_CTL	0x001c0000	ns83820.c
2911	CFG_PINT_DUPSTS	0x00100000	ns83820.c
2912	CFG_PINT_LNKSTS	0x00080000	ns83820.c
2913	CFG_PINT_SPDSTS	0x00040000	ns83820.c
2914	CFG_TMRTEST	0x00020000	ns83820.c
2915	CFG_MRM_DIS	0x00010000	ns83820.c
2916	CFG_MWI_DIS	0x00008000	ns83820.c
2917	CFG_T64ADDR	0x00004000	ns83820.c
2918	CFG_PCI64_DET	0x00002000	ns83820.c
2919	CFG_DATA64_EN	0x00001000	ns83820.c
2920	CFG_M64ADDR	0x00000800	ns83820.c
2921	CFG_PHY_RST	0x00000400	ns83820.c
2922	CFG_PHY_DIS	0x00000200	ns83820.c
2923	CFG_EXTSTS_EN	0x00000100	ns83820.c
2924	CFG_REQALG	0x00000080	ns83820.c
2925	CFG_SB	0x00000040	ns83820.c
2926	CFG_POW	0x00000020	ns83820.c
2927	CFG_EXD	0x00000010	ns83820.c
2928	CFG_PESEL	0x00000008	ns83820.c
2929	CFG_BROM_DIS	0x00000004	ns83820.c
2930	CFG_EXT_125	0x00000002	ns83820.c
2931	CFG_BEM	0x00000001	ns83820.c
2932	EXTSTS_UDPPKT	0x00200000	ns83820.c
2933	EXTSTS_TCPPKT	0x00080000	ns83820.c
2934	EXTSTS_IPPKT	0x00020000	ns83820.c
2935	SPDSTS_POLARITY	(CFG_SPDSTS1 \| CFG_SPDSTS0 \| CFG_DUPSTS \| (lnksts ? CFG_LNKSTS : 0))	ns83820.c
2936	MIBC_MIBS	0x00000008	ns83820.c
2937	MIBC_ACLR	0x00000004	ns83820.c
2938	MIBC_FRZ	0x00000002	ns83820.c
2939	MIBC_WRN	0x00000001	ns83820.c
2940	PCR_PSEN	(1 << 31)	ns83820.c
2941	PCR_PS_MCAST	(1 << 30)	ns83820.c
2942	PCR_PS_DA	(1 << 29)	ns83820.c
2943	PCR_STHI_8	(3 << 23)	ns83820.c
2944	PCR_STLO_4	(1 << 23)	ns83820.c
2945	PCR_FFHI_8K	(3 << 21)	ns83820.c
2946	PCR_FFLO_4K	(1 << 21)	ns83820.c
2947	PCR_PAUSE_CNT	0xFFFE	ns83820.c
2948	RXCFG_AEP	0x80000000	ns83820.c
2949	RXCFG_ARP	0x40000000	ns83820.c
2950	RXCFG_STRIPCRC	0x20000000	ns83820.c
2951	RXCFG_RX_FD	0x10000000	ns83820.c
2952	RXCFG_ALP	0x08000000	ns83820.c
2953	RXCFG_AIRL	0x04000000	ns83820.c
2954	RXCFG_MXDMA512	0x00700000	ns83820.c
2955	RXCFG_DRTH	0x0000003e	ns83820.c
2956	RXCFG_DRTH0	0x00000002	ns83820.c
2957	RFCR_RFEN	0x80000000	ns83820.c
2958	RFCR_AAB	0x40000000	ns83820.c
2959	RFCR_AAM	0x20000000	ns83820.c
2960	RFCR_AAU	0x10000000	ns83820.c
2961	RFCR_APM	0x08000000	ns83820.c
2962	RFCR_APAT	0x07800000	ns83820.c
2963	RFCR_APAT3	0x04000000	ns83820.c
2964	RFCR_APAT2	0x02000000	ns83820.c
2965	RFCR_APAT1	0x01000000	ns83820.c
2966	RFCR_APAT0	0x00800000	ns83820.c
2967	RFCR_AARP	0x00400000	ns83820.c
2968	RFCR_MHEN	0x00200000	ns83820.c
2969	RFCR_UHEN	0x00100000	ns83820.c
2970	RFCR_ULM	0x00080000	ns83820.c
2971	VRCR_RUDPE	0x00000080	ns83820.c
2972	VRCR_RTCPE	0x00000040	ns83820.c
2973	VRCR_RIPE	0x00000020	ns83820.c
2974	VRCR_IPEN	0x00000010	ns83820.c
2975	VRCR_DUTF	0x00000008	ns83820.c
2976	VRCR_DVTF	0x00000004	ns83820.c
2977	VRCR_VTREN	0x00000002	ns83820.c
2978	VRCR_VTDEN	0x00000001	ns83820.c
2979	VTCR_PPCHK	0x00000008	ns83820.c
2980	VTCR_GCHK	0x00000004	ns83820.c
2981	VTCR_VPPTI	0x00000002	ns83820.c
2982	VTCR_VGTI	0x00000001	ns83820.c
2983	CR	0x00	ns83820.c
2984	CFG	0x04	ns83820.c
2985	MEAR	0x08	ns83820.c
2986	PTSCR	0x0c	ns83820.c
2987	ISR	0x10	ns83820.c
2988	IMR	0x14	ns83820.c
2989	IER	0x18	ns83820.c
2990	IHR	0x1c	ns83820.c
2991	TXDP	0x20	ns83820.c
2992	TXDP_HI	0x24	ns83820.c
2993	TXCFG	0x28	ns83820.c
2994	GPIOR	0x2c	ns83820.c
2995	RXDP	0x30	ns83820.c
2996	RXDP_HI	0x34	ns83820.c
2997	RXCFG	0x38	ns83820.c
2998	PQCR	0x3c	ns83820.c
2999	WCSR	0x40	ns83820.c
3000	PCR	0x44	ns83820.c
3001	RFCR	0x48	ns83820.c
3002	RFDR	0x4c	ns83820.c
3003	SRR	0x58	ns83820.c
3004	VRCR	0xbc	ns83820.c
3005	VTCR	0xc0	ns83820.c
3006	VDR	0xc4	ns83820.c
3007	CCSR	0xcc	ns83820.c
3008	TBICR	0xe0	ns83820.c
3009	TBISR	0xe4	ns83820.c
3010	TANAR	0xe8	ns83820.c
3011	TANLPAR	0xec	ns83820.c
3012	TANER	0xf0	ns83820.c
3013	TESR	0xf4	ns83820.c
3014	TBICR_MR_AN_ENABLE	0x00001000	ns83820.c
3015	TBICR_MR_RESTART_AN	0x00000200	ns83820.c
3016	TBISR_MR_LINK_STATUS	0x00000020	ns83820.c
3017	TBISR_MR_AN_COMPLETE	0x00000004	ns83820.c
3018	TANAR_PS2	0x00000100	ns83820.c
3019	TANAR_PS1	0x00000080	ns83820.c
3020	TANAR_HALF_DUP	0x00000040	ns83820.c
3021	TANAR_FULL_DUP	0x00000020	ns83820.c
3022	GPIOR_GP5_OE	0x00000200	ns83820.c
3023	GPIOR_GP4_OE	0x00000100	ns83820.c
3024	GPIOR_GP3_OE	0x00000080	ns83820.c
3025	GPIOR_GP2_OE	0x00000040	ns83820.c
3026	GPIOR_GP1_OE	0x00000020	ns83820.c
3027	GPIOR_GP3_OUT	0x00000004	ns83820.c
3028	GPIOR_GP1_OUT	0x00000001	ns83820.c
3029	LINK_AUTONEGOTIATE	0x01	ns83820.c
3030	LINK_DOWN	0x02	ns83820.c
3031	LINK_UP	0x04	ns83820.c
3032	HW_ADDR_LEN	8	ns83820.c
3033	HW_ADDR_LEN	4	ns83820.c
3034	CMDSTS_OWN	0x80000000	ns83820.c
3035	CMDSTS_MORE	0x40000000	ns83820.c
3036	CMDSTS_INTR	0x20000000	ns83820.c
3037	CMDSTS_ERR	0x10000000	ns83820.c
3038	CMDSTS_OK	0x08000000	ns83820.c
3039	CMDSTS_LEN_MASK	0x0000ffff	ns83820.c
3040	CMDSTS_DEST_MASK	0x01800000	ns83820.c
3041	CMDSTS_DEST_SELF	0x00800000	ns83820.c
3042	CMDSTS_DEST_MULTI	0x01000000	ns83820.c
3043	DESC_SIZE	8	ns83820.c	Should be cache line sized
3044	tx_ring	ns83820_bufs.tx_ring	ns83820.c
3045	rx_ring	ns83820_bufs.rx_ring	ns83820.c
3046	txb	ns83820_bufs.txb	ns83820.c
3047	rxb	ns83820_bufs.rxb	ns83820.c
3048	board_found	1	ns83820.c
3049	valid_link	0	ns83820.c
3050	ASIC_PIO	WD_IAR	ns8390.c
3051	eth_probe	wd_probe	ns8390.c
3052	drv_version	"v1.3"	pcnet32.c
3053	drv_date	"03-29-2004"	pcnet32.c
3054	PCNET32_PORT_AUI	0x00	pcnet32.c
3055	PCNET32_PORT_10BT	0x01	pcnet32.c
3056	PCNET32_PORT_GPSI	0x02	pcnet32.c
3057	PCNET32_PORT_MII	0x03	pcnet32.c
3058	PCNET32_PORT_PORTSEL	0x03	pcnet32.c
3059	PCNET32_PORT_ASEL	0x04	pcnet32.c
3060	PCNET32_PORT_100	0x40	pcnet32.c
3061	PCNET32_PORT_FD	0x80	pcnet32.c
3062	PCNET32_DMA_MASK	0xffffffff	pcnet32.c
3063	MAX_UNITS	8	pcnet32.c	More are supported, limit only on options
3064	PCNET32_LOG_TX_BUFFERS	1	pcnet32.c
3065	PCNET32_LOG_RX_BUFFERS	2	pcnet32.c
3066	TX_RING_SIZE	(1 << (PCNET32_LOG_TX_BUFFERS))	pcnet32.c
3067	TX_RING_MOD_MASK	(TX_RING_SIZE - 1)	pcnet32.c
3068	TX_RING_LEN_BITS	0x0000	pcnet32.c	PCNET32_LOG_TX_BUFFERS) << 12)
3069	RX_RING_SIZE	(1 << (PCNET32_LOG_RX_BUFFERS))	pcnet32.c
3070	RX_RING_MOD_MASK	(RX_RING_SIZE - 1)	pcnet32.c
3071	RX_RING_LEN_BITS	((PCNET32_LOG_RX_BUFFERS) << 4)	pcnet32.c
3072	PKT_BUF_SZ	1544	pcnet32.c
3073	PCNET32_WIO_RDP	0x10	pcnet32.c
3074	PCNET32_WIO_RAP	0x12	pcnet32.c
3075	PCNET32_WIO_RESET	0x14	pcnet32.c
3076	PCNET32_WIO_BDP	0x16	pcnet32.c
3077	PCNET32_DWIO_RDP	0x10	pcnet32.c
3078	PCNET32_DWIO_RAP	0x14	pcnet32.c
3079	PCNET32_DWIO_RESET	0x18	pcnet32.c
3080	PCNET32_DWIO_BDP	0x1C	pcnet32.c
3081	PCNET32_TOTAL_SIZE	0x20	pcnet32.c
3082	MII_CNT	4	pcnet32.c
3083	MAX_JOIN_INFO_COUNT	2	prism2.c
3084	WLAN_HOSTIF	WLAN_PLX	prism2.c
3085	BAP_TIMEOUT	( 5000 )	prism2.c
3086	PLX_LOCAL_CONFIG_REGISTER_BASE	( PCI_BASE_ADDRESS_1 )	prism2.c
3087	PLX_LOCAL_ADDRESS_SPACE_0_BASE	( PCI_BASE_ADDRESS_2 )	prism2.c
3088	PLX_LOCAL_ADDRESS_SPACE_1_BASE	( PCI_BASE_ADDRESS_3 )	prism2.c
3089	PLX_LOCAL_ADDRESS_SPACE_2_BASE	( PCI_BASE_ADDRESS_4 )	prism2.c
3090	PLX_LOCAL_ADDRESS_SPACE_3_BASE	( PCI_BASE_ADDRESS_5 )	prism2.c
3091	PRISM2_PLX_ATTR_MEM_BASE	( PLX_LOCAL_ADDRESS_SPACE_0_BASE )	prism2.c
3092	PRISM2_PLX_IO_BASE	( PLX_LOCAL_ADDRESS_SPACE_1_BASE )	prism2.c
3093	PRISM2_PCI_MEM_BASE	( PCI_BASE_ADDRESS_0 )	prism2.c
3094	CISTPL_VERS_1	( 0x15 )	prism2.c
3095	CISTPL_END	( 0xff )	prism2.c
3096	CIS_STEP	( 2 )	prism2.c
3097	CISTPL_HEADER_LEN	( 2 * CIS_STEP )	prism2.c
3098	CISTPL_LEN_OFF	( 1 * CIS_STEP )	prism2.c
3099	CISTPL_VERS_1_STR_OFF	( 4 * CIS_STEP )	prism2.c
3100	COR_OFFSET	( 0x3e0 )	prism2.c	COR attribute offset of Prism2 PC card
3101	COR_VALUE	( 0x41 )	prism2.c	Enable PC card with irq in level trigger (but interrupts disabled)
3102	WLAN_IEEE_OUI_LEN	3	prism2.c
3103	WLAN_HOSTIF	WLAN_PCI	prism2_pci.c
3104	WLAN_HOSTIF	WLAN_PLX	prism2_plx.c
3105	R8168_CPCMD_QUIRK_MASK	(\ EnableBist \| \ Mac_dbgo_oe \| \ Force_half_dup \| \ Force_rxflow_en \| \ Force_txflow_en \| \ Cxpl_dbg_sel \| \ ASF \| \ PktCntrDi	r8169.c
3106	R810X_CPCMD_QUIRK_MASK	(\ EnableBist \| \ Mac_dbgo_oe \| \ Force_half_dup \| \ Force_half_dup \| \ Force_txflow_en \| \ Cxpl_dbg_sel \| \ ASF \| \ PktCntrDis	r8169.c
3107	TX_RING_SIZE	4	rtl8139.c
3108	TX_FIFO_THRESH	256	rtl8139.c	In bytes, rounded down to 32 byte units.
3109	RX_FIFO_THRESH	4	rtl8139.c	Rx buffer level before first PCI xfer.
3110	RX_DMA_BURST	4	rtl8139.c	Maximum PCI burst, '4' is 256 bytes
3111	TX_DMA_BURST	4	rtl8139.c	Calculate as 16<<val.
3112	TX_IPG	3	rtl8139.c	This is the only valid value
3113	RX_BUF_LEN_IDX	0	rtl8139.c	0, 1, 2 is allowed - 8,16,32K rx buffer
3114	RX_BUF_LEN	( (8192 << RX_BUF_LEN_IDX) )	rtl8139.c
3115	RX_BUF_PAD	4	rtl8139.c
3116	EE_M1	0x80	rtl8139.c	Mode select bit 1
3117	EE_M0	0x40	rtl8139.c	Mode select bit 0
3118	EE_CS	0x08	rtl8139.c	EEPROM chip select
3119	EE_SK	0x04	rtl8139.c	EEPROM shift clock
3120	EE_DI	0x02	rtl8139.c	Data in
3121	EE_DO	0x01	rtl8139.c	Data out
3122	EE_MAC	7	rtl8139.c
3123	txd	sis900_bufs.txd	sis900.c
3124	rxd	sis900_bufs.rxd	sis900.c
3125	txb	sis900_bufs.txb	sis900.c
3126	rxb	sis900_bufs.rxb	sis900.c
3127	LINUX_OUT_MACROS	1	smc9000.c
3128	SMC9000_DEBUG	0	smc9000.c
3129	PRINTK2	printf	smc9000.c
3130	_outb	outb	smc9000.c
3131	_outw	outw	smc9000.c
3132	drv_version	"v1.12"	sundance.c
3133	drv_date	"2004-03-21"	sundance.c
3134	HZ	100	sundance.c
3135	TX_RING_SIZE	2	sundance.c
3136	TX_QUEUE_LEN	10	sundance.c	Limit ring entries actually used.
3137	RX_RING_SIZE	4	sundance.c
3138	TX_TIME_OUT	(4*HZ)	sundance.c
3139	PKT_BUF_SZ	1536	sundance.c
3140	rxb	rx_tx_buf.rxb	sundance.c
3141	txb	rx_tx_buf.txb	sundance.c
3142	EEPROM_SIZE	128	sundance.c
3143	PCI_IOTYPE	(PCI_USES_MASTER \| PCI_USES_IO \| PCI_ADDR0)	sundance.c
3144	MII_CNT	4	sundance.c
3145	EEPROM_SA_OFFSET	0x10	sundance.c
3146	DEFAULT_INTR	(IntrRxDMADone \| IntrPCIErr \| \ IntrDrvRqst \| IntrTxDone \| StatsMax \| \ LinkChange)	sundance.c
3147	MDIO_EnbIn	(0)	sundance.c
3148	MDIO_WRITE0	(MDIO_EnbOutput)	sundance.c
3149	MDIO_WRITE1	(MDIO_Data \| MDIO_EnbOutput)	sundance.c
3150	SUPPORT_COPPER_PHY	1	tg3.c
3151	SUPPORT_FIBER_PHY	1	tg3.c
3152	SUPPORT_LINK_REPORT	1	tg3.c
3153	SUPPORT_PARTNO_STR	1	tg3.c
3154	SUPPORT_PHY_STR	1	tg3.c
3155	TG3_RX_RING_SIZE	512	tg3.c
3156	TG3_DEF_RX_RING_PENDING	20	tg3.c	RX_RING_PENDING seems to be o.k. at 20 and 200
3157	TG3_RX_RCB_RING_SIZE	1024	tg3.c
3158	TG3_TX_RING_SIZE	512	tg3.c
3159	TG3_DEF_TX_RING_PENDING	(TG3_TX_RING_SIZE - 1)	tg3.c
3160	TG3_RX_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RING_SIZE)	tg3.c
3161	TG3_RX_RCB_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RCB_RING_SIZE)	tg3.c
3162	TG3_TX_RING_BYTES	(sizeof(struct tg3_tx_buffer_desc) * TG3_TX_RING_SIZE)	tg3.c
3163	RX_PKT_BUF_SZ	(1536 + 2 + 64)	tg3.c
3164	PHY_BUSY_LOOPS	5000	tg3.c
3165	ANEG_OK	0	tg3.c
3166	ANEG_DONE	1	tg3.c
3167	ANEG_TIMER_ENAB	2	tg3.c
3168	ANEG_FAILED	-1	tg3.c
3169	ANEG_STATE_SETTLE_TIME	10000	tg3.c
3170	MAX_WAIT_CNT	1000	tg3.c
3171	drv_version	"v1.4"	tlan.c
3172	drv_date	"01-17-2004"	tlan.c
3173	HZ	100	tlan.c
3174	TX_TIME_OUT	(6*HZ)	tlan.c
3175	tx_ring	tlan_buffers.tx_ring	tlan.c
3176	txb	tlan_buffers.txb	tlan.c
3177	rx_ring	tlan_buffers.rx_ring	tlan.c
3178	rxb	tlan_buffers.rxb	tlan.c
3179	board_found	1	tlan.c
3180	valid_link	0	tlan.c
3181	TX_TIME_OUT	2*TICKS_PER_SEC	tulip.c
3182	TULIP_IOTYPE	PCI_USES_MASTER \| PCI_USES_IO \| PCI_ADDR0	tulip.c
3183	TULIP_SIZE	0x80	tulip.c
3184	FULL_DUPLEX_MAGIC	0x6969	tulip.c
3185	MEDIA_MASK	31	tulip.c
3186	EEPROM_ADDRLEN	6	tulip.c
3187	EEPROM_SIZE	128	tulip.c	2 << EEPROM_ADDRLEN
3188	EE_WRITE_CMD	(5 << addr_len)	tulip.c
3189	EE_READ_CMD	(6 << addr_len)	tulip.c
3190	EE_ERASE_CMD	(7 << addr_len)	tulip.c
3191	EE_SHIFT_CLK	0x02	tulip.c	EEPROM shift clock.
3192	EE_CS	0x01	tulip.c	EEPROM chip select.
3193	EE_DATA_WRITE	0x04	tulip.c	EEPROM chip data in.
3194	EE_WRITE_0	0x01	tulip.c
3195	EE_WRITE_1	0x05	tulip.c
3196	EE_DATA_READ	0x08	tulip.c	EEPROM chip data out.
3197	EE_ENB	(0x4800 \| EE_CS)	tulip.c
3198	BUFLEN	1536	tulip.c
3199	DESC_RING_WRAP	0x02000000	tulip.c
3200	TX_RING_SIZE	2	tulip.c
3201	RX_RING_SIZE	4	tulip.c
3202	tx_ring	tulip_bss.tx_ring	tulip.c
3203	txb	tulip_bss.txb	tulip.c
3204	rx_ring	tulip_bss.rx_ring	tulip.c
3205	rxb	tulip_bss.rxb	tulip.c
3206	MDIO_SHIFT_CLK	0x10000	tulip.c
3207	MDIO_DATA_WRITE0	0x00000	tulip.c
3208	MDIO_DATA_WRITE1	0x20000	tulip.c
3209	MDIO_ENB	0x00000	tulip.c	Ignore the 0x02000 databook setting.
3210	MDIO_ENB_IN	0x40000	tulip.c
3211	MDIO_DATA_READ	0x80000	tulip.c
3212	W_MAX_TIMEOUT	0x0FFFU	via-rhine.c
3213	RX_BUF_LEN_IDX	3	via-rhine.c	0==8K, 1==16K, 2==32K, 3==64K
3214	RX_BUF_LEN	(8192 << RX_BUF_LEN_IDX)	via-rhine.c
3215	TX_BUF_SIZE	1536	via-rhine.c
3216	RX_BUF_SIZE	1536	via-rhine.c
3217	TX_FIFO_THRESH	256	via-rhine.c	In bytes, rounded down to 32 byte units.
3218	RX_FIFO_THRESH	4	via-rhine.c	Rx buffer level before first PCI xfer.
3219	RX_DMA_BURST	4	via-rhine.c	Maximum PCI burst, '4' is 256 bytes
3220	TX_DMA_BURST	4	via-rhine.c
3221	TX_TIMEOUT	((2000*HZ)/1000)	via-rhine.c
3222	byPAR0	ioaddr	via-rhine.c
3223	byRCR	ioaddr + 6	via-rhine.c
3224	byTCR	ioaddr + 7	via-rhine.c
3225	byCR0	ioaddr + 8	via-rhine.c
3226	byCR1	ioaddr + 9	via-rhine.c
3227	byISR0	ioaddr + 0x0c	via-rhine.c
3228	byISR1	ioaddr + 0x0d	via-rhine.c
3229	byIMR0	ioaddr + 0x0e	via-rhine.c
3230	byIMR1	ioaddr + 0x0f	via-rhine.c
3231	byMAR0	ioaddr + 0x10	via-rhine.c
3232	byMAR1	ioaddr + 0x11	via-rhine.c
3233	byMAR2	ioaddr + 0x12	via-rhine.c
3234	byMAR3	ioaddr + 0x13	via-rhine.c
3235	byMAR4	ioaddr + 0x14	via-rhine.c
3236	byMAR5	ioaddr + 0x15	via-rhine.c
3237	byMAR6	ioaddr + 0x16	via-rhine.c
3238	byMAR7	ioaddr + 0x17	via-rhine.c
3239	dwCurrentRxDescAddr	ioaddr + 0x18	via-rhine.c
3240	dwCurrentTxDescAddr	ioaddr + 0x1c	via-rhine.c
3241	dwCurrentRDSE0	ioaddr + 0x20	via-rhine.c
3242	dwCurrentRDSE1	ioaddr + 0x24	via-rhine.c
3243	dwCurrentRDSE2	ioaddr + 0x28	via-rhine.c
3244	dwCurrentRDSE3	ioaddr + 0x2c	via-rhine.c
3245	dwNextRDSE0	ioaddr + 0x30	via-rhine.c
3246	dwNextRDSE1	ioaddr + 0x34	via-rhine.c
3247	dwNextRDSE2	ioaddr + 0x38	via-rhine.c
3248	dwNextRDSE3	ioaddr + 0x3c	via-rhine.c
3249	dwCurrentTDSE0	ioaddr + 0x40	via-rhine.c
3250	dwCurrentTDSE1	ioaddr + 0x44	via-rhine.c
3251	dwCurrentTDSE2	ioaddr + 0x48	via-rhine.c
3252	dwCurrentTDSE3	ioaddr + 0x4c	via-rhine.c
3253	dwNextTDSE0	ioaddr + 0x50	via-rhine.c
3254	dwNextTDSE1	ioaddr + 0x54	via-rhine.c
3255	dwNextTDSE2	ioaddr + 0x58	via-rhine.c
3256	dwNextTDSE3	ioaddr + 0x5c	via-rhine.c
3257	dwCurrRxDMAPtr	ioaddr + 0x60	via-rhine.c
3258	dwCurrTxDMAPtr	ioaddr + 0x64	via-rhine.c
3259	byMPHY	ioaddr + 0x6c	via-rhine.c
3260	byMIISR	ioaddr + 0x6d	via-rhine.c
3261	byBCR0	ioaddr + 0x6e	via-rhine.c
3262	byBCR1	ioaddr + 0x6f	via-rhine.c
3263	byMIICR	ioaddr + 0x70	via-rhine.c
3264	byMIIAD	ioaddr + 0x71	via-rhine.c
3265	wMIIDATA	ioaddr + 0x72	via-rhine.c
3266	byEECSR	ioaddr + 0x74	via-rhine.c
3267	byTEST	ioaddr + 0x75	via-rhine.c
3268	byGPIO	ioaddr + 0x76	via-rhine.c
3269	byCFGA	ioaddr + 0x78	via-rhine.c
3270	byCFGB	ioaddr + 0x79	via-rhine.c
3271	byCFGC	ioaddr + 0x7a	via-rhine.c
3272	byCFGD	ioaddr + 0x7b	via-rhine.c
3273	wTallyCntMPA	ioaddr + 0x7c	via-rhine.c
3274	wTallyCntCRC	ioaddr + 0x7d	via-rhine.c
3275	bySTICKHW	ioaddr + 0x83	via-rhine.c
3276	byWOLcrClr	ioaddr + 0xA4	via-rhine.c
3277	byWOLcgClr	ioaddr + 0xA7	via-rhine.c
3278	byPwrcsrClr	ioaddr + 0xAC	via-rhine.c
3279	RCR_RRFT2	0x80	via-rhine.c
3280	RCR_RRFT1	0x40	via-rhine.c
3281	RCR_RRFT0	0x20	via-rhine.c
3282	RCR_PROM	0x10	via-rhine.c
3283	RCR_AB	0x08	via-rhine.c
3284	RCR_AM	0x04	via-rhine.c
3285	RCR_AR	0x02	via-rhine.c
3286	RCR_SEP	0x01	via-rhine.c
3287	TCR_RTSF	0x80	via-rhine.c
3288	TCR_RTFT1	0x40	via-rhine.c
3289	TCR_RTFT0	0x20	via-rhine.c
3290	TCR_OFSET	0x08	via-rhine.c
3291	TCR_LB1	0x04	via-rhine.c	loopback[1]
3292	TCR_LB0	0x02	via-rhine.c	loopback[0]
3293	CR0_RDMD	0x40	via-rhine.c	rx descriptor polling demand
3294	CR0_TDMD	0x20	via-rhine.c	tx descriptor polling demand
3295	CR0_TXON	0x10	via-rhine.c
3296	CR0_RXON	0x08	via-rhine.c
3297	CR0_STOP	0x04	via-rhine.c	stop NIC, default = 1
3298	CR0_STRT	0x02	via-rhine.c	start NIC
3299	CR0_INIT	0x01	via-rhine.c	start init process
3300	CR1_SFRST	0x80	via-rhine.c	software reset
3301	CR1_RDMD1	0x40	via-rhine.c	RDMD1
3302	CR1_TDMD1	0x20	via-rhine.c	TDMD1
3303	CR1_KEYPAG	0x10	via-rhine.c	turn on par/key
3304	CR1_DPOLL	0x08	via-rhine.c	disable rx/tx auto polling
3305	CR1_FDX	0x04	via-rhine.c	full duplex mode
3306	CR1_ETEN	0x02	via-rhine.c	early tx mode
3307	CR1_EREN	0x01	via-rhine.c	early rx mode
3308	CR_RDMD	0x0040	via-rhine.c	rx descriptor polling demand
3309	CR_TDMD	0x0020	via-rhine.c	tx descriptor polling demand
3310	CR_TXON	0x0010	via-rhine.c
3311	CR_RXON	0x0008	via-rhine.c
3312	CR_STOP	0x0004	via-rhine.c	stop NIC, default = 1
3313	CR_STRT	0x0002	via-rhine.c	start NIC
3314	CR_INIT	0x0001	via-rhine.c	start init process
3315	CR_SFRST	0x8000	via-rhine.c	software reset
3316	CR_RDMD1	0x4000	via-rhine.c	RDMD1
3317	CR_TDMD1	0x2000	via-rhine.c	TDMD1
3318	CR_KEYPAG	0x1000	via-rhine.c	turn on par/key
3319	CR_DPOLL	0x0800	via-rhine.c	disable rx/tx auto polling
3320	CR_FDX	0x0400	via-rhine.c	full duplex mode
3321	CR_ETEN	0x0200	via-rhine.c	early tx mode
3322	CR_EREN	0x0100	via-rhine.c	early rx mode
3323	IMR0_CNTM	0x80	via-rhine.c
3324	IMR0_BEM	0x40	via-rhine.c
3325	IMR0_RUM	0x20	via-rhine.c
3326	IMR0_TUM	0x10	via-rhine.c
3327	IMR0_TXEM	0x08	via-rhine.c
3328	IMR0_RXEM	0x04	via-rhine.c
3329	IMR0_PTXM	0x02	via-rhine.c
3330	IMR0_PRXM	0x01	via-rhine.c
3331	IMRShadow	0x5AFF	via-rhine.c
3332	IMR1_INITM	0x80	via-rhine.c
3333	IMR1_SRCM	0x40	via-rhine.c
3334	IMR1_NBFM	0x10	via-rhine.c
3335	IMR1_PRAIM	0x08	via-rhine.c
3336	IMR1_RES0M	0x04	via-rhine.c
3337	IMR1_ETM	0x02	via-rhine.c
3338	IMR1_ERM	0x01	via-rhine.c
3339	ISR_INITI	0x8000	via-rhine.c
3340	ISR_SRCI	0x4000	via-rhine.c
3341	ISR_ABTI	0x2000	via-rhine.c
3342	ISR_NORBF	0x1000	via-rhine.c
3343	ISR_PKTRA	0x0800	via-rhine.c
3344	ISR_RES0	0x0400	via-rhine.c
3345	ISR_ETI	0x0200	via-rhine.c
3346	ISR_ERI	0x0100	via-rhine.c
3347	ISR_CNT	0x0080	via-rhine.c
3348	ISR_BE	0x0040	via-rhine.c
3349	ISR_RU	0x0020	via-rhine.c
3350	ISR_TU	0x0010	via-rhine.c
3351	ISR_TXE	0x0008	via-rhine.c
3352	ISR_RXE	0x0004	via-rhine.c
3353	ISR_PTX	0x0002	via-rhine.c
3354	ISR_PRX	0x0001	via-rhine.c
3355	ISR0_CNT	0x80	via-rhine.c
3356	ISR0_BE	0x40	via-rhine.c
3357	ISR0_RU	0x20	via-rhine.c
3358	ISR0_TU	0x10	via-rhine.c
3359	ISR0_TXE	0x08	via-rhine.c
3360	ISR0_RXE	0x04	via-rhine.c
3361	ISR0_PTX	0x02	via-rhine.c
3362	ISR0_PRX	0x01	via-rhine.c
3363	ISR1_INITI	0x80	via-rhine.c
3364	ISR1_SRCI	0x40	via-rhine.c
3365	ISR1_NORBF	0x10	via-rhine.c
3366	ISR1_PKTRA	0x08	via-rhine.c
3367	ISR1_ETI	0x02	via-rhine.c
3368	ISR1_ERI	0x01	via-rhine.c
3369	ISR_ABNORMAL	ISR_BE+ISR_RU+ISR_TU+ISR_CNT+ISR_NORBF+ISR_PKTRA	via-rhine.c
3370	MIISR_MIIERR	0x08	via-rhine.c
3371	MIISR_MRERR	0x04	via-rhine.c
3372	MIISR_LNKFL	0x02	via-rhine.c
3373	MIISR_SPEED	0x01	via-rhine.c
3374	MIICR_MAUTO	0x80	via-rhine.c
3375	MIICR_RCMD	0x40	via-rhine.c
3376	MIICR_WCMD	0x20	via-rhine.c
3377	MIICR_MDPM	0x10	via-rhine.c
3378	MIICR_MOUT	0x08	via-rhine.c
3379	MIICR_MDO	0x04	via-rhine.c
3380	MIICR_MDI	0x02	via-rhine.c
3381	MIICR_MDC	0x01	via-rhine.c
3382	EECSR_EEPR	0x80	via-rhine.c	eeprom programed status, 73h means programed
3383	EECSR_EMBP	0x40	via-rhine.c	eeprom embeded programming
3384	EECSR_AUTOLD	0x20	via-rhine.c	eeprom content reload
3385	EECSR_DPM	0x10	via-rhine.c	eeprom direct programming
3386	EECSR_CS	0x08	via-rhine.c	eeprom CS pin
3387	EECSR_SK	0x04	via-rhine.c	eeprom SK pin
3388	EECSR_DI	0x02	via-rhine.c	eeprom DI pin
3389	EECSR_DO	0x01	via-rhine.c	eeprom DO pin
3390	BCR0_CRFT2	0x20	via-rhine.c
3391	BCR0_CRFT1	0x10	via-rhine.c
3392	BCR0_CRFT0	0x08	via-rhine.c
3393	BCR0_DMAL2	0x04	via-rhine.c
3394	BCR0_DMAL1	0x02	via-rhine.c
3395	BCR0_DMAL0	0x01	via-rhine.c
3396	BCR1_CTSF	0x20	via-rhine.c
3397	BCR1_CTFT1	0x10	via-rhine.c
3398	BCR1_CTFT0	0x08	via-rhine.c
3399	BCR1_POT2	0x04	via-rhine.c
3400	BCR1_POT1	0x02	via-rhine.c
3401	BCR1_POT0	0x01	via-rhine.c
3402	CFGA_EELOAD	0x80	via-rhine.c	enable eeprom embeded and direct programming
3403	CFGA_JUMPER	0x40	via-rhine.c
3404	CFGA_MTGPIO	0x08	via-rhine.c
3405	CFGA_T10EN	0x02	via-rhine.c
3406	CFGA_AUTO	0x01	via-rhine.c
3407	CFGB_PD	0x80	via-rhine.c
3408	CFGB_POLEN	0x02	via-rhine.c
3409	CFGB_LNKEN	0x01	via-rhine.c
3410	CFGC_M10TIO	0x80	via-rhine.c
3411	CFGC_M10POL	0x40	via-rhine.c
3412	CFGC_PHY1	0x20	via-rhine.c
3413	CFGC_PHY0	0x10	via-rhine.c
3414	CFGC_BTSEL	0x08	via-rhine.c
3415	CFGC_BPS2	0x04	via-rhine.c	bootrom select[2]
3416	CFGC_BPS1	0x02	via-rhine.c	bootrom select[1]
3417	CFGC_BPS0	0x01	via-rhine.c	bootrom select[0]
3418	CFGD_GPIOEN	0x80	via-rhine.c
3419	CFGD_DIAG	0x40	via-rhine.c
3420	CFGD_MAGIC	0x10	via-rhine.c
3421	CFGD_RANDOM	0x08	via-rhine.c
3422	CFGD_CFDX	0x04	via-rhine.c
3423	CFGD_CEREN	0x02	via-rhine.c
3424	CFGD_CETEN	0x01	via-rhine.c
3425	RSR_RERR	0x00000001	via-rhine.c
3426	RSR_CRC	0x00000002	via-rhine.c
3427	RSR_FAE	0x00000004	via-rhine.c
3428	RSR_FOV	0x00000008	via-rhine.c
3429	RSR_LONG	0x00000010	via-rhine.c
3430	RSR_RUNT	0x00000020	via-rhine.c
3431	RSR_SERR	0x00000040	via-rhine.c
3432	RSR_BUFF	0x00000080	via-rhine.c
3433	RSR_EDP	0x00000100	via-rhine.c
3434	RSR_STP	0x00000200	via-rhine.c
3435	RSR_CHN	0x00000400	via-rhine.c
3436	RSR_PHY	0x00000800	via-rhine.c
3437	RSR_BAR	0x00001000	via-rhine.c
3438	RSR_MAR	0x00002000	via-rhine.c
3439	RSR_RXOK	0x00008000	via-rhine.c
3440	RSR_ABNORMAL	RSR_RERR+RSR_LONG+RSR_RUNT	via-rhine.c
3441	TSR_NCR0	0x00000001	via-rhine.c
3442	TSR_NCR1	0x00000002	via-rhine.c
3443	TSR_NCR2	0x00000004	via-rhine.c
3444	TSR_NCR3	0x00000008	via-rhine.c
3445	TSR_COLS	0x00000010	via-rhine.c
3446	TSR_CDH	0x00000080	via-rhine.c
3447	TSR_ABT	0x00000100	via-rhine.c
3448	TSR_OWC	0x00000200	via-rhine.c
3449	TSR_CRS	0x00000400	via-rhine.c
3450	TSR_UDF	0x00000800	via-rhine.c
3451	TSR_TBUFF	0x00001000	via-rhine.c
3452	TSR_SERR	0x00002000	via-rhine.c
3453	TSR_JAB	0x00004000	via-rhine.c
3454	TSR_TERR	0x00008000	via-rhine.c
3455	TSR_ABNORMAL	TSR_TERR+TSR_OWC+TSR_ABT+TSR_JAB+TSR_CRS	via-rhine.c
3456	TSR_OWN_BIT	0x80000000	via-rhine.c
3457	CB_DELAY_LOOP_WAIT	10	via-rhine.c	10ms
3458	W_IMR_MASK_VALUE	0x1BFF	via-rhine.c	initial value of IMR
3459	PKT_TYPE_DIRECTED	0x0001	via-rhine.c	obsolete, directed address is always accepted
3460	PKT_TYPE_MULTICAST	0x0002	via-rhine.c
3461	PKT_TYPE_ALL_MULTICAST	0x0004	via-rhine.c
3462	PKT_TYPE_BROADCAST	0x0008	via-rhine.c
3463	PKT_TYPE_PROMISCUOUS	0x0020	via-rhine.c
3464	PKT_TYPE_LONG	0x2000	via-rhine.c
3465	PKT_TYPE_RUNT	0x4000	via-rhine.c
3466	PKT_TYPE_ERROR	0x8000	via-rhine.c	accept error packets, e.g. CRC error
3467	NIC_LB_NONE	0x00	via-rhine.c
3468	NIC_LB_INTERNAL	0x01	via-rhine.c
3469	NIC_LB_PHY	0x02	via-rhine.c	MII or Internal-10BaseT loopback
3470	TX_RING_SIZE	2	via-rhine.c
3471	RX_RING_SIZE	2	via-rhine.c
3472	PKT_BUF_SZ	1536	via-rhine.c	Size of each temporary Rx buffer.
3473	PCI_REG_MODE3	0x53	via-rhine.c
3474	MODE3_MIION	0x04	via-rhine.c	in PCI_REG_MOD3 OF PCI space
3475	rhine_TOTAL_SIZE	0x80	via-rhine.c
3476	NUM_TX_DESC	2	via-rhine.c	Number of Tx descriptor registers.
3477	DEFAULT_INTR	(IntrRxDone \| IntrRxErr \| IntrRxEmpty\| IntrRxOverflow \| \ IntrRxDropped \| IntrRxNoBuf)	via-rhine.c
3478	IOSYNC	do { inb(nic->ioaddr + StationAddr); } while (0)	via-rhine.c
3479	PCI_D0	((int) 0)	via-velocity.c
3480	PCI_D1	((int) 1)	via-velocity.c
3481	PCI_D2	((int) 2)	via-velocity.c
3482	PCI_D3hot	((int) 3)	via-velocity.c
3483	PCI_D3cold	((int) 4)	via-velocity.c
3484	PCI_POWER_ERROR	((int) -1)	via-velocity.c
3485	VLAN_ID_MIN	0	via-velocity.c
3486	VLAN_ID_MAX	4095	via-velocity.c
3487	VLAN_ID_DEF	0	via-velocity.c
3488	RX_THRESH_MIN	0	via-velocity.c
3489	RX_THRESH_MAX	3	via-velocity.c
3490	RX_THRESH_DEF	0	via-velocity.c
3491	DMA_LENGTH_MIN	0	via-velocity.c
3492	DMA_LENGTH_MAX	7	via-velocity.c
3493	DMA_LENGTH_DEF	0	via-velocity.c
3494	TAGGING_DEF	0	via-velocity.c
3495	IP_ALIG_DEF	0	via-velocity.c
3496	TX_CSUM_DEF	1	via-velocity.c
3497	FLOW_CNTL_DEF	1	via-velocity.c
3498	FLOW_CNTL_MIN	1	via-velocity.c
3499	FLOW_CNTL_MAX	5	via-velocity.c
3500	MED_LNK_DEF	0	via-velocity.c
3501	MED_LNK_MIN	0	via-velocity.c
3502	MED_LNK_MAX	4	via-velocity.c
3503	VAL_PKT_LEN_DEF	0	via-velocity.c
3504	WOL_OPT_DEF	0	via-velocity.c
3505	WOL_OPT_MIN	0	via-velocity.c
3506	WOL_OPT_MAX	7	via-velocity.c
3507	INT_WORKS_DEF	20	via-velocity.c
3508	INT_WORKS_MIN	10	via-velocity.c
3509	INT_WORKS_MAX	64	via-velocity.c
3510	TX_TIMEOUT	(1000);	via-velocity.c
3511	IORESOURCE_IO	0x00000100	via-velocity.c	Resource type
3512	IORESOURCE_PREFETCH	0x00001000	via-velocity.c	No side effects
3513	IORESOURCE_MEM	0x00000200	via-velocity.c
3514	BAR_0	0	via-velocity.c
3515	BAR_1	1	via-velocity.c
3516	BAR_5	5	via-velocity.c
3517	PCI_BASE_ADDRESS_SPACE	0x01	via-velocity.c	0 = memory, 1 = I/O
3518	PCI_BASE_ADDRESS_SPACE_IO	0x01	via-velocity.c
3519	PCI_BASE_ADDRESS_SPACE_MEMORY	0x00	via-velocity.c
3520	PCI_BASE_ADDRESS_MEM_TYPE_MASK	0x06	via-velocity.c
3521	PCI_BASE_ADDRESS_MEM_TYPE_32	0x00	via-velocity.c	32 bit address
3522	PCI_BASE_ADDRESS_MEM_TYPE_1M	0x02	via-velocity.c	Below 1M [obsolete]
3523	PCI_BASE_ADDRESS_MEM_TYPE_64	0x04	via-velocity.c	64 bit address
3524	PCI_BASE_ADDRESS_MEM_PREFETCH	0x08	via-velocity.c	prefetchable?
3525	PCI_REG_COMMAND	0x04	via-velocity.c
3526	PCI_REG_MODE0	0x60	via-velocity.c
3527	PCI_REG_MODE1	0x61	via-velocity.c
3528	PCI_REG_MODE2	0x62	via-velocity.c
3529	PCI_REG_MODE3	0x63	via-velocity.c
3530	PCI_REG_DELAY_TIMER	0x64	via-velocity.c
3531	MODE2_PCEROPT	0x80	via-velocity.c	take PCI bus ERror as a fatal and shutdown from software control
3532	MODE2_TXQ16	0x40	via-velocity.c	TX write-back Queue control. 0->32 entries available in Tx write-back queue, 1->16 entries
3533	MODE2_TXPOST	0x08	via-velocity.c	(Not support in VT3119)
3534	MODE2_AUTOOPT	0x04	via-velocity.c	(VT3119 GHCI without such behavior)
3535	MODE2_MODE10T	0x02	via-velocity.c	used to control tx Threshold for 10M case
3536	MODE2_TCPLSOPT	0x01	via-velocity.c	TCP large send field update disable, hardware will not update related fields, leave it to software.
3537	MODE3_MIION	0x04	via-velocity.c	MII symbol codine error detect enable ??
3538	COMMAND_BUSM	0x04	via-velocity.c
3539	COMMAND_WAIT	0x80	via-velocity.c
3540	RX_BUF_NB	6	virtio-net.c
3541	TX_RING_SIZE	2	w89c840.c
3542	RX_RING_SIZE	2	w89c840.c
3543	TX_FIFO_SIZE	(2048)	w89c840.c
3544	TX_BUG_FIFO_LIMIT	(TX_FIFO_SIZE-1514-16)	w89c840.c
3545	TX_TIMEOUT	(10*1000)	w89c840.c
3546	PKT_BUF_SZ	1536	w89c840.c	Size of each temporary Rx buffer.
3547	W840_FLAGS	(PCI_USES_IO \| PCI_ADDR0 \| PCI_USES_MASTER)	w89c840.c
3548	W840_FLAGS	(PCI_USES_MEM \| PCI_ADDR1 \| PCI_USES_MASTER)	w89c840.c
3549	readb	inb	w89c840.c
3550	readw	inw	w89c840.c
3551	readl	inl	w89c840.c
3552	writeb	outb	w89c840.c
3553	writew	outw	w89c840.c
3554	writel	outl	w89c840.c
3555	PRIV_ALIGN	15	w89c840.c	Required alignment mask
3556	PRIV_ALIGN_BYTES	32	w89c840.c
3557	MDIO_WRITE0	(MDIO_EnbOutput)	w89c840.c
3558	MDIO_WRITE1	(MDIO_DataOut \| MDIO_EnbOutput)	w89c840.c
3559	WD_DEFAULT_MEM	0xCC000	wd.c
3560	TX_INIT_RATE	16	3c509.h
3561	TX_INIT_MAX_RATE	64	3c509.h
3562	RX_INIT_LATENCY	64	3c509.h
3563	RX_INIT_EARLY_THRESH	64	3c509.h
3564	MIN_RX_EARLY_THRESHF	16	3c509.h	not less than ether_header
3565	MIN_RX_EARLY_THRESHL	4	3c509.h
3566	EEPROMSIZE	0x40	3c509.h
3567	MAX_EEPROMBUSY	1000	3c509.h
3568	EP_ID_PORT_START	0x110	3c509.h	avoid 0x100 to avoid conflict with SB16
3569	EP_ID_PORT_INC	0x10	3c509.h
3570	EP_ID_PORT_END	0x200	3c509.h
3571	EP_TAG_MAX	0x7	3c509.h	must be 2^n - 1
3572	EEPROM_CMD_RD	0x0080	3c509.h	Read: Address required (5 bits)
3573	EEPROM_CMD_WR	0x0040	3c509.h	Write: Address required (5 bits)
3574	EEPROM_CMD_ERASE	0x00c0	3c509.h	Erase: Address required (5 bits)
3575	EEPROM_CMD_EWEN	0x0030	3c509.h	Erase/Write Enable: No data required
3576	EEPROM_BUSY	(1<<15)	3c509.h
3577	EEPROM_TST_MODE	(1<<14)	3c509.h
3578	EEPROM_NODE_ADDR_0	0x0	3c509.h	Word
3579	EEPROM_NODE_ADDR_1	0x1	3c509.h	Word
3580	EEPROM_NODE_ADDR_2	0x2	3c509.h	Word
3581	EEPROM_PROD_ID	0x3	3c509.h	0x9[0-f]50
3582	EEPROM_MFG_ID	0x7	3c509.h	0x6d50
3583	EEPROM_ADDR_CFG	0x8	3c509.h	Base addr
3584	EEPROM_RESOURCE_CFG	0x9	3c509.h	IRQ. Bits 12-15
3585	EP_COMMAND	0x0e	3c509.h	Write. BASE+0x0e is always a
3586	EP_STATUS	0x0e	3c509.h	Read. BASE+0x0e is always status
3587	EP_WINDOW	0x0f	3c509.h	Read. BASE+0x0f is always window
3588	EP_W0_EEPROM_DATA	0x0c	3c509.h
3589	EP_W0_EEPROM_COMMAND	0x0a	3c509.h
3590	EP_W0_RESOURCE_CFG	0x08	3c509.h
3591	EP_W0_ADDRESS_CFG	0x06	3c509.h
3592	EP_W0_CONFIG_CTRL	0x04	3c509.h
3593	EP_W0_PRODUCT_ID	0x02	3c509.h
3594	EP_W0_MFG_ID	0x00	3c509.h
3595	EP_W1_TX_PIO_WR_2	0x02	3c509.h
3596	EP_W1_TX_PIO_WR_1	0x00	3c509.h
3597	EP_W1_FREE_TX	0x0c	3c509.h
3598	EP_W1_TX_STATUS	0x0b	3c509.h	byte
3599	EP_W1_TIMER	0x0a	3c509.h	byte
3600	EP_W1_RX_STATUS	0x08	3c509.h
3601	EP_W1_RX_PIO_RD_2	0x02	3c509.h
3602	EP_W1_RX_PIO_RD_1	0x00	3c509.h
3603	EP_W2_ADDR_5	0x05	3c509.h
3604	EP_W2_ADDR_4	0x04	3c509.h
3605	EP_W2_ADDR_3	0x03	3c509.h
3606	EP_W2_ADDR_2	0x02	3c509.h
3607	EP_W2_ADDR_1	0x01	3c509.h
3608	EP_W2_ADDR_0	0x00	3c509.h
3609	EP_W3_FREE_TX	0x0c	3c509.h
3610	EP_W3_FREE_RX	0x0a	3c509.h
3611	EP_W4_MEDIA_TYPE	0x0a	3c509.h
3612	EP_W4_CTRLR_STATUS	0x08	3c509.h
3613	EP_W4_NET_DIAG	0x06	3c509.h
3614	EP_W4_FIFO_DIAG	0x04	3c509.h
3615	EP_W4_HOST_DIAG	0x02	3c509.h
3616	EP_W4_TX_DIAG	0x00	3c509.h
3617	EP_W5_READ_0_MASK	0x0c	3c509.h
3618	EP_W5_INTR_MASK	0x0a	3c509.h
3619	EP_W5_RX_FILTER	0x08	3c509.h
3620	EP_W5_RX_EARLY_THRESH	0x06	3c509.h
3621	EP_W5_TX_AVAIL_THRESH	0x02	3c509.h
3622	EP_W5_TX_START_THRESH	0x00	3c509.h
3623	TX_TOTAL_OK	0x0c	3c509.h
3624	RX_TOTAL_OK	0x0a	3c509.h
3625	TX_DEFERRALS	0x08	3c509.h
3626	RX_FRAMES_OK	0x07	3c509.h
3627	TX_FRAMES_OK	0x06	3c509.h
3628	RX_OVERRUNS	0x05	3c509.h
3629	TX_COLLISIONS	0x04	3c509.h
3630	TX_AFTER_1_COLLISION	0x03	3c509.h
3631	TX_AFTER_X_COLLISIONS	0x02	3c509.h
3632	TX_NO_SQE	0x01	3c509.h
3633	TX_CD_LOST	0x00	3c509.h
3634	GLOBAL_RESET	(unsigned short) 0x0000	3c509.h	Wait at least 1ms
3635	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c509.h
3636	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c509.h	Read ADDR_CFG reg to
3637	RX_DISABLE	(unsigned short) (0x3<<11)	3c509.h	state disabled on
3638	RX_ENABLE	(unsigned short) (0x4<<11)	3c509.h
3639	RX_RESET	(unsigned short) (0x5<<11)	3c509.h
3640	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c509.h
3641	TX_ENABLE	(unsigned short) (0x9<<11)	3c509.h
3642	TX_DISABLE	(unsigned short) (0xa<<11)	3c509.h
3643	TX_RESET	(unsigned short) (0xb<<11)	3c509.h
3644	REQ_INTR	(unsigned short) (0xc<<11)	3c509.h
3645	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c509.h
3646	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c509.h
3647	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c509.h
3648	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c509.h
3649	FIL_GROUP	(unsigned short) (0x2)	3c509.h
3650	FIL_BRDCST	(unsigned short) (0x4)	3c509.h
3651	FIL_ALL	(unsigned short) (0x8)	3c509.h
3652	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c509.h
3653	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c509.h
3654	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c509.h
3655	STATS_ENABLE	(unsigned short) (0x15<<11)	3c509.h
3656	STATS_DISABLE	(unsigned short) (0x16<<11)	3c509.h
3657	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c509.h
3658	ACK_INTR	(unsigned short) (0x6800)	3c509.h
3659	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c509.h
3660	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c509.h
3661	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c509.h
3662	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c509.h
3663	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c509.h
3664	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c509.h
3665	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c509.h
3666	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c509.h
3667	S_INTR_LATCH	(unsigned short) (0x1)	3c509.h
3668	S_CARD_FAILURE	(unsigned short) (0x2)	3c509.h
3669	S_TX_COMPLETE	(unsigned short) (0x4)	3c509.h
3670	S_TX_AVAIL	(unsigned short) (0x8)	3c509.h
3671	S_RX_COMPLETE	(unsigned short) (0x10)	3c509.h
3672	S_RX_EARLY	(unsigned short) (0x20)	3c509.h
3673	S_INT_RQD	(unsigned short) (0x40)	3c509.h
3674	S_UPD_STATS	(unsigned short) (0x80)	3c509.h
3675	S_5_INTS	(S_CARD_FAILURE\|S_TX_COMPLETE\|\ S_TX_AVAIL\|S_RX_COMPLETE\|S_RX_EARLY)	3c509.h
3676	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c509.h
3677	ERR_RX_INCOMPLETE	(unsigned short) (0x1<<15)	3c509.h
3678	ERR_RX	(unsigned short) (0x1<<14)	3c509.h
3679	ERR_RX_OVERRUN	(unsigned short) (0x8<<11)	3c509.h
3680	ERR_RX_RUN_PKT	(unsigned short) (0xb<<11)	3c509.h
3681	ERR_RX_ALIGN	(unsigned short) (0xc<<11)	3c509.h
3682	ERR_RX_CRC	(unsigned short) (0xd<<11)	3c509.h
3683	ERR_RX_OVERSIZE	(unsigned short) (0x9<<11)	3c509.h
3684	ERR_RX_DRIBBLE	(unsigned short) (0x2<<11)	3c509.h
3685	TXS_COMPLETE	0x80	3c509.h
3686	TXS_SUCCES_INTR_REQ	0x40	3c509.h
3687	TXS_JABBER	0x20	3c509.h
3688	TXS_UNDERRUN	0x10	3c509.h
3689	TXS_MAX_COLLISION	0x8	3c509.h
3690	TXS_STATUS_OVERFLOW	0x4	3c509.h
3691	IS_AUI	(1<<13)	3c509.h
3692	IS_BNC	(1<<12)	3c509.h
3693	IS_UTP	(1<<9)	3c509.h
3694	ENABLE_DRQ_IRQ	0x0001	3c509.h
3695	W0_P4_CMD_RESET_ADAPTER	0x4	3c509.h
3696	W0_P4_CMD_ENABLE_ADAPTER	0x1	3c509.h
3697	ENABLE_UTP	0xc0	3c509.h
3698	DISABLE_UTP	0x0	3c509.h
3699	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
3700	RX_ERROR	0x4000	3c509.h
3701	RX_INCOMPLETE	0x8000	3c509.h
3702	MFG_ID	0x6d50	3c509.h	in EEPROM and W0 ADDR_CONFIG
3703	PROD_ID	0x9150	3c509.h
3704	AUI	0x1	3c509.h
3705	BNC	0x2	3c509.h
3706	UTP	0x4	3c509.h
3707	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
3708	TX_INIT_RATE	16	3c595.h
3709	TX_INIT_MAX_RATE	64	3c595.h
3710	RX_INIT_LATENCY	64	3c595.h
3711	RX_INIT_EARLY_THRESH	64	3c595.h
3712	MIN_RX_EARLY_THRESHF	16	3c595.h	not less than ether_header
3713	MIN_RX_EARLY_THRESHL	4	3c595.h
3714	EEPROMSIZE	0x40	3c595.h
3715	MAX_EEPROMBUSY	1000	3c595.h
3716	VX_LAST_TAG	0xd7	3c595.h
3717	VX_MAX_BOARDS	16	3c595.h
3718	VX_ID_PORT	0x100	3c595.h
3719	BASE	(eth_nic_base)	3c595.h
3720	EEPROM_CMD_RD	0x0080	3c595.h	Read: Address required (5 bits)
3721	EEPROM_CMD_WR	0x0040	3c595.h	Write: Address required (5 bits)
3722	EEPROM_CMD_ERASE	0x00c0	3c595.h	Erase: Address required (5 bits)
3723	EEPROM_CMD_EWEN	0x0030	3c595.h	Erase/Write Enable: No data required
3724	EEPROM_BUSY	(1<<15)	3c595.h
3725	EEPROM_NODE_ADDR_0	0x0	3c595.h	Word
3726	EEPROM_NODE_ADDR_1	0x1	3c595.h	Word
3727	EEPROM_NODE_ADDR_2	0x2	3c595.h	Word
3728	EEPROM_PROD_ID	0x3	3c595.h	0x9[0-f]50
3729	EEPROM_MFG_ID	0x7	3c595.h	0x6d50
3730	EEPROM_ADDR_CFG	0x8	3c595.h	Base addr
3731	EEPROM_RESOURCE_CFG	0x9	3c595.h	IRQ. Bits 12-15
3732	EEPROM_OEM_ADDR_0	0xa	3c595.h	Word
3733	EEPROM_OEM_ADDR_1	0xb	3c595.h	Word
3734	EEPROM_OEM_ADDR_2	0xc	3c595.h	Word
3735	EEPROM_SOFT_INFO_2	0xf	3c595.h	Software information 2
3736	NO_RX_OVN_ANOMALY	(1<<5)	3c595.h
3737	VX_COMMAND	0x0e	3c595.h	Write. BASE+0x0e is always a
3738	VX_STATUS	0x0e	3c595.h	Read. BASE+0x0e is always status
3739	VX_WINDOW	0x0f	3c595.h	Read. BASE+0x0f is always window
3740	VX_W0_EEPROM_DATA	0x0c	3c595.h
3741	VX_W0_EEPROM_COMMAND	0x0a	3c595.h
3742	VX_W0_RESOURCE_CFG	0x08	3c595.h
3743	VX_W0_ADDRESS_CFG	0x06	3c595.h
3744	VX_W0_CONFIG_CTRL	0x04	3c595.h
3745	VX_W0_PRODUCT_ID	0x02	3c595.h
3746	VX_W0_MFG_ID	0x00	3c595.h
3747	VX_W1_TX_PIO_WR_2	0x02	3c595.h
3748	VX_W1_TX_PIO_WR_1	0x00	3c595.h
3749	VX_W1_FREE_TX	0x0c	3c595.h
3750	VX_W1_TX_STATUS	0x0b	3c595.h	byte
3751	VX_W1_TIMER	0x0a	3c595.h	byte
3752	VX_W1_RX_STATUS	0x08	3c595.h
3753	VX_W1_RX_PIO_RD_2	0x02	3c595.h
3754	VX_W1_RX_PIO_RD_1	0x00	3c595.h
3755	VX_W2_ADDR_5	0x05	3c595.h
3756	VX_W2_ADDR_4	0x04	3c595.h
3757	VX_W2_ADDR_3	0x03	3c595.h
3758	VX_W2_ADDR_2	0x02	3c595.h
3759	VX_W2_ADDR_1	0x01	3c595.h
3760	VX_W2_ADDR_0	0x00	3c595.h
3761	VX_W3_INTERNAL_CFG	0x00	3c595.h
3762	VX_W3_RESET_OPT	0x08	3c595.h
3763	VX_W3_FREE_TX	0x0c	3c595.h
3764	VX_W3_FREE_RX	0x0a	3c595.h
3765	VX_W4_MEDIA_TYPE	0x0a	3c595.h
3766	VX_W4_CTRLR_STATUS	0x08	3c595.h
3767	VX_W4_NET_DIAG	0x06	3c595.h
3768	VX_W4_FIFO_DIAG	0x04	3c595.h
3769	VX_W4_HOST_DIAG	0x02	3c595.h
3770	VX_W4_TX_DIAG	0x00	3c595.h
3771	VX_W5_READ_0_MASK	0x0c	3c595.h
3772	VX_W5_INTR_MASK	0x0a	3c595.h
3773	VX_W5_RX_FILTER	0x08	3c595.h
3774	VX_W5_RX_EARLY_THRESH	0x06	3c595.h
3775	VX_W5_TX_AVAIL_THRESH	0x02	3c595.h
3776	VX_W5_TX_START_THRESH	0x00	3c595.h
3777	TX_TOTAL_OK	0x0c	3c595.h
3778	RX_TOTAL_OK	0x0a	3c595.h
3779	TX_DEFERRALS	0x08	3c595.h
3780	RX_FRAMES_OK	0x07	3c595.h
3781	TX_FRAMES_OK	0x06	3c595.h
3782	RX_OVERRUNS	0x05	3c595.h
3783	TX_COLLISIONS	0x04	3c595.h
3784	TX_AFTER_1_COLLISION	0x03	3c595.h
3785	TX_AFTER_X_COLLISIONS	0x02	3c595.h
3786	TX_NO_SQE	0x01	3c595.h
3787	TX_CD_LOST	0x00	3c595.h
3788	GLOBAL_RESET	(unsigned short) 0x0000	3c595.h	Wait at least 1ms
3789	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c595.h
3790	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c595.h	Read ADDR_CFG reg to
3791	RX_DISABLE	(unsigned short) (0x3<<11)	3c595.h	state disabled on
3792	RX_ENABLE	(unsigned short) (0x4<<11)	3c595.h
3793	RX_RESET	(unsigned short) (0x5<<11)	3c595.h
3794	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c595.h
3795	TX_ENABLE	(unsigned short) (0x9<<11)	3c595.h
3796	TX_DISABLE	(unsigned short) (0xa<<11)	3c595.h
3797	TX_RESET	(unsigned short) (0xb<<11)	3c595.h
3798	REQ_INTR	(unsigned short) (0xc<<11)	3c595.h
3799	ACK_INTR	(unsigned short) (0x6800)	3c595.h
3800	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c595.h
3801	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c595.h
3802	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c595.h
3803	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c595.h
3804	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c595.h
3805	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c595.h
3806	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c595.h
3807	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c595.h
3808	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c595.h
3809	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c595.h
3810	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c595.h
3811	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c595.h
3812	FIL_MULTICAST	(unsigned short) (0x02)	3c595.h
3813	FIL_BRDCST	(unsigned short) (0x04)	3c595.h
3814	FIL_PROMISC	(unsigned short) (0x08)	3c595.h
3815	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c595.h
3816	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c595.h
3817	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c595.h
3818	STATS_ENABLE	(unsigned short) (0x15<<11)	3c595.h
3819	STATS_DISABLE	(unsigned short) (0x16<<11)	3c595.h
3820	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c595.h
3821	S_INTR_LATCH	(unsigned short) (0x1)	3c595.h
3822	S_CARD_FAILURE	(unsigned short) (0x2)	3c595.h
3823	S_TX_COMPLETE	(unsigned short) (0x4)	3c595.h
3824	S_TX_AVAIL	(unsigned short) (0x8)	3c595.h
3825	S_RX_COMPLETE	(unsigned short) (0x10)	3c595.h
3826	S_RX_EARLY	(unsigned short) (0x20)	3c595.h
3827	S_INT_RQD	(unsigned short) (0x40)	3c595.h
3828	S_UPD_STATS	(unsigned short) (0x80)	3c595.h
3829	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c595.h
3830	VX_BUSY_WAIT	while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS)	3c595.h
3831	ACF_CONNECTOR_BITS	14	3c595.h
3832	ACF_CONNECTOR_UTP	0	3c595.h
3833	ACF_CONNECTOR_AUI	1	3c595.h
3834	ACF_CONNECTOR_BNC	3	3c595.h
3835	INTERNAL_CONNECTOR_BITS	20	3c595.h
3836	INTERNAL_CONNECTOR_MASK	0x01700000	3c595.h
3837	ERR_INCOMPLETE	(unsigned short) (0x8000)	3c595.h
3838	ERR_RX	(unsigned short) (0x4000)	3c595.h
3839	ERR_MASK	(unsigned short) (0x7800)	3c595.h
3840	ERR_OVERRUN	(unsigned short) (0x4000)	3c595.h
3841	ERR_RUNT	(unsigned short) (0x5800)	3c595.h
3842	ERR_ALIGNMENT	(unsigned short) (0x6000)	3c595.h
3843	ERR_CRC	(unsigned short) (0x6800)	3c595.h
3844	ERR_OVERSIZE	(unsigned short) (0x4800)	3c595.h
3845	ERR_DRIBBLE	(unsigned short) (0x1000)	3c595.h
3846	TXS_COMPLETE	0x80	3c595.h
3847	TXS_INTR_REQ	0x40	3c595.h
3848	TXS_JABBER	0x20	3c595.h
3849	TXS_UNDERRUN	0x10	3c595.h
3850	TXS_MAX_COLLISION	0x8	3c595.h
3851	TXS_STATUS_OVERFLOW	0x4	3c595.h
3852	RS_AUI	(1<<5)	3c595.h
3853	RS_BNC	(1<<4)	3c595.h
3854	RS_UTP	(1<<3)	3c595.h
3855	RS_T4	(1<<0)	3c595.h
3856	RS_TX	(1<<1)	3c595.h
3857	RS_FX	(1<<2)	3c595.h
3858	RS_MII	(1<<6)	3c595.h
3859	FIFOS_RX_RECEIVING	(unsigned short) 0x8000	3c595.h
3860	FIFOS_RX_UNDERRUN	(unsigned short) 0x2000	3c595.h
3861	FIFOS_RX_STATUS_OVERRUN	(unsigned short) 0x1000	3c595.h
3862	FIFOS_RX_OVERRUN	(unsigned short) 0x0800	3c595.h
3863	FIFOS_TX_OVERRUN	(unsigned short) 0x0400	3c595.h
3864	TAG_ADAPTER	0xd0	3c595.h
3865	ACTIVATE_ADAPTER_TO_CONFIG	0xff	3c595.h
3866	ENABLE_DRQ_IRQ	0x0001	3c595.h
3867	MFG_ID	0x506d	3c595.h	`TCM'
3868	PROD_ID	0x5090	3c595.h
3869	JABBER_GUARD_ENABLE	0x40	3c595.h
3870	LINKBEAT_ENABLE	0x80	3c595.h
3871	ENABLE_UTP	(JABBER_GUARD_ENABLE \| LINKBEAT_ENABLE)	3c595.h
3872	DISABLE_UTP	0x0	3c595.h
3873	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c595.h
3874	RX_ERROR	0x4000	3c595.h
3875	RX_INCOMPLETE	0x8000	3c595.h
3876	TX_INDICATE	1<<15	3c595.h
3877	VX_IOSIZE	0x20	3c595.h
3878	VX_CONNECTORS	8	3c595.h
3879	ASF_STAT	0x00	amd8111e.h	ASF status register
3880	CHIPID	0x04	amd8111e.h	Chip ID regsiter
3881	MIB_DATA	0x10	amd8111e.h	MIB data register
3882	MIB_ADDR	0x14	amd8111e.h	MIB address register
3883	STAT0	0x30	amd8111e.h	Status0 register
3884	INT0	0x38	amd8111e.h	Interrupt0 register
3885	INTEN0	0x40	amd8111e.h	Interrupt0 enable register
3886	CMD0	0x48	amd8111e.h	Command0 register
3887	CMD2	0x50	amd8111e.h	Command2 register
3888	CMD3	0x54	amd8111e.h	Command3 resiter
3889	CMD7	0x64	amd8111e.h	Command7 register
3890	CTRL1	0x6C	amd8111e.h	Control1 register
3891	CTRL2	0x70	amd8111e.h	Control2 register
3892	XMT_RING_LIMIT	0x7C	amd8111e.h	Transmit ring limit register
3893	AUTOPOLL0	0x88	amd8111e.h	Auto-poll0 register
3894	AUTOPOLL1	0x8A	amd8111e.h	Auto-poll1 register
3895	AUTOPOLL2	0x8C	amd8111e.h	Auto-poll2 register
3896	AUTOPOLL3	0x8E	amd8111e.h	Auto-poll3 register
3897	AUTOPOLL4	0x90	amd8111e.h	Auto-poll4 register
3898	AUTOPOLL5	0x92	amd8111e.h	Auto-poll5 register
3899	AP_VALUE	0x98	amd8111e.h	Auto-poll value register
3900	DLY_INT_A	0xA8	amd8111e.h	Group A delayed interrupt register
3901	DLY_INT_B	0xAC	amd8111e.h	Group B delayed interrupt register
3902	FLOW_CONTROL	0xC8	amd8111e.h	Flow control register
3903	PHY_ACCESS	0xD0	amd8111e.h	PHY access register
3904	STVAL	0xD8	amd8111e.h	Software timer value register
3905	XMT_RING_BASE_ADDR0	0x100	amd8111e.h	Transmit ring0 base addr register
3906	XMT_RING_BASE_ADDR1	0x108	amd8111e.h	Transmit ring1 base addr register
3907	XMT_RING_BASE_ADDR2	0x110	amd8111e.h	Transmit ring2 base addr register
3908	XMT_RING_BASE_ADDR3	0x118	amd8111e.h	Transmit ring2 base addr register
3909	RCV_RING_BASE_ADDR0	0x120	amd8111e.h	Transmit ring0 base addr register
3910	PMAT0	0x190	amd8111e.h	OnNow pattern register0
3911	PMAT1	0x194	amd8111e.h	OnNow pattern register1
3912	XMT_RING_LEN0	0x140	amd8111e.h	Transmit Ring0 length register
3913	XMT_RING_LEN1	0x144	amd8111e.h	Transmit Ring1 length register
3914	XMT_RING_LEN2	0x148	amd8111e.h	Transmit Ring2 length register
3915	XMT_RING_LEN3	0x14C	amd8111e.h	Transmit Ring3 length register
3916	RCV_RING_LEN0	0x150	amd8111e.h	Receive Ring0 length register
3917	SRAM_SIZE	0x178	amd8111e.h	SRAM size register
3918	SRAM_BOUNDARY	0x17A	amd8111e.h	SRAM boundary register
3919	PADR	0x160	amd8111e.h	Physical address register
3920	IFS1	0x18C	amd8111e.h	Inter-frame spacing Part1 register
3921	IFS	0x18D	amd8111e.h	Inter-frame spacing register
3922	IPG	0x18E	amd8111e.h	Inter-frame gap register
3923	LADRF	0x168	amd8111e.h	Logical address filter register
3924	PHY_SPEED_10	0x2	amd8111e.h
3925	PHY_SPEED_100	0x3	amd8111e.h
3926	rcv_miss_pkts	0x00	amd8111e.h
3927	rcv_octets	0x01	amd8111e.h
3928	rcv_broadcast_pkts	0x02	amd8111e.h
3929	rcv_multicast_pkts	0x03	amd8111e.h
3930	rcv_undersize_pkts	0x04	amd8111e.h
3931	rcv_oversize_pkts	0x05	amd8111e.h
3932	rcv_fragments	0x06	amd8111e.h
3933	rcv_jabbers	0x07	amd8111e.h
3934	rcv_unicast_pkts	0x08	amd8111e.h
3935	rcv_alignment_errors	0x09	amd8111e.h
3936	rcv_fcs_errors	0x0A	amd8111e.h
3937	rcv_good_octets	0x0B	amd8111e.h
3938	rcv_mac_ctrl	0x0C	amd8111e.h
3939	rcv_flow_ctrl	0x0D	amd8111e.h
3940	rcv_pkts_64_octets	0x0E	amd8111e.h
3941	rcv_pkts_65to127_octets	0x0F	amd8111e.h
3942	rcv_pkts_128to255_octets	0x10	amd8111e.h
3943	rcv_pkts_256to511_octets	0x11	amd8111e.h
3944	rcv_pkts_512to1023_octets	0x12	amd8111e.h
3945	rcv_pkts_1024to1518_octets	0x13	amd8111e.h
3946	rcv_unsupported_opcode	0x14	amd8111e.h
3947	rcv_symbol_errors	0x15	amd8111e.h
3948	rcv_drop_pkts_ring1	0x16	amd8111e.h
3949	rcv_drop_pkts_ring2	0x17	amd8111e.h
3950	rcv_drop_pkts_ring3	0x18	amd8111e.h
3951	rcv_drop_pkts_ring4	0x19	amd8111e.h
3952	rcv_jumbo_pkts	0x1A	amd8111e.h
3953	xmt_underrun_pkts	0x20	amd8111e.h
3954	xmt_octets	0x21	amd8111e.h
3955	xmt_packets	0x22	amd8111e.h
3956	xmt_broadcast_pkts	0x23	amd8111e.h
3957	xmt_multicast_pkts	0x24	amd8111e.h
3958	xmt_collisions	0x25	amd8111e.h
3959	xmt_unicast_pkts	0x26	amd8111e.h
3960	xmt_one_collision	0x27	amd8111e.h
3961	xmt_multiple_collision	0x28	amd8111e.h
3962	xmt_deferred_transmit	0x29	amd8111e.h
3963	xmt_late_collision	0x2A	amd8111e.h
3964	xmt_excessive_defer	0x2B	amd8111e.h
3965	xmt_loss_carrier	0x2C	amd8111e.h
3966	xmt_excessive_collision	0x2D	amd8111e.h
3967	xmt_back_pressure	0x2E	amd8111e.h
3968	xmt_flow_ctrl	0x2F	amd8111e.h
3969	xmt_pkts_64_octets	0x30	amd8111e.h
3970	xmt_pkts_65to127_octets	0x31	amd8111e.h
3971	xmt_pkts_128to255_octets	0x32	amd8111e.h
3972	xmt_pkts_256to511_octets	0x33	amd8111e.h
3973	xmt_pkts_512to1023_octets	0x34	amd8111e.h
3974	xmt_pkts_1024to1518_octet	0x35	amd8111e.h
3975	xmt_oversize_pkts	0x36	amd8111e.h
3976	xmt_jumbo_pkts	0x37	amd8111e.h
3977	DEFAULT_IPG	0x60	amd8111e.h
3978	IFS1_DELTA	36	amd8111e.h
3979	IPG_CONVERGE_JIFFIES	(HZ/2)	amd8111e.h
3980	IPG_STABLE_TIME	5	amd8111e.h
3981	MIN_IPG	96	amd8111e.h
3982	MAX_IPG	255	amd8111e.h
3983	IPG_STEP	16	amd8111e.h
3984	CSTATE	1	amd8111e.h
3985	SSTATE	2	amd8111e.h
3986	RESET_RX_FLAGS	0x0000	amd8111e.h
3987	TT_MASK	0x000c	amd8111e.h
3988	TCC_MASK	0x0003	amd8111e.h
3989	AMD8111E_REG_DUMP_LEN	13*sizeof(u32)	amd8111e.h
3990	CRC32	0xedb88320	amd8111e.h
3991	INITCRC	0xFFFFFFFF	amd8111e.h
3992	B44_DEVCTRL	0x0000UL	b44.h	Device Control
3993	DEVCTRL_MPM	0x00000040	b44.h	MP PME Enable (B0 only)
3994	DEVCTRL_PFE	0x00000080	b44.h	Pattern Filtering Enable
3995	DEVCTRL_IPP	0x00000400	b44.h	Internal EPHY Present
3996	DEVCTRL_EPR	0x00008000	b44.h	EPHY Reset
3997	DEVCTRL_PME	0x00001000	b44.h	PHY Mode Enable
3998	DEVCTRL_PMCE	0x00002000	b44.h	PHY Mode Clocks Enable
3999	DEVCTRL_PADDR	0x0007c000	b44.h	PHY Address
4000	DEVCTRL_PADDR_SHIFT	18	b44.h
4001	B44_BIST_STAT	0x000CUL	b44.h	Built-In Self-Test Status
4002	B44_WKUP_LEN	0x0010UL	b44.h	Wakeup Length
4003	WKUP_LEN_P0_MASK	0x0000007f	b44.h	Pattern 0
4004	WKUP_LEN_D0	0x00000080	b44.h
4005	WKUP_LEN_P1_MASK	0x00007f00	b44.h	Pattern 1
4006	WKUP_LEN_P1_SHIFT	8	b44.h
4007	WKUP_LEN_D1	0x00008000	b44.h
4008	WKUP_LEN_P2_MASK	0x007f0000	b44.h	Pattern 2
4009	WKUP_LEN_P2_SHIFT	16	b44.h
4010	WKUP_LEN_D2	0x00000000	b44.h
4011	WKUP_LEN_P3_MASK	0x7f000000	b44.h	Pattern 3
4012	WKUP_LEN_P3_SHIFT	24	b44.h
4013	WKUP_LEN_D3	0x80000000	b44.h
4014	WKUP_LEN_DISABLE	0x80808080	b44.h
4015	WKUP_LEN_ENABLE_TWO	0x80800000	b44.h
4016	WKUP_LEN_ENABLE_THREE	0x80000000	b44.h
4017	B44_ISTAT	0x0020UL	b44.h	Interrupt Status
4018	ISTAT_LS	0x00000020	b44.h	Link Change (B0 only)
4019	ISTAT_PME	0x00000040	b44.h	Power Management Event
4020	ISTAT_TO	0x00000080	b44.h	General Purpose Timeout
4021	ISTAT_DSCE	0x00000400	b44.h	Descriptor Error
4022	ISTAT_DATAE	0x00000800	b44.h	Data Error
4023	ISTAT_DPE	0x00001000	b44.h	Descr. Protocol Error
4024	ISTAT_RDU	0x00002000	b44.h	Receive Descr. Underflow
4025	ISTAT_RFO	0x00004000	b44.h	Receive FIFO Overflow
4026	ISTAT_TFU	0x00008000	b44.h	Transmit FIFO Underflow
4027	ISTAT_RX	0x00010000	b44.h	RX Interrupt
4028	ISTAT_TX	0x01000000	b44.h	TX Interrupt
4029	ISTAT_EMAC	0x04000000	b44.h	EMAC Interrupt
4030	ISTAT_MII_WRITE	0x08000000	b44.h	MII Write Interrupt
4031	ISTAT_MII_READ	0x10000000	b44.h	MII Read Interrupt
4032	ISTAT_ERRORS	(ISTAT_DSCE\|ISTAT_DATAE\|ISTAT_DPE\|\ ISTAT_RDU\|ISTAT_RFO\|ISTAT_TFU)	b44.h
4033	B44_IMASK	0x0024UL	b44.h	Interrupt Mask
4034	IMASK_DEF	(ISTAT_ERRORS \| ISTAT_RX \| ISTAT_TX)	b44.h
4035	IMASK_DISABLE	0	b44.h
4036	B44_GPTIMER	0x0028UL	b44.h	General Purpose Timer
4037	B44_ADDR_LO	0x0088UL	b44.h	ENET Address Lo (B0 only)
4038	B44_ADDR_HI	0x008CUL	b44.h	ENET Address Hi (B0 only)
4039	B44_FILT_ADDR	0x0090UL	b44.h	ENET Filter Address
4040	B44_FILT_DATA	0x0094UL	b44.h	ENET Filter Data
4041	B44_TXBURST	0x00A0UL	b44.h	TX Max Burst Length
4042	B44_RXBURST	0x00A4UL	b44.h	RX Max Burst Length
4043	B44_MAC_CTRL	0x00A8UL	b44.h	MAC Control
4044	MAC_CTRL_CRC32_ENAB	0x00000001	b44.h	CRC32 Generation Enable
4045	MAC_CTRL_PHY_PDOWN	0x00000004	b44.h	Onchip EPHY Powerdown
4046	MAC_CTRL_PHY_EDET	0x00000008	b44.h	Onchip EPHY Energy Detected
4047	MAC_CTRL_PHY_LEDCTRL	0x000000e0	b44.h	Onchip EPHY LED Control
4048	MAC_CTRL_PHY_LEDCTRL_SHIFT	5	b44.h
4049	B44_MAC_FLOW	0x00ACUL	b44.h	MAC Flow Control
4050	MAC_FLOW_RX_HI_WATER	0x000000ff	b44.h	Receive FIFO HI Water Mark
4051	MAC_FLOW_PAUSE_ENAB	0x00008000	b44.h	Enbl Pause Frm Generation
4052	B44_RCV_LAZY	0x0100UL	b44.h	Lazy Interrupt Control
4053	RCV_LAZY_TO_MASK	0x00ffffff	b44.h	Timeout
4054	RCV_LAZY_FC_MASK	0xff000000	b44.h	Frame Count
4055	RCV_LAZY_FC_SHIFT	24	b44.h
4056	B44_DMATX_CTRL	0x0200UL	b44.h	DMA TX Control
4057	DMATX_CTRL_ENABLE	0x00000001	b44.h	Enable
4058	DMATX_CTRL_SUSPEND	0x00000002	b44.h	Suepend Request
4059	DMATX_CTRL_LPBACK	0x00000004	b44.h	Loopback Enable
4060	DMATX_CTRL_FAIRPRIOR	0x00000008	b44.h	Fair Priority
4061	DMATX_CTRL_FLUSH	0x00000010	b44.h	Flush Request
4062	B44_DMATX_ADDR	0x0204UL	b44.h	DMA TX Descriptor Ring Addr
4063	B44_DMATX_PTR	0x0208UL	b44.h	DMA TX Last Posted Desc.
4064	B44_DMATX_STAT	0x020CUL	b44.h	DMA TX Cur Actve Desc. + Sts
4065	DMATX_STAT_CDMASK	0x00000fff	b44.h	Current Descriptor Mask
4066	DMATX_STAT_SMASK	0x0000f000	b44.h	State Mask
4067	DMATX_STAT_SDISABLED	0x00000000	b44.h	State Disabled
4068	DMATX_STAT_SACTIVE	0x00001000	b44.h	State Active
4069	DMATX_STAT_SIDLE	0x00002000	b44.h	State Idle Wait
4070	DMATX_STAT_SSTOPPED	0x00003000	b44.h	State Stopped
4071	DMATX_STAT_SSUSP	0x00004000	b44.h	State Suspend Pending
4072	DMATX_STAT_EMASK	0x000f0000	b44.h	Error Mask
4073	DMATX_STAT_ENONE	0x00000000	b44.h	Error None
4074	DMATX_STAT_EDPE	0x00010000	b44.h	Error Desc. Protocol Error
4075	DMATX_STAT_EDFU	0x00020000	b44.h	Error Data FIFO Underrun
4076	DMATX_STAT_EBEBR	0x00030000	b44.h	Bus Error on Buffer Read
4077	DMATX_STAT_EBEDA	0x00040000	b44.h	Bus Error on Desc. Access
4078	DMATX_STAT_FLUSHED	0x00100000	b44.h	Flushed
4079	B44_DMARX_CTRL	0x0210UL	b44.h	DMA RX Control
4080	DMARX_CTRL_ENABLE	0x00000001	b44.h	Enable
4081	DMARX_CTRL_ROMASK	0x000000fe	b44.h	Receive Offset Mask
4082	DMARX_CTRL_ROSHIFT	1	b44.h	Receive Offset Shift
4083	B44_DMARX_ADDR	0x0214UL	b44.h	DMA RX Descriptor Ring Addr
4084	B44_DMARX_PTR	0x0218UL	b44.h	DMA RX Last Posted Desc
4085	B44_DMARX_STAT	0x021CUL	b44.h	Cur Active Desc. + Status
4086	DMARX_STAT_CDMASK	0x00000fff	b44.h	Current Descriptor Mask
4087	DMARX_STAT_SMASK	0x0000f000	b44.h	State Mask
4088	DMARX_STAT_SDISABLED	0x00000000	b44.h	State Disbaled
4089	DMARX_STAT_SACTIVE	0x00001000	b44.h	State Active
4090	DMARX_STAT_SIDLE	0x00002000	b44.h	State Idle Wait
4091	DMARX_STAT_SSTOPPED	0x00003000	b44.h	State Stopped
4092	DMARX_STAT_EMASK	0x000f0000	b44.h	Error Mask
4093	DMARX_STAT_ENONE	0x00000000	b44.h	Error None
4094	DMARX_STAT_EDPE	0x00010000	b44.h	Error Desc. Protocol Error
4095	DMARX_STAT_EDFO	0x00020000	b44.h	Error Data FIFO Overflow
4096	DMARX_STAT_EBEBW	0x00030000	b44.h	Error on Buffer Write
4097	DMARX_STAT_EBEDA	0x00040000	b44.h	Bus Error on Desc. Access
4098	B44_DMAFIFO_AD	0x0220UL	b44.h	DMA FIFO Diag Address
4099	DMAFIFO_AD_OMASK	0x0000ffff	b44.h	Offset Mask
4100	DMAFIFO_AD_SMASK	0x000f0000	b44.h	Select Mask
4101	DMAFIFO_AD_SXDD	0x00000000	b44.h	Select Transmit DMA Data
4102	DMAFIFO_AD_SXDP	0x00010000	b44.h	Sel Transmit DMA Pointers
4103	DMAFIFO_AD_SRDD	0x00040000	b44.h	Select Receive DMA Data
4104	DMAFIFO_AD_SRDP	0x00050000	b44.h	Sel Receive DMA Pointers
4105	DMAFIFO_AD_SXFD	0x00080000	b44.h	Select Transmit FIFO Data
4106	DMAFIFO_AD_SXFP	0x00090000	b44.h	Sel Transmit FIFO Pointers
4107	DMAFIFO_AD_SRFD	0x000c0000	b44.h	Select Receive FIFO Data
4108	DMAFIFO_AD_SRFP	0x000c0000	b44.h	Sel Receive FIFO Pointers
4109	B44_DMAFIFO_LO	0x0224UL	b44.h	DMA FIFO Diag Low Data
4110	B44_DMAFIFO_HI	0x0228UL	b44.h	DMA FIFO Diag High Data
4111	B44_RXCONFIG	0x0400UL	b44.h	EMAC RX Config
4112	RXCONFIG_DBCAST	0x00000001	b44.h	Disable Broadcast
4113	RXCONFIG_ALLMULTI	0x00000002	b44.h	Accept All Multicast
4114	RXCONFIG_NORX_WHILE_TX	0x00000004	b44.h	Rcv Disble While TX
4115	RXCONFIG_PROMISC	0x00000008	b44.h	Promiscuous Enable
4116	RXCONFIG_LPBACK	0x00000010	b44.h	Loopback Enable
4117	RXCONFIG_FLOW	0x00000020	b44.h	Flow Control Enable
4118	RXCONFIG_FLOW_ACCEPT	0x00000040	b44.h	Accept UFC Frame
4119	RXCONFIG_RFILT	0x00000080	b44.h	Reject Filter
4120	B44_RXMAXLEN	0x0404UL	b44.h	EMAC RX Max Packet Length
4121	B44_TXMAXLEN	0x0408UL	b44.h	EMAC TX Max Packet Length
4122	B44_MDIO_CTRL	0x0410UL	b44.h	EMAC MDIO Control
4123	MDIO_CTRL_MAXF_MASK	0x0000007f	b44.h	MDC Frequency
4124	MDIO_CTRL_PREAMBLE	0x00000080	b44.h	MII Preamble Enable
4125	B44_MDIO_DATA	0x0414UL	b44.h	EMAC MDIO Data
4126	MDIO_DATA_DATA	0x0000ffff	b44.h	R/W Data
4127	MDIO_DATA_TA_MASK	0x00030000	b44.h	Turnaround Value
4128	MDIO_DATA_TA_SHIFT	16	b44.h
4129	MDIO_TA_VALID	2	b44.h
4130	MDIO_DATA_RA_MASK	0x007c0000	b44.h	Register Address
4131	MDIO_DATA_RA_SHIFT	18	b44.h
4132	MDIO_DATA_PMD_MASK	0x0f800000	b44.h	Physical Media Device
4133	MDIO_DATA_PMD_SHIFT	23	b44.h
4134	MDIO_DATA_OP_MASK	0x30000000	b44.h	Opcode
4135	MDIO_DATA_OP_SHIFT	28	b44.h
4136	MDIO_OP_WRITE	1	b44.h
4137	MDIO_OP_READ	2	b44.h
4138	MDIO_DATA_SB_MASK	0xc0000000	b44.h	Start Bits
4139	MDIO_DATA_SB_SHIFT	30	b44.h
4140	MDIO_DATA_SB_START	0x40000000	b44.h	Start Of Frame
4141	B44_EMAC_IMASK	0x0418UL	b44.h	EMAC Interrupt Mask
4142	B44_EMAC_ISTAT	0x041CUL	b44.h	EMAC Interrupt Status
4143	EMAC_INT_MII	0x00000001	b44.h	MII MDIO Interrupt
4144	EMAC_INT_MIB	0x00000002	b44.h	MIB Interrupt
4145	EMAC_INT_FLOW	0x00000003	b44.h	Flow Control Interrupt
4146	B44_CAM_DATA_LO	0x0420UL	b44.h	EMAC CAM Data Low
4147	B44_CAM_DATA_HI	0x0424UL	b44.h	EMAC CAM Data High
4148	CAM_DATA_HI_VALID	0x00010000	b44.h	Valid Bit
4149	B44_CAM_CTRL	0x0428UL	b44.h	EMAC CAM Control
4150	CAM_CTRL_ENABLE	0x00000001	b44.h	CAM Enable
4151	CAM_CTRL_MSEL	0x00000002	b44.h	Mask Select
4152	CAM_CTRL_READ	0x00000004	b44.h	Read
4153	CAM_CTRL_WRITE	0x00000008	b44.h	Read
4154	CAM_CTRL_INDEX_MASK	0x003f0000	b44.h	Index Mask
4155	CAM_CTRL_INDEX_SHIFT	16	b44.h
4156	CAM_CTRL_BUSY	0x80000000	b44.h	CAM Busy
4157	B44_ENET_CTRL	0x042CUL	b44.h	EMAC ENET Control
4158	ENET_CTRL_ENABLE	0x00000001	b44.h	EMAC Enable
4159	ENET_CTRL_DISABLE	0x00000002	b44.h	EMAC Disable
4160	ENET_CTRL_SRST	0x00000004	b44.h	EMAC Soft Reset
4161	ENET_CTRL_EPSEL	0x00000008	b44.h	External PHY Select
4162	B44_TX_CTRL	0x0430UL	b44.h	EMAC TX Control
4163	TX_CTRL_DUPLEX	0x00000001	b44.h	Full Duplex
4164	TX_CTRL_FMODE	0x00000002	b44.h	Flow Mode
4165	TX_CTRL_SBENAB	0x00000004	b44.h	Single Backoff Enable
4166	TX_CTRL_SMALL_SLOT	0x00000008	b44.h	Small Slottime
4167	B44_TX_HIWMARK	0x0434UL	b44.h	EMAC TX High Watermark
4168	TX_HIWMARK_DEFLT	56	b44.h	Default used in all drivers
4169	B44_MIB_CTRL	0x0438UL	b44.h	EMAC MIB Control
4170	MIB_CTRL_CLR_ON_READ	0x00000001	b44.h	Autoclear on Read
4171	B44_TX_GOOD_O	0x0500UL	b44.h	MIB TX Good Octets
4172	B44_TX_GOOD_P	0x0504UL	b44.h	MIB TX Good Packets
4173	B44_TX_O	0x0508UL	b44.h	MIB TX Octets
4174	B44_TX_P	0x050CUL	b44.h	MIB TX Packets
4175	B44_TX_BCAST	0x0510UL	b44.h	MIB TX Broadcast Packets
4176	B44_TX_MCAST	0x0514UL	b44.h	MIB TX Multicast Packets
4177	B44_TX_64	0x0518UL	b44.h	MIB TX <= 64 byte Packets
4178	B44_TX_65_127	0x051CUL	b44.h	MIB TX 65 to 127 byte Pkts
4179	B44_TX_128_255	0x0520UL	b44.h	MIB TX 128 to 255 byte Pkts
4180	B44_TX_256_511	0x0524UL	b44.h	MIB TX 256 to 511 byte Pkts
4181	B44_TX_512_1023	0x0528UL	b44.h	MIB TX 512 to 1023 byte Pkts
4182	B44_TX_1024_MAX	0x052CUL	b44.h	MIB TX 1024 to max byte Pkts
4183	B44_TX_JABBER	0x0530UL	b44.h	MIB TX Jabber Packets
4184	B44_TX_OSIZE	0x0534UL	b44.h	MIB TX Oversize Packets
4185	B44_TX_FRAG	0x0538UL	b44.h	MIB TX Fragment Packets
4186	B44_TX_URUNS	0x053CUL	b44.h	MIB TX Underruns
4187	B44_TX_TCOLS	0x0540UL	b44.h	MIB TX Total Collisions
4188	B44_TX_SCOLS	0x0544UL	b44.h	MIB TX Single Collisions
4189	B44_TX_MCOLS	0x0548UL	b44.h	MIB TX Multiple Collisions
4190	B44_TX_ECOLS	0x054CUL	b44.h	MIB TX Excessive Collisions
4191	B44_TX_LCOLS	0x0550UL	b44.h	MIB TX Late Collisions
4192	B44_TX_DEFERED	0x0554UL	b44.h	MIB TX Defered Packets
4193	B44_TX_CLOST	0x0558UL	b44.h	MIB TX Carrier Lost
4194	B44_TX_PAUSE	0x055CUL	b44.h	MIB TX Pause Packets
4195	B44_RX_GOOD_O	0x0580UL	b44.h	MIB RX Good Octets
4196	B44_RX_GOOD_P	0x0584UL	b44.h	MIB RX Good Packets
4197	B44_RX_O	0x0588UL	b44.h	MIB RX Octets
4198	B44_RX_P	0x058CUL	b44.h	MIB RX Packets
4199	B44_RX_BCAST	0x0590UL	b44.h	MIB RX Broadcast Packets
4200	B44_RX_MCAST	0x0594UL	b44.h	MIB RX Multicast Packets
4201	B44_RX_64	0x0598UL	b44.h	MIB RX <= 64 byte Packets
4202	B44_RX_65_127	0x059CUL	b44.h	MIB RX 65 to 127 byte Pkts
4203	B44_RX_128_255	0x05A0UL	b44.h	MIB RX 128 to 255 byte Pkts
4204	B44_RX_256_511	0x05A4UL	b44.h	MIB RX 256 to 511 byte Pkts
4205	B44_RX_512_1023	0x05A8UL	b44.h	MIB RX 512 to 1023 byte Pkts
4206	B44_RX_1024_MAX	0x05ACUL	b44.h	MIB RX 1024 to max byte Pkts
4207	B44_RX_JABBER	0x05B0UL	b44.h	MIB RX Jabber Packets
4208	B44_RX_OSIZE	0x05B4UL	b44.h	MIB RX Oversize Packets
4209	B44_RX_FRAG	0x05B8UL	b44.h	MIB RX Fragment Packets
4210	B44_RX_MISS	0x05BCUL	b44.h	MIB RX Missed Packets
4211	B44_RX_CRCA	0x05C0UL	b44.h	MIB RX CRC Align Errors
4212	B44_RX_USIZE	0x05C4UL	b44.h	MIB RX Undersize Packets
4213	B44_RX_CRC	0x05C8UL	b44.h	MIB RX CRC Errors
4214	B44_RX_ALIGN	0x05CCUL	b44.h	MIB RX Align Errors
4215	B44_RX_SYM	0x05D0UL	b44.h	MIB RX Symbol Errors
4216	B44_RX_PAUSE	0x05D4UL	b44.h	MIB RX Pause Packets
4217	B44_RX_NPAUSE	0x05D8UL	b44.h	MIB RX Non-Pause Packets
4218	B44_SBIMSTATE	0x0F90UL	b44.h	SB Initiator Agent State
4219	SBIMSTATE_PC	0x0000000f	b44.h	Pipe Count
4220	SBIMSTATE_AP_MASK	0x00000030	b44.h	Arbitration Priority
4221	SBIMSTATE_AP_BOTH	0x00000000	b44.h	both timeslices and token
4222	SBIMSTATE_AP_TS	0x00000010	b44.h	Use timeslices only
4223	SBIMSTATE_AP_TK	0x00000020	b44.h	Use token only
4224	SBIMSTATE_AP_RSV	0x00000030	b44.h	Reserved
4225	SBIMSTATE_IBE	0x00020000	b44.h	In Band Error
4226	SBIMSTATE_TO	0x00040000	b44.h	Timeout
4227	SBIMSTATE_BAD	( SBIMSTATE_IBE \| SBIMSTATE_TO )	b44.h
4228	B44_SBINTVEC	0x0F94UL	b44.h	SB Interrupt Mask
4229	SBINTVEC_PCI	0x00000001	b44.h	Enable interrupts for PCI
4230	SBINTVEC_ENET0	0x00000002	b44.h	Enable ints for enet 0
4231	SBINTVEC_ILINE20	0x00000004	b44.h	Enable ints for iline20
4232	SBINTVEC_CODEC	0x00000008	b44.h	Enable ints for v90 codec
4233	SBINTVEC_USB	0x00000010	b44.h	Enable intts for usb
4234	SBINTVEC_EXTIF	0x00000020	b44.h	Enable ints for ext i/f
4235	SBINTVEC_ENET1	0x00000040	b44.h	Enable ints for enet 1
4236	B44_SBTMSLOW	0x0F98UL	b44.h	SB Target State Low
4237	SBTMSLOW_RESET	0x00000001	b44.h	Reset
4238	SBTMSLOW_REJECT	0x00000002	b44.h	Reject
4239	SBTMSLOW_CLOCK	0x00010000	b44.h	Clock Enable
4240	SBTMSLOW_FGC	0x00020000	b44.h	Force Gated Clocks On
4241	SBTMSLOW_PE	0x40000000	b44.h	Power Management Enable
4242	SBTMSLOW_BE	0x80000000	b44.h	BIST Enable
4243	B44_SBTMSHIGH	0x0F9CUL	b44.h	SB Target State High
4244	SBTMSHIGH_SERR	0x00000001	b44.h	S-error
4245	SBTMSHIGH_INT	0x00000002	b44.h	Interrupt
4246	SBTMSHIGH_BUSY	0x00000004	b44.h	Busy
4247	SBTMSHIGH_GCR	0x20000000	b44.h	Gated Clock Request
4248	SBTMSHIGH_BISTF	0x40000000	b44.h	BIST Failed
4249	SBTMSHIGH_BISTD	0x80000000	b44.h	BIST Done
4250	B44_SBIDHIGH	0x0FFCUL	b44.h	SB Identification High
4251	SBIDHIGH_RC_MASK	0x0000000f	b44.h	Revision Code
4252	SBIDHIGH_CC_MASK	0x0000fff0	b44.h	Core Code
4253	SBIDHIGH_CC_SHIFT	4	b44.h
4254	SBIDHIGH_VC_MASK	0xffff0000	b44.h	Vendor Code
4255	SBIDHIGH_VC_SHIFT	16	b44.h
4256	SSB_PMCSR	0x44	b44.h
4257	SSB_PE	0x100	b44.h
4258	SSB_BAR0_WIN	0x80	b44.h
4259	SSB_BAR1_WIN	0x84	b44.h
4260	SSB_SPROM_CONTROL	0x88	b44.h
4261	SSB_BAR1_CONTROL	0x8c	b44.h
4262	SSB_CONTROL	0x0000UL	b44.h
4263	SSB_ARBCONTROL	0x0010UL	b44.h
4264	SSB_ISTAT	0x0020UL	b44.h
4265	SSB_IMASK	0x0024UL	b44.h
4266	SSB_MBOX	0x0028UL	b44.h
4267	SSB_BCAST_ADDR	0x0050UL	b44.h
4268	SSB_BCAST_DATA	0x0054UL	b44.h
4269	SSB_PCI_TRANS_0	0x0100UL	b44.h
4270	SSB_PCI_TRANS_1	0x0104UL	b44.h
4271	SSB_PCI_TRANS_2	0x0108UL	b44.h
4272	SSB_SPROM	0x0800UL	b44.h
4273	SSB_PCI_MEM	0x00000000	b44.h
4274	SSB_PCI_IO	0x00000001	b44.h
4275	SSB_PCI_CFG0	0x00000002	b44.h
4276	SSB_PCI_CFG1	0x00000003	b44.h
4277	SSB_PCI_PREF	0x00000004	b44.h
4278	SSB_PCI_BURST	0x00000008	b44.h
4279	SSB_PCI_MASK0	0xfc000000	b44.h
4280	SSB_PCI_MASK1	0xfc000000	b44.h
4281	SSB_PCI_MASK2	0xc0000000	b44.h
4282	B44_MII_AUXCTRL	24	b44.h	Auxiliary Control
4283	MII_AUXCTRL_DUPLEX	0x0001	b44.h	Full Duplex
4284	MII_AUXCTRL_SPEED	0x0002	b44.h	1=100Mbps, 0=10Mbps
4285	MII_AUXCTRL_FORCED	0x0004	b44.h	Forced 10/100
4286	B44_MII_ALEDCTRL	26	b44.h	Activity LED
4287	MII_ALEDCTRL_ALLMSK	0x7fff	b44.h
4288	B44_MII_TLEDCTRL	27	b44.h	Traffic Meter LED
4289	MII_TLEDCTRL_ENABLE	0x0040	b44.h
4290	B44_DMA_ALIGNMENT	4096	b44.h
4291	B44_30BIT_DMA_MASK	0x3fffffff	b44.h
4292	DESC_CTRL_LEN	0x00001fff	b44.h
4293	DESC_CTRL_CMASK	0x0ff00000	b44.h	Core specific bits
4294	DESC_CTRL_EOT	0x10000000	b44.h	End of Table
4295	DESC_CTRL_IOC	0x20000000	b44.h	Interrupt On Completion
4296	DESC_CTRL_EOF	0x40000000	b44.h	End of Frame
4297	DESC_CTRL_SOF	0x80000000	b44.h	Start of Frame
4298	RX_HEADER_LEN	28	b44.h
4299	RX_FLAG_OFIFO	0x00000001	b44.h	FIFO Overflow
4300	RX_FLAG_CRCERR	0x00000002	b44.h	CRC Error
4301	RX_FLAG_SERR	0x00000004	b44.h	Receive Symbol Error
4302	RX_FLAG_ODD	0x00000008	b44.h	Frame has odd number of nibbles
4303	RX_FLAG_LARGE	0x00000010	b44.h	Frame is > RX MAX Length
4304	RX_FLAG_MCAST	0x00000020	b44.h	Dest is Multicast Address
4305	RX_FLAG_BCAST	0x00000040	b44.h	Dest is Broadcast Address
4306	RX_FLAG_MISS	0x00000080	b44.h	Received due to promisc mode
4307	RX_FLAG_LAST	0x00000800	b44.h	Last buffer in frame
4308	RX_FLAG_ERRORS	(RX_FLAG_ODD \| RX_FLAG_SERR \|\ RX_FLAG_CRCERR \| RX_FLAG_OFIFO)	b44.h
4309	SB_PCI_DMA	0x40000000	b44.h
4310	BCM4400_PCI_CORE_ADDR	0x18002000	b44.h
4311	B44_MIN_MTU	60	b44.h
4312	B44_MAX_MTU	1500	b44.h
4313	B44_RING_SIZE	8	b44.h
4314	B44_RING_LAST	( B44_RING_SIZE - 1 )	b44.h
4315	B44_RX_RING_LEN_BYTES	( sizeof bp->rx[0] * B44_RING_SIZE )	b44.h
4316	B44_TX_RING_LEN_BYTES	( sizeof bp->tx[0] * B44_RING_SIZE )	b44.h
4317	RX_PKT_OFFSET	30	b44.h
4318	RX_PKT_BUF_SZ	(1536 + RX_PKT_OFFSET + 64)	b44.h
4319	B44_FULL_RESET	1	b44.h
4320	B44_FULL_RESET_SKIP_PHY	2	b44.h
4321	B44_PARTIAL_RESET	3	b44.h
4322	B44_CHIP_RESET_FULL	4	b44.h
4323	B44_CHIP_RESET_PARTIAL	5	b44.h
4324	SSB_CORE_DOWN	( SBTMSLOW_RESET \| SBTMSLOW_REJECT )	b44.h
4325	B44_REGS_SIZE	8192	b44.h
4326	L1_CACHE_BYTES	128	bnx2.h	Rough approximaition of the cache line size
4327	PCI_D0	((pci_power_t) 0)	bnx2.h
4328	PCI_D1	((pci_power_t) 1)	bnx2.h
4329	PCI_D2	((pci_power_t) 2)	bnx2.h
4330	PCI_D3hot	((pci_power_t) 3)	bnx2.h
4331	PCI_D3cold	((pci_power_t) 4)	bnx2.h
4332	PCI_UNKNOWN	((pci_power_t) 5)	bnx2.h
4333	PCI_POWER_ERROR	((pci_power_t) -1)	bnx2.h
4334	PCI_CAP_ID_PCIX	0x07	bnx2.h	PCI-X
4335	PCI_X_CMD	2	bnx2.h	Modes & Features
4336	PCI_X_CMD_ERO	0x0002	bnx2.h	Enable Relaxed Ordering
4337	ADVERTISED_10baseT_Half	(1 << 0)	bnx2.h
4338	ADVERTISED_10baseT_Full	(1 << 1)	bnx2.h
4339	ADVERTISED_100baseT_Half	(1 << 2)	bnx2.h
4340	ADVERTISED_100baseT_Full	(1 << 3)	bnx2.h
4341	ADVERTISED_1000baseT_Half	(1 << 4)	bnx2.h
4342	ADVERTISED_1000baseT_Full	(1 << 5)	bnx2.h
4343	ADVERTISED_Autoneg	(1 << 6)	bnx2.h
4344	ADVERTISED_TP	(1 << 7)	bnx2.h
4345	ADVERTISED_AUI	(1 << 8)	bnx2.h
4346	ADVERTISED_MII	(1 << 9)	bnx2.h
4347	ADVERTISED_FIBRE	(1 << 10)	bnx2.h
4348	ADVERTISED_BNC	(1 << 11)	bnx2.h
4349	DUPLEX_HALF	0x00	bnx2.h
4350	DUPLEX_FULL	0x01	bnx2.h
4351	DUPLEX_INVALID	0x02	bnx2.h
4352	PORT_TP	0x00	bnx2.h
4353	PORT_AUI	0x01	bnx2.h
4354	PORT_MII	0x02	bnx2.h
4355	PORT_FIBRE	0x03	bnx2.h
4356	PORT_BNC	0x04	bnx2.h
4357	XCVR_INTERNAL	0x00	bnx2.h
4358	XCVR_EXTERNAL	0x01	bnx2.h
4359	XCVR_DUMMY1	0x02	bnx2.h
4360	XCVR_DUMMY2	0x03	bnx2.h
4361	XCVR_DUMMY3	0x04	bnx2.h
4362	AUTONEG_DISABLE	0x00	bnx2.h
4363	AUTONEG_ENABLE	0x01	bnx2.h
4364	WAKE_PHY	(1 << 0)	bnx2.h
4365	WAKE_UCAST	(1 << 1)	bnx2.h
4366	WAKE_MCAST	(1 << 2)	bnx2.h
4367	WAKE_BCAST	(1 << 3)	bnx2.h
4368	WAKE_ARP	(1 << 4)	bnx2.h
4369	WAKE_MAGIC	(1 << 5)	bnx2.h
4370	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
4371	MII_BMCR	0x00	bnx2.h	Basic mode control register
4372	MII_BMSR	0x01	bnx2.h	Basic mode status register
4373	MII_PHYSID1	0x02	bnx2.h	PHYS ID 1
4374	MII_PHYSID2	0x03	bnx2.h	PHYS ID 2
4375	MII_ADVERTISE	0x04	bnx2.h	Advertisement control reg
4376	MII_LPA	0x05	bnx2.h	Link partner ability reg
4377	MII_EXPANSION	0x06	bnx2.h	Expansion register
4378	MII_CTRL1000	0x09	bnx2.h	1000BASE-T control
4379	MII_STAT1000	0x0a	bnx2.h	1000BASE-T status
4380	MII_DCOUNTER	0x12	bnx2.h	Disconnect counter
4381	MII_FCSCOUNTER	0x13	bnx2.h	False carrier counter
4382	MII_NWAYTEST	0x14	bnx2.h	N-way auto-neg test reg
4383	MII_RERRCOUNTER	0x15	bnx2.h	Receive error counter
4384	MII_SREVISION	0x16	bnx2.h	Silicon revision
4385	MII_RESV1	0x17	bnx2.h	Reserved...
4386	MII_LBRERROR	0x18	bnx2.h	Lpback, rx, bypass error
4387	MII_PHYADDR	0x19	bnx2.h	PHY address
4388	MII_RESV2	0x1a	bnx2.h	Reserved...
4389	MII_TPISTATUS	0x1b	bnx2.h	TPI status for 10mbps
4390	MII_NCONFIG	0x1c	bnx2.h	Network interface config
4391	BMCR_RESV	0x007f	bnx2.h	Unused...
4392	BMCR_SPEED1000	0x0040	bnx2.h	MSB of Speed (1000)
4393	BMCR_CTST	0x0080	bnx2.h	Collision test
4394	BMCR_FULLDPLX	0x0100	bnx2.h	Full duplex
4395	BMCR_ANRESTART	0x0200	bnx2.h	Auto negotiation restart
4396	BMCR_ISOLATE	0x0400	bnx2.h	Disconnect DP83840 from MII
4397	BMCR_PDOWN	0x0800	bnx2.h	Powerdown the DP83840
4398	BMCR_ANENABLE	0x1000	bnx2.h	Enable auto negotiation
4399	BMCR_SPEED100	0x2000	bnx2.h	Select 100Mbps
4400	BMCR_LOOPBACK	0x4000	bnx2.h	TXD loopback bits
4401	BMCR_RESET	0x8000	bnx2.h	Reset the DP83840
4402	BMSR_ERCAP	0x0001	bnx2.h	Ext-reg capability
4403	BMSR_JCD	0x0002	bnx2.h	Jabber detected
4404	BMSR_LSTATUS	0x0004	bnx2.h	Link status
4405	BMSR_ANEGCAPABLE	0x0008	bnx2.h	Able to do auto-negotiation
4406	BMSR_RFAULT	0x0010	bnx2.h	Remote fault detected
4407	BMSR_ANEGCOMPLETE	0x0020	bnx2.h	Auto-negotiation complete
4408	BMSR_RESV	0x07c0	bnx2.h	Unused...
4409	BMSR_10HALF	0x0800	bnx2.h	Can do 10mbps, half-duplex
4410	BMSR_10FULL	0x1000	bnx2.h	Can do 10mbps, full-duplex
4411	BMSR_100HALF	0x2000	bnx2.h	Can do 100mbps, half-duplex
4412	BMSR_100FULL	0x4000	bnx2.h	Can do 100mbps, full-duplex
4413	BMSR_100BASE4	0x8000	bnx2.h	Can do 100mbps, 4k packets
4414	ADVERTISE_SLCT	0x001f	bnx2.h	Selector bits
4415	ADVERTISE_CSMA	0x0001	bnx2.h	Only selector supported
4416	ADVERTISE_10HALF	0x0020	bnx2.h	Try for 10mbps half-duplex
4417	ADVERTISE_10FULL	0x0040	bnx2.h	Try for 10mbps full-duplex
4418	ADVERTISE_100HALF	0x0080	bnx2.h	Try for 100mbps half-duplex
4419	ADVERTISE_100FULL	0x0100	bnx2.h	Try for 100mbps full-duplex
4420	ADVERTISE_100BASE4	0x0200	bnx2.h	Try for 100mbps 4k packets
4421	ADVERTISE_RESV	0x1c00	bnx2.h	Unused...
4422	ADVERTISE_RFAULT	0x2000	bnx2.h	Say we can detect faults
4423	ADVERTISE_LPACK	0x4000	bnx2.h	Ack link partners response
4424	ADVERTISE_NPAGE	0x8000	bnx2.h	Next page bit
4425	ADVERTISE_1000XFULL	0x0020	bnx2.h	Try for 1000BASE-X full-duplex
4426	ADVERTISE_10FULL	0x0040	bnx2.h	Try for 10mbps full-duplex
4427	ADVERTISE_1000XHALF	0x0040	bnx2.h	Try for 1000BASE-X half-duplex
4428	ADVERTISE_1000XPAUSE	0x0080	bnx2.h	Try for 1000BASE-X pause
4429	ADVERTISE_PAUSE_CAP	0x0400	bnx2.h	Try for pause
4430	ADVERTISE_1000XPSE_ASYM	0x0100	bnx2.h	Try for 1000BASE-X asym pause
4431	ADVERTISE_PAUSE_ASYM	0x0800	bnx2.h	Try for asymetric pause
4432	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	bnx2.h
4433	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	bnx2.h
4434	LPA_SLCT	0x001f	bnx2.h	Same as advertise selector
4435	LPA_10HALF	0x0020	bnx2.h	Can do 10mbps half-duplex
4436	LPA_10FULL	0x0040	bnx2.h	Can do 10mbps full-duplex
4437	LPA_100HALF	0x0080	bnx2.h	Can do 100mbps half-duplex
4438	LPA_100FULL	0x0100	bnx2.h	Can do 100mbps full-duplex
4439	LPA_100BASE4	0x0200	bnx2.h	Can do 100mbps 4k packets
4440	LPA_RESV	0x1c00	bnx2.h	Unused...
4441	LPA_RFAULT	0x2000	bnx2.h	Link partner faulted
4442	LPA_LPACK	0x4000	bnx2.h	Link partner acked us
4443	LPA_NPAGE	0x8000	bnx2.h	Next page bit
4444	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	bnx2.h
4445	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	bnx2.h
4446	EXPANSION_NWAY	0x0001	bnx2.h	Can do N-way auto-nego
4447	EXPANSION_LCWP	0x0002	bnx2.h	Got new RX page code word
4448	EXPANSION_ENABLENPAGE	0x0004	bnx2.h	This enables npage words
4449	EXPANSION_NPCAPABLE	0x0008	bnx2.h	Link partner supports npage
4450	EXPANSION_MFAULTS	0x0010	bnx2.h	Multiple faults detected
4451	EXPANSION_RESV	0xffe0	bnx2.h	Unused...
4452	ADVERTISE_1000FULL	0x0200	bnx2.h	Advertise 1000BASE-T full duplex
4453	ADVERTISE_1000HALF	0x0100	bnx2.h	Advertise 1000BASE-T half duplex
4454	NWAYTEST_RESV1	0x00ff	bnx2.h	Unused...
4455	NWAYTEST_LOOPBACK	0x0100	bnx2.h	Enable loopback for N-way
4456	NWAYTEST_RESV2	0xfe00	bnx2.h	Unused...
4457	SPEED_10	10	bnx2.h
4458	SPEED_100	100	bnx2.h
4459	SPEED_1000	1000	bnx2.h
4460	SPEED_2500	2500	bnx2.h
4461	SPEED_INVALID	0	bnx2.h	XXX was 3
4462	DUPLEX_HALF	0x00	bnx2.h
4463	DUPLEX_FULL	0x01	bnx2.h
4464	DUPLEX_INVALID	0x02	bnx2.h
4465	PORT_TP	0x00	bnx2.h
4466	PORT_AUI	0x01	bnx2.h
4467	PORT_MII	0x02	bnx2.h
4468	PORT_FIBRE	0x03	bnx2.h
4469	PORT_BNC	0x04	bnx2.h
4470	XCVR_INTERNAL	0x00	bnx2.h
4471	XCVR_EXTERNAL	0x01	bnx2.h
4472	XCVR_DUMMY1	0x02	bnx2.h
4473	XCVR_DUMMY2	0x03	bnx2.h
4474	XCVR_DUMMY3	0x04	bnx2.h
4475	AUTONEG_DISABLE	0x00	bnx2.h
4476	AUTONEG_ENABLE	0x01	bnx2.h
4477	WAKE_PHY	(1 << 0)	bnx2.h
4478	WAKE_UCAST	(1 << 1)	bnx2.h
4479	WAKE_MCAST	(1 << 2)	bnx2.h
4480	WAKE_BCAST	(1 << 3)	bnx2.h
4481	WAKE_ARP	(1 << 4)	bnx2.h
4482	WAKE_MAGIC	(1 << 5)	bnx2.h
4483	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
4484	BNX2_L2CTX_TYPE	0x00000000	bnx2.h
4485	BNX2_L2CTX_TYPE_SIZE_L2	((0xc0/0x20)<<16)	bnx2.h
4486	BNX2_L2CTX_TYPE_TYPE	(0xf<<28)	bnx2.h
4487	BNX2_L2CTX_TYPE_TYPE_EMPTY	(0<<28)	bnx2.h
4488	BNX2_L2CTX_TYPE_TYPE_L2	(1<<28)	bnx2.h
4489	BNX2_L2CTX_TX_HOST_BIDX	0x00000088	bnx2.h
4490	BNX2_L2CTX_EST_NBD	0x00000088	bnx2.h
4491	BNX2_L2CTX_CMD_TYPE	0x00000088	bnx2.h
4492	BNX2_L2CTX_CMD_TYPE_TYPE	(0xf<<24)	bnx2.h
4493	BNX2_L2CTX_CMD_TYPE_TYPE_L2	(0<<24)	bnx2.h
4494	BNX2_L2CTX_CMD_TYPE_TYPE_TCP	(1<<24)	bnx2.h
4495	BNX2_L2CTX_TX_HOST_BSEQ	0x00000090	bnx2.h
4496	BNX2_L2CTX_TSCH_BSEQ	0x00000094	bnx2.h
4497	BNX2_L2CTX_TBDR_BSEQ	0x00000098	bnx2.h
4498	BNX2_L2CTX_TBDR_BOFF	0x0000009c	bnx2.h
4499	BNX2_L2CTX_TBDR_BIDX	0x0000009c	bnx2.h
4500	BNX2_L2CTX_TBDR_BHADDR_HI	0x000000a0	bnx2.h
4501	BNX2_L2CTX_TBDR_BHADDR_LO	0x000000a4	bnx2.h
4502	BNX2_L2CTX_TXP_BOFF	0x000000a8	bnx2.h
4503	BNX2_L2CTX_TXP_BIDX	0x000000a8	bnx2.h
4504	BNX2_L2CTX_TXP_BSEQ	0x000000ac	bnx2.h
4505	BNX2_L2CTX_BD_PRE_READ	0x00000000	bnx2.h
4506	BNX2_L2CTX_CTX_SIZE	0x00000000	bnx2.h
4507	BNX2_L2CTX_CTX_TYPE	0x00000000	bnx2.h
4508	BNX2_L2CTX_CTX_TYPE_SIZE_L2	((0x20/20)<<16)	bnx2.h
4509	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0xf<<28)	bnx2.h
4510	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0<<28)	bnx2.h
4511	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(1<<28)	bnx2.h
4512	BNX2_L2CTX_HOST_BDIDX	0x00000004	bnx2.h
4513	BNX2_L2CTX_HOST_BSEQ	0x00000008	bnx2.h
4514	BNX2_L2CTX_NX_BSEQ	0x0000000c	bnx2.h
4515	BNX2_L2CTX_NX_BDHADDR_HI	0x00000010	bnx2.h
4516	BNX2_L2CTX_NX_BDHADDR_LO	0x00000014	bnx2.h
4517	BNX2_L2CTX_NX_BDIDX	0x00000018	bnx2.h
4518	BNX2_PCICFG_MISC_CONFIG	0x00000068	bnx2.h
4519	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<2)	bnx2.h
4520	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<3)	bnx2.h
4521	BNX2_PCICFG_MISC_CONFIG_CLOCK_C	(1L<<5)	bnx2.h
4522	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<6)	bnx2.h
4523	BNX2_PCICFG_MISC_CONFIG_REG_WIN	(1L<<7)	bnx2.h
4524	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<8)	bnx2.h
4525	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<9)	bnx2.h
4526	BNX2_PCICFG_MISC_CONFIG_ASIC_ME	(0xffL<<16)	bnx2.h
4527	BNX2_PCICFG_MISC_CONFIG_ASIC_BA	(0xfL<<24)	bnx2.h
4528	BNX2_PCICFG_MISC_CONFIG_ASIC_ID	(0xfL<<28)	bnx2.h
4529	BNX2_PCICFG_MISC_STATUS	0x0000006c	bnx2.h
4530	BNX2_PCICFG_MISC_STATUS_INTA_VA	(1L<<0)	bnx2.h
4531	BNX2_PCICFG_MISC_STATUS_32BIT_D	(1L<<1)	bnx2.h
4532	BNX2_PCICFG_MISC_STATUS_M66EN	(1L<<2)	bnx2.h
4533	BNX2_PCICFG_MISC_STATUS_PCIX_DE	(1L<<3)	bnx2.h
4534	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0x3L<<4)	bnx2.h
4535	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0L<<4)	bnx2.h
4536	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(1L<<4)	bnx2.h
4537	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(2L<<4)	bnx2.h
4538	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(3L<<4)	bnx2.h
4539	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	0x00000070	bnx2.h
4540	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
4541	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<0)	bnx2.h
4542	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<0)	bnx2.h
4543	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<0)	bnx2.h
4544	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(3L<<0)	bnx2.h
4545	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<0)	bnx2.h
4546	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(5L<<0)	bnx2.h
4547	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(6L<<0)	bnx2.h
4548	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(7L<<0)	bnx2.h
4549	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
4550	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<6)	bnx2.h
4551	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<7)	bnx2.h
4552	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0x7L<<8)	bnx2.h
4553	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<8)	bnx2.h
4554	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<8)	bnx2.h
4555	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<8)	bnx2.h
4556	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<8)	bnx2.h
4557	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<11)	bnx2.h
4558	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<12)	bnx2.h
4559	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<12)	bnx2.h
4560	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<12)	bnx2.h
4561	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<12)	bnx2.h
4562	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<12)	bnx2.h
4563	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(8L<<12)	bnx2.h
4564	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<16)	bnx2.h
4565	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<17)	bnx2.h
4566	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<18)	bnx2.h
4567	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<19)	bnx2.h
4568	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfffL<<20)	bnx2.h
4569	BNX2_PCICFG_REG_WINDOW_ADDRESS	0x00000078	bnx2.h
4570	BNX2_PCICFG_REG_WINDOW	0x00000080	bnx2.h
4571	BNX2_PCICFG_INT_ACK_CMD	0x00000084	bnx2.h
4572	BNX2_PCICFG_INT_ACK_CMD_INDEX	(0xffffL<<0)	bnx2.h
4573	BNX2_PCICFG_INT_ACK_CMD_INDEX_V	(1L<<16)	bnx2.h
4574	BNX2_PCICFG_INT_ACK_CMD_USE_INT	(1L<<17)	bnx2.h
4575	BNX2_PCICFG_INT_ACK_CMD_MASK_IN	(1L<<18)	bnx2.h
4576	BNX2_PCICFG_STATUS_BIT_SET_CMD	0x00000088	bnx2.h
4577	BNX2_PCICFG_STATUS_BIT_CLEAR_CM	0x0000008c	bnx2.h
4578	BNX2_PCICFG_MAILBOX_QUEUE_ADDR	0x00000090	bnx2.h
4579	BNX2_PCICFG_MAILBOX_QUEUE_DATA	0x00000094	bnx2.h
4580	BNX2_PCI_GRC_WINDOW_ADDR	0x00000400	bnx2.h
4581	BNX2_PCI_GRC_WINDOW_ADDR_PCI_GR	(0x3ffffL<<8)	bnx2.h
4582	BNX2_PCI_CONFIG_1	0x00000404	bnx2.h
4583	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0x7L<<8)	bnx2.h
4584	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0L<<8)	bnx2.h
4585	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(1L<<8)	bnx2.h
4586	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(2L<<8)	bnx2.h
4587	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(3L<<8)	bnx2.h
4588	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(4L<<8)	bnx2.h
4589	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(5L<<8)	bnx2.h
4590	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(6L<<8)	bnx2.h
4591	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(7L<<8)	bnx2.h
4592	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0x7L<<11)	bnx2.h
4593	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0L<<11)	bnx2.h
4594	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(1L<<11)	bnx2.h
4595	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(2L<<11)	bnx2.h
4596	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(3L<<11)	bnx2.h
4597	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(4L<<11)	bnx2.h
4598	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(5L<<11)	bnx2.h
4599	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(6L<<11)	bnx2.h
4600	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(7L<<11)	bnx2.h
4601	BNX2_PCI_CONFIG_2	0x00000408	bnx2.h
4602	BNX2_PCI_CONFIG_2_BAR1_SIZE	(0xfL<<0)	bnx2.h
4603	BNX2_PCI_CONFIG_2_BAR1_SIZE_DIS	(0L<<0)	bnx2.h
4604	BNX2_PCI_CONFIG_2_BAR1_SIZE_64K	(1L<<0)	bnx2.h
4605	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(2L<<0)	bnx2.h
4606	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(3L<<0)	bnx2.h
4607	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(4L<<0)	bnx2.h
4608	BNX2_PCI_CONFIG_2_BAR1_SIZE_1M	(5L<<0)	bnx2.h
4609	BNX2_PCI_CONFIG_2_BAR1_SIZE_2M	(6L<<0)	bnx2.h
4610	BNX2_PCI_CONFIG_2_BAR1_SIZE_4M	(7L<<0)	bnx2.h
4611	BNX2_PCI_CONFIG_2_BAR1_SIZE_8M	(8L<<0)	bnx2.h
4612	BNX2_PCI_CONFIG_2_BAR1_SIZE_16M	(9L<<0)	bnx2.h
4613	BNX2_PCI_CONFIG_2_BAR1_SIZE_32M	(10L<<0)	bnx2.h
4614	BNX2_PCI_CONFIG_2_BAR1_SIZE_64M	(11L<<0)	bnx2.h
4615	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(12L<<0)	bnx2.h
4616	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(13L<<0)	bnx2.h
4617	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(14L<<0)	bnx2.h
4618	BNX2_PCI_CONFIG_2_BAR1_SIZE_1G	(15L<<0)	bnx2.h
4619	BNX2_PCI_CONFIG_2_BAR1_64ENA	(1L<<4)	bnx2.h
4620	BNX2_PCI_CONFIG_2_EXP_ROM_RETRY	(1L<<5)	bnx2.h
4621	BNX2_PCI_CONFIG_2_CFG_CYCLE_RET	(1L<<6)	bnx2.h
4622	BNX2_PCI_CONFIG_2_FIRST_CFG_DON	(1L<<7)	bnx2.h
4623	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE	(0xffL<<8)	bnx2.h
4624	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(0L<<8)	bnx2.h
4625	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(1L<<8)	bnx2.h
4626	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(2L<<8)	bnx2.h
4627	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(3L<<8)	bnx2.h
4628	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(4L<<8)	bnx2.h
4629	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(5L<<8)	bnx2.h
4630	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(6L<<8)	bnx2.h
4631	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(7L<<8)	bnx2.h
4632	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(8L<<8)	bnx2.h
4633	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(9L<<8)	bnx2.h
4634	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(10L<<8)	bnx2.h
4635	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(11L<<8)	bnx2.h
4636	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(12L<<8)	bnx2.h
4637	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(13L<<8)	bnx2.h
4638	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(14L<<8)	bnx2.h
4639	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(15L<<8)	bnx2.h
4640	BNX2_PCI_CONFIG_2_MAX_SPLIT_LIM	(0x1fL<<16)	bnx2.h
4641	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0x3L<<21)	bnx2.h
4642	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0L<<21)	bnx2.h
4643	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(1L<<21)	bnx2.h
4644	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(2L<<21)	bnx2.h
4645	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(3L<<21)	bnx2.h
4646	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<23)	bnx2.h
4647	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<24)	bnx2.h
4648	BNX2_PCI_CONFIG_2_KEEP_REQ_ASSE	(1L<<25)	bnx2.h
4649	BNX2_PCI_CONFIG_3	0x0000040c	bnx2.h
4650	BNX2_PCI_CONFIG_3_STICKY_BYTE	(0xffL<<0)	bnx2.h
4651	BNX2_PCI_CONFIG_3_FORCE_PME	(1L<<24)	bnx2.h
4652	BNX2_PCI_CONFIG_3_PME_STATUS	(1L<<25)	bnx2.h
4653	BNX2_PCI_CONFIG_3_PME_ENABLE	(1L<<26)	bnx2.h
4654	BNX2_PCI_CONFIG_3_PM_STATE	(0x3L<<27)	bnx2.h
4655	BNX2_PCI_CONFIG_3_VAUX_PRESET	(1L<<30)	bnx2.h
4656	BNX2_PCI_CONFIG_3_PCI_POWER	(1L<<31)	bnx2.h
4657	BNX2_PCI_PM_DATA_A	0x00000410	bnx2.h
4658	BNX2_PCI_PM_DATA_A_PM_DATA_0_PR	(0xffL<<0)	bnx2.h
4659	BNX2_PCI_PM_DATA_A_PM_DATA_1_PR	(0xffL<<8)	bnx2.h
4660	BNX2_PCI_PM_DATA_A_PM_DATA_2_PR	(0xffL<<16)	bnx2.h
4661	BNX2_PCI_PM_DATA_A_PM_DATA_3_PR	(0xffL<<24)	bnx2.h
4662	BNX2_PCI_PM_DATA_B	0x00000414	bnx2.h
4663	BNX2_PCI_PM_DATA_B_PM_DATA_4_PR	(0xffL<<0)	bnx2.h
4664	BNX2_PCI_PM_DATA_B_PM_DATA_5_PR	(0xffL<<8)	bnx2.h
4665	BNX2_PCI_PM_DATA_B_PM_DATA_6_PR	(0xffL<<16)	bnx2.h
4666	BNX2_PCI_PM_DATA_B_PM_DATA_7_PR	(0xffL<<24)	bnx2.h
4667	BNX2_PCI_SWAP_DIAG0	0x00000418	bnx2.h
4668	BNX2_PCI_SWAP_DIAG1	0x0000041c	bnx2.h
4669	BNX2_PCI_EXP_ROM_ADDR	0x00000420	bnx2.h
4670	BNX2_PCI_EXP_ROM_ADDR_ADDRESS	(0x3fffffL<<2)	bnx2.h
4671	BNX2_PCI_EXP_ROM_ADDR_REQ	(1L<<31)	bnx2.h
4672	BNX2_PCI_EXP_ROM_DATA	0x00000424	bnx2.h
4673	BNX2_PCI_VPD_INTF	0x00000428	bnx2.h
4674	BNX2_PCI_VPD_INTF_INTF_REQ	(1L<<0)	bnx2.h
4675	BNX2_PCI_VPD_ADDR_FLAG	0x0000042c	bnx2.h
4676	BNX2_PCI_VPD_ADDR_FLAG_ADDRESS	(0x1fff<<2)	bnx2.h
4677	BNX2_PCI_VPD_ADDR_FLAG_WR	(1<<15)	bnx2.h
4678	BNX2_PCI_VPD_DATA	0x00000430	bnx2.h
4679	BNX2_PCI_ID_VAL1	0x00000434	bnx2.h
4680	BNX2_PCI_ID_VAL1_DEVICE_ID	(0xffffL<<0)	bnx2.h
4681	BNX2_PCI_ID_VAL1_VENDOR_ID	(0xffffL<<16)	bnx2.h
4682	BNX2_PCI_ID_VAL2	0x00000438	bnx2.h
4683	BNX2_PCI_ID_VAL2_SUBSYSTEM_VEND	(0xffffL<<0)	bnx2.h
4684	BNX2_PCI_ID_VAL2_SUBSYSTEM_ID	(0xffffL<<16)	bnx2.h
4685	BNX2_PCI_ID_VAL3	0x0000043c	bnx2.h
4686	BNX2_PCI_ID_VAL3_CLASS_CODE	(0xffffffL<<0)	bnx2.h
4687	BNX2_PCI_ID_VAL3_REVISION_ID	(0xffL<<24)	bnx2.h
4688	BNX2_PCI_ID_VAL4	0x00000440	bnx2.h
4689	BNX2_PCI_ID_VAL4_CAP_ENA	(0xfL<<0)	bnx2.h
4690	BNX2_PCI_ID_VAL4_CAP_ENA_0	(0L<<0)	bnx2.h
4691	BNX2_PCI_ID_VAL4_CAP_ENA_1	(1L<<0)	bnx2.h
4692	BNX2_PCI_ID_VAL4_CAP_ENA_2	(2L<<0)	bnx2.h
4693	BNX2_PCI_ID_VAL4_CAP_ENA_3	(3L<<0)	bnx2.h
4694	BNX2_PCI_ID_VAL4_CAP_ENA_4	(4L<<0)	bnx2.h
4695	BNX2_PCI_ID_VAL4_CAP_ENA_5	(5L<<0)	bnx2.h
4696	BNX2_PCI_ID_VAL4_CAP_ENA_6	(6L<<0)	bnx2.h
4697	BNX2_PCI_ID_VAL4_CAP_ENA_7	(7L<<0)	bnx2.h
4698	BNX2_PCI_ID_VAL4_CAP_ENA_8	(8L<<0)	bnx2.h
4699	BNX2_PCI_ID_VAL4_CAP_ENA_9	(9L<<0)	bnx2.h
4700	BNX2_PCI_ID_VAL4_CAP_ENA_10	(10L<<0)	bnx2.h
4701	BNX2_PCI_ID_VAL4_CAP_ENA_11	(11L<<0)	bnx2.h
4702	BNX2_PCI_ID_VAL4_CAP_ENA_12	(12L<<0)	bnx2.h
4703	BNX2_PCI_ID_VAL4_CAP_ENA_13	(13L<<0)	bnx2.h
4704	BNX2_PCI_ID_VAL4_CAP_ENA_14	(14L<<0)	bnx2.h
4705	BNX2_PCI_ID_VAL4_CAP_ENA_15	(15L<<0)	bnx2.h
4706	BNX2_PCI_ID_VAL4_PM_SCALE_PRG	(0x3L<<6)	bnx2.h
4707	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0	(0L<<6)	bnx2.h
4708	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1	(1L<<6)	bnx2.h
4709	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2	(2L<<6)	bnx2.h
4710	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3	(3L<<6)	bnx2.h
4711	BNX2_PCI_ID_VAL4_MSI_LIMIT	(0x7L<<9)	bnx2.h
4712	BNX2_PCI_ID_VAL4_MSI_ADVERTIZE	(0x7L<<12)	bnx2.h
4713	BNX2_PCI_ID_VAL4_MSI_ENABLE	(1L<<15)	bnx2.h
4714	BNX2_PCI_ID_VAL4_MAX_64_ADVERTI	(1L<<16)	bnx2.h
4715	BNX2_PCI_ID_VAL4_MAX_133_ADVERT	(1L<<17)	bnx2.h
4716	BNX2_PCI_ID_VAL4_MAX_MEM_READ_S	(0x3L<<21)	bnx2.h
4717	BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE	(0x7L<<23)	bnx2.h
4718	BNX2_PCI_ID_VAL4_MAX_CUMULATIVE	(0x7L<<26)	bnx2.h
4719	BNX2_PCI_ID_VAL5	0x00000444	bnx2.h
4720	BNX2_PCI_ID_VAL5_D1_SUPPORT	(1L<<0)	bnx2.h
4721	BNX2_PCI_ID_VAL5_D2_SUPPORT	(1L<<1)	bnx2.h
4722	BNX2_PCI_ID_VAL5_PME_IN_D0	(1L<<2)	bnx2.h
4723	BNX2_PCI_ID_VAL5_PME_IN_D1	(1L<<3)	bnx2.h
4724	BNX2_PCI_ID_VAL5_PME_IN_D2	(1L<<4)	bnx2.h
4725	BNX2_PCI_ID_VAL5_PME_IN_D3_HOT	(1L<<5)	bnx2.h
4726	BNX2_PCI_PCIX_EXTENDED_STATUS	0x00000448	bnx2.h
4727	BNX2_PCI_PCIX_EXTENDED_STATUS_N	(1L<<8)	bnx2.h
4728	BNX2_PCI_PCIX_EXTENDED_STATUS_L	(1L<<9)	bnx2.h
4729	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xfL<<16)	bnx2.h
4730	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xffL<<24)	bnx2.h
4731	BNX2_PCI_ID_VAL6	0x0000044c	bnx2.h
4732	BNX2_PCI_ID_VAL6_MAX_LAT	(0xffL<<0)	bnx2.h
4733	BNX2_PCI_ID_VAL6_MIN_GNT	(0xffL<<8)	bnx2.h
4734	BNX2_PCI_ID_VAL6_BIST	(0xffL<<16)	bnx2.h
4735	BNX2_PCI_MSI_DATA	0x00000450	bnx2.h
4736	BNX2_PCI_MSI_DATA_PCI_MSI_DATA	(0xffffL<<0)	bnx2.h
4737	BNX2_PCI_MSI_ADDR_H	0x00000454	bnx2.h
4738	BNX2_PCI_MSI_ADDR_L	0x00000458	bnx2.h
4739	BNX2_MISC_COMMAND	0x00000800	bnx2.h
4740	BNX2_MISC_COMMAND_ENABLE_ALL	(1L<<0)	bnx2.h
4741	BNX2_MISC_COMMAND_DISABLE_ALL	(1L<<1)	bnx2.h
4742	BNX2_MISC_COMMAND_CORE_RESET	(1L<<4)	bnx2.h
4743	BNX2_MISC_COMMAND_HARD_RESET	(1L<<5)	bnx2.h
4744	BNX2_MISC_COMMAND_PAR_ERROR	(1L<<8)	bnx2.h
4745	BNX2_MISC_COMMAND_PAR_ERR_RAM	(0x7fL<<16)	bnx2.h
4746	BNX2_MISC_CFG	0x00000804	bnx2.h
4747	BNX2_MISC_CFG_PCI_GRC_TMOUT	(1L<<0)	bnx2.h
4748	BNX2_MISC_CFG_NVM_WR_EN	(0x3L<<1)	bnx2.h
4749	BNX2_MISC_CFG_NVM_WR_EN_PROTECT	(0L<<1)	bnx2.h
4750	BNX2_MISC_CFG_NVM_WR_EN_PCI	(1L<<1)	bnx2.h
4751	BNX2_MISC_CFG_NVM_WR_EN_ALLOW	(2L<<1)	bnx2.h
4752	BNX2_MISC_CFG_NVM_WR_EN_ALLOW2	(3L<<1)	bnx2.h
4753	BNX2_MISC_CFG_BIST_EN	(1L<<3)	bnx2.h
4754	BNX2_MISC_CFG_CK25_OUT_ALT_SRC	(1L<<4)	bnx2.h
4755	BNX2_MISC_CFG_BYPASS_BSCAN	(1L<<5)	bnx2.h
4756	BNX2_MISC_CFG_BYPASS_EJTAG	(1L<<6)	bnx2.h
4757	BNX2_MISC_CFG_CLK_CTL_OVERRIDE	(1L<<7)	bnx2.h
4758	BNX2_MISC_CFG_LEDMODE	(0x3L<<8)	bnx2.h
4759	BNX2_MISC_CFG_LEDMODE_MAC	(0L<<8)	bnx2.h
4760	BNX2_MISC_CFG_LEDMODE_GPHY1	(1L<<8)	bnx2.h
4761	BNX2_MISC_CFG_LEDMODE_GPHY2	(2L<<8)	bnx2.h
4762	BNX2_MISC_ID	0x00000808	bnx2.h
4763	BNX2_MISC_ID_BOND_ID	(0xfL<<0)	bnx2.h
4764	BNX2_MISC_ID_CHIP_METAL	(0xffL<<4)	bnx2.h
4765	BNX2_MISC_ID_CHIP_REV	(0xfL<<12)	bnx2.h
4766	BNX2_MISC_ID_CHIP_NUM	(0xffffL<<16)	bnx2.h
4767	BNX2_MISC_ENABLE_STATUS_BITS	0x0000080c	bnx2.h
4768	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<0)	bnx2.h
4769	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<1)	bnx2.h
4770	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<2)	bnx2.h
4771	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<3)	bnx2.h
4772	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<4)	bnx2.h
4773	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<5)	bnx2.h
4774	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<6)	bnx2.h
4775	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<7)	bnx2.h
4776	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<8)	bnx2.h
4777	BNX2_MISC_ENABLE_STATUS_BITS_EM	(1L<<9)	bnx2.h
4778	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<10)	bnx2.h
4779	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<11)	bnx2.h
4780	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<12)	bnx2.h
4781	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<13)	bnx2.h
4782	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<14)	bnx2.h
4783	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<15)	bnx2.h
4784	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<16)	bnx2.h
4785	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<17)	bnx2.h
4786	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<18)	bnx2.h
4787	BNX2_MISC_ENABLE_STATUS_BITS_HO	(1L<<19)	bnx2.h
4788	BNX2_MISC_ENABLE_STATUS_BITS_MA	(1L<<20)	bnx2.h
4789	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<21)	bnx2.h
4790	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<22)	bnx2.h
4791	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<23)	bnx2.h
4792	BNX2_MISC_ENABLE_STATUS_BITS_MG	(1L<<24)	bnx2.h
4793	BNX2_MISC_ENABLE_STATUS_BITS_TI	(1L<<25)	bnx2.h
4794	BNX2_MISC_ENABLE_STATUS_BITS_DM	(1L<<26)	bnx2.h
4795	BNX2_MISC_ENABLE_STATUS_BITS_UM	(1L<<27)	bnx2.h
4796	BNX2_MISC_ENABLE_SET_BITS	0x00000810	bnx2.h
4797	BNX2_MISC_ENABLE_SET_BITS_TX_SC	(1L<<0)	bnx2.h
4798	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<1)	bnx2.h
4799	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<2)	bnx2.h
4800	BNX2_MISC_ENABLE_SET_BITS_TX_PR	(1L<<3)	bnx2.h
4801	BNX2_MISC_ENABLE_SET_BITS_TX_DM	(1L<<4)	bnx2.h
4802	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<5)	bnx2.h
4803	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<6)	bnx2.h
4804	BNX2_MISC_ENABLE_SET_BITS_TX_HE	(1L<<7)	bnx2.h
4805	BNX2_MISC_ENABLE_SET_BITS_TX_AS	(1L<<8)	bnx2.h
4806	BNX2_MISC_ENABLE_SET_BITS_EMAC_	(1L<<9)	bnx2.h
4807	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<10)	bnx2.h
4808	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<11)	bnx2.h
4809	BNX2_MISC_ENABLE_SET_BITS_RX_MB	(1L<<12)	bnx2.h
4810	BNX2_MISC_ENABLE_SET_BITS_RX_LO	(1L<<13)	bnx2.h
4811	BNX2_MISC_ENABLE_SET_BITS_RX_PR	(1L<<14)	bnx2.h
4812	BNX2_MISC_ENABLE_SET_BITS_RX_V2	(1L<<15)	bnx2.h
4813	BNX2_MISC_ENABLE_SET_BITS_RX_BD	(1L<<16)	bnx2.h
4814	BNX2_MISC_ENABLE_SET_BITS_RX_DM	(1L<<17)	bnx2.h
4815	BNX2_MISC_ENABLE_SET_BITS_COMPL	(1L<<18)	bnx2.h
4816	BNX2_MISC_ENABLE_SET_BITS_HOST_	(1L<<19)	bnx2.h
4817	BNX2_MISC_ENABLE_SET_BITS_MAILB	(1L<<20)	bnx2.h
4818	BNX2_MISC_ENABLE_SET_BITS_CONTE	(1L<<21)	bnx2.h
4819	BNX2_MISC_ENABLE_SET_BITS_CMD_S	(1L<<22)	bnx2.h
4820	BNX2_MISC_ENABLE_SET_BITS_CMD_P	(1L<<23)	bnx2.h
4821	BNX2_MISC_ENABLE_SET_BITS_MGMT_	(1L<<24)	bnx2.h
4822	BNX2_MISC_ENABLE_SET_BITS_TIMER	(1L<<25)	bnx2.h
4823	BNX2_MISC_ENABLE_SET_BITS_DMA_E	(1L<<26)	bnx2.h
4824	BNX2_MISC_ENABLE_SET_BITS_UMP_E	(1L<<27)	bnx2.h
4825	BNX2_MISC_ENABLE_CLR_BITS	0x00000814	bnx2.h
4826	BNX2_MISC_ENABLE_CLR_BITS_TX_SC	(1L<<0)	bnx2.h
4827	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<1)	bnx2.h
4828	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<2)	bnx2.h
4829	BNX2_MISC_ENABLE_CLR_BITS_TX_PR	(1L<<3)	bnx2.h
4830	BNX2_MISC_ENABLE_CLR_BITS_TX_DM	(1L<<4)	bnx2.h
4831	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<5)	bnx2.h
4832	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<6)	bnx2.h
4833	BNX2_MISC_ENABLE_CLR_BITS_TX_HE	(1L<<7)	bnx2.h
4834	BNX2_MISC_ENABLE_CLR_BITS_TX_AS	(1L<<8)	bnx2.h
4835	BNX2_MISC_ENABLE_CLR_BITS_EMAC_	(1L<<9)	bnx2.h
4836	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<10)	bnx2.h
4837	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<11)	bnx2.h
4838	BNX2_MISC_ENABLE_CLR_BITS_RX_MB	(1L<<12)	bnx2.h
4839	BNX2_MISC_ENABLE_CLR_BITS_RX_LO	(1L<<13)	bnx2.h
4840	BNX2_MISC_ENABLE_CLR_BITS_RX_PR	(1L<<14)	bnx2.h
4841	BNX2_MISC_ENABLE_CLR_BITS_RX_V2	(1L<<15)	bnx2.h
4842	BNX2_MISC_ENABLE_CLR_BITS_RX_BD	(1L<<16)	bnx2.h
4843	BNX2_MISC_ENABLE_CLR_BITS_RX_DM	(1L<<17)	bnx2.h
4844	BNX2_MISC_ENABLE_CLR_BITS_COMPL	(1L<<18)	bnx2.h
4845	BNX2_MISC_ENABLE_CLR_BITS_HOST_	(1L<<19)	bnx2.h
4846	BNX2_MISC_ENABLE_CLR_BITS_MAILB	(1L<<20)	bnx2.h
4847	BNX2_MISC_ENABLE_CLR_BITS_CONTE	(1L<<21)	bnx2.h
4848	BNX2_MISC_ENABLE_CLR_BITS_CMD_S	(1L<<22)	bnx2.h
4849	BNX2_MISC_ENABLE_CLR_BITS_CMD_P	(1L<<23)	bnx2.h
4850	BNX2_MISC_ENABLE_CLR_BITS_MGMT_	(1L<<24)	bnx2.h
4851	BNX2_MISC_ENABLE_CLR_BITS_TIMER	(1L<<25)	bnx2.h
4852	BNX2_MISC_ENABLE_CLR_BITS_DMA_E	(1L<<26)	bnx2.h
4853	BNX2_MISC_ENABLE_CLR_BITS_UMP_E	(1L<<27)	bnx2.h
4854	BNX2_MISC_CLOCK_CONTROL_BITS	0x00000818	bnx2.h
4855	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
4856	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0L<<0)	bnx2.h
4857	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<0)	bnx2.h
4858	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(2L<<0)	bnx2.h
4859	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(3L<<0)	bnx2.h
4860	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(4L<<0)	bnx2.h
4861	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(5L<<0)	bnx2.h
4862	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(6L<<0)	bnx2.h
4863	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(7L<<0)	bnx2.h
4864	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
4865	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<6)	bnx2.h
4866	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<7)	bnx2.h
4867	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0x7L<<8)	bnx2.h
4868	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<8)	bnx2.h
4869	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<8)	bnx2.h
4870	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<8)	bnx2.h
4871	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<8)	bnx2.h
4872	BNX2_MISC_CLOCK_CONTROL_BITS_PL	(1L<<11)	bnx2.h
4873	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0xfL<<12)	bnx2.h
4874	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<12)	bnx2.h
4875	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<12)	bnx2.h
4876	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<12)	bnx2.h
4877	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<12)	bnx2.h
4878	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(8L<<12)	bnx2.h
4879	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<16)	bnx2.h
4880	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<17)	bnx2.h
4881	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(1L<<18)	bnx2.h
4882	BNX2_MISC_CLOCK_CONTROL_BITS_US	(1L<<19)	bnx2.h
4883	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(0xfffL<<20)	bnx2.h
4884	BNX2_MISC_GPIO	0x0000081c	bnx2.h
4885	BNX2_MISC_GPIO_VALUE	(0xffL<<0)	bnx2.h
4886	BNX2_MISC_GPIO_SET	(0xffL<<8)	bnx2.h
4887	BNX2_MISC_GPIO_CLR	(0xffL<<16)	bnx2.h
4888	BNX2_MISC_GPIO_FLOAT	(0xffL<<24)	bnx2.h
4889	BNX2_MISC_GPIO_INT	0x00000820	bnx2.h
4890	BNX2_MISC_GPIO_INT_INT_STATE	(0xfL<<0)	bnx2.h
4891	BNX2_MISC_GPIO_INT_OLD_VALUE	(0xfL<<8)	bnx2.h
4892	BNX2_MISC_GPIO_INT_OLD_SET	(0xfL<<16)	bnx2.h
4893	BNX2_MISC_GPIO_INT_OLD_CLR	(0xfL<<24)	bnx2.h
4894	BNX2_MISC_CONFIG_LFSR	0x00000824	bnx2.h
4895	BNX2_MISC_CONFIG_LFSR_DIV	(0xffffL<<0)	bnx2.h
4896	BNX2_MISC_LFSR_MASK_BITS	0x00000828	bnx2.h
4897	BNX2_MISC_LFSR_MASK_BITS_TX_SCH	(1L<<0)	bnx2.h
4898	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<1)	bnx2.h
4899	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<2)	bnx2.h
4900	BNX2_MISC_LFSR_MASK_BITS_TX_PRO	(1L<<3)	bnx2.h
4901	BNX2_MISC_LFSR_MASK_BITS_TX_DMA	(1L<<4)	bnx2.h
4902	BNX2_MISC_LFSR_MASK_BITS_TX_PAT	(1L<<5)	bnx2.h
4903	BNX2_MISC_LFSR_MASK_BITS_TX_PAY	(1L<<6)	bnx2.h
4904	BNX2_MISC_LFSR_MASK_BITS_TX_HEA	(1L<<7)	bnx2.h
4905	BNX2_MISC_LFSR_MASK_BITS_TX_ASS	(1L<<8)	bnx2.h
4906	BNX2_MISC_LFSR_MASK_BITS_EMAC_E	(1L<<9)	bnx2.h
4907	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<10)	bnx2.h
4908	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<11)	bnx2.h
4909	BNX2_MISC_LFSR_MASK_BITS_RX_MBU	(1L<<12)	bnx2.h
4910	BNX2_MISC_LFSR_MASK_BITS_RX_LOO	(1L<<13)	bnx2.h
4911	BNX2_MISC_LFSR_MASK_BITS_RX_PRO	(1L<<14)	bnx2.h
4912	BNX2_MISC_LFSR_MASK_BITS_RX_V2P	(1L<<15)	bnx2.h
4913	BNX2_MISC_LFSR_MASK_BITS_RX_BD_	(1L<<16)	bnx2.h
4914	BNX2_MISC_LFSR_MASK_BITS_RX_DMA	(1L<<17)	bnx2.h
4915	BNX2_MISC_LFSR_MASK_BITS_COMPLE	(1L<<18)	bnx2.h
4916	BNX2_MISC_LFSR_MASK_BITS_HOST_C	(1L<<19)	bnx2.h
4917	BNX2_MISC_LFSR_MASK_BITS_MAILBO	(1L<<20)	bnx2.h
4918	BNX2_MISC_LFSR_MASK_BITS_CONTEX	(1L<<21)	bnx2.h
4919	BNX2_MISC_LFSR_MASK_BITS_CMD_SC	(1L<<22)	bnx2.h
4920	BNX2_MISC_LFSR_MASK_BITS_CMD_PR	(1L<<23)	bnx2.h
4921	BNX2_MISC_LFSR_MASK_BITS_MGMT_P	(1L<<24)	bnx2.h
4922	BNX2_MISC_LFSR_MASK_BITS_TIMER_	(1L<<25)	bnx2.h
4923	BNX2_MISC_LFSR_MASK_BITS_DMA_EN	(1L<<26)	bnx2.h
4924	BNX2_MISC_LFSR_MASK_BITS_UMP_EN	(1L<<27)	bnx2.h
4925	BNX2_MISC_ARB_REQ0	0x0000082c	bnx2.h
4926	BNX2_MISC_ARB_REQ1	0x00000830	bnx2.h
4927	BNX2_MISC_ARB_REQ2	0x00000834	bnx2.h
4928	BNX2_MISC_ARB_REQ3	0x00000838	bnx2.h
4929	BNX2_MISC_ARB_REQ4	0x0000083c	bnx2.h
4930	BNX2_MISC_ARB_FREE0	0x00000840	bnx2.h
4931	BNX2_MISC_ARB_FREE1	0x00000844	bnx2.h
4932	BNX2_MISC_ARB_FREE2	0x00000848	bnx2.h
4933	BNX2_MISC_ARB_FREE3	0x0000084c	bnx2.h
4934	BNX2_MISC_ARB_FREE4	0x00000850	bnx2.h
4935	BNX2_MISC_ARB_REQ_STATUS0	0x00000854	bnx2.h
4936	BNX2_MISC_ARB_REQ_STATUS1	0x00000858	bnx2.h
4937	BNX2_MISC_ARB_REQ_STATUS2	0x0000085c	bnx2.h
4938	BNX2_MISC_ARB_REQ_STATUS3	0x00000860	bnx2.h
4939	BNX2_MISC_ARB_REQ_STATUS4	0x00000864	bnx2.h
4940	BNX2_MISC_ARB_GNT0	0x00000868	bnx2.h
4941	BNX2_MISC_ARB_GNT0_0	(0x7L<<0)	bnx2.h
4942	BNX2_MISC_ARB_GNT0_1	(0x7L<<4)	bnx2.h
4943	BNX2_MISC_ARB_GNT0_2	(0x7L<<8)	bnx2.h
4944	BNX2_MISC_ARB_GNT0_3	(0x7L<<12)	bnx2.h
4945	BNX2_MISC_ARB_GNT0_4	(0x7L<<16)	bnx2.h
4946	BNX2_MISC_ARB_GNT0_5	(0x7L<<20)	bnx2.h
4947	BNX2_MISC_ARB_GNT0_6	(0x7L<<24)	bnx2.h
4948	BNX2_MISC_ARB_GNT0_7	(0x7L<<28)	bnx2.h
4949	BNX2_MISC_ARB_GNT1	0x0000086c	bnx2.h
4950	BNX2_MISC_ARB_GNT1_8	(0x7L<<0)	bnx2.h
4951	BNX2_MISC_ARB_GNT1_9	(0x7L<<4)	bnx2.h
4952	BNX2_MISC_ARB_GNT1_10	(0x7L<<8)	bnx2.h
4953	BNX2_MISC_ARB_GNT1_11	(0x7L<<12)	bnx2.h
4954	BNX2_MISC_ARB_GNT1_12	(0x7L<<16)	bnx2.h
4955	BNX2_MISC_ARB_GNT1_13	(0x7L<<20)	bnx2.h
4956	BNX2_MISC_ARB_GNT1_14	(0x7L<<24)	bnx2.h
4957	BNX2_MISC_ARB_GNT1_15	(0x7L<<28)	bnx2.h
4958	BNX2_MISC_ARB_GNT2	0x00000870	bnx2.h
4959	BNX2_MISC_ARB_GNT2_16	(0x7L<<0)	bnx2.h
4960	BNX2_MISC_ARB_GNT2_17	(0x7L<<4)	bnx2.h
4961	BNX2_MISC_ARB_GNT2_18	(0x7L<<8)	bnx2.h
4962	BNX2_MISC_ARB_GNT2_19	(0x7L<<12)	bnx2.h
4963	BNX2_MISC_ARB_GNT2_20	(0x7L<<16)	bnx2.h
4964	BNX2_MISC_ARB_GNT2_21	(0x7L<<20)	bnx2.h
4965	BNX2_MISC_ARB_GNT2_22	(0x7L<<24)	bnx2.h
4966	BNX2_MISC_ARB_GNT2_23	(0x7L<<28)	bnx2.h
4967	BNX2_MISC_ARB_GNT3	0x00000874	bnx2.h
4968	BNX2_MISC_ARB_GNT3_24	(0x7L<<0)	bnx2.h
4969	BNX2_MISC_ARB_GNT3_25	(0x7L<<4)	bnx2.h
4970	BNX2_MISC_ARB_GNT3_26	(0x7L<<8)	bnx2.h
4971	BNX2_MISC_ARB_GNT3_27	(0x7L<<12)	bnx2.h
4972	BNX2_MISC_ARB_GNT3_28	(0x7L<<16)	bnx2.h
4973	BNX2_MISC_ARB_GNT3_29	(0x7L<<20)	bnx2.h
4974	BNX2_MISC_ARB_GNT3_30	(0x7L<<24)	bnx2.h
4975	BNX2_MISC_ARB_GNT3_31	(0x7L<<28)	bnx2.h
4976	BNX2_MISC_PRBS_CONTROL	0x00000878	bnx2.h
4977	BNX2_MISC_PRBS_CONTROL_EN	(1L<<0)	bnx2.h
4978	BNX2_MISC_PRBS_CONTROL_RSTB	(1L<<1)	bnx2.h
4979	BNX2_MISC_PRBS_CONTROL_INV	(1L<<2)	bnx2.h
4980	BNX2_MISC_PRBS_CONTROL_ERR_CLR	(1L<<3)	bnx2.h
4981	BNX2_MISC_PRBS_CONTROL_ORDER	(0x3L<<4)	bnx2.h
4982	BNX2_MISC_PRBS_CONTROL_ORDER_7T	(0L<<4)	bnx2.h
4983	BNX2_MISC_PRBS_CONTROL_ORDER_15	(1L<<4)	bnx2.h
4984	BNX2_MISC_PRBS_CONTROL_ORDER_23	(2L<<4)	bnx2.h
4985	BNX2_MISC_PRBS_CONTROL_ORDER_31	(3L<<4)	bnx2.h
4986	BNX2_MISC_PRBS_STATUS	0x0000087c	bnx2.h
4987	BNX2_MISC_PRBS_STATUS_LOCK	(1L<<0)	bnx2.h
4988	BNX2_MISC_PRBS_STATUS_STKY	(1L<<1)	bnx2.h
4989	BNX2_MISC_PRBS_STATUS_ERRORS	(0x3fffL<<2)	bnx2.h
4990	BNX2_MISC_PRBS_STATUS_STATE	(0xfL<<16)	bnx2.h
4991	BNX2_MISC_SM_ASF_CONTROL	0x00000880	bnx2.h
4992	BNX2_MISC_SM_ASF_CONTROL_ASF_RS	(1L<<0)	bnx2.h
4993	BNX2_MISC_SM_ASF_CONTROL_TSC_EN	(1L<<1)	bnx2.h
4994	BNX2_MISC_SM_ASF_CONTROL_WG_TO	(1L<<2)	bnx2.h
4995	BNX2_MISC_SM_ASF_CONTROL_HB_TO	(1L<<3)	bnx2.h
4996	BNX2_MISC_SM_ASF_CONTROL_PA_TO	(1L<<4)	bnx2.h
4997	BNX2_MISC_SM_ASF_CONTROL_PL_TO	(1L<<5)	bnx2.h
4998	BNX2_MISC_SM_ASF_CONTROL_RT_TO	(1L<<6)	bnx2.h
4999	BNX2_MISC_SM_ASF_CONTROL_SMB_EV	(1L<<7)	bnx2.h
5000	BNX2_MISC_SM_ASF_CONTROL_RES	(0xfL<<8)	bnx2.h
5001	BNX2_MISC_SM_ASF_CONTROL_SMB_EN	(1L<<12)	bnx2.h
5002	BNX2_MISC_SM_ASF_CONTROL_SMB_BB	(1L<<13)	bnx2.h
5003	BNX2_MISC_SM_ASF_CONTROL_SMB_NO	(1L<<14)	bnx2.h
5004	BNX2_MISC_SM_ASF_CONTROL_SMB_AU	(1L<<15)	bnx2.h
5005	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<16)	bnx2.h
5006	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<24)	bnx2.h
5007	BNX2_MISC_SM_ASF_CONTROL_EN_NIC	(1L<<30)	bnx2.h
5008	BNX2_MISC_SM_ASF_CONTROL_SMB_EA	(1L<<31)	bnx2.h
5009	BNX2_MISC_SMB_IN	0x00000884	bnx2.h
5010	BNX2_MISC_SMB_IN_DAT_IN	(0xffL<<0)	bnx2.h
5011	BNX2_MISC_SMB_IN_RDY	(1L<<8)	bnx2.h
5012	BNX2_MISC_SMB_IN_DONE	(1L<<9)	bnx2.h
5013	BNX2_MISC_SMB_IN_FIRSTBYTE	(1L<<10)	bnx2.h
5014	BNX2_MISC_SMB_IN_STATUS	(0x7L<<11)	bnx2.h
5015	BNX2_MISC_SMB_IN_STATUS_OK	(0x0L<<11)	bnx2.h
5016	BNX2_MISC_SMB_IN_STATUS_PEC	(0x1L<<11)	bnx2.h
5017	BNX2_MISC_SMB_IN_STATUS_OFLOW	(0x2L<<11)	bnx2.h
5018	BNX2_MISC_SMB_IN_STATUS_STOP	(0x3L<<11)	bnx2.h
5019	BNX2_MISC_SMB_IN_STATUS_TIMEOUT	(0x4L<<11)	bnx2.h
5020	BNX2_MISC_SMB_OUT	0x00000888	bnx2.h
5021	BNX2_MISC_SMB_OUT_DAT_OUT	(0xffL<<0)	bnx2.h
5022	BNX2_MISC_SMB_OUT_RDY	(1L<<8)	bnx2.h
5023	BNX2_MISC_SMB_OUT_START	(1L<<9)	bnx2.h
5024	BNX2_MISC_SMB_OUT_LAST	(1L<<10)	bnx2.h
5025	BNX2_MISC_SMB_OUT_ACC_TYPE	(1L<<11)	bnx2.h
5026	BNX2_MISC_SMB_OUT_ENB_PEC	(1L<<12)	bnx2.h
5027	BNX2_MISC_SMB_OUT_GET_RX_LEN	(1L<<13)	bnx2.h
5028	BNX2_MISC_SMB_OUT_SMB_READ_LEN	(0x3fL<<14)	bnx2.h
5029	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xfL<<20)	bnx2.h
5030	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0L<<20)	bnx2.h
5031	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(1L<<20)	bnx2.h
5032	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(9L<<20)	bnx2.h
5033	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(2L<<20)	bnx2.h
5034	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(3L<<20)	bnx2.h
5035	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(4L<<20)	bnx2.h
5036	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(5L<<20)	bnx2.h
5037	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xdL<<20)	bnx2.h
5038	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0x6L<<20)	bnx2.h
5039	BNX2_MISC_SMB_OUT_SMB_OUT_SLAVE	(1L<<24)	bnx2.h
5040	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_E	(1L<<25)	bnx2.h
5041	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_I	(1L<<26)	bnx2.h
5042	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_E	(1L<<27)	bnx2.h
5043	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_I	(1L<<28)	bnx2.h
5044	BNX2_MISC_SMB_WATCHDOG	0x0000088c	bnx2.h
5045	BNX2_MISC_SMB_WATCHDOG_WATCHDOG	(0xffffL<<0)	bnx2.h
5046	BNX2_MISC_SMB_HEARTBEAT	0x00000890	bnx2.h
5047	BNX2_MISC_SMB_HEARTBEAT_HEARTBE	(0xffffL<<0)	bnx2.h
5048	BNX2_MISC_SMB_POLL_ASF	0x00000894	bnx2.h
5049	BNX2_MISC_SMB_POLL_ASF_POLL_ASF	(0xffffL<<0)	bnx2.h
5050	BNX2_MISC_SMB_POLL_LEGACY	0x00000898	bnx2.h
5051	BNX2_MISC_SMB_POLL_LEGACY_POLL_	(0xffffL<<0)	bnx2.h
5052	BNX2_MISC_SMB_RETRAN	0x0000089c	bnx2.h
5053	BNX2_MISC_SMB_RETRAN_RETRAN	(0xffL<<0)	bnx2.h
5054	BNX2_MISC_SMB_TIMESTAMP	0x000008a0	bnx2.h
5055	BNX2_MISC_SMB_TIMESTAMP_TIMESTA	(0xffffffffL<<0)	bnx2.h
5056	BNX2_MISC_PERR_ENA0	0x000008a4	bnx2.h
5057	BNX2_MISC_PERR_ENA0_COM_MISC_CT	(1L<<0)	bnx2.h
5058	BNX2_MISC_PERR_ENA0_COM_MISC_RE	(1L<<1)	bnx2.h
5059	BNX2_MISC_PERR_ENA0_COM_MISC_SC	(1L<<2)	bnx2.h
5060	BNX2_MISC_PERR_ENA0_CP_MISC_CTX	(1L<<3)	bnx2.h
5061	BNX2_MISC_PERR_ENA0_CP_MISC_REG	(1L<<4)	bnx2.h
5062	BNX2_MISC_PERR_ENA0_CP_MISC_SCP	(1L<<5)	bnx2.h
5063	BNX2_MISC_PERR_ENA0_CS_MISC_TME	(1L<<6)	bnx2.h
5064	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<7)	bnx2.h
5065	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<8)	bnx2.h
5066	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<9)	bnx2.h
5067	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<10)	bnx2.h
5068	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<11)	bnx2.h
5069	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<12)	bnx2.h
5070	BNX2_MISC_PERR_ENA0_CTX_MISC_PG	(1L<<13)	bnx2.h
5071	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<14)	bnx2.h
5072	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<15)	bnx2.h
5073	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<16)	bnx2.h
5074	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<17)	bnx2.h
5075	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<18)	bnx2.h
5076	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<19)	bnx2.h
5077	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<20)	bnx2.h
5078	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<21)	bnx2.h
5079	BNX2_MISC_PERR_ENA0_HC_MISC_DMA	(1L<<22)	bnx2.h
5080	BNX2_MISC_PERR_ENA0_MCP_MISC_RE	(1L<<23)	bnx2.h
5081	BNX2_MISC_PERR_ENA0_MCP_MISC_SC	(1L<<24)	bnx2.h
5082	BNX2_MISC_PERR_ENA0_MQ_MISC_CTX	(1L<<25)	bnx2.h
5083	BNX2_MISC_PERR_ENA0_RBDC_MISC	(1L<<26)	bnx2.h
5084	BNX2_MISC_PERR_ENA0_RBUF_MISC_M	(1L<<27)	bnx2.h
5085	BNX2_MISC_PERR_ENA0_RBUF_MISC_P	(1L<<28)	bnx2.h
5086	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<29)	bnx2.h
5087	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<30)	bnx2.h
5088	BNX2_MISC_PERR_ENA0_RV2P_MISC_C	(1L<<31)	bnx2.h
5089	BNX2_MISC_PERR_ENA1	0x000008a8	bnx2.h
5090	BNX2_MISC_PERR_ENA1_RV2P_MISC_C	(1L<<0)	bnx2.h
5091	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<1)	bnx2.h
5092	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<2)	bnx2.h
5093	BNX2_MISC_PERR_ENA1_RXP_MISC_CT	(1L<<3)	bnx2.h
5094	BNX2_MISC_PERR_ENA1_RXP_MISC_RE	(1L<<4)	bnx2.h
5095	BNX2_MISC_PERR_ENA1_RXP_MISC_SC	(1L<<5)	bnx2.h
5096	BNX2_MISC_PERR_ENA1_RXP_MISC_RB	(1L<<6)	bnx2.h
5097	BNX2_MISC_PERR_ENA1_TBDC_MISC	(1L<<7)	bnx2.h
5098	BNX2_MISC_PERR_ENA1_TDMA_MISC	(1L<<8)	bnx2.h
5099	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<9)	bnx2.h
5100	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<10)	bnx2.h
5101	BNX2_MISC_PERR_ENA1_TPAT_MISC_R	(1L<<11)	bnx2.h
5102	BNX2_MISC_PERR_ENA1_TPAT_MISC_S	(1L<<12)	bnx2.h
5103	BNX2_MISC_PERR_ENA1_TPBUF_MISC_	(1L<<13)	bnx2.h
5104	BNX2_MISC_PERR_ENA1_TSCH_MISC_L	(1L<<14)	bnx2.h
5105	BNX2_MISC_PERR_ENA1_TXP_MISC_CT	(1L<<15)	bnx2.h
5106	BNX2_MISC_PERR_ENA1_TXP_MISC_RE	(1L<<16)	bnx2.h
5107	BNX2_MISC_PERR_ENA1_TXP_MISC_SC	(1L<<17)	bnx2.h
5108	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<18)	bnx2.h
5109	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<19)	bnx2.h
5110	BNX2_MISC_PERR_ENA1_UMP_MISC_RX	(1L<<20)	bnx2.h
5111	BNX2_MISC_PERR_ENA1_UMP_MISC_TX	(1L<<21)	bnx2.h
5112	BNX2_MISC_PERR_ENA1_RDMAQ_MISC	(1L<<22)	bnx2.h
5113	BNX2_MISC_PERR_ENA1_CSQ_MISC	(1L<<23)	bnx2.h
5114	BNX2_MISC_PERR_ENA1_CPQ_MISC	(1L<<24)	bnx2.h
5115	BNX2_MISC_PERR_ENA1_MCPQ_MISC	(1L<<25)	bnx2.h
5116	BNX2_MISC_PERR_ENA1_RV2PMQ_MISC	(1L<<26)	bnx2.h
5117	BNX2_MISC_PERR_ENA1_RV2PPQ_MISC	(1L<<27)	bnx2.h
5118	BNX2_MISC_PERR_ENA1_RV2PTQ_MISC	(1L<<28)	bnx2.h
5119	BNX2_MISC_PERR_ENA1_RXPQ_MISC	(1L<<29)	bnx2.h
5120	BNX2_MISC_PERR_ENA1_RXPCQ_MISC	(1L<<30)	bnx2.h
5121	BNX2_MISC_PERR_ENA1_RLUPQ_MISC	(1L<<31)	bnx2.h
5122	BNX2_MISC_PERR_ENA2	0x000008ac	bnx2.h
5123	BNX2_MISC_PERR_ENA2_COMQ_MISC	(1L<<0)	bnx2.h
5124	BNX2_MISC_PERR_ENA2_COMXQ_MISC	(1L<<1)	bnx2.h
5125	BNX2_MISC_PERR_ENA2_COMTQ_MISC	(1L<<2)	bnx2.h
5126	BNX2_MISC_PERR_ENA2_TSCHQ_MISC	(1L<<3)	bnx2.h
5127	BNX2_MISC_PERR_ENA2_TBDRQ_MISC	(1L<<4)	bnx2.h
5128	BNX2_MISC_PERR_ENA2_TXPQ_MISC	(1L<<5)	bnx2.h
5129	BNX2_MISC_PERR_ENA2_TDMAQ_MISC	(1L<<6)	bnx2.h
5130	BNX2_MISC_PERR_ENA2_TPATQ_MISC	(1L<<7)	bnx2.h
5131	BNX2_MISC_PERR_ENA2_TASQ_MISC	(1L<<8)	bnx2.h
5132	BNX2_MISC_DEBUG_VECTOR_SEL	0x000008b0	bnx2.h
5133	BNX2_MISC_DEBUG_VECTOR_SEL_0	(0xfffL<<0)	bnx2.h
5134	BNX2_MISC_DEBUG_VECTOR_SEL_1	(0xfffL<<12)	bnx2.h
5135	BNX2_MISC_VREG_CONTROL	0x000008b4	bnx2.h
5136	BNX2_MISC_VREG_CONTROL_1_2	(0xfL<<0)	bnx2.h
5137	BNX2_MISC_VREG_CONTROL_2_5	(0xfL<<4)	bnx2.h
5138	BNX2_MISC_FINAL_CLK_CTL_VAL	0x000008b8	bnx2.h
5139	BNX2_MISC_FINAL_CLK_CTL_VAL_MIS	(0x3ffffffL<<6)	bnx2.h
5140	BNX2_MISC_UNUSED0	0x000008bc	bnx2.h
5141	BNX2_NVM_COMMAND	0x00006400	bnx2.h
5142	BNX2_NVM_COMMAND_RST	(1L<<0)	bnx2.h
5143	BNX2_NVM_COMMAND_DONE	(1L<<3)	bnx2.h
5144	BNX2_NVM_COMMAND_DOIT	(1L<<4)	bnx2.h
5145	BNX2_NVM_COMMAND_WR	(1L<<5)	bnx2.h
5146	BNX2_NVM_COMMAND_ERASE	(1L<<6)	bnx2.h
5147	BNX2_NVM_COMMAND_FIRST	(1L<<7)	bnx2.h
5148	BNX2_NVM_COMMAND_LAST	(1L<<8)	bnx2.h
5149	BNX2_NVM_COMMAND_WREN	(1L<<16)	bnx2.h
5150	BNX2_NVM_COMMAND_WRDI	(1L<<17)	bnx2.h
5151	BNX2_NVM_COMMAND_EWSR	(1L<<18)	bnx2.h
5152	BNX2_NVM_COMMAND_WRSR	(1L<<19)	bnx2.h
5153	BNX2_NVM_STATUS	0x00006404	bnx2.h
5154	BNX2_NVM_STATUS_PI_FSM_STATE	(0xfL<<0)	bnx2.h
5155	BNX2_NVM_STATUS_EE_FSM_STATE	(0xfL<<4)	bnx2.h
5156	BNX2_NVM_STATUS_EQ_FSM_STATE	(0xfL<<8)	bnx2.h
5157	BNX2_NVM_WRITE	0x00006408	bnx2.h
5158	BNX2_NVM_WRITE_NVM_WRITE_VALUE	(0xffffffffL<<0)	bnx2.h
5159	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(0L<<0)	bnx2.h
5160	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(1L<<0)	bnx2.h
5161	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(2L<<0)	bnx2.h
5162	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(4L<<0)	bnx2.h
5163	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(8L<<0)	bnx2.h
5164	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(16L<<0)	bnx2.h
5165	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(32L<<0)	bnx2.h
5166	BNX2_NVM_ADDR	0x0000640c	bnx2.h
5167	BNX2_NVM_ADDR_NVM_ADDR_VALUE	(0xffffffL<<0)	bnx2.h
5168	BNX2_NVM_ADDR_NVM_ADDR_VALUE_BI	(0L<<0)	bnx2.h
5169	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(1L<<0)	bnx2.h
5170	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(2L<<0)	bnx2.h
5171	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SC	(4L<<0)	bnx2.h
5172	BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS	(8L<<0)	bnx2.h
5173	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO	(16L<<0)	bnx2.h
5174	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI	(32L<<0)	bnx2.h
5175	BNX2_NVM_READ	0x00006410	bnx2.h
5176	BNX2_NVM_READ_NVM_READ_VALUE	(0xffffffffL<<0)	bnx2.h
5177	BNX2_NVM_READ_NVM_READ_VALUE_BI	(0L<<0)	bnx2.h
5178	BNX2_NVM_READ_NVM_READ_VALUE_EE	(1L<<0)	bnx2.h
5179	BNX2_NVM_READ_NVM_READ_VALUE_EE	(2L<<0)	bnx2.h
5180	BNX2_NVM_READ_NVM_READ_VALUE_SC	(4L<<0)	bnx2.h
5181	BNX2_NVM_READ_NVM_READ_VALUE_CS	(8L<<0)	bnx2.h
5182	BNX2_NVM_READ_NVM_READ_VALUE_SO	(16L<<0)	bnx2.h
5183	BNX2_NVM_READ_NVM_READ_VALUE_SI	(32L<<0)	bnx2.h
5184	BNX2_NVM_CFG1	0x00006414	bnx2.h
5185	BNX2_NVM_CFG1_FLASH_MODE	(1L<<0)	bnx2.h
5186	BNX2_NVM_CFG1_BUFFER_MODE	(1L<<1)	bnx2.h
5187	BNX2_NVM_CFG1_PASS_MODE	(1L<<2)	bnx2.h
5188	BNX2_NVM_CFG1_BITBANG_MODE	(1L<<3)	bnx2.h
5189	BNX2_NVM_CFG1_STATUS_BIT	(0x7L<<4)	bnx2.h
5190	BNX2_NVM_CFG1_STATUS_BIT_FLASH_	(0L<<4)	bnx2.h
5191	BNX2_NVM_CFG1_STATUS_BIT_BUFFER	(7L<<4)	bnx2.h
5192	BNX2_NVM_CFG1_SPI_CLK_DIV	(0xfL<<7)	bnx2.h
5193	BNX2_NVM_CFG1_SEE_CLK_DIV	(0x7ffL<<11)	bnx2.h
5194	BNX2_NVM_CFG1_PROTECT_MODE	(1L<<24)	bnx2.h
5195	BNX2_NVM_CFG1_FLASH_SIZE	(1L<<25)	bnx2.h
5196	BNX2_NVM_CFG1_COMPAT_BYPASSS	(1L<<31)	bnx2.h
5197	BNX2_NVM_CFG2	0x00006418	bnx2.h
5198	BNX2_NVM_CFG2_ERASE_CMD	(0xffL<<0)	bnx2.h
5199	BNX2_NVM_CFG2_DUMMY	(0xffL<<8)	bnx2.h
5200	BNX2_NVM_CFG2_STATUS_CMD	(0xffL<<16)	bnx2.h
5201	BNX2_NVM_CFG3	0x0000641c	bnx2.h
5202	BNX2_NVM_CFG3_BUFFER_RD_CMD	(0xffL<<0)	bnx2.h
5203	BNX2_NVM_CFG3_WRITE_CMD	(0xffL<<8)	bnx2.h
5204	BNX2_NVM_CFG3_BUFFER_WRITE_CMD	(0xffL<<16)	bnx2.h
5205	BNX2_NVM_CFG3_READ_CMD	(0xffL<<24)	bnx2.h
5206	BNX2_NVM_SW_ARB	0x00006420	bnx2.h
5207	BNX2_NVM_SW_ARB_ARB_REQ_SET0	(1L<<0)	bnx2.h
5208	BNX2_NVM_SW_ARB_ARB_REQ_SET1	(1L<<1)	bnx2.h
5209	BNX2_NVM_SW_ARB_ARB_REQ_SET2	(1L<<2)	bnx2.h
5210	BNX2_NVM_SW_ARB_ARB_REQ_SET3	(1L<<3)	bnx2.h
5211	BNX2_NVM_SW_ARB_ARB_REQ_CLR0	(1L<<4)	bnx2.h
5212	BNX2_NVM_SW_ARB_ARB_REQ_CLR1	(1L<<5)	bnx2.h
5213	BNX2_NVM_SW_ARB_ARB_REQ_CLR2	(1L<<6)	bnx2.h
5214	BNX2_NVM_SW_ARB_ARB_REQ_CLR3	(1L<<7)	bnx2.h
5215	BNX2_NVM_SW_ARB_ARB_ARB0	(1L<<8)	bnx2.h
5216	BNX2_NVM_SW_ARB_ARB_ARB1	(1L<<9)	bnx2.h
5217	BNX2_NVM_SW_ARB_ARB_ARB2	(1L<<10)	bnx2.h
5218	BNX2_NVM_SW_ARB_ARB_ARB3	(1L<<11)	bnx2.h
5219	BNX2_NVM_SW_ARB_REQ0	(1L<<12)	bnx2.h
5220	BNX2_NVM_SW_ARB_REQ1	(1L<<13)	bnx2.h
5221	BNX2_NVM_SW_ARB_REQ2	(1L<<14)	bnx2.h
5222	BNX2_NVM_SW_ARB_REQ3	(1L<<15)	bnx2.h
5223	BNX2_NVM_ACCESS_ENABLE	0x00006424	bnx2.h
5224	BNX2_NVM_ACCESS_ENABLE_EN	(1L<<0)	bnx2.h
5225	BNX2_NVM_ACCESS_ENABLE_WR_EN	(1L<<1)	bnx2.h
5226	BNX2_NVM_WRITE1	0x00006428	bnx2.h
5227	BNX2_NVM_WRITE1_WREN_CMD	(0xffL<<0)	bnx2.h
5228	BNX2_NVM_WRITE1_WRDI_CMD	(0xffL<<8)	bnx2.h
5229	BNX2_NVM_WRITE1_SR_DATA	(0xffL<<16)	bnx2.h
5230	BNX2_DMA_COMMAND	0x00000c00	bnx2.h
5231	BNX2_DMA_COMMAND_ENABLE	(1L<<0)	bnx2.h
5232	BNX2_DMA_STATUS	0x00000c04	bnx2.h
5233	BNX2_DMA_STATUS_PAR_ERROR_STATE	(1L<<0)	bnx2.h
5234	BNX2_DMA_STATUS_READ_TRANSFERS_	(1L<<16)	bnx2.h
5235	BNX2_DMA_STATUS_READ_DELAY_PCI_	(1L<<17)	bnx2.h
5236	BNX2_DMA_STATUS_BIG_READ_TRANSF	(1L<<18)	bnx2.h
5237	BNX2_DMA_STATUS_BIG_READ_DELAY_	(1L<<19)	bnx2.h
5238	BNX2_DMA_STATUS_BIG_READ_RETRY_	(1L<<20)	bnx2.h
5239	BNX2_DMA_STATUS_WRITE_TRANSFERS	(1L<<21)	bnx2.h
5240	BNX2_DMA_STATUS_WRITE_DELAY_PCI	(1L<<22)	bnx2.h
5241	BNX2_DMA_STATUS_BIG_WRITE_TRANS	(1L<<23)	bnx2.h
5242	BNX2_DMA_STATUS_BIG_WRITE_DELAY	(1L<<24)	bnx2.h
5243	BNX2_DMA_STATUS_BIG_WRITE_RETRY	(1L<<25)	bnx2.h
5244	BNX2_DMA_CONFIG	0x00000c08	bnx2.h
5245	BNX2_DMA_CONFIG_DATA_BYTE_SWAP	(1L<<0)	bnx2.h
5246	BNX2_DMA_CONFIG_DATA_WORD_SWAP	(1L<<1)	bnx2.h
5247	BNX2_DMA_CONFIG_CNTL_BYTE_SWAP	(1L<<4)	bnx2.h
5248	BNX2_DMA_CONFIG_CNTL_WORD_SWAP	(1L<<5)	bnx2.h
5249	BNX2_DMA_CONFIG_ONE_DMA	(1L<<6)	bnx2.h
5250	BNX2_DMA_CONFIG_CNTL_TWO_DMA	(1L<<7)	bnx2.h
5251	BNX2_DMA_CONFIG_CNTL_FPGA_MODE	(1L<<8)	bnx2.h
5252	BNX2_DMA_CONFIG_CNTL_PING_PONG_	(1L<<10)	bnx2.h
5253	BNX2_DMA_CONFIG_CNTL_PCI_COMP_D	(1L<<11)	bnx2.h
5254	BNX2_DMA_CONFIG_NO_RCHANS_IN_US	(0xfL<<12)	bnx2.h
5255	BNX2_DMA_CONFIG_NO_WCHANS_IN_US	(0xfL<<16)	bnx2.h
5256	BNX2_DMA_CONFIG_PCI_CLK_CMP_BIT	(0x7L<<20)	bnx2.h
5257	BNX2_DMA_CONFIG_PCI_FAST_CLK_CM	(1L<<23)	bnx2.h
5258	BNX2_DMA_CONFIG_BIG_SIZE	(0xfL<<24)	bnx2.h
5259	BNX2_DMA_CONFIG_BIG_SIZE_NONE	(0x0L<<24)	bnx2.h
5260	BNX2_DMA_CONFIG_BIG_SIZE_64	(0x1L<<24)	bnx2.h
5261	BNX2_DMA_CONFIG_BIG_SIZE_128	(0x2L<<24)	bnx2.h
5262	BNX2_DMA_CONFIG_BIG_SIZE_256	(0x4L<<24)	bnx2.h
5263	BNX2_DMA_CONFIG_BIG_SIZE_512	(0x8L<<24)	bnx2.h
5264	BNX2_DMA_BLACKOUT	0x00000c0c	bnx2.h
5265	BNX2_DMA_BLACKOUT_RD_RETRY_BLAC	(0xffL<<0)	bnx2.h
5266	BNX2_DMA_BLACKOUT_2ND_RD_RETRY_	(0xffL<<8)	bnx2.h
5267	BNX2_DMA_BLACKOUT_WR_RETRY_BLAC	(0xffL<<16)	bnx2.h
5268	BNX2_DMA_RCHAN_STAT	0x00000c30	bnx2.h
5269	BNX2_DMA_RCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
5270	BNX2_DMA_RCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
5271	BNX2_DMA_RCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
5272	BNX2_DMA_RCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
5273	BNX2_DMA_RCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
5274	BNX2_DMA_RCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
5275	BNX2_DMA_RCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
5276	BNX2_DMA_RCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
5277	BNX2_DMA_RCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
5278	BNX2_DMA_RCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
5279	BNX2_DMA_RCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
5280	BNX2_DMA_RCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
5281	BNX2_DMA_RCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
5282	BNX2_DMA_RCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
5283	BNX2_DMA_RCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
5284	BNX2_DMA_RCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
5285	BNX2_DMA_WCHAN_STAT	0x00000c34	bnx2.h
5286	BNX2_DMA_WCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
5287	BNX2_DMA_WCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
5288	BNX2_DMA_WCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
5289	BNX2_DMA_WCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
5290	BNX2_DMA_WCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
5291	BNX2_DMA_WCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
5292	BNX2_DMA_WCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
5293	BNX2_DMA_WCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
5294	BNX2_DMA_WCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
5295	BNX2_DMA_WCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
5296	BNX2_DMA_WCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
5297	BNX2_DMA_WCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
5298	BNX2_DMA_WCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
5299	BNX2_DMA_WCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
5300	BNX2_DMA_WCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
5301	BNX2_DMA_WCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
5302	BNX2_DMA_RCHAN_ASSIGNMENT	0x00000c38	bnx2.h
5303	BNX2_DMA_RCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
5304	BNX2_DMA_RCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
5305	BNX2_DMA_RCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
5306	BNX2_DMA_RCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
5307	BNX2_DMA_RCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
5308	BNX2_DMA_RCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
5309	BNX2_DMA_RCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
5310	BNX2_DMA_RCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
5311	BNX2_DMA_WCHAN_ASSIGNMENT	0x00000c3c	bnx2.h
5312	BNX2_DMA_WCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
5313	BNX2_DMA_WCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
5314	BNX2_DMA_WCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
5315	BNX2_DMA_WCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
5316	BNX2_DMA_WCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
5317	BNX2_DMA_WCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
5318	BNX2_DMA_WCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
5319	BNX2_DMA_WCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
5320	BNX2_DMA_RCHAN_STAT_00	0x00000c40	bnx2.h
5321	BNX2_DMA_RCHAN_STAT_00_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
5322	BNX2_DMA_RCHAN_STAT_01	0x00000c44	bnx2.h
5323	BNX2_DMA_RCHAN_STAT_01_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
5324	BNX2_DMA_RCHAN_STAT_02	0x00000c48	bnx2.h
5325	BNX2_DMA_RCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
5326	BNX2_DMA_RCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
5327	BNX2_DMA_RCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
5328	BNX2_DMA_RCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
5329	BNX2_DMA_RCHAN_STAT_10	0x00000c4c	bnx2.h
5330	BNX2_DMA_RCHAN_STAT_11	0x00000c50	bnx2.h
5331	BNX2_DMA_RCHAN_STAT_12	0x00000c54	bnx2.h
5332	BNX2_DMA_RCHAN_STAT_20	0x00000c58	bnx2.h
5333	BNX2_DMA_RCHAN_STAT_21	0x00000c5c	bnx2.h
5334	BNX2_DMA_RCHAN_STAT_22	0x00000c60	bnx2.h
5335	BNX2_DMA_RCHAN_STAT_30	0x00000c64	bnx2.h
5336	BNX2_DMA_RCHAN_STAT_31	0x00000c68	bnx2.h
5337	BNX2_DMA_RCHAN_STAT_32	0x00000c6c	bnx2.h
5338	BNX2_DMA_RCHAN_STAT_40	0x00000c70	bnx2.h
5339	BNX2_DMA_RCHAN_STAT_41	0x00000c74	bnx2.h
5340	BNX2_DMA_RCHAN_STAT_42	0x00000c78	bnx2.h
5341	BNX2_DMA_RCHAN_STAT_50	0x00000c7c	bnx2.h
5342	BNX2_DMA_RCHAN_STAT_51	0x00000c80	bnx2.h
5343	BNX2_DMA_RCHAN_STAT_52	0x00000c84	bnx2.h
5344	BNX2_DMA_RCHAN_STAT_60	0x00000c88	bnx2.h
5345	BNX2_DMA_RCHAN_STAT_61	0x00000c8c	bnx2.h
5346	BNX2_DMA_RCHAN_STAT_62	0x00000c90	bnx2.h
5347	BNX2_DMA_RCHAN_STAT_70	0x00000c94	bnx2.h
5348	BNX2_DMA_RCHAN_STAT_71	0x00000c98	bnx2.h
5349	BNX2_DMA_RCHAN_STAT_72	0x00000c9c	bnx2.h
5350	BNX2_DMA_WCHAN_STAT_00	0x00000ca0	bnx2.h
5351	BNX2_DMA_WCHAN_STAT_00_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
5352	BNX2_DMA_WCHAN_STAT_01	0x00000ca4	bnx2.h
5353	BNX2_DMA_WCHAN_STAT_01_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
5354	BNX2_DMA_WCHAN_STAT_02	0x00000ca8	bnx2.h
5355	BNX2_DMA_WCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
5356	BNX2_DMA_WCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
5357	BNX2_DMA_WCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
5358	BNX2_DMA_WCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
5359	BNX2_DMA_WCHAN_STAT_10	0x00000cac	bnx2.h
5360	BNX2_DMA_WCHAN_STAT_11	0x00000cb0	bnx2.h
5361	BNX2_DMA_WCHAN_STAT_12	0x00000cb4	bnx2.h
5362	BNX2_DMA_WCHAN_STAT_20	0x00000cb8	bnx2.h
5363	BNX2_DMA_WCHAN_STAT_21	0x00000cbc	bnx2.h
5364	BNX2_DMA_WCHAN_STAT_22	0x00000cc0	bnx2.h
5365	BNX2_DMA_WCHAN_STAT_30	0x00000cc4	bnx2.h
5366	BNX2_DMA_WCHAN_STAT_31	0x00000cc8	bnx2.h
5367	BNX2_DMA_WCHAN_STAT_32	0x00000ccc	bnx2.h
5368	BNX2_DMA_WCHAN_STAT_40	0x00000cd0	bnx2.h
5369	BNX2_DMA_WCHAN_STAT_41	0x00000cd4	bnx2.h
5370	BNX2_DMA_WCHAN_STAT_42	0x00000cd8	bnx2.h
5371	BNX2_DMA_WCHAN_STAT_50	0x00000cdc	bnx2.h
5372	BNX2_DMA_WCHAN_STAT_51	0x00000ce0	bnx2.h
5373	BNX2_DMA_WCHAN_STAT_52	0x00000ce4	bnx2.h
5374	BNX2_DMA_WCHAN_STAT_60	0x00000ce8	bnx2.h
5375	BNX2_DMA_WCHAN_STAT_61	0x00000cec	bnx2.h
5376	BNX2_DMA_WCHAN_STAT_62	0x00000cf0	bnx2.h
5377	BNX2_DMA_WCHAN_STAT_70	0x00000cf4	bnx2.h
5378	BNX2_DMA_WCHAN_STAT_71	0x00000cf8	bnx2.h
5379	BNX2_DMA_WCHAN_STAT_72	0x00000cfc	bnx2.h
5380	BNX2_DMA_ARB_STAT_00	0x00000d00	bnx2.h
5381	BNX2_DMA_ARB_STAT_00_MASTER	(0xffffL<<0)	bnx2.h
5382	BNX2_DMA_ARB_STAT_00_MASTER_ENC	(0xffL<<16)	bnx2.h
5383	BNX2_DMA_ARB_STAT_00_CUR_BINMST	(0xffL<<24)	bnx2.h
5384	BNX2_DMA_ARB_STAT_01	0x00000d04	bnx2.h
5385	BNX2_DMA_ARB_STAT_01_LPR_RPTR	(0xfL<<0)	bnx2.h
5386	BNX2_DMA_ARB_STAT_01_LPR_WPTR	(0xfL<<4)	bnx2.h
5387	BNX2_DMA_ARB_STAT_01_LPB_RPTR	(0xfL<<8)	bnx2.h
5388	BNX2_DMA_ARB_STAT_01_LPB_WPTR	(0xfL<<12)	bnx2.h
5389	BNX2_DMA_ARB_STAT_01_HPR_RPTR	(0xfL<<16)	bnx2.h
5390	BNX2_DMA_ARB_STAT_01_HPR_WPTR	(0xfL<<20)	bnx2.h
5391	BNX2_DMA_ARB_STAT_01_HPB_RPTR	(0xfL<<24)	bnx2.h
5392	BNX2_DMA_ARB_STAT_01_HPB_WPTR	(0xfL<<28)	bnx2.h
5393	BNX2_DMA_FUSE_CTRL0_CMD	0x00000f00	bnx2.h
5394	BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_D	(1L<<0)	bnx2.h
5395	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_D	(1L<<1)	bnx2.h
5396	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT	(1L<<2)	bnx2.h
5397	BNX2_DMA_FUSE_CTRL0_CMD_LOAD	(1L<<3)	bnx2.h
5398	BNX2_DMA_FUSE_CTRL0_CMD_SEL	(0xfL<<8)	bnx2.h
5399	BNX2_DMA_FUSE_CTRL0_DATA	0x00000f04	bnx2.h
5400	BNX2_DMA_FUSE_CTRL1_CMD	0x00000f08	bnx2.h
5401	BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_D	(1L<<0)	bnx2.h
5402	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_D	(1L<<1)	bnx2.h
5403	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT	(1L<<2)	bnx2.h
5404	BNX2_DMA_FUSE_CTRL1_CMD_LOAD	(1L<<3)	bnx2.h
5405	BNX2_DMA_FUSE_CTRL1_CMD_SEL	(0xfL<<8)	bnx2.h
5406	BNX2_DMA_FUSE_CTRL1_DATA	0x00000f0c	bnx2.h
5407	BNX2_DMA_FUSE_CTRL2_CMD	0x00000f10	bnx2.h
5408	BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_D	(1L<<0)	bnx2.h
5409	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_D	(1L<<1)	bnx2.h
5410	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT	(1L<<2)	bnx2.h
5411	BNX2_DMA_FUSE_CTRL2_CMD_LOAD	(1L<<3)	bnx2.h
5412	BNX2_DMA_FUSE_CTRL2_CMD_SEL	(0xfL<<8)	bnx2.h
5413	BNX2_DMA_FUSE_CTRL2_DATA	0x00000f14	bnx2.h
5414	BNX2_CTX_COMMAND	0x00001000	bnx2.h
5415	BNX2_CTX_COMMAND_ENABLED	(1L<<0)	bnx2.h
5416	BNX2_CTX_STATUS	0x00001004	bnx2.h
5417	BNX2_CTX_STATUS_LOCK_WAIT	(1L<<0)	bnx2.h
5418	BNX2_CTX_STATUS_READ_STAT	(1L<<16)	bnx2.h
5419	BNX2_CTX_STATUS_WRITE_STAT	(1L<<17)	bnx2.h
5420	BNX2_CTX_STATUS_ACC_STALL_STAT	(1L<<18)	bnx2.h
5421	BNX2_CTX_STATUS_LOCK_STALL_STAT	(1L<<19)	bnx2.h
5422	BNX2_CTX_VIRT_ADDR	0x00001008	bnx2.h
5423	BNX2_CTX_VIRT_ADDR_VIRT_ADDR	(0x7fffL<<6)	bnx2.h
5424	BNX2_CTX_PAGE_TBL	0x0000100c	bnx2.h
5425	BNX2_CTX_PAGE_TBL_PAGE_TBL	(0x3fffL<<6)	bnx2.h
5426	BNX2_CTX_DATA_ADR	0x00001010	bnx2.h
5427	BNX2_CTX_DATA_ADR_DATA_ADR	(0x7ffffL<<2)	bnx2.h
5428	BNX2_CTX_DATA	0x00001014	bnx2.h
5429	BNX2_CTX_LOCK	0x00001018	bnx2.h
5430	BNX2_CTX_LOCK_TYPE	(0x7L<<0)	bnx2.h
5431	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VO	(0x0L<<0)	bnx2.h
5432	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_CO	(0x7L<<0)	bnx2.h
5433	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PR	(0x1L<<0)	bnx2.h
5434	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX	(0x2L<<0)	bnx2.h
5435	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TI	(0x4L<<0)	bnx2.h
5436	BNX2_CTX_LOCK_CID_VALUE	(0x3fffL<<7)	bnx2.h
5437	BNX2_CTX_LOCK_GRANTED	(1L<<26)	bnx2.h
5438	BNX2_CTX_LOCK_MODE	(0x7L<<27)	bnx2.h
5439	BNX2_CTX_LOCK_MODE_UNLOCK	(0x0L<<27)	bnx2.h
5440	BNX2_CTX_LOCK_MODE_IMMEDIATE	(0x1L<<27)	bnx2.h
5441	BNX2_CTX_LOCK_MODE_SURE	(0x2L<<27)	bnx2.h
5442	BNX2_CTX_LOCK_STATUS	(1L<<30)	bnx2.h
5443	BNX2_CTX_LOCK_REQ	(1L<<31)	bnx2.h
5444	BNX2_CTX_ACCESS_STATUS	0x00001040	bnx2.h
5445	BNX2_CTX_ACCESS_STATUS_MASTEREN	(0xfL<<0)	bnx2.h
5446	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<10)	bnx2.h
5447	BNX2_CTX_ACCESS_STATUS_PAGETABL	(0x3L<<12)	bnx2.h
5448	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<14)	bnx2.h
5449	BNX2_CTX_ACCESS_STATUS_QUALIFIE	(0x7ffL<<17)	bnx2.h
5450	BNX2_CTX_DBG_LOCK_STATUS	0x00001044	bnx2.h
5451	BNX2_CTX_DBG_LOCK_STATUS_SM	(0x3ffL<<0)	bnx2.h
5452	BNX2_CTX_DBG_LOCK_STATUS_MATCH	(0x3ffL<<22)	bnx2.h
5453	BNX2_CTX_CHNL_LOCK_STATUS_0	0x00001080	bnx2.h
5454	BNX2_CTX_CHNL_LOCK_STATUS_0_CID	(0x3fffL<<0)	bnx2.h
5455	BNX2_CTX_CHNL_LOCK_STATUS_0_TYP	(0x3L<<14)	bnx2.h
5456	BNX2_CTX_CHNL_LOCK_STATUS_0_MOD	(1L<<16)	bnx2.h
5457	BNX2_CTX_CHNL_LOCK_STATUS_1	0x00001084	bnx2.h
5458	BNX2_CTX_CHNL_LOCK_STATUS_2	0x00001088	bnx2.h
5459	BNX2_CTX_CHNL_LOCK_STATUS_3	0x0000108c	bnx2.h
5460	BNX2_CTX_CHNL_LOCK_STATUS_4	0x00001090	bnx2.h
5461	BNX2_CTX_CHNL_LOCK_STATUS_5	0x00001094	bnx2.h
5462	BNX2_CTX_CHNL_LOCK_STATUS_6	0x00001098	bnx2.h
5463	BNX2_CTX_CHNL_LOCK_STATUS_7	0x0000109c	bnx2.h
5464	BNX2_CTX_CHNL_LOCK_STATUS_8	0x000010a0	bnx2.h
5465	BNX2_EMAC_MODE	0x00001400	bnx2.h
5466	BNX2_EMAC_MODE_RESET	(1L<<0)	bnx2.h
5467	BNX2_EMAC_MODE_HALF_DUPLEX	(1L<<1)	bnx2.h
5468	BNX2_EMAC_MODE_PORT	(0x3L<<2)	bnx2.h
5469	BNX2_EMAC_MODE_PORT_NONE	(0L<<2)	bnx2.h
5470	BNX2_EMAC_MODE_PORT_MII	(1L<<2)	bnx2.h
5471	BNX2_EMAC_MODE_PORT_GMII	(2L<<2)	bnx2.h
5472	BNX2_EMAC_MODE_PORT_MII_10	(3L<<2)	bnx2.h
5473	BNX2_EMAC_MODE_MAC_LOOP	(1L<<4)	bnx2.h
5474	BNX2_EMAC_MODE_25G	(1L<<5)	bnx2.h
5475	BNX2_EMAC_MODE_TAGGED_MAC_CTL	(1L<<7)	bnx2.h
5476	BNX2_EMAC_MODE_TX_BURST	(1L<<8)	bnx2.h
5477	BNX2_EMAC_MODE_MAX_DEFER_DROP_E	(1L<<9)	bnx2.h
5478	BNX2_EMAC_MODE_EXT_LINK_POL	(1L<<10)	bnx2.h
5479	BNX2_EMAC_MODE_FORCE_LINK	(1L<<11)	bnx2.h
5480	BNX2_EMAC_MODE_MPKT	(1L<<18)	bnx2.h
5481	BNX2_EMAC_MODE_MPKT_RCVD	(1L<<19)	bnx2.h
5482	BNX2_EMAC_MODE_ACPI_RCVD	(1L<<20)	bnx2.h
5483	BNX2_EMAC_STATUS	0x00001404	bnx2.h
5484	BNX2_EMAC_STATUS_LINK	(1L<<11)	bnx2.h
5485	BNX2_EMAC_STATUS_LINK_CHANGE	(1L<<12)	bnx2.h
5486	BNX2_EMAC_STATUS_MI_COMPLETE	(1L<<22)	bnx2.h
5487	BNX2_EMAC_STATUS_MI_INT	(1L<<23)	bnx2.h
5488	BNX2_EMAC_STATUS_AP_ERROR	(1L<<24)	bnx2.h
5489	BNX2_EMAC_STATUS_PARITY_ERROR_S	(1L<<31)	bnx2.h
5490	BNX2_EMAC_ATTENTION_ENA	0x00001408	bnx2.h
5491	BNX2_EMAC_ATTENTION_ENA_LINK	(1L<<11)	bnx2.h
5492	BNX2_EMAC_ATTENTION_ENA_MI_COMP	(1L<<22)	bnx2.h
5493	BNX2_EMAC_ATTENTION_ENA_MI_INT	(1L<<23)	bnx2.h
5494	BNX2_EMAC_ATTENTION_ENA_AP_ERRO	(1L<<24)	bnx2.h
5495	BNX2_EMAC_LED	0x0000140c	bnx2.h
5496	BNX2_EMAC_LED_OVERRIDE	(1L<<0)	bnx2.h
5497	BNX2_EMAC_LED_1000MB_OVERRIDE	(1L<<1)	bnx2.h
5498	BNX2_EMAC_LED_100MB_OVERRIDE	(1L<<2)	bnx2.h
5499	BNX2_EMAC_LED_10MB_OVERRIDE	(1L<<3)	bnx2.h
5500	BNX2_EMAC_LED_TRAFFIC_OVERRIDE	(1L<<4)	bnx2.h
5501	BNX2_EMAC_LED_BLNK_TRAFFIC	(1L<<5)	bnx2.h
5502	BNX2_EMAC_LED_TRAFFIC	(1L<<6)	bnx2.h
5503	BNX2_EMAC_LED_1000MB	(1L<<7)	bnx2.h
5504	BNX2_EMAC_LED_100MB	(1L<<8)	bnx2.h
5505	BNX2_EMAC_LED_10MB	(1L<<9)	bnx2.h
5506	BNX2_EMAC_LED_TRAFFIC_STAT	(1L<<10)	bnx2.h
5507	BNX2_EMAC_LED_BLNK_RATE	(0xfffL<<19)	bnx2.h
5508	BNX2_EMAC_LED_BLNK_RATE_ENA	(1L<<31)	bnx2.h
5509	BNX2_EMAC_MAC_MATCH0	0x00001410	bnx2.h
5510	BNX2_EMAC_MAC_MATCH1	0x00001414	bnx2.h
5511	BNX2_EMAC_MAC_MATCH2	0x00001418	bnx2.h
5512	BNX2_EMAC_MAC_MATCH3	0x0000141c	bnx2.h
5513	BNX2_EMAC_MAC_MATCH4	0x00001420	bnx2.h
5514	BNX2_EMAC_MAC_MATCH5	0x00001424	bnx2.h
5515	BNX2_EMAC_MAC_MATCH6	0x00001428	bnx2.h
5516	BNX2_EMAC_MAC_MATCH7	0x0000142c	bnx2.h
5517	BNX2_EMAC_MAC_MATCH8	0x00001430	bnx2.h
5518	BNX2_EMAC_MAC_MATCH9	0x00001434	bnx2.h
5519	BNX2_EMAC_MAC_MATCH10	0x00001438	bnx2.h
5520	BNX2_EMAC_MAC_MATCH11	0x0000143c	bnx2.h
5521	BNX2_EMAC_MAC_MATCH12	0x00001440	bnx2.h
5522	BNX2_EMAC_MAC_MATCH13	0x00001444	bnx2.h
5523	BNX2_EMAC_MAC_MATCH14	0x00001448	bnx2.h
5524	BNX2_EMAC_MAC_MATCH15	0x0000144c	bnx2.h
5525	BNX2_EMAC_MAC_MATCH16	0x00001450	bnx2.h
5526	BNX2_EMAC_MAC_MATCH17	0x00001454	bnx2.h
5527	BNX2_EMAC_MAC_MATCH18	0x00001458	bnx2.h
5528	BNX2_EMAC_MAC_MATCH19	0x0000145c	bnx2.h
5529	BNX2_EMAC_MAC_MATCH20	0x00001460	bnx2.h
5530	BNX2_EMAC_MAC_MATCH21	0x00001464	bnx2.h
5531	BNX2_EMAC_MAC_MATCH22	0x00001468	bnx2.h
5532	BNX2_EMAC_MAC_MATCH23	0x0000146c	bnx2.h
5533	BNX2_EMAC_MAC_MATCH24	0x00001470	bnx2.h
5534	BNX2_EMAC_MAC_MATCH25	0x00001474	bnx2.h
5535	BNX2_EMAC_MAC_MATCH26	0x00001478	bnx2.h
5536	BNX2_EMAC_MAC_MATCH27	0x0000147c	bnx2.h
5537	BNX2_EMAC_MAC_MATCH28	0x00001480	bnx2.h
5538	BNX2_EMAC_MAC_MATCH29	0x00001484	bnx2.h
5539	BNX2_EMAC_MAC_MATCH30	0x00001488	bnx2.h
5540	BNX2_EMAC_MAC_MATCH31	0x0000148c	bnx2.h
5541	BNX2_EMAC_BACKOFF_SEED	0x00001498	bnx2.h
5542	BNX2_EMAC_BACKOFF_SEED_EMAC_BAC	(0x3ffL<<0)	bnx2.h
5543	BNX2_EMAC_RX_MTU_SIZE	0x0000149c	bnx2.h
5544	BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE	(0xffffL<<0)	bnx2.h
5545	BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA	(1L<<31)	bnx2.h
5546	BNX2_EMAC_SERDES_CNTL	0x000014a4	bnx2.h
5547	BNX2_EMAC_SERDES_CNTL_RXR	(0x7L<<0)	bnx2.h
5548	BNX2_EMAC_SERDES_CNTL_RXG	(0x3L<<3)	bnx2.h
5549	BNX2_EMAC_SERDES_CNTL_RXCKSEL	(1L<<6)	bnx2.h
5550	BNX2_EMAC_SERDES_CNTL_TXBIAS	(0x7L<<7)	bnx2.h
5551	BNX2_EMAC_SERDES_CNTL_BGMAX	(1L<<10)	bnx2.h
5552	BNX2_EMAC_SERDES_CNTL_BGMIN	(1L<<11)	bnx2.h
5553	BNX2_EMAC_SERDES_CNTL_TXMODE	(1L<<12)	bnx2.h
5554	BNX2_EMAC_SERDES_CNTL_TXEDGE	(1L<<13)	bnx2.h
5555	BNX2_EMAC_SERDES_CNTL_SERDES_MO	(1L<<14)	bnx2.h
5556	BNX2_EMAC_SERDES_CNTL_PLLTEST	(1L<<15)	bnx2.h
5557	BNX2_EMAC_SERDES_CNTL_CDET_EN	(1L<<16)	bnx2.h
5558	BNX2_EMAC_SERDES_CNTL_TBI_LBK	(1L<<17)	bnx2.h
5559	BNX2_EMAC_SERDES_CNTL_REMOTE_LB	(1L<<18)	bnx2.h
5560	BNX2_EMAC_SERDES_CNTL_REV_PHASE	(1L<<19)	bnx2.h
5561	BNX2_EMAC_SERDES_CNTL_REGCTL12	(0x3L<<20)	bnx2.h
5562	BNX2_EMAC_SERDES_CNTL_REGCTL25	(0x3L<<22)	bnx2.h
5563	BNX2_EMAC_SERDES_STATUS	0x000014a8	bnx2.h
5564	BNX2_EMAC_SERDES_STATUS_RX_STAT	(0xffL<<0)	bnx2.h
5565	BNX2_EMAC_SERDES_STATUS_COMMA_D	(1L<<8)	bnx2.h
5566	BNX2_EMAC_MDIO_COMM	0x000014ac	bnx2.h
5567	BNX2_EMAC_MDIO_COMM_DATA	(0xffffL<<0)	bnx2.h
5568	BNX2_EMAC_MDIO_COMM_REG_ADDR	(0x1fL<<16)	bnx2.h
5569	BNX2_EMAC_MDIO_COMM_PHY_ADDR	(0x1fL<<21)	bnx2.h
5570	BNX2_EMAC_MDIO_COMM_COMMAND	(0x3L<<26)	bnx2.h
5571	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(0L<<26)	bnx2.h
5572	BNX2_EMAC_MDIO_COMM_COMMAND_WRI	(1L<<26)	bnx2.h
5573	BNX2_EMAC_MDIO_COMM_COMMAND_REA	(2L<<26)	bnx2.h
5574	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(3L<<26)	bnx2.h
5575	BNX2_EMAC_MDIO_COMM_FAIL	(1L<<28)	bnx2.h
5576	BNX2_EMAC_MDIO_COMM_START_BUSY	(1L<<29)	bnx2.h
5577	BNX2_EMAC_MDIO_COMM_DISEXT	(1L<<30)	bnx2.h
5578	BNX2_EMAC_MDIO_STATUS	0x000014b0	bnx2.h
5579	BNX2_EMAC_MDIO_STATUS_LINK	(1L<<0)	bnx2.h
5580	BNX2_EMAC_MDIO_STATUS_10MB	(1L<<1)	bnx2.h
5581	BNX2_EMAC_MDIO_MODE	0x000014b4	bnx2.h
5582	BNX2_EMAC_MDIO_MODE_SHORT_PREAM	(1L<<1)	bnx2.h
5583	BNX2_EMAC_MDIO_MODE_AUTO_POLL	(1L<<4)	bnx2.h
5584	BNX2_EMAC_MDIO_MODE_BIT_BANG	(1L<<8)	bnx2.h
5585	BNX2_EMAC_MDIO_MODE_MDIO	(1L<<9)	bnx2.h
5586	BNX2_EMAC_MDIO_MODE_MDIO_OE	(1L<<10)	bnx2.h
5587	BNX2_EMAC_MDIO_MODE_MDC	(1L<<11)	bnx2.h
5588	BNX2_EMAC_MDIO_MODE_MDINT	(1L<<12)	bnx2.h
5589	BNX2_EMAC_MDIO_MODE_CLOCK_CNT	(0x1fL<<16)	bnx2.h
5590	BNX2_EMAC_MDIO_AUTO_STATUS	0x000014b8	bnx2.h
5591	BNX2_EMAC_MDIO_AUTO_STATUS_AUTO	(1L<<0)	bnx2.h
5592	BNX2_EMAC_TX_MODE	0x000014bc	bnx2.h
5593	BNX2_EMAC_TX_MODE_RESET	(1L<<0)	bnx2.h
5594	BNX2_EMAC_TX_MODE_EXT_PAUSE_EN	(1L<<3)	bnx2.h
5595	BNX2_EMAC_TX_MODE_FLOW_EN	(1L<<4)	bnx2.h
5596	BNX2_EMAC_TX_MODE_BIG_BACKOFF	(1L<<5)	bnx2.h
5597	BNX2_EMAC_TX_MODE_LONG_PAUSE	(1L<<6)	bnx2.h
5598	BNX2_EMAC_TX_MODE_LINK_AWARE	(1L<<7)	bnx2.h
5599	BNX2_EMAC_TX_STATUS	0x000014c0	bnx2.h
5600	BNX2_EMAC_TX_STATUS_XOFFED	(1L<<0)	bnx2.h
5601	BNX2_EMAC_TX_STATUS_XOFF_SENT	(1L<<1)	bnx2.h
5602	BNX2_EMAC_TX_STATUS_XON_SENT	(1L<<2)	bnx2.h
5603	BNX2_EMAC_TX_STATUS_LINK_UP	(1L<<3)	bnx2.h
5604	BNX2_EMAC_TX_STATUS_UNDERRUN	(1L<<4)	bnx2.h
5605	BNX2_EMAC_TX_LENGTHS	0x000014c4	bnx2.h
5606	BNX2_EMAC_TX_LENGTHS_SLOT	(0xffL<<0)	bnx2.h
5607	BNX2_EMAC_TX_LENGTHS_IPG	(0xfL<<8)	bnx2.h
5608	BNX2_EMAC_TX_LENGTHS_IPG_CRS	(0x3L<<12)	bnx2.h
5609	BNX2_EMAC_RX_MODE	0x000014c8	bnx2.h
5610	BNX2_EMAC_RX_MODE_RESET	(1L<<0)	bnx2.h
5611	BNX2_EMAC_RX_MODE_FLOW_EN	(1L<<2)	bnx2.h
5612	BNX2_EMAC_RX_MODE_KEEP_MAC_CONT	(1L<<3)	bnx2.h
5613	BNX2_EMAC_RX_MODE_KEEP_PAUSE	(1L<<4)	bnx2.h
5614	BNX2_EMAC_RX_MODE_ACCEPT_OVERSI	(1L<<5)	bnx2.h
5615	BNX2_EMAC_RX_MODE_ACCEPT_RUNTS	(1L<<6)	bnx2.h
5616	BNX2_EMAC_RX_MODE_LLC_CHK	(1L<<7)	bnx2.h
5617	BNX2_EMAC_RX_MODE_PROMISCUOUS	(1L<<8)	bnx2.h
5618	BNX2_EMAC_RX_MODE_NO_CRC_CHK	(1L<<9)	bnx2.h
5619	BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG	(1L<<10)	bnx2.h
5620	BNX2_EMAC_RX_MODE_FILT_BROADCAS	(1L<<11)	bnx2.h
5621	BNX2_EMAC_RX_MODE_SORT_MODE	(1L<<12)	bnx2.h
5622	BNX2_EMAC_RX_STATUS	0x000014cc	bnx2.h
5623	BNX2_EMAC_RX_STATUS_FFED	(1L<<0)	bnx2.h
5624	BNX2_EMAC_RX_STATUS_FF_RECEIVED	(1L<<1)	bnx2.h
5625	BNX2_EMAC_RX_STATUS_N_RECEIVED	(1L<<2)	bnx2.h
5626	BNX2_EMAC_MULTICAST_HASH0	0x000014d0	bnx2.h
5627	BNX2_EMAC_MULTICAST_HASH1	0x000014d4	bnx2.h
5628	BNX2_EMAC_MULTICAST_HASH2	0x000014d8	bnx2.h
5629	BNX2_EMAC_MULTICAST_HASH3	0x000014dc	bnx2.h
5630	BNX2_EMAC_MULTICAST_HASH4	0x000014e0	bnx2.h
5631	BNX2_EMAC_MULTICAST_HASH5	0x000014e4	bnx2.h
5632	BNX2_EMAC_MULTICAST_HASH6	0x000014e8	bnx2.h
5633	BNX2_EMAC_MULTICAST_HASH7	0x000014ec	bnx2.h
5634	BNX2_EMAC_RX_STAT_IFHCINOCTETS	0x00001500	bnx2.h
5635	BNX2_EMAC_RX_STAT_IFHCINBADOCTE	0x00001504	bnx2.h
5636	BNX2_EMAC_RX_STAT_ETHERSTATSFRA	0x00001508	bnx2.h
5637	BNX2_EMAC_RX_STAT_IFHCINUCASTPK	0x0000150c	bnx2.h
5638	BNX2_EMAC_RX_STAT_IFHCINMULTICA	0x00001510	bnx2.h
5639	BNX2_EMAC_RX_STAT_IFHCINBROADCA	0x00001514	bnx2.h
5640	BNX2_EMAC_RX_STAT_DOT3STATSFCSE	0x00001518	bnx2.h
5641	BNX2_EMAC_RX_STAT_DOT3STATSALIG	0x0000151c	bnx2.h
5642	BNX2_EMAC_RX_STAT_DOT3STATSCARR	0x00001520	bnx2.h
5643	BNX2_EMAC_RX_STAT_XONPAUSEFRAME	0x00001524	bnx2.h
5644	BNX2_EMAC_RX_STAT_XOFFPAUSEFRAM	0x00001528	bnx2.h
5645	BNX2_EMAC_RX_STAT_MACCONTROLFRA	0x0000152c	bnx2.h
5646	BNX2_EMAC_RX_STAT_XOFFSTATEENTE	0x00001530	bnx2.h
5647	BNX2_EMAC_RX_STAT_DOT3STATSFRAM	0x00001534	bnx2.h
5648	BNX2_EMAC_RX_STAT_ETHERSTATSJAB	0x00001538	bnx2.h
5649	BNX2_EMAC_RX_STAT_ETHERSTATSUND	0x0000153c	bnx2.h
5650	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001540	bnx2.h
5651	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001544	bnx2.h
5652	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001548	bnx2.h
5653	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x0000154c	bnx2.h
5654	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001550	bnx2.h
5655	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001554	bnx2.h
5656	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001558	bnx2.h
5657	BNX2_EMAC_RXMAC_DEBUG0	0x0000155c	bnx2.h
5658	BNX2_EMAC_RXMAC_DEBUG1	0x00001560	bnx2.h
5659	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_N	(1L<<0)	bnx2.h
5660	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_O	(1L<<1)	bnx2.h
5661	BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC	(1L<<2)	bnx2.h
5662	BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR	(1L<<3)	bnx2.h
5663	BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ER	(1L<<4)	bnx2.h
5664	BNX2_EMAC_RXMAC_DEBUG1_LAST_DAT	(1L<<5)	bnx2.h
5665	BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE	(1L<<6)	bnx2.h
5666	BNX2_EMAC_RXMAC_DEBUG1_BYTE_COU	(0xffffL<<7)	bnx2.h
5667	BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIM	(0xffL<<23)	bnx2.h
5668	BNX2_EMAC_RXMAC_DEBUG2	0x00001564	bnx2.h
5669	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
5670	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x0L<<0)	bnx2.h
5671	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x1L<<0)	bnx2.h
5672	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x2L<<0)	bnx2.h
5673	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x3L<<0)	bnx2.h
5674	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x4L<<0)	bnx2.h
5675	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x5L<<0)	bnx2.h
5676	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x6L<<0)	bnx2.h
5677	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
5678	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0xfL<<3)	bnx2.h
5679	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x0L<<3)	bnx2.h
5680	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x1L<<3)	bnx2.h
5681	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x2L<<3)	bnx2.h
5682	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x3L<<3)	bnx2.h
5683	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x4L<<3)	bnx2.h
5684	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x5L<<3)	bnx2.h
5685	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x6L<<3)	bnx2.h
5686	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x7L<<3)	bnx2.h
5687	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x8L<<3)	bnx2.h
5688	BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN	(0xffL<<7)	bnx2.h
5689	BNX2_EMAC_RXMAC_DEBUG2_FALSEC	(1L<<15)	bnx2.h
5690	BNX2_EMAC_RXMAC_DEBUG2_TAGGED	(1L<<16)	bnx2.h
5691	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
5692	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(0L<<18)	bnx2.h
5693	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
5694	BNX2_EMAC_RXMAC_DEBUG2_SE_COUNT	(0xfL<<19)	bnx2.h
5695	BNX2_EMAC_RXMAC_DEBUG2_QUANTA	(0x1fL<<23)	bnx2.h
5696	BNX2_EMAC_RXMAC_DEBUG3	0x00001568	bnx2.h
5697	BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CT	(0xffffL<<0)	bnx2.h
5698	BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUS	(0xffffL<<16)	bnx2.h
5699	BNX2_EMAC_RXMAC_DEBUG4	0x0000156c	bnx2.h
5700	BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIE	(0xffffL<<0)	bnx2.h
5701	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3fL<<16)	bnx2.h
5702	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x0L<<16)	bnx2.h
5703	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1L<<16)	bnx2.h
5704	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2L<<16)	bnx2.h
5705	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3L<<16)	bnx2.h
5706	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
5707	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x5L<<16)	bnx2.h
5708	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x6L<<16)	bnx2.h
5709	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
5710	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x8L<<16)	bnx2.h
5711	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x9L<<16)	bnx2.h
5712	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xaL<<16)	bnx2.h
5713	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xeL<<16)	bnx2.h
5714	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xfL<<16)	bnx2.h
5715	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x10L<<16)	bnx2.h
5716	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x11L<<16)	bnx2.h
5717	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x12L<<16)	bnx2.h
5718	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x13L<<16)	bnx2.h
5719	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x14L<<16)	bnx2.h
5720	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x15L<<16)	bnx2.h
5721	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x16L<<16)	bnx2.h
5722	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x17L<<16)	bnx2.h
5723	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x18L<<16)	bnx2.h
5724	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x19L<<16)	bnx2.h
5725	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1aL<<16)	bnx2.h
5726	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1bL<<16)	bnx2.h
5727	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1cL<<16)	bnx2.h
5728	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1dL<<16)	bnx2.h
5729	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1eL<<16)	bnx2.h
5730	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1fL<<16)	bnx2.h
5731	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x20L<<16)	bnx2.h
5732	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x21L<<16)	bnx2.h
5733	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x22L<<16)	bnx2.h
5734	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x23L<<16)	bnx2.h
5735	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x24L<<16)	bnx2.h
5736	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x25L<<16)	bnx2.h
5737	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x26L<<16)	bnx2.h
5738	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x27L<<16)	bnx2.h
5739	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x28L<<16)	bnx2.h
5740	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x29L<<16)	bnx2.h
5741	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2aL<<16)	bnx2.h
5742	BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT	(1L<<22)	bnx2.h
5743	BNX2_EMAC_RXMAC_DEBUG4_SLOT_FIL	(1L<<23)	bnx2.h
5744	BNX2_EMAC_RXMAC_DEBUG4_FALSE_CA	(1L<<24)	bnx2.h
5745	BNX2_EMAC_RXMAC_DEBUG4_LAST_DAT	(1L<<25)	bnx2.h
5746	BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUN	(1L<<26)	bnx2.h
5747	BNX2_EMAC_RXMAC_DEBUG4_ADVANCE	(1L<<27)	bnx2.h
5748	BNX2_EMAC_RXMAC_DEBUG4_START	(1L<<28)	bnx2.h
5749	BNX2_EMAC_RXMAC_DEBUG5	0x00001570	bnx2.h
5750	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0x7L<<0)	bnx2.h
5751	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0L<<0)	bnx2.h
5752	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(1L<<0)	bnx2.h
5753	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(2L<<0)	bnx2.h
5754	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(3L<<0)	bnx2.h
5755	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(4L<<0)	bnx2.h
5756	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(5L<<0)	bnx2.h
5757	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(6L<<0)	bnx2.h
5758	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
5759	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x0L<<4)	bnx2.h
5760	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x1L<<4)	bnx2.h
5761	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x2L<<4)	bnx2.h
5762	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x3L<<4)	bnx2.h
5763	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x4L<<4)	bnx2.h
5764	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x6L<<4)	bnx2.h
5765	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
5766	BNX2_EMAC_RXMAC_DEBUG5_EOF_DETE	(1L<<7)	bnx2.h
5767	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<8)	bnx2.h
5768	BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_	(1L<<11)	bnx2.h
5769	BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCO	(1L<<12)	bnx2.h
5770	BNX2_EMAC_RXMAC_DEBUG5_LOAD_DAT	(1L<<13)	bnx2.h
5771	BNX2_EMAC_RXMAC_DEBUG5_LOAD_STA	(1L<<14)	bnx2.h
5772	BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT	(1L<<15)	bnx2.h
5773	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(0x3L<<16)	bnx2.h
5774	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(1L<<19)	bnx2.h
5775	BNX2_EMAC_RXMAC_DEBUG5_FMLEN	(0xfffL<<20)	bnx2.h
5776	BNX2_EMAC_RX_STAT_AC0	0x00001580	bnx2.h
5777	BNX2_EMAC_RX_STAT_AC1	0x00001584	bnx2.h
5778	BNX2_EMAC_RX_STAT_AC2	0x00001588	bnx2.h
5779	BNX2_EMAC_RX_STAT_AC3	0x0000158c	bnx2.h
5780	BNX2_EMAC_RX_STAT_AC4	0x00001590	bnx2.h
5781	BNX2_EMAC_RX_STAT_AC5	0x00001594	bnx2.h
5782	BNX2_EMAC_RX_STAT_AC6	0x00001598	bnx2.h
5783	BNX2_EMAC_RX_STAT_AC7	0x0000159c	bnx2.h
5784	BNX2_EMAC_RX_STAT_AC8	0x000015a0	bnx2.h
5785	BNX2_EMAC_RX_STAT_AC9	0x000015a4	bnx2.h
5786	BNX2_EMAC_RX_STAT_AC10	0x000015a8	bnx2.h
5787	BNX2_EMAC_RX_STAT_AC11	0x000015ac	bnx2.h
5788	BNX2_EMAC_RX_STAT_AC12	0x000015b0	bnx2.h
5789	BNX2_EMAC_RX_STAT_AC13	0x000015b4	bnx2.h
5790	BNX2_EMAC_RX_STAT_AC14	0x000015b8	bnx2.h
5791	BNX2_EMAC_RX_STAT_AC15	0x000015bc	bnx2.h
5792	BNX2_EMAC_RX_STAT_AC16	0x000015c0	bnx2.h
5793	BNX2_EMAC_RX_STAT_AC17	0x000015c4	bnx2.h
5794	BNX2_EMAC_RX_STAT_AC18	0x000015c8	bnx2.h
5795	BNX2_EMAC_RX_STAT_AC19	0x000015cc	bnx2.h
5796	BNX2_EMAC_RX_STAT_AC20	0x000015d0	bnx2.h
5797	BNX2_EMAC_RX_STAT_AC21	0x000015d4	bnx2.h
5798	BNX2_EMAC_RX_STAT_AC22	0x000015d8	bnx2.h
5799	BNX2_EMAC_RXMAC_SUC_DBG_OVERRUN	0x000015dc	bnx2.h
5800	BNX2_EMAC_TX_STAT_IFHCOUTOCTETS	0x00001600	bnx2.h
5801	BNX2_EMAC_TX_STAT_IFHCOUTBADOCT	0x00001604	bnx2.h
5802	BNX2_EMAC_TX_STAT_ETHERSTATSCOL	0x00001608	bnx2.h
5803	BNX2_EMAC_TX_STAT_OUTXONSENT	0x0000160c	bnx2.h
5804	BNX2_EMAC_TX_STAT_OUTXOFFSENT	0x00001610	bnx2.h
5805	BNX2_EMAC_TX_STAT_FLOWCONTROLDO	0x00001614	bnx2.h
5806	BNX2_EMAC_TX_STAT_DOT3STATSSING	0x00001618	bnx2.h
5807	BNX2_EMAC_TX_STAT_DOT3STATSMULT	0x0000161c	bnx2.h
5808	BNX2_EMAC_TX_STAT_DOT3STATSDEFE	0x00001620	bnx2.h
5809	BNX2_EMAC_TX_STAT_DOT3STATSEXCE	0x00001624	bnx2.h
5810	BNX2_EMAC_TX_STAT_DOT3STATSLATE	0x00001628	bnx2.h
5811	BNX2_EMAC_TX_STAT_IFHCOUTUCASTP	0x0000162c	bnx2.h
5812	BNX2_EMAC_TX_STAT_IFHCOUTMULTIC	0x00001630	bnx2.h
5813	BNX2_EMAC_TX_STAT_IFHCOUTBROADC	0x00001634	bnx2.h
5814	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001638	bnx2.h
5815	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000163c	bnx2.h
5816	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001640	bnx2.h
5817	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001644	bnx2.h
5818	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001648	bnx2.h
5819	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000164c	bnx2.h
5820	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001650	bnx2.h
5821	BNX2_EMAC_TX_STAT_DOT3STATSINTE	0x00001654	bnx2.h
5822	BNX2_EMAC_TXMAC_DEBUG0	0x00001658	bnx2.h
5823	BNX2_EMAC_TXMAC_DEBUG1	0x0000165c	bnx2.h
5824	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0xfL<<0)	bnx2.h
5825	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x0L<<0)	bnx2.h
5826	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x1L<<0)	bnx2.h
5827	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x4L<<0)	bnx2.h
5828	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x5L<<0)	bnx2.h
5829	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x6L<<0)	bnx2.h
5830	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x7L<<0)	bnx2.h
5831	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x8L<<0)	bnx2.h
5832	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x9L<<0)	bnx2.h
5833	BNX2_EMAC_TXMAC_DEBUG1_CRS_ENAB	(1L<<4)	bnx2.h
5834	BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC	(1L<<5)	bnx2.h
5835	BNX2_EMAC_TXMAC_DEBUG1_SE_COUNT	(0xfL<<6)	bnx2.h
5836	BNX2_EMAC_TXMAC_DEBUG1_SEND_PAU	(1L<<10)	bnx2.h
5837	BNX2_EMAC_TXMAC_DEBUG1_LATE_COL	(1L<<11)	bnx2.h
5838	BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFE	(1L<<12)	bnx2.h
5839	BNX2_EMAC_TXMAC_DEBUG1_DEFERRED	(1L<<13)	bnx2.h
5840	BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE	(1L<<14)	bnx2.h
5841	BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME	(0xfL<<15)	bnx2.h
5842	BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIM	(0xffL<<19)	bnx2.h
5843	BNX2_EMAC_TXMAC_DEBUG2	0x00001660	bnx2.h
5844	BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF	(0x3ffL<<0)	bnx2.h
5845	BNX2_EMAC_TXMAC_DEBUG2_BYTE_COU	(0xffffL<<10)	bnx2.h
5846	BNX2_EMAC_TXMAC_DEBUG2_COL_COUN	(0x1fL<<26)	bnx2.h
5847	BNX2_EMAC_TXMAC_DEBUG2_COL_BIT	(1L<<31)	bnx2.h
5848	BNX2_EMAC_TXMAC_DEBUG3	0x00001664	bnx2.h
5849	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xfL<<0)	bnx2.h
5850	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x0L<<0)	bnx2.h
5851	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x1L<<0)	bnx2.h
5852	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x2L<<0)	bnx2.h
5853	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x3L<<0)	bnx2.h
5854	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x4L<<0)	bnx2.h
5855	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x5L<<0)	bnx2.h
5856	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x6L<<0)	bnx2.h
5857	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x7L<<0)	bnx2.h
5858	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x8L<<0)	bnx2.h
5859	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x9L<<0)	bnx2.h
5860	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xaL<<0)	bnx2.h
5861	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xbL<<0)	bnx2.h
5862	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xcL<<0)	bnx2.h
5863	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xdL<<0)	bnx2.h
5864	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xeL<<0)	bnx2.h
5865	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x7L<<4)	bnx2.h
5866	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x0L<<4)	bnx2.h
5867	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x1L<<4)	bnx2.h
5868	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x2L<<4)	bnx2.h
5869	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x3L<<4)	bnx2.h
5870	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x4L<<4)	bnx2.h
5871	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x5L<<4)	bnx2.h
5872	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x6L<<4)	bnx2.h
5873	BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE	(1L<<7)	bnx2.h
5874	BNX2_EMAC_TXMAC_DEBUG3_XOFF	(1L<<8)	bnx2.h
5875	BNX2_EMAC_TXMAC_DEBUG3_SE_COUNT	(0xfL<<9)	bnx2.h
5876	BNX2_EMAC_TXMAC_DEBUG3_QUANTA_C	(0x1fL<<13)	bnx2.h
5877	BNX2_EMAC_TXMAC_DEBUG4	0x00001668	bnx2.h
5878	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_CO	(0xffffL<<0)	bnx2.h
5879	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xfL<<16)	bnx2.h
5880	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x0L<<16)	bnx2.h
5881	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x2L<<16)	bnx2.h
5882	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x3L<<16)	bnx2.h
5883	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x6L<<16)	bnx2.h
5884	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x7L<<16)	bnx2.h
5885	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x5L<<16)	bnx2.h
5886	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x4L<<16)	bnx2.h
5887	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xcL<<16)	bnx2.h
5888	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xeL<<16)	bnx2.h
5889	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xaL<<16)	bnx2.h
5890	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x8L<<16)	bnx2.h
5891	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x9L<<16)	bnx2.h
5892	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xdL<<16)	bnx2.h
5893	BNX2_EMAC_TXMAC_DEBUG4_STATS0_V	(1L<<20)	bnx2.h
5894	BNX2_EMAC_TXMAC_DEBUG4_APPEND_C	(1L<<21)	bnx2.h
5895	BNX2_EMAC_TXMAC_DEBUG4_SLOT_FIL	(1L<<22)	bnx2.h
5896	BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFE	(1L<<23)	bnx2.h
5897	BNX2_EMAC_TXMAC_DEBUG4_SEND_EXT	(1L<<24)	bnx2.h
5898	BNX2_EMAC_TXMAC_DEBUG4_SEND_PAD	(1L<<25)	bnx2.h
5899	BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC	(1L<<26)	bnx2.h
5900	BNX2_EMAC_TXMAC_DEBUG4_COLLIDIN	(1L<<27)	bnx2.h
5901	BNX2_EMAC_TXMAC_DEBUG4_COL_IN	(1L<<28)	bnx2.h
5902	BNX2_EMAC_TXMAC_DEBUG4_BURSTING	(1L<<29)	bnx2.h
5903	BNX2_EMAC_TXMAC_DEBUG4_ADVANCE	(1L<<30)	bnx2.h
5904	BNX2_EMAC_TXMAC_DEBUG4_GO	(1L<<31)	bnx2.h
5905	BNX2_EMAC_TX_STAT_AC0	0x00001680	bnx2.h
5906	BNX2_EMAC_TX_STAT_AC1	0x00001684	bnx2.h
5907	BNX2_EMAC_TX_STAT_AC2	0x00001688	bnx2.h
5908	BNX2_EMAC_TX_STAT_AC3	0x0000168c	bnx2.h
5909	BNX2_EMAC_TX_STAT_AC4	0x00001690	bnx2.h
5910	BNX2_EMAC_TX_STAT_AC5	0x00001694	bnx2.h
5911	BNX2_EMAC_TX_STAT_AC6	0x00001698	bnx2.h
5912	BNX2_EMAC_TX_STAT_AC7	0x0000169c	bnx2.h
5913	BNX2_EMAC_TX_STAT_AC8	0x000016a0	bnx2.h
5914	BNX2_EMAC_TX_STAT_AC9	0x000016a4	bnx2.h
5915	BNX2_EMAC_TX_STAT_AC10	0x000016a8	bnx2.h
5916	BNX2_EMAC_TX_STAT_AC11	0x000016ac	bnx2.h
5917	BNX2_EMAC_TX_STAT_AC12	0x000016b0	bnx2.h
5918	BNX2_EMAC_TX_STAT_AC13	0x000016b4	bnx2.h
5919	BNX2_EMAC_TX_STAT_AC14	0x000016b8	bnx2.h
5920	BNX2_EMAC_TX_STAT_AC15	0x000016bc	bnx2.h
5921	BNX2_EMAC_TX_STAT_AC16	0x000016c0	bnx2.h
5922	BNX2_EMAC_TX_STAT_AC17	0x000016c4	bnx2.h
5923	BNX2_EMAC_TX_STAT_AC18	0x000016c8	bnx2.h
5924	BNX2_EMAC_TX_STAT_AC19	0x000016cc	bnx2.h
5925	BNX2_EMAC_TX_STAT_AC20	0x000016d0	bnx2.h
5926	BNX2_EMAC_TX_STAT_AC21	0x000016d4	bnx2.h
5927	BNX2_EMAC_TXMAC_SUC_DBG_OVERRUN	0x000016d8	bnx2.h
5928	BNX2_RPM_COMMAND	0x00001800	bnx2.h
5929	BNX2_RPM_COMMAND_ENABLED	(1L<<0)	bnx2.h
5930	BNX2_RPM_COMMAND_OVERRUN_ABORT	(1L<<4)	bnx2.h
5931	BNX2_RPM_STATUS	0x00001804	bnx2.h
5932	BNX2_RPM_STATUS_MBUF_WAIT	(1L<<0)	bnx2.h
5933	BNX2_RPM_STATUS_FREE_WAIT	(1L<<1)	bnx2.h
5934	BNX2_RPM_CONFIG	0x00001808	bnx2.h
5935	BNX2_RPM_CONFIG_NO_PSD_HDR_CKSU	(1L<<0)	bnx2.h
5936	BNX2_RPM_CONFIG_ACPI_ENA	(1L<<1)	bnx2.h
5937	BNX2_RPM_CONFIG_ACPI_KEEP	(1L<<2)	bnx2.h
5938	BNX2_RPM_CONFIG_MP_KEEP	(1L<<3)	bnx2.h
5939	BNX2_RPM_CONFIG_SORT_VECT_VAL	(0xfL<<4)	bnx2.h
5940	BNX2_RPM_CONFIG_IGNORE_VLAN	(1L<<31)	bnx2.h
5941	BNX2_RPM_VLAN_MATCH0	0x00001810	bnx2.h
5942	BNX2_RPM_VLAN_MATCH0_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
5943	BNX2_RPM_VLAN_MATCH1	0x00001814	bnx2.h
5944	BNX2_RPM_VLAN_MATCH1_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
5945	BNX2_RPM_VLAN_MATCH2	0x00001818	bnx2.h
5946	BNX2_RPM_VLAN_MATCH2_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
5947	BNX2_RPM_VLAN_MATCH3	0x0000181c	bnx2.h
5948	BNX2_RPM_VLAN_MATCH3_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
5949	BNX2_RPM_SORT_USER0	0x00001820	bnx2.h
5950	BNX2_RPM_SORT_USER0_PM_EN	(0xffffL<<0)	bnx2.h
5951	BNX2_RPM_SORT_USER0_BC_EN	(1L<<16)	bnx2.h
5952	BNX2_RPM_SORT_USER0_MC_EN	(1L<<17)	bnx2.h
5953	BNX2_RPM_SORT_USER0_MC_HSH_EN	(1L<<18)	bnx2.h
5954	BNX2_RPM_SORT_USER0_PROM_EN	(1L<<19)	bnx2.h
5955	BNX2_RPM_SORT_USER0_VLAN_EN	(0xfL<<20)	bnx2.h
5956	BNX2_RPM_SORT_USER0_PROM_VLAN	(1L<<24)	bnx2.h
5957	BNX2_RPM_SORT_USER0_ENA	(1L<<31)	bnx2.h
5958	BNX2_RPM_SORT_USER1	0x00001824	bnx2.h
5959	BNX2_RPM_SORT_USER1_PM_EN	(0xffffL<<0)	bnx2.h
5960	BNX2_RPM_SORT_USER1_BC_EN	(1L<<16)	bnx2.h
5961	BNX2_RPM_SORT_USER1_MC_EN	(1L<<17)	bnx2.h
5962	BNX2_RPM_SORT_USER1_MC_HSH_EN	(1L<<18)	bnx2.h
5963	BNX2_RPM_SORT_USER1_PROM_EN	(1L<<19)	bnx2.h
5964	BNX2_RPM_SORT_USER1_VLAN_EN	(0xfL<<20)	bnx2.h
5965	BNX2_RPM_SORT_USER1_PROM_VLAN	(1L<<24)	bnx2.h
5966	BNX2_RPM_SORT_USER1_ENA	(1L<<31)	bnx2.h
5967	BNX2_RPM_SORT_USER2	0x00001828	bnx2.h
5968	BNX2_RPM_SORT_USER2_PM_EN	(0xffffL<<0)	bnx2.h
5969	BNX2_RPM_SORT_USER2_BC_EN	(1L<<16)	bnx2.h
5970	BNX2_RPM_SORT_USER2_MC_EN	(1L<<17)	bnx2.h
5971	BNX2_RPM_SORT_USER2_MC_HSH_EN	(1L<<18)	bnx2.h
5972	BNX2_RPM_SORT_USER2_PROM_EN	(1L<<19)	bnx2.h
5973	BNX2_RPM_SORT_USER2_VLAN_EN	(0xfL<<20)	bnx2.h
5974	BNX2_RPM_SORT_USER2_PROM_VLAN	(1L<<24)	bnx2.h
5975	BNX2_RPM_SORT_USER2_ENA	(1L<<31)	bnx2.h
5976	BNX2_RPM_SORT_USER3	0x0000182c	bnx2.h
5977	BNX2_RPM_SORT_USER3_PM_EN	(0xffffL<<0)	bnx2.h
5978	BNX2_RPM_SORT_USER3_BC_EN	(1L<<16)	bnx2.h
5979	BNX2_RPM_SORT_USER3_MC_EN	(1L<<17)	bnx2.h
5980	BNX2_RPM_SORT_USER3_MC_HSH_EN	(1L<<18)	bnx2.h
5981	BNX2_RPM_SORT_USER3_PROM_EN	(1L<<19)	bnx2.h
5982	BNX2_RPM_SORT_USER3_VLAN_EN	(0xfL<<20)	bnx2.h
5983	BNX2_RPM_SORT_USER3_PROM_VLAN	(1L<<24)	bnx2.h
5984	BNX2_RPM_SORT_USER3_ENA	(1L<<31)	bnx2.h
5985	BNX2_RPM_STAT_L2_FILTER_DISCARD	0x00001840	bnx2.h
5986	BNX2_RPM_STAT_RULE_CHECKER_DISC	0x00001844	bnx2.h
5987	BNX2_RPM_STAT_IFINFTQDISCARDS	0x00001848	bnx2.h
5988	BNX2_RPM_STAT_IFINMBUFDISCARD	0x0000184c	bnx2.h
5989	BNX2_RPM_STAT_RULE_CHECKER_P4_H	0x00001850	bnx2.h
5990	BNX2_RPM_STAT_AC0	0x00001880	bnx2.h
5991	BNX2_RPM_STAT_AC1	0x00001884	bnx2.h
5992	BNX2_RPM_STAT_AC2	0x00001888	bnx2.h
5993	BNX2_RPM_STAT_AC3	0x0000188c	bnx2.h
5994	BNX2_RPM_STAT_AC4	0x00001890	bnx2.h
5995	BNX2_RPM_RC_CNTL_0	0x00001900	bnx2.h
5996	BNX2_RPM_RC_CNTL_0_OFFSET	(0xffL<<0)	bnx2.h
5997	BNX2_RPM_RC_CNTL_0_CLASS	(0x7L<<8)	bnx2.h
5998	BNX2_RPM_RC_CNTL_0_PRIORITY	(1L<<11)	bnx2.h
5999	BNX2_RPM_RC_CNTL_0_P4	(1L<<12)	bnx2.h
6000	BNX2_RPM_RC_CNTL_0_HDR_TYPE	(0x7L<<13)	bnx2.h
6001	BNX2_RPM_RC_CNTL_0_HDR_TYPE_STA	(0L<<13)	bnx2.h
6002	BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP	(1L<<13)	bnx2.h
6003	BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP	(2L<<13)	bnx2.h
6004	BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP	(3L<<13)	bnx2.h
6005	BNX2_RPM_RC_CNTL_0_HDR_TYPE_DAT	(4L<<13)	bnx2.h
6006	BNX2_RPM_RC_CNTL_0_COMP	(0x3L<<16)	bnx2.h
6007	BNX2_RPM_RC_CNTL_0_COMP_EQUAL	(0L<<16)	bnx2.h
6008	BNX2_RPM_RC_CNTL_0_COMP_NEQUAL	(1L<<16)	bnx2.h
6009	BNX2_RPM_RC_CNTL_0_COMP_GREATER	(2L<<16)	bnx2.h
6010	BNX2_RPM_RC_CNTL_0_COMP_LESS	(3L<<16)	bnx2.h
6011	BNX2_RPM_RC_CNTL_0_SBIT	(1L<<19)	bnx2.h
6012	BNX2_RPM_RC_CNTL_0_CMDSEL	(0xfL<<20)	bnx2.h
6013	BNX2_RPM_RC_CNTL_0_MAP	(1L<<24)	bnx2.h
6014	BNX2_RPM_RC_CNTL_0_DISCARD	(1L<<25)	bnx2.h
6015	BNX2_RPM_RC_CNTL_0_MASK	(1L<<26)	bnx2.h
6016	BNX2_RPM_RC_CNTL_0_P1	(1L<<27)	bnx2.h
6017	BNX2_RPM_RC_CNTL_0_P2	(1L<<28)	bnx2.h
6018	BNX2_RPM_RC_CNTL_0_P3	(1L<<29)	bnx2.h
6019	BNX2_RPM_RC_CNTL_0_NBIT	(1L<<30)	bnx2.h
6020	BNX2_RPM_RC_VALUE_MASK_0	0x00001904	bnx2.h
6021	BNX2_RPM_RC_VALUE_MASK_0_VALUE	(0xffffL<<0)	bnx2.h
6022	BNX2_RPM_RC_VALUE_MASK_0_MASK	(0xffffL<<16)	bnx2.h
6023	BNX2_RPM_RC_CNTL_1	0x00001908	bnx2.h
6024	BNX2_RPM_RC_CNTL_1_A	(0x3ffffL<<0)	bnx2.h
6025	BNX2_RPM_RC_CNTL_1_B	(0xfffL<<19)	bnx2.h
6026	BNX2_RPM_RC_VALUE_MASK_1	0x0000190c	bnx2.h
6027	BNX2_RPM_RC_CNTL_2	0x00001910	bnx2.h
6028	BNX2_RPM_RC_CNTL_2_A	(0x3ffffL<<0)	bnx2.h
6029	BNX2_RPM_RC_CNTL_2_B	(0xfffL<<19)	bnx2.h
6030	BNX2_RPM_RC_VALUE_MASK_2	0x00001914	bnx2.h
6031	BNX2_RPM_RC_CNTL_3	0x00001918	bnx2.h
6032	BNX2_RPM_RC_CNTL_3_A	(0x3ffffL<<0)	bnx2.h
6033	BNX2_RPM_RC_CNTL_3_B	(0xfffL<<19)	bnx2.h
6034	BNX2_RPM_RC_VALUE_MASK_3	0x0000191c	bnx2.h
6035	BNX2_RPM_RC_CNTL_4	0x00001920	bnx2.h
6036	BNX2_RPM_RC_CNTL_4_A	(0x3ffffL<<0)	bnx2.h
6037	BNX2_RPM_RC_CNTL_4_B	(0xfffL<<19)	bnx2.h
6038	BNX2_RPM_RC_VALUE_MASK_4	0x00001924	bnx2.h
6039	BNX2_RPM_RC_CNTL_5	0x00001928	bnx2.h
6040	BNX2_RPM_RC_CNTL_5_A	(0x3ffffL<<0)	bnx2.h
6041	BNX2_RPM_RC_CNTL_5_B	(0xfffL<<19)	bnx2.h
6042	BNX2_RPM_RC_VALUE_MASK_5	0x0000192c	bnx2.h
6043	BNX2_RPM_RC_CNTL_6	0x00001930	bnx2.h
6044	BNX2_RPM_RC_CNTL_6_A	(0x3ffffL<<0)	bnx2.h
6045	BNX2_RPM_RC_CNTL_6_B	(0xfffL<<19)	bnx2.h
6046	BNX2_RPM_RC_VALUE_MASK_6	0x00001934	bnx2.h
6047	BNX2_RPM_RC_CNTL_7	0x00001938	bnx2.h
6048	BNX2_RPM_RC_CNTL_7_A	(0x3ffffL<<0)	bnx2.h
6049	BNX2_RPM_RC_CNTL_7_B	(0xfffL<<19)	bnx2.h
6050	BNX2_RPM_RC_VALUE_MASK_7	0x0000193c	bnx2.h
6051	BNX2_RPM_RC_CNTL_8	0x00001940	bnx2.h
6052	BNX2_RPM_RC_CNTL_8_A	(0x3ffffL<<0)	bnx2.h
6053	BNX2_RPM_RC_CNTL_8_B	(0xfffL<<19)	bnx2.h
6054	BNX2_RPM_RC_VALUE_MASK_8	0x00001944	bnx2.h
6055	BNX2_RPM_RC_CNTL_9	0x00001948	bnx2.h
6056	BNX2_RPM_RC_CNTL_9_A	(0x3ffffL<<0)	bnx2.h
6057	BNX2_RPM_RC_CNTL_9_B	(0xfffL<<19)	bnx2.h
6058	BNX2_RPM_RC_VALUE_MASK_9	0x0000194c	bnx2.h
6059	BNX2_RPM_RC_CNTL_10	0x00001950	bnx2.h
6060	BNX2_RPM_RC_CNTL_10_A	(0x3ffffL<<0)	bnx2.h
6061	BNX2_RPM_RC_CNTL_10_B	(0xfffL<<19)	bnx2.h
6062	BNX2_RPM_RC_VALUE_MASK_10	0x00001954	bnx2.h
6063	BNX2_RPM_RC_CNTL_11	0x00001958	bnx2.h
6064	BNX2_RPM_RC_CNTL_11_A	(0x3ffffL<<0)	bnx2.h
6065	BNX2_RPM_RC_CNTL_11_B	(0xfffL<<19)	bnx2.h
6066	BNX2_RPM_RC_VALUE_MASK_11	0x0000195c	bnx2.h
6067	BNX2_RPM_RC_CNTL_12	0x00001960	bnx2.h
6068	BNX2_RPM_RC_CNTL_12_A	(0x3ffffL<<0)	bnx2.h
6069	BNX2_RPM_RC_CNTL_12_B	(0xfffL<<19)	bnx2.h
6070	BNX2_RPM_RC_VALUE_MASK_12	0x00001964	bnx2.h
6071	BNX2_RPM_RC_CNTL_13	0x00001968	bnx2.h
6072	BNX2_RPM_RC_CNTL_13_A	(0x3ffffL<<0)	bnx2.h
6073	BNX2_RPM_RC_CNTL_13_B	(0xfffL<<19)	bnx2.h
6074	BNX2_RPM_RC_VALUE_MASK_13	0x0000196c	bnx2.h
6075	BNX2_RPM_RC_CNTL_14	0x00001970	bnx2.h
6076	BNX2_RPM_RC_CNTL_14_A	(0x3ffffL<<0)	bnx2.h
6077	BNX2_RPM_RC_CNTL_14_B	(0xfffL<<19)	bnx2.h
6078	BNX2_RPM_RC_VALUE_MASK_14	0x00001974	bnx2.h
6079	BNX2_RPM_RC_CNTL_15	0x00001978	bnx2.h
6080	BNX2_RPM_RC_CNTL_15_A	(0x3ffffL<<0)	bnx2.h
6081	BNX2_RPM_RC_CNTL_15_B	(0xfffL<<19)	bnx2.h
6082	BNX2_RPM_RC_VALUE_MASK_15	0x0000197c	bnx2.h
6083	BNX2_RPM_RC_CONFIG	0x00001980	bnx2.h
6084	BNX2_RPM_RC_CONFIG_RULE_ENABLE	(0xffffL<<0)	bnx2.h
6085	BNX2_RPM_RC_CONFIG_DEF_CLASS	(0x7L<<24)	bnx2.h
6086	BNX2_RPM_DEBUG0	0x00001984	bnx2.h
6087	BNX2_RPM_DEBUG0_FM_BCNT	(0xffffL<<0)	bnx2.h
6088	BNX2_RPM_DEBUG0_T_DATA_OFST_VLD	(1L<<16)	bnx2.h
6089	BNX2_RPM_DEBUG0_T_UDP_OFST_VLD	(1L<<17)	bnx2.h
6090	BNX2_RPM_DEBUG0_T_TCP_OFST_VLD	(1L<<18)	bnx2.h
6091	BNX2_RPM_DEBUG0_T_IP_OFST_VLD	(1L<<19)	bnx2.h
6092	BNX2_RPM_DEBUG0_IP_MORE_FRGMT	(1L<<20)	bnx2.h
6093	BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP	(1L<<21)	bnx2.h
6094	BNX2_RPM_DEBUG0_LLC_SNAP	(1L<<22)	bnx2.h
6095	BNX2_RPM_DEBUG0_FM_STARTED	(1L<<23)	bnx2.h
6096	BNX2_RPM_DEBUG0_DONE	(1L<<24)	bnx2.h
6097	BNX2_RPM_DEBUG0_WAIT_4_DONE	(1L<<25)	bnx2.h
6098	BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM	(1L<<26)	bnx2.h
6099	BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_C	(1L<<27)	bnx2.h
6100	BNX2_RPM_DEBUG0_IGNORE_VLAN	(1L<<28)	bnx2.h
6101	BNX2_RPM_DEBUG0_RP_ENA_ACTIVE	(1L<<31)	bnx2.h
6102	BNX2_RPM_DEBUG1	0x00001988	bnx2.h
6103	BNX2_RPM_DEBUG1_FSM_CUR_ST	(0xffffL<<0)	bnx2.h
6104	BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE	(0L<<0)	bnx2.h
6105	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(1L<<0)	bnx2.h
6106	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(2L<<0)	bnx2.h
6107	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(4L<<0)	bnx2.h
6108	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(8L<<0)	bnx2.h
6109	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_S	(16L<<0)	bnx2.h
6110	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP	(32L<<0)	bnx2.h
6111	BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP	(64L<<0)	bnx2.h
6112	BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP	(128L<<0)	bnx2.h
6113	BNX2_RPM_DEBUG1_FSM_CUR_ST_AH	(256L<<0)	bnx2.h
6114	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP	(512L<<0)	bnx2.h
6115	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_	(1024L<<0)	bnx2.h
6116	BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA	(2048L<<0)	bnx2.h
6117	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x2000L<<0)	bnx2.h
6118	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x4000L<<0)	bnx2.h
6119	BNX2_RPM_DEBUG1_FSM_CUR_ST_LATC	(0x8000L<<0)	bnx2.h
6120	BNX2_RPM_DEBUG1_HDR_BCNT	(0x7ffL<<16)	bnx2.h
6121	BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D	(1L<<28)	bnx2.h
6122	BNX2_RPM_DEBUG1_VLAN_REMOVED_D2	(1L<<29)	bnx2.h
6123	BNX2_RPM_DEBUG1_VLAN_REMOVED_D1	(1L<<30)	bnx2.h
6124	BNX2_RPM_DEBUG1_EOF_0XTRA_WD	(1L<<31)	bnx2.h
6125	BNX2_RPM_DEBUG2	0x0000198c	bnx2.h
6126	BNX2_RPM_DEBUG2_CMD_HIT_VEC	(0xffffL<<0)	bnx2.h
6127	BNX2_RPM_DEBUG2_IP_BCNT	(0xffL<<16)	bnx2.h
6128	BNX2_RPM_DEBUG2_THIS_CMD_M4	(1L<<24)	bnx2.h
6129	BNX2_RPM_DEBUG2_THIS_CMD_M3	(1L<<25)	bnx2.h
6130	BNX2_RPM_DEBUG2_THIS_CMD_M2	(1L<<26)	bnx2.h
6131	BNX2_RPM_DEBUG2_THIS_CMD_M1	(1L<<27)	bnx2.h
6132	BNX2_RPM_DEBUG2_IPIPE_EMPTY	(1L<<28)	bnx2.h
6133	BNX2_RPM_DEBUG2_FM_DISCARD	(1L<<29)	bnx2.h
6134	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<30)	bnx2.h
6135	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<31)	bnx2.h
6136	BNX2_RPM_DEBUG3	0x00001990	bnx2.h
6137	BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR	(0x1ffL<<0)	bnx2.h
6138	BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_RE	(1L<<9)	bnx2.h
6139	BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAS	(1L<<10)	bnx2.h
6140	BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ	(1L<<11)	bnx2.h
6141	BNX2_RPM_DEBUG3_RDE_RBUF_FREE_R	(1L<<12)	bnx2.h
6142	BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_	(1L<<13)	bnx2.h
6143	BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAV	(1L<<14)	bnx2.h
6144	BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DR	(1L<<15)	bnx2.h
6145	BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY	(0xfL<<16)	bnx2.h
6146	BNX2_RPM_DEBUG3_RDE_SRC_FIFO_AL	(1L<<21)	bnx2.h
6147	BNX2_RPM_DEBUG3_DROP_NXT_VLD	(1L<<22)	bnx2.h
6148	BNX2_RPM_DEBUG3_DROP_NXT	(1L<<23)	bnx2.h
6149	BNX2_RPM_DEBUG3_FTQ_FSM	(0x3L<<24)	bnx2.h
6150	BNX2_RPM_DEBUG3_FTQ_FSM_IDLE	(0x0L<<24)	bnx2.h
6151	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_AC	(0x1L<<24)	bnx2.h
6152	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FR	(0x2L<<24)	bnx2.h
6153	BNX2_RPM_DEBUG3_MBWRITE_FSM	(0x3L<<26)	bnx2.h
6154	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x0L<<26)	bnx2.h
6155	BNX2_RPM_DEBUG3_MBWRITE_FSM_GET	(0x1L<<26)	bnx2.h
6156	BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA	(0x2L<<26)	bnx2.h
6157	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x3L<<26)	bnx2.h
6158	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x4L<<26)	bnx2.h
6159	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x5L<<26)	bnx2.h
6160	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x6L<<26)	bnx2.h
6161	BNX2_RPM_DEBUG3_MBWRITE_FSM_DON	(0x7L<<26)	bnx2.h
6162	BNX2_RPM_DEBUG3_MBFREE_FSM	(1L<<29)	bnx2.h
6163	BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE	(0L<<29)	bnx2.h
6164	BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT	(1L<<29)	bnx2.h
6165	BNX2_RPM_DEBUG3_MBALLOC_FSM	(1L<<30)	bnx2.h
6166	BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_	(0x0L<<30)	bnx2.h
6167	BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE	(0x1L<<30)	bnx2.h
6168	BNX2_RPM_DEBUG3_CCODE_EOF_ERROR	(1L<<31)	bnx2.h
6169	BNX2_RPM_DEBUG4	0x00001994	bnx2.h
6170	BNX2_RPM_DEBUG4_DFSM_MBUF_CLUST	(0x1ffffffL<<0)	bnx2.h
6171	BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE	(0x7L<<25)	bnx2.h
6172	BNX2_RPM_DEBUG4_MBWRITE_FSM	(0x7L<<28)	bnx2.h
6173	BNX2_RPM_DEBUG4_DFIFO_EMPTY	(1L<<31)	bnx2.h
6174	BNX2_RPM_DEBUG5	0x00001998	bnx2.h
6175	BNX2_RPM_DEBUG5_RDROP_WPTR	(0x1fL<<0)	bnx2.h
6176	BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR	(0x1fL<<5)	bnx2.h
6177	BNX2_RPM_DEBUG5_RDROP_MC_RPTR	(0x1fL<<10)	bnx2.h
6178	BNX2_RPM_DEBUG5_RDROP_RC_RPTR	(0x1fL<<15)	bnx2.h
6179	BNX2_RPM_DEBUG5_RDROP_ACPI_EMPT	(1L<<20)	bnx2.h
6180	BNX2_RPM_DEBUG5_RDROP_MC_EMPTY	(1L<<21)	bnx2.h
6181	BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_	(1L<<22)	bnx2.h
6182	BNX2_RPM_DEBUG5_HOLDREG_WOL_DRO	(1L<<23)	bnx2.h
6183	BNX2_RPM_DEBUG5_HOLDREG_DISCARD	(1L<<24)	bnx2.h
6184	BNX2_RPM_DEBUG5_HOLDREG_MBUF_NO	(1L<<25)	bnx2.h
6185	BNX2_RPM_DEBUG5_HOLDREG_MC_EMPT	(1L<<26)	bnx2.h
6186	BNX2_RPM_DEBUG5_HOLDREG_RC_EMPT	(1L<<27)	bnx2.h
6187	BNX2_RPM_DEBUG5_HOLDREG_FC_EMPT	(1L<<28)	bnx2.h
6188	BNX2_RPM_DEBUG5_HOLDREG_ACPI_EM	(1L<<29)	bnx2.h
6189	BNX2_RPM_DEBUG5_HOLDREG_FULL_T	(1L<<30)	bnx2.h
6190	BNX2_RPM_DEBUG5_HOLDREG_RD	(1L<<31)	bnx2.h
6191	BNX2_RPM_DEBUG6	0x0000199c	bnx2.h
6192	BNX2_RPM_DEBUG6_ACPI_VEC	(0xffffL<<0)	bnx2.h
6193	BNX2_RPM_DEBUG6_VEC	(0xffffL<<16)	bnx2.h
6194	BNX2_RPM_DEBUG7	0x000019a0	bnx2.h
6195	BNX2_RPM_DEBUG7_RPM_DBG7_LAST_C	(0xffffffffL<<0)	bnx2.h
6196	BNX2_RPM_DEBUG8	0x000019a4	bnx2.h
6197	BNX2_RPM_DEBUG8_PS_ACPI_FSM	(0xfL<<0)	bnx2.h
6198	BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDL	(0L<<0)	bnx2.h
6199	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(1L<<0)	bnx2.h
6200	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(2L<<0)	bnx2.h
6201	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(3L<<0)	bnx2.h
6202	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(4L<<0)	bnx2.h
6203	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(5L<<0)	bnx2.h
6204	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_	(6L<<0)	bnx2.h
6205	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_	(7L<<0)	bnx2.h
6206	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_	(8L<<0)	bnx2.h
6207	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(9L<<0)	bnx2.h
6208	BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAI	(10L<<0)	bnx2.h
6209	BNX2_RPM_DEBUG8_COMPARE_AT_W0	(1L<<4)	bnx2.h
6210	BNX2_RPM_DEBUG8_COMPARE_AT_W3_D	(1L<<5)	bnx2.h
6211	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<6)	bnx2.h
6212	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<7)	bnx2.h
6213	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<8)	bnx2.h
6214	BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLD	(1L<<9)	bnx2.h
6215	BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLD	(1L<<10)	bnx2.h
6216	BNX2_RPM_DEBUG8_NXT_EOF_W_12_VL	(1L<<11)	bnx2.h
6217	BNX2_RPM_DEBUG8_EOF_DET	(1L<<12)	bnx2.h
6218	BNX2_RPM_DEBUG8_SOF_DET	(1L<<13)	bnx2.h
6219	BNX2_RPM_DEBUG8_WAIT_4_SOF	(1L<<14)	bnx2.h
6220	BNX2_RPM_DEBUG8_ALL_DONE	(1L<<15)	bnx2.h
6221	BNX2_RPM_DEBUG8_THBUF_ADDR	(0x7fL<<16)	bnx2.h
6222	BNX2_RPM_DEBUG8_BYTE_CTR	(0xffL<<24)	bnx2.h
6223	BNX2_RPM_DEBUG9	0x000019a8	bnx2.h
6224	BNX2_RPM_DEBUG9_OUTFIFO_COUNT	(0x7L<<0)	bnx2.h
6225	BNX2_RPM_DEBUG9_RDE_ACPI_RDY	(1L<<3)	bnx2.h
6226	BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT	(0x7L<<4)	bnx2.h
6227	BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN	(1L<<28)	bnx2.h
6228	BNX2_RPM_DEBUG9_INFIFO_OVERRUN_	(1L<<29)	bnx2.h
6229	BNX2_RPM_DEBUG9_ACPI_MATCH_INT	(1L<<30)	bnx2.h
6230	BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN	(1L<<31)	bnx2.h
6231	BNX2_RPM_ACPI_DBG_BUF_W00	0x000019c0	bnx2.h
6232	BNX2_RPM_ACPI_DBG_BUF_W01	0x000019c4	bnx2.h
6233	BNX2_RPM_ACPI_DBG_BUF_W02	0x000019c8	bnx2.h
6234	BNX2_RPM_ACPI_DBG_BUF_W03	0x000019cc	bnx2.h
6235	BNX2_RPM_ACPI_DBG_BUF_W10	0x000019d0	bnx2.h
6236	BNX2_RPM_ACPI_DBG_BUF_W11	0x000019d4	bnx2.h
6237	BNX2_RPM_ACPI_DBG_BUF_W12	0x000019d8	bnx2.h
6238	BNX2_RPM_ACPI_DBG_BUF_W13	0x000019dc	bnx2.h
6239	BNX2_RPM_ACPI_DBG_BUF_W20	0x000019e0	bnx2.h
6240	BNX2_RPM_ACPI_DBG_BUF_W21	0x000019e4	bnx2.h
6241	BNX2_RPM_ACPI_DBG_BUF_W22	0x000019e8	bnx2.h
6242	BNX2_RPM_ACPI_DBG_BUF_W23	0x000019ec	bnx2.h
6243	BNX2_RPM_ACPI_DBG_BUF_W30	0x000019f0	bnx2.h
6244	BNX2_RPM_ACPI_DBG_BUF_W31	0x000019f4	bnx2.h
6245	BNX2_RPM_ACPI_DBG_BUF_W32	0x000019f8	bnx2.h
6246	BNX2_RPM_ACPI_DBG_BUF_W33	0x000019fc	bnx2.h
6247	BNX2_RBUF_COMMAND	0x00200000	bnx2.h
6248	BNX2_RBUF_COMMAND_ENABLED	(1L<<0)	bnx2.h
6249	BNX2_RBUF_COMMAND_FREE_INIT	(1L<<1)	bnx2.h
6250	BNX2_RBUF_COMMAND_RAM_INIT	(1L<<2)	bnx2.h
6251	BNX2_RBUF_COMMAND_OVER_FREE	(1L<<4)	bnx2.h
6252	BNX2_RBUF_COMMAND_ALLOC_REQ	(1L<<5)	bnx2.h
6253	BNX2_RBUF_STATUS1	0x00200004	bnx2.h
6254	BNX2_RBUF_STATUS1_FREE_COUNT	(0x3ffL<<0)	bnx2.h
6255	BNX2_RBUF_STATUS2	0x00200008	bnx2.h
6256	BNX2_RBUF_STATUS2_FREE_TAIL	(0x3ffL<<0)	bnx2.h
6257	BNX2_RBUF_STATUS2_FREE_HEAD	(0x3ffL<<16)	bnx2.h
6258	BNX2_RBUF_CONFIG	0x0020000c	bnx2.h
6259	BNX2_RBUF_CONFIG_XOFF_TRIP	(0x3ffL<<0)	bnx2.h
6260	BNX2_RBUF_CONFIG_XON_TRIP	(0x3ffL<<16)	bnx2.h
6261	BNX2_RBUF_FW_BUF_ALLOC	0x00200010	bnx2.h
6262	BNX2_RBUF_FW_BUF_ALLOC_VALUE	(0x1ffL<<7)	bnx2.h
6263	BNX2_RBUF_FW_BUF_FREE	0x00200014	bnx2.h
6264	BNX2_RBUF_FW_BUF_FREE_COUNT	(0x7fL<<0)	bnx2.h
6265	BNX2_RBUF_FW_BUF_FREE_TAIL	(0x1ffL<<7)	bnx2.h
6266	BNX2_RBUF_FW_BUF_FREE_HEAD	(0x1ffL<<16)	bnx2.h
6267	BNX2_RBUF_FW_BUF_SEL	0x00200018	bnx2.h
6268	BNX2_RBUF_FW_BUF_SEL_COUNT	(0x7fL<<0)	bnx2.h
6269	BNX2_RBUF_FW_BUF_SEL_TAIL	(0x1ffL<<7)	bnx2.h
6270	BNX2_RBUF_FW_BUF_SEL_HEAD	(0x1ffL<<16)	bnx2.h
6271	BNX2_RBUF_CONFIG2	0x0020001c	bnx2.h
6272	BNX2_RBUF_CONFIG2_MAC_DROP_TRIP	(0x3ffL<<0)	bnx2.h
6273	BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
6274	BNX2_RBUF_CONFIG3	0x00200020	bnx2.h
6275	BNX2_RBUF_CONFIG3_CU_DROP_TRIP	(0x3ffL<<0)	bnx2.h
6276	BNX2_RBUF_CONFIG3_CU_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
6277	BNX2_RBUF_PKT_DATA	0x00208000	bnx2.h
6278	BNX2_RBUF_CLIST_DATA	0x00210000	bnx2.h
6279	BNX2_RBUF_BUF_DATA	0x00220000	bnx2.h
6280	BNX2_RV2P_COMMAND	0x00002800	bnx2.h
6281	BNX2_RV2P_COMMAND_ENABLED	(1L<<0)	bnx2.h
6282	BNX2_RV2P_COMMAND_PROC1_INTRPT	(1L<<1)	bnx2.h
6283	BNX2_RV2P_COMMAND_PROC2_INTRPT	(1L<<2)	bnx2.h
6284	BNX2_RV2P_COMMAND_ABORT0	(1L<<4)	bnx2.h
6285	BNX2_RV2P_COMMAND_ABORT1	(1L<<5)	bnx2.h
6286	BNX2_RV2P_COMMAND_ABORT2	(1L<<6)	bnx2.h
6287	BNX2_RV2P_COMMAND_ABORT3	(1L<<7)	bnx2.h
6288	BNX2_RV2P_COMMAND_ABORT4	(1L<<8)	bnx2.h
6289	BNX2_RV2P_COMMAND_ABORT5	(1L<<9)	bnx2.h
6290	BNX2_RV2P_COMMAND_PROC1_RESET	(1L<<16)	bnx2.h
6291	BNX2_RV2P_COMMAND_PROC2_RESET	(1L<<17)	bnx2.h
6292	BNX2_RV2P_COMMAND_CTXIF_RESET	(1L<<18)	bnx2.h
6293	BNX2_RV2P_STATUS	0x00002804	bnx2.h
6294	BNX2_RV2P_STATUS_ALWAYS_0	(1L<<0)	bnx2.h
6295	BNX2_RV2P_STATUS_RV2P_GEN_STAT0	(1L<<8)	bnx2.h
6296	BNX2_RV2P_STATUS_RV2P_GEN_STAT1	(1L<<9)	bnx2.h
6297	BNX2_RV2P_STATUS_RV2P_GEN_STAT2	(1L<<10)	bnx2.h
6298	BNX2_RV2P_STATUS_RV2P_GEN_STAT3	(1L<<11)	bnx2.h
6299	BNX2_RV2P_STATUS_RV2P_GEN_STAT4	(1L<<12)	bnx2.h
6300	BNX2_RV2P_STATUS_RV2P_GEN_STAT5	(1L<<13)	bnx2.h
6301	BNX2_RV2P_CONFIG	0x00002808	bnx2.h
6302	BNX2_RV2P_CONFIG_STALL_PROC1	(1L<<0)	bnx2.h
6303	BNX2_RV2P_CONFIG_STALL_PROC2	(1L<<1)	bnx2.h
6304	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<8)	bnx2.h
6305	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<9)	bnx2.h
6306	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<10)	bnx2.h
6307	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<11)	bnx2.h
6308	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<12)	bnx2.h
6309	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<13)	bnx2.h
6310	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<16)	bnx2.h
6311	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<17)	bnx2.h
6312	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<18)	bnx2.h
6313	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<19)	bnx2.h
6314	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<20)	bnx2.h
6315	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<21)	bnx2.h
6316	BNX2_RV2P_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
6317	BNX2_RV2P_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
6318	BNX2_RV2P_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
6319	BNX2_RV2P_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
6320	BNX2_RV2P_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
6321	BNX2_RV2P_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
6322	BNX2_RV2P_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
6323	BNX2_RV2P_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
6324	BNX2_RV2P_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
6325	BNX2_RV2P_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
6326	BNX2_RV2P_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
6327	BNX2_RV2P_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
6328	BNX2_RV2P_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
6329	BNX2_RV2P_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
6330	BNX2_RV2P_GEN_BFR_ADDR_0	0x00002810	bnx2.h
6331	BNX2_RV2P_GEN_BFR_ADDR_0_VALUE	(0xffffL<<16)	bnx2.h
6332	BNX2_RV2P_GEN_BFR_ADDR_1	0x00002814	bnx2.h
6333	BNX2_RV2P_GEN_BFR_ADDR_1_VALUE	(0xffffL<<16)	bnx2.h
6334	BNX2_RV2P_GEN_BFR_ADDR_2	0x00002818	bnx2.h
6335	BNX2_RV2P_GEN_BFR_ADDR_2_VALUE	(0xffffL<<16)	bnx2.h
6336	BNX2_RV2P_GEN_BFR_ADDR_3	0x0000281c	bnx2.h
6337	BNX2_RV2P_GEN_BFR_ADDR_3_VALUE	(0xffffL<<16)	bnx2.h
6338	BNX2_RV2P_INSTR_HIGH	0x00002830	bnx2.h
6339	BNX2_RV2P_INSTR_HIGH_HIGH	(0x1fL<<0)	bnx2.h
6340	BNX2_RV2P_INSTR_LOW	0x00002834	bnx2.h
6341	BNX2_RV2P_PROC1_ADDR_CMD	0x00002838	bnx2.h
6342	BNX2_RV2P_PROC1_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
6343	BNX2_RV2P_PROC1_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
6344	BNX2_RV2P_PROC2_ADDR_CMD	0x0000283c	bnx2.h
6345	BNX2_RV2P_PROC2_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
6346	BNX2_RV2P_PROC2_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
6347	BNX2_RV2P_PROC1_GRC_DEBUG	0x00002840	bnx2.h
6348	BNX2_RV2P_PROC2_GRC_DEBUG	0x00002844	bnx2.h
6349	BNX2_RV2P_GRC_PROC_DEBUG	0x00002848	bnx2.h
6350	BNX2_RV2P_DEBUG_VECT_PEEK	0x0000284c	bnx2.h
6351	BNX2_RV2P_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
6352	BNX2_RV2P_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
6353	BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
6354	BNX2_RV2P_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
6355	BNX2_RV2P_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
6356	BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
6357	BNX2_RV2P_PFTQ_DATA	0x00002b40	bnx2.h
6358	BNX2_RV2P_PFTQ_CMD	0x00002b78	bnx2.h
6359	BNX2_RV2P_PFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
6360	BNX2_RV2P_PFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
6361	BNX2_RV2P_PFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
6362	BNX2_RV2P_PFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
6363	BNX2_RV2P_PFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
6364	BNX2_RV2P_PFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
6365	BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
6366	BNX2_RV2P_PFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
6367	BNX2_RV2P_PFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
6368	BNX2_RV2P_PFTQ_CMD_POP	(1L<<30)	bnx2.h
6369	BNX2_RV2P_PFTQ_CMD_BUSY	(1L<<31)	bnx2.h
6370	BNX2_RV2P_PFTQ_CTL	0x00002b7c	bnx2.h
6371	BNX2_RV2P_PFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
6372	BNX2_RV2P_PFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
6373	BNX2_RV2P_PFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
6374	BNX2_RV2P_PFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
6375	BNX2_RV2P_PFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
6376	BNX2_RV2P_TFTQ_DATA	0x00002b80	bnx2.h
6377	BNX2_RV2P_TFTQ_CMD	0x00002bb8	bnx2.h
6378	BNX2_RV2P_TFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
6379	BNX2_RV2P_TFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
6380	BNX2_RV2P_TFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
6381	BNX2_RV2P_TFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
6382	BNX2_RV2P_TFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
6383	BNX2_RV2P_TFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
6384	BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
6385	BNX2_RV2P_TFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
6386	BNX2_RV2P_TFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
6387	BNX2_RV2P_TFTQ_CMD_POP	(1L<<30)	bnx2.h
6388	BNX2_RV2P_TFTQ_CMD_BUSY	(1L<<31)	bnx2.h
6389	BNX2_RV2P_TFTQ_CTL	0x00002bbc	bnx2.h
6390	BNX2_RV2P_TFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
6391	BNX2_RV2P_TFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
6392	BNX2_RV2P_TFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
6393	BNX2_RV2P_TFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
6394	BNX2_RV2P_TFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
6395	BNX2_RV2P_MFTQ_DATA	0x00002bc0	bnx2.h
6396	BNX2_RV2P_MFTQ_CMD	0x00002bf8	bnx2.h
6397	BNX2_RV2P_MFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
6398	BNX2_RV2P_MFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
6399	BNX2_RV2P_MFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
6400	BNX2_RV2P_MFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
6401	BNX2_RV2P_MFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
6402	BNX2_RV2P_MFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
6403	BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
6404	BNX2_RV2P_MFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
6405	BNX2_RV2P_MFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
6406	BNX2_RV2P_MFTQ_CMD_POP	(1L<<30)	bnx2.h
6407	BNX2_RV2P_MFTQ_CMD_BUSY	(1L<<31)	bnx2.h
6408	BNX2_RV2P_MFTQ_CTL	0x00002bfc	bnx2.h
6409	BNX2_RV2P_MFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
6410	BNX2_RV2P_MFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
6411	BNX2_RV2P_MFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
6412	BNX2_RV2P_MFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
6413	BNX2_RV2P_MFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
6414	BNX2_MQ_COMMAND	0x00003c00	bnx2.h
6415	BNX2_MQ_COMMAND_ENABLED	(1L<<0)	bnx2.h
6416	BNX2_MQ_COMMAND_OVERFLOW	(1L<<4)	bnx2.h
6417	BNX2_MQ_COMMAND_WR_ERROR	(1L<<5)	bnx2.h
6418	BNX2_MQ_COMMAND_RD_ERROR	(1L<<6)	bnx2.h
6419	BNX2_MQ_STATUS	0x00003c04	bnx2.h
6420	BNX2_MQ_STATUS_CTX_ACCESS_STAT	(1L<<16)	bnx2.h
6421	BNX2_MQ_STATUS_CTX_ACCESS64_STA	(1L<<17)	bnx2.h
6422	BNX2_MQ_STATUS_PCI_STALL_STAT	(1L<<18)	bnx2.h
6423	BNX2_MQ_CONFIG	0x00003c08	bnx2.h
6424	BNX2_MQ_CONFIG_TX_HIGH_PRI	(1L<<0)	bnx2.h
6425	BNX2_MQ_CONFIG_HALT_DIS	(1L<<1)	bnx2.h
6426	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0x7L<<4)	bnx2.h
6427	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0L<<4)	bnx2.h
6428	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(1L<<4)	bnx2.h
6429	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(2L<<4)	bnx2.h
6430	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(3L<<4)	bnx2.h
6431	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(4L<<4)	bnx2.h
6432	BNX2_MQ_CONFIG_MAX_DEPTH	(0x7fL<<8)	bnx2.h
6433	BNX2_MQ_CONFIG_CUR_DEPTH	(0x7fL<<20)	bnx2.h
6434	BNX2_MQ_ENQUEUE1	0x00003c0c	bnx2.h
6435	BNX2_MQ_ENQUEUE1_OFFSET	(0x3fL<<2)	bnx2.h
6436	BNX2_MQ_ENQUEUE1_CID	(0x3fffL<<8)	bnx2.h
6437	BNX2_MQ_ENQUEUE1_BYTE_MASK	(0xfL<<24)	bnx2.h
6438	BNX2_MQ_ENQUEUE1_KNL_MODE	(1L<<28)	bnx2.h
6439	BNX2_MQ_ENQUEUE2	0x00003c10	bnx2.h
6440	BNX2_MQ_BAD_WR_ADDR	0x00003c14	bnx2.h
6441	BNX2_MQ_BAD_RD_ADDR	0x00003c18	bnx2.h
6442	BNX2_MQ_KNL_BYP_WIND_START	0x00003c1c	bnx2.h
6443	BNX2_MQ_KNL_BYP_WIND_START_VALU	(0xfffffL<<12)	bnx2.h
6444	BNX2_MQ_KNL_WIND_END	0x00003c20	bnx2.h
6445	BNX2_MQ_KNL_WIND_END_VALUE	(0xffffffL<<8)	bnx2.h
6446	BNX2_MQ_KNL_WRITE_MASK1	0x00003c24	bnx2.h
6447	BNX2_MQ_KNL_TX_MASK1	0x00003c28	bnx2.h
6448	BNX2_MQ_KNL_CMD_MASK1	0x00003c2c	bnx2.h
6449	BNX2_MQ_KNL_COND_ENQUEUE_MASK1	0x00003c30	bnx2.h
6450	BNX2_MQ_KNL_RX_V2P_MASK1	0x00003c34	bnx2.h
6451	BNX2_MQ_KNL_WRITE_MASK2	0x00003c38	bnx2.h
6452	BNX2_MQ_KNL_TX_MASK2	0x00003c3c	bnx2.h
6453	BNX2_MQ_KNL_CMD_MASK2	0x00003c40	bnx2.h
6454	BNX2_MQ_KNL_COND_ENQUEUE_MASK2	0x00003c44	bnx2.h
6455	BNX2_MQ_KNL_RX_V2P_MASK2	0x00003c48	bnx2.h
6456	BNX2_MQ_KNL_BYP_WRITE_MASK1	0x00003c4c	bnx2.h
6457	BNX2_MQ_KNL_BYP_TX_MASK1	0x00003c50	bnx2.h
6458	BNX2_MQ_KNL_BYP_CMD_MASK1	0x00003c54	bnx2.h
6459	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c58	bnx2.h
6460	BNX2_MQ_KNL_BYP_RX_V2P_MASK1	0x00003c5c	bnx2.h
6461	BNX2_MQ_KNL_BYP_WRITE_MASK2	0x00003c60	bnx2.h
6462	BNX2_MQ_KNL_BYP_TX_MASK2	0x00003c64	bnx2.h
6463	BNX2_MQ_KNL_BYP_CMD_MASK2	0x00003c68	bnx2.h
6464	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c6c	bnx2.h
6465	BNX2_MQ_KNL_BYP_RX_V2P_MASK2	0x00003c70	bnx2.h
6466	BNX2_MQ_MEM_WR_ADDR	0x00003c74	bnx2.h
6467	BNX2_MQ_MEM_WR_ADDR_VALUE	(0x3fL<<0)	bnx2.h
6468	BNX2_MQ_MEM_WR_DATA0	0x00003c78	bnx2.h
6469	BNX2_MQ_MEM_WR_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
6470	BNX2_MQ_MEM_WR_DATA1	0x00003c7c	bnx2.h
6471	BNX2_MQ_MEM_WR_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
6472	BNX2_MQ_MEM_WR_DATA2	0x00003c80	bnx2.h
6473	BNX2_MQ_MEM_WR_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
6474	BNX2_MQ_MEM_RD_ADDR	0x00003c84	bnx2.h
6475	BNX2_MQ_MEM_RD_ADDR_VALUE	(0x3fL<<0)	bnx2.h
6476	BNX2_MQ_MEM_RD_DATA0	0x00003c88	bnx2.h
6477	BNX2_MQ_MEM_RD_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
6478	BNX2_MQ_MEM_RD_DATA1	0x00003c8c	bnx2.h
6479	BNX2_MQ_MEM_RD_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
6480	BNX2_MQ_MEM_RD_DATA2	0x00003c90	bnx2.h
6481	BNX2_MQ_MEM_RD_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
6482	BNX2_TBDR_COMMAND	0x00005000	bnx2.h
6483	BNX2_TBDR_COMMAND_ENABLE	(1L<<0)	bnx2.h
6484	BNX2_TBDR_COMMAND_SOFT_RST	(1L<<1)	bnx2.h
6485	BNX2_TBDR_COMMAND_MSTR_ABORT	(1L<<4)	bnx2.h
6486	BNX2_TBDR_STATUS	0x00005004	bnx2.h
6487	BNX2_TBDR_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
6488	BNX2_TBDR_STATUS_FTQ_WAIT	(1L<<1)	bnx2.h
6489	BNX2_TBDR_STATUS_FIFO_OVERFLOW	(1L<<2)	bnx2.h
6490	BNX2_TBDR_STATUS_FIFO_UNDERFLOW	(1L<<3)	bnx2.h
6491	BNX2_TBDR_STATUS_SEARCHMISS_ERR	(1L<<4)	bnx2.h
6492	BNX2_TBDR_STATUS_FTQ_ENTRY_CNT	(1L<<5)	bnx2.h
6493	BNX2_TBDR_STATUS_BURST_CNT	(1L<<6)	bnx2.h
6494	BNX2_TBDR_CONFIG	0x00005008	bnx2.h
6495	BNX2_TBDR_CONFIG_MAX_BDS	(0xffL<<0)	bnx2.h
6496	BNX2_TBDR_CONFIG_SWAP_MODE	(1L<<8)	bnx2.h
6497	BNX2_TBDR_CONFIG_PRIORITY	(1L<<9)	bnx2.h
6498	BNX2_TBDR_CONFIG_CACHE_NEXT_PAG	(1L<<10)	bnx2.h
6499	BNX2_TBDR_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
6500	BNX2_TBDR_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
6501	BNX2_TBDR_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
6502	BNX2_TBDR_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
6503	BNX2_TBDR_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
6504	BNX2_TBDR_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
6505	BNX2_TBDR_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
6506	BNX2_TBDR_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
6507	BNX2_TBDR_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
6508	BNX2_TBDR_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
6509	BNX2_TBDR_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
6510	BNX2_TBDR_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
6511	BNX2_TBDR_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
6512	BNX2_TBDR_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
6513	BNX2_TBDR_DEBUG_VECT_PEEK	0x0000500c	bnx2.h
6514	BNX2_TBDR_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
6515	BNX2_TBDR_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
6516	BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
6517	BNX2_TBDR_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
6518	BNX2_TBDR_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
6519	BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
6520	BNX2_TBDR_FTQ_DATA	0x000053c0	bnx2.h
6521	BNX2_TBDR_FTQ_CMD	0x000053f8	bnx2.h
6522	BNX2_TBDR_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
6523	BNX2_TBDR_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
6524	BNX2_TBDR_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
6525	BNX2_TBDR_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
6526	BNX2_TBDR_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
6527	BNX2_TBDR_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
6528	BNX2_TBDR_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
6529	BNX2_TBDR_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
6530	BNX2_TBDR_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
6531	BNX2_TBDR_FTQ_CMD_POP	(1L<<30)	bnx2.h
6532	BNX2_TBDR_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
6533	BNX2_TBDR_FTQ_CTL	0x000053fc	bnx2.h
6534	BNX2_TBDR_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
6535	BNX2_TBDR_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
6536	BNX2_TBDR_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
6537	BNX2_TBDR_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
6538	BNX2_TBDR_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
6539	BNX2_TDMA_COMMAND	0x00005c00	bnx2.h
6540	BNX2_TDMA_COMMAND_ENABLED	(1L<<0)	bnx2.h
6541	BNX2_TDMA_COMMAND_MASTER_ABORT	(1L<<4)	bnx2.h
6542	BNX2_TDMA_COMMAND_BAD_L2_LENGTH	(1L<<7)	bnx2.h
6543	BNX2_TDMA_STATUS	0x00005c04	bnx2.h
6544	BNX2_TDMA_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
6545	BNX2_TDMA_STATUS_PAYLOAD_WAIT	(1L<<1)	bnx2.h
6546	BNX2_TDMA_STATUS_PATCH_FTQ_WAIT	(1L<<2)	bnx2.h
6547	BNX2_TDMA_STATUS_LOCK_WAIT	(1L<<3)	bnx2.h
6548	BNX2_TDMA_STATUS_FTQ_ENTRY_CNT	(1L<<16)	bnx2.h
6549	BNX2_TDMA_STATUS_BURST_CNT	(1L<<17)	bnx2.h
6550	BNX2_TDMA_CONFIG	0x00005c08	bnx2.h
6551	BNX2_TDMA_CONFIG_ONE_DMA	(1L<<0)	bnx2.h
6552	BNX2_TDMA_CONFIG_ONE_RECORD	(1L<<1)	bnx2.h
6553	BNX2_TDMA_CONFIG_LIMIT_SZ	(0xfL<<4)	bnx2.h
6554	BNX2_TDMA_CONFIG_LIMIT_SZ_64	(0L<<4)	bnx2.h
6555	BNX2_TDMA_CONFIG_LIMIT_SZ_128	(0x4L<<4)	bnx2.h
6556	BNX2_TDMA_CONFIG_LIMIT_SZ_256	(0x6L<<4)	bnx2.h
6557	BNX2_TDMA_CONFIG_LIMIT_SZ_512	(0x8L<<4)	bnx2.h
6558	BNX2_TDMA_CONFIG_LINE_SZ	(0xfL<<8)	bnx2.h
6559	BNX2_TDMA_CONFIG_LINE_SZ_64	(0L<<8)	bnx2.h
6560	BNX2_TDMA_CONFIG_LINE_SZ_128	(4L<<8)	bnx2.h
6561	BNX2_TDMA_CONFIG_LINE_SZ_256	(6L<<8)	bnx2.h
6562	BNX2_TDMA_CONFIG_LINE_SZ_512	(8L<<8)	bnx2.h
6563	BNX2_TDMA_CONFIG_ALIGN_ENA	(1L<<15)	bnx2.h
6564	BNX2_TDMA_CONFIG_CHK_L2_BD	(1L<<16)	bnx2.h
6565	BNX2_TDMA_CONFIG_FIFO_CMP	(0xfL<<20)	bnx2.h
6566	BNX2_TDMA_PAYLOAD_PROD	0x00005c0c	bnx2.h
6567	BNX2_TDMA_PAYLOAD_PROD_VALUE	(0x1fffL<<3)	bnx2.h
6568	BNX2_TDMA_DBG_WATCHDOG	0x00005c10	bnx2.h
6569	BNX2_TDMA_DBG_TRIGGER	0x00005c14	bnx2.h
6570	BNX2_TDMA_DMAD_FSM	0x00005c80	bnx2.h
6571	BNX2_TDMA_DMAD_FSM_BD_INVLD	(1L<<0)	bnx2.h
6572	BNX2_TDMA_DMAD_FSM_PUSH	(0xfL<<4)	bnx2.h
6573	BNX2_TDMA_DMAD_FSM_ARB_TBDC	(0x3L<<8)	bnx2.h
6574	BNX2_TDMA_DMAD_FSM_ARB_CTX	(1L<<12)	bnx2.h
6575	BNX2_TDMA_DMAD_FSM_DR_INTF	(1L<<16)	bnx2.h
6576	BNX2_TDMA_DMAD_FSM_DMAD	(0x7L<<20)	bnx2.h
6577	BNX2_TDMA_DMAD_FSM_BD	(0xfL<<24)	bnx2.h
6578	BNX2_TDMA_DMAD_STATUS	0x00005c84	bnx2.h
6579	BNX2_TDMA_DMAD_STATUS_RHOLD_PUS	(0x3L<<0)	bnx2.h
6580	BNX2_TDMA_DMAD_STATUS_RHOLD_DMA	(0x3L<<4)	bnx2.h
6581	BNX2_TDMA_DMAD_STATUS_RHOLD_BD_	(0x3L<<8)	bnx2.h
6582	BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM	(0xfL<<12)	bnx2.h
6583	BNX2_TDMA_DR_INTF_FSM	0x00005c88	bnx2.h
6584	BNX2_TDMA_DR_INTF_FSM_L2_COMP	(0x3L<<0)	bnx2.h
6585	BNX2_TDMA_DR_INTF_FSM_TPATQ	(0x7L<<4)	bnx2.h
6586	BNX2_TDMA_DR_INTF_FSM_TPBUF	(0x3L<<8)	bnx2.h
6587	BNX2_TDMA_DR_INTF_FSM_DR_BUF	(0x7L<<12)	bnx2.h
6588	BNX2_TDMA_DR_INTF_FSM_DMAD	(0x7L<<16)	bnx2.h
6589	BNX2_TDMA_DR_INTF_STATUS	0x00005c8c	bnx2.h
6590	BNX2_TDMA_DR_INTF_STATUS_HOLE_P	(0x7L<<0)	bnx2.h
6591	BNX2_TDMA_DR_INTF_STATUS_DATA_A	(0x3L<<4)	bnx2.h
6592	BNX2_TDMA_DR_INTF_STATUS_SHIFT_	(0x7L<<8)	bnx2.h
6593	BNX2_TDMA_DR_INTF_STATUS_NXT_PN	(0xfL<<12)	bnx2.h
6594	BNX2_TDMA_DR_INTF_STATUS_BYTE_C	(0x7L<<16)	bnx2.h
6595	BNX2_TDMA_FTQ_DATA	0x00005fc0	bnx2.h
6596	BNX2_TDMA_FTQ_CMD	0x00005ff8	bnx2.h
6597	BNX2_TDMA_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
6598	BNX2_TDMA_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
6599	BNX2_TDMA_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
6600	BNX2_TDMA_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
6601	BNX2_TDMA_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
6602	BNX2_TDMA_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
6603	BNX2_TDMA_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
6604	BNX2_TDMA_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
6605	BNX2_TDMA_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
6606	BNX2_TDMA_FTQ_CMD_POP	(1L<<30)	bnx2.h
6607	BNX2_TDMA_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
6608	BNX2_TDMA_FTQ_CTL	0x00005ffc	bnx2.h
6609	BNX2_TDMA_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
6610	BNX2_TDMA_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
6611	BNX2_TDMA_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
6612	BNX2_TDMA_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
6613	BNX2_TDMA_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
6614	BNX2_HC_COMMAND	0x00006800	bnx2.h
6615	BNX2_HC_COMMAND_ENABLE	(1L<<0)	bnx2.h
6616	BNX2_HC_COMMAND_SKIP_ABORT	(1L<<4)	bnx2.h
6617	BNX2_HC_COMMAND_COAL_NOW	(1L<<16)	bnx2.h
6618	BNX2_HC_COMMAND_COAL_NOW_WO_INT	(1L<<17)	bnx2.h
6619	BNX2_HC_COMMAND_STATS_NOW	(1L<<18)	bnx2.h
6620	BNX2_HC_COMMAND_FORCE_INT	(0x3L<<19)	bnx2.h
6621	BNX2_HC_COMMAND_FORCE_INT_NULL	(0L<<19)	bnx2.h
6622	BNX2_HC_COMMAND_FORCE_INT_HIGH	(1L<<19)	bnx2.h
6623	BNX2_HC_COMMAND_FORCE_INT_LOW	(2L<<19)	bnx2.h
6624	BNX2_HC_COMMAND_FORCE_INT_FREE	(3L<<19)	bnx2.h
6625	BNX2_HC_COMMAND_CLR_STAT_NOW	(1L<<21)	bnx2.h
6626	BNX2_HC_STATUS	0x00006804	bnx2.h
6627	BNX2_HC_STATUS_MASTER_ABORT	(1L<<0)	bnx2.h
6628	BNX2_HC_STATUS_PARITY_ERROR_STA	(1L<<1)	bnx2.h
6629	BNX2_HC_STATUS_PCI_CLK_CNT_STAT	(1L<<16)	bnx2.h
6630	BNX2_HC_STATUS_CORE_CLK_CNT_STA	(1L<<17)	bnx2.h
6631	BNX2_HC_STATUS_NUM_STATUS_BLOCK	(1L<<18)	bnx2.h
6632	BNX2_HC_STATUS_NUM_INT_GEN_STAT	(1L<<19)	bnx2.h
6633	BNX2_HC_STATUS_NUM_INT_MBOX_WR_	(1L<<20)	bnx2.h
6634	BNX2_HC_STATUS_CORE_CLKS_TO_HW_	(1L<<23)	bnx2.h
6635	BNX2_HC_STATUS_CORE_CLKS_TO_SW_	(1L<<24)	bnx2.h
6636	BNX2_HC_STATUS_CORE_CLKS_DURING	(1L<<25)	bnx2.h
6637	BNX2_HC_CONFIG	0x00006808	bnx2.h
6638	BNX2_HC_CONFIG_COLLECT_STATS	(1L<<0)	bnx2.h
6639	BNX2_HC_CONFIG_RX_TMR_MODE	(1L<<1)	bnx2.h
6640	BNX2_HC_CONFIG_TX_TMR_MODE	(1L<<2)	bnx2.h
6641	BNX2_HC_CONFIG_COM_TMR_MODE	(1L<<3)	bnx2.h
6642	BNX2_HC_CONFIG_CMD_TMR_MODE	(1L<<4)	bnx2.h
6643	BNX2_HC_CONFIG_STATISTIC_PRIORI	(1L<<5)	bnx2.h
6644	BNX2_HC_CONFIG_STATUS_PRIORITY	(1L<<6)	bnx2.h
6645	BNX2_HC_CONFIG_STAT_MEM_ADDR	(0xffL<<8)	bnx2.h
6646	BNX2_HC_ATTN_BITS_ENABLE	0x0000680c	bnx2.h
6647	BNX2_HC_STATUS_ADDR_L	0x00006810	bnx2.h
6648	BNX2_HC_STATUS_ADDR_H	0x00006814	bnx2.h
6649	BNX2_HC_STATISTICS_ADDR_L	0x00006818	bnx2.h
6650	BNX2_HC_STATISTICS_ADDR_H	0x0000681c	bnx2.h
6651	BNX2_HC_TX_QUICK_CONS_TRIP	0x00006820	bnx2.h
6652	BNX2_HC_TX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
6653	BNX2_HC_TX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
6654	BNX2_HC_COMP_PROD_TRIP	0x00006824	bnx2.h
6655	BNX2_HC_COMP_PROD_TRIP_VALUE	(0xffL<<0)	bnx2.h
6656	BNX2_HC_COMP_PROD_TRIP_INT	(0xffL<<16)	bnx2.h
6657	BNX2_HC_RX_QUICK_CONS_TRIP	0x00006828	bnx2.h
6658	BNX2_HC_RX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
6659	BNX2_HC_RX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
6660	BNX2_HC_RX_TICKS	0x0000682c	bnx2.h
6661	BNX2_HC_RX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
6662	BNX2_HC_RX_TICKS_INT	(0x3ffL<<16)	bnx2.h
6663	BNX2_HC_TX_TICKS	0x00006830	bnx2.h
6664	BNX2_HC_TX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
6665	BNX2_HC_TX_TICKS_INT	(0x3ffL<<16)	bnx2.h
6666	BNX2_HC_COM_TICKS	0x00006834	bnx2.h
6667	BNX2_HC_COM_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
6668	BNX2_HC_COM_TICKS_INT	(0x3ffL<<16)	bnx2.h
6669	BNX2_HC_CMD_TICKS	0x00006838	bnx2.h
6670	BNX2_HC_CMD_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
6671	BNX2_HC_CMD_TICKS_INT	(0x3ffL<<16)	bnx2.h
6672	BNX2_HC_PERIODIC_TICKS	0x0000683c	bnx2.h
6673	BNX2_HC_PERIODIC_TICKS_HC_PERIO	(0xffffL<<0)	bnx2.h
6674	BNX2_HC_STAT_COLLECT_TICKS	0x00006840	bnx2.h
6675	BNX2_HC_STAT_COLLECT_TICKS_HC_S	(0xffL<<4)	bnx2.h
6676	BNX2_HC_STATS_TICKS	0x00006844	bnx2.h
6677	BNX2_HC_STATS_TICKS_HC_STAT_TIC	(0xffffL<<8)	bnx2.h
6678	BNX2_HC_STAT_MEM_DATA	0x0000684c	bnx2.h
6679	BNX2_HC_STAT_GEN_SEL_0	0x00006850	bnx2.h
6680	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<0)	bnx2.h
6681	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0L<<0)	bnx2.h
6682	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(1L<<0)	bnx2.h
6683	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(2L<<0)	bnx2.h
6684	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(3L<<0)	bnx2.h
6685	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(4L<<0)	bnx2.h
6686	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(5L<<0)	bnx2.h
6687	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(6L<<0)	bnx2.h
6688	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(7L<<0)	bnx2.h
6689	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(8L<<0)	bnx2.h
6690	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(9L<<0)	bnx2.h
6691	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(10L<<0)	bnx2.h
6692	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(11L<<0)	bnx2.h
6693	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(12L<<0)	bnx2.h
6694	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(13L<<0)	bnx2.h
6695	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(14L<<0)	bnx2.h
6696	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(15L<<0)	bnx2.h
6697	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(16L<<0)	bnx2.h
6698	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(17L<<0)	bnx2.h
6699	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(18L<<0)	bnx2.h
6700	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(19L<<0)	bnx2.h
6701	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(20L<<0)	bnx2.h
6702	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(21L<<0)	bnx2.h
6703	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(22L<<0)	bnx2.h
6704	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(23L<<0)	bnx2.h
6705	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(24L<<0)	bnx2.h
6706	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(25L<<0)	bnx2.h
6707	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(26L<<0)	bnx2.h
6708	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(27L<<0)	bnx2.h
6709	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(28L<<0)	bnx2.h
6710	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(29L<<0)	bnx2.h
6711	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(30L<<0)	bnx2.h
6712	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(31L<<0)	bnx2.h
6713	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(32L<<0)	bnx2.h
6714	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(33L<<0)	bnx2.h
6715	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(34L<<0)	bnx2.h
6716	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(35L<<0)	bnx2.h
6717	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(36L<<0)	bnx2.h
6718	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(37L<<0)	bnx2.h
6719	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(38L<<0)	bnx2.h
6720	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(39L<<0)	bnx2.h
6721	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(40L<<0)	bnx2.h
6722	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(41L<<0)	bnx2.h
6723	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(42L<<0)	bnx2.h
6724	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(43L<<0)	bnx2.h
6725	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(44L<<0)	bnx2.h
6726	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(45L<<0)	bnx2.h
6727	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(46L<<0)	bnx2.h
6728	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(47L<<0)	bnx2.h
6729	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(48L<<0)	bnx2.h
6730	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(49L<<0)	bnx2.h
6731	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(50L<<0)	bnx2.h
6732	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(51L<<0)	bnx2.h
6733	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(52L<<0)	bnx2.h
6734	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(53L<<0)	bnx2.h
6735	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(54L<<0)	bnx2.h
6736	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(55L<<0)	bnx2.h
6737	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(56L<<0)	bnx2.h
6738	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(59L<<0)	bnx2.h
6739	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(60L<<0)	bnx2.h
6740	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(61L<<0)	bnx2.h
6741	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(62L<<0)	bnx2.h
6742	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(63L<<0)	bnx2.h
6743	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(64L<<0)	bnx2.h
6744	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(65L<<0)	bnx2.h
6745	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(66L<<0)	bnx2.h
6746	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(67L<<0)	bnx2.h
6747	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(68L<<0)	bnx2.h
6748	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(69L<<0)	bnx2.h
6749	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(70L<<0)	bnx2.h
6750	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(71L<<0)	bnx2.h
6751	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(72L<<0)	bnx2.h
6752	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(73L<<0)	bnx2.h
6753	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(74L<<0)	bnx2.h
6754	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(75L<<0)	bnx2.h
6755	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(76L<<0)	bnx2.h
6756	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(77L<<0)	bnx2.h
6757	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(78L<<0)	bnx2.h
6758	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(79L<<0)	bnx2.h
6759	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(80L<<0)	bnx2.h
6760	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(81L<<0)	bnx2.h
6761	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(82L<<0)	bnx2.h
6762	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(83L<<0)	bnx2.h
6763	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(84L<<0)	bnx2.h
6764	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(85L<<0)	bnx2.h
6765	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(86L<<0)	bnx2.h
6766	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(87L<<0)	bnx2.h
6767	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(88L<<0)	bnx2.h
6768	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(89L<<0)	bnx2.h
6769	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(90L<<0)	bnx2.h
6770	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(91L<<0)	bnx2.h
6771	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(92L<<0)	bnx2.h
6772	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(93L<<0)	bnx2.h
6773	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(94L<<0)	bnx2.h
6774	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(95L<<0)	bnx2.h
6775	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(96L<<0)	bnx2.h
6776	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(97L<<0)	bnx2.h
6777	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(98L<<0)	bnx2.h
6778	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(99L<<0)	bnx2.h
6779	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(100L<<0)	bnx2.h
6780	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(101L<<0)	bnx2.h
6781	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(102L<<0)	bnx2.h
6782	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(103L<<0)	bnx2.h
6783	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(104L<<0)	bnx2.h
6784	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(105L<<0)	bnx2.h
6785	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(106L<<0)	bnx2.h
6786	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(107L<<0)	bnx2.h
6787	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(108L<<0)	bnx2.h
6788	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(109L<<0)	bnx2.h
6789	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(110L<<0)	bnx2.h
6790	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(111L<<0)	bnx2.h
6791	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(112L<<0)	bnx2.h
6792	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(113L<<0)	bnx2.h
6793	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(114L<<0)	bnx2.h
6794	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(115L<<0)	bnx2.h
6795	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(116L<<0)	bnx2.h
6796	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(117L<<0)	bnx2.h
6797	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(118L<<0)	bnx2.h
6798	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(119L<<0)	bnx2.h
6799	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(120L<<0)	bnx2.h
6800	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(121L<<0)	bnx2.h
6801	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(122L<<0)	bnx2.h
6802	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(127L<<0)	bnx2.h
6803	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<8)	bnx2.h
6804	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<16)	bnx2.h
6805	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<24)	bnx2.h
6806	BNX2_HC_STAT_GEN_SEL_1	0x00006854	bnx2.h
6807	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<0)	bnx2.h
6808	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<8)	bnx2.h
6809	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<16)	bnx2.h
6810	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<24)	bnx2.h
6811	BNX2_HC_STAT_GEN_SEL_2	0x00006858	bnx2.h
6812	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<0)	bnx2.h
6813	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<8)	bnx2.h
6814	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<16)	bnx2.h
6815	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<24)	bnx2.h
6816	BNX2_HC_STAT_GEN_SEL_3	0x0000685c	bnx2.h
6817	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<0)	bnx2.h
6818	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<8)	bnx2.h
6819	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<16)	bnx2.h
6820	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<24)	bnx2.h
6821	BNX2_HC_STAT_GEN_STAT0	0x00006888	bnx2.h
6822	BNX2_HC_STAT_GEN_STAT1	0x0000688c	bnx2.h
6823	BNX2_HC_STAT_GEN_STAT2	0x00006890	bnx2.h
6824	BNX2_HC_STAT_GEN_STAT3	0x00006894	bnx2.h
6825	BNX2_HC_STAT_GEN_STAT4	0x00006898	bnx2.h
6826	BNX2_HC_STAT_GEN_STAT5	0x0000689c	bnx2.h
6827	BNX2_HC_STAT_GEN_STAT6	0x000068a0	bnx2.h
6828	BNX2_HC_STAT_GEN_STAT7	0x000068a4	bnx2.h
6829	BNX2_HC_STAT_GEN_STAT8	0x000068a8	bnx2.h
6830	BNX2_HC_STAT_GEN_STAT9	0x000068ac	bnx2.h
6831	BNX2_HC_STAT_GEN_STAT10	0x000068b0	bnx2.h
6832	BNX2_HC_STAT_GEN_STAT11	0x000068b4	bnx2.h
6833	BNX2_HC_STAT_GEN_STAT12	0x000068b8	bnx2.h
6834	BNX2_HC_STAT_GEN_STAT13	0x000068bc	bnx2.h
6835	BNX2_HC_STAT_GEN_STAT14	0x000068c0	bnx2.h
6836	BNX2_HC_STAT_GEN_STAT15	0x000068c4	bnx2.h
6837	BNX2_HC_STAT_GEN_STAT_AC0	0x000068c8	bnx2.h
6838	BNX2_HC_STAT_GEN_STAT_AC1	0x000068cc	bnx2.h
6839	BNX2_HC_STAT_GEN_STAT_AC2	0x000068d0	bnx2.h
6840	BNX2_HC_STAT_GEN_STAT_AC3	0x000068d4	bnx2.h
6841	BNX2_HC_STAT_GEN_STAT_AC4	0x000068d8	bnx2.h
6842	BNX2_HC_STAT_GEN_STAT_AC5	0x000068dc	bnx2.h
6843	BNX2_HC_STAT_GEN_STAT_AC6	0x000068e0	bnx2.h
6844	BNX2_HC_STAT_GEN_STAT_AC7	0x000068e4	bnx2.h
6845	BNX2_HC_STAT_GEN_STAT_AC8	0x000068e8	bnx2.h
6846	BNX2_HC_STAT_GEN_STAT_AC9	0x000068ec	bnx2.h
6847	BNX2_HC_STAT_GEN_STAT_AC10	0x000068f0	bnx2.h
6848	BNX2_HC_STAT_GEN_STAT_AC11	0x000068f4	bnx2.h
6849	BNX2_HC_STAT_GEN_STAT_AC12	0x000068f8	bnx2.h
6850	BNX2_HC_STAT_GEN_STAT_AC13	0x000068fc	bnx2.h
6851	BNX2_HC_STAT_GEN_STAT_AC14	0x00006900	bnx2.h
6852	BNX2_HC_STAT_GEN_STAT_AC15	0x00006904	bnx2.h
6853	BNX2_HC_VIS	0x00006908	bnx2.h
6854	BNX2_HC_VIS_STAT_BUILD_STATE	(0xfL<<0)	bnx2.h
6855	BNX2_HC_VIS_STAT_BUILD_STATE_ID	(0L<<0)	bnx2.h
6856	BNX2_HC_VIS_STAT_BUILD_STATE_ST	(1L<<0)	bnx2.h
6857	BNX2_HC_VIS_STAT_BUILD_STATE_RE	(2L<<0)	bnx2.h
6858	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(3L<<0)	bnx2.h
6859	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(4L<<0)	bnx2.h
6860	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(5L<<0)	bnx2.h
6861	BNX2_HC_VIS_STAT_BUILD_STATE_DM	(6L<<0)	bnx2.h
6862	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(7L<<0)	bnx2.h
6863	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(8L<<0)	bnx2.h
6864	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(9L<<0)	bnx2.h
6865	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(10L<<0)	bnx2.h
6866	BNX2_HC_VIS_DMA_STAT_STATE	(0xfL<<8)	bnx2.h
6867	BNX2_HC_VIS_DMA_STAT_STATE_IDLE	(0L<<8)	bnx2.h
6868	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(1L<<8)	bnx2.h
6869	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(2L<<8)	bnx2.h
6870	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(3L<<8)	bnx2.h
6871	BNX2_HC_VIS_DMA_STAT_STATE_COMP	(4L<<8)	bnx2.h
6872	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(5L<<8)	bnx2.h
6873	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(6L<<8)	bnx2.h
6874	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(7L<<8)	bnx2.h
6875	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(8L<<8)	bnx2.h
6876	BNX2_HC_VIS_DMA_STAT_STATE_WAIT	(9L<<8)	bnx2.h
6877	BNX2_HC_VIS_DMA_STAT_STATE_ABOR	(15L<<8)	bnx2.h
6878	BNX2_HC_VIS_DMA_MSI_STATE	(0x7L<<12)	bnx2.h
6879	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0x3L<<15)	bnx2.h
6880	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0L<<15)	bnx2.h
6881	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(1L<<15)	bnx2.h
6882	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(2L<<15)	bnx2.h
6883	BNX2_HC_VIS_1	0x0000690c	bnx2.h
6884	BNX2_HC_VIS_1_HW_INTACK_STATE	(1L<<4)	bnx2.h
6885	BNX2_HC_VIS_1_HW_INTACK_STATE_I	(0L<<4)	bnx2.h
6886	BNX2_HC_VIS_1_HW_INTACK_STATE_C	(1L<<4)	bnx2.h
6887	BNX2_HC_VIS_1_SW_INTACK_STATE	(1L<<5)	bnx2.h
6888	BNX2_HC_VIS_1_SW_INTACK_STATE_I	(0L<<5)	bnx2.h
6889	BNX2_HC_VIS_1_SW_INTACK_STATE_C	(1L<<5)	bnx2.h
6890	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
6891	BNX2_HC_VIS_1_DURING_SW_INTACK_	(0L<<6)	bnx2.h
6892	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
6893	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
6894	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(0L<<7)	bnx2.h
6895	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
6896	BNX2_HC_VIS_1_RAM_RD_ARB_STATE	(0xfL<<17)	bnx2.h
6897	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(0L<<17)	bnx2.h
6898	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(1L<<17)	bnx2.h
6899	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(2L<<17)	bnx2.h
6900	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(3L<<17)	bnx2.h
6901	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(4L<<17)	bnx2.h
6902	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(5L<<17)	bnx2.h
6903	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(6L<<17)	bnx2.h
6904	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(7L<<17)	bnx2.h
6905	BNX2_HC_VIS_1_RAM_WR_ARB_STATE	(0x3L<<21)	bnx2.h
6906	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(0L<<21)	bnx2.h
6907	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(1L<<21)	bnx2.h
6908	BNX2_HC_VIS_1_INT_GEN_STATE	(1L<<23)	bnx2.h
6909	BNX2_HC_VIS_1_INT_GEN_STATE_DLE	(0L<<23)	bnx2.h
6910	BNX2_HC_VIS_1_INT_GEN_STATE_NTE	(1L<<23)	bnx2.h
6911	BNX2_HC_VIS_1_STAT_CHAN_ID	(0x7L<<24)	bnx2.h
6912	BNX2_HC_VIS_1_INT_B	(1L<<27)	bnx2.h
6913	BNX2_HC_DEBUG_VECT_PEEK	0x00006910	bnx2.h
6914	BNX2_HC_DEBUG_VECT_PEEK_1_VALUE	(0x7ffL<<0)	bnx2.h
6915	BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_	(1L<<11)	bnx2.h
6916	BNX2_HC_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
6917	BNX2_HC_DEBUG_VECT_PEEK_2_VALUE	(0x7ffL<<16)	bnx2.h
6918	BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_	(1L<<27)	bnx2.h
6919	BNX2_HC_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
6920	BNX2_TXP_CPU_MODE	0x00045000	bnx2.h
6921	BNX2_TXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
6922	BNX2_TXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
6923	BNX2_TXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
6924	BNX2_TXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
6925	BNX2_TXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
6926	BNX2_TXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
6927	BNX2_TXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
6928	BNX2_TXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
6929	BNX2_TXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
6930	BNX2_TXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
6931	BNX2_TXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
6932	BNX2_TXP_CPU_STATE	0x00045004	bnx2.h
6933	BNX2_TXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
6934	BNX2_TXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
6935	BNX2_TXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
6936	BNX2_TXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
6937	BNX2_TXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
6938	BNX2_TXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
6939	BNX2_TXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
6940	BNX2_TXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
6941	BNX2_TXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
6942	BNX2_TXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
6943	BNX2_TXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
6944	BNX2_TXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
6945	BNX2_TXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
6946	BNX2_TXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
6947	BNX2_TXP_CPU_EVENT_MASK	0x00045008	bnx2.h
6948	BNX2_TXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
6949	BNX2_TXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
6950	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
6951	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
6952	BNX2_TXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
6953	BNX2_TXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
6954	BNX2_TXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
6955	BNX2_TXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
6956	BNX2_TXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
6957	BNX2_TXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
6958	BNX2_TXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
6959	BNX2_TXP_CPU_PROGRAM_COUNTER	0x0004501c	bnx2.h
6960	BNX2_TXP_CPU_INSTRUCTION	0x00045020	bnx2.h
6961	BNX2_TXP_CPU_DATA_ACCESS	0x00045024	bnx2.h
6962	BNX2_TXP_CPU_INTERRUPT_ENABLE	0x00045028	bnx2.h
6963	BNX2_TXP_CPU_INTERRUPT_VECTOR	0x0004502c	bnx2.h
6964	BNX2_TXP_CPU_INTERRUPT_SAVED_PC	0x00045030	bnx2.h
6965	BNX2_TXP_CPU_HW_BREAKPOINT	0x00045034	bnx2.h
6966	BNX2_TXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
6967	BNX2_TXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
6968	BNX2_TXP_CPU_DEBUG_VECT_PEEK	0x00045038	bnx2.h
6969	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
6970	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
6971	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
6972	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
6973	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
6974	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
6975	BNX2_TXP_CPU_LAST_BRANCH_ADDR	0x00045048	bnx2.h
6976	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
6977	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
6978	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
6979	BNX2_TXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
6980	BNX2_TXP_CPU_REG_FILE	0x00045200	bnx2.h
6981	BNX2_TXP_FTQ_DATA	0x000453c0	bnx2.h
6982	BNX2_TXP_FTQ_CMD	0x000453f8	bnx2.h
6983	BNX2_TXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
6984	BNX2_TXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
6985	BNX2_TXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
6986	BNX2_TXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
6987	BNX2_TXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
6988	BNX2_TXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
6989	BNX2_TXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
6990	BNX2_TXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
6991	BNX2_TXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
6992	BNX2_TXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
6993	BNX2_TXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
6994	BNX2_TXP_FTQ_CTL	0x000453fc	bnx2.h
6995	BNX2_TXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
6996	BNX2_TXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
6997	BNX2_TXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
6998	BNX2_TXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
6999	BNX2_TXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7000	BNX2_TXP_SCRATCH	0x00060000	bnx2.h
7001	BNX2_TPAT_CPU_MODE	0x00085000	bnx2.h
7002	BNX2_TPAT_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
7003	BNX2_TPAT_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
7004	BNX2_TPAT_CPU_MODE_PAGE_0_DATA_	(1L<<2)	bnx2.h
7005	BNX2_TPAT_CPU_MODE_PAGE_0_INST_	(1L<<3)	bnx2.h
7006	BNX2_TPAT_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
7007	BNX2_TPAT_CPU_MODE_INTERRUPT_EN	(1L<<7)	bnx2.h
7008	BNX2_TPAT_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
7009	BNX2_TPAT_CPU_MODE_BAD_DATA_HAL	(1L<<11)	bnx2.h
7010	BNX2_TPAT_CPU_MODE_BAD_INST_HAL	(1L<<12)	bnx2.h
7011	BNX2_TPAT_CPU_MODE_FIO_ABORT_HA	(1L<<13)	bnx2.h
7012	BNX2_TPAT_CPU_MODE_SPAD_UNDERFL	(1L<<15)	bnx2.h
7013	BNX2_TPAT_CPU_STATE	0x00085004	bnx2.h
7014	BNX2_TPAT_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
7015	BNX2_TPAT_CPU_STATE_BAD_INST_HA	(1L<<2)	bnx2.h
7016	BNX2_TPAT_CPU_STATE_PAGE_0_DATA	(1L<<3)	bnx2.h
7017	BNX2_TPAT_CPU_STATE_PAGE_0_INST	(1L<<4)	bnx2.h
7018	BNX2_TPAT_CPU_STATE_BAD_DATA_AD	(1L<<5)	bnx2.h
7019	BNX2_TPAT_CPU_STATE_BAD_pc_HALT	(1L<<6)	bnx2.h
7020	BNX2_TPAT_CPU_STATE_ALIGN_HALTE	(1L<<7)	bnx2.h
7021	BNX2_TPAT_CPU_STATE_FIO_ABORT_H	(1L<<8)	bnx2.h
7022	BNX2_TPAT_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
7023	BNX2_TPAT_CPU_STATE_SPAD_UNDERF	(1L<<11)	bnx2.h
7024	BNX2_TPAT_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
7025	BNX2_TPAT_CPU_STATE_DATA_ACCESS	(1L<<14)	bnx2.h
7026	BNX2_TPAT_CPU_STATE_INST_FETCH_	(1L<<15)	bnx2.h
7027	BNX2_TPAT_CPU_STATE_BLOCKED_REA	(1L<<31)	bnx2.h
7028	BNX2_TPAT_CPU_EVENT_MASK	0x00085008	bnx2.h
7029	BNX2_TPAT_CPU_EVENT_MASK_BREAKP	(1L<<0)	bnx2.h
7030	BNX2_TPAT_CPU_EVENT_MASK_BAD_IN	(1L<<2)	bnx2.h
7031	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<3)	bnx2.h
7032	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<4)	bnx2.h
7033	BNX2_TPAT_CPU_EVENT_MASK_BAD_DA	(1L<<5)	bnx2.h
7034	BNX2_TPAT_CPU_EVENT_MASK_BAD_PC	(1L<<6)	bnx2.h
7035	BNX2_TPAT_CPU_EVENT_MASK_ALIGN_	(1L<<7)	bnx2.h
7036	BNX2_TPAT_CPU_EVENT_MASK_FIO_AB	(1L<<8)	bnx2.h
7037	BNX2_TPAT_CPU_EVENT_MASK_SOFT_H	(1L<<10)	bnx2.h
7038	BNX2_TPAT_CPU_EVENT_MASK_SPAD_U	(1L<<11)	bnx2.h
7039	BNX2_TPAT_CPU_EVENT_MASK_INTERR	(1L<<12)	bnx2.h
7040	BNX2_TPAT_CPU_PROGRAM_COUNTER	0x0008501c	bnx2.h
7041	BNX2_TPAT_CPU_INSTRUCTION	0x00085020	bnx2.h
7042	BNX2_TPAT_CPU_DATA_ACCESS	0x00085024	bnx2.h
7043	BNX2_TPAT_CPU_INTERRUPT_ENABLE	0x00085028	bnx2.h
7044	BNX2_TPAT_CPU_INTERRUPT_VECTOR	0x0008502c	bnx2.h
7045	BNX2_TPAT_CPU_INTERRUPT_SAVED_P	0x00085030	bnx2.h
7046	BNX2_TPAT_CPU_HW_BREAKPOINT	0x00085034	bnx2.h
7047	BNX2_TPAT_CPU_HW_BREAKPOINT_DIS	(1L<<0)	bnx2.h
7048	BNX2_TPAT_CPU_HW_BREAKPOINT_ADD	(0x3fffffffL<<2)	bnx2.h
7049	BNX2_TPAT_CPU_DEBUG_VECT_PEEK	0x00085038	bnx2.h
7050	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0x7ffL<<0)	bnx2.h
7051	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(1L<<11)	bnx2.h
7052	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0xfL<<12)	bnx2.h
7053	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0x7ffL<<16)	bnx2.h
7054	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(1L<<27)	bnx2.h
7055	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0xfL<<28)	bnx2.h
7056	BNX2_TPAT_CPU_LAST_BRANCH_ADDR	0x00085048	bnx2.h
7057	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
7058	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0L<<1)	bnx2.h
7059	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
7060	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0x3fffffffL<<2)	bnx2.h
7061	BNX2_TPAT_CPU_REG_FILE	0x00085200	bnx2.h
7062	BNX2_TPAT_FTQ_DATA	0x000853c0	bnx2.h
7063	BNX2_TPAT_FTQ_CMD	0x000853f8	bnx2.h
7064	BNX2_TPAT_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7065	BNX2_TPAT_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7066	BNX2_TPAT_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7067	BNX2_TPAT_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7068	BNX2_TPAT_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7069	BNX2_TPAT_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7070	BNX2_TPAT_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7071	BNX2_TPAT_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7072	BNX2_TPAT_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
7073	BNX2_TPAT_FTQ_CMD_POP	(1L<<30)	bnx2.h
7074	BNX2_TPAT_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7075	BNX2_TPAT_FTQ_CTL	0x000853fc	bnx2.h
7076	BNX2_TPAT_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7077	BNX2_TPAT_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7078	BNX2_TPAT_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
7079	BNX2_TPAT_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7080	BNX2_TPAT_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7081	BNX2_TPAT_SCRATCH	0x000a0000	bnx2.h
7082	BNX2_RXP_CPU_MODE	0x000c5000	bnx2.h
7083	BNX2_RXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
7084	BNX2_RXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
7085	BNX2_RXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
7086	BNX2_RXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
7087	BNX2_RXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
7088	BNX2_RXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
7089	BNX2_RXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
7090	BNX2_RXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
7091	BNX2_RXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
7092	BNX2_RXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
7093	BNX2_RXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
7094	BNX2_RXP_CPU_STATE	0x000c5004	bnx2.h
7095	BNX2_RXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
7096	BNX2_RXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
7097	BNX2_RXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
7098	BNX2_RXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
7099	BNX2_RXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
7100	BNX2_RXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
7101	BNX2_RXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
7102	BNX2_RXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
7103	BNX2_RXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
7104	BNX2_RXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
7105	BNX2_RXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
7106	BNX2_RXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
7107	BNX2_RXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
7108	BNX2_RXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
7109	BNX2_RXP_CPU_EVENT_MASK	0x000c5008	bnx2.h
7110	BNX2_RXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
7111	BNX2_RXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
7112	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
7113	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
7114	BNX2_RXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
7115	BNX2_RXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
7116	BNX2_RXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
7117	BNX2_RXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
7118	BNX2_RXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
7119	BNX2_RXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
7120	BNX2_RXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
7121	BNX2_RXP_CPU_PROGRAM_COUNTER	0x000c501c	bnx2.h
7122	BNX2_RXP_CPU_INSTRUCTION	0x000c5020	bnx2.h
7123	BNX2_RXP_CPU_DATA_ACCESS	0x000c5024	bnx2.h
7124	BNX2_RXP_CPU_INTERRUPT_ENABLE	0x000c5028	bnx2.h
7125	BNX2_RXP_CPU_INTERRUPT_VECTOR	0x000c502c	bnx2.h
7126	BNX2_RXP_CPU_INTERRUPT_SAVED_PC	0x000c5030	bnx2.h
7127	BNX2_RXP_CPU_HW_BREAKPOINT	0x000c5034	bnx2.h
7128	BNX2_RXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
7129	BNX2_RXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
7130	BNX2_RXP_CPU_DEBUG_VECT_PEEK	0x000c5038	bnx2.h
7131	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
7132	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
7133	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
7134	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
7135	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
7136	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
7137	BNX2_RXP_CPU_LAST_BRANCH_ADDR	0x000c5048	bnx2.h
7138	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
7139	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
7140	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
7141	BNX2_RXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
7142	BNX2_RXP_CPU_REG_FILE	0x000c5200	bnx2.h
7143	BNX2_RXP_CFTQ_DATA	0x000c5380	bnx2.h
7144	BNX2_RXP_CFTQ_CMD	0x000c53b8	bnx2.h
7145	BNX2_RXP_CFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7146	BNX2_RXP_CFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7147	BNX2_RXP_CFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7148	BNX2_RXP_CFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7149	BNX2_RXP_CFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7150	BNX2_RXP_CFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7151	BNX2_RXP_CFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7152	BNX2_RXP_CFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7153	BNX2_RXP_CFTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
7154	BNX2_RXP_CFTQ_CMD_POP	(1L<<30)	bnx2.h
7155	BNX2_RXP_CFTQ_CMD_BUSY	(1L<<31)	bnx2.h
7156	BNX2_RXP_CFTQ_CTL	0x000c53bc	bnx2.h
7157	BNX2_RXP_CFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7158	BNX2_RXP_CFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7159	BNX2_RXP_CFTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
7160	BNX2_RXP_CFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7161	BNX2_RXP_CFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7162	BNX2_RXP_FTQ_DATA	0x000c53c0	bnx2.h
7163	BNX2_RXP_FTQ_CMD	0x000c53f8	bnx2.h
7164	BNX2_RXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7165	BNX2_RXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7166	BNX2_RXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7167	BNX2_RXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7168	BNX2_RXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7169	BNX2_RXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7170	BNX2_RXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
7171	BNX2_RXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7172	BNX2_RXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
7173	BNX2_RXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
7174	BNX2_RXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7175	BNX2_RXP_FTQ_CTL	0x000c53fc	bnx2.h
7176	BNX2_RXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7177	BNX2_RXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7178	BNX2_RXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
7179	BNX2_RXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7180	BNX2_RXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7181	BNX2_RXP_SCRATCH	0x000e0000	bnx2.h
7182	BNX2_COM_CPU_MODE	0x00105000	bnx2.h
7183	BNX2_COM_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
7184	BNX2_COM_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
7185	BNX2_COM_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
7186	BNX2_COM_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
7187	BNX2_COM_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
7188	BNX2_COM_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
7189	BNX2_COM_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
7190	BNX2_COM_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
7191	BNX2_COM_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
7192	BNX2_COM_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
7193	BNX2_COM_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
7194	BNX2_COM_CPU_STATE	0x00105004	bnx2.h
7195	BNX2_COM_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
7196	BNX2_COM_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
7197	BNX2_COM_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
7198	BNX2_COM_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
7199	BNX2_COM_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
7200	BNX2_COM_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
7201	BNX2_COM_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
7202	BNX2_COM_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
7203	BNX2_COM_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
7204	BNX2_COM_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
7205	BNX2_COM_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
7206	BNX2_COM_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
7207	BNX2_COM_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
7208	BNX2_COM_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
7209	BNX2_COM_CPU_EVENT_MASK	0x00105008	bnx2.h
7210	BNX2_COM_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
7211	BNX2_COM_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
7212	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
7213	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
7214	BNX2_COM_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
7215	BNX2_COM_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
7216	BNX2_COM_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
7217	BNX2_COM_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
7218	BNX2_COM_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
7219	BNX2_COM_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
7220	BNX2_COM_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
7221	BNX2_COM_CPU_PROGRAM_COUNTER	0x0010501c	bnx2.h
7222	BNX2_COM_CPU_INSTRUCTION	0x00105020	bnx2.h
7223	BNX2_COM_CPU_DATA_ACCESS	0x00105024	bnx2.h
7224	BNX2_COM_CPU_INTERRUPT_ENABLE	0x00105028	bnx2.h
7225	BNX2_COM_CPU_INTERRUPT_VECTOR	0x0010502c	bnx2.h
7226	BNX2_COM_CPU_INTERRUPT_SAVED_PC	0x00105030	bnx2.h
7227	BNX2_COM_CPU_HW_BREAKPOINT	0x00105034	bnx2.h
7228	BNX2_COM_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
7229	BNX2_COM_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
7230	BNX2_COM_CPU_DEBUG_VECT_PEEK	0x00105038	bnx2.h
7231	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
7232	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
7233	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
7234	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
7235	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
7236	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
7237	BNX2_COM_CPU_LAST_BRANCH_ADDR	0x00105048	bnx2.h
7238	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
7239	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
7240	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
7241	BNX2_COM_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
7242	BNX2_COM_CPU_REG_FILE	0x00105200	bnx2.h
7243	BNX2_COM_COMXQ_FTQ_DATA	0x00105340	bnx2.h
7244	BNX2_COM_COMXQ_FTQ_CMD	0x00105378	bnx2.h
7245	BNX2_COM_COMXQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7246	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7247	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7248	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7249	BNX2_COM_COMXQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
7250	BNX2_COM_COMXQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7251	BNX2_COM_COMXQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
7252	BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7253	BNX2_COM_COMXQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
7254	BNX2_COM_COMXQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
7255	BNX2_COM_COMXQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7256	BNX2_COM_COMXQ_FTQ_CTL	0x0010537c	bnx2.h
7257	BNX2_COM_COMXQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
7258	BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7259	BNX2_COM_COMXQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
7260	BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
7261	BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
7262	BNX2_COM_COMTQ_FTQ_DATA	0x00105380	bnx2.h
7263	BNX2_COM_COMTQ_FTQ_CMD	0x001053b8	bnx2.h
7264	BNX2_COM_COMTQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7265	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7266	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7267	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7268	BNX2_COM_COMTQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
7269	BNX2_COM_COMTQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7270	BNX2_COM_COMTQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
7271	BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7272	BNX2_COM_COMTQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
7273	BNX2_COM_COMTQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
7274	BNX2_COM_COMTQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7275	BNX2_COM_COMTQ_FTQ_CTL	0x001053bc	bnx2.h
7276	BNX2_COM_COMTQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
7277	BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7278	BNX2_COM_COMTQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
7279	BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
7280	BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
7281	BNX2_COM_COMQ_FTQ_DATA	0x001053c0	bnx2.h
7282	BNX2_COM_COMQ_FTQ_CMD	0x001053f8	bnx2.h
7283	BNX2_COM_COMQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7284	BNX2_COM_COMQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7285	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7286	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7287	BNX2_COM_COMQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7288	BNX2_COM_COMQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7289	BNX2_COM_COMQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
7290	BNX2_COM_COMQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7291	BNX2_COM_COMQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
7292	BNX2_COM_COMQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
7293	BNX2_COM_COMQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7294	BNX2_COM_COMQ_FTQ_CTL	0x001053fc	bnx2.h
7295	BNX2_COM_COMQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7296	BNX2_COM_COMQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7297	BNX2_COM_COMQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
7298	BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7299	BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7300	BNX2_COM_SCRATCH	0x00120000	bnx2.h
7301	BNX2_CP_CPU_MODE	0x00185000	bnx2.h
7302	BNX2_CP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
7303	BNX2_CP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
7304	BNX2_CP_CPU_MODE_PAGE_0_DATA_EN	(1L<<2)	bnx2.h
7305	BNX2_CP_CPU_MODE_PAGE_0_INST_EN	(1L<<3)	bnx2.h
7306	BNX2_CP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
7307	BNX2_CP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
7308	BNX2_CP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
7309	BNX2_CP_CPU_MODE_BAD_DATA_HALT_	(1L<<11)	bnx2.h
7310	BNX2_CP_CPU_MODE_BAD_INST_HALT_	(1L<<12)	bnx2.h
7311	BNX2_CP_CPU_MODE_FIO_ABORT_HALT	(1L<<13)	bnx2.h
7312	BNX2_CP_CPU_MODE_SPAD_UNDERFLOW	(1L<<15)	bnx2.h
7313	BNX2_CP_CPU_STATE	0x00185004	bnx2.h
7314	BNX2_CP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
7315	BNX2_CP_CPU_STATE_BAD_INST_HALT	(1L<<2)	bnx2.h
7316	BNX2_CP_CPU_STATE_PAGE_0_DATA_H	(1L<<3)	bnx2.h
7317	BNX2_CP_CPU_STATE_PAGE_0_INST_H	(1L<<4)	bnx2.h
7318	BNX2_CP_CPU_STATE_BAD_DATA_ADDR	(1L<<5)	bnx2.h
7319	BNX2_CP_CPU_STATE_BAD_pc_HALTED	(1L<<6)	bnx2.h
7320	BNX2_CP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
7321	BNX2_CP_CPU_STATE_FIO_ABORT_HAL	(1L<<8)	bnx2.h
7322	BNX2_CP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
7323	BNX2_CP_CPU_STATE_SPAD_UNDERFLO	(1L<<11)	bnx2.h
7324	BNX2_CP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
7325	BNX2_CP_CPU_STATE_DATA_ACCESS_S	(1L<<14)	bnx2.h
7326	BNX2_CP_CPU_STATE_INST_FETCH_ST	(1L<<15)	bnx2.h
7327	BNX2_CP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
7328	BNX2_CP_CPU_EVENT_MASK	0x00185008	bnx2.h
7329	BNX2_CP_CPU_EVENT_MASK_BREAKPOI	(1L<<0)	bnx2.h
7330	BNX2_CP_CPU_EVENT_MASK_BAD_INST	(1L<<2)	bnx2.h
7331	BNX2_CP_CPU_EVENT_MASK_PAGE_0_D	(1L<<3)	bnx2.h
7332	BNX2_CP_CPU_EVENT_MASK_PAGE_0_I	(1L<<4)	bnx2.h
7333	BNX2_CP_CPU_EVENT_MASK_BAD_DATA	(1L<<5)	bnx2.h
7334	BNX2_CP_CPU_EVENT_MASK_BAD_PC_H	(1L<<6)	bnx2.h
7335	BNX2_CP_CPU_EVENT_MASK_ALIGN_HA	(1L<<7)	bnx2.h
7336	BNX2_CP_CPU_EVENT_MASK_FIO_ABOR	(1L<<8)	bnx2.h
7337	BNX2_CP_CPU_EVENT_MASK_SOFT_HAL	(1L<<10)	bnx2.h
7338	BNX2_CP_CPU_EVENT_MASK_SPAD_UND	(1L<<11)	bnx2.h
7339	BNX2_CP_CPU_EVENT_MASK_INTERRUP	(1L<<12)	bnx2.h
7340	BNX2_CP_CPU_PROGRAM_COUNTER	0x0018501c	bnx2.h
7341	BNX2_CP_CPU_INSTRUCTION	0x00185020	bnx2.h
7342	BNX2_CP_CPU_DATA_ACCESS	0x00185024	bnx2.h
7343	BNX2_CP_CPU_INTERRUPT_ENABLE	0x00185028	bnx2.h
7344	BNX2_CP_CPU_INTERRUPT_VECTOR	0x0018502c	bnx2.h
7345	BNX2_CP_CPU_INTERRUPT_SAVED_PC	0x00185030	bnx2.h
7346	BNX2_CP_CPU_HW_BREAKPOINT	0x00185034	bnx2.h
7347	BNX2_CP_CPU_HW_BREAKPOINT_DISAB	(1L<<0)	bnx2.h
7348	BNX2_CP_CPU_HW_BREAKPOINT_ADDRE	(0x3fffffffL<<2)	bnx2.h
7349	BNX2_CP_CPU_DEBUG_VECT_PEEK	0x00185038	bnx2.h
7350	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_V	(0x7ffL<<0)	bnx2.h
7351	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_P	(1L<<11)	bnx2.h
7352	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_S	(0xfL<<12)	bnx2.h
7353	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_V	(0x7ffL<<16)	bnx2.h
7354	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_P	(1L<<27)	bnx2.h
7355	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_S	(0xfL<<28)	bnx2.h
7356	BNX2_CP_CPU_LAST_BRANCH_ADDR	0x00185048	bnx2.h
7357	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
7358	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(0L<<1)	bnx2.h
7359	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
7360	BNX2_CP_CPU_LAST_BRANCH_ADDR_LB	(0x3fffffffL<<2)	bnx2.h
7361	BNX2_CP_CPU_REG_FILE	0x00185200	bnx2.h
7362	BNX2_CP_CPQ_FTQ_DATA	0x001853c0	bnx2.h
7363	BNX2_CP_CPQ_FTQ_CMD	0x001853f8	bnx2.h
7364	BNX2_CP_CPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7365	BNX2_CP_CPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7366	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7367	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7368	BNX2_CP_CPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7369	BNX2_CP_CPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7370	BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVE	(1L<<27)	bnx2.h
7371	BNX2_CP_CPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7372	BNX2_CP_CPQ_FTQ_CMD_INTERVENE_C	(1L<<29)	bnx2.h
7373	BNX2_CP_CPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
7374	BNX2_CP_CPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7375	BNX2_CP_CPQ_FTQ_CTL	0x001853fc	bnx2.h
7376	BNX2_CP_CPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7377	BNX2_CP_CPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7378	BNX2_CP_CPQ_FTQ_CTL_FORCE_INTER	(1L<<2)	bnx2.h
7379	BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7380	BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7381	BNX2_CP_SCRATCH	0x001a0000	bnx2.h
7382	BNX2_MCP_CPU_MODE	0x00145000	bnx2.h
7383	BNX2_MCP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
7384	BNX2_MCP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
7385	BNX2_MCP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
7386	BNX2_MCP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
7387	BNX2_MCP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
7388	BNX2_MCP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
7389	BNX2_MCP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
7390	BNX2_MCP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
7391	BNX2_MCP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
7392	BNX2_MCP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
7393	BNX2_MCP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
7394	BNX2_MCP_CPU_STATE	0x00145004	bnx2.h
7395	BNX2_MCP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
7396	BNX2_MCP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
7397	BNX2_MCP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
7398	BNX2_MCP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
7399	BNX2_MCP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
7400	BNX2_MCP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
7401	BNX2_MCP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
7402	BNX2_MCP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
7403	BNX2_MCP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
7404	BNX2_MCP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
7405	BNX2_MCP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
7406	BNX2_MCP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
7407	BNX2_MCP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
7408	BNX2_MCP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
7409	BNX2_MCP_CPU_EVENT_MASK	0x00145008	bnx2.h
7410	BNX2_MCP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
7411	BNX2_MCP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
7412	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
7413	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
7414	BNX2_MCP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
7415	BNX2_MCP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
7416	BNX2_MCP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
7417	BNX2_MCP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
7418	BNX2_MCP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
7419	BNX2_MCP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
7420	BNX2_MCP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
7421	BNX2_MCP_CPU_PROGRAM_COUNTER	0x0014501c	bnx2.h
7422	BNX2_MCP_CPU_INSTRUCTION	0x00145020	bnx2.h
7423	BNX2_MCP_CPU_DATA_ACCESS	0x00145024	bnx2.h
7424	BNX2_MCP_CPU_INTERRUPT_ENABLE	0x00145028	bnx2.h
7425	BNX2_MCP_CPU_INTERRUPT_VECTOR	0x0014502c	bnx2.h
7426	BNX2_MCP_CPU_INTERRUPT_SAVED_PC	0x00145030	bnx2.h
7427	BNX2_MCP_CPU_HW_BREAKPOINT	0x00145034	bnx2.h
7428	BNX2_MCP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
7429	BNX2_MCP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
7430	BNX2_MCP_CPU_DEBUG_VECT_PEEK	0x00145038	bnx2.h
7431	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
7432	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
7433	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
7434	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
7435	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
7436	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
7437	BNX2_MCP_CPU_LAST_BRANCH_ADDR	0x00145048	bnx2.h
7438	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
7439	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
7440	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
7441	BNX2_MCP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
7442	BNX2_MCP_CPU_REG_FILE	0x00145200	bnx2.h
7443	BNX2_MCP_MCPQ_FTQ_DATA	0x001453c0	bnx2.h
7444	BNX2_MCP_MCPQ_FTQ_CMD	0x001453f8	bnx2.h
7445	BNX2_MCP_MCPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
7446	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
7447	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
7448	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
7449	BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
7450	BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
7451	BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
7452	BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
7453	BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
7454	BNX2_MCP_MCPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
7455	BNX2_MCP_MCPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
7456	BNX2_MCP_MCPQ_FTQ_CTL	0x001453fc	bnx2.h
7457	BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
7458	BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
7459	BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
7460	BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
7461	BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
7462	BNX2_MCP_ROM	0x00150000	bnx2.h
7463	BNX2_MCP_SCRATCH	0x00160000	bnx2.h
7464	BNX2_SHM_HDR_SIGNATURE	BNX2_MCP_SCRATCH	bnx2.h
7465	BNX2_SHM_HDR_SIGNATURE_SIG_MASK	0xffff0000	bnx2.h
7466	BNX2_SHM_HDR_SIGNATURE_SIG	0x53530000	bnx2.h
7467	BNX2_SHM_HDR_SIGNATURE_VER_MASK	0x000000ff	bnx2.h
7468	BNX2_SHM_HDR_SIGNATURE_VER_ONE	0x00000001	bnx2.h
7469	BNX2_SHM_HDR_ADDR_0	BNX2_MCP_SCRATCH + 4	bnx2.h
7470	BNX2_SHM_HDR_ADDR_1	BNX2_MCP_SCRATCH + 8	bnx2.h
7471	NUM_MC_HASH_REGISTERS	8	bnx2.h
7472	PHY_BCM5706_PHY_ID	0x00206160	bnx2.h
7473	BCM5708S_UP1	0xb	bnx2.h
7474	BCM5708S_UP1_2G5	0x1	bnx2.h
7475	BCM5708S_BLK_ADDR	0x1f	bnx2.h
7476	BCM5708S_BLK_ADDR_DIG	0x0000	bnx2.h
7477	BCM5708S_BLK_ADDR_DIG3	0x0002	bnx2.h
7478	BCM5708S_BLK_ADDR_TX_MISC	0x0005	bnx2.h
7479	BCM5708S_1000X_CTL1	0x10	bnx2.h
7480	BCM5708S_1000X_CTL1_FIBER_MODE	0x0001	bnx2.h
7481	BCM5708S_1000X_CTL1_AUTODET_EN	0x0010	bnx2.h
7482	BCM5708S_1000X_CTL2	0x11	bnx2.h
7483	BCM5708S_1000X_CTL2_PLLEL_DET_E	0x0001	bnx2.h
7484	BCM5708S_1000X_STAT1	0x14	bnx2.h
7485	BCM5708S_1000X_STAT1_SGMII	0x0001	bnx2.h
7486	BCM5708S_1000X_STAT1_LINK	0x0002	bnx2.h
7487	BCM5708S_1000X_STAT1_FD	0x0004	bnx2.h
7488	BCM5708S_1000X_STAT1_SPEED_MASK	0x0018	bnx2.h
7489	BCM5708S_1000X_STAT1_SPEED_10	0x0000	bnx2.h
7490	BCM5708S_1000X_STAT1_SPEED_100	0x0008	bnx2.h
7491	BCM5708S_1000X_STAT1_SPEED_1G	0x0010	bnx2.h
7492	BCM5708S_1000X_STAT1_SPEED_2G5	0x0018	bnx2.h
7493	BCM5708S_1000X_STAT1_TX_PAUSE	0x0020	bnx2.h
7494	BCM5708S_1000X_STAT1_RX_PAUSE	0x0040	bnx2.h
7495	BCM5708S_DIG_3_0	0x10	bnx2.h
7496	BCM5708S_DIG_3_0_USE_IEEE	0x0001	bnx2.h
7497	BCM5708S_TX_ACTL1	0x15	bnx2.h
7498	BCM5708S_TX_ACTL1_DRIVER_VCM	0x30	bnx2.h
7499	BCM5708S_TX_ACTL3	0x17	bnx2.h
7500	MIN_ETHERNET_PACKET_SIZE	60	bnx2.h
7501	MAX_ETHERNET_PACKET_SIZE	1514	bnx2.h
7502	MAX_ETHERNET_JUMBO_PACKET_SIZE	9014	bnx2.h
7503	RX_COPY_THRESH	92	bnx2.h
7504	DMA_READ_CHANS	5	bnx2.h
7505	DMA_WRITE_CHANS	3	bnx2.h
7506	BCM_PAGE_BITS	12	bnx2.h
7507	BCM_PAGE_SIZE	(1 << BCM_PAGE_BITS)	bnx2.h
7508	TX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct tx_bd))	bnx2.h
7509	MAX_TX_DESC_CNT	(TX_DESC_CNT - 1)	bnx2.h
7510	MAX_RX_RINGS	4	bnx2.h
7511	RX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct rx_bd))	bnx2.h
7512	MAX_RX_DESC_CNT	(RX_DESC_CNT - 1)	bnx2.h
7513	MAX_TOTAL_RX_DESC_CNT	(MAX_RX_DESC_CNT * MAX_RX_RINGS)	bnx2.h
7514	CTX_SHIFT	7	bnx2.h
7515	CTX_SIZE	(1 << CTX_SHIFT)	bnx2.h
7516	CTX_MASK	(CTX_SIZE - 1)	bnx2.h
7517	PHY_CTX_SHIFT	6	bnx2.h
7518	PHY_CTX_SIZE	(1 << PHY_CTX_SHIFT)	bnx2.h
7519	PHY_CTX_MASK	(PHY_CTX_SIZE - 1)	bnx2.h
7520	MB_KERNEL_CTX_SHIFT	8	bnx2.h
7521	MB_KERNEL_CTX_SIZE	(1 << MB_KERNEL_CTX_SHIFT)	bnx2.h
7522	MB_KERNEL_CTX_MASK	(MB_KERNEL_CTX_SIZE - 1)	bnx2.h
7523	MAX_CID_CNT	0x4000	bnx2.h
7524	MAX_CID_ADDR	(GET_CID_ADDR(MAX_CID_CNT))	bnx2.h
7525	INVALID_CID_ADDR	0xffffffff	bnx2.h
7526	TX_CID	16	bnx2.h
7527	RX_CID	0	bnx2.h
7528	MB_TX_CID_ADDR	MB_GET_CID_ADDR(TX_CID)	bnx2.h
7529	MB_RX_CID_ADDR	MB_GET_CID_ADDR(RX_CID)	bnx2.h
7530	SEEPROM_PAGE_BITS	2	bnx2.h
7531	SEEPROM_PHY_PAGE_SIZE	(1 << SEEPROM_PAGE_BITS)	bnx2.h
7532	SEEPROM_BYTE_ADDR_MASK	(SEEPROM_PHY_PAGE_SIZE-1)	bnx2.h
7533	SEEPROM_PAGE_SIZE	4	bnx2.h
7534	SEEPROM_TOTAL_SIZE	65536	bnx2.h
7535	BUFFERED_FLASH_PAGE_BITS	9	bnx2.h
7536	BUFFERED_FLASH_PHY_PAGE_SIZE	(1 << BUFFERED_FLASH_PAGE_BITS)	bnx2.h
7537	BUFFERED_FLASH_BYTE_ADDR_MASK	(BUFFERED_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
7538	BUFFERED_FLASH_PAGE_SIZE	264	bnx2.h
7539	BUFFERED_FLASH_TOTAL_SIZE	0x21000	bnx2.h
7540	SAIFUN_FLASH_PAGE_BITS	8	bnx2.h
7541	SAIFUN_FLASH_PHY_PAGE_SIZE	(1 << SAIFUN_FLASH_PAGE_BITS)	bnx2.h
7542	SAIFUN_FLASH_BYTE_ADDR_MASK	(SAIFUN_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
7543	SAIFUN_FLASH_PAGE_SIZE	256	bnx2.h
7544	SAIFUN_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
7545	ST_MICRO_FLASH_PAGE_BITS	8	bnx2.h
7546	ST_MICRO_FLASH_PHY_PAGE_SIZE	(1 << ST_MICRO_FLASH_PAGE_BITS)	bnx2.h
7547	ST_MICRO_FLASH_BYTE_ADDR_MASK	(ST_MICRO_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
7548	ST_MICRO_FLASH_PAGE_SIZE	256	bnx2.h
7549	ST_MICRO_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
7550	NVRAM_TIMEOUT_COUNT	30000	bnx2.h
7551	FLASH_STRAP_MASK	(BNX2_NVM_CFG1_FLASH_MODE \| \ BNX2_NVM_CFG1_BUFFER_MODE \| \ BNX2_NVM_CFG1_PROTECT_MODE \| \ BNX2_NVM_CFG1_FLASH_SIZE)	bnx2.h
7552	FLASH_BACKUP_STRAP_MASK	(0xf << 26)	bnx2.h
7553	RV2P_PROC1	0	bnx2.h
7554	RV2P_PROC2	1	bnx2.h
7555	DRV_PULSE_PERIOD_MS	250	bnx2.h
7556	FW_ACK_TIME_OUT_MS	100	bnx2.h
7557	BNX2_DRV_RESET_SIGNATURE	0x00000000	bnx2.h
7558	BNX2_DRV_RESET_SIGNATURE_MAGIC	0x4841564b	bnx2.h	HAVK
7559	BNX2_DRV_MB	0x00000004	bnx2.h
7560	BNX2_DRV_MSG_CODE	0xff000000	bnx2.h
7561	BNX2_DRV_MSG_CODE_RESET	0x01000000	bnx2.h
7562	BNX2_DRV_MSG_CODE_UNLOAD	0x02000000	bnx2.h
7563	BNX2_DRV_MSG_CODE_SHUTDOWN	0x03000000	bnx2.h
7564	BNX2_DRV_MSG_CODE_SUSPEND_WOL	0x04000000	bnx2.h
7565	BNX2_DRV_MSG_CODE_FW_TIMEOUT	0x05000000	bnx2.h
7566	BNX2_DRV_MSG_CODE_PULSE	0x06000000	bnx2.h
7567	BNX2_DRV_MSG_CODE_DIAG	0x07000000	bnx2.h
7568	BNX2_DRV_MSG_CODE_SUSPEND_NO_WO	0x09000000	bnx2.h
7569	BNX2_DRV_MSG_DATA	0x00ff0000	bnx2.h
7570	BNX2_DRV_MSG_DATA_WAIT0	0x00010000	bnx2.h
7571	BNX2_DRV_MSG_DATA_WAIT1	0x00020000	bnx2.h
7572	BNX2_DRV_MSG_DATA_WAIT2	0x00030000	bnx2.h
7573	BNX2_DRV_MSG_DATA_WAIT3	0x00040000	bnx2.h
7574	BNX2_DRV_MSG_SEQ	0x0000ffff	bnx2.h
7575	BNX2_FW_MB	0x00000008	bnx2.h
7576	BNX2_FW_MSG_ACK	0x0000ffff	bnx2.h
7577	BNX2_FW_MSG_STATUS_MASK	0x00ff0000	bnx2.h
7578	BNX2_FW_MSG_STATUS_OK	0x00000000	bnx2.h
7579	BNX2_FW_MSG_STATUS_FAILURE	0x00ff0000	bnx2.h
7580	BNX2_LINK_STATUS	0x0000000c	bnx2.h
7581	BNX2_LINK_STATUS_INIT_VALUE	0xffffffff	bnx2.h
7582	BNX2_LINK_STATUS_LINK_UP	0x1	bnx2.h
7583	BNX2_LINK_STATUS_LINK_DOWN	0x0	bnx2.h
7584	BNX2_LINK_STATUS_SPEED_MASK	0x1e	bnx2.h
7585	BNX2_LINK_STATUS_AN_INCOMPLETE	(0<<1)	bnx2.h
7586	BNX2_LINK_STATUS_10HALF	(1<<1)	bnx2.h
7587	BNX2_LINK_STATUS_10FULL	(2<<1)	bnx2.h
7588	BNX2_LINK_STATUS_100HALF	(3<<1)	bnx2.h
7589	BNX2_LINK_STATUS_100BASE_T4	(4<<1)	bnx2.h
7590	BNX2_LINK_STATUS_100FULL	(5<<1)	bnx2.h
7591	BNX2_LINK_STATUS_1000HALF	(6<<1)	bnx2.h
7592	BNX2_LINK_STATUS_1000FULL	(7<<1)	bnx2.h
7593	BNX2_LINK_STATUS_2500HALF	(8<<1)	bnx2.h
7594	BNX2_LINK_STATUS_2500FULL	(9<<1)	bnx2.h
7595	BNX2_LINK_STATUS_AN_ENABLED	(1<<5)	bnx2.h
7596	BNX2_LINK_STATUS_AN_COMPLETE	(1<<6)	bnx2.h
7597	BNX2_LINK_STATUS_PARALLEL_DET	(1<<7)	bnx2.h
7598	BNX2_LINK_STATUS_RESERVED	(1<<8)	bnx2.h
7599	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<9)	bnx2.h
7600	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<10)	bnx2.h
7601	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<11)	bnx2.h
7602	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<12)	bnx2.h
7603	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<13)	bnx2.h
7604	BNX2_LINK_STATUS_PARTNER_AD_10F	(1<<14)	bnx2.h
7605	BNX2_LINK_STATUS_PARTNER_AD_10H	(1<<15)	bnx2.h
7606	BNX2_LINK_STATUS_TX_FC_ENABLED	(1<<16)	bnx2.h
7607	BNX2_LINK_STATUS_RX_FC_ENABLED	(1<<17)	bnx2.h
7608	BNX2_LINK_STATUS_PARTNER_SYM_PA	(1<<18)	bnx2.h
7609	BNX2_LINK_STATUS_PARTNER_ASYM_P	(1<<19)	bnx2.h
7610	BNX2_LINK_STATUS_SERDES_LINK	(1<<20)	bnx2.h
7611	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<21)	bnx2.h
7612	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<22)	bnx2.h
7613	BNX2_DRV_PULSE_MB	0x00000010	bnx2.h
7614	BNX2_DRV_PULSE_SEQ_MASK	0x00007fff	bnx2.h
7615	BNX2_DRV_MSG_DATA_PULSE_CODE_AL	0x00080000	bnx2.h
7616	BNX2_DEV_INFO_SIGNATURE	0x00000020	bnx2.h
7617	BNX2_DEV_INFO_SIGNATURE_MAGIC	0x44564900	bnx2.h
7618	BNX2_DEV_INFO_SIGNATURE_MAGIC_M	0xffffff00	bnx2.h
7619	BNX2_DEV_INFO_FEATURE_CFG_VALID	0x01	bnx2.h
7620	BNX2_DEV_INFO_SECONDARY_PORT	0x80	bnx2.h
7621	BNX2_DEV_INFO_DRV_ALWAYS_ALIVE	0x40	bnx2.h
7622	BNX2_SHARED_HW_CFG_PART_NUM	0x00000024	bnx2.h
7623	BNX2_SHARED_HW_CFG_POWER_DISSIP	0x00000034	bnx2.h
7624	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff000000	bnx2.h
7625	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff0000	bnx2.h
7626	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff00	bnx2.h
7627	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff	bnx2.h
7628	BNX2_SHARED_HW_CFG	POWER_CONSUMED 0x00000038	bnx2.h
7629	BNX2_SHARED_HW_CFG_CONFIG	0x0000003c	bnx2.h
7630	BNX2_SHARED_HW_CFG_DESIGN_NIC	0	bnx2.h
7631	BNX2_SHARED_HW_CFG_DESIGN_LOM	0x1	bnx2.h
7632	BNX2_SHARED_HW_CFG_PHY_COPPER	0	bnx2.h
7633	BNX2_SHARED_HW_CFG_PHY_FIBER	0x2	bnx2.h
7634	BNX2_SHARED_HW_CFG_PHY_2_5G	0x20	bnx2.h
7635	BNX2_SHARED_HW_CFG_PHY_BACKPLAN	0x40	bnx2.h
7636	BNX2_SHARED_HW_CFG_LED_MODE_SHI	8	bnx2.h
7637	BNX2_SHARED_HW_CFG_LED_MODE_MAS	0x300	bnx2.h
7638	BNX2_SHARED_HW_CFG_LED_MODE_MAC	0	bnx2.h
7639	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x100	bnx2.h
7640	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x200	bnx2.h
7641	BNX2_SHARED_HW_CFG_CONFIG2	0x00000040	bnx2.h
7642	BNX2_SHARED_HW_CFG2_NVM_SIZE_MA	0x00fff000	bnx2.h
7643	BNX2_DEV_INFO_BC_REV	0x0000004c	bnx2.h
7644	BNX2_PORT_HW_CFG_MAC_UPPER	0x00000050	bnx2.h
7645	BNX2_PORT_HW_CFG_UPPERMAC_MASK	0xffff	bnx2.h
7646	BNX2_PORT_HW_CFG_MAC_LOWER	0x00000054	bnx2.h
7647	BNX2_PORT_HW_CFG_CONFIG	0x00000058	bnx2.h
7648	BNX2_PORT_HW_CFG_CFG_TXCTL3_MAS	0x0000ffff	bnx2.h
7649	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x001f0000	bnx2.h
7650	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00000000	bnx2.h
7651	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00030000	bnx2.h
7652	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00040000	bnx2.h
7653	BNX2_PORT_HW_CFG_IMD_MAC_A_UPPE	0x00000068	bnx2.h
7654	BNX2_PORT_HW_CFG_IMD_MAC_A_LOWE	0x0000006c	bnx2.h
7655	BNX2_PORT_HW_CFG_IMD_MAC_B_UPPE	0x00000070	bnx2.h
7656	BNX2_PORT_HW_CFG_IMD_MAC_B_LOWE	0x00000074	bnx2.h
7657	BNX2_PORT_HW_CFG_ISCSI_MAC_UPPE	0x00000078	bnx2.h
7658	BNX2_PORT_HW_CFG_ISCSI_MAC_LOWE	0x0000007c	bnx2.h
7659	BNX2_DEV_INFO_PER_PORT_HW_CONFI	0x000000b4	bnx2.h
7660	BNX2_DEV_INFO_FORMAT_REV	0x000000c4	bnx2.h
7661	BNX2_DEV_INFO_FORMAT_REV_MASK	0xff000000	bnx2.h
7662	BNX2_DEV_INFO_FORMAT_REV_ID	('A' << 24)	bnx2.h
7663	BNX2_SHARED_FEATURE	0x000000c8	bnx2.h
7664	BNX2_SHARED_FEATURE_MASK	0xffffffff	bnx2.h
7665	BNX2_PORT_FEATURE	0x000000d8	bnx2.h
7666	BNX2_PORT2_FEATURE	0x00000014c	bnx2.h
7667	BNX2_PORT_FEATURE_WOL_ENABLED	0x01000000	bnx2.h
7668	BNX2_PORT_FEATURE_MBA_ENABLED	0x02000000	bnx2.h
7669	BNX2_PORT_FEATURE_ASF_ENABLED	0x04000000	bnx2.h
7670	BNX2_PORT_FEATURE_IMD_ENABLED	0x08000000	bnx2.h
7671	BNX2_PORT_FEATURE_BAR1_SIZE_MAS	0xf	bnx2.h
7672	BNX2_PORT_FEATURE_BAR1_SIZE_DIS	0x0	bnx2.h
7673	BNX2_PORT_FEATURE_BAR1_SIZE_64K	0x1	bnx2.h
7674	BNX2_PORT_FEATURE_BAR1_SIZE_128	0x2	bnx2.h
7675	BNX2_PORT_FEATURE_BAR1_SIZE_256	0x3	bnx2.h
7676	BNX2_PORT_FEATURE_BAR1_SIZE_512	0x4	bnx2.h
7677	BNX2_PORT_FEATURE_BAR1_SIZE_1M	0x5	bnx2.h
7678	BNX2_PORT_FEATURE_BAR1_SIZE_2M	0x6	bnx2.h
7679	BNX2_PORT_FEATURE_BAR1_SIZE_4M	0x7	bnx2.h
7680	BNX2_PORT_FEATURE_BAR1_SIZE_8M	0x8	bnx2.h
7681	BNX2_PORT_FEATURE_BAR1_SIZE_16M	0x9	bnx2.h
7682	BNX2_PORT_FEATURE_BAR1_SIZE_32M	0xa	bnx2.h
7683	BNX2_PORT_FEATURE_BAR1_SIZE_64M	0xb	bnx2.h
7684	BNX2_PORT_FEATURE_BAR1_SIZE_128	0xc	bnx2.h
7685	BNX2_PORT_FEATURE_BAR1_SIZE_256	0xd	bnx2.h
7686	BNX2_PORT_FEATURE_BAR1_SIZE_512	0xe	bnx2.h
7687	BNX2_PORT_FEATURE_BAR1_SIZE_1G	0xf	bnx2.h
7688	BNX2_PORT_FEATURE_WOL	0xdc	bnx2.h
7689	BNX2_PORT2_FEATURE_WOL	0x150	bnx2.h
7690	BNX2_PORT_FEATURE_WOL_DEFAULT_S	4	bnx2.h
7691	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
7692	BNX2_PORT_FEATURE_WOL_DEFAULT_D	0	bnx2.h
7693	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x10	bnx2.h
7694	BNX2_PORT_FEATURE_WOL_DEFAULT_A	0x20	bnx2.h
7695	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
7696	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0xf	bnx2.h
7697	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0	bnx2.h
7698	BNX2_PORT_FEATURE_WOL_LINK_SPEE	1	bnx2.h
7699	BNX2_PORT_FEATURE_WOL_LINK_SPEE	2	bnx2.h
7700	BNX2_PORT_FEATURE_WOL_LINK_SPEE	3	bnx2.h
7701	BNX2_PORT_FEATURE_WOL_LINK_SPEE	4	bnx2.h
7702	BNX2_PORT_FEATURE_WOL_LINK_SPEE	5	bnx2.h
7703	BNX2_PORT_FEATURE_WOL_LINK_SPEE	6	bnx2.h
7704	BNX2_PORT_FEATURE_WOL_AUTONEG_A	0x40	bnx2.h
7705	BNX2_PORT_FEATURE_WOL_RESERVED_	0x400	bnx2.h
7706	BNX2_PORT_FEATURE_WOL_RESERVED_	0x800	bnx2.h
7707	BNX2_PORT_FEATURE_MBA	0xe0	bnx2.h
7708	BNX2_PORT2_FEATURE_MBA	0x154	bnx2.h
7709	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
7710	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0x3	bnx2.h
7711	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
7712	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	1	bnx2.h
7713	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	2	bnx2.h
7714	BNX2_PORT_FEATURE_MBA_LINK_SPEE	2	bnx2.h
7715	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x3c	bnx2.h
7716	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0	bnx2.h
7717	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x4	bnx2.h
7718	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x8	bnx2.h
7719	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0xc	bnx2.h
7720	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x10	bnx2.h
7721	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x14	bnx2.h
7722	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x18	bnx2.h
7723	BNX2_PORT_FEATURE_MBA_SETUP_PRO	0x40	bnx2.h
7724	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0	bnx2.h
7725	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0x80	bnx2.h
7726	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	8	bnx2.h
7727	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xff00	bnx2.h
7728	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0	bnx2.h
7729	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x100	bnx2.h
7730	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x200	bnx2.h
7731	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x300	bnx2.h
7732	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x400	bnx2.h
7733	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x500	bnx2.h
7734	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x600	bnx2.h
7735	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x700	bnx2.h
7736	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x800	bnx2.h
7737	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x900	bnx2.h
7738	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xa00	bnx2.h
7739	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xb00	bnx2.h
7740	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xc00	bnx2.h
7741	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xd00	bnx2.h
7742	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xe00	bnx2.h
7743	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xf00	bnx2.h
7744	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	16	bnx2.h
7745	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	0xf0000	bnx2.h
7746	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	20	bnx2.h
7747	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
7748	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0	bnx2.h
7749	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x100000	bnx2.h
7750	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x200000	bnx2.h
7751	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
7752	BNX2_PORT_FEATURE_IMD	0xe4	bnx2.h
7753	BNX2_PORT2_FEATURE_IMD	0x158	bnx2.h
7754	BNX2_PORT_FEATURE_IMD_LINK_OVER	0	bnx2.h
7755	BNX2_PORT_FEATURE_IMD_LINK_OVER	1	bnx2.h
7756	BNX2_PORT_FEATURE_VLAN	0xe8	bnx2.h
7757	BNX2_PORT2_FEATURE_VLAN	0x15c	bnx2.h
7758	BNX2_PORT_FEATURE_MBA_VLAN_TAG_	0xffff	bnx2.h
7759	BNX2_PORT_FEATURE_MBA_VLAN_ENAB	0x10000	bnx2.h
7760	BNX2_BC_STATE_RESET_TYPE	0x000001c0	bnx2.h
7761	BNX2_BC_STATE_RESET_TYPE_SIG	0x00005254	bnx2.h
7762	BNX2_BC_STATE_RESET_TYPE_SIG_MA	0x0000ffff	bnx2.h
7763	BNX2_BC_STATE_RESET_TYPE_NONE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00010000)	bnx2.h
7764	BNX2_BC_STATE_RESET_TYPE_PCI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00020000)	bnx2.h
7765	BNX2_BC_STATE_RESET_TYPE_VAUX	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00030000)	bnx2.h
7766	BNX2_BC_STATE_RESET_TYPE_DRV_MA	DRV_MSG_CODE	bnx2.h
7767	BNX2_BC_STATE_RESET_TYPE_DRV_RE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_RESET)	bnx2.h
7768	BNX2_BC_STATE_RESET_TYPE_DRV_UN	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_UNLOAD)	bnx2.h
7769	BNX2_BC_STATE_RESET_TYPE_DRV_SH	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_SHUTDOWN)	bnx2.h
7770	BNX2_BC_STATE_RESET_TYPE_DRV_WO	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_WOL)	bnx2.h
7771	BNX2_BC_STATE_RESET_TYPE_DRV_DI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_DIAG)	bnx2.h
7772	BNX2_BC_STATE	0x000001c4	bnx2.h
7773	BNX2_BC_STATE_ERR_MASK	0x0000ff00	bnx2.h
7774	BNX2_BC_STATE_SIGN	0x42530000	bnx2.h
7775	BNX2_BC_STATE_SIGN_MASK	0xffff0000	bnx2.h
7776	BNX2_BC_STATE_BC1_START	(BNX2_BC_STATE_SIGN \| 0x1)	bnx2.h
7777	BNX2_BC_STATE_GET_NVM_CFG1	(BNX2_BC_STATE_SIGN \| 0x2)	bnx2.h
7778	BNX2_BC_STATE_PROG_BAR	(BNX2_BC_STATE_SIGN \| 0x3)	bnx2.h
7779	BNX2_BC_STATE_INIT_VID	(BNX2_BC_STATE_SIGN \| 0x4)	bnx2.h
7780	BNX2_BC_STATE_GET_NVM_CFG2	(BNX2_BC_STATE_SIGN \| 0x5)	bnx2.h
7781	BNX2_BC_STATE_APPLY_WKARND	(BNX2_BC_STATE_SIGN \| 0x6)	bnx2.h
7782	BNX2_BC_STATE_LOAD_BC2	(BNX2_BC_STATE_SIGN \| 0x7)	bnx2.h
7783	BNX2_BC_STATE_GOING_BC2	(BNX2_BC_STATE_SIGN \| 0x8)	bnx2.h
7784	BNX2_BC_STATE_GOING_DIAG	(BNX2_BC_STATE_SIGN \| 0x9)	bnx2.h
7785	BNX2_BC_STATE_RT_FINAL_INIT	(BNX2_BC_STATE_SIGN \| 0x81)	bnx2.h
7786	BNX2_BC_STATE_RT_WKARND	(BNX2_BC_STATE_SIGN \| 0x82)	bnx2.h
7787	BNX2_BC_STATE_RT_DRV_PULSE	(BNX2_BC_STATE_SIGN \| 0x83)	bnx2.h
7788	BNX2_BC_STATE_RT_FIOEVTS	(BNX2_BC_STATE_SIGN \| 0x84)	bnx2.h
7789	BNX2_BC_STATE_RT_DRV_CMD	(BNX2_BC_STATE_SIGN \| 0x85)	bnx2.h
7790	BNX2_BC_STATE_RT_LOW_POWER	(BNX2_BC_STATE_SIGN \| 0x86)	bnx2.h
7791	BNX2_BC_STATE_RT_SET_WOL	(BNX2_BC_STATE_SIGN \| 0x87)	bnx2.h
7792	BNX2_BC_STATE_RT_OTHER_FW	(BNX2_BC_STATE_SIGN \| 0x88)	bnx2.h
7793	BNX2_BC_STATE_RT_GOING_D3	(BNX2_BC_STATE_SIGN \| 0x89)	bnx2.h
7794	BNX2_BC_STATE_ERR_BAD_VERSION	(BNX2_BC_STATE_SIGN \| 0x0100)	bnx2.h
7795	BNX2_BC_STATE_ERR_BAD_BC2_CRC	(BNX2_BC_STATE_SIGN \| 0x0200)	bnx2.h
7796	BNX2_BC_STATE_ERR_BC1_LOOP	(BNX2_BC_STATE_SIGN \| 0x0300)	bnx2.h
7797	BNX2_BC_STATE_ERR_UNKNOWN_CMD	(BNX2_BC_STATE_SIGN \| 0x0400)	bnx2.h
7798	BNX2_BC_STATE_ERR_DRV_DEAD	(BNX2_BC_STATE_SIGN \| 0x0500)	bnx2.h
7799	BNX2_BC_STATE_ERR_NO_RXP	(BNX2_BC_STATE_SIGN \| 0x0600)	bnx2.h
7800	BNX2_BC_STATE_ERR_TOO_MANY_RBUF	(BNX2_BC_STATE_SIGN \| 0x0700)	bnx2.h
7801	BNX2_BC_STATE_DEBUG_CMD	0x1dc	bnx2.h
7802	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0x42440000	bnx2.h
7803	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0xffff0000	bnx2.h
7804	BNX2_BC_STATE_BC_DBG_CMD_LOOP_C	0xffff	bnx2.h
7805	BNX2_BC_STATE_BC_DBG_CMD_LOOP_I	0xffff	bnx2.h
7806	HOST_VIEW_SHMEM_BASE	0x167c00	bnx2.h
7807	AUTONEG_DISABLE	0x00	bnx2.h
7808	AUTONEG_ENABLE	0x01	bnx2.h
7809	RX_OFFSET	(sizeof(struct l2_fhdr) + 2)	bnx2.h
7810	RX_BUF_CNT	20	bnx2.h
7811	RX_BUF_USE_SIZE	(ETH_MAX_MTU + ETH_HLEN + RX_OFFSET + 8)	bnx2.h
7812	RX_BUF_SIZE	(L1_CACHE_ALIGN(RX_BUF_USE_SIZE + 8))	bnx2.h
7813	PP_ChipID	0x0000	cs89x0.h	offset 0h -> Corp -ID
7814	PP_ISAIOB	0x0020	cs89x0.h	IO base address
7815	PP_CS8900_ISAINT	0x0022	cs89x0.h	ISA interrupt select
7816	PP_CS8920_ISAINT	0x0370	cs89x0.h	ISA interrupt select
7817	PP_CS8900_ISADMA	0x0024	cs89x0.h	ISA Rec DMA channel
7818	PP_CS8920_ISADMA	0x0374	cs89x0.h	ISA Rec DMA channel
7819	PP_ISASOF	0x0026	cs89x0.h	ISA DMA offset
7820	PP_DmaFrameCnt	0x0028	cs89x0.h	ISA DMA Frame count
7821	PP_DmaByteCnt	0x002A	cs89x0.h	ISA DMA Byte count
7822	PP_CS8900_ISAMemB	0x002C	cs89x0.h	Memory base
7823	PP_CS8920_ISAMemB	0x0348	cs89x0.h
7824	PP_ISABootBase	0x0030	cs89x0.h	Boot Prom base
7825	PP_ISABootMask	0x0034	cs89x0.h	Boot Prom Mask
7826	PP_EECMD	0x0040	cs89x0.h	NVR Interface Command register
7827	PP_EEData	0x0042	cs89x0.h	NVR Interface Data Register
7828	PP_DebugReg	0x0044	cs89x0.h	Debug Register
7829	PP_RxCFG	0x0102	cs89x0.h	Rx Bus config
7830	PP_RxCTL	0x0104	cs89x0.h	Receive Control Register
7831	PP_TxCFG	0x0106	cs89x0.h	Transmit Config Register
7832	PP_TxCMD	0x0108	cs89x0.h	Transmit Command Register
7833	PP_BufCFG	0x010A	cs89x0.h	Bus configuration Register
7834	PP_LineCTL	0x0112	cs89x0.h	Line Config Register
7835	PP_SelfCTL	0x0114	cs89x0.h	Self Command Register
7836	PP_BusCTL	0x0116	cs89x0.h	ISA bus control Register
7837	PP_TestCTL	0x0118	cs89x0.h	Test Register
7838	PP_AutoNegCTL	0x011C	cs89x0.h	Auto Negotiation Ctrl
7839	PP_ISQ	0x0120	cs89x0.h	Interrupt Status
7840	PP_RxEvent	0x0124	cs89x0.h	Rx Event Register
7841	PP_TxEvent	0x0128	cs89x0.h	Tx Event Register
7842	PP_BufEvent	0x012C	cs89x0.h	Bus Event Register
7843	PP_RxMiss	0x0130	cs89x0.h	Receive Miss Count
7844	PP_TxCol	0x0132	cs89x0.h	Transmit Collision Count
7845	PP_LineST	0x0134	cs89x0.h	Line State Register
7846	PP_SelfST	0x0136	cs89x0.h	Self State register
7847	PP_BusST	0x0138	cs89x0.h	Bus Status
7848	PP_TDR	0x013C	cs89x0.h	Time Domain Reflectometry
7849	PP_AutoNegST	0x013E	cs89x0.h	Auto Neg Status
7850	PP_TxCommand	0x0144	cs89x0.h	Tx Command
7851	PP_TxLength	0x0146	cs89x0.h	Tx Length
7852	PP_LAF	0x0150	cs89x0.h	Hash Table
7853	PP_IA	0x0158	cs89x0.h	Physical Address Register
7854	PP_RxStatus	0x0400	cs89x0.h	Receive start of frame
7855	PP_RxLength	0x0402	cs89x0.h	Receive Length of frame
7856	PP_RxFrame	0x0404	cs89x0.h	Receive frame pointer
7857	PP_TxFrame	0x0A00	cs89x0.h	Transmit frame pointer
7858	DEFAULTIOBASE	0x0300	cs89x0.h
7859	FIRST_IO	0x020C	cs89x0.h	First I/O port to check
7860	LAST_IO	0x037C	cs89x0.h	Last I/O port to check (+10h)
7861	ADD_MASK	0x3000	cs89x0.h	Mask it use of the ADD_PORT register
7862	ADD_SIG	0x3000	cs89x0.h	Expected ID signature
7863	CHIP_EISA_ID_SIG	0x630E	cs89x0.h	Product ID Code for Crystal Chip (CS8900 spec 4.3)
7864	EISA_ID_SIG	0x4D24	cs89x0.h	IBM
7865	PART_NO_SIG	0x1010	cs89x0.h	IBM
7866	MONGOOSE_BIT	0x0000	cs89x0.h	IBM
7867	EISA_ID_SIG	0x630E	cs89x0.h	PnP Vendor ID (same as chip id for Crystal board)
7868	PART_NO_SIG	0x4000	cs89x0.h	ID code CS8920 board (PnP Vendor Product code)
7869	MONGOOSE_BIT	0x2000	cs89x0.h	PART_NO_SIG + MONGOOSE_BUT => ID of mongoose
7870	PRODUCT_ID_ADD	0x0002	cs89x0.h	Address of product ID
7871	REG_TYPE_MASK	0x001F	cs89x0.h
7872	ERSE_WR_ENBL	0x00F0	cs89x0.h
7873	ERSE_WR_DISABLE	0x0000	cs89x0.h
7874	RX_BUF_CFG	0x0003	cs89x0.h
7875	RX_CONTROL	0x0005	cs89x0.h
7876	TX_CFG	0x0007	cs89x0.h
7877	TX_COMMAND	0x0009	cs89x0.h
7878	BUF_CFG	0x000B	cs89x0.h
7879	LINE_CONTROL	0x0013	cs89x0.h
7880	SELF_CONTROL	0x0015	cs89x0.h
7881	BUS_CONTROL	0x0017	cs89x0.h
7882	TEST_CONTROL	0x0019	cs89x0.h
7883	RX_EVENT	0x0004	cs89x0.h
7884	TX_EVENT	0x0008	cs89x0.h
7885	BUF_EVENT	0x000C	cs89x0.h
7886	RX_MISS_COUNT	0x0010	cs89x0.h
7887	TX_COL_COUNT	0x0012	cs89x0.h
7888	LINE_STATUS	0x0014	cs89x0.h
7889	SELF_STATUS	0x0016	cs89x0.h
7890	BUS_STATUS	0x0018	cs89x0.h
7891	TDR	0x001C	cs89x0.h
7892	SKIP_1	0x0040	cs89x0.h
7893	RX_STREAM_ENBL	0x0080	cs89x0.h
7894	RX_OK_ENBL	0x0100	cs89x0.h
7895	RX_DMA_ONLY	0x0200	cs89x0.h
7896	AUTO_RX_DMA	0x0400	cs89x0.h
7897	BUFFER_CRC	0x0800	cs89x0.h
7898	RX_CRC_ERROR_ENBL	0x1000	cs89x0.h
7899	RX_RUNT_ENBL	0x2000	cs89x0.h
7900	RX_EXTRA_DATA_ENBL	0x4000	cs89x0.h
7901	RX_IA_HASH_ACCEPT	0x0040	cs89x0.h
7902	RX_PROM_ACCEPT	0x0080	cs89x0.h
7903	RX_OK_ACCEPT	0x0100	cs89x0.h
7904	RX_MULTCAST_ACCEPT	0x0200	cs89x0.h
7905	RX_IA_ACCEPT	0x0400	cs89x0.h
7906	RX_BROADCAST_ACCEPT	0x0800	cs89x0.h
7907	RX_BAD_CRC_ACCEPT	0x1000	cs89x0.h
7908	RX_RUNT_ACCEPT	0x2000	cs89x0.h
7909	RX_EXTRA_DATA_ACCEPT	0x4000	cs89x0.h
7910	RX_ALL_ACCEPT	(RX_PROM_ACCEPT\|RX_BAD_CRC_ACCEPT\|RX_RUNT_ACCEPT\|RX_EXTRA_DATA_ACCEPT)	cs89x0.h
7911	DEF_RX_ACCEPT	(RX_IA_ACCEPT \| RX_BROADCAST_ACCEPT \| RX_OK_ACCEPT)	cs89x0.h
7912	TX_LOST_CRS_ENBL	0x0040	cs89x0.h
7913	TX_SQE_ERROR_ENBL	0x0080	cs89x0.h
7914	TX_OK_ENBL	0x0100	cs89x0.h
7915	TX_LATE_COL_ENBL	0x0200	cs89x0.h
7916	TX_JBR_ENBL	0x0400	cs89x0.h
7917	TX_ANY_COL_ENBL	0x0800	cs89x0.h
7918	TX_16_COL_ENBL	0x8000	cs89x0.h
7919	TX_START_4_BYTES	0x0000	cs89x0.h
7920	TX_START_64_BYTES	0x0040	cs89x0.h
7921	TX_START_128_BYTES	0x0080	cs89x0.h
7922	TX_START_ALL_BYTES	0x00C0	cs89x0.h
7923	TX_FORCE	0x0100	cs89x0.h
7924	TX_ONE_COL	0x0200	cs89x0.h
7925	TX_TWO_PART_DEFF_DISABLE	0x0400	cs89x0.h
7926	TX_NO_CRC	0x1000	cs89x0.h
7927	TX_RUNT	0x2000	cs89x0.h
7928	GENERATE_SW_INTERRUPT	0x0040	cs89x0.h
7929	RX_DMA_ENBL	0x0080	cs89x0.h
7930	READY_FOR_TX_ENBL	0x0100	cs89x0.h
7931	TX_UNDERRUN_ENBL	0x0200	cs89x0.h
7932	RX_MISS_ENBL	0x0400	cs89x0.h
7933	RX_128_BYTE_ENBL	0x0800	cs89x0.h
7934	TX_COL_COUNT_OVRFLOW_ENBL	0x1000	cs89x0.h
7935	RX_MISS_COUNT_OVRFLOW_ENBL	0x2000	cs89x0.h
7936	RX_DEST_MATCH_ENBL	0x8000	cs89x0.h
7937	SERIAL_RX_ON	0x0040	cs89x0.h
7938	SERIAL_TX_ON	0x0080	cs89x0.h
7939	AUI_ONLY	0x0100	cs89x0.h
7940	AUTO_AUI_10BASET	0x0200	cs89x0.h
7941	MODIFIED_BACKOFF	0x0800	cs89x0.h
7942	NO_AUTO_POLARITY	0x1000	cs89x0.h
7943	TWO_PART_DEFDIS	0x2000	cs89x0.h
7944	LOW_RX_SQUELCH	0x4000	cs89x0.h
7945	POWER_ON_RESET	0x0040	cs89x0.h
7946	SW_STOP	0x0100	cs89x0.h
7947	SLEEP_ON	0x0200	cs89x0.h
7948	AUTO_WAKEUP	0x0400	cs89x0.h
7949	HCB0_ENBL	0x1000	cs89x0.h
7950	HCB1_ENBL	0x2000	cs89x0.h
7951	HCB0	0x4000	cs89x0.h
7952	HCB1	0x8000	cs89x0.h
7953	RESET_RX_DMA	0x0040	cs89x0.h
7954	MEMORY_ON	0x0400	cs89x0.h
7955	DMA_BURST_MODE	0x0800	cs89x0.h
7956	IO_CHANNEL_READY_ON	0x1000	cs89x0.h
7957	RX_DMA_SIZE_64K	0x2000	cs89x0.h
7958	ENABLE_IRQ	0x8000	cs89x0.h
7959	LINK_OFF	0x0080	cs89x0.h
7960	ENDEC_LOOPBACK	0x0200	cs89x0.h
7961	AUI_LOOPBACK	0x0400	cs89x0.h
7962	BACKOFF_OFF	0x0800	cs89x0.h
7963	FAST_TEST	0x8000	cs89x0.h
7964	RX_IA_HASHED	0x0040	cs89x0.h
7965	RX_DRIBBLE	0x0080	cs89x0.h
7966	RX_OK	0x0100	cs89x0.h
7967	RX_HASHED	0x0200	cs89x0.h
7968	RX_IA	0x0400	cs89x0.h
7969	RX_BROADCAST	0x0800	cs89x0.h
7970	RX_CRC_ERROR	0x1000	cs89x0.h
7971	RX_RUNT	0x2000	cs89x0.h
7972	RX_EXTRA_DATA	0x4000	cs89x0.h
7973	HASH_INDEX_MASK	0x0FC00	cs89x0.h
7974	TX_LOST_CRS	0x0040	cs89x0.h
7975	TX_SQE_ERROR	0x0080	cs89x0.h
7976	TX_OK	0x0100	cs89x0.h
7977	TX_LATE_COL	0x0200	cs89x0.h
7978	TX_JBR	0x0400	cs89x0.h
7979	TX_16_COL	0x8000	cs89x0.h
7980	TX_SEND_OK_BITS	(TX_OK\|TX_LOST_CRS)	cs89x0.h
7981	TX_COL_COUNT_MASK	0x7800	cs89x0.h
7982	SW_INTERRUPT	0x0040	cs89x0.h
7983	RX_DMA	0x0080	cs89x0.h
7984	READY_FOR_TX	0x0100	cs89x0.h
7985	TX_UNDERRUN	0x0200	cs89x0.h
7986	RX_MISS	0x0400	cs89x0.h
7987	RX_128_BYTE	0x0800	cs89x0.h
7988	TX_COL_OVRFLW	0x1000	cs89x0.h
7989	RX_MISS_OVRFLW	0x2000	cs89x0.h
7990	RX_DEST_MATCH	0x8000	cs89x0.h
7991	LINK_OK	0x0080	cs89x0.h
7992	AUI_ON	0x0100	cs89x0.h
7993	TENBASET_ON	0x0200	cs89x0.h
7994	POLARITY_OK	0x1000	cs89x0.h
7995	CRS_OK	0x4000	cs89x0.h
7996	ACTIVE_33V	0x0040	cs89x0.h
7997	INIT_DONE	0x0080	cs89x0.h
7998	SI_BUSY	0x0100	cs89x0.h
7999	EEPROM_PRESENT	0x0200	cs89x0.h
8000	EEPROM_OK	0x0400	cs89x0.h
8001	EL_PRESENT	0x0800	cs89x0.h
8002	EE_SIZE_64	0x1000	cs89x0.h
8003	TX_BID_ERROR	0x0080	cs89x0.h
8004	READY_FOR_TX_NOW	0x0100	cs89x0.h
8005	RE_NEG_NOW	0x0040	cs89x0.h
8006	ALLOW_FDX	0x0080	cs89x0.h
8007	AUTO_NEG_ENABLE	0x0100	cs89x0.h
8008	NLP_ENABLE	0x0200	cs89x0.h
8009	FORCE_FDX	0x8000	cs89x0.h
8010	AUTO_NEG_BITS	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE)	cs89x0.h
8011	AUTO_NEG_MASK	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE\|ALLOW_FDX\|RE_NEG_NOW)	cs89x0.h
8012	AUTO_NEG_BUSY	0x0080	cs89x0.h
8013	FLP_LINK	0x0100	cs89x0.h
8014	FLP_LINK_GOOD	0x0800	cs89x0.h
8015	LINK_FAULT	0x1000	cs89x0.h
8016	HDX_ACTIVE	0x4000	cs89x0.h
8017	FDX_ACTIVE	0x8000	cs89x0.h
8018	ISQ_RECEIVER_EVENT	0x04	cs89x0.h
8019	ISQ_TRANSMITTER_EVENT	0x08	cs89x0.h
8020	ISQ_BUFFER_EVENT	0x0c	cs89x0.h
8021	ISQ_RX_MISS_EVENT	0x10	cs89x0.h
8022	ISQ_TX_COL_EVENT	0x12	cs89x0.h
8023	ISQ_EVENT_MASK	0x003F	cs89x0.h	ISQ mask to find out type of event
8024	ISQ_HIST	16	cs89x0.h	small history buffer
8025	AUTOINCREMENT	0x8000	cs89x0.h	Bit mask to set bit-15 for autoincrement
8026	TXRXBUFSIZE	0x0600	cs89x0.h
8027	RXDMABUFSIZE	0x8000	cs89x0.h
8028	RXDMASIZE	0x4000	cs89x0.h
8029	TXRX_LENGTH_MASK	0x07FF	cs89x0.h
8030	RCV_WITH_RXON	1	cs89x0.h	Set SerRx ON
8031	RCV_COUNTS	2	cs89x0.h	Use Framecnt1
8032	RCV_PONG	4	cs89x0.h	Pong respondent
8033	RCV_DONG	8	cs89x0.h	Dong operation
8034	RCV_POLLING	0x10	cs89x0.h	Poll RxEvent
8035	RCV_ISQ	0x20	cs89x0.h	Use ISQ, int
8036	RCV_AUTO_DMA	0x100	cs89x0.h	Set AutoRxDMAE
8037	RCV_DMA	0x200	cs89x0.h	Set RxDMA only
8038	RCV_DMA_ALL	0x400	cs89x0.h	Copy all DMA'ed
8039	RCV_FIXED_DATA	0x800	cs89x0.h	Every frame same
8040	RCV_IO	0x1000	cs89x0.h	Use ISA IO only
8041	RCV_MEMORY	0x2000	cs89x0.h	Use ISA Memory
8042	RAM_SIZE	0x1000	cs89x0.h	The card has 4k bytes or RAM
8043	PKT_START	PP_TxFrame	cs89x0.h	Start of packet RAM
8044	RX_FRAME_PORT	0x0000	cs89x0.h
8045	TX_FRAME_PORT	RX_FRAME_PORT	cs89x0.h
8046	TX_CMD_PORT	0x0004	cs89x0.h
8047	TX_NOW	0x0000	cs89x0.h	Tx packet after 5 bytes copied
8048	TX_AFTER_381	0x0020	cs89x0.h	Tx packet after 381 bytes copied
8049	TX_AFTER_ALL	0x00C0	cs89x0.h	Tx packet after all bytes copied
8050	TX_LEN_PORT	0x0006	cs89x0.h
8051	ISQ_PORT	0x0008	cs89x0.h
8052	ADD_PORT	0x000A	cs89x0.h
8053	DATA_PORT	0x000C	cs89x0.h
8054	EEPROM_WRITE_EN	0x00F0	cs89x0.h
8055	EEPROM_WRITE_DIS	0x0000	cs89x0.h
8056	EEPROM_WRITE_CMD	0x0100	cs89x0.h
8057	EEPROM_READ_CMD	0x0200	cs89x0.h
8058	RBUF_EVENT_LOW	0	cs89x0.h	Low byte of RxEvent - status of received frame
8059	RBUF_EVENT_HIGH	1	cs89x0.h	High byte of RxEvent - status of received frame
8060	RBUF_LEN_LOW	2	cs89x0.h	Length of received data - low byte
8061	RBUF_LEN_HI	3	cs89x0.h	Length of received data - high byte
8062	RBUF_HEAD_LEN	4	cs89x0.h	Length of this header
8063	CHIP_READ	0x1	cs89x0.h	Used to mark state of the repins code (chip or dma)
8064	DMA_READ	0x2	cs89x0.h	Used to mark state of the repins code (chip or dma)
8065	BIOS_START_SEG	0x00000	cs89x0.h
8066	BIOS_OFFSET_INC	0x0010	cs89x0.h
8067	BIOS_START_SEG	0x0c000	cs89x0.h
8068	BIOS_OFFSET_INC	0x0200	cs89x0.h
8069	BIOS_LAST_OFFSET	0x0fc00	cs89x0.h
8070	ISA_CNF_OFFSET	0x6	cs89x0.h
8071	TX_CTL_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8900 eeprom
8072	AUTO_NEG_CNF_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8920 eeprom
8073	EE_FORCE_FDX	0x8000	cs89x0.h
8074	EE_NLP_ENABLE	0x0200	cs89x0.h
8075	EE_AUTO_NEG_ENABLE	0x0100	cs89x0.h
8076	EE_ALLOW_FDX	0x0080	cs89x0.h
8077	EE_AUTO_NEG_CNF_MASK	(EE_FORCE_FDX\|EE_NLP_ENABLE\|EE_AUTO_NEG_ENABLE\|EE_ALLOW_FDX)	cs89x0.h
8078	IMM_BIT	0x0040	cs89x0.h	ignore missing media
8079	ADAPTER_CNF_OFFSET	(AUTO_NEG_CNF_OFFSET + 2)	cs89x0.h
8080	A_CNF_10B_T	0x0001	cs89x0.h
8081	A_CNF_AUI	0x0002	cs89x0.h
8082	A_CNF_10B_2	0x0004	cs89x0.h
8083	A_CNF_MEDIA_TYPE	0x0060	cs89x0.h
8084	A_CNF_MEDIA_AUTO	0x0000	cs89x0.h
8085	A_CNF_MEDIA_10B_T	0x0020	cs89x0.h
8086	A_CNF_MEDIA_AUI	0x0040	cs89x0.h
8087	A_CNF_MEDIA_10B_2	0x0060	cs89x0.h
8088	A_CNF_DC_DC_POLARITY	0x0080	cs89x0.h
8089	A_CNF_NO_AUTO_POLARITY	0x2000	cs89x0.h
8090	A_CNF_LOW_RX_SQUELCH	0x4000	cs89x0.h
8091	A_CNF_EXTND_10B_2	0x8000	cs89x0.h
8092	PACKET_PAGE_OFFSET	0x8	cs89x0.h
8093	INT_NO_MASK	0x000F	cs89x0.h
8094	DMA_NO_MASK	0x0070	cs89x0.h
8095	ISA_DMA_SIZE	0x0200	cs89x0.h
8096	ISA_AUTO_RxDMA	0x0400	cs89x0.h
8097	ISA_RxDMA	0x0800	cs89x0.h
8098	DMA_BURST	0x1000	cs89x0.h
8099	STREAM_TRANSFER	0x2000	cs89x0.h
8100	ANY_ISA_DMA	(ISA_AUTO_RxDMA \| ISA_RxDMA)	cs89x0.h
8101	DMA_BASE	0x00	cs89x0.h	DMA controller base
8102	DMA_BASE_2	0x0C0	cs89x0.h	DMA controller base
8103	DMA_STAT	0x0D0	cs89x0.h	DMA controller status register
8104	DMA_MASK	0x0D4	cs89x0.h	DMA controller mask register
8105	DMA_MODE	0x0D6	cs89x0.h	DMA controller mode register
8106	DMA_RESETFF	0x0D8	cs89x0.h	DMA controller first/last flip flop
8107	DMA_DISABLE	0x04	cs89x0.h	Disable channel n
8108	DMA_ENABLE	0x00	cs89x0.h	Enable channel n
8109	DMA_RX_MODE	0x14	cs89x0.h
8110	DMA_TX_MODE	0x18	cs89x0.h
8111	DMA_SIZE	(16*1024)	cs89x0.h	Size of dma buffer - 16k
8112	CS8900	0x0000	cs89x0.h
8113	CS8920	0x4000	cs89x0.h
8114	CS8920M	0x6000	cs89x0.h
8115	REVISON_BITS	0x1F00	cs89x0.h
8116	EEVER_NUMBER	0x12	cs89x0.h
8117	CHKSUM_LEN	0x14	cs89x0.h
8118	CHKSUM_VAL	0x0000	cs89x0.h
8119	START_EEPROM_DATA	0x001c	cs89x0.h	Offset into eeprom for start of data
8120	IRQ_MAP_EEPROM_DATA	0x0046	cs89x0.h	Offset into eeprom for the IRQ map
8121	IRQ_MAP_LEN	0x0004	cs89x0.h	No of bytes to read for the IRQ map
8122	PNP_IRQ_FRMT	0x0022	cs89x0.h	PNP small item IRQ format
8123	CS8900_IRQ_MAP	0x1c20	cs89x0.h	This IRQ map is fixed
8124	CS8920_NO_INTS	0x0F	cs89x0.h	Max CS8920 interrupt select #
8125	PNP_ADD_PORT	0x0279	cs89x0.h
8126	PNP_WRITE_PORT	0x0A79	cs89x0.h
8127	GET_PNP_ISA_STRUCT	0x40	cs89x0.h
8128	PNP_ISA_STRUCT_LEN	0x06	cs89x0.h
8129	PNP_CSN_CNT_OFF	0x01	cs89x0.h
8130	PNP_RD_PORT_OFF	0x02	cs89x0.h
8131	PNP_FUNCTION_OK	0x00	cs89x0.h
8132	PNP_WAKE	0x03	cs89x0.h
8133	PNP_RSRC_DATA	0x04	cs89x0.h
8134	PNP_RSRC_READY	0x01	cs89x0.h
8135	PNP_STATUS	0x05	cs89x0.h
8136	PNP_ACTIVATE	0x30	cs89x0.h
8137	PNP_CNF_IO_H	0x60	cs89x0.h
8138	PNP_CNF_IO_L	0x61	cs89x0.h
8139	PNP_CNF_INT	0x70	cs89x0.h
8140	PNP_CNF_DMA	0x74	cs89x0.h
8141	PNP_CNF_MEM	0x48	cs89x0.h
8142	BIT0	1	cs89x0.h
8143	BIT15	0x8000	cs89x0.h
8144	PCI_VENDOR_SMC	0x10B8	epic100.h
8145	PCI_DEVICE_SMC_EPIC100	0x0005	epic100.h
8146	PCI_DEVICE_ID_NONE	0xFFFF	epic100.h
8147	CR_STOP_RX	(0x00000001)	epic100.h
8148	CR_START_RX	(0x00000002)	epic100.h
8149	CR_QUEUE_TX	(0x00000004)	epic100.h
8150	CR_QUEUE_RX	(0x00000008)	epic100.h
8151	CR_NEXTFRAME	(0x00000010)	epic100.h
8152	CR_STOP_TX_DMA	(0x00000020)	epic100.h
8153	CR_STOP_RX_DMA	(0x00000040)	epic100.h
8154	CR_TX_UGO	(0x00000080)	epic100.h
8155	INTR_RX_THR_STA	(0x00400000)	epic100.h	rx copy threshold status NI
8156	INTR_RX_BUFF_EMPTY	(0x00200000)	epic100.h	rx buffers empty. NI
8157	INTR_TX_IN_PROG	(0x00100000)	epic100.h	tx copy in progess. NI
8158	INTR_RX_IN_PROG	(0x00080000)	epic100.h	rx copy in progress. NI
8159	INTR_TXIDLE	(0x00040000)	epic100.h	tx idle. NI
8160	INTR_RXIDLE	(0x00020000)	epic100.h	rx idle. NI
8161	INTR_INTR_ACTIVE	(0x00010000)	epic100.h	Interrupt active. NI
8162	INTR_RX_STATUS_OK	(0x00008000)	epic100.h	rx status valid. NI
8163	INTR_PCI_TGT_ABT	(0x00004000)	epic100.h	PCI Target abort
8164	INTR_PCI_MASTER_ABT	(0x00002000)	epic100.h	PCI Master abort
8165	INTR_PCI_PARITY_ERR	(0x00001000)	epic100.h	PCI adress parity error
8166	INTR_PCI_DATA_ERR	(0x00000800)	epic100.h	PCI data parity error
8167	INTR_RX_THR_CROSSED	(0x00000400)	epic100.h	rx copy threshold crossed
8168	INTR_CNTFULL	(0x00000200)	epic100.h	Counter overflow
8169	INTR_TXUNDERRUN	(0x00000100)	epic100.h	tx underrun.
8170	INTR_TXEMPTY	(0x00000080)	epic100.h	tx queue empty
8171	INTR_TX_CH_COMPLETE	(0x00000040)	epic100.h	tx chain complete
8172	INTR_TXDONE	(0x00000020)	epic100.h	tx complete (w or w/o err)
8173	INTR_RXERROR	(0x00000010)	epic100.h	rx error (CRC)
8174	INTR_RXOVERFLOW	(0x00000008)	epic100.h	rx buffer overflow
8175	INTR_RX_QUEUE_EMPTY	(0x00000004)	epic100.h	rx queue empty.
8176	INTR_RXHEADER	(0x00000002)	epic100.h	header copy complete
8177	INTR_RXDONE	(0x00000001)	epic100.h	Receive copy complete
8178	INTR_CLEARINTR	(0x00007FFF)	epic100.h
8179	INTR_VALIDBITS	(0x007FFFFF)	epic100.h
8180	INTR_DISABLE	(0x00000000)	epic100.h
8181	INTR_CLEARERRS	(0x00007F18)	epic100.h
8182	INTR_ABNINTR	(INTR_CNTFULL \| INTR_TXUNDERRUN \| INTR_RXOVERFLOW)	epic100.h
8183	GC_SOFT_RESET	(0x00000001)	epic100.h
8184	GC_INTR_ENABLE	(0x00000002)	epic100.h
8185	GC_SOFT_INTR	(0x00000004)	epic100.h
8186	GC_POWER_DOWN	(0x00000008)	epic100.h
8187	GC_ONE_COPY	(0x00000010)	epic100.h
8188	GC_BIG_ENDIAN	(0x00000020)	epic100.h
8189	GC_RX_PREEMPT_TX	(0x00000040)	epic100.h
8190	GC_TX_PREEMPT_RX	(0x00000080)	epic100.h
8191	GC_RX_FIFO_THR_32	(0x00000000)	epic100.h
8192	GC_RX_FIFO_THR_64	(0x00000100)	epic100.h
8193	GC_RX_FIFO_THR_96	(0x00000200)	epic100.h
8194	GC_RX_FIFO_THR_128	(0x00000300)	epic100.h
8195	GC_MRC_MEM_READ	(0x00000000)	epic100.h
8196	GC_MRC_READ_MULT	(0x00000400)	epic100.h
8197	GC_MRC_READ_LINE	(0x00000800)	epic100.h
8198	GC_SOFTBIT0	(0x00001000)	epic100.h
8199	GC_SOFTBIT1	(0x00002000)	epic100.h
8200	GC_RESET_PHY	(0x00004000)	epic100.h
8201	RC_SAVE_ERRORED_PKT	(0x00000001)	epic100.h
8202	RC_SAVE_RUNT_FRAMES	(0x00000002)	epic100.h
8203	RC_RCV_BROADCAST	(0x00000004)	epic100.h
8204	RC_RCV_MULTICAST	(0x00000008)	epic100.h
8205	RC_RCV_INVERSE_PKT	(0x00000010)	epic100.h
8206	RC_PROMISCUOUS_MODE	(0x00000020)	epic100.h
8207	RC_MONITOR_MODE	(0x00000040)	epic100.h
8208	RC_EARLY_RCV_ENABLE	(0x00000080)	epic100.h
8209	RD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
8210	RD_LLFORM	(0x0002)	epic100.h	Frag list format
8211	RD_HDR_CPY	(0x0004)	epic100.h	Desc used for header copy
8212	TC_EARLY_TX_ENABLE	(0x00000001)	epic100.h
8213	TC_LM_NORMAL	(0x00000000)	epic100.h
8214	TC_LM_INTERNAL	(0x00000002)	epic100.h
8215	TC_LM_EXTERNAL	(0x00000004)	epic100.h
8216	TC_LM_FULL_DPX	(0x00000006)	epic100.h
8217	TX_SLOT_TIME	(0x00000078)	epic100.h
8218	TX_FIFO_THRESH	128	epic100.h	Rounded down to 4 byte units.
8219	RRING_PKT_INTACT	(0x0001)	epic100.h
8220	RRING_ALIGN_ERR	(0x0002)	epic100.h
8221	RRING_CRC_ERR	(0x0004)	epic100.h
8222	RRING_MISSED_PKT	(0x0008)	epic100.h
8223	RRING_MULTICAST	(0x0010)	epic100.h
8224	RRING_BROADCAST	(0x0020)	epic100.h
8225	RRING_RECEIVER_DISABLE	(0x0040)	epic100.h
8226	RRING_STATUS_VALID	(0x1000)	epic100.h
8227	RRING_FRAGLIST_ERR	(0x2000)	epic100.h
8228	RRING_HDR_COPIED	(0x4000)	epic100.h
8229	RRING_OWN	(0x8000)	epic100.h
8230	RRING_ERROR	(RRING_ALIGN_ERR\|RRING_CRC_ERR)	epic100.h
8231	TRING_PKT_INTACT	(0x0001)	epic100.h	pkt transmitted.
8232	TRING_PKT_NONDEFER	(0x0002)	epic100.h	pkt xmitted w/o deferring
8233	TRING_COLL	(0x0004)	epic100.h	pkt xmitted w collisions
8234	TRING_CARR	(0x0008)	epic100.h	carrier sense lost
8235	TRING_UNDERRUN	(0x0010)	epic100.h	DMA underrun
8236	TRING_HB_COLL	(0x0020)	epic100.h	Collision detect Heartbeat
8237	TRING_WIN_COLL	(0x0040)	epic100.h	out of window collision
8238	TRING_DEFERRED	(0x0080)	epic100.h	Deferring
8239	TRING_COLL_COUNT	(0x0F00)	epic100.h	collision counter (mask)
8240	TRING_COLL_EXCESS	(0x1000)	epic100.h	tx aborted: excessive colls
8241	TRING_OWN	(0x8000)	epic100.h	desc ownership bit
8242	TRING_ABORT	(TRING_COLL_EXCESS\|TRING_WIN_COLL\|TRING_UNDERRUN)	epic100.h
8243	TRING_ERROR	(TRING_DEFERRED\|TRING_WIN_COLL\|TRING_UNDERRUN\|TRING_CARR )	epic100.h	\|TRING_COLL
8244	TD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
8245	TD_LLFORM	(0x0002)	epic100.h	Frag list format
8246	TD_IAF	(0x0004)	epic100.h	Generate Interrupt after tx
8247	TD_NOCRC	(0x0008)	epic100.h	No CRC generated
8248	TD_LASTDESC	(0x0010)	epic100.h	Last desc for this frame
8249	EFAB_DUMMY_FIELD_LBN	0	etherfabric.h
8250	EFAB_DUMMY_FIELD_WIDTH	0	etherfabric.h
8251	EFAB_DWORD_0_LBN	0	etherfabric.h
8252	EFAB_DWORD_0_WIDTH	32	etherfabric.h
8253	EFAB_DWORD_1_LBN	32	etherfabric.h
8254	EFAB_DWORD_1_WIDTH	32	etherfabric.h
8255	EFAB_DWORD_2_LBN	64	etherfabric.h
8256	EFAB_DWORD_2_WIDTH	32	etherfabric.h
8257	EFAB_DWORD_3_LBN	96	etherfabric.h
8258	EFAB_DWORD_3_WIDTH	32	etherfabric.h
8259	EFAB_DWORD_FMT	"%08x"	etherfabric.h
8260	EFAB_QWORD_FMT	"%08x:%08x"	etherfabric.h
8261	EFAB_OWORD_FMT	"%08x:%08x:%08x:%08x"	etherfabric.h
8262	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD64	etherfabric.h
8263	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD64	etherfabric.h
8264	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO64	etherfabric.h
8265	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO64	etherfabric.h
8266	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES64	etherfabric.h
8267	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES64	etherfabric.h
8268	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD32	etherfabric.h
8269	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD32	etherfabric.h
8270	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO32	etherfabric.h
8271	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO32	etherfabric.h
8272	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES32	etherfabric.h
8273	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES32	etherfabric.h
8274	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD64	etherfabric.h
8275	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD64	etherfabric.h
8276	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD32	etherfabric.h
8277	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD32	etherfabric.h
8278	EFAB_POPULATE_OWORD_10	EFAB_POPULATE_OWORD	etherfabric.h
8279	EFAB_POPULATE_QWORD_10	EFAB_POPULATE_QWORD	etherfabric.h
8280	EFAB_POPULATE_DWORD_10	EFAB_POPULATE_DWORD	etherfabric.h
8281	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD64	etherfabric.h
8282	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD64	etherfabric.h
8283	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD32	etherfabric.h
8284	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD32	etherfabric.h
8285	DMA_ADDR_T_WIDTH	( 8 * sizeof ( dma_addr_t ) )	etherfabric.h
8286	EFAB_DMA_MAX_MASK	( ( DMA_ADDR_T_WIDTH == 64 ) ? \ ~( ( uint64_t ) 0 ) : ~( ( uint32_t ) 0 ) )	etherfabric.h
8287	dma_addr_t	unsigned long	etherfabric_nic.h
8288	EFAB_BUF_ALIGN	4096	etherfabric_nic.h
8289	EFAB_RXD_SIZE	512	etherfabric_nic.h
8290	EFAB_TXD_SIZE	512	etherfabric_nic.h
8291	EFAB_EVQ_SIZE	512	etherfabric_nic.h
8292	EFAB_NUM_RX_DESC	16	etherfabric_nic.h
8293	EFAB_RX_BUF_SIZE	1600	etherfabric_nic.h
8294	HFA384x_CMD_ALLOC_LEN_MIN	((UINT16)4)	hfa384x.h
8295	HFA384x_CMD_ALLOC_LEN_MAX	((UINT16)2400)	hfa384x.h
8296	HFA384x_BAP_DATALEN_MAX	((UINT16)4096)	hfa384x.h
8297	HFA384x_BAP_OFFSET_MAX	((UINT16)4096)	hfa384x.h
8298	HFA384x_PORTID_MAX	((UINT16)7)	hfa384x.h
8299	HFA384x_NUMPORTS_MAX	((UINT16)(HFA384x_PORTID_MAX+1))	hfa384x.h
8300	HFA384x_PDR_LEN_MAX	((UINT16)512)	hfa384x.h	in bytes, from EK
8301	HFA384x_PDA_RECS_MAX	((UINT16)200)	hfa384x.h	a guess
8302	HFA384x_PDA_LEN_MAX	((UINT16)1024)	hfa384x.h	in bytes, from EK
8303	HFA384x_SCANRESULT_MAX	((UINT16)31)	hfa384x.h
8304	HFA384x_HSCANRESULT_MAX	((UINT16)31)	hfa384x.h
8305	HFA384x_CHINFORESULT_MAX	((UINT16)16)	hfa384x.h
8306	HFA384x_DRVR_FIDSTACKLEN_MAX	(10)	hfa384x.h
8307	HFA384x_DRVR_TXBUF_MAX	(sizeof(hfa384x_tx_frame_t) + \ WLAN_DATA_MAXLEN - \ WLAN_WEP_IV_LEN - \ WLAN_WEP_ICV_LEN + 2)	hfa384x.h
8308	HFA384x_DRVR_MAGIC	(0x4a2d)	hfa384x.h
8309	HFA384x_INFODATA_MAXLEN	(sizeof(hfa384x_infodata_t))	hfa384x.h
8310	HFA384x_INFOFRM_MAXLEN	(sizeof(hfa384x_InfFrame_t))	hfa384x.h
8311	HFA384x_RID_GUESSING_MAXLEN	2048	hfa384x.h	I'm not really sure
8312	HFA384x_RIDDATA_MAXLEN	HFA384x_RID_GUESSING_MAXLEN	hfa384x.h
8313	HFA384x_USB_RWMEM_MAXLEN	2048	hfa384x.h
8314	HFA384x_BAP_PROC	((UINT16)0)	hfa384x.h
8315	HFA384x_BAP_INT	((UINT16)1)	hfa384x.h
8316	HFA384x_PORTTYPE_IBSS	((UINT16)0)	hfa384x.h
8317	HFA384x_PORTTYPE_BSS	((UINT16)1)	hfa384x.h
8318	HFA384x_PORTTYPE_WDS	((UINT16)2)	hfa384x.h
8319	HFA384x_PORTTYPE_PSUEDOIBSS	((UINT16)3)	hfa384x.h
8320	HFA384x_PORTTYPE_HOSTAP	((UINT16)6)	hfa384x.h
8321	HFA384x_WEPFLAGS_PRIVINVOKED	((UINT16)BIT0)	hfa384x.h
8322	HFA384x_WEPFLAGS_EXCLUDE	((UINT16)BIT1)	hfa384x.h
8323	HFA384x_WEPFLAGS_DISABLE_TXCRYP	((UINT16)BIT4)	hfa384x.h
8324	HFA384x_WEPFLAGS_DISABLE_RXCRYP	((UINT16)BIT7)	hfa384x.h
8325	HFA384x_WEPFLAGS_DISALLOW_MIXED	((UINT16)BIT11)	hfa384x.h
8326	HFA384x_WEPFLAGS_IV_INTERVAL1	((UINT16)0)	hfa384x.h
8327	HFA384x_WEPFLAGS_IV_INTERVAL10	((UINT16)BIT5)	hfa384x.h
8328	HFA384x_WEPFLAGS_IV_INTERVAL50	((UINT16)BIT6)	hfa384x.h
8329	HFA384x_WEPFLAGS_IV_INTERVAL100	((UINT16)(BIT5 \| BIT6))	hfa384x.h
8330	HFA384x_WEPFLAGS_FIRMWARE_WPA	((UINT16)BIT8)	hfa384x.h
8331	HFA384x_WEPFLAGS_HOST_MIC	((UINT16)BIT9)	hfa384x.h
8332	HFA384x_ROAMMODE_FWSCAN_FWROAM	((UINT16)1)	hfa384x.h
8333	HFA384x_ROAMMODE_FWSCAN_HOSTROA	((UINT16)2)	hfa384x.h
8334	HFA384x_ROAMMODE_HOSTSCAN_HOSTR	((UINT16)3)	hfa384x.h
8335	HFA384x_PORTSTATUS_DISABLED	((UINT16)1)	hfa384x.h
8336	HFA384x_PORTSTATUS_INITSRCH	((UINT16)2)	hfa384x.h
8337	HFA384x_PORTSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
8338	HFA384x_PORTSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
8339	HFA384x_PORTSTATUS_OOR_ESS	((UINT16)5)	hfa384x.h
8340	HFA384x_PORTSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
8341	HFA384x_PORTSTATUS_HOSTAP	((UINT16)8)	hfa384x.h
8342	HFA384x_RATEBIT_1	((UINT16)1)	hfa384x.h
8343	HFA384x_RATEBIT_2	((UINT16)2)	hfa384x.h
8344	HFA384x_RATEBIT_5dot5	((UINT16)4)	hfa384x.h
8345	HFA384x_RATEBIT_11	((UINT16)8)	hfa384x.h
8346	HFA384x_TXCMD_NORECL	((UINT16)0)	hfa384x.h
8347	HFA384x_TXCMD_RECL	((UINT16)1)	hfa384x.h
8348	HFA384x_ADDR_AUX_OFF_MAX	((UINT16)0x007f)	hfa384x.h
8349	HFA384x_ADDR_FLAT_AUX_PAGE_MASK	(0x007fff80)	hfa384x.h
8350	HFA384x_ADDR_FLAT_AUX_OFF_MASK	(0x0000007f)	hfa384x.h
8351	HFA384x_ADDR_FLAT_CMD_PAGE_MASK	(0xffff0000)	hfa384x.h
8352	HFA384x_ADDR_FLAT_CMD_OFF_MASK	(0x0000ffff)	hfa384x.h
8353	HFA384x_ADDR_AUX_PAGE_MASK	(0xffff)	hfa384x.h
8354	HFA384x_ADDR_AUX_OFF_MASK	(0x007f)	hfa384x.h
8355	HFA384x_ADDR_CMD_PAGE_MASK	(0x007f)	hfa384x.h
8356	HFA384x_ADDR_CMD_OFF_MASK	(0xffff)	hfa384x.h
8357	HFA384x_AUX_CTL_EXTDS	(0x00)	hfa384x.h
8358	HFA384x_AUX_CTL_NV	(0x01)	hfa384x.h
8359	HFA384x_AUX_CTL_PHY	(0x02)	hfa384x.h
8360	HFA384x_AUX_CTL_ICSRAM	(0x03)	hfa384x.h
8361	HFA3842_PDA_BASE	(0x007f0000UL)	hfa384x.h
8362	HFA3841_PDA_BASE	(0x003f0000UL)	hfa384x.h
8363	HFA3841_PDA_BOGUS_BASE	(0x00390000UL)	hfa384x.h
8364	HFA384x_DLSTATE_DISABLED	0	hfa384x.h
8365	HFA384x_DLSTATE_RAMENABLED	1	hfa384x.h
8366	HFA384x_DLSTATE_FLASHENABLED	2	hfa384x.h
8367	HFA384x_DLSTATE_FLASHWRITTEN	3	hfa384x.h
8368	HFA384x_DLSTATE_FLASHWRITEPENDI	4	hfa384x.h
8369	HFA384x_DLSTATE_GENESIS	5	hfa384x.h
8370	HFA384x_CMD_OFF	(0x00)	hfa384x.h
8371	HFA384x_PARAM0_OFF	(0x02)	hfa384x.h
8372	HFA384x_PARAM1_OFF	(0x04)	hfa384x.h
8373	HFA384x_PARAM2_OFF	(0x06)	hfa384x.h
8374	HFA384x_STATUS_OFF	(0x08)	hfa384x.h
8375	HFA384x_RESP0_OFF	(0x0A)	hfa384x.h
8376	HFA384x_RESP1_OFF	(0x0C)	hfa384x.h
8377	HFA384x_RESP2_OFF	(0x0E)	hfa384x.h
8378	HFA384x_INFOFID_OFF	(0x10)	hfa384x.h
8379	HFA384x_RXFID_OFF	(0x20)	hfa384x.h
8380	HFA384x_ALLOCFID_OFF	(0x22)	hfa384x.h
8381	HFA384x_TXCOMPLFID_OFF	(0x24)	hfa384x.h
8382	HFA384x_SELECT0_OFF	(0x18)	hfa384x.h
8383	HFA384x_OFFSET0_OFF	(0x1C)	hfa384x.h
8384	HFA384x_DATA0_OFF	(0x36)	hfa384x.h
8385	HFA384x_SELECT1_OFF	(0x1A)	hfa384x.h
8386	HFA384x_OFFSET1_OFF	(0x1E)	hfa384x.h
8387	HFA384x_DATA1_OFF	(0x38)	hfa384x.h
8388	HFA384x_EVSTAT_OFF	(0x30)	hfa384x.h
8389	HFA384x_INTEN_OFF	(0x32)	hfa384x.h
8390	HFA384x_EVACK_OFF	(0x34)	hfa384x.h
8391	HFA384x_CONTROL_OFF	(0x14)	hfa384x.h
8392	HFA384x_SWSUPPORT0_OFF	(0x28)	hfa384x.h
8393	HFA384x_SWSUPPORT1_OFF	(0x2A)	hfa384x.h
8394	HFA384x_SWSUPPORT2_OFF	(0x2C)	hfa384x.h
8395	HFA384x_AUXPAGE_OFF	(0x3A)	hfa384x.h
8396	HFA384x_AUXOFFSET_OFF	(0x3C)	hfa384x.h
8397	HFA384x_AUXDATA_OFF	(0x3E)	hfa384x.h
8398	HFA384x_CMD_OFF	(0x00)	hfa384x.h
8399	HFA384x_PARAM0_OFF	(0x04)	hfa384x.h
8400	HFA384x_PARAM1_OFF	(0x08)	hfa384x.h
8401	HFA384x_PARAM2_OFF	(0x0c)	hfa384x.h
8402	HFA384x_STATUS_OFF	(0x10)	hfa384x.h
8403	HFA384x_RESP0_OFF	(0x14)	hfa384x.h
8404	HFA384x_RESP1_OFF	(0x18)	hfa384x.h
8405	HFA384x_RESP2_OFF	(0x1c)	hfa384x.h
8406	HFA384x_INFOFID_OFF	(0x20)	hfa384x.h
8407	HFA384x_RXFID_OFF	(0x40)	hfa384x.h
8408	HFA384x_ALLOCFID_OFF	(0x44)	hfa384x.h
8409	HFA384x_TXCOMPLFID_OFF	(0x48)	hfa384x.h
8410	HFA384x_SELECT0_OFF	(0x30)	hfa384x.h
8411	HFA384x_OFFSET0_OFF	(0x38)	hfa384x.h
8412	HFA384x_DATA0_OFF	(0x6c)	hfa384x.h
8413	HFA384x_SELECT1_OFF	(0x34)	hfa384x.h
8414	HFA384x_OFFSET1_OFF	(0x3c)	hfa384x.h
8415	HFA384x_DATA1_OFF	(0x70)	hfa384x.h
8416	HFA384x_EVSTAT_OFF	(0x60)	hfa384x.h
8417	HFA384x_INTEN_OFF	(0x64)	hfa384x.h
8418	HFA384x_EVACK_OFF	(0x68)	hfa384x.h
8419	HFA384x_CONTROL_OFF	(0x28)	hfa384x.h
8420	HFA384x_SWSUPPORT0_OFF	(0x50)	hfa384x.h
8421	HFA384x_SWSUPPORT1_OFF	(0x54)	hfa384x.h
8422	HFA384x_SWSUPPORT2_OFF	(0x58)	hfa384x.h
8423	HFA384x_AUXPAGE_OFF	(0x74)	hfa384x.h
8424	HFA384x_AUXOFFSET_OFF	(0x78)	hfa384x.h
8425	HFA384x_AUXDATA_OFF	(0x7c)	hfa384x.h
8426	HFA384x_PCICOR_OFF	(0x4c)	hfa384x.h
8427	HFA384x_PCIHCR_OFF	(0x5c)	hfa384x.h
8428	HFA384x_PCI_M0_ADDRH_OFF	(0x80)	hfa384x.h
8429	HFA384x_PCI_M0_ADDRL_OFF	(0x84)	hfa384x.h
8430	HFA384x_PCI_M0_LEN_OFF	(0x88)	hfa384x.h
8431	HFA384x_PCI_M0_CTL_OFF	(0x8c)	hfa384x.h
8432	HFA384x_PCI_STATUS_OFF	(0x98)	hfa384x.h
8433	HFA384x_PCI_M1_ADDRH_OFF	(0xa0)	hfa384x.h
8434	HFA384x_PCI_M1_ADDRL_OFF	(0xa4)	hfa384x.h
8435	HFA384x_PCI_M1_LEN_OFF	(0xa8)	hfa384x.h
8436	HFA384x_PCI_M1_CTL_OFF	(0xac)	hfa384x.h
8437	HFA384x_CMD_BUSY	((UINT16)BIT15)	hfa384x.h
8438	HFA384x_CMD_AINFO	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
8439	HFA384x_CMD_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
8440	HFA384x_CMD_RECL	((UINT16)BIT8)	hfa384x.h
8441	HFA384x_CMD_WRITE	((UINT16)BIT8)	hfa384x.h
8442	HFA384x_CMD_PROGMODE	((UINT16)(BIT9 \| BIT8))	hfa384x.h
8443	HFA384x_CMD_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
8444	HFA384x_STATUS_RESULT	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
8445	HFA384x_STATUS_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
8446	HFA384x_OFFSET_BUSY	((UINT16)BIT15)	hfa384x.h
8447	HFA384x_OFFSET_ERR	((UINT16)BIT14)	hfa384x.h
8448	HFA384x_OFFSET_DATAOFF	((UINT16)(BIT11 \| BIT10 \| BIT9 \| BIT8 \| BIT7 \| BIT6 \| BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1))	hfa384x.h
8449	HFA384x_EVSTAT_TICK	((UINT16)BIT15)	hfa384x.h
8450	HFA384x_EVSTAT_WTERR	((UINT16)BIT14)	hfa384x.h
8451	HFA384x_EVSTAT_INFDROP	((UINT16)BIT13)	hfa384x.h
8452	HFA384x_EVSTAT_INFO	((UINT16)BIT7)	hfa384x.h
8453	HFA384x_EVSTAT_DTIM	((UINT16)BIT5)	hfa384x.h
8454	HFA384x_EVSTAT_CMD	((UINT16)BIT4)	hfa384x.h
8455	HFA384x_EVSTAT_ALLOC	((UINT16)BIT3)	hfa384x.h
8456	HFA384x_EVSTAT_TXEXC	((UINT16)BIT2)	hfa384x.h
8457	HFA384x_EVSTAT_TX	((UINT16)BIT1)	hfa384x.h
8458	HFA384x_EVSTAT_RX	((UINT16)BIT0)	hfa384x.h
8459	HFA384x_INT_BAP_OP	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC)	hfa384x.h
8460	HFA384x_INT_NORMAL	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC\|HFA384x_EVSTAT_INFDROP\|HFA384x_EVSTAT_ALLOC\|HFA38	hfa384x.h
8461	HFA384x_INTEN_TICK	((UINT16)BIT15)	hfa384x.h
8462	HFA384x_INTEN_WTERR	((UINT16)BIT14)	hfa384x.h
8463	HFA384x_INTEN_INFDROP	((UINT16)BIT13)	hfa384x.h
8464	HFA384x_INTEN_INFO	((UINT16)BIT7)	hfa384x.h
8465	HFA384x_INTEN_DTIM	((UINT16)BIT5)	hfa384x.h
8466	HFA384x_INTEN_CMD	((UINT16)BIT4)	hfa384x.h
8467	HFA384x_INTEN_ALLOC	((UINT16)BIT3)	hfa384x.h
8468	HFA384x_INTEN_TXEXC	((UINT16)BIT2)	hfa384x.h
8469	HFA384x_INTEN_TX	((UINT16)BIT1)	hfa384x.h
8470	HFA384x_INTEN_RX	((UINT16)BIT0)	hfa384x.h
8471	HFA384x_EVACK_TICK	((UINT16)BIT15)	hfa384x.h
8472	HFA384x_EVACK_WTERR	((UINT16)BIT14)	hfa384x.h
8473	HFA384x_EVACK_INFDROP	((UINT16)BIT13)	hfa384x.h
8474	HFA384x_EVACK_INFO	((UINT16)BIT7)	hfa384x.h
8475	HFA384x_EVACK_DTIM	((UINT16)BIT5)	hfa384x.h
8476	HFA384x_EVACK_CMD	((UINT16)BIT4)	hfa384x.h
8477	HFA384x_EVACK_ALLOC	((UINT16)BIT3)	hfa384x.h
8478	HFA384x_EVACK_TXEXC	((UINT16)BIT2)	hfa384x.h
8479	HFA384x_EVACK_TX	((UINT16)BIT1)	hfa384x.h
8480	HFA384x_EVACK_RX	((UINT16)BIT0)	hfa384x.h
8481	HFA384x_CONTROL_AUXEN	((UINT16)(BIT15 \| BIT14))	hfa384x.h
8482	HFA384x_CMDCODE_INIT	((UINT16)0x00)	hfa384x.h
8483	HFA384x_CMDCODE_ENABLE	((UINT16)0x01)	hfa384x.h
8484	HFA384x_CMDCODE_DISABLE	((UINT16)0x02)	hfa384x.h
8485	HFA384x_CMDCODE_DIAG	((UINT16)0x03)	hfa384x.h
8486	HFA384x_CMDCODE_ALLOC	((UINT16)0x0A)	hfa384x.h
8487	HFA384x_CMDCODE_TX	((UINT16)0x0B)	hfa384x.h
8488	HFA384x_CMDCODE_CLRPRST	((UINT16)0x12)	hfa384x.h
8489	HFA384x_CMDCODE_NOTIFY	((UINT16)0x10)	hfa384x.h
8490	HFA384x_CMDCODE_INQ	((UINT16)0x11)	hfa384x.h
8491	HFA384x_CMDCODE_ACCESS	((UINT16)0x21)	hfa384x.h
8492	HFA384x_CMDCODE_DOWNLD	((UINT16)0x22)	hfa384x.h
8493	HFA384x_CMDCODE_MONITOR	((UINT16)(0x38))	hfa384x.h
8494	HFA384x_MONITOR_ENABLE	((UINT16)(0x0b))	hfa384x.h
8495	HFA384x_MONITOR_DISABLE	((UINT16)(0x0f))	hfa384x.h
8496	HFA384x_SUCCESS	((UINT16)(0x00))	hfa384x.h
8497	HFA384x_CARD_FAIL	((UINT16)(0x01))	hfa384x.h
8498	HFA384x_NO_BUFF	((UINT16)(0x05))	hfa384x.h
8499	HFA384x_CMD_ERR	((UINT16)(0x7F))	hfa384x.h
8500	HFA384x_PROGMODE_DISABLE	((UINT16)0x00)	hfa384x.h
8501	HFA384x_PROGMODE_RAM	((UINT16)0x01)	hfa384x.h
8502	HFA384x_PROGMODE_NV	((UINT16)0x02)	hfa384x.h
8503	HFA384x_PROGMODE_NVWRITE	((UINT16)0x03)	hfa384x.h
8504	HFA384x_AUXPW0	((UINT16)0xfe01)	hfa384x.h
8505	HFA384x_AUXPW1	((UINT16)0xdc23)	hfa384x.h
8506	HFA384x_AUXPW2	((UINT16)0xba45)	hfa384x.h
8507	HFA384x_CONTROL_AUX_ISDISABLED	((UINT16)0x0000)	hfa384x.h
8508	HFA384x_CONTROL_AUX_ISENABLED	((UINT16)0xc000)	hfa384x.h
8509	HFA384x_CONTROL_AUX_DOENABLE	((UINT16)0x8000)	hfa384x.h
8510	HFA384x_CONTROL_AUX_DODISABLE	((UINT16)0x4000)	hfa384x.h
8511	HFA384x_RID_CNFPORTTYPE	((UINT16)0xFC00)	hfa384x.h
8512	HFA384x_RID_CNFOWNMACADDR	((UINT16)0xFC01)	hfa384x.h
8513	HFA384x_RID_CNFDESIREDSSID	((UINT16)0xFC02)	hfa384x.h
8514	HFA384x_RID_CNFOWNCHANNEL	((UINT16)0xFC03)	hfa384x.h
8515	HFA384x_RID_CNFOWNSSID	((UINT16)0xFC04)	hfa384x.h
8516	HFA384x_RID_CNFOWNATIMWIN	((UINT16)0xFC05)	hfa384x.h
8517	HFA384x_RID_CNFSYSSCALE	((UINT16)0xFC06)	hfa384x.h
8518	HFA384x_RID_CNFMAXDATALEN	((UINT16)0xFC07)	hfa384x.h
8519	HFA384x_RID_CNFWDSADDR	((UINT16)0xFC08)	hfa384x.h
8520	HFA384x_RID_CNFPMENABLED	((UINT16)0xFC09)	hfa384x.h
8521	HFA384x_RID_CNFPMEPS	((UINT16)0xFC0A)	hfa384x.h
8522	HFA384x_RID_CNFMULTICASTRX	((UINT16)0xFC0B)	hfa384x.h
8523	HFA384x_RID_CNFMAXSLEEPDUR	((UINT16)0xFC0C)	hfa384x.h
8524	HFA384x_RID_CNFPMHOLDDUR	((UINT16)0xFC0D)	hfa384x.h
8525	HFA384x_RID_CNFOWNNAME	((UINT16)0xFC0E)	hfa384x.h
8526	HFA384x_RID_CNFOWNDTIMPER	((UINT16)0xFC10)	hfa384x.h
8527	HFA384x_RID_CNFWDSADDR1	((UINT16)0xFC11)	hfa384x.h
8528	HFA384x_RID_CNFWDSADDR2	((UINT16)0xFC12)	hfa384x.h
8529	HFA384x_RID_CNFWDSADDR3	((UINT16)0xFC13)	hfa384x.h
8530	HFA384x_RID_CNFWDSADDR4	((UINT16)0xFC14)	hfa384x.h
8531	HFA384x_RID_CNFWDSADDR5	((UINT16)0xFC15)	hfa384x.h
8532	HFA384x_RID_CNFWDSADDR6	((UINT16)0xFC16)	hfa384x.h
8533	HFA384x_RID_CNFMCASTPMBUFF	((UINT16)0xFC17)	hfa384x.h
8534	HFA384x_RID_CNFPORTTYPE_LEN	((UINT16)2)	hfa384x.h
8535	HFA384x_RID_CNFOWNMACADDR_LEN	((UINT16)6)	hfa384x.h
8536	HFA384x_RID_CNFDESIREDSSID_LEN	((UINT16)34)	hfa384x.h
8537	HFA384x_RID_CNFOWNCHANNEL_LEN	((UINT16)2)	hfa384x.h
8538	HFA384x_RID_CNFOWNSSID_LEN	((UINT16)34)	hfa384x.h
8539	HFA384x_RID_CNFOWNATIMWIN_LEN	((UINT16)2)	hfa384x.h
8540	HFA384x_RID_CNFSYSSCALE_LEN	((UINT16)0)	hfa384x.h
8541	HFA384x_RID_CNFMAXDATALEN_LEN	((UINT16)0)	hfa384x.h
8542	HFA384x_RID_CNFWDSADDR_LEN	((UINT16)6)	hfa384x.h
8543	HFA384x_RID_CNFPMENABLED_LEN	((UINT16)0)	hfa384x.h
8544	HFA384x_RID_CNFPMEPS_LEN	((UINT16)0)	hfa384x.h
8545	HFA384x_RID_CNFMULTICASTRX_LEN	((UINT16)0)	hfa384x.h
8546	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
8547	HFA384x_RID_CNFPMHOLDDUR_LEN	((UINT16)0)	hfa384x.h
8548	HFA384x_RID_CNFOWNNAME_LEN	((UINT16)34)	hfa384x.h
8549	HFA384x_RID_CNFOWNDTIMPER_LEN	((UINT16)0)	hfa384x.h
8550	HFA384x_RID_CNFWDSADDR1_LEN	((UINT16)6)	hfa384x.h
8551	HFA384x_RID_CNFWDSADDR2_LEN	((UINT16)6)	hfa384x.h
8552	HFA384x_RID_CNFWDSADDR3_LEN	((UINT16)6)	hfa384x.h
8553	HFA384x_RID_CNFWDSADDR4_LEN	((UINT16)6)	hfa384x.h
8554	HFA384x_RID_CNFWDSADDR5_LEN	((UINT16)6)	hfa384x.h
8555	HFA384x_RID_CNFWDSADDR6_LEN	((UINT16)6)	hfa384x.h
8556	HFA384x_RID_CNFMCASTPMBUFF_LEN	((UINT16)0)	hfa384x.h
8557	HFA384x_RID_CNFAUTHENTICATION_L	((UINT16)sizeof(UINT16))	hfa384x.h
8558	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
8559	HFA384x_RID_GROUPADDR	((UINT16)0xFC80)	hfa384x.h
8560	HFA384x_RID_CREATEIBSS	((UINT16)0xFC81)	hfa384x.h
8561	HFA384x_RID_FRAGTHRESH	((UINT16)0xFC82)	hfa384x.h
8562	HFA384x_RID_RTSTHRESH	((UINT16)0xFC83)	hfa384x.h
8563	HFA384x_RID_TXRATECNTL	((UINT16)0xFC84)	hfa384x.h
8564	HFA384x_RID_PROMISCMODE	((UINT16)0xFC85)	hfa384x.h
8565	HFA384x_RID_FRAGTHRESH0	((UINT16)0xFC90)	hfa384x.h
8566	HFA384x_RID_FRAGTHRESH1	((UINT16)0xFC91)	hfa384x.h
8567	HFA384x_RID_FRAGTHRESH2	((UINT16)0xFC92)	hfa384x.h
8568	HFA384x_RID_FRAGTHRESH3	((UINT16)0xFC93)	hfa384x.h
8569	HFA384x_RID_FRAGTHRESH4	((UINT16)0xFC94)	hfa384x.h
8570	HFA384x_RID_FRAGTHRESH5	((UINT16)0xFC95)	hfa384x.h
8571	HFA384x_RID_FRAGTHRESH6	((UINT16)0xFC96)	hfa384x.h
8572	HFA384x_RID_RTSTHRESH0	((UINT16)0xFC97)	hfa384x.h
8573	HFA384x_RID_RTSTHRESH1	((UINT16)0xFC98)	hfa384x.h
8574	HFA384x_RID_RTSTHRESH2	((UINT16)0xFC99)	hfa384x.h
8575	HFA384x_RID_RTSTHRESH3	((UINT16)0xFC9A)	hfa384x.h
8576	HFA384x_RID_RTSTHRESH4	((UINT16)0xFC9B)	hfa384x.h
8577	HFA384x_RID_RTSTHRESH5	((UINT16)0xFC9C)	hfa384x.h
8578	HFA384x_RID_RTSTHRESH6	((UINT16)0xFC9D)	hfa384x.h
8579	HFA384x_RID_TXRATECNTL0	((UINT16)0xFC9E)	hfa384x.h
8580	HFA384x_RID_TXRATECNTL1	((UINT16)0xFC9F)	hfa384x.h
8581	HFA384x_RID_TXRATECNTL2	((UINT16)0xFCA0)	hfa384x.h
8582	HFA384x_RID_TXRATECNTL3	((UINT16)0xFCA1)	hfa384x.h
8583	HFA384x_RID_TXRATECNTL4	((UINT16)0xFCA2)	hfa384x.h
8584	HFA384x_RID_TXRATECNTL5	((UINT16)0xFCA3)	hfa384x.h
8585	HFA384x_RID_TXRATECNTL6	((UINT16)0xFCA4)	hfa384x.h
8586	HFA384x_RID_GROUPADDR_LEN	((UINT16)16 * WLAN_ADDR_LEN)	hfa384x.h
8587	HFA384x_RID_CREATEIBSS_LEN	((UINT16)0)	hfa384x.h
8588	HFA384x_RID_FRAGTHRESH_LEN	((UINT16)0)	hfa384x.h
8589	HFA384x_RID_RTSTHRESH_LEN	((UINT16)0)	hfa384x.h
8590	HFA384x_RID_TXRATECNTL_LEN	((UINT16)4)	hfa384x.h
8591	HFA384x_RID_PROMISCMODE_LEN	((UINT16)2)	hfa384x.h
8592	HFA384x_RID_FRAGTHRESH0_LEN	((UINT16)0)	hfa384x.h
8593	HFA384x_RID_FRAGTHRESH1_LEN	((UINT16)0)	hfa384x.h
8594	HFA384x_RID_FRAGTHRESH2_LEN	((UINT16)0)	hfa384x.h
8595	HFA384x_RID_FRAGTHRESH3_LEN	((UINT16)0)	hfa384x.h
8596	HFA384x_RID_FRAGTHRESH4_LEN	((UINT16)0)	hfa384x.h
8597	HFA384x_RID_FRAGTHRESH5_LEN	((UINT16)0)	hfa384x.h
8598	HFA384x_RID_FRAGTHRESH6_LEN	((UINT16)0)	hfa384x.h
8599	HFA384x_RID_RTSTHRESH0_LEN	((UINT16)0)	hfa384x.h
8600	HFA384x_RID_RTSTHRESH1_LEN	((UINT16)0)	hfa384x.h
8601	HFA384x_RID_RTSTHRESH2_LEN	((UINT16)0)	hfa384x.h
8602	HFA384x_RID_RTSTHRESH3_LEN	((UINT16)0)	hfa384x.h
8603	HFA384x_RID_RTSTHRESH4_LEN	((UINT16)0)	hfa384x.h
8604	HFA384x_RID_RTSTHRESH5_LEN	((UINT16)0)	hfa384x.h
8605	HFA384x_RID_RTSTHRESH6_LEN	((UINT16)0)	hfa384x.h
8606	HFA384x_RID_TXRATECNTL0_LEN	((UINT16)0)	hfa384x.h
8607	HFA384x_RID_TXRATECNTL1_LEN	((UINT16)0)	hfa384x.h
8608	HFA384x_RID_TXRATECNTL2_LEN	((UINT16)0)	hfa384x.h
8609	HFA384x_RID_TXRATECNTL3_LEN	((UINT16)0)	hfa384x.h
8610	HFA384x_RID_TXRATECNTL4_LEN	((UINT16)0)	hfa384x.h
8611	HFA384x_RID_TXRATECNTL5_LEN	((UINT16)0)	hfa384x.h
8612	HFA384x_RID_TXRATECNTL6_LEN	((UINT16)0)	hfa384x.h
8613	HFA384x_RID_ITICKTIME	((UINT16)0xFCE0)	hfa384x.h
8614	HFA384x_RID_ITICKTIME_LEN	((UINT16)2)	hfa384x.h
8615	HFA384x_RID_MAXLOADTIME	((UINT16)0xFD00)	hfa384x.h
8616	HFA384x_RID_DOWNLOADBUFFER	((UINT16)0xFD01)	hfa384x.h
8617	HFA384x_RID_PRIIDENTITY	((UINT16)0xFD02)	hfa384x.h
8618	HFA384x_RID_PRISUPRANGE	((UINT16)0xFD03)	hfa384x.h
8619	HFA384x_RID_PRI_CFIACTRANGES	((UINT16)0xFD04)	hfa384x.h
8620	HFA384x_RID_NICSERIALNUMBER	((UINT16)0xFD0A)	hfa384x.h
8621	HFA384x_RID_NICIDENTITY	((UINT16)0xFD0B)	hfa384x.h
8622	HFA384x_RID_MFISUPRANGE	((UINT16)0xFD0C)	hfa384x.h
8623	HFA384x_RID_CFISUPRANGE	((UINT16)0xFD0D)	hfa384x.h
8624	HFA384x_RID_CHANNELLIST	((UINT16)0xFD10)	hfa384x.h
8625	HFA384x_RID_REGULATORYDOMAINS	((UINT16)0xFD11)	hfa384x.h
8626	HFA384x_RID_TEMPTYPE	((UINT16)0xFD12)	hfa384x.h
8627	HFA384x_RID_CIS	((UINT16)0xFD13)	hfa384x.h
8628	HFA384x_RID_STAIDENTITY	((UINT16)0xFD20)	hfa384x.h
8629	HFA384x_RID_STASUPRANGE	((UINT16)0xFD21)	hfa384x.h
8630	HFA384x_RID_STA_MFIACTRANGES	((UINT16)0xFD22)	hfa384x.h
8631	HFA384x_RID_STA_CFIACTRANGES	((UINT16)0xFD23)	hfa384x.h
8632	HFA384x_RID_BUILDSEQ	((UINT16)0xFFFE)	hfa384x.h
8633	HFA384x_RID_FWID	((UINT16)0xFFFF)	hfa384x.h
8634	HFA384x_RID_MAXLOADTIME_LEN	((UINT16)0)	hfa384x.h
8635	HFA384x_RID_DOWNLOADBUFFER_LEN	((UINT16)sizeof(hfa384x_downloadbuffer_t))	hfa384x.h
8636	HFA384x_RID_PRIIDENTITY_LEN	((UINT16)8)	hfa384x.h
8637	HFA384x_RID_PRISUPRANGE_LEN	((UINT16)10)	hfa384x.h
8638	HFA384x_RID_CFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
8639	HFA384x_RID_NICSERIALNUMBER_LEN	((UINT16)12)	hfa384x.h
8640	HFA384x_RID_NICIDENTITY_LEN	((UINT16)8)	hfa384x.h
8641	HFA384x_RID_MFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
8642	HFA384x_RID_CFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
8643	HFA384x_RID_CHANNELLIST_LEN	((UINT16)0)	hfa384x.h
8644	HFA384x_RID_REGULATORYDOMAINS_L	((UINT16)12)	hfa384x.h
8645	HFA384x_RID_TEMPTYPE_LEN	((UINT16)0)	hfa384x.h
8646	HFA384x_RID_CIS_LEN	((UINT16)480)	hfa384x.h
8647	HFA384x_RID_STAIDENTITY_LEN	((UINT16)8)	hfa384x.h
8648	HFA384x_RID_STASUPRANGE_LEN	((UINT16)10)	hfa384x.h
8649	HFA384x_RID_MFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
8650	HFA384x_RID_CFIACTRANGES2_LEN	((UINT16)10)	hfa384x.h
8651	HFA384x_RID_BUILDSEQ_LEN	((UINT16)sizeof(hfa384x_BuildSeq_t))	hfa384x.h
8652	HFA384x_RID_FWID_LEN	((UINT16)sizeof(hfa384x_FWID_t))	hfa384x.h
8653	HFA384x_RID_PORTSTATUS	((UINT16)0xFD40)	hfa384x.h
8654	HFA384x_RID_CURRENTSSID	((UINT16)0xFD41)	hfa384x.h
8655	HFA384x_RID_CURRENTBSSID	((UINT16)0xFD42)	hfa384x.h
8656	HFA384x_RID_COMMSQUALITY	((UINT16)0xFD43)	hfa384x.h
8657	HFA384x_RID_CURRENTTXRATE	((UINT16)0xFD44)	hfa384x.h
8658	HFA384x_RID_CURRENTBCNINT	((UINT16)0xFD45)	hfa384x.h
8659	HFA384x_RID_CURRENTSCALETHRESH	((UINT16)0xFD46)	hfa384x.h
8660	HFA384x_RID_PROTOCOLRSPTIME	((UINT16)0xFD47)	hfa384x.h
8661	HFA384x_RID_SHORTRETRYLIMIT	((UINT16)0xFD48)	hfa384x.h
8662	HFA384x_RID_LONGRETRYLIMIT	((UINT16)0xFD49)	hfa384x.h
8663	HFA384x_RID_MAXTXLIFETIME	((UINT16)0xFD4A)	hfa384x.h
8664	HFA384x_RID_MAXRXLIFETIME	((UINT16)0xFD4B)	hfa384x.h
8665	HFA384x_RID_CFPOLLABLE	((UINT16)0xFD4C)	hfa384x.h
8666	HFA384x_RID_AUTHALGORITHMS	((UINT16)0xFD4D)	hfa384x.h
8667	HFA384x_RID_PRIVACYOPTIMP	((UINT16)0xFD4F)	hfa384x.h
8668	HFA384x_RID_DBMCOMMSQUALITY	((UINT16)0xFD51)	hfa384x.h
8669	HFA384x_RID_CURRENTTXRATE1	((UINT16)0xFD80)	hfa384x.h
8670	HFA384x_RID_CURRENTTXRATE2	((UINT16)0xFD81)	hfa384x.h
8671	HFA384x_RID_CURRENTTXRATE3	((UINT16)0xFD82)	hfa384x.h
8672	HFA384x_RID_CURRENTTXRATE4	((UINT16)0xFD83)	hfa384x.h
8673	HFA384x_RID_CURRENTTXRATE5	((UINT16)0xFD84)	hfa384x.h
8674	HFA384x_RID_CURRENTTXRATE6	((UINT16)0xFD85)	hfa384x.h
8675	HFA384x_RID_OWNMACADDRESS	((UINT16)0xFD86)	hfa384x.h
8676	HFA384x_RID_SCANRESULTS	((UINT16)0xFD88)	hfa384x.h	NEW
8677	HFA384x_RID_HOSTSCANRESULTS	((UINT16)0xFD89)	hfa384x.h	NEW
8678	HFA384x_RID_AUTHENTICATIONUSED	((UINT16)0xFD8A)	hfa384x.h	NEW
8679	HFA384x_RID_ASSOCIATEFAILURE	((UINT16)0xFD8D)	hfa384x.h	1.8.0
8680	HFA384x_RID_PORTSTATUS_LEN	((UINT16)0)	hfa384x.h
8681	HFA384x_RID_CURRENTSSID_LEN	((UINT16)34)	hfa384x.h
8682	HFA384x_RID_CURRENTBSSID_LEN	((UINT16)WLAN_BSSID_LEN)	hfa384x.h
8683	HFA384x_RID_COMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_commsquality_t))	hfa384x.h
8684	HFA384x_RID_DBMCOMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_dbmcommsquality_t))	hfa384x.h
8685	HFA384x_RID_CURRENTTXRATE_LEN	((UINT16)0)	hfa384x.h
8686	HFA384x_RID_CURRENTBCNINT_LEN	((UINT16)0)	hfa384x.h
8687	HFA384x_RID_STACURSCALETHRESH_L	((UINT16)12)	hfa384x.h
8688	HFA384x_RID_APCURSCALETHRESH_LE	((UINT16)6)	hfa384x.h
8689	HFA384x_RID_PROTOCOLRSPTIME_LEN	((UINT16)0)	hfa384x.h
8690	HFA384x_RID_SHORTRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
8691	HFA384x_RID_LONGRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
8692	HFA384x_RID_MAXTXLIFETIME_LEN	((UINT16)0)	hfa384x.h
8693	HFA384x_RID_MAXRXLIFETIME_LEN	((UINT16)0)	hfa384x.h
8694	HFA384x_RID_CFPOLLABLE_LEN	((UINT16)0)	hfa384x.h
8695	HFA384x_RID_AUTHALGORITHMS_LEN	((UINT16)4)	hfa384x.h
8696	HFA384x_RID_PRIVACYOPTIMP_LEN	((UINT16)0)	hfa384x.h
8697	HFA384x_RID_CURRENTTXRATE1_LEN	((UINT16)0)	hfa384x.h
8698	HFA384x_RID_CURRENTTXRATE2_LEN	((UINT16)0)	hfa384x.h
8699	HFA384x_RID_CURRENTTXRATE3_LEN	((UINT16)0)	hfa384x.h
8700	HFA384x_RID_CURRENTTXRATE4_LEN	((UINT16)0)	hfa384x.h
8701	HFA384x_RID_CURRENTTXRATE5_LEN	((UINT16)0)	hfa384x.h
8702	HFA384x_RID_CURRENTTXRATE6_LEN	((UINT16)0)	hfa384x.h
8703	HFA384x_RID_OWNMACADDRESS_LEN	((UINT16)6)	hfa384x.h
8704	HFA384x_RID_PCFINFO_LEN	((UINT16)6)	hfa384x.h
8705	HFA384x_RID_CNFAPPCFINFO_LEN	((UINT16)sizeof(hfa384x_PCFInfo_data_t))	hfa384x.h
8706	HFA384x_RID_SCANREQUEST_LEN	((UINT16)sizeof(hfa384x_ScanRequest_data_t))	hfa384x.h
8707	HFA384x_RID_JOINREQUEST_LEN	((UINT16)sizeof(hfa384x_JoinRequest_data_t))	hfa384x.h
8708	HFA384x_RID_AUTHENTICATESTA_LEN	((UINT16)sizeof(hfa384x_authenticateStation_data_t))	hfa384x.h
8709	HFA384x_RID_CHANNELINFOREQUEST_	((UINT16)sizeof(hfa384x_ChannelInfoRequest_data_t))	hfa384x.h
8710	HFA384x_RID_PHYTYPE	((UINT16)0xFDC0)	hfa384x.h
8711	HFA384x_RID_CURRENTCHANNEL	((UINT16)0xFDC1)	hfa384x.h
8712	HFA384x_RID_CURRENTPOWERSTATE	((UINT16)0xFDC2)	hfa384x.h
8713	HFA384x_RID_CCAMODE	((UINT16)0xFDC3)	hfa384x.h
8714	HFA384x_RID_SUPPORTEDDATARATES	((UINT16)0xFDC6)	hfa384x.h
8715	HFA384x_RID_LFOSTATUS	((UINT16)0xFDC7)	hfa384x.h	1.7.1
8716	HFA384x_RID_PHYTYPE_LEN	((UINT16)0)	hfa384x.h
8717	HFA384x_RID_CURRENTCHANNEL_LEN	((UINT16)0)	hfa384x.h
8718	HFA384x_RID_CURRENTPOWERSTATE_L	((UINT16)0)	hfa384x.h
8719	HFA384x_RID_CCAMODE_LEN	((UINT16)0)	hfa384x.h
8720	HFA384x_RID_SUPPORTEDDATARATES_	((UINT16)10)	hfa384x.h
8721	HFA384x_RID_CNFWEPDEFAULTKEYID	((UINT16)0xFC23)	hfa384x.h
8722	HFA384x_RID_CNFWEPDEFAULTKEY0	((UINT16)0xFC24)	hfa384x.h
8723	HFA384x_RID_CNFWEPDEFAULTKEY1	((UINT16)0xFC25)	hfa384x.h
8724	HFA384x_RID_CNFWEPDEFAULTKEY2	((UINT16)0xFC26)	hfa384x.h
8725	HFA384x_RID_CNFWEPDEFAULTKEY3	((UINT16)0xFC27)	hfa384x.h
8726	HFA384x_RID_CNFWEPFLAGS	((UINT16)0xFC28)	hfa384x.h
8727	HFA384x_RID_CNFWEPKEYMAPTABLE	((UINT16)0xFC29)	hfa384x.h
8728	HFA384x_RID_CNFAUTHENTICATION	((UINT16)0xFC2A)	hfa384x.h
8729	HFA384x_RID_CNFMAXASSOCSTATIONS	((UINT16)0xFC2B)	hfa384x.h
8730	HFA384x_RID_CNFTXCONTROL	((UINT16)0xFC2C)	hfa384x.h
8731	HFA384x_RID_CNFROAMINGMODE	((UINT16)0xFC2D)	hfa384x.h
8732	HFA384x_RID_CNFHOSTAUTHASSOC	((UINT16)0xFC2E)	hfa384x.h
8733	HFA384x_RID_CNFRCVCRCERROR	((UINT16)0xFC30)	hfa384x.h
8734	HFA384x_RID_CNFALTRETRYCNT	((UINT16)0xFC32)	hfa384x.h
8735	HFA384x_RID_CNFAPBCNINT	((UINT16)0xFC33)	hfa384x.h
8736	HFA384x_RID_CNFAPPCFINFO	((UINT16)0xFC34)	hfa384x.h
8737	HFA384x_RID_CNFSTAPCFINFO	((UINT16)0xFC35)	hfa384x.h
8738	HFA384x_RID_CNFPRIORITYQUSAGE	((UINT16)0xFC37)	hfa384x.h
8739	HFA384x_RID_CNFTIMCTRL	((UINT16)0xFC40)	hfa384x.h
8740	HFA384x_RID_CNFTHIRTY2TALLY	((UINT16)0xFC42)	hfa384x.h
8741	HFA384x_RID_CNFENHSECURITY	((UINT16)0xFC43)	hfa384x.h
8742	HFA384x_RID_CNFDBMADJUST	((UINT16)0xFC46)	hfa384x.h	NEW
8743	HFA384x_RID_CNFWPADATA	((UINT16)0xFC48)	hfa384x.h	1.7.0
8744	HFA384x_RID_CNFPROPOGATIONDELAY	((UINT16)0xFC49)	hfa384x.h	1.7.6
8745	HFA384x_RID_CNFSHORTPREAMBLE	((UINT16)0xFCB0)	hfa384x.h
8746	HFA384x_RID_CNFEXCLONGPREAMBLE	((UINT16)0xFCB1)	hfa384x.h
8747	HFA384x_RID_CNFAUTHRSPTIMEOUT	((UINT16)0xFCB2)	hfa384x.h
8748	HFA384x_RID_CNFBASICRATES	((UINT16)0xFCB3)	hfa384x.h
8749	HFA384x_RID_CNFSUPPRATES	((UINT16)0xFCB4)	hfa384x.h
8750	HFA384x_RID_CNFFALLBACKCTRL	((UINT16)0xFCB5)	hfa384x.h	NEW
8751	HFA384x_RID_WEPKEYSTATUS	((UINT16)0xFCB6)	hfa384x.h	NEW
8752	HFA384x_RID_WEPKEYMAPINDEX	((UINT16)0xFCB7)	hfa384x.h	NEW
8753	HFA384x_RID_BROADCASTKEYID	((UINT16)0xFCB8)	hfa384x.h	NEW
8754	HFA384x_RID_ENTSECFLAGEYID	((UINT16)0xFCB9)	hfa384x.h	NEW
8755	HFA384x_RID_CNFPASSIVESCANCTRL	((UINT16)0xFCBA)	hfa384x.h	NEW STA
8756	HFA384x_RID_CNFWPAHANDLING	((UINT16)0xFCBB)	hfa384x.h	1.7.0
8757	HFA384x_RID_MDCCONTROL	((UINT16)0xFCBC)	hfa384x.h	1.7.0/1.4.0
8758	HFA384x_RID_MDCCOUNTRY	((UINT16)0xFCBD)	hfa384x.h	1.7.0/1.4.0
8759	HFA384x_RID_TXPOWERMAX	((UINT16)0xFCBE)	hfa384x.h	1.7.0/1.4.0
8760	HFA384x_RID_CNFLFOENBLED	((UINT16)0xFCBF)	hfa384x.h	1.6.3
8761	HFA384x_RID_CAPINFO	((UINT16)0xFCC0)	hfa384x.h	1.7.0/1.3.7
8762	HFA384x_RID_LISTENINTERVAL	((UINT16)0xFCC1)	hfa384x.h	1.7.0/1.3.7
8763	HFA384x_RID_DIVERSITYENABLED	((UINT16)0xFCC2)	hfa384x.h	1.7.0/1.3.7
8764	HFA384x_RID_LED_CONTROL	((UINT16)0xFCC4)	hfa384x.h	1.7.6
8765	HFA384x_RID_HFO_DELAY	((UINT16)0xFCC5)	hfa384x.h	1.7.6
8766	HFA384x_RID_DISSALOWEDBSSID	((UINT16)0xFCC6)	hfa384x.h	1.8.0
8767	HFA384x_RID_SCANREQUEST	((UINT16)0xFCE1)	hfa384x.h
8768	HFA384x_RID_JOINREQUEST	((UINT16)0xFCE2)	hfa384x.h
8769	HFA384x_RID_AUTHENTICATESTA	((UINT16)0xFCE3)	hfa384x.h
8770	HFA384x_RID_CHANNELINFOREQUEST	((UINT16)0xFCE4)	hfa384x.h
8771	HFA384x_RID_HOSTSCAN	((UINT16)0xFCE5)	hfa384x.h	NEW STA
8772	HFA384x_RID_ASSOCIATESTA	((UINT16)0xFCE6)	hfa384x.h
8773	HFA384x_RID_CNFWEPDEFAULTKEY_LE	((UINT16)6)	hfa384x.h
8774	HFA384x_RID_CNFWEP128DEFAULTKEY	((UINT16)14)	hfa384x.h
8775	HFA384x_RID_CNFPRIOQUSAGE_LEN	((UINT16)4)	hfa384x.h
8776	HFA384x_PDR_PCB_PARTNUM	((UINT16)0x0001)	hfa384x.h
8777	HFA384x_PDR_PDAVER	((UINT16)0x0002)	hfa384x.h
8778	HFA384x_PDR_NIC_SERIAL	((UINT16)0x0003)	hfa384x.h
8779	HFA384x_PDR_MKK_MEASUREMENTS	((UINT16)0x0004)	hfa384x.h
8780	HFA384x_PDR_NIC_RAMSIZE	((UINT16)0x0005)	hfa384x.h
8781	HFA384x_PDR_MFISUPRANGE	((UINT16)0x0006)	hfa384x.h
8782	HFA384x_PDR_CFISUPRANGE	((UINT16)0x0007)	hfa384x.h
8783	HFA384x_PDR_NICID	((UINT16)0x0008)	hfa384x.h
8784	HFA384x_PDR_MAC_ADDRESS	((UINT16)0x0101)	hfa384x.h
8785	HFA384x_PDR_REGDOMAIN	((UINT16)0x0103)	hfa384x.h
8786	HFA384x_PDR_ALLOWED_CHANNEL	((UINT16)0x0104)	hfa384x.h
8787	HFA384x_PDR_DEFAULT_CHANNEL	((UINT16)0x0105)	hfa384x.h
8788	HFA384x_PDR_TEMPTYPE	((UINT16)0x0107)	hfa384x.h
8789	HFA384x_PDR_IFR_SETTING	((UINT16)0x0200)	hfa384x.h
8790	HFA384x_PDR_RFR_SETTING	((UINT16)0x0201)	hfa384x.h
8791	HFA384x_PDR_HFA3861_BASELINE	((UINT16)0x0202)	hfa384x.h
8792	HFA384x_PDR_HFA3861_SHADOW	((UINT16)0x0203)	hfa384x.h
8793	HFA384x_PDR_HFA3861_IFRF	((UINT16)0x0204)	hfa384x.h
8794	HFA384x_PDR_HFA3861_CHCALSP	((UINT16)0x0300)	hfa384x.h
8795	HFA384x_PDR_HFA3861_CHCALI	((UINT16)0x0301)	hfa384x.h
8796	HFA384x_PDR_MAX_TX_POWER	((UINT16)0x0302)	hfa384x.h
8797	HFA384x_PDR_MASTER_CHAN_LIST	((UINT16)0x0303)	hfa384x.h
8798	HFA384x_PDR_3842_NIC_CONFIG	((UINT16)0x0400)	hfa384x.h
8799	HFA384x_PDR_USB_ID	((UINT16)0x0401)	hfa384x.h
8800	HFA384x_PDR_PCI_ID	((UINT16)0x0402)	hfa384x.h
8801	HFA384x_PDR_PCI_IFCONF	((UINT16)0x0403)	hfa384x.h
8802	HFA384x_PDR_PCI_PMCONF	((UINT16)0x0404)	hfa384x.h
8803	HFA384x_PDR_RFENRGY	((UINT16)0x0406)	hfa384x.h
8804	HFA384x_PDR_USB_POWER_TYPE	((UINT16)0x0407)	hfa384x.h
8805	HFA384x_PDR_USB_MAX_POWER	((UINT16)0x0409)	hfa384x.h
8806	HFA384x_PDR_USB_MANUFACTURER	((UINT16)0x0410)	hfa384x.h
8807	HFA384x_PDR_USB_PRODUCT	((UINT16)0x0411)	hfa384x.h
8808	HFA384x_PDR_ANT_DIVERSITY	((UINT16)0x0412)	hfa384x.h
8809	HFA384x_PDR_HFO_DELAY	((UINT16)0x0413)	hfa384x.h
8810	HFA384x_PDR_SCALE_THRESH	((UINT16)0x0414)	hfa384x.h
8811	HFA384x_PDR_HFA3861_MANF_TESTSP	((UINT16)0x0900)	hfa384x.h
8812	HFA384x_PDR_HFA3861_MANF_TESTI	((UINT16)0x0901)	hfa384x.h
8813	HFA384x_PDR_END_OF_PDA	((UINT16)0x0000)	hfa384x.h
8814	HFA384x_CMD	HFA384x_CMD_OFF	hfa384x.h
8815	HFA384x_PARAM0	HFA384x_PARAM0_OFF	hfa384x.h
8816	HFA384x_PARAM1	HFA384x_PARAM1_OFF	hfa384x.h
8817	HFA384x_PARAM2	HFA384x_PARAM2_OFF	hfa384x.h
8818	HFA384x_STATUS	HFA384x_STATUS_OFF	hfa384x.h
8819	HFA384x_RESP0	HFA384x_RESP0_OFF	hfa384x.h
8820	HFA384x_RESP1	HFA384x_RESP1_OFF	hfa384x.h
8821	HFA384x_RESP2	HFA384x_RESP2_OFF	hfa384x.h
8822	HFA384x_INFOFID	HFA384x_INFOFID_OFF	hfa384x.h
8823	HFA384x_RXFID	HFA384x_RXFID_OFF	hfa384x.h
8824	HFA384x_ALLOCFID	HFA384x_ALLOCFID_OFF	hfa384x.h
8825	HFA384x_TXCOMPLFID	HFA384x_TXCOMPLFID_OFF	hfa384x.h
8826	HFA384x_SELECT0	HFA384x_SELECT0_OFF	hfa384x.h
8827	HFA384x_OFFSET0	HFA384x_OFFSET0_OFF	hfa384x.h
8828	HFA384x_DATA0	HFA384x_DATA0_OFF	hfa384x.h
8829	HFA384x_SELECT1	HFA384x_SELECT1_OFF	hfa384x.h
8830	HFA384x_OFFSET1	HFA384x_OFFSET1_OFF	hfa384x.h
8831	HFA384x_DATA1	HFA384x_DATA1_OFF	hfa384x.h
8832	HFA384x_EVSTAT	HFA384x_EVSTAT_OFF	hfa384x.h
8833	HFA384x_INTEN	HFA384x_INTEN_OFF	hfa384x.h
8834	HFA384x_EVACK	HFA384x_EVACK_OFF	hfa384x.h
8835	HFA384x_CONTROL	HFA384x_CONTROL_OFF	hfa384x.h
8836	HFA384x_SWSUPPORT0	HFA384x_SWSUPPORT0_OFF	hfa384x.h
8837	HFA384x_SWSUPPORT1	HFA384x_SWSUPPORT1_OFF	hfa384x.h
8838	HFA384x_SWSUPPORT2	HFA384x_SWSUPPORT2_OFF	hfa384x.h
8839	HFA384x_AUXPAGE	HFA384x_AUXPAGE_OFF	hfa384x.h
8840	HFA384x_AUXOFFSET	HFA384x_AUXOFFSET_OFF	hfa384x.h
8841	HFA384x_AUXDATA	HFA384x_AUXDATA_OFF	hfa384x.h
8842	HFA384x_PCICOR	HFA384x_PCICOR_OFF	hfa384x.h
8843	HFA384x_PCIHCR	HFA384x_PCIHCR_OFF	hfa384x.h
8844	HFA384x_STATE_PREINIT	0	hfa384x.h
8845	HFA384x_STATE_INIT	1	hfa384x.h
8846	HFA384x_STATE_RUNNING	2	hfa384x.h
8847	HFA384x_HOSTAUTHASSOC_HOSTAUTH	BIT0	hfa384x.h
8848	HFA384x_HOSTAUTHASSOC_HOSTASSOC	BIT1	hfa384x.h
8849	HFA384x_WHAHANDLING_DISABLED	0	hfa384x.h
8850	HFA384x_WHAHANDLING_PASSTHROUGH	BIT1	hfa384x.h
8851	HFA384x_CNFAUTHENTICATION_OPENS	0x0001	hfa384x.h
8852	HFA384x_CNFAUTHENTICATION_SHARE	0x0002	hfa384x.h
8853	HFA384x_CNFAUTHENTICATION_LEAP	0x0004	hfa384x.h
8854	HFA384x_CREATEIBSS_JOINCREATEIB	0	hfa384x.h
8855	HFA384x_CREATEIBSS_JOINESS_JOIN	1	hfa384x.h
8856	HFA384x_CREATEIBSS_JOINIBSS	2	hfa384x.h
8857	HFA384x_CREATEIBSS_JOINESS_JOIN	3	hfa384x.h
8858	HFA384x_FWID_LEN	14	hfa384x.h
8859	HFA384x_PSTATUS_DISABLED	((UINT16)1)	hfa384x.h
8860	HFA384x_PSTATUS_SEARCHING	((UINT16)2)	hfa384x.h
8861	HFA384x_PSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
8862	HFA384x_PSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
8863	HFA384x_PSTATUS_OUTOFRANGE	((UINT16)5)	hfa384x.h
8864	HFA384x_PSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
8865	HFA384x_TESTRESULT_ALLPASSED	BIT0	hfa384x.h
8866	HFA384x_TESTRESULT_LFO_FAIL	BIT1	hfa384x.h
8867	HFA384x_TESTRESULT_VR_HF0_FAIL	BIT2	hfa384x.h
8868	HFA384x_HOST_FIRM_COORDINATE	BIT7	hfa384x.h
8869	HFA384x_TESTRESULT_COORDINATE	BIT15	hfa384x.h
8870	HFA384x_FD_STATUS_OFF	((UINT16)0x44)	hfa384x.h
8871	HFA384x_FD_TIME_OFF	((UINT16)0x46)	hfa384x.h
8872	HFA384x_FD_SWSUPPORT_OFF	((UINT16)0x4A)	hfa384x.h
8873	HFA384x_FD_SILENCE_OFF	((UINT16)0x4A)	hfa384x.h
8874	HFA384x_FD_SIGNAL_OFF	((UINT16)0x4B)	hfa384x.h
8875	HFA384x_FD_RATE_OFF	((UINT16)0x4C)	hfa384x.h
8876	HFA384x_FD_RXFLOW_OFF	((UINT16)0x4D)	hfa384x.h
8877	HFA384x_FD_RESERVED_OFF	((UINT16)0x4E)	hfa384x.h
8878	HFA384x_FD_TXCONTROL_OFF	((UINT16)0x50)	hfa384x.h
8879	HFA384x_FD_FRAMECONTROL_OFF	((UINT16)0x52)	hfa384x.h
8880	HFA384x_FD_DURATIONID_OFF	((UINT16)0x54)	hfa384x.h
8881	HFA384x_FD_ADDRESS1_OFF	((UINT16)0x56)	hfa384x.h
8882	HFA384x_FD_ADDRESS2_OFF	((UINT16)0x5C)	hfa384x.h
8883	HFA384x_FD_ADDRESS3_OFF	((UINT16)0x62)	hfa384x.h
8884	HFA384x_FD_SEQCONTROL_OFF	((UINT16)0x68)	hfa384x.h
8885	HFA384x_FD_ADDRESS4_OFF	((UINT16)0x6A)	hfa384x.h
8886	HFA384x_FD_DATALEN_OFF	((UINT16)0x70)	hfa384x.h
8887	HFA384x_FD_DESTADDRESS_OFF	((UINT16)0x72)	hfa384x.h
8888	HFA384x_FD_SRCADDRESS_OFF	((UINT16)0x78)	hfa384x.h
8889	HFA384x_FD_DATALENGTH_OFF	((UINT16)0x7E)	hfa384x.h
8890	HFA384x_TXSTATUS_ACKERR	((UINT16)BIT5)	hfa384x.h
8891	HFA384x_TXSTATUS_FORMERR	((UINT16)BIT3)	hfa384x.h
8892	HFA384x_TXSTATUS_DISCON	((UINT16)BIT2)	hfa384x.h
8893	HFA384x_TXSTATUS_AGEDERR	((UINT16)BIT1)	hfa384x.h
8894	HFA384x_TXSTATUS_RETRYERR	((UINT16)BIT0)	hfa384x.h
8895	HFA384x_TX_CFPOLL	((UINT16)BIT12)	hfa384x.h
8896	HFA384x_TX_PRST	((UINT16)BIT11)	hfa384x.h
8897	HFA384x_TX_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
8898	HFA384x_TX_NOENCRYPT	((UINT16)BIT7)	hfa384x.h
8899	HFA384x_TX_RETRYSTRAT	((UINT16)(BIT6 \| BIT5))	hfa384x.h
8900	HFA384x_TX_STRUCTYPE	((UINT16)(BIT4 \| BIT3))	hfa384x.h
8901	HFA384x_TX_TXEX	((UINT16)BIT2)	hfa384x.h
8902	HFA384x_TX_TXOK	((UINT16)BIT1)	hfa384x.h
8903	HFA384x_RX_DATA_LEN_OFF	((UINT16)44)	hfa384x.h
8904	HFA384x_RX_80211HDR_OFF	((UINT16)14)	hfa384x.h
8905	HFA384x_RX_DATA_OFF	((UINT16)60)	hfa384x.h
8906	HFA384x_RXSTATUS_MSGTYPE	((UINT16)(BIT15 \| BIT14 \| BIT13))	hfa384x.h
8907	HFA384x_RXSTATUS_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
8908	HFA384x_RXSTATUS_UNDECR	((UINT16)BIT1)	hfa384x.h
8909	HFA384x_RXSTATUS_FCSERR	((UINT16)BIT0)	hfa384x.h
8910	HFA384x_IT_HANDOVERADDR	((UINT16)0xF000UL)	hfa384x.h
8911	HFA384x_IT_HANDOVERDEAUTHADDRES	((UINT16)0xF001UL)	hfa384x.h	AP 1.3.7
8912	HFA384x_IT_COMMTALLIES	((UINT16)0xF100UL)	hfa384x.h
8913	HFA384x_IT_SCANRESULTS	((UINT16)0xF101UL)	hfa384x.h
8914	HFA384x_IT_CHINFORESULTS	((UINT16)0xF102UL)	hfa384x.h
8915	HFA384x_IT_HOSTSCANRESULTS	((UINT16)0xF103UL)	hfa384x.h
8916	HFA384x_IT_LINKSTATUS	((UINT16)0xF200UL)	hfa384x.h
8917	HFA384x_IT_ASSOCSTATUS	((UINT16)0xF201UL)	hfa384x.h
8918	HFA384x_IT_AUTHREQ	((UINT16)0xF202UL)	hfa384x.h
8919	HFA384x_IT_PSUSERCNT	((UINT16)0xF203UL)	hfa384x.h
8920	HFA384x_IT_KEYIDCHANGED	((UINT16)0xF204UL)	hfa384x.h
8921	HFA384x_IT_ASSOCREQ	((UINT16)0xF205UL)	hfa384x.h
8922	HFA384x_IT_MICFAILURE	((UINT16)0xF206UL)	hfa384x.h
8923	HFA384x_CHINFORESULT_BSSACTIVE	BIT0	hfa384x.h
8924	HFA384x_CHINFORESULT_PCFACTIVE	BIT1	hfa384x.h
8925	HFA384x_LINK_NOTCONNECTED	((UINT16)0)	hfa384x.h
8926	HFA384x_LINK_CONNECTED	((UINT16)1)	hfa384x.h
8927	HFA384x_LINK_DISCONNECTED	((UINT16)2)	hfa384x.h
8928	HFA384x_LINK_AP_CHANGE	((UINT16)3)	hfa384x.h
8929	HFA384x_LINK_AP_OUTOFRANGE	((UINT16)4)	hfa384x.h
8930	HFA384x_LINK_AP_INRANGE	((UINT16)5)	hfa384x.h
8931	HFA384x_LINK_ASSOCFAIL	((UINT16)6)	hfa384x.h
8932	HFA384x_ASSOCSTATUS_STAASSOC	((UINT16)1)	hfa384x.h
8933	HFA384x_ASSOCSTATUS_REASSOC	((UINT16)2)	hfa384x.h
8934	HFA384x_ASSOCSTATUS_DISASSOC	((UINT16)3)	hfa384x.h
8935	HFA384x_ASSOCSTATUS_ASSOCFAIL	((UINT16)4)	hfa384x.h
8936	HFA384x_ASSOCSTATUS_AUTHFAIL	((UINT16)5)	hfa384x.h
8937	HFA384x_ASSOCREQ_TYPE_ASSOC	0	hfa384x.h
8938	HFA384x_ASSOCREQ_TYPE_REASSOC	1	hfa384x.h
8939	HFA384x_USB_ENBULKIN	6	hfa384x.h
8940	HFA384x_USB_TXFRM	0	hfa384x.h
8941	HFA384x_USB_CMDREQ	1	hfa384x.h
8942	HFA384x_USB_WRIDREQ	2	hfa384x.h
8943	HFA384x_USB_RRIDREQ	3	hfa384x.h
8944	HFA384x_USB_WMEMREQ	4	hfa384x.h
8945	HFA384x_USB_RMEMREQ	5	hfa384x.h
8946	HFA384x_USB_INFOFRM	0x8000	hfa384x.h
8947	HFA384x_USB_CMDRESP	0x8001	hfa384x.h
8948	HFA384x_USB_WRIDRESP	0x8002	hfa384x.h
8949	HFA384x_USB_RRIDRESP	0x8003	hfa384x.h
8950	HFA384x_USB_WMEMRESP	0x8004	hfa384x.h
8951	HFA384x_USB_RMEMRESP	0x8005	hfa384x.h
8952	HFA384x_USB_BUFAVAIL	0x8006	hfa384x.h
8953	HFA384x_USB_ERROR	0x8007	hfa384x.h
8954	MAX_PRISM2_GRP_ADDR	16	hfa384x.h
8955	MAX_GRP_ADDR	32	hfa384x.h
8956	WLAN_COMMENT_MAX	80	hfa384x.h	Max. length of user comment string.
8957	MM_SAT_PCF	(BIT14)	hfa384x.h
8958	MM_GCSD_PCF	(BIT15)	hfa384x.h
8959	MM_GCSD_PCF_EB	(BIT14 \| BIT15)	hfa384x.h
8960	WLAN_STATE_STOPPED	0	hfa384x.h	Network is not active.
8961	WLAN_STATE_STARTED	1	hfa384x.h	Network has been started.
8962	WLAN_AUTH_MAX	60	hfa384x.h	Max. # of authenticated stations.
8963	WLAN_ACCESS_MAX	60	hfa384x.h	Max. # of stations in an access list.
8964	WLAN_ACCESS_NONE	0	hfa384x.h	No stations may be authenticated.
8965	WLAN_ACCESS_ALL	1	hfa384x.h	All stations may be authenticated.
8966	WLAN_ACCESS_ALLOW	2	hfa384x.h	Authenticate only "allowed" stations.
8967	WLAN_ACCESS_DENY	3	hfa384x.h	Do not authenticate "denied" stations.
8968	hfa384x_getreg	__hfa384x_getreg_noswap	hfa384x.h
8969	hfa384x_setreg	__hfa384x_setreg_noswap	hfa384x.h
8970	hfa384x_getreg_noswap	__hfa384x_getreg	hfa384x.h
8971	hfa384x_setreg_noswap	__hfa384x_setreg	hfa384x.h
8972	hfa384x_getreg	__hfa384x_getreg	hfa384x.h
8973	hfa384x_setreg	__hfa384x_setreg	hfa384x.h
8974	hfa384x_getreg_noswap	__hfa384x_getreg_noswap	hfa384x.h
8975	hfa384x_setreg_noswap	__hfa384x_setreg_noswap	hfa384x.h
8976	MTNIC_MAX_PORTS	2	mtnic.h
8977	MTNIC_PORT1	0	mtnic.h
8978	MTNIC_PORT2	1	mtnic.h
8979	NUM_TX_RINGS	1	mtnic.h
8980	NUM_RX_RINGS	1	mtnic.h
8981	NUM_CQS	(NUM_RX_RINGS + NUM_TX_RINGS)	mtnic.h
8982	GO_BIT_TIMEOUT	6000	mtnic.h
8983	TBIT_RETRIES	100	mtnic.h
8984	UNITS_BUFFER_SIZE	8	mtnic.h	can be configured to 4/8/16
8985	MAX_GAP_PROD_CONS	( UNITS_BUFFER_SIZE / 4 )	mtnic.h
8986	ETH_DEF_LEN	1540	mtnic.h	40 bytes used by the card
8987	ETH_FCS_LEN	14	mtnic.h
8988	DEF_MTU	ETH_DEF_LEN + ETH_FCS_LEN	mtnic.h
8989	DEF_IOBUF_SIZE	ETH_DEF_LEN	mtnic.h
8990	MAC_ADDRESS_SIZE	6	mtnic.h
8991	NUM_EQES	16	mtnic.h
8992	ROUND_TO_CHECK	0x400	mtnic.h
8993	DELAY_LINK_CHECK	300	mtnic.h
8994	CHECK_LINK_TIMES	7	mtnic.h
8995	dma_addr_t	unsigned long	mtnic.h
8996	PAGE_SIZE	4096	mtnic.h
8997	PAGE_MASK	(PAGE_SIZE - 1)	mtnic.h
8998	MTNIC_MAILBOX_SIZE	PAGE_SIZE	mtnic.h
8999	MTNIC_RESET_OFFSET	0xF0010	mtnic.h
9000	NATSEMI_HW_TIMEOUT	400	natsemi.h
9001	TX_RING_SIZE	4	natsemi.h
9002	NUM_RX_DESC	4	natsemi.h
9003	RX_BUF_SIZE	1536	natsemi.h
9004	OWN	0x80000000	natsemi.h
9005	DSIZE	0x00000FFF	natsemi.h
9006	CRC_SIZE	4	natsemi.h
9007	PHYID_AM79C874	0x0022561b	natsemi.h
9008	SRR_DP83815_C	0x0302	natsemi.h
9009	SRR_DP83815_D	0x0403	natsemi.h
9010	SRR_DP83816_A4	0x0504	natsemi.h
9011	SRR_DP83816_A5	0x0505	natsemi.h
9012	PMDCSR_VAL	0x189c	natsemi.h	enable preferred adaptation circuitry
9013	TSTDAT_VAL	0x0	natsemi.h
9014	DSPCFG_VAL	0x5040	natsemi.h
9015	SDCFG_VAL	0x008c	natsemi.h	set voltage thresholds for Signal Detect
9016	DSPCFG_LOCK	0x20	natsemi.h	coefficient lock bit in DSPCFG
9017	DSPCFG_COEF	0x1000	natsemi.h	see coefficient (in TSTDAT) bit in DSPCFG
9018	TSTDAT_FIXED	0xe8	natsemi.h	magic number for bad coefficients
9019	CFG_RESET_SAVE	0xfde000	natsemi.h
9020	WCSR_RESET_SAVE	0x61f	natsemi.h
9021	RFCR_RESET_SAVE	0xf8500000;	natsemi.h
9022	EE_Write0	(EE_ChipSelect)	natsemi.h
9023	EE_Write1	(EE_ChipSelect \| EE_DataIn)	natsemi.h
9024	EE_CS	0x08	natsemi.h	EEPROM chip select
9025	EE_SK	0x04	natsemi.h	EEPROM shift clock
9026	EE_DI	0x01	natsemi.h	Data in
9027	EE_DO	0x02	natsemi.h	Data out
9028	EE_MAC	7	natsemi.h
9029	EE_REG	EECtrl	natsemi.h
9030	VENDOR_NONE	0	ns8390.h
9031	VENDOR_WD	1	ns8390.h
9032	VENDOR_NOVELL	2	ns8390.h
9033	VENDOR_3COM	3	ns8390.h
9034	FLAG_PIO	0x01	ns8390.h
9035	FLAG_16BIT	0x02	ns8390.h
9036	FLAG_790	0x04	ns8390.h
9037	MEM_8192	32	ns8390.h
9038	MEM_16384	64	ns8390.h
9039	MEM_32768	128	ns8390.h
9040	ISA_MAX_ADDR	0x400	ns8390.h
9041	WD_LOW_BASE	0x200	ns8390.h
9042	WD_HIGH_BASE	0x3e0	ns8390.h
9043	WD_DEFAULT_MEM	0xD0000	ns8390.h
9044	WD_NIC_ADDR	0x10	ns8390.h
9045	WD_MSR	0x00	ns8390.h
9046	WD_ICR	0x01	ns8390.h
9047	WD_IAR	0x02	ns8390.h
9048	WD_BIO	0x03	ns8390.h
9049	WD_IRR	0x04	ns8390.h
9050	WD_LAAR	0x05	ns8390.h
9051	WD_IJR	0x06	ns8390.h
9052	WD_GP2	0x07	ns8390.h
9053	WD_LAR	0x08	ns8390.h
9054	WD_BID	0x0E	ns8390.h
9055	WD_ICR_16BIT	0x01	ns8390.h
9056	WD_MSR_MENB	0x40	ns8390.h
9057	WD_LAAR_L16EN	0x40	ns8390.h
9058	WD_LAAR_M16EN	0x80	ns8390.h
9059	WD_SOFTCONFIG	0x20	ns8390.h
9060	TYPE_WD8003S	0x02	ns8390.h
9061	TYPE_WD8003E	0x03	ns8390.h
9062	TYPE_WD8013EBT	0x05	ns8390.h
9063	TYPE_WD8003W	0x24	ns8390.h
9064	TYPE_WD8003EB	0x25	ns8390.h
9065	TYPE_WD8013W	0x26	ns8390.h
9066	TYPE_WD8013EP	0x27	ns8390.h
9067	TYPE_WD8013WC	0x28	ns8390.h
9068	TYPE_WD8013EPC	0x29	ns8390.h
9069	TYPE_SMC8216T	0x2a	ns8390.h
9070	TYPE_SMC8216C	0x2b	ns8390.h
9071	TYPE_SMC8416T	0x00	ns8390.h	Bogus entries: the 8416 generates the
9072	TYPE_SMC8416C	0x00	ns8390.h	the same codes as the 8216.
9073	TYPE_SMC8013EBP	0x2c	ns8390.h
9074	_3COM_BASE	0x300	ns8390.h
9075	_3COM_TX_PAGE_OFFSET_8BIT	0x20	ns8390.h
9076	_3COM_TX_PAGE_OFFSET_16BIT	0x0	ns8390.h
9077	_3COM_RX_PAGE_OFFSET_16BIT	0x20	ns8390.h
9078	_3COM_ASIC_OFFSET	0x400	ns8390.h
9079	_3COM_NIC_OFFSET	0x0	ns8390.h
9080	_3COM_PSTR	0	ns8390.h
9081	_3COM_PSPR	1	ns8390.h
9082	_3COM_BCFR	3	ns8390.h
9083	_3COM_BCFR_2E0	0x01	ns8390.h
9084	_3COM_BCFR_2A0	0x02	ns8390.h
9085	_3COM_BCFR_280	0x04	ns8390.h
9086	_3COM_BCFR_250	0x08	ns8390.h
9087	_3COM_BCFR_350	0x10	ns8390.h
9088	_3COM_BCFR_330	0x20	ns8390.h
9089	_3COM_BCFR_310	0x40	ns8390.h
9090	_3COM_BCFR_300	0x80	ns8390.h
9091	_3COM_PCFR	4	ns8390.h
9092	_3COM_PCFR_PIO	0	ns8390.h
9093	_3COM_PCFR_C8000	0x10	ns8390.h
9094	_3COM_PCFR_CC000	0x20	ns8390.h
9095	_3COM_PCFR_D8000	0x40	ns8390.h
9096	_3COM_PCFR_DC000	0x80	ns8390.h
9097	_3COM_CR	6	ns8390.h
9098	_3COM_CR_RST	0x01	ns8390.h	Reset GA and NIC
9099	_3COM_CR_XSEL	0x02	ns8390.h	Transceiver select. BNC=1(def) AUI=0
9100	_3COM_CR_EALO	0x04	ns8390.h	window EA PROM 0-15 to I/O base
9101	_3COM_CR_EAHI	0x08	ns8390.h	window EA PROM 16-31 to I/O base
9102	_3COM_CR_SHARE	0x10	ns8390.h	select interrupt sharing option
9103	_3COM_CR_DBSEL	0x20	ns8390.h	Double buffer select
9104	_3COM_CR_DDIR	0x40	ns8390.h	DMA direction select
9105	_3COM_CR_START	0x80	ns8390.h	Start DMA controller
9106	_3COM_GACFR	5	ns8390.h
9107	_3COM_GACFR_MBS0	0x01	ns8390.h
9108	_3COM_GACFR_MBS1	0x02	ns8390.h
9109	_3COM_GACFR_MBS2	0x04	ns8390.h
9110	_3COM_GACFR_RSEL	0x08	ns8390.h	enable shared memory
9111	_3COM_GACFR_TEST	0x10	ns8390.h	for GA testing
9112	_3COM_GACFR_OWS	0x20	ns8390.h	select 0WS access to GA
9113	_3COM_GACFR_TCM	0x40	ns8390.h	Mask DMA interrupts
9114	_3COM_GACFR_NIM	0x80	ns8390.h	Mask NIC interrupts
9115	_3COM_STREG	7	ns8390.h
9116	_3COM_STREG_REV	0x07	ns8390.h	GA revision
9117	_3COM_STREG_DIP	0x08	ns8390.h	DMA in progress
9118	_3COM_STREG_DTC	0x10	ns8390.h	DMA terminal count
9119	_3COM_STREG_OFLW	0x20	ns8390.h	Overflow
9120	_3COM_STREG_UFLW	0x40	ns8390.h	Underflow
9121	_3COM_STREG_DPRDY	0x80	ns8390.h	Data port ready
9122	_3COM_IDCFR	8	ns8390.h
9123	_3COM_IDCFR_DRQ0	0x01	ns8390.h	DMA request 1 select
9124	_3COM_IDCFR_DRQ1	0x02	ns8390.h	DMA request 2 select
9125	_3COM_IDCFR_DRQ2	0x04	ns8390.h	DMA request 3 select
9126	_3COM_IDCFR_UNUSED	0x08	ns8390.h	not used
9127	_3COM_IDCFR_IRQ2	0x10	ns8390.h	Interrupt request 2 select
9128	_3COM_IDCFR_IRQ3	0x20	ns8390.h	Interrupt request 3 select
9129	_3COM_IDCFR_IRQ4	0x40	ns8390.h	Interrupt request 4 select
9130	_3COM_IDCFR_IRQ5	0x80	ns8390.h	Interrupt request 5 select
9131	_3COM_IRQ2	2	ns8390.h
9132	_3COM_IRQ3	3	ns8390.h
9133	_3COM_IRQ4	4	ns8390.h
9134	_3COM_IRQ5	5	ns8390.h
9135	_3COM_DAMSB	9	ns8390.h
9136	_3COM_DALSB	0x0a	ns8390.h
9137	_3COM_VPTR2	0x0b	ns8390.h
9138	_3COM_VPTR1	0x0c	ns8390.h
9139	_3COM_VPTR0	0x0d	ns8390.h
9140	_3COM_RFMSB	0x0e	ns8390.h
9141	_3COM_RFLSB	0x0f	ns8390.h
9142	NE_ASIC_OFFSET	0x10	ns8390.h
9143	NE_RESET	0x0F	ns8390.h	Used to reset card
9144	NE_DATA	0x00	ns8390.h	Used to read/write NIC mem
9145	COMPEX_RL2000_TRIES	200	ns8390.h
9146	D8390_P0_COMMAND	0x00	ns8390.h
9147	D8390_P0_PSTART	0x01	ns8390.h
9148	D8390_P0_PSTOP	0x02	ns8390.h
9149	D8390_P0_BOUND	0x03	ns8390.h
9150	D8390_P0_TSR	0x04	ns8390.h
9151	D8390_P0_TPSR	0x04	ns8390.h
9152	D8390_P0_TBCR0	0x05	ns8390.h
9153	D8390_P0_TBCR1	0x06	ns8390.h
9154	D8390_P0_ISR	0x07	ns8390.h
9155	D8390_P0_RSAR0	0x08	ns8390.h
9156	D8390_P0_RSAR1	0x09	ns8390.h
9157	D8390_P0_RBCR0	0x0A	ns8390.h
9158	D8390_P0_RBCR1	0x0B	ns8390.h
9159	D8390_P0_RSR	0x0C	ns8390.h
9160	D8390_P0_RCR	0x0C	ns8390.h
9161	D8390_P0_TCR	0x0D	ns8390.h
9162	D8390_P0_DCR	0x0E	ns8390.h
9163	D8390_P0_IMR	0x0F	ns8390.h
9164	D8390_P1_COMMAND	0x00	ns8390.h
9165	D8390_P1_PAR0	0x01	ns8390.h
9166	D8390_P1_PAR1	0x02	ns8390.h
9167	D8390_P1_PAR2	0x03	ns8390.h
9168	D8390_P1_PAR3	0x04	ns8390.h
9169	D8390_P1_PAR4	0x05	ns8390.h
9170	D8390_P1_PAR5	0x06	ns8390.h
9171	D8390_P1_CURR	0x07	ns8390.h
9172	D8390_P1_MAR0	0x08	ns8390.h
9173	D8390_COMMAND_PS0	0x0	ns8390.h	Page 0 select
9174	D8390_COMMAND_PS1	0x40	ns8390.h	Page 1 select
9175	D8390_COMMAND_PS2	0x80	ns8390.h	Page 2 select
9176	D8390_COMMAND_RD2	0x20	ns8390.h	Remote DMA control
9177	D8390_COMMAND_RD1	0x10	ns8390.h
9178	D8390_COMMAND_RD0	0x08	ns8390.h
9179	D8390_COMMAND_TXP	0x04	ns8390.h	transmit packet
9180	D8390_COMMAND_STA	0x02	ns8390.h	start
9181	D8390_COMMAND_STP	0x01	ns8390.h	stop
9182	D8390_RCR_MON	0x20	ns8390.h	monitor mode
9183	D8390_DCR_FT1	0x40	ns8390.h
9184	D8390_DCR_LS	0x08	ns8390.h	Loopback select
9185	D8390_DCR_WTS	0x01	ns8390.h	Word transfer select
9186	D8390_ISR_PRX	0x01	ns8390.h	successful recv
9187	D8390_ISR_PTX	0x02	ns8390.h	successful xmit
9188	D8390_ISR_RXE	0x04	ns8390.h	receive error
9189	D8390_ISR_TXE	0x08	ns8390.h	transmit error
9190	D8390_ISR_OVW	0x10	ns8390.h	Overflow
9191	D8390_ISR_CNT	0x20	ns8390.h	Counter overflow
9192	D8390_ISR_RDC	0x40	ns8390.h	Remote DMA complete
9193	D8390_ISR_RST	0x80	ns8390.h	reset
9194	D8390_RSTAT_PRX	0x01	ns8390.h	successful recv
9195	D8390_RSTAT_CRC	0x02	ns8390.h	CRC error
9196	D8390_RSTAT_FAE	0x04	ns8390.h	Frame alignment error
9197	D8390_RSTAT_OVER	0x08	ns8390.h	FIFO overrun
9198	D8390_TXBUF_SIZE	6	ns8390.h
9199	D8390_RXBUF_END	32	ns8390.h
9200	D8390_PAGE_SIZE	256	ns8390.h
9201	WLAN_ADDR_LEN	6	p80211hdr.h
9202	WLAN_CRC_LEN	4	p80211hdr.h
9203	WLAN_BSSID_LEN	6	p80211hdr.h
9204	WLAN_BSS_TS_LEN	8	p80211hdr.h
9205	WLAN_HDR_A3_LEN	24	p80211hdr.h
9206	WLAN_HDR_A4_LEN	30	p80211hdr.h
9207	WLAN_SSID_MAXLEN	32	p80211hdr.h
9208	WLAN_DATA_MAXLEN	2312	p80211hdr.h
9209	WLAN_A3FR_MAXLEN	(WLAN_HDR_A3_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
9210	WLAN_A4FR_MAXLEN	(WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
9211	WLAN_BEACON_FR_MAXLEN	(WLAN_HDR_A3_LEN + 334)	p80211hdr.h
9212	WLAN_ATIM_FR_MAXLEN	(WLAN_HDR_A3_LEN + 0)	p80211hdr.h
9213	WLAN_DISASSOC_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
9214	WLAN_ASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 48)	p80211hdr.h
9215	WLAN_ASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
9216	WLAN_REASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 54)	p80211hdr.h
9217	WLAN_REASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
9218	WLAN_PROBEREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 44)	p80211hdr.h
9219	WLAN_PROBERESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 78)	p80211hdr.h
9220	WLAN_AUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 261)	p80211hdr.h
9221	WLAN_DEAUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
9222	WLAN_WEP_NKEYS	4	p80211hdr.h
9223	WLAN_WEP_MAXKEYLEN	13	p80211hdr.h
9224	WLAN_CHALLENGE_IE_LEN	130	p80211hdr.h
9225	WLAN_CHALLENGE_LEN	128	p80211hdr.h
9226	WLAN_WEP_IV_LEN	4	p80211hdr.h
9227	WLAN_WEP_ICV_LEN	4	p80211hdr.h
9228	WLAN_FTYPE_MGMT	0x00	p80211hdr.h
9229	WLAN_FTYPE_CTL	0x01	p80211hdr.h
9230	WLAN_FTYPE_DATA	0x02	p80211hdr.h
9231	WLAN_FSTYPE_ASSOCREQ	0x00	p80211hdr.h
9232	WLAN_FSTYPE_ASSOCRESP	0x01	p80211hdr.h
9233	WLAN_FSTYPE_REASSOCREQ	0x02	p80211hdr.h
9234	WLAN_FSTYPE_REASSOCRESP	0x03	p80211hdr.h
9235	WLAN_FSTYPE_PROBEREQ	0x04	p80211hdr.h
9236	WLAN_FSTYPE_PROBERESP	0x05	p80211hdr.h
9237	WLAN_FSTYPE_BEACON	0x08	p80211hdr.h
9238	WLAN_FSTYPE_ATIM	0x09	p80211hdr.h
9239	WLAN_FSTYPE_DISASSOC	0x0a	p80211hdr.h
9240	WLAN_FSTYPE_AUTHEN	0x0b	p80211hdr.h
9241	WLAN_FSTYPE_DEAUTHEN	0x0c	p80211hdr.h
9242	WLAN_FSTYPE_BLOCKACKREQ	0x8	p80211hdr.h
9243	WLAN_FSTYPE_BLOCKACK	0x9	p80211hdr.h
9244	WLAN_FSTYPE_PSPOLL	0x0a	p80211hdr.h
9245	WLAN_FSTYPE_RTS	0x0b	p80211hdr.h
9246	WLAN_FSTYPE_CTS	0x0c	p80211hdr.h
9247	WLAN_FSTYPE_ACK	0x0d	p80211hdr.h
9248	WLAN_FSTYPE_CFEND	0x0e	p80211hdr.h
9249	WLAN_FSTYPE_CFENDCFACK	0x0f	p80211hdr.h
9250	WLAN_FSTYPE_DATAONLY	0x00	p80211hdr.h
9251	WLAN_FSTYPE_DATA_CFACK	0x01	p80211hdr.h
9252	WLAN_FSTYPE_DATA_CFPOLL	0x02	p80211hdr.h
9253	WLAN_FSTYPE_DATA_CFACK_CFPOLL	0x03	p80211hdr.h
9254	WLAN_FSTYPE_NULL	0x04	p80211hdr.h
9255	WLAN_FSTYPE_CFACK	0x05	p80211hdr.h
9256	WLAN_FSTYPE_CFPOLL	0x06	p80211hdr.h
9257	WLAN_FSTYPE_CFACK_CFPOLL	0x07	p80211hdr.h
9258	WLAN_FCS_LEN	4	p80211hdr.h
9259	PNIC_PCI_VENDOR	0xfefe	pnic_api.h	Hopefully these won't clash with
9260	PNIC_PCI_DEVICE	0xefef	pnic_api.h	any real PCI device IDs.
9261	PNIC_REG_CMD	0x00	pnic_api.h	Command register, 2 bytes, write only
9262	PNIC_REG_STAT	0x00	pnic_api.h	Status register, 2 bytes, read only
9263	PNIC_REG_LEN	0x02	pnic_api.h	Length register, 2 bytes, read-write
9264	PNIC_REG_DATA	0x04	pnic_api.h	Data port, 1 byte, read-write
9265	PNIC_MAX_REG	0x04	pnic_api.h
9266	PNIC_CMD_NOOP	0x0000	pnic_api.h
9267	PNIC_CMD_API_VER	0x0001	pnic_api.h
9268	PNIC_CMD_READ_MAC	0x0002	pnic_api.h
9269	PNIC_CMD_RESET	0x0003	pnic_api.h
9270	PNIC_CMD_XMIT	0x0004	pnic_api.h
9271	PNIC_CMD_RECV	0x0005	pnic_api.h
9272	PNIC_CMD_RECV_QLEN	0x0006	pnic_api.h
9273	PNIC_CMD_MASK_IRQ	0x0007	pnic_api.h
9274	PNIC_CMD_FORCE_IRQ	0x0008	pnic_api.h
9275	PNIC_STATUS_OK	0x4f4b	pnic_api.h	'OK'
9276	PNIC_STATUS_UNKNOWN_CMD	0x3f3f	pnic_api.h	'??'
9277	PNIC_API_VERSION	0x0101	pnic_api.h	1.1
9278	PCI_EXP_DEVCTL	8	r8169.h	Device Control
9279	PCI_EXP_DEVCTL_READRQ	0x7000	r8169.h	Max_Read_Request_Size
9280	PCI_EXP_LNKCTL	16	r8169.h	Link Control
9281	PCI_EXP_LNKCTL_CLKREQ_EN	0x100	r8169.h	Enable clkreq
9282	PCI_EXP_DEVCTL_NOSNOOP_EN	0x0800	r8169.h	Enable No Snoop
9283	SPEED_10	10	r8169.h
9284	SPEED_100	100	r8169.h
9285	SPEED_1000	1000	r8169.h
9286	SPEED_2500	2500	r8169.h
9287	SPEED_10000	10000	r8169.h
9288	DUPLEX_HALF	0x00	r8169.h
9289	DUPLEX_FULL	0x01	r8169.h
9290	MII_BMCR	0x00	r8169.h	Basic mode control register
9291	MII_BMSR	0x01	r8169.h	Basic mode status register
9292	MII_PHYSID1	0x02	r8169.h	PHYS ID 1
9293	MII_PHYSID2	0x03	r8169.h	PHYS ID 2
9294	MII_ADVERTISE	0x04	r8169.h	Advertisement control reg
9295	MII_LPA	0x05	r8169.h	Link partner ability reg
9296	MII_EXPANSION	0x06	r8169.h	Expansion register
9297	MII_CTRL1000	0x09	r8169.h	1000BASE-T control
9298	MII_STAT1000	0x0a	r8169.h	1000BASE-T status
9299	MII_ESTATUS	0x0f	r8169.h	Extended Status
9300	MII_DCOUNTER	0x12	r8169.h	Disconnect counter
9301	MII_FCSCOUNTER	0x13	r8169.h	False carrier counter
9302	MII_NWAYTEST	0x14	r8169.h	N-way auto-neg test reg
9303	MII_RERRCOUNTER	0x15	r8169.h	Receive error counter
9304	MII_SREVISION	0x16	r8169.h	Silicon revision
9305	MII_RESV1	0x17	r8169.h	Reserved...
9306	MII_LBRERROR	0x18	r8169.h	Lpback, rx, bypass error
9307	MII_PHYADDR	0x19	r8169.h	PHY address
9308	MII_RESV2	0x1a	r8169.h	Reserved...
9309	MII_TPISTATUS	0x1b	r8169.h	TPI status for 10mbps
9310	MII_NCONFIG	0x1c	r8169.h	Network interface config
9311	BMCR_RESV	0x003f	r8169.h	Unused...
9312	BMCR_SPEED1000	0x0040	r8169.h	MSB of Speed (1000)
9313	BMCR_CTST	0x0080	r8169.h	Collision test
9314	BMCR_FULLDPLX	0x0100	r8169.h	Full duplex
9315	BMCR_ANRESTART	0x0200	r8169.h	Auto negotiation restart
9316	BMCR_ISOLATE	0x0400	r8169.h	Disconnect DP83840 from MII
9317	BMCR_PDOWN	0x0800	r8169.h	Powerdown the DP83840
9318	BMCR_ANENABLE	0x1000	r8169.h	Enable auto negotiation
9319	BMCR_SPEED100	0x2000	r8169.h	Select 100Mbps
9320	BMCR_LOOPBACK	0x4000	r8169.h	TXD loopback bits
9321	BMCR_RESET	0x8000	r8169.h	Reset the DP83840
9322	BMSR_ERCAP	0x0001	r8169.h	Ext-reg capability
9323	BMSR_JCD	0x0002	r8169.h	Jabber detected
9324	BMSR_LSTATUS	0x0004	r8169.h	Link status
9325	BMSR_ANEGCAPABLE	0x0008	r8169.h	Able to do auto-negotiation
9326	BMSR_RFAULT	0x0010	r8169.h	Remote fault detected
9327	BMSR_ANEGCOMPLETE	0x0020	r8169.h	Auto-negotiation complete
9328	BMSR_RESV	0x00c0	r8169.h	Unused...
9329	BMSR_ESTATEN	0x0100	r8169.h	Extended Status in R15
9330	BMSR_100HALF2	0x0200	r8169.h	Can do 100BASE-T2 HDX
9331	BMSR_100FULL2	0x0400	r8169.h	Can do 100BASE-T2 FDX
9332	BMSR_10HALF	0x0800	r8169.h	Can do 10mbps, half-duplex
9333	BMSR_10FULL	0x1000	r8169.h	Can do 10mbps, full-duplex
9334	BMSR_100HALF	0x2000	r8169.h	Can do 100mbps, half-duplex
9335	BMSR_100FULL	0x4000	r8169.h	Can do 100mbps, full-duplex
9336	BMSR_100BASE4	0x8000	r8169.h	Can do 100mbps, 4k packets
9337	AUTONEG_DISABLE	0x00	r8169.h
9338	AUTONEG_ENABLE	0x01	r8169.h
9339	MII_ADVERTISE	0x04	r8169.h	Advertisement control reg
9340	ADVERTISE_SLCT	0x001f	r8169.h	Selector bits
9341	ADVERTISE_CSMA	0x0001	r8169.h	Only selector supported
9342	ADVERTISE_10HALF	0x0020	r8169.h	Try for 10mbps half-duplex
9343	ADVERTISE_1000XFULL	0x0020	r8169.h	Try for 1000BASE-X full-duplex
9344	ADVERTISE_10FULL	0x0040	r8169.h	Try for 10mbps full-duplex
9345	ADVERTISE_1000XHALF	0x0040	r8169.h	Try for 1000BASE-X half-duplex
9346	ADVERTISE_100HALF	0x0080	r8169.h	Try for 100mbps half-duplex
9347	ADVERTISE_1000XPAUSE	0x0080	r8169.h	Try for 1000BASE-X pause
9348	ADVERTISE_100FULL	0x0100	r8169.h	Try for 100mbps full-duplex
9349	ADVERTISE_1000XPSE_ASYM	0x0100	r8169.h	Try for 1000BASE-X asym pause
9350	ADVERTISE_100BASE4	0x0200	r8169.h	Try for 100mbps 4k packets
9351	ADVERTISE_PAUSE_CAP	0x0400	r8169.h	Try for pause
9352	ADVERTISE_PAUSE_ASYM	0x0800	r8169.h	Try for asymetric pause
9353	ADVERTISE_RESV	0x1000	r8169.h	Unused...
9354	ADVERTISE_RFAULT	0x2000	r8169.h	Say we can detect faults
9355	ADVERTISE_LPACK	0x4000	r8169.h	Ack link partners response
9356	ADVERTISE_NPAGE	0x8000	r8169.h	Next page bit
9357	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	r8169.h
9358	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	r8169.h
9359	ADVERTISE_1000FULL	0x0200	r8169.h	Advertise 1000BASE-T full duplex
9360	ADVERTISE_1000HALF	0x0100	r8169.h	Advertise 1000BASE-T half duplex
9361	MAC_ADDR_LEN	6	r8169.h
9362	MAX_READ_REQUEST_SHIFT	12	r8169.h
9363	RX_FIFO_THRESH	7	r8169.h	7 means NO threshold, Rx buffer level before first PCI xfer.
9364	RX_DMA_BURST	6	r8169.h	Maximum PCI burst, '6' is 1024
9365	TX_DMA_BURST	6	r8169.h	Maximum PCI burst, '6' is 1024
9366	EarlyTxThld	0x3F	r8169.h	0x3F means NO early transmit
9367	RxPacketMaxSize	0x3FE8	r8169.h	16K - 1 - ETH_HLEN - VLAN - CRC...
9368	SafeMtu	0x1c20	r8169.h	... actually life sucks beyond ~7k
9369	InterFrameGap	0x03	r8169.h	3 means InterFrameGap = the shortest one
9370	R8169_REGS_SIZE	256	r8169.h
9371	R8169_NAPI_WEIGHT	64	r8169.h
9372	NUM_TX_DESC	8	r8169.h	Number of Tx descriptor registers
9373	NUM_RX_DESC	8	r8169.h	Number of Rx descriptor registers
9374	RX_BUF_SIZE	1536	r8169.h	Rx Buffer size
9375	R8169_TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))	r8169.h
9376	R8169_RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))	r8169.h
9377	TX_RING_ALIGN	256	r8169.h
9378	RX_RING_ALIGN	256	r8169.h
9379	RTL8169_TX_TIMEOUT	(6*HZ)	r8169.h
9380	RTL8169_PHY_TIMEOUT	(10*HZ)	r8169.h
9381	RTL_EEPROM_SIG	cpu_to_le32(0x8129)	r8169.h
9382	RTL_EEPROM_SIG_MASK	cpu_to_le32(0xffff)	r8169.h
9383	RTL_EEPROM_SIG_ADDR	0x0000	r8169.h
9384	RsvdMask	0x3fffc000	r8169.h
9385	SIS900_TOTAL_SIZE	0x100	sis900.h
9386	MAX_DMA_RANGE	7	sis900.h	actually 0 means MAXIMUM !!
9387	TxMXDMA_shift	20	sis900.h
9388	RxMXDMA_shift	20	sis900.h
9389	TX_DMA_BURST	0	sis900.h
9390	RX_DMA_BURST	0	sis900.h
9391	TX_FILL_THRESH	16	sis900.h	1/4 FIFO size
9392	TxFILLT_shift	8	sis900.h
9393	TxDRNT_shift	0	sis900.h
9394	TxDRNT_100	48	sis900.h	3/4 FIFO size
9395	TxDRNT_10	16	sis900.h	1/2 FIFO size
9396	RxDRNT_shift	1	sis900.h
9397	RxDRNT_100	16	sis900.h	1/2 FIFO size
9398	RxDRNT_10	24	sis900.h	3/4 FIFO size
9399	RFAA_shift	28	sis900.h
9400	RFADDR_shift	16	sis900.h
9401	MIIread	0x6000	sis900.h
9402	MIIwrite	0x5002	sis900.h
9403	MIIpmdShift	7	sis900.h
9404	MIIregShift	2	sis900.h
9405	MIIcmdLen	16	sis900.h
9406	MIIcmdShift	16	sis900.h
9407	MII_ID1_OUI_LO	0xFC00	sis900.h	low bits of OUI mask
9408	MII_ID1_MODEL	0x03F0	sis900.h	model number
9409	MII_ID1_REV	0x000F	sis900.h	model number
9410	FDX_CAPABLE_DUPLEX_UNKNOWN	0	sis900.h
9411	FDX_CAPABLE_HALF_SELECTED	1	sis900.h
9412	FDX_CAPABLE_FULL_SELECTED	2	sis900.h
9413	HW_SPEED_UNCONFIG	0	sis900.h
9414	HW_SPEED_HOME	1	sis900.h
9415	HW_SPEED_10_MBPS	10	sis900.h
9416	HW_SPEED_100_MBPS	100	sis900.h
9417	HW_SPEED_DEFAULT	(HW_SPEED_100_MBPS)	sis900.h
9418	CRC_SIZE	4	sis900.h
9419	MAC_HEADER_SIZE	14	sis900.h
9420	TX_BUF_SIZE	1536	sis900.h
9421	RX_BUF_SIZE	1536	sis900.h
9422	NUM_RX_DESC	4	sis900.h	Number of Rx descriptor registers.
9423	TX_TIMEOUT	(4*TICKS_PER_SEC)	sis900.h
9424	BANK_SELECT	14	smc9000.h
9425	TCR	0	smc9000.h	transmit control register
9426	TCR_ENABLE	0x0001	smc9000.h	if this is 1, we can transmit
9427	TCR_FDUPLX	0x0800	smc9000.h	receive packets sent out
9428	TCR_STP_SQET	0x1000	smc9000.h	stop transmitting if Signal quality error
9429	TCR_MON_CNS	0x0400	smc9000.h	monitors the carrier status
9430	TCR_PAD_ENABLE	0x0080	smc9000.h	pads short packets to 64 bytes
9431	TCR_CLEAR	0	smc9000.h	do NOTHING
9432	TCR_NORMAL	(TCR_ENABLE \| TCR_PAD_ENABLE)	smc9000.h
9433	EPH_STATUS	2	smc9000.h
9434	ES_LINK_OK	0x4000	smc9000.h	is the link integrity ok ?
9435	RCR	4	smc9000.h
9436	RCR_SOFTRESET	0x8000	smc9000.h	resets the chip
9437	RCR_STRIP_CRC	0x200	smc9000.h	strips CRC
9438	RCR_ENABLE	0x100	smc9000.h	IFF this is set, we can receive packets
9439	RCR_ALMUL	0x4	smc9000.h	receive all multicast packets
9440	RCR_PROMISC	0x2	smc9000.h	enable promiscuous mode
9441	RCR_NORMAL	(RCR_STRIP_CRC \| RCR_ENABLE)	smc9000.h
9442	RCR_CLEAR	0x0	smc9000.h	set it to a base state
9443	COUNTER	6	smc9000.h
9444	MIR	8	smc9000.h
9445	MCR	10	smc9000.h
9446	RPC_REG	0x000A	smc9000.h
9447	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
9448	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
9449	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
9450	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
9451	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
9452	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
9453	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
9454	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
9455	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
9456	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
9457	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
9458	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
9459	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
9460	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
9461	RPC_REG	0x000A	smc9000.h
9462	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
9463	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
9464	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
9465	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
9466	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
9467	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
9468	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
9469	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
9470	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
9471	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
9472	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
9473	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
9474	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
9475	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
9476	CONFIG	0	smc9000.h
9477	CFG_AUI_SELECT	0x100	smc9000.h
9478	BASE	2	smc9000.h
9479	ADDR0	4	smc9000.h
9480	ADDR1	6	smc9000.h
9481	ADDR2	8	smc9000.h
9482	GENERAL	10	smc9000.h
9483	CONTROL	12	smc9000.h
9484	CTL_POWERDOWN	0x2000	smc9000.h
9485	CTL_LE_ENABLE	0x80	smc9000.h
9486	CTL_CR_ENABLE	0x40	smc9000.h
9487	CTL_TE_ENABLE	0x0020	smc9000.h
9488	CTL_AUTO_RELEASE	0x0800	smc9000.h
9489	CTL_EPROM_ACCESS	0x0003	smc9000.h	high if Eprom is being read
9490	MMU_CMD	0	smc9000.h
9491	MC_BUSY	1	smc9000.h	only readable bit in the register
9492	MC_NOP	0	smc9000.h
9493	MC_ALLOC	0x20	smc9000.h	or with number of 256 byte packets
9494	MC_RESET	0x40	smc9000.h
9495	MC_REMOVE	0x60	smc9000.h	remove the current rx packet
9496	MC_RELEASE	0x80	smc9000.h	remove and release the current rx packet
9497	MC_FREEPKT	0xA0	smc9000.h	Release packet in PNR register
9498	MC_ENQUEUE	0xC0	smc9000.h	Enqueue the packet for transmit
9499	PNR_ARR	2	smc9000.h
9500	FIFO_PORTS	4	smc9000.h
9501	FP_RXEMPTY	0x8000	smc9000.h
9502	FP_TXEMPTY	0x80	smc9000.h
9503	POINTER	6	smc9000.h
9504	PTR_READ	0x2000	smc9000.h
9505	PTR_RCV	0x8000	smc9000.h
9506	PTR_AUTOINC	0x4000	smc9000.h
9507	PTR_AUTO_INC	0x0040	smc9000.h
9508	DATA_1	8	smc9000.h
9509	DATA_2	10	smc9000.h
9510	INTERRUPT	12	smc9000.h
9511	INT_MASK	13	smc9000.h
9512	IM_RCV_INT	0x1	smc9000.h
9513	IM_TX_INT	0x2	smc9000.h
9514	IM_TX_EMPTY_INT	0x4	smc9000.h
9515	IM_ALLOC_INT	0x8	smc9000.h
9516	IM_RX_OVRN_INT	0x10	smc9000.h
9517	IM_EPH_INT	0x20	smc9000.h
9518	IM_ERCV_INT	0x40	smc9000.h	not on SMC9192
9519	MULTICAST1	0	smc9000.h
9520	MULTICAST2	2	smc9000.h
9521	MULTICAST3	4	smc9000.h
9522	MULTICAST4	6	smc9000.h
9523	MGMT	8	smc9000.h
9524	REVISION	10	smc9000.h	( hi: chip id low: rev # )
9525	MII_REG	0x0008	smc9000.h
9526	MII_MSK_CRS100	0x4000	smc9000.h	Disables CRS100 detection during tx half dup
9527	MII_MDOE	0x0008	smc9000.h	MII Output Enable
9528	MII_MCLK	0x0004	smc9000.h	MII Clock, pin MDCLK
9529	MII_MDI	0x0002	smc9000.h	MII Input, pin MDI
9530	MII_MDO	0x0001	smc9000.h	MII Output, pin MDO
9531	ERCV	12	smc9000.h
9532	CHIP_9190	3	smc9000.h
9533	CHIP_9194	4	smc9000.h
9534	CHIP_9195	5	smc9000.h
9535	CHIP_9196	4	smc9000.h
9536	CHIP_91100	7	smc9000.h
9537	CHIP_91100FD	8	smc9000.h
9538	REV_9196	6	smc9000.h
9539	TS_SUCCESS	0x0001	smc9000.h
9540	TS_LOSTCAR	0x0400	smc9000.h
9541	TS_LATCOL	0x0200	smc9000.h
9542	TS_16COL	0x0010	smc9000.h
9543	RS_ALGNERR	0x8000	smc9000.h
9544	RS_BADCRC	0x2000	smc9000.h
9545	RS_ODDFRAME	0x1000	smc9000.h
9546	RS_TOOLONG	0x0800	smc9000.h
9547	RS_TOOSHORT	0x0400	smc9000.h
9548	RS_MULTICAST	0x0001	smc9000.h
9549	RS_ERRORS	(RS_ALGNERR \| RS_BADCRC \| RS_TOOLONG \| RS_TOOSHORT)	smc9000.h
9550	MII_REG	0x0008	smc9000.h
9551	MII_MSK_CRS100	0x4000	smc9000.h	Disables CRS100 detection during tx half dup
9552	MII_MDOE	0x0008	smc9000.h	MII Output Enable
9553	MII_MCLK	0x0004	smc9000.h	MII Clock, pin MDCLK
9554	MII_MDI	0x0002	smc9000.h	MII Input, pin MDI
9555	MII_MDO	0x0001	smc9000.h	MII Output, pin MDO
9556	PHY_CNTL_REG	0x00	smc9000.h
9557	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
9558	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
9559	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
9560	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
9561	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
9562	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
9563	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
9564	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
9565	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
9566	PHY_STAT_REG	0x01	smc9000.h
9567	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
9568	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
9569	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
9570	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
9571	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
9572	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
9573	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
9574	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
9575	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
9576	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
9577	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
9578	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
9579	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
9580	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
9581	PHY_AD_REG	0x04	smc9000.h
9582	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
9583	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
9584	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
9585	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
9586	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
9587	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
9588	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
9589	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
9590	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
9591	PHY_RMT_REG	0x05	smc9000.h
9592	PHY_CFG1_REG	0x10	smc9000.h
9593	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
9594	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
9595	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
9596	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
9597	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
9598	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
9599	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
9600	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
9601	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
9602	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
9603	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
9604	PHY_CFG2_REG	0x11	smc9000.h
9605	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
9606	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
9607	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
9608	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
9609	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
9610	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
9611	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
9612	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
9613	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
9614	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
9615	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
9616	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
9617	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
9618	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
9619	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
9620	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
9621	PHY_CNTL_REG	0x00	smc9000.h
9622	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
9623	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
9624	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
9625	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
9626	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
9627	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
9628	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
9629	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
9630	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
9631	PHY_STAT_REG	0x01	smc9000.h
9632	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
9633	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
9634	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
9635	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
9636	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
9637	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
9638	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
9639	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
9640	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
9641	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
9642	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
9643	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
9644	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
9645	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
9646	PHY_AD_REG	0x04	smc9000.h
9647	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
9648	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
9649	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
9650	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
9651	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
9652	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
9653	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
9654	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
9655	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
9656	PHY_RMT_REG	0x05	smc9000.h
9657	PHY_CFG1_REG	0x10	smc9000.h
9658	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
9659	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
9660	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
9661	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
9662	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
9663	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
9664	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
9665	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
9666	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
9667	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
9668	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
9669	PHY_CFG2_REG	0x11	smc9000.h
9670	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
9671	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
9672	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
9673	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
9674	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
9675	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
9676	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
9677	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
9678	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
9679	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
9680	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
9681	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
9682	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
9683	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
9684	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
9685	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
9686	ADVERTISED_10baseT_Half	(1 << 0)	tg3.h
9687	ADVERTISED_10baseT_Full	(1 << 1)	tg3.h
9688	ADVERTISED_100baseT_Half	(1 << 2)	tg3.h
9689	ADVERTISED_100baseT_Full	(1 << 3)	tg3.h
9690	ADVERTISED_1000baseT_Half	(1 << 4)	tg3.h
9691	ADVERTISED_1000baseT_Full	(1 << 5)	tg3.h
9692	ADVERTISED_Autoneg	(1 << 6)	tg3.h
9693	ADVERTISED_TP	(1 << 7)	tg3.h
9694	ADVERTISED_AUI	(1 << 8)	tg3.h
9695	ADVERTISED_MII	(1 << 9)	tg3.h
9696	ADVERTISED_FIBRE	(1 << 10)	tg3.h
9697	ADVERTISED_BNC	(1 << 11)	tg3.h
9698	SPEED_10	0	tg3.h
9699	SPEED_100	1	tg3.h
9700	SPEED_1000	2	tg3.h
9701	SPEED_INVALID	3	tg3.h
9702	DUPLEX_HALF	0x00	tg3.h
9703	DUPLEX_FULL	0x01	tg3.h
9704	DUPLEX_INVALID	0x02	tg3.h
9705	PORT_TP	0x00	tg3.h
9706	PORT_AUI	0x01	tg3.h
9707	PORT_MII	0x02	tg3.h
9708	PORT_FIBRE	0x03	tg3.h
9709	PORT_BNC	0x04	tg3.h
9710	XCVR_INTERNAL	0x00	tg3.h
9711	XCVR_EXTERNAL	0x01	tg3.h
9712	XCVR_DUMMY1	0x02	tg3.h
9713	XCVR_DUMMY2	0x03	tg3.h
9714	XCVR_DUMMY3	0x04	tg3.h
9715	AUTONEG_DISABLE	0x00	tg3.h
9716	AUTONEG_ENABLE	0x01	tg3.h
9717	WAKE_PHY	(1 << 0)	tg3.h
9718	WAKE_UCAST	(1 << 1)	tg3.h
9719	WAKE_MCAST	(1 << 2)	tg3.h
9720	WAKE_BCAST	(1 << 3)	tg3.h
9721	WAKE_ARP	(1 << 4)	tg3.h
9722	WAKE_MAGIC	(1 << 5)	tg3.h
9723	WAKE_MAGICSECURE	(1 << 6)	tg3.h	only meaningful if WAKE_MAGIC
9724	MII_BMCR	0x00	tg3.h	Basic mode control register
9725	MII_BMSR	0x01	tg3.h	Basic mode status register
9726	MII_PHYSID1	0x02	tg3.h	PHYS ID 1
9727	MII_PHYSID2	0x03	tg3.h	PHYS ID 2
9728	MII_ADVERTISE	0x04	tg3.h	Advertisement control reg
9729	MII_LPA	0x05	tg3.h	Link partner ability reg
9730	MII_EXPANSION	0x06	tg3.h	Expansion register
9731	MII_DCOUNTER	0x12	tg3.h	Disconnect counter
9732	MII_FCSCOUNTER	0x13	tg3.h	False carrier counter
9733	MII_NWAYTEST	0x14	tg3.h	N-way auto-neg test reg
9734	MII_RERRCOUNTER	0x15	tg3.h	Receive error counter
9735	MII_SREVISION	0x16	tg3.h	Silicon revision
9736	MII_RESV1	0x17	tg3.h	Reserved...
9737	MII_LBRERROR	0x18	tg3.h	Lpback, rx, bypass error
9738	MII_PHYADDR	0x19	tg3.h	PHY address
9739	MII_RESV2	0x1a	tg3.h	Reserved...
9740	MII_TPISTATUS	0x1b	tg3.h	TPI status for 10mbps
9741	MII_NCONFIG	0x1c	tg3.h	Network interface config
9742	BMCR_RESV	0x007f	tg3.h	Unused...
9743	BMCR_CTST	0x0080	tg3.h	Collision test
9744	BMCR_FULLDPLX	0x0100	tg3.h	Full duplex
9745	BMCR_ANRESTART	0x0200	tg3.h	Auto negotiation restart
9746	BMCR_ISOLATE	0x0400	tg3.h	Disconnect DP83840 from MII
9747	BMCR_PDOWN	0x0800	tg3.h	Powerdown the DP83840
9748	BMCR_ANENABLE	0x1000	tg3.h	Enable auto negotiation
9749	BMCR_SPEED100	0x2000	tg3.h	Select 100Mbps
9750	BMCR_LOOPBACK	0x4000	tg3.h	TXD loopback bits
9751	BMCR_RESET	0x8000	tg3.h	Reset the DP83840
9752	BMSR_ERCAP	0x0001	tg3.h	Ext-reg capability
9753	BMSR_JCD	0x0002	tg3.h	Jabber detected
9754	BMSR_LSTATUS	0x0004	tg3.h	Link status
9755	BMSR_ANEGCAPABLE	0x0008	tg3.h	Able to do auto-negotiation
9756	BMSR_RFAULT	0x0010	tg3.h	Remote fault detected
9757	BMSR_ANEGCOMPLETE	0x0020	tg3.h	Auto-negotiation complete
9758	BMSR_RESV	0x07c0	tg3.h	Unused...
9759	BMSR_10HALF	0x0800	tg3.h	Can do 10mbps, half-duplex
9760	BMSR_10FULL	0x1000	tg3.h	Can do 10mbps, full-duplex
9761	BMSR_100HALF	0x2000	tg3.h	Can do 100mbps, half-duplex
9762	BMSR_100FULL	0x4000	tg3.h	Can do 100mbps, full-duplex
9763	BMSR_100BASE4	0x8000	tg3.h	Can do 100mbps, 4k packets
9764	ADVERTISE_SLCT	0x001f	tg3.h	Selector bits
9765	ADVERTISE_CSMA	0x0001	tg3.h	Only selector supported
9766	ADVERTISE_10HALF	0x0020	tg3.h	Try for 10mbps half-duplex
9767	ADVERTISE_10FULL	0x0040	tg3.h	Try for 10mbps full-duplex
9768	ADVERTISE_100HALF	0x0080	tg3.h	Try for 100mbps half-duplex
9769	ADVERTISE_100FULL	0x0100	tg3.h	Try for 100mbps full-duplex
9770	ADVERTISE_100BASE4	0x0200	tg3.h	Try for 100mbps 4k packets
9771	ADVERTISE_RESV	0x1c00	tg3.h	Unused...
9772	ADVERTISE_RFAULT	0x2000	tg3.h	Say we can detect faults
9773	ADVERTISE_LPACK	0x4000	tg3.h	Ack link partners response
9774	ADVERTISE_NPAGE	0x8000	tg3.h	Next page bit
9775	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	tg3.h
9776	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	tg3.h
9777	LPA_SLCT	0x001f	tg3.h	Same as advertise selector
9778	LPA_10HALF	0x0020	tg3.h	Can do 10mbps half-duplex
9779	LPA_10FULL	0x0040	tg3.h	Can do 10mbps full-duplex
9780	LPA_100HALF	0x0080	tg3.h	Can do 100mbps half-duplex
9781	LPA_100FULL	0x0100	tg3.h	Can do 100mbps full-duplex
9782	LPA_100BASE4	0x0200	tg3.h	Can do 100mbps 4k packets
9783	LPA_RESV	0x1c00	tg3.h	Unused...
9784	LPA_RFAULT	0x2000	tg3.h	Link partner faulted
9785	LPA_LPACK	0x4000	tg3.h	Link partner acked us
9786	LPA_NPAGE	0x8000	tg3.h	Next page bit
9787	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	tg3.h
9788	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	tg3.h
9789	EXPANSION_NWAY	0x0001	tg3.h	Can do N-way auto-nego
9790	EXPANSION_LCWP	0x0002	tg3.h	Got new RX page code word
9791	EXPANSION_ENABLENPAGE	0x0004	tg3.h	This enables npage words
9792	EXPANSION_NPCAPABLE	0x0008	tg3.h	Link partner supports npage
9793	EXPANSION_MFAULTS	0x0010	tg3.h	Multiple faults detected
9794	EXPANSION_RESV	0xffe0	tg3.h	Unused...
9795	NWAYTEST_RESV1	0x00ff	tg3.h	Unused...
9796	NWAYTEST_LOOPBACK	0x0100	tg3.h	Enable loopback for N-way
9797	NWAYTEST_RESV2	0xfe00	tg3.h	Unused...
9798	TG3_64BIT_REG_HIGH	0x00UL	tg3.h
9799	TG3_64BIT_REG_LOW	0x04UL	tg3.h
9800	TG3_BDINFO_HOST_ADDR	0x0UL	tg3.h	64-bit
9801	TG3_BDINFO_MAXLEN_FLAGS	0x8UL	tg3.h	32-bit
9802	BDINFO_FLAGS_USE_EXT_RECV	0x00000001	tg3.h	ext rx_buffer_desc
9803	BDINFO_FLAGS_DISABLED	0x00000002	tg3.h
9804	BDINFO_FLAGS_MAXLEN_MASK	0xffff0000	tg3.h
9805	BDINFO_FLAGS_MAXLEN_SHIFT	16	tg3.h
9806	TG3_BDINFO_NIC_ADDR	0xcUL	tg3.h	32-bit
9807	TG3_BDINFO_SIZE	0x10UL	tg3.h
9808	RX_COPY_THRESHOLD	256	tg3.h
9809	RX_STD_MAX_SIZE	1536	tg3.h
9810	RX_STD_MAX_SIZE_5705	512	tg3.h
9811	RX_JUMBO_MAX_SIZE	0xdeadbeef	tg3.h	XXX
9812	TG3PCI_VENDOR	0x00000000	tg3.h
9813	TG3PCI_VENDOR_BROADCOM	0x14e4	tg3.h
9814	TG3PCI_DEVICE	0x00000002	tg3.h
9815	TG3PCI_DEVICE_TIGON3_1	0x1644	tg3.h	BCM5700
9816	TG3PCI_DEVICE_TIGON3_2	0x1645	tg3.h	BCM5701
9817	TG3PCI_DEVICE_TIGON3_3	0x1646	tg3.h	BCM5702
9818	TG3PCI_DEVICE_TIGON3_4	0x1647	tg3.h	BCM5703
9819	TG3PCI_COMMAND	0x00000004	tg3.h
9820	TG3PCI_STATUS	0x00000006	tg3.h
9821	TG3PCI_CCREVID	0x00000008	tg3.h
9822	TG3PCI_CACHELINESZ	0x0000000c	tg3.h
9823	TG3PCI_LATTIMER	0x0000000d	tg3.h
9824	TG3PCI_HEADERTYPE	0x0000000e	tg3.h
9825	TG3PCI_BIST	0x0000000f	tg3.h
9826	TG3PCI_BASE0_LOW	0x00000010	tg3.h
9827	TG3PCI_BASE0_HIGH	0x00000014	tg3.h
9828	TG3PCI_SUBSYSVENID	0x0000002c	tg3.h
9829	TG3PCI_SUBSYSID	0x0000002e	tg3.h
9830	TG3PCI_ROMADDR	0x00000030	tg3.h
9831	TG3PCI_CAPLIST	0x00000034	tg3.h
9832	TG3PCI_IRQ_LINE	0x0000003c	tg3.h
9833	TG3PCI_IRQ_PIN	0x0000003d	tg3.h
9834	TG3PCI_MIN_GNT	0x0000003e	tg3.h
9835	TG3PCI_MAX_LAT	0x0000003f	tg3.h
9836	TG3PCI_X_CAPS	0x00000040	tg3.h
9837	PCIX_CAPS_RELAXED_ORDERING	0x00020000	tg3.h
9838	PCIX_CAPS_SPLIT_MASK	0x00700000	tg3.h
9839	PCIX_CAPS_SPLIT_SHIFT	20	tg3.h
9840	PCIX_CAPS_BURST_MASK	0x000c0000	tg3.h
9841	PCIX_CAPS_BURST_SHIFT	18	tg3.h
9842	PCIX_CAPS_MAX_BURST_CPIOB	2	tg3.h
9843	TG3PCI_PM_CAP_PTR	0x00000041	tg3.h
9844	TG3PCI_X_COMMAND	0x00000042	tg3.h
9845	TG3PCI_X_STATUS	0x00000044	tg3.h
9846	TG3PCI_PM_CAP_ID	0x00000048	tg3.h
9847	TG3PCI_VPD_CAP_PTR	0x00000049	tg3.h
9848	TG3PCI_PM_CAPS	0x0000004a	tg3.h
9849	TG3PCI_PM_CTRL_STAT	0x0000004c	tg3.h
9850	TG3PCI_BR_SUPP_EXT	0x0000004e	tg3.h
9851	TG3PCI_PM_DATA	0x0000004f	tg3.h
9852	TG3PCI_VPD_CAP_ID	0x00000050	tg3.h
9853	TG3PCI_MSI_CAP_PTR	0x00000051	tg3.h
9854	TG3PCI_VPD_ADDR_FLAG	0x00000052	tg3.h
9855	VPD_ADDR_FLAG_WRITE	0x00008000	tg3.h
9856	TG3PCI_VPD_DATA	0x00000054	tg3.h
9857	TG3PCI_MSI_CAP_ID	0x00000058	tg3.h
9858	TG3PCI_NXT_CAP_PTR	0x00000059	tg3.h
9859	TG3PCI_MSI_CTRL	0x0000005a	tg3.h
9860	TG3PCI_MSI_ADDR_LOW	0x0000005c	tg3.h
9861	TG3PCI_MSI_ADDR_HIGH	0x00000060	tg3.h
9862	TG3PCI_MSI_DATA	0x00000064	tg3.h
9863	TG3PCI_MISC_HOST_CTRL	0x00000068	tg3.h
9864	MISC_HOST_CTRL_CLEAR_INT	0x00000001	tg3.h
9865	MISC_HOST_CTRL_MASK_PCI_INT	0x00000002	tg3.h
9866	MISC_HOST_CTRL_BYTE_SWAP	0x00000004	tg3.h
9867	MISC_HOST_CTRL_WORD_SWAP	0x00000008	tg3.h
9868	MISC_HOST_CTRL_PCISTATE_RW	0x00000010	tg3.h
9869	MISC_HOST_CTRL_CLKREG_RW	0x00000020	tg3.h
9870	MISC_HOST_CTRL_REGWORD_SWAP	0x00000040	tg3.h
9871	MISC_HOST_CTRL_INDIR_ACCESS	0x00000080	tg3.h
9872	MISC_HOST_CTRL_IRQ_MASK_MODE	0x00000100	tg3.h
9873	MISC_HOST_CTRL_TAGGED_STATUS	0x00000200	tg3.h
9874	MISC_HOST_CTRL_CHIPREV	0xffff0000	tg3.h
9875	MISC_HOST_CTRL_CHIPREV_SHIFT	16	tg3.h
9876	CHIPREV_ID_5700_A0	0x7000	tg3.h
9877	CHIPREV_ID_5700_A1	0x7001	tg3.h
9878	CHIPREV_ID_5700_B0	0x7100	tg3.h
9879	CHIPREV_ID_5700_B1	0x7101	tg3.h
9880	CHIPREV_ID_5700_B3	0x7102	tg3.h
9881	CHIPREV_ID_5700_ALTIMA	0x7104	tg3.h
9882	CHIPREV_ID_5700_C0	0x7200	tg3.h
9883	CHIPREV_ID_5701_A0	0x0000	tg3.h
9884	CHIPREV_ID_5701_B0	0x0100	tg3.h
9885	CHIPREV_ID_5701_B2	0x0102	tg3.h
9886	CHIPREV_ID_5701_B5	0x0105	tg3.h
9887	CHIPREV_ID_5703_A0	0x1000	tg3.h
9888	CHIPREV_ID_5703_A1	0x1001	tg3.h
9889	CHIPREV_ID_5703_A2	0x1002	tg3.h
9890	CHIPREV_ID_5703_A3	0x1003	tg3.h
9891	CHIPREV_ID_5704_A0	0x2000	tg3.h
9892	CHIPREV_ID_5704_A1	0x2001	tg3.h
9893	CHIPREV_ID_5704_A2	0x2002	tg3.h
9894	CHIPREV_ID_5705_A0	0x3000	tg3.h
9895	CHIPREV_ID_5705_A1	0x3001	tg3.h
9896	CHIPREV_ID_5705_A2	0x3002	tg3.h
9897	CHIPREV_ID_5705_A3	0x3003	tg3.h
9898	CHIPREV_ID_5721	0x4101	tg3.h
9899	CHIPREV_ID_5750_A0	0x4000	tg3.h
9900	CHIPREV_ID_5750_A1	0x4001	tg3.h
9901	CHIPREV_ID_5750_A3	0x4003	tg3.h
9902	ASIC_REV_5700	0x07	tg3.h
9903	ASIC_REV_5701	0x00	tg3.h
9904	ASIC_REV_5703	0x01	tg3.h
9905	ASIC_REV_5704	0x02	tg3.h
9906	ASIC_REV_5705	0x03	tg3.h
9907	ASIC_REV_5750	0x04	tg3.h
9908	ASIC_REV_5787	0x0b	tg3.h
9909	CHIPREV_5700_AX	0x70	tg3.h
9910	CHIPREV_5700_BX	0x71	tg3.h
9911	CHIPREV_5700_CX	0x72	tg3.h
9912	CHIPREV_5701_AX	0x00	tg3.h
9913	METAL_REV_A0	0x00	tg3.h
9914	METAL_REV_A1	0x01	tg3.h
9915	METAL_REV_B0	0x00	tg3.h
9916	METAL_REV_B1	0x01	tg3.h
9917	METAL_REV_B2	0x02	tg3.h
9918	TG3PCI_DMA_RW_CTRL	0x0000006c	tg3.h
9919	DMA_RWCTRL_MIN_DMA	0x000000ff	tg3.h
9920	DMA_RWCTRL_MIN_DMA_SHIFT	0	tg3.h
9921	DMA_RWCTRL_READ_BNDRY_MASK	0x00000700	tg3.h
9922	DMA_RWCTRL_READ_BNDRY_DISAB	0x00000000	tg3.h
9923	DMA_RWCTRL_READ_BNDRY_16	0x00000100	tg3.h
9924	DMA_RWCTRL_READ_BNDRY_32	0x00000200	tg3.h
9925	DMA_RWCTRL_READ_BNDRY_64	0x00000300	tg3.h
9926	DMA_RWCTRL_READ_BNDRY_128	0x00000400	tg3.h
9927	DMA_RWCTRL_READ_BNDRY_256	0x00000500	tg3.h
9928	DMA_RWCTRL_READ_BNDRY_512	0x00000600	tg3.h
9929	DMA_RWCTRL_READ_BNDRY_1024	0x00000700	tg3.h
9930	DMA_RWCTRL_WRITE_BNDRY_MASK	0x00003800	tg3.h
9931	DMA_RWCTRL_WRITE_BNDRY_DISAB	0x00000000	tg3.h
9932	DMA_RWCTRL_WRITE_BNDRY_16	0x00000800	tg3.h
9933	DMA_RWCTRL_WRITE_BNDRY_32	0x00001000	tg3.h
9934	DMA_RWCTRL_WRITE_BNDRY_64	0x00001800	tg3.h
9935	DMA_RWCTRL_WRITE_BNDRY_128	0x00002000	tg3.h
9936	DMA_RWCTRL_WRITE_BNDRY_256	0x00002800	tg3.h
9937	DMA_RWCTRL_WRITE_BNDRY_512	0x00003000	tg3.h
9938	DMA_RWCTRL_WRITE_BNDRY_1024	0x00003800	tg3.h
9939	DMA_RWCTRL_ONE_DMA	0x00004000	tg3.h
9940	DMA_RWCTRL_READ_WATER	0x00070000	tg3.h
9941	DMA_RWCTRL_READ_WATER_SHIFT	16	tg3.h
9942	DMA_RWCTRL_WRITE_WATER	0x00380000	tg3.h
9943	DMA_RWCTRL_WRITE_WATER_SHIFT	19	tg3.h
9944	DMA_RWCTRL_USE_MEM_READ_MULT	0x00400000	tg3.h
9945	DMA_RWCTRL_ASSERT_ALL_BE	0x00800000	tg3.h
9946	DMA_RWCTRL_PCI_READ_CMD	0x0f000000	tg3.h
9947	DMA_RWCTRL_PCI_READ_CMD_SHIFT	24	tg3.h
9948	DMA_RWCTRL_PCI_WRITE_CMD	0xf0000000	tg3.h
9949	DMA_RWCTRL_PCI_WRITE_CMD_SHIFT	28	tg3.h
9950	TG3PCI_PCISTATE	0x00000070	tg3.h
9951	PCISTATE_FORCE_RESET	0x00000001	tg3.h
9952	PCISTATE_INT_NOT_ACTIVE	0x00000002	tg3.h
9953	PCISTATE_CONV_PCI_MODE	0x00000004	tg3.h
9954	PCISTATE_BUS_SPEED_HIGH	0x00000008	tg3.h
9955	PCISTATE_BUS_32BIT	0x00000010	tg3.h
9956	PCISTATE_ROM_ENABLE	0x00000020	tg3.h
9957	PCISTATE_ROM_RETRY_ENABLE	0x00000040	tg3.h
9958	PCISTATE_FLAT_VIEW	0x00000100	tg3.h
9959	PCISTATE_RETRY_SAME_DMA	0x00002000	tg3.h
9960	TG3PCI_CLOCK_CTRL	0x00000074	tg3.h
9961	CLOCK_CTRL_CORECLK_DISABLE	0x00000200	tg3.h
9962	CLOCK_CTRL_RXCLK_DISABLE	0x00000400	tg3.h
9963	CLOCK_CTRL_TXCLK_DISABLE	0x00000800	tg3.h
9964	CLOCK_CTRL_ALTCLK	0x00001000	tg3.h
9965	CLOCK_CTRL_PWRDOWN_PLL133	0x00008000	tg3.h
9966	CLOCK_CTRL_44MHZ_CORE	0x00040000	tg3.h
9967	CLOCK_CTRL_625_CORE	0x00100000	tg3.h
9968	CLOCK_CTRL_FORCE_CLKRUN	0x00200000	tg3.h
9969	CLOCK_CTRL_CLKRUN_OENABLE	0x00400000	tg3.h
9970	CLOCK_CTRL_DELAY_PCI_GRANT	0x80000000	tg3.h
9971	TG3PCI_REG_BASE_ADDR	0x00000078	tg3.h
9972	TG3PCI_MEM_WIN_BASE_ADDR	0x0000007c	tg3.h
9973	TG3PCI_REG_DATA	0x00000080	tg3.h
9974	TG3PCI_MEM_WIN_DATA	0x00000084	tg3.h
9975	TG3PCI_MODE_CTRL	0x00000088	tg3.h
9976	TG3PCI_MISC_CFG	0x0000008c	tg3.h
9977	TG3PCI_MISC_LOCAL_CTRL	0x00000090	tg3.h
9978	TG3PCI_STD_RING_PROD_IDX	0x00000098	tg3.h	64-bit
9979	TG3PCI_RCV_RET_RING_CON_IDX	0x000000a0	tg3.h	64-bit
9980	TG3PCI_SND_PROD_IDX	0x000000a8	tg3.h	64-bit
9981	MAILBOX_INTERRUPT_0	0x00000200	tg3.h	64-bit
9982	MAILBOX_INTERRUPT_1	0x00000208	tg3.h	64-bit
9983	MAILBOX_INTERRUPT_2	0x00000210	tg3.h	64-bit
9984	MAILBOX_INTERRUPT_3	0x00000218	tg3.h	64-bit
9985	MAILBOX_GENERAL_0	0x00000220	tg3.h	64-bit
9986	MAILBOX_GENERAL_1	0x00000228	tg3.h	64-bit
9987	MAILBOX_GENERAL_2	0x00000230	tg3.h	64-bit
9988	MAILBOX_GENERAL_3	0x00000238	tg3.h	64-bit
9989	MAILBOX_GENERAL_4	0x00000240	tg3.h	64-bit
9990	MAILBOX_GENERAL_5	0x00000248	tg3.h	64-bit
9991	MAILBOX_GENERAL_6	0x00000250	tg3.h	64-bit
9992	MAILBOX_GENERAL_7	0x00000258	tg3.h	64-bit
9993	MAILBOX_RELOAD_STAT	0x00000260	tg3.h	64-bit
9994	MAILBOX_RCV_STD_PROD_IDX	0x00000268	tg3.h	64-bit
9995	MAILBOX_RCV_JUMBO_PROD_IDX	0x00000270	tg3.h	64-bit
9996	MAILBOX_RCV_MINI_PROD_IDX	0x00000278	tg3.h	64-bit
9997	MAILBOX_RCVRET_CON_IDX_0	0x00000280	tg3.h	64-bit
9998	MAILBOX_RCVRET_CON_IDX_1	0x00000288	tg3.h	64-bit
9999	MAILBOX_RCVRET_CON_IDX_2	0x00000290	tg3.h	64-bit
10000	MAILBOX_RCVRET_CON_IDX_3	0x00000298	tg3.h	64-bit
10001	MAILBOX_RCVRET_CON_IDX_4	0x000002a0	tg3.h	64-bit
10002	MAILBOX_RCVRET_CON_IDX_5	0x000002a8	tg3.h	64-bit
10003	MAILBOX_RCVRET_CON_IDX_6	0x000002b0	tg3.h	64-bit
10004	MAILBOX_RCVRET_CON_IDX_7	0x000002b8	tg3.h	64-bit
10005	MAILBOX_RCVRET_CON_IDX_8	0x000002c0	tg3.h	64-bit
10006	MAILBOX_RCVRET_CON_IDX_9	0x000002c8	tg3.h	64-bit
10007	MAILBOX_RCVRET_CON_IDX_10	0x000002d0	tg3.h	64-bit
10008	MAILBOX_RCVRET_CON_IDX_11	0x000002d8	tg3.h	64-bit
10009	MAILBOX_RCVRET_CON_IDX_12	0x000002e0	tg3.h	64-bit
10010	MAILBOX_RCVRET_CON_IDX_13	0x000002e8	tg3.h	64-bit
10011	MAILBOX_RCVRET_CON_IDX_14	0x000002f0	tg3.h	64-bit
10012	MAILBOX_RCVRET_CON_IDX_15	0x000002f8	tg3.h	64-bit
10013	MAILBOX_SNDHOST_PROD_IDX_0	0x00000300	tg3.h	64-bit
10014	MAILBOX_SNDHOST_PROD_IDX_1	0x00000308	tg3.h	64-bit
10015	MAILBOX_SNDHOST_PROD_IDX_2	0x00000310	tg3.h	64-bit
10016	MAILBOX_SNDHOST_PROD_IDX_3	0x00000318	tg3.h	64-bit
10017	MAILBOX_SNDHOST_PROD_IDX_4	0x00000320	tg3.h	64-bit
10018	MAILBOX_SNDHOST_PROD_IDX_5	0x00000328	tg3.h	64-bit
10019	MAILBOX_SNDHOST_PROD_IDX_6	0x00000330	tg3.h	64-bit
10020	MAILBOX_SNDHOST_PROD_IDX_7	0x00000338	tg3.h	64-bit
10021	MAILBOX_SNDHOST_PROD_IDX_8	0x00000340	tg3.h	64-bit
10022	MAILBOX_SNDHOST_PROD_IDX_9	0x00000348	tg3.h	64-bit
10023	MAILBOX_SNDHOST_PROD_IDX_10	0x00000350	tg3.h	64-bit
10024	MAILBOX_SNDHOST_PROD_IDX_11	0x00000358	tg3.h	64-bit
10025	MAILBOX_SNDHOST_PROD_IDX_12	0x00000360	tg3.h	64-bit
10026	MAILBOX_SNDHOST_PROD_IDX_13	0x00000368	tg3.h	64-bit
10027	MAILBOX_SNDHOST_PROD_IDX_14	0x00000370	tg3.h	64-bit
10028	MAILBOX_SNDHOST_PROD_IDX_15	0x00000378	tg3.h	64-bit
10029	MAILBOX_SNDNIC_PROD_IDX_0	0x00000380	tg3.h	64-bit
10030	MAILBOX_SNDNIC_PROD_IDX_1	0x00000388	tg3.h	64-bit
10031	MAILBOX_SNDNIC_PROD_IDX_2	0x00000390	tg3.h	64-bit
10032	MAILBOX_SNDNIC_PROD_IDX_3	0x00000398	tg3.h	64-bit
10033	MAILBOX_SNDNIC_PROD_IDX_4	0x000003a0	tg3.h	64-bit
10034	MAILBOX_SNDNIC_PROD_IDX_5	0x000003a8	tg3.h	64-bit
10035	MAILBOX_SNDNIC_PROD_IDX_6	0x000003b0	tg3.h	64-bit
10036	MAILBOX_SNDNIC_PROD_IDX_7	0x000003b8	tg3.h	64-bit
10037	MAILBOX_SNDNIC_PROD_IDX_8	0x000003c0	tg3.h	64-bit
10038	MAILBOX_SNDNIC_PROD_IDX_9	0x000003c8	tg3.h	64-bit
10039	MAILBOX_SNDNIC_PROD_IDX_10	0x000003d0	tg3.h	64-bit
10040	MAILBOX_SNDNIC_PROD_IDX_11	0x000003d8	tg3.h	64-bit
10041	MAILBOX_SNDNIC_PROD_IDX_12	0x000003e0	tg3.h	64-bit
10042	MAILBOX_SNDNIC_PROD_IDX_13	0x000003e8	tg3.h	64-bit
10043	MAILBOX_SNDNIC_PROD_IDX_14	0x000003f0	tg3.h	64-bit
10044	MAILBOX_SNDNIC_PROD_IDX_15	0x000003f8	tg3.h	64-bit
10045	MAC_MODE	0x00000400	tg3.h
10046	MAC_MODE_RESET	0x00000001	tg3.h
10047	MAC_MODE_HALF_DUPLEX	0x00000002	tg3.h
10048	MAC_MODE_PORT_MODE_MASK	0x0000000c	tg3.h
10049	MAC_MODE_PORT_MODE_TBI	0x0000000c	tg3.h
10050	MAC_MODE_PORT_MODE_GMII	0x00000008	tg3.h
10051	MAC_MODE_PORT_MODE_MII	0x00000004	tg3.h
10052	MAC_MODE_PORT_MODE_NONE	0x00000000	tg3.h
10053	MAC_MODE_PORT_INT_LPBACK	0x00000010	tg3.h
10054	MAC_MODE_TAGGED_MAC_CTRL	0x00000080	tg3.h
10055	MAC_MODE_TX_BURSTING	0x00000100	tg3.h
10056	MAC_MODE_MAX_DEFER	0x00000200	tg3.h
10057	MAC_MODE_LINK_POLARITY	0x00000400	tg3.h
10058	MAC_MODE_RXSTAT_ENABLE	0x00000800	tg3.h
10059	MAC_MODE_RXSTAT_CLEAR	0x00001000	tg3.h
10060	MAC_MODE_RXSTAT_FLUSH	0x00002000	tg3.h
10061	MAC_MODE_TXSTAT_ENABLE	0x00004000	tg3.h
10062	MAC_MODE_TXSTAT_CLEAR	0x00008000	tg3.h
10063	MAC_MODE_TXSTAT_FLUSH	0x00010000	tg3.h
10064	MAC_MODE_SEND_CONFIGS	0x00020000	tg3.h
10065	MAC_MODE_MAGIC_PKT_ENABLE	0x00040000	tg3.h
10066	MAC_MODE_ACPI_ENABLE	0x00080000	tg3.h
10067	MAC_MODE_MIP_ENABLE	0x00100000	tg3.h
10068	MAC_MODE_TDE_ENABLE	0x00200000	tg3.h
10069	MAC_MODE_RDE_ENABLE	0x00400000	tg3.h
10070	MAC_MODE_FHDE_ENABLE	0x00800000	tg3.h
10071	MAC_STATUS	0x00000404	tg3.h
10072	MAC_STATUS_PCS_SYNCED	0x00000001	tg3.h
10073	MAC_STATUS_SIGNAL_DET	0x00000002	tg3.h
10074	MAC_STATUS_RCVD_CFG	0x00000004	tg3.h
10075	MAC_STATUS_CFG_CHANGED	0x00000008	tg3.h
10076	MAC_STATUS_SYNC_CHANGED	0x00000010	tg3.h
10077	MAC_STATUS_PORT_DEC_ERR	0x00000400	tg3.h
10078	MAC_STATUS_LNKSTATE_CHANGED	0x00001000	tg3.h
10079	MAC_STATUS_MI_COMPLETION	0x00400000	tg3.h
10080	MAC_STATUS_MI_INTERRUPT	0x00800000	tg3.h
10081	MAC_STATUS_AP_ERROR	0x01000000	tg3.h
10082	MAC_STATUS_ODI_ERROR	0x02000000	tg3.h
10083	MAC_STATUS_RXSTAT_OVERRUN	0x04000000	tg3.h
10084	MAC_STATUS_TXSTAT_OVERRUN	0x08000000	tg3.h
10085	MAC_EVENT	0x00000408	tg3.h
10086	MAC_EVENT_PORT_DECODE_ERR	0x00000400	tg3.h
10087	MAC_EVENT_LNKSTATE_CHANGED	0x00001000	tg3.h
10088	MAC_EVENT_MI_COMPLETION	0x00400000	tg3.h
10089	MAC_EVENT_MI_INTERRUPT	0x00800000	tg3.h
10090	MAC_EVENT_AP_ERROR	0x01000000	tg3.h
10091	MAC_EVENT_ODI_ERROR	0x02000000	tg3.h
10092	MAC_EVENT_RXSTAT_OVERRUN	0x04000000	tg3.h
10093	MAC_EVENT_TXSTAT_OVERRUN	0x08000000	tg3.h
10094	MAC_LED_CTRL	0x0000040c	tg3.h
10095	LED_CTRL_LNKLED_OVERRIDE	0x00000001	tg3.h
10096	LED_CTRL_1000MBPS_ON	0x00000002	tg3.h
10097	LED_CTRL_100MBPS_ON	0x00000004	tg3.h
10098	LED_CTRL_10MBPS_ON	0x00000008	tg3.h
10099	LED_CTRL_TRAFFIC_OVERRIDE	0x00000010	tg3.h
10100	LED_CTRL_TRAFFIC_BLINK	0x00000020	tg3.h
10101	LED_CTRL_TRAFFIC_LED	0x00000040	tg3.h
10102	LED_CTRL_1000MBPS_STATUS	0x00000080	tg3.h
10103	LED_CTRL_100MBPS_STATUS	0x00000100	tg3.h
10104	LED_CTRL_10MBPS_STATUS	0x00000200	tg3.h
10105	LED_CTRL_TRAFFIC_STATUS	0x00000400	tg3.h
10106	LED_CTRL_MAC_MODE	0x00000000	tg3.h
10107	LED_CTRL_PHY_MODE_1	0x00000800	tg3.h
10108	LED_CTRL_PHY_MODE_2	0x00001000	tg3.h
10109	LED_CTRL_BLINK_RATE_MASK	0x7ff80000	tg3.h
10110	LED_CTRL_BLINK_RATE_SHIFT	19	tg3.h
10111	LED_CTRL_BLINK_PER_OVERRIDE	0x00080000	tg3.h
10112	LED_CTRL_BLINK_RATE_OVERRIDE	0x80000000	tg3.h
10113	MAC_ADDR_0_HIGH	0x00000410	tg3.h	upper 2 bytes
10114	MAC_ADDR_0_LOW	0x00000414	tg3.h	lower 4 bytes
10115	MAC_ADDR_1_HIGH	0x00000418	tg3.h	upper 2 bytes
10116	MAC_ADDR_1_LOW	0x0000041c	tg3.h	lower 4 bytes
10117	MAC_ADDR_2_HIGH	0x00000420	tg3.h	upper 2 bytes
10118	MAC_ADDR_2_LOW	0x00000424	tg3.h	lower 4 bytes
10119	MAC_ADDR_3_HIGH	0x00000428	tg3.h	upper 2 bytes
10120	MAC_ADDR_3_LOW	0x0000042c	tg3.h	lower 4 bytes
10121	MAC_ACPI_MBUF_PTR	0x00000430	tg3.h
10122	MAC_ACPI_LEN_OFFSET	0x00000434	tg3.h
10123	ACPI_LENOFF_LEN_MASK	0x0000ffff	tg3.h
10124	ACPI_LENOFF_LEN_SHIFT	0	tg3.h
10125	ACPI_LENOFF_OFF_MASK	0x0fff0000	tg3.h
10126	ACPI_LENOFF_OFF_SHIFT	16	tg3.h
10127	MAC_TX_BACKOFF_SEED	0x00000438	tg3.h
10128	TX_BACKOFF_SEED_MASK	0x000003ff	tg3.h
10129	MAC_RX_MTU_SIZE	0x0000043c	tg3.h
10130	RX_MTU_SIZE_MASK	0x0000ffff	tg3.h
10131	MAC_PCS_TEST	0x00000440	tg3.h
10132	PCS_TEST_PATTERN_MASK	0x000fffff	tg3.h
10133	PCS_TEST_PATTERN_SHIFT	0	tg3.h
10134	PCS_TEST_ENABLE	0x00100000	tg3.h
10135	MAC_TX_AUTO_NEG	0x00000444	tg3.h
10136	TX_AUTO_NEG_MASK	0x0000ffff	tg3.h
10137	TX_AUTO_NEG_SHIFT	0	tg3.h
10138	MAC_RX_AUTO_NEG	0x00000448	tg3.h
10139	RX_AUTO_NEG_MASK	0x0000ffff	tg3.h
10140	RX_AUTO_NEG_SHIFT	0	tg3.h
10141	MAC_MI_COM	0x0000044c	tg3.h
10142	MI_COM_CMD_MASK	0x0c000000	tg3.h
10143	MI_COM_CMD_WRITE	0x04000000	tg3.h
10144	MI_COM_CMD_READ	0x08000000	tg3.h
10145	MI_COM_READ_FAILED	0x10000000	tg3.h
10146	MI_COM_START	0x20000000	tg3.h
10147	MI_COM_BUSY	0x20000000	tg3.h
10148	MI_COM_PHY_ADDR_MASK	0x03e00000	tg3.h
10149	MI_COM_PHY_ADDR_SHIFT	21	tg3.h
10150	MI_COM_REG_ADDR_MASK	0x001f0000	tg3.h
10151	MI_COM_REG_ADDR_SHIFT	16	tg3.h
10152	MI_COM_DATA_MASK	0x0000ffff	tg3.h
10153	MAC_MI_STAT	0x00000450	tg3.h
10154	MAC_MI_STAT_LNKSTAT_ATTN_ENAB	0x00000001	tg3.h
10155	MAC_MI_MODE	0x00000454	tg3.h
10156	MAC_MI_MODE_CLK_10MHZ	0x00000001	tg3.h
10157	MAC_MI_MODE_SHORT_PREAMBLE	0x00000002	tg3.h
10158	MAC_MI_MODE_AUTO_POLL	0x00000010	tg3.h
10159	MAC_MI_MODE_CORE_CLK_62MHZ	0x00008000	tg3.h
10160	MAC_MI_MODE_BASE	0x000c0000	tg3.h	XXX magic values XXX
10161	MAC_AUTO_POLL_STATUS	0x00000458	tg3.h
10162	MAC_AUTO_POLL_ERROR	0x00000001	tg3.h
10163	MAC_TX_MODE	0x0000045c	tg3.h
10164	TX_MODE_RESET	0x00000001	tg3.h
10165	TX_MODE_ENABLE	0x00000002	tg3.h
10166	TX_MODE_FLOW_CTRL_ENABLE	0x00000010	tg3.h
10167	TX_MODE_BIG_BCKOFF_ENABLE	0x00000020	tg3.h
10168	TX_MODE_LONG_PAUSE_ENABLE	0x00000040	tg3.h
10169	MAC_TX_STATUS	0x00000460	tg3.h
10170	TX_STATUS_XOFFED	0x00000001	tg3.h
10171	TX_STATUS_SENT_XOFF	0x00000002	tg3.h
10172	TX_STATUS_SENT_XON	0x00000004	tg3.h
10173	TX_STATUS_LINK_UP	0x00000008	tg3.h
10174	TX_STATUS_ODI_UNDERRUN	0x00000010	tg3.h
10175	TX_STATUS_ODI_OVERRUN	0x00000020	tg3.h
10176	MAC_TX_LENGTHS	0x00000464	tg3.h
10177	TX_LENGTHS_SLOT_TIME_MASK	0x000000ff	tg3.h
10178	TX_LENGTHS_SLOT_TIME_SHIFT	0	tg3.h
10179	TX_LENGTHS_IPG_MASK	0x00000f00	tg3.h
10180	TX_LENGTHS_IPG_SHIFT	8	tg3.h
10181	TX_LENGTHS_IPG_CRS_MASK	0x00003000	tg3.h
10182	TX_LENGTHS_IPG_CRS_SHIFT	12	tg3.h
10183	MAC_RX_MODE	0x00000468	tg3.h
10184	RX_MODE_RESET	0x00000001	tg3.h
10185	RX_MODE_ENABLE	0x00000002	tg3.h
10186	RX_MODE_FLOW_CTRL_ENABLE	0x00000004	tg3.h
10187	RX_MODE_KEEP_MAC_CTRL	0x00000008	tg3.h
10188	RX_MODE_KEEP_PAUSE	0x00000010	tg3.h
10189	RX_MODE_ACCEPT_OVERSIZED	0x00000020	tg3.h
10190	RX_MODE_ACCEPT_RUNTS	0x00000040	tg3.h
10191	RX_MODE_LEN_CHECK	0x00000080	tg3.h
10192	RX_MODE_PROMISC	0x00000100	tg3.h
10193	RX_MODE_NO_CRC_CHECK	0x00000200	tg3.h
10194	RX_MODE_KEEP_VLAN_TAG	0x00000400	tg3.h
10195	MAC_RX_STATUS	0x0000046c	tg3.h
10196	RX_STATUS_REMOTE_TX_XOFFED	0x00000001	tg3.h
10197	RX_STATUS_XOFF_RCVD	0x00000002	tg3.h
10198	RX_STATUS_XON_RCVD	0x00000004	tg3.h
10199	MAC_HASH_REG_0	0x00000470	tg3.h
10200	MAC_HASH_REG_1	0x00000474	tg3.h
10201	MAC_HASH_REG_2	0x00000478	tg3.h
10202	MAC_HASH_REG_3	0x0000047c	tg3.h
10203	MAC_RCV_RULE_0	0x00000480	tg3.h
10204	MAC_RCV_VALUE_0	0x00000484	tg3.h
10205	MAC_RCV_RULE_1	0x00000488	tg3.h
10206	MAC_RCV_VALUE_1	0x0000048c	tg3.h
10207	MAC_RCV_RULE_2	0x00000490	tg3.h
10208	MAC_RCV_VALUE_2	0x00000494	tg3.h
10209	MAC_RCV_RULE_3	0x00000498	tg3.h
10210	MAC_RCV_VALUE_3	0x0000049c	tg3.h
10211	MAC_RCV_RULE_4	0x000004a0	tg3.h
10212	MAC_RCV_VALUE_4	0x000004a4	tg3.h
10213	MAC_RCV_RULE_5	0x000004a8	tg3.h
10214	MAC_RCV_VALUE_5	0x000004ac	tg3.h
10215	MAC_RCV_RULE_6	0x000004b0	tg3.h
10216	MAC_RCV_VALUE_6	0x000004b4	tg3.h
10217	MAC_RCV_RULE_7	0x000004b8	tg3.h
10218	MAC_RCV_VALUE_7	0x000004bc	tg3.h
10219	MAC_RCV_RULE_8	0x000004c0	tg3.h
10220	MAC_RCV_VALUE_8	0x000004c4	tg3.h
10221	MAC_RCV_RULE_9	0x000004c8	tg3.h
10222	MAC_RCV_VALUE_9	0x000004cc	tg3.h
10223	MAC_RCV_RULE_10	0x000004d0	tg3.h
10224	MAC_RCV_VALUE_10	0x000004d4	tg3.h
10225	MAC_RCV_RULE_11	0x000004d8	tg3.h
10226	MAC_RCV_VALUE_11	0x000004dc	tg3.h
10227	MAC_RCV_RULE_12	0x000004e0	tg3.h
10228	MAC_RCV_VALUE_12	0x000004e4	tg3.h
10229	MAC_RCV_RULE_13	0x000004e8	tg3.h
10230	MAC_RCV_VALUE_13	0x000004ec	tg3.h
10231	MAC_RCV_RULE_14	0x000004f0	tg3.h
10232	MAC_RCV_VALUE_14	0x000004f4	tg3.h
10233	MAC_RCV_RULE_15	0x000004f8	tg3.h
10234	MAC_RCV_VALUE_15	0x000004fc	tg3.h
10235	RCV_RULE_DISABLE_MASK	0x7fffffff	tg3.h
10236	MAC_RCV_RULE_CFG	0x00000500	tg3.h
10237	RCV_RULE_CFG_DEFAULT_CLASS	0x00000008	tg3.h
10238	MAC_LOW_WMARK_MAX_RX_FRAME	0x00000504	tg3.h
10239	MAC_HASHREGU_0	0x00000520	tg3.h
10240	MAC_HASHREGU_1	0x00000524	tg3.h
10241	MAC_HASHREGU_2	0x00000528	tg3.h
10242	MAC_HASHREGU_3	0x0000052c	tg3.h
10243	MAC_EXTADDR_0_HIGH	0x00000530	tg3.h
10244	MAC_EXTADDR_0_LOW	0x00000534	tg3.h
10245	MAC_EXTADDR_1_HIGH	0x00000538	tg3.h
10246	MAC_EXTADDR_1_LOW	0x0000053c	tg3.h
10247	MAC_EXTADDR_2_HIGH	0x00000540	tg3.h
10248	MAC_EXTADDR_2_LOW	0x00000544	tg3.h
10249	MAC_EXTADDR_3_HIGH	0x00000548	tg3.h
10250	MAC_EXTADDR_3_LOW	0x0000054c	tg3.h
10251	MAC_EXTADDR_4_HIGH	0x00000550	tg3.h
10252	MAC_EXTADDR_4_LOW	0x00000554	tg3.h
10253	MAC_EXTADDR_5_HIGH	0x00000558	tg3.h
10254	MAC_EXTADDR_5_LOW	0x0000055c	tg3.h
10255	MAC_EXTADDR_6_HIGH	0x00000560	tg3.h
10256	MAC_EXTADDR_6_LOW	0x00000564	tg3.h
10257	MAC_EXTADDR_7_HIGH	0x00000568	tg3.h
10258	MAC_EXTADDR_7_LOW	0x0000056c	tg3.h
10259	MAC_EXTADDR_8_HIGH	0x00000570	tg3.h
10260	MAC_EXTADDR_8_LOW	0x00000574	tg3.h
10261	MAC_EXTADDR_9_HIGH	0x00000578	tg3.h
10262	MAC_EXTADDR_9_LOW	0x0000057c	tg3.h
10263	MAC_EXTADDR_10_HIGH	0x00000580	tg3.h
10264	MAC_EXTADDR_10_LOW	0x00000584	tg3.h
10265	MAC_EXTADDR_11_HIGH	0x00000588	tg3.h
10266	MAC_EXTADDR_11_LOW	0x0000058c	tg3.h
10267	MAC_SERDES_CFG	0x00000590	tg3.h
10268	MAC_SERDES_STAT	0x00000594	tg3.h
10269	MAC_TX_MAC_STATE_BASE	0x00000600	tg3.h	16 bytes
10270	MAC_RX_MAC_STATE_BASE	0x00000610	tg3.h	20 bytes
10271	MAC_TX_STATS_OCTETS	0x00000800	tg3.h
10272	MAC_TX_STATS_RESV1	0x00000804	tg3.h
10273	MAC_TX_STATS_COLLISIONS	0x00000808	tg3.h
10274	MAC_TX_STATS_XON_SENT	0x0000080c	tg3.h
10275	MAC_TX_STATS_XOFF_SENT	0x00000810	tg3.h
10276	MAC_TX_STATS_RESV2	0x00000814	tg3.h
10277	MAC_TX_STATS_MAC_ERRORS	0x00000818	tg3.h
10278	MAC_TX_STATS_SINGLE_COLLISIONS	0x0000081c	tg3.h
10279	MAC_TX_STATS_MULT_COLLISIONS	0x00000820	tg3.h
10280	MAC_TX_STATS_DEFERRED	0x00000824	tg3.h
10281	MAC_TX_STATS_RESV3	0x00000828	tg3.h
10282	MAC_TX_STATS_EXCESSIVE_COL	0x0000082c	tg3.h
10283	MAC_TX_STATS_LATE_COL	0x00000830	tg3.h
10284	MAC_TX_STATS_RESV4_1	0x00000834	tg3.h
10285	MAC_TX_STATS_RESV4_2	0x00000838	tg3.h
10286	MAC_TX_STATS_RESV4_3	0x0000083c	tg3.h
10287	MAC_TX_STATS_RESV4_4	0x00000840	tg3.h
10288	MAC_TX_STATS_RESV4_5	0x00000844	tg3.h
10289	MAC_TX_STATS_RESV4_6	0x00000848	tg3.h
10290	MAC_TX_STATS_RESV4_7	0x0000084c	tg3.h
10291	MAC_TX_STATS_RESV4_8	0x00000850	tg3.h
10292	MAC_TX_STATS_RESV4_9	0x00000854	tg3.h
10293	MAC_TX_STATS_RESV4_10	0x00000858	tg3.h
10294	MAC_TX_STATS_RESV4_11	0x0000085c	tg3.h
10295	MAC_TX_STATS_RESV4_12	0x00000860	tg3.h
10296	MAC_TX_STATS_RESV4_13	0x00000864	tg3.h
10297	MAC_TX_STATS_RESV4_14	0x00000868	tg3.h
10298	MAC_TX_STATS_UCAST	0x0000086c	tg3.h
10299	MAC_TX_STATS_MCAST	0x00000870	tg3.h
10300	MAC_TX_STATS_BCAST	0x00000874	tg3.h
10301	MAC_TX_STATS_RESV5_1	0x00000878	tg3.h
10302	MAC_TX_STATS_RESV5_2	0x0000087c	tg3.h
10303	MAC_RX_STATS_OCTETS	0x00000880	tg3.h
10304	MAC_RX_STATS_RESV1	0x00000884	tg3.h
10305	MAC_RX_STATS_FRAGMENTS	0x00000888	tg3.h
10306	MAC_RX_STATS_UCAST	0x0000088c	tg3.h
10307	MAC_RX_STATS_MCAST	0x00000890	tg3.h
10308	MAC_RX_STATS_BCAST	0x00000894	tg3.h
10309	MAC_RX_STATS_FCS_ERRORS	0x00000898	tg3.h
10310	MAC_RX_STATS_ALIGN_ERRORS	0x0000089c	tg3.h
10311	MAC_RX_STATS_XON_PAUSE_RECVD	0x000008a0	tg3.h
10312	MAC_RX_STATS_XOFF_PAUSE_RECVD	0x000008a4	tg3.h
10313	MAC_RX_STATS_MAC_CTRL_RECVD	0x000008a8	tg3.h
10314	MAC_RX_STATS_XOFF_ENTERED	0x000008ac	tg3.h
10315	MAC_RX_STATS_FRAME_TOO_LONG	0x000008b0	tg3.h
10316	MAC_RX_STATS_JABBERS	0x000008b4	tg3.h
10317	MAC_RX_STATS_UNDERSIZE	0x000008b8	tg3.h
10318	SNDDATAI_MODE	0x00000c00	tg3.h
10319	SNDDATAI_MODE_RESET	0x00000001	tg3.h
10320	SNDDATAI_MODE_ENABLE	0x00000002	tg3.h
10321	SNDDATAI_MODE_STAT_OFLOW_ENAB	0x00000004	tg3.h
10322	SNDDATAI_STATUS	0x00000c04	tg3.h
10323	SNDDATAI_STATUS_STAT_OFLOW	0x00000004	tg3.h
10324	SNDDATAI_STATSCTRL	0x00000c08	tg3.h
10325	SNDDATAI_SCTRL_ENABLE	0x00000001	tg3.h
10326	SNDDATAI_SCTRL_FASTUPD	0x00000002	tg3.h
10327	SNDDATAI_SCTRL_CLEAR	0x00000004	tg3.h
10328	SNDDATAI_SCTRL_FLUSH	0x00000008	tg3.h
10329	SNDDATAI_SCTRL_FORCE_ZERO	0x00000010	tg3.h
10330	SNDDATAI_STATSENAB	0x00000c0c	tg3.h
10331	SNDDATAI_STATSINCMASK	0x00000c10	tg3.h
10332	SNDDATAI_COS_CNT_0	0x00000c80	tg3.h
10333	SNDDATAI_COS_CNT_1	0x00000c84	tg3.h
10334	SNDDATAI_COS_CNT_2	0x00000c88	tg3.h
10335	SNDDATAI_COS_CNT_3	0x00000c8c	tg3.h
10336	SNDDATAI_COS_CNT_4	0x00000c90	tg3.h
10337	SNDDATAI_COS_CNT_5	0x00000c94	tg3.h
10338	SNDDATAI_COS_CNT_6	0x00000c98	tg3.h
10339	SNDDATAI_COS_CNT_7	0x00000c9c	tg3.h
10340	SNDDATAI_COS_CNT_8	0x00000ca0	tg3.h
10341	SNDDATAI_COS_CNT_9	0x00000ca4	tg3.h
10342	SNDDATAI_COS_CNT_10	0x00000ca8	tg3.h
10343	SNDDATAI_COS_CNT_11	0x00000cac	tg3.h
10344	SNDDATAI_COS_CNT_12	0x00000cb0	tg3.h
10345	SNDDATAI_COS_CNT_13	0x00000cb4	tg3.h
10346	SNDDATAI_COS_CNT_14	0x00000cb8	tg3.h
10347	SNDDATAI_COS_CNT_15	0x00000cbc	tg3.h
10348	SNDDATAI_DMA_RDQ_FULL_CNT	0x00000cc0	tg3.h
10349	SNDDATAI_DMA_PRIO_RDQ_FULL_CNT	0x00000cc4	tg3.h
10350	SNDDATAI_SDCQ_FULL_CNT	0x00000cc8	tg3.h
10351	SNDDATAI_NICRNG_SSND_PIDX_CNT	0x00000ccc	tg3.h
10352	SNDDATAI_STATS_UPDATED_CNT	0x00000cd0	tg3.h
10353	SNDDATAI_INTERRUPTS_CNT	0x00000cd4	tg3.h
10354	SNDDATAI_AVOID_INTERRUPTS_CNT	0x00000cd8	tg3.h
10355	SNDDATAI_SND_THRESH_HIT_CNT	0x00000cdc	tg3.h
10356	SNDDATAC_MODE	0x00001000	tg3.h
10357	SNDDATAC_MODE_RESET	0x00000001	tg3.h
10358	SNDDATAC_MODE_ENABLE	0x00000002	tg3.h
10359	SNDBDS_MODE	0x00001400	tg3.h
10360	SNDBDS_MODE_RESET	0x00000001	tg3.h
10361	SNDBDS_MODE_ENABLE	0x00000002	tg3.h
10362	SNDBDS_MODE_ATTN_ENABLE	0x00000004	tg3.h
10363	SNDBDS_STATUS	0x00001404	tg3.h
10364	SNDBDS_STATUS_ERROR_ATTN	0x00000004	tg3.h
10365	SNDBDS_HWDIAG	0x00001408	tg3.h
10366	SNDBDS_SEL_CON_IDX_0	0x00001440	tg3.h
10367	SNDBDS_SEL_CON_IDX_1	0x00001444	tg3.h
10368	SNDBDS_SEL_CON_IDX_2	0x00001448	tg3.h
10369	SNDBDS_SEL_CON_IDX_3	0x0000144c	tg3.h
10370	SNDBDS_SEL_CON_IDX_4	0x00001450	tg3.h
10371	SNDBDS_SEL_CON_IDX_5	0x00001454	tg3.h
10372	SNDBDS_SEL_CON_IDX_6	0x00001458	tg3.h
10373	SNDBDS_SEL_CON_IDX_7	0x0000145c	tg3.h
10374	SNDBDS_SEL_CON_IDX_8	0x00001460	tg3.h
10375	SNDBDS_SEL_CON_IDX_9	0x00001464	tg3.h
10376	SNDBDS_SEL_CON_IDX_10	0x00001468	tg3.h
10377	SNDBDS_SEL_CON_IDX_11	0x0000146c	tg3.h
10378	SNDBDS_SEL_CON_IDX_12	0x00001470	tg3.h
10379	SNDBDS_SEL_CON_IDX_13	0x00001474	tg3.h
10380	SNDBDS_SEL_CON_IDX_14	0x00001478	tg3.h
10381	SNDBDS_SEL_CON_IDX_15	0x0000147c	tg3.h
10382	SNDBDI_MODE	0x00001800	tg3.h
10383	SNDBDI_MODE_RESET	0x00000001	tg3.h
10384	SNDBDI_MODE_ENABLE	0x00000002	tg3.h
10385	SNDBDI_MODE_ATTN_ENABLE	0x00000004	tg3.h
10386	SNDBDI_STATUS	0x00001804	tg3.h
10387	SNDBDI_STATUS_ERROR_ATTN	0x00000004	tg3.h
10388	SNDBDI_IN_PROD_IDX_0	0x00001808	tg3.h
10389	SNDBDI_IN_PROD_IDX_1	0x0000180c	tg3.h
10390	SNDBDI_IN_PROD_IDX_2	0x00001810	tg3.h
10391	SNDBDI_IN_PROD_IDX_3	0x00001814	tg3.h
10392	SNDBDI_IN_PROD_IDX_4	0x00001818	tg3.h
10393	SNDBDI_IN_PROD_IDX_5	0x0000181c	tg3.h
10394	SNDBDI_IN_PROD_IDX_6	0x00001820	tg3.h
10395	SNDBDI_IN_PROD_IDX_7	0x00001824	tg3.h
10396	SNDBDI_IN_PROD_IDX_8	0x00001828	tg3.h
10397	SNDBDI_IN_PROD_IDX_9	0x0000182c	tg3.h
10398	SNDBDI_IN_PROD_IDX_10	0x00001830	tg3.h
10399	SNDBDI_IN_PROD_IDX_11	0x00001834	tg3.h
10400	SNDBDI_IN_PROD_IDX_12	0x00001838	tg3.h
10401	SNDBDI_IN_PROD_IDX_13	0x0000183c	tg3.h
10402	SNDBDI_IN_PROD_IDX_14	0x00001840	tg3.h
10403	SNDBDI_IN_PROD_IDX_15	0x00001844	tg3.h
10404	SNDBDC_MODE	0x00001c00	tg3.h
10405	SNDBDC_MODE_RESET	0x00000001	tg3.h
10406	SNDBDC_MODE_ENABLE	0x00000002	tg3.h
10407	SNDBDC_MODE_ATTN_ENABLE	0x00000004	tg3.h
10408	RCVLPC_MODE	0x00002000	tg3.h
10409	RCVLPC_MODE_RESET	0x00000001	tg3.h
10410	RCVLPC_MODE_ENABLE	0x00000002	tg3.h
10411	RCVLPC_MODE_CLASS0_ATTN_ENAB	0x00000004	tg3.h
10412	RCVLPC_MODE_MAPOOR_AATTN_ENAB	0x00000008	tg3.h
10413	RCVLPC_MODE_STAT_OFLOW_ENAB	0x00000010	tg3.h
10414	RCVLPC_STATUS	0x00002004	tg3.h
10415	RCVLPC_STATUS_CLASS0	0x00000004	tg3.h
10416	RCVLPC_STATUS_MAPOOR	0x00000008	tg3.h
10417	RCVLPC_STATUS_STAT_OFLOW	0x00000010	tg3.h
10418	RCVLPC_LOCK	0x00002008	tg3.h
10419	RCVLPC_LOCK_REQ_MASK	0x0000ffff	tg3.h
10420	RCVLPC_LOCK_REQ_SHIFT	0	tg3.h
10421	RCVLPC_LOCK_GRANT_MASK	0xffff0000	tg3.h
10422	RCVLPC_LOCK_GRANT_SHIFT	16	tg3.h
10423	RCVLPC_NON_EMPTY_BITS	0x0000200c	tg3.h
10424	RCVLPC_NON_EMPTY_BITS_MASK	0x0000ffff	tg3.h
10425	RCVLPC_CONFIG	0x00002010	tg3.h
10426	RCVLPC_STATSCTRL	0x00002014	tg3.h
10427	RCVLPC_STATSCTRL_ENABLE	0x00000001	tg3.h
10428	RCVLPC_STATSCTRL_FASTUPD	0x00000002	tg3.h
10429	RCVLPC_STATS_ENABLE	0x00002018	tg3.h
10430	RCVLPC_STATSENAB_LNGBRST_RFIX	0x00400000	tg3.h
10431	RCVLPC_STATS_INCMASK	0x0000201c	tg3.h
10432	RCVLPC_SELLST_BASE	0x00002100	tg3.h	16 16-byte entries
10433	SELLST_TAIL	0x00000004	tg3.h
10434	SELLST_CONT	0x00000008	tg3.h
10435	SELLST_UNUSED	0x0000000c	tg3.h
10436	RCVLPC_COS_CNTL_BASE	0x00002200	tg3.h	16 4-byte entries
10437	RCVLPC_DROP_FILTER_CNT	0x00002240	tg3.h
10438	RCVLPC_DMA_WQ_FULL_CNT	0x00002244	tg3.h
10439	RCVLPC_DMA_HIPRIO_WQ_FULL_CNT	0x00002248	tg3.h
10440	RCVLPC_NO_RCV_BD_CNT	0x0000224c	tg3.h
10441	RCVLPC_IN_DISCARDS_CNT	0x00002250	tg3.h
10442	RCVLPC_IN_ERRORS_CNT	0x00002254	tg3.h
10443	RCVLPC_RCV_THRESH_HIT_CNT	0x00002258	tg3.h
10444	RCVDBDI_MODE	0x00002400	tg3.h
10445	RCVDBDI_MODE_RESET	0x00000001	tg3.h
10446	RCVDBDI_MODE_ENABLE	0x00000002	tg3.h
10447	RCVDBDI_MODE_JUMBOBD_NEEDED	0x00000004	tg3.h
10448	RCVDBDI_MODE_FRM_TOO_BIG	0x00000008	tg3.h
10449	RCVDBDI_MODE_INV_RING_SZ	0x00000010	tg3.h
10450	RCVDBDI_STATUS	0x00002404	tg3.h
10451	RCVDBDI_STATUS_JUMBOBD_NEEDED	0x00000004	tg3.h
10452	RCVDBDI_STATUS_FRM_TOO_BIG	0x00000008	tg3.h
10453	RCVDBDI_STATUS_INV_RING_SZ	0x00000010	tg3.h
10454	RCVDBDI_SPLIT_FRAME_MINSZ	0x00002408	tg3.h
10455	RCVDBDI_JUMBO_BD	0x00002440	tg3.h	TG3_BDINFO_...
10456	RCVDBDI_STD_BD	0x00002450	tg3.h	TG3_BDINFO_...
10457	RCVDBDI_MINI_BD	0x00002460	tg3.h	TG3_BDINFO_...
10458	RCVDBDI_JUMBO_CON_IDX	0x00002470	tg3.h
10459	RCVDBDI_STD_CON_IDX	0x00002474	tg3.h
10460	RCVDBDI_MINI_CON_IDX	0x00002478	tg3.h
10461	RCVDBDI_BD_PROD_IDX_0	0x00002480	tg3.h
10462	RCVDBDI_BD_PROD_IDX_1	0x00002484	tg3.h
10463	RCVDBDI_BD_PROD_IDX_2	0x00002488	tg3.h
10464	RCVDBDI_BD_PROD_IDX_3	0x0000248c	tg3.h
10465	RCVDBDI_BD_PROD_IDX_4	0x00002490	tg3.h
10466	RCVDBDI_BD_PROD_IDX_5	0x00002494	tg3.h
10467	RCVDBDI_BD_PROD_IDX_6	0x00002498	tg3.h
10468	RCVDBDI_BD_PROD_IDX_7	0x0000249c	tg3.h
10469	RCVDBDI_BD_PROD_IDX_8	0x000024a0	tg3.h
10470	RCVDBDI_BD_PROD_IDX_9	0x000024a4	tg3.h
10471	RCVDBDI_BD_PROD_IDX_10	0x000024a8	tg3.h
10472	RCVDBDI_BD_PROD_IDX_11	0x000024ac	tg3.h
10473	RCVDBDI_BD_PROD_IDX_12	0x000024b0	tg3.h
10474	RCVDBDI_BD_PROD_IDX_13	0x000024b4	tg3.h
10475	RCVDBDI_BD_PROD_IDX_14	0x000024b8	tg3.h
10476	RCVDBDI_BD_PROD_IDX_15	0x000024bc	tg3.h
10477	RCVDBDI_HWDIAG	0x000024c0	tg3.h
10478	RCVDCC_MODE	0x00002800	tg3.h
10479	RCVDCC_MODE_RESET	0x00000001	tg3.h
10480	RCVDCC_MODE_ENABLE	0x00000002	tg3.h
10481	RCVDCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
10482	RCVBDI_MODE	0x00002c00	tg3.h
10483	RCVBDI_MODE_RESET	0x00000001	tg3.h
10484	RCVBDI_MODE_ENABLE	0x00000002	tg3.h
10485	RCVBDI_MODE_RCB_ATTN_ENAB	0x00000004	tg3.h
10486	RCVBDI_STATUS	0x00002c04	tg3.h
10487	RCVBDI_STATUS_RCB_ATTN	0x00000004	tg3.h
10488	RCVBDI_JUMBO_PROD_IDX	0x00002c08	tg3.h
10489	RCVBDI_STD_PROD_IDX	0x00002c0c	tg3.h
10490	RCVBDI_MINI_PROD_IDX	0x00002c10	tg3.h
10491	RCVBDI_MINI_THRESH	0x00002c14	tg3.h
10492	RCVBDI_STD_THRESH	0x00002c18	tg3.h
10493	RCVBDI_JUMBO_THRESH	0x00002c1c	tg3.h
10494	RCVCC_MODE	0x00003000	tg3.h
10495	RCVCC_MODE_RESET	0x00000001	tg3.h
10496	RCVCC_MODE_ENABLE	0x00000002	tg3.h
10497	RCVCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
10498	RCVCC_STATUS	0x00003004	tg3.h
10499	RCVCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
10500	RCVCC_JUMP_PROD_IDX	0x00003008	tg3.h
10501	RCVCC_STD_PROD_IDX	0x0000300c	tg3.h
10502	RCVCC_MINI_PROD_IDX	0x00003010	tg3.h
10503	RCVLSC_MODE	0x00003400	tg3.h
10504	RCVLSC_MODE_RESET	0x00000001	tg3.h
10505	RCVLSC_MODE_ENABLE	0x00000002	tg3.h
10506	RCVLSC_MODE_ATTN_ENABLE	0x00000004	tg3.h
10507	RCVLSC_STATUS	0x00003404	tg3.h
10508	RCVLSC_STATUS_ERROR_ATTN	0x00000004	tg3.h
10509	MBFREE_MODE	0x00003800	tg3.h
10510	MBFREE_MODE_RESET	0x00000001	tg3.h
10511	MBFREE_MODE_ENABLE	0x00000002	tg3.h
10512	MBFREE_STATUS	0x00003804	tg3.h
10513	HOSTCC_MODE	0x00003c00	tg3.h
10514	HOSTCC_MODE_RESET	0x00000001	tg3.h
10515	HOSTCC_MODE_ENABLE	0x00000002	tg3.h
10516	HOSTCC_MODE_ATTN	0x00000004	tg3.h
10517	HOSTCC_MODE_NOW	0x00000008	tg3.h
10518	HOSTCC_MODE_FULL_STATUS	0x00000000	tg3.h
10519	HOSTCC_MODE_64BYTE	0x00000080	tg3.h
10520	HOSTCC_MODE_32BYTE	0x00000100	tg3.h
10521	HOSTCC_MODE_CLRTICK_RXBD	0x00000200	tg3.h
10522	HOSTCC_MODE_CLRTICK_TXBD	0x00000400	tg3.h
10523	HOSTCC_MODE_NOINT_ON_NOW	0x00000800	tg3.h
10524	HOSTCC_MODE_NOINT_ON_FORCE	0x00001000	tg3.h
10525	HOSTCC_STATUS	0x00003c04	tg3.h
10526	HOSTCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
10527	HOSTCC_RXCOL_TICKS	0x00003c08	tg3.h
10528	LOW_RXCOL_TICKS	0x00000032	tg3.h
10529	DEFAULT_RXCOL_TICKS	0x00000048	tg3.h
10530	HIGH_RXCOL_TICKS	0x00000096	tg3.h
10531	HOSTCC_TXCOL_TICKS	0x00003c0c	tg3.h
10532	LOW_TXCOL_TICKS	0x00000096	tg3.h
10533	DEFAULT_TXCOL_TICKS	0x0000012c	tg3.h
10534	HIGH_TXCOL_TICKS	0x00000145	tg3.h
10535	HOSTCC_RXMAX_FRAMES	0x00003c10	tg3.h
10536	LOW_RXMAX_FRAMES	0x00000005	tg3.h
10537	DEFAULT_RXMAX_FRAMES	0x00000008	tg3.h
10538	HIGH_RXMAX_FRAMES	0x00000012	tg3.h
10539	HOSTCC_TXMAX_FRAMES	0x00003c14	tg3.h
10540	LOW_TXMAX_FRAMES	0x00000035	tg3.h
10541	DEFAULT_TXMAX_FRAMES	0x0000004b	tg3.h
10542	HIGH_TXMAX_FRAMES	0x00000052	tg3.h
10543	HOSTCC_RXCOAL_TICK_INT	0x00003c18	tg3.h
10544	DEFAULT_RXCOAL_TICK_INT	0x00000019	tg3.h
10545	HOSTCC_TXCOAL_TICK_INT	0x00003c1c	tg3.h
10546	DEFAULT_TXCOAL_TICK_INT	0x00000019	tg3.h
10547	HOSTCC_RXCOAL_MAXF_INT	0x00003c20	tg3.h
10548	DEFAULT_RXCOAL_MAXF_INT	0x00000005	tg3.h
10549	HOSTCC_TXCOAL_MAXF_INT	0x00003c24	tg3.h
10550	DEFAULT_TXCOAL_MAXF_INT	0x00000005	tg3.h
10551	HOSTCC_STAT_COAL_TICKS	0x00003c28	tg3.h
10552	DEFAULT_STAT_COAL_TICKS	0x000f4240	tg3.h
10553	HOSTCC_STATS_BLK_HOST_ADDR	0x00003c30	tg3.h	64-bit
10554	HOSTCC_STATUS_BLK_HOST_ADDR	0x00003c38	tg3.h	64-bit
10555	HOSTCC_STATS_BLK_NIC_ADDR	0x00003c40	tg3.h
10556	HOSTCC_STATUS_BLK_NIC_ADDR	0x00003c44	tg3.h
10557	HOSTCC_FLOW_ATTN	0x00003c48	tg3.h
10558	HOSTCC_JUMBO_CON_IDX	0x00003c50	tg3.h
10559	HOSTCC_STD_CON_IDX	0x00003c54	tg3.h
10560	HOSTCC_MINI_CON_IDX	0x00003c58	tg3.h
10561	HOSTCC_RET_PROD_IDX_0	0x00003c80	tg3.h
10562	HOSTCC_RET_PROD_IDX_1	0x00003c84	tg3.h
10563	HOSTCC_RET_PROD_IDX_2	0x00003c88	tg3.h
10564	HOSTCC_RET_PROD_IDX_3	0x00003c8c	tg3.h
10565	HOSTCC_RET_PROD_IDX_4	0x00003c90	tg3.h
10566	HOSTCC_RET_PROD_IDX_5	0x00003c94	tg3.h
10567	HOSTCC_RET_PROD_IDX_6	0x00003c98	tg3.h
10568	HOSTCC_RET_PROD_IDX_7	0x00003c9c	tg3.h
10569	HOSTCC_RET_PROD_IDX_8	0x00003ca0	tg3.h
10570	HOSTCC_RET_PROD_IDX_9	0x00003ca4	tg3.h
10571	HOSTCC_RET_PROD_IDX_10	0x00003ca8	tg3.h
10572	HOSTCC_RET_PROD_IDX_11	0x00003cac	tg3.h
10573	HOSTCC_RET_PROD_IDX_12	0x00003cb0	tg3.h
10574	HOSTCC_RET_PROD_IDX_13	0x00003cb4	tg3.h
10575	HOSTCC_RET_PROD_IDX_14	0x00003cb8	tg3.h
10576	HOSTCC_RET_PROD_IDX_15	0x00003cbc	tg3.h
10577	HOSTCC_SND_CON_IDX_0	0x00003cc0	tg3.h
10578	HOSTCC_SND_CON_IDX_1	0x00003cc4	tg3.h
10579	HOSTCC_SND_CON_IDX_2	0x00003cc8	tg3.h
10580	HOSTCC_SND_CON_IDX_3	0x00003ccc	tg3.h
10581	HOSTCC_SND_CON_IDX_4	0x00003cd0	tg3.h
10582	HOSTCC_SND_CON_IDX_5	0x00003cd4	tg3.h
10583	HOSTCC_SND_CON_IDX_6	0x00003cd8	tg3.h
10584	HOSTCC_SND_CON_IDX_7	0x00003cdc	tg3.h
10585	HOSTCC_SND_CON_IDX_8	0x00003ce0	tg3.h
10586	HOSTCC_SND_CON_IDX_9	0x00003ce4	tg3.h
10587	HOSTCC_SND_CON_IDX_10	0x00003ce8	tg3.h
10588	HOSTCC_SND_CON_IDX_11	0x00003cec	tg3.h
10589	HOSTCC_SND_CON_IDX_12	0x00003cf0	tg3.h
10590	HOSTCC_SND_CON_IDX_13	0x00003cf4	tg3.h
10591	HOSTCC_SND_CON_IDX_14	0x00003cf8	tg3.h
10592	HOSTCC_SND_CON_IDX_15	0x00003cfc	tg3.h
10593	MEMARB_MODE	0x00004000	tg3.h
10594	MEMARB_MODE_RESET	0x00000001	tg3.h
10595	MEMARB_MODE_ENABLE	0x00000002	tg3.h
10596	MEMARB_STATUS	0x00004004	tg3.h
10597	MEMARB_TRAP_ADDR_LOW	0x00004008	tg3.h
10598	MEMARB_TRAP_ADDR_HIGH	0x0000400c	tg3.h
10599	BUFMGR_MODE	0x00004400	tg3.h
10600	BUFMGR_MODE_RESET	0x00000001	tg3.h
10601	BUFMGR_MODE_ENABLE	0x00000002	tg3.h
10602	BUFMGR_MODE_ATTN_ENABLE	0x00000004	tg3.h
10603	BUFMGR_MODE_BM_TEST	0x00000008	tg3.h
10604	BUFMGR_MODE_MBLOW_ATTN_ENAB	0x00000010	tg3.h
10605	BUFMGR_STATUS	0x00004404	tg3.h
10606	BUFMGR_STATUS_ERROR	0x00000004	tg3.h
10607	BUFMGR_STATUS_MBLOW	0x00000010	tg3.h
10608	BUFMGR_MB_POOL_ADDR	0x00004408	tg3.h
10609	BUFMGR_MB_POOL_SIZE	0x0000440c	tg3.h
10610	BUFMGR_MB_RDMA_LOW_WATER	0x00004410	tg3.h
10611	DEFAULT_MB_RDMA_LOW_WATER	0x00000050	tg3.h
10612	DEFAULT_MB_RDMA_LOW_WATER_5705	0x00000000	tg3.h
10613	DEFAULT_MB_RDMA_LOW_WATER_JUMBO	0x00000130	tg3.h
10614	BUFMGR_MB_MACRX_LOW_WATER	0x00004414	tg3.h
10615	DEFAULT_MB_MACRX_LOW_WATER	0x00000020	tg3.h
10616	DEFAULT_MB_MACRX_LOW_WATER_5705	0x00000010	tg3.h
10617	DEFAULT_MB_MACRX_LOW_WATER_JUMB	0x00000098	tg3.h
10618	BUFMGR_MB_HIGH_WATER	0x00004418	tg3.h
10619	DEFAULT_MB_HIGH_WATER	0x00000060	tg3.h
10620	DEFAULT_MB_HIGH_WATER_5705	0x00000060	tg3.h
10621	DEFAULT_MB_HIGH_WATER_JUMBO	0x0000017c	tg3.h
10622	BUFMGR_RX_MB_ALLOC_REQ	0x0000441c	tg3.h
10623	BUFMGR_MB_ALLOC_BIT	0x10000000	tg3.h
10624	BUFMGR_RX_MB_ALLOC_RESP	0x00004420	tg3.h
10625	BUFMGR_TX_MB_ALLOC_REQ	0x00004424	tg3.h
10626	BUFMGR_TX_MB_ALLOC_RESP	0x00004428	tg3.h
10627	BUFMGR_DMA_DESC_POOL_ADDR	0x0000442c	tg3.h
10628	BUFMGR_DMA_DESC_POOL_SIZE	0x00004430	tg3.h
10629	BUFMGR_DMA_LOW_WATER	0x00004434	tg3.h
10630	DEFAULT_DMA_LOW_WATER	0x00000005	tg3.h
10631	BUFMGR_DMA_HIGH_WATER	0x00004438	tg3.h
10632	DEFAULT_DMA_HIGH_WATER	0x0000000a	tg3.h
10633	BUFMGR_RX_DMA_ALLOC_REQ	0x0000443c	tg3.h
10634	BUFMGR_RX_DMA_ALLOC_RESP	0x00004440	tg3.h
10635	BUFMGR_TX_DMA_ALLOC_REQ	0x00004444	tg3.h
10636	BUFMGR_TX_DMA_ALLOC_RESP	0x00004448	tg3.h
10637	BUFMGR_HWDIAG_0	0x0000444c	tg3.h
10638	BUFMGR_HWDIAG_1	0x00004450	tg3.h
10639	BUFMGR_HWDIAG_2	0x00004454	tg3.h
10640	RDMAC_MODE	0x00004800	tg3.h
10641	RDMAC_MODE_RESET	0x00000001	tg3.h
10642	RDMAC_MODE_ENABLE	0x00000002	tg3.h
10643	RDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
10644	RDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
10645	RDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
10646	RDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
10647	RDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
10648	RDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
10649	RDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
10650	RDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
10651	RDMAC_MODE_SPLIT_ENABLE	0x00000800	tg3.h
10652	RDMAC_MODE_SPLIT_RESET	0x00001000	tg3.h
10653	RDMAC_MODE_FIFO_SIZE_128	0x00020000	tg3.h
10654	RDMAC_MODE_FIFO_LONG_BURST	0x00030000	tg3.h
10655	RDMAC_STATUS	0x00004804	tg3.h
10656	RDMAC_STATUS_TGTABORT	0x00000004	tg3.h
10657	RDMAC_STATUS_MSTABORT	0x00000008	tg3.h
10658	RDMAC_STATUS_PARITYERR	0x00000010	tg3.h
10659	RDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
10660	RDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
10661	RDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
10662	RDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
10663	RDMAC_STATUS_LNGREAD	0x00000200	tg3.h
10664	WDMAC_MODE	0x00004c00	tg3.h
10665	WDMAC_MODE_RESET	0x00000001	tg3.h
10666	WDMAC_MODE_ENABLE	0x00000002	tg3.h
10667	WDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
10668	WDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
10669	WDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
10670	WDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
10671	WDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
10672	WDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
10673	WDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
10674	WDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
10675	WDMAC_MODE_RX_ACCEL	0x00000400	tg3.h
10676	WDMAC_STATUS	0x00004c04	tg3.h
10677	WDMAC_STATUS_TGTABORT	0x00000004	tg3.h
10678	WDMAC_STATUS_MSTABORT	0x00000008	tg3.h
10679	WDMAC_STATUS_PARITYERR	0x00000010	tg3.h
10680	WDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
10681	WDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
10682	WDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
10683	WDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
10684	WDMAC_STATUS_LNGREAD	0x00000200	tg3.h
10685	CPU_MODE	0x00000000	tg3.h
10686	CPU_MODE_RESET	0x00000001	tg3.h
10687	CPU_MODE_HALT	0x00000400	tg3.h
10688	CPU_STATE	0x00000004	tg3.h
10689	CPU_EVTMASK	0x00000008	tg3.h
10690	CPU_PC	0x0000001c	tg3.h
10691	CPU_INSN	0x00000020	tg3.h
10692	CPU_SPAD_UFLOW	0x00000024	tg3.h
10693	CPU_WDOG_CLEAR	0x00000028	tg3.h
10694	CPU_WDOG_VECTOR	0x0000002c	tg3.h
10695	CPU_WDOG_PC	0x00000030	tg3.h
10696	CPU_HW_BP	0x00000034	tg3.h
10697	CPU_WDOG_SAVED_STATE	0x00000044	tg3.h
10698	CPU_LAST_BRANCH_ADDR	0x00000048	tg3.h
10699	CPU_SPAD_UFLOW_SET	0x0000004c	tg3.h
10700	CPU_R0	0x00000200	tg3.h
10701	CPU_R1	0x00000204	tg3.h
10702	CPU_R2	0x00000208	tg3.h
10703	CPU_R3	0x0000020c	tg3.h
10704	CPU_R4	0x00000210	tg3.h
10705	CPU_R5	0x00000214	tg3.h
10706	CPU_R6	0x00000218	tg3.h
10707	CPU_R7	0x0000021c	tg3.h
10708	CPU_R8	0x00000220	tg3.h
10709	CPU_R9	0x00000224	tg3.h
10710	CPU_R10	0x00000228	tg3.h
10711	CPU_R11	0x0000022c	tg3.h
10712	CPU_R12	0x00000230	tg3.h
10713	CPU_R13	0x00000234	tg3.h
10714	CPU_R14	0x00000238	tg3.h
10715	CPU_R15	0x0000023c	tg3.h
10716	CPU_R16	0x00000240	tg3.h
10717	CPU_R17	0x00000244	tg3.h
10718	CPU_R18	0x00000248	tg3.h
10719	CPU_R19	0x0000024c	tg3.h
10720	CPU_R20	0x00000250	tg3.h
10721	CPU_R21	0x00000254	tg3.h
10722	CPU_R22	0x00000258	tg3.h
10723	CPU_R23	0x0000025c	tg3.h
10724	CPU_R24	0x00000260	tg3.h
10725	CPU_R25	0x00000264	tg3.h
10726	CPU_R26	0x00000268	tg3.h
10727	CPU_R27	0x0000026c	tg3.h
10728	CPU_R28	0x00000270	tg3.h
10729	CPU_R29	0x00000274	tg3.h
10730	CPU_R30	0x00000278	tg3.h
10731	CPU_R31	0x0000027c	tg3.h
10732	RX_CPU_BASE	0x00005000	tg3.h
10733	TX_CPU_BASE	0x00005400	tg3.h
10734	GRCMBOX_INTERRUPT_0	0x00005800	tg3.h	64-bit
10735	GRCMBOX_INTERRUPT_1	0x00005808	tg3.h	64-bit
10736	GRCMBOX_INTERRUPT_2	0x00005810	tg3.h	64-bit
10737	GRCMBOX_INTERRUPT_3	0x00005818	tg3.h	64-bit
10738	GRCMBOX_GENERAL_0	0x00005820	tg3.h	64-bit
10739	GRCMBOX_GENERAL_1	0x00005828	tg3.h	64-bit
10740	GRCMBOX_GENERAL_2	0x00005830	tg3.h	64-bit
10741	GRCMBOX_GENERAL_3	0x00005838	tg3.h	64-bit
10742	GRCMBOX_GENERAL_4	0x00005840	tg3.h	64-bit
10743	GRCMBOX_GENERAL_5	0x00005848	tg3.h	64-bit
10744	GRCMBOX_GENERAL_6	0x00005850	tg3.h	64-bit
10745	GRCMBOX_GENERAL_7	0x00005858	tg3.h	64-bit
10746	GRCMBOX_RELOAD_STAT	0x00005860	tg3.h	64-bit
10747	GRCMBOX_RCVSTD_PROD_IDX	0x00005868	tg3.h	64-bit
10748	GRCMBOX_RCVJUMBO_PROD_IDX	0x00005870	tg3.h	64-bit
10749	GRCMBOX_RCVMINI_PROD_IDX	0x00005878	tg3.h	64-bit
10750	GRCMBOX_RCVRET_CON_IDX_0	0x00005880	tg3.h	64-bit
10751	GRCMBOX_RCVRET_CON_IDX_1	0x00005888	tg3.h	64-bit
10752	GRCMBOX_RCVRET_CON_IDX_2	0x00005890	tg3.h	64-bit
10753	GRCMBOX_RCVRET_CON_IDX_3	0x00005898	tg3.h	64-bit
10754	GRCMBOX_RCVRET_CON_IDX_4	0x000058a0	tg3.h	64-bit
10755	GRCMBOX_RCVRET_CON_IDX_5	0x000058a8	tg3.h	64-bit
10756	GRCMBOX_RCVRET_CON_IDX_6	0x000058b0	tg3.h	64-bit
10757	GRCMBOX_RCVRET_CON_IDX_7	0x000058b8	tg3.h	64-bit
10758	GRCMBOX_RCVRET_CON_IDX_8	0x000058c0	tg3.h	64-bit
10759	GRCMBOX_RCVRET_CON_IDX_9	0x000058c8	tg3.h	64-bit
10760	GRCMBOX_RCVRET_CON_IDX_10	0x000058d0	tg3.h	64-bit
10761	GRCMBOX_RCVRET_CON_IDX_11	0x000058d8	tg3.h	64-bit
10762	GRCMBOX_RCVRET_CON_IDX_12	0x000058e0	tg3.h	64-bit
10763	GRCMBOX_RCVRET_CON_IDX_13	0x000058e8	tg3.h	64-bit
10764	GRCMBOX_RCVRET_CON_IDX_14	0x000058f0	tg3.h	64-bit
10765	GRCMBOX_RCVRET_CON_IDX_15	0x000058f8	tg3.h	64-bit
10766	GRCMBOX_SNDHOST_PROD_IDX_0	0x00005900	tg3.h	64-bit
10767	GRCMBOX_SNDHOST_PROD_IDX_1	0x00005908	tg3.h	64-bit
10768	GRCMBOX_SNDHOST_PROD_IDX_2	0x00005910	tg3.h	64-bit
10769	GRCMBOX_SNDHOST_PROD_IDX_3	0x00005918	tg3.h	64-bit
10770	GRCMBOX_SNDHOST_PROD_IDX_4	0x00005920	tg3.h	64-bit
10771	GRCMBOX_SNDHOST_PROD_IDX_5	0x00005928	tg3.h	64-bit
10772	GRCMBOX_SNDHOST_PROD_IDX_6	0x00005930	tg3.h	64-bit
10773	GRCMBOX_SNDHOST_PROD_IDX_7	0x00005938	tg3.h	64-bit
10774	GRCMBOX_SNDHOST_PROD_IDX_8	0x00005940	tg3.h	64-bit
10775	GRCMBOX_SNDHOST_PROD_IDX_9	0x00005948	tg3.h	64-bit
10776	GRCMBOX_SNDHOST_PROD_IDX_10	0x00005950	tg3.h	64-bit
10777	GRCMBOX_SNDHOST_PROD_IDX_11	0x00005958	tg3.h	64-bit
10778	GRCMBOX_SNDHOST_PROD_IDX_12	0x00005960	tg3.h	64-bit
10779	GRCMBOX_SNDHOST_PROD_IDX_13	0x00005968	tg3.h	64-bit
10780	GRCMBOX_SNDHOST_PROD_IDX_14	0x00005970	tg3.h	64-bit
10781	GRCMBOX_SNDHOST_PROD_IDX_15	0x00005978	tg3.h	64-bit
10782	GRCMBOX_SNDNIC_PROD_IDX_0	0x00005980	tg3.h	64-bit
10783	GRCMBOX_SNDNIC_PROD_IDX_1	0x00005988	tg3.h	64-bit
10784	GRCMBOX_SNDNIC_PROD_IDX_2	0x00005990	tg3.h	64-bit
10785	GRCMBOX_SNDNIC_PROD_IDX_3	0x00005998	tg3.h	64-bit
10786	GRCMBOX_SNDNIC_PROD_IDX_4	0x000059a0	tg3.h	64-bit
10787	GRCMBOX_SNDNIC_PROD_IDX_5	0x000059a8	tg3.h	64-bit
10788	GRCMBOX_SNDNIC_PROD_IDX_6	0x000059b0	tg3.h	64-bit
10789	GRCMBOX_SNDNIC_PROD_IDX_7	0x000059b8	tg3.h	64-bit
10790	GRCMBOX_SNDNIC_PROD_IDX_8	0x000059c0	tg3.h	64-bit
10791	GRCMBOX_SNDNIC_PROD_IDX_9	0x000059c8	tg3.h	64-bit
10792	GRCMBOX_SNDNIC_PROD_IDX_10	0x000059d0	tg3.h	64-bit
10793	GRCMBOX_SNDNIC_PROD_IDX_11	0x000059d8	tg3.h	64-bit
10794	GRCMBOX_SNDNIC_PROD_IDX_12	0x000059e0	tg3.h	64-bit
10795	GRCMBOX_SNDNIC_PROD_IDX_13	0x000059e8	tg3.h	64-bit
10796	GRCMBOX_SNDNIC_PROD_IDX_14	0x000059f0	tg3.h	64-bit
10797	GRCMBOX_SNDNIC_PROD_IDX_15	0x000059f8	tg3.h	64-bit
10798	GRCMBOX_HIGH_PRIO_EV_VECTOR	0x00005a00	tg3.h
10799	GRCMBOX_HIGH_PRIO_EV_MASK	0x00005a04	tg3.h
10800	GRCMBOX_LOW_PRIO_EV_VEC	0x00005a08	tg3.h
10801	GRCMBOX_LOW_PRIO_EV_MASK	0x00005a0c	tg3.h
10802	FTQ_RESET	0x00005c00	tg3.h
10803	FTQ_RESET_DMA_READ_QUEUE	(1 << 1)	tg3.h
10804	FTQ_RESET_DMA_HIGH_PRI_READ	(1 << 2)	tg3.h
10805	FTQ_RESET_SEND_BD_COMPLETION	(1 << 4)	tg3.h
10806	FTQ_RESET_DMA_WRITE	(1 << 6)	tg3.h
10807	FTQ_RESET_DMA_HIGH_PRI_WRITE	(1 << 7)	tg3.h
10808	FTQ_RESET_SEND_DATA_COMPLETION	(1 << 9)	tg3.h
10809	FTQ_RESET_HOST_COALESCING	(1 << 10)	tg3.h
10810	FTQ_RESET_MAC_TX	(1 << 11)	tg3.h
10811	FTQ_RESET_RX_BD_COMPLETE	(1 << 13)	tg3.h
10812	FTQ_RESET_RX_LIST_PLCMT	(1 << 14)	tg3.h
10813	FTQ_RESET_RX_DATA_COMPLETION	(1 << 16)	tg3.h
10814	FTQ_DMA_NORM_READ_CTL	0x00005c10	tg3.h
10815	FTQ_DMA_NORM_READ_FULL_CNT	0x00005c14	tg3.h
10816	FTQ_DMA_NORM_READ_FIFO_ENQDEQ	0x00005c18	tg3.h
10817	FTQ_DMA_NORM_READ_WRITE_PEEK	0x00005c1c	tg3.h
10818	FTQ_DMA_HIGH_READ_CTL	0x00005c20	tg3.h
10819	FTQ_DMA_HIGH_READ_FULL_CNT	0x00005c24	tg3.h
10820	FTQ_DMA_HIGH_READ_FIFO_ENQDEQ	0x00005c28	tg3.h
10821	FTQ_DMA_HIGH_READ_WRITE_PEEK	0x00005c2c	tg3.h
10822	FTQ_DMA_COMP_DISC_CTL	0x00005c30	tg3.h
10823	FTQ_DMA_COMP_DISC_FULL_CNT	0x00005c34	tg3.h
10824	FTQ_DMA_COMP_DISC_FIFO_ENQDEQ	0x00005c38	tg3.h
10825	FTQ_DMA_COMP_DISC_WRITE_PEEK	0x00005c3c	tg3.h
10826	FTQ_SEND_BD_COMP_CTL	0x00005c40	tg3.h
10827	FTQ_SEND_BD_COMP_FULL_CNT	0x00005c44	tg3.h
10828	FTQ_SEND_BD_COMP_FIFO_ENQDEQ	0x00005c48	tg3.h
10829	FTQ_SEND_BD_COMP_WRITE_PEEK	0x00005c4c	tg3.h
10830	FTQ_SEND_DATA_INIT_CTL	0x00005c50	tg3.h
10831	FTQ_SEND_DATA_INIT_FULL_CNT	0x00005c54	tg3.h
10832	FTQ_SEND_DATA_INIT_FIFO_ENQDEQ	0x00005c58	tg3.h
10833	FTQ_SEND_DATA_INIT_WRITE_PEEK	0x00005c5c	tg3.h
10834	FTQ_DMA_NORM_WRITE_CTL	0x00005c60	tg3.h
10835	FTQ_DMA_NORM_WRITE_FULL_CNT	0x00005c64	tg3.h
10836	FTQ_DMA_NORM_WRITE_FIFO_ENQDEQ	0x00005c68	tg3.h
10837	FTQ_DMA_NORM_WRITE_WRITE_PEEK	0x00005c6c	tg3.h
10838	FTQ_DMA_HIGH_WRITE_CTL	0x00005c70	tg3.h
10839	FTQ_DMA_HIGH_WRITE_FULL_CNT	0x00005c74	tg3.h
10840	FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ	0x00005c78	tg3.h
10841	FTQ_DMA_HIGH_WRITE_WRITE_PEEK	0x00005c7c	tg3.h
10842	FTQ_SWTYPE1_CTL	0x00005c80	tg3.h
10843	FTQ_SWTYPE1_FULL_CNT	0x00005c84	tg3.h
10844	FTQ_SWTYPE1_FIFO_ENQDEQ	0x00005c88	tg3.h
10845	FTQ_SWTYPE1_WRITE_PEEK	0x00005c8c	tg3.h
10846	FTQ_SEND_DATA_COMP_CTL	0x00005c90	tg3.h
10847	FTQ_SEND_DATA_COMP_FULL_CNT	0x00005c94	tg3.h
10848	FTQ_SEND_DATA_COMP_FIFO_ENQDEQ	0x00005c98	tg3.h
10849	FTQ_SEND_DATA_COMP_WRITE_PEEK	0x00005c9c	tg3.h
10850	FTQ_HOST_COAL_CTL	0x00005ca0	tg3.h
10851	FTQ_HOST_COAL_FULL_CNT	0x00005ca4	tg3.h
10852	FTQ_HOST_COAL_FIFO_ENQDEQ	0x00005ca8	tg3.h
10853	FTQ_HOST_COAL_WRITE_PEEK	0x00005cac	tg3.h
10854	FTQ_MAC_TX_CTL	0x00005cb0	tg3.h
10855	FTQ_MAC_TX_FULL_CNT	0x00005cb4	tg3.h
10856	FTQ_MAC_TX_FIFO_ENQDEQ	0x00005cb8	tg3.h
10857	FTQ_MAC_TX_WRITE_PEEK	0x00005cbc	tg3.h
10858	FTQ_MB_FREE_CTL	0x00005cc0	tg3.h
10859	FTQ_MB_FREE_FULL_CNT	0x00005cc4	tg3.h
10860	FTQ_MB_FREE_FIFO_ENQDEQ	0x00005cc8	tg3.h
10861	FTQ_MB_FREE_WRITE_PEEK	0x00005ccc	tg3.h
10862	FTQ_RCVBD_COMP_CTL	0x00005cd0	tg3.h
10863	FTQ_RCVBD_COMP_FULL_CNT	0x00005cd4	tg3.h
10864	FTQ_RCVBD_COMP_FIFO_ENQDEQ	0x00005cd8	tg3.h
10865	FTQ_RCVBD_COMP_WRITE_PEEK	0x00005cdc	tg3.h
10866	FTQ_RCVLST_PLMT_CTL	0x00005ce0	tg3.h
10867	FTQ_RCVLST_PLMT_FULL_CNT	0x00005ce4	tg3.h
10868	FTQ_RCVLST_PLMT_FIFO_ENQDEQ	0x00005ce8	tg3.h
10869	FTQ_RCVLST_PLMT_WRITE_PEEK	0x00005cec	tg3.h
10870	FTQ_RCVDATA_INI_CTL	0x00005cf0	tg3.h
10871	FTQ_RCVDATA_INI_FULL_CNT	0x00005cf4	tg3.h
10872	FTQ_RCVDATA_INI_FIFO_ENQDEQ	0x00005cf8	tg3.h
10873	FTQ_RCVDATA_INI_WRITE_PEEK	0x00005cfc	tg3.h
10874	FTQ_RCVDATA_COMP_CTL	0x00005d00	tg3.h
10875	FTQ_RCVDATA_COMP_FULL_CNT	0x00005d04	tg3.h
10876	FTQ_RCVDATA_COMP_FIFO_ENQDEQ	0x00005d08	tg3.h
10877	FTQ_RCVDATA_COMP_WRITE_PEEK	0x00005d0c	tg3.h
10878	FTQ_SWTYPE2_CTL	0x00005d10	tg3.h
10879	FTQ_SWTYPE2_FULL_CNT	0x00005d14	tg3.h
10880	FTQ_SWTYPE2_FIFO_ENQDEQ	0x00005d18	tg3.h
10881	FTQ_SWTYPE2_WRITE_PEEK	0x00005d1c	tg3.h
10882	MSGINT_MODE	0x00006000	tg3.h
10883	MSGINT_MODE_RESET	0x00000001	tg3.h
10884	MSGINT_MODE_ENABLE	0x00000002	tg3.h
10885	MSGINT_STATUS	0x00006004	tg3.h
10886	MSGINT_FIFO	0x00006008	tg3.h
10887	DMAC_MODE	0x00006400	tg3.h
10888	DMAC_MODE_RESET	0x00000001	tg3.h
10889	DMAC_MODE_ENABLE	0x00000002	tg3.h
10890	GRC_MODE	0x00006800	tg3.h
10891	GRC_MODE_UPD_ON_COAL	0x00000001	tg3.h
10892	GRC_MODE_BSWAP_NONFRM_DATA	0x00000002	tg3.h
10893	GRC_MODE_WSWAP_NONFRM_DATA	0x00000004	tg3.h
10894	GRC_MODE_BSWAP_DATA	0x00000010	tg3.h
10895	GRC_MODE_WSWAP_DATA	0x00000020	tg3.h
10896	GRC_MODE_SPLITHDR	0x00000100	tg3.h
10897	GRC_MODE_NOFRM_CRACKING	0x00000200	tg3.h
10898	GRC_MODE_INCL_CRC	0x00000400	tg3.h
10899	GRC_MODE_ALLOW_BAD_FRMS	0x00000800	tg3.h
10900	GRC_MODE_NOIRQ_ON_SENDS	0x00002000	tg3.h
10901	GRC_MODE_NOIRQ_ON_RCV	0x00004000	tg3.h
10902	GRC_MODE_FORCE_PCI32BIT	0x00008000	tg3.h
10903	GRC_MODE_HOST_STACKUP	0x00010000	tg3.h
10904	GRC_MODE_HOST_SENDBDS	0x00020000	tg3.h
10905	GRC_MODE_NO_TX_PHDR_CSUM	0x00100000	tg3.h
10906	GRC_MODE_NO_RX_PHDR_CSUM	0x00800000	tg3.h
10907	GRC_MODE_IRQ_ON_TX_CPU_ATTN	0x01000000	tg3.h
10908	GRC_MODE_IRQ_ON_RX_CPU_ATTN	0x02000000	tg3.h
10909	GRC_MODE_IRQ_ON_MAC_ATTN	0x04000000	tg3.h
10910	GRC_MODE_IRQ_ON_DMA_ATTN	0x08000000	tg3.h
10911	GRC_MODE_IRQ_ON_FLOW_ATTN	0x10000000	tg3.h
10912	GRC_MODE_4X_NIC_SEND_RINGS	0x20000000	tg3.h
10913	GRC_MODE_MCAST_FRM_ENABLE	0x40000000	tg3.h
10914	GRC_MISC_CFG	0x00006804	tg3.h
10915	GRC_MISC_CFG_CORECLK_RESET	0x00000001	tg3.h
10916	GRC_MISC_CFG_PRESCALAR_MASK	0x000000fe	tg3.h
10917	GRC_MISC_CFG_PRESCALAR_SHIFT	1	tg3.h
10918	GRC_MISC_CFG_BOARD_ID_MASK	0x0001e000	tg3.h
10919	GRC_MISC_CFG_BOARD_ID_5700	0x0001e000	tg3.h
10920	GRC_MISC_CFG_BOARD_ID_5701	0x00000000	tg3.h
10921	GRC_MISC_CFG_BOARD_ID_5702FE	0x00004000	tg3.h
10922	GRC_MISC_CFG_BOARD_ID_5703	0x00000000	tg3.h
10923	GRC_MISC_CFG_BOARD_ID_5703S	0x00002000	tg3.h
10924	GRC_MISC_CFG_BOARD_ID_5704	0x00000000	tg3.h
10925	GRC_MISC_CFG_BOARD_ID_5704CIOBE	0x00004000	tg3.h
10926	GRC_MISC_CFG_BOARD_ID_5704_A2	0x00008000	tg3.h
10927	GRC_MISC_CFG_BOARD_ID_5788	0x00010000	tg3.h
10928	GRC_MISC_CFG_BOARD_ID_5788M	0x00018000	tg3.h
10929	GRC_MISC_CFG_BOARD_ID_AC91002A1	0x00018000	tg3.h
10930	GRC_MISC_CFG_KEEP_GPHY_POWER	0x04000000	tg3.h
10931	GRC_LOCAL_CTRL	0x00006808	tg3.h
10932	GRC_LCLCTRL_INT_ACTIVE	0x00000001	tg3.h
10933	GRC_LCLCTRL_CLEARINT	0x00000002	tg3.h
10934	GRC_LCLCTRL_SETINT	0x00000004	tg3.h
10935	GRC_LCLCTRL_INT_ON_ATTN	0x00000008	tg3.h
10936	GRC_LCLCTRL_GPIO_INPUT0	0x00000100	tg3.h
10937	GRC_LCLCTRL_GPIO_INPUT1	0x00000200	tg3.h
10938	GRC_LCLCTRL_GPIO_INPUT2	0x00000400	tg3.h
10939	GRC_LCLCTRL_GPIO_OE0	0x00000800	tg3.h
10940	GRC_LCLCTRL_GPIO_OE1	0x00001000	tg3.h
10941	GRC_LCLCTRL_GPIO_OE2	0x00002000	tg3.h
10942	GRC_LCLCTRL_GPIO_OUTPUT0	0x00004000	tg3.h
10943	GRC_LCLCTRL_GPIO_OUTPUT1	0x00008000	tg3.h
10944	GRC_LCLCTRL_GPIO_OUTPUT2	0x00010000	tg3.h
10945	GRC_LCLCTRL_EXTMEM_ENABLE	0x00020000	tg3.h
10946	GRC_LCLCTRL_MEMSZ_MASK	0x001c0000	tg3.h
10947	GRC_LCLCTRL_MEMSZ_256K	0x00000000	tg3.h
10948	GRC_LCLCTRL_MEMSZ_512K	0x00040000	tg3.h
10949	GRC_LCLCTRL_MEMSZ_1M	0x00080000	tg3.h
10950	GRC_LCLCTRL_MEMSZ_2M	0x000c0000	tg3.h
10951	GRC_LCLCTRL_MEMSZ_4M	0x00100000	tg3.h
10952	GRC_LCLCTRL_MEMSZ_8M	0x00140000	tg3.h
10953	GRC_LCLCTRL_MEMSZ_16M	0x00180000	tg3.h
10954	GRC_LCLCTRL_BANK_SELECT	0x00200000	tg3.h
10955	GRC_LCLCTRL_SSRAM_TYPE	0x00400000	tg3.h
10956	GRC_LCLCTRL_AUTO_SEEPROM	0x01000000	tg3.h
10957	GRC_TIMER	0x0000680c	tg3.h
10958	GRC_RX_CPU_EVENT	0x00006810	tg3.h
10959	GRC_RX_TIMER_REF	0x00006814	tg3.h
10960	GRC_RX_CPU_SEM	0x00006818	tg3.h
10961	GRC_REMOTE_RX_CPU_ATTN	0x0000681c	tg3.h
10962	GRC_TX_CPU_EVENT	0x00006820	tg3.h
10963	GRC_TX_TIMER_REF	0x00006824	tg3.h
10964	GRC_TX_CPU_SEM	0x00006828	tg3.h
10965	GRC_REMOTE_TX_CPU_ATTN	0x0000682c	tg3.h
10966	GRC_MEM_POWER_UP	0x00006830	tg3.h	64-bit
10967	GRC_EEPROM_ADDR	0x00006838	tg3.h
10968	EEPROM_ADDR_WRITE	0x00000000	tg3.h
10969	EEPROM_ADDR_READ	0x80000000	tg3.h
10970	EEPROM_ADDR_COMPLETE	0x40000000	tg3.h
10971	EEPROM_ADDR_FSM_RESET	0x20000000	tg3.h
10972	EEPROM_ADDR_DEVID_MASK	0x1c000000	tg3.h
10973	EEPROM_ADDR_DEVID_SHIFT	26	tg3.h
10974	EEPROM_ADDR_START	0x02000000	tg3.h
10975	EEPROM_ADDR_CLKPERD_SHIFT	16	tg3.h
10976	EEPROM_ADDR_ADDR_MASK	0x0000ffff	tg3.h
10977	EEPROM_ADDR_ADDR_SHIFT	0	tg3.h
10978	EEPROM_DEFAULT_CLOCK_PERIOD	0x60	tg3.h
10979	EEPROM_CHIP_SIZE	(64 * 1024)	tg3.h
10980	GRC_EEPROM_DATA	0x0000683c	tg3.h
10981	GRC_EEPROM_CTRL	0x00006840	tg3.h
10982	GRC_MDI_CTRL	0x00006844	tg3.h
10983	GRC_SEEPROM_DELAY	0x00006848	tg3.h
10984	NVRAM_CMD	0x00007000	tg3.h
10985	NVRAM_CMD_RESET	0x00000001	tg3.h
10986	NVRAM_CMD_DONE	0x00000008	tg3.h
10987	NVRAM_CMD_GO	0x00000010	tg3.h
10988	NVRAM_CMD_WR	0x00000020	tg3.h
10989	NVRAM_CMD_RD	0x00000000	tg3.h
10990	NVRAM_CMD_ERASE	0x00000040	tg3.h
10991	NVRAM_CMD_FIRST	0x00000080	tg3.h
10992	NVRAM_CMD_LAST	0x00000100	tg3.h
10993	NVRAM_STAT	0x00007004	tg3.h
10994	NVRAM_WRDATA	0x00007008	tg3.h
10995	NVRAM_ADDR	0x0000700c	tg3.h
10996	NVRAM_ADDR_MSK	0x00ffffff	tg3.h
10997	NVRAM_RDDATA	0x00007010	tg3.h
10998	NVRAM_CFG1	0x00007014	tg3.h
10999	NVRAM_CFG1_FLASHIF_ENAB	0x00000001	tg3.h
11000	NVRAM_CFG1_BUFFERED_MODE	0x00000002	tg3.h
11001	NVRAM_CFG1_PASS_THRU	0x00000004	tg3.h
11002	NVRAM_CFG1_BIT_BANG	0x00000008	tg3.h
11003	NVRAM_CFG1_COMPAT_BYPASS	0x80000000	tg3.h
11004	NVRAM_CFG2	0x00007018	tg3.h
11005	NVRAM_CFG3	0x0000701c	tg3.h
11006	NVRAM_SWARB	0x00007020	tg3.h
11007	SWARB_REQ_SET0	0x00000001	tg3.h
11008	SWARB_REQ_SET1	0x00000002	tg3.h
11009	SWARB_REQ_SET2	0x00000004	tg3.h
11010	SWARB_REQ_SET3	0x00000008	tg3.h
11011	SWARB_REQ_CLR0	0x00000010	tg3.h
11012	SWARB_REQ_CLR1	0x00000020	tg3.h
11013	SWARB_REQ_CLR2	0x00000040	tg3.h
11014	SWARB_REQ_CLR3	0x00000080	tg3.h
11015	SWARB_GNT0	0x00000100	tg3.h
11016	SWARB_GNT1	0x00000200	tg3.h
11017	SWARB_GNT2	0x00000400	tg3.h
11018	SWARB_GNT3	0x00000800	tg3.h
11019	SWARB_REQ0	0x00001000	tg3.h
11020	SWARB_REQ1	0x00002000	tg3.h
11021	SWARB_REQ2	0x00004000	tg3.h
11022	SWARB_REQ3	0x00008000	tg3.h
11023	NVRAM_BUFFERED_PAGE_SIZE	264	tg3.h
11024	NVRAM_BUFFERED_PAGE_POS	9	tg3.h
11025	NIC_SRAM_WIN_BASE	0x00008000	tg3.h
11026	NIC_SRAM_PAGE_ZERO	0x00000000	tg3.h
11027	NIC_SRAM_SEND_RCB	0x00000100	tg3.h	16 * TG3_BDINFO_...
11028	NIC_SRAM_RCV_RET_RCB	0x00000200	tg3.h	16 * TG3_BDINFO_...
11029	NIC_SRAM_STATS_BLK	0x00000300	tg3.h
11030	NIC_SRAM_STATUS_BLK	0x00000b00	tg3.h
11031	NIC_SRAM_FIRMWARE_MBOX	0x00000b50	tg3.h
11032	NIC_SRAM_FIRMWARE_MBOX_MAGIC1	0x4B657654	tg3.h
11033	NIC_SRAM_FIRMWARE_MBOX_MAGIC2	0x4861764b	tg3.h	!dma on linkchg
11034	NIC_SRAM_DATA_SIG	0x00000b54	tg3.h
11035	NIC_SRAM_DATA_SIG_MAGIC	0x4b657654	tg3.h	ascii for 'KevT'
11036	NIC_SRAM_DATA_CFG	0x00000b58	tg3.h
11037	NIC_SRAM_DATA_CFG_LED_MODE_MASK	0x0000000c	tg3.h
11038	NIC_SRAM_DATA_CFG_LED_MODE_UNKN	0x00000000	tg3.h
11039	NIC_SRAM_DATA_CFG_LED_TRIPLE_SP	0x00000004	tg3.h
11040	NIC_SRAM_DATA_CFG_LED_OPEN_DRAI	0x00000004	tg3.h
11041	NIC_SRAM_DATA_CFG_LED_LINK_SPD	0x00000008	tg3.h
11042	NIC_SRAM_DATA_CFG_LED_OUTPUT	0x00000008	tg3.h
11043	NIC_SRAM_DATA_CFG_PHY_TYPE_MASK	0x00000030	tg3.h
11044	NIC_SRAM_DATA_CFG_PHY_TYPE_UNKN	0x00000000	tg3.h
11045	NIC_SRAM_DATA_CFG_PHY_TYPE_COPP	0x00000010	tg3.h
11046	NIC_SRAM_DATA_CFG_PHY_TYPE_FIBE	0x00000020	tg3.h
11047	NIC_SRAM_DATA_CFG_WOL_ENABLE	0x00000040	tg3.h
11048	NIC_SRAM_DATA_CFG_ASF_ENABLE	0x00000080	tg3.h
11049	NIC_SRAM_DATA_CFG_EEPROM_WP	0x00000100	tg3.h
11050	NIC_SRAM_DATA_CFG_MINI_PCI	0x00001000	tg3.h
11051	NIC_SRAM_DATA_CFG_FIBER_WOL	0x00004000	tg3.h
11052	NIC_SRAM_DATA_PHY_ID	0x00000b74	tg3.h
11053	NIC_SRAM_DATA_PHY_ID1_MASK	0xffff0000	tg3.h
11054	NIC_SRAM_DATA_PHY_ID2_MASK	0x0000ffff	tg3.h
11055	NIC_SRAM_FW_CMD_MBOX	0x00000b78	tg3.h
11056	FWCMD_NICDRV_ALIVE	0x00000001	tg3.h
11057	FWCMD_NICDRV_PAUSE_FW	0x00000002	tg3.h
11058	FWCMD_NICDRV_IPV4ADDR_CHG	0x00000003	tg3.h
11059	FWCMD_NICDRV_IPV6ADDR_CHG	0x00000004	tg3.h
11060	FWCMD_NICDRV_FIX_DMAR	0x00000005	tg3.h
11061	FWCMD_NICDRV_FIX_DMAW	0x00000006	tg3.h
11062	NIC_SRAM_FW_CMD_LEN_MBOX	0x00000b7c	tg3.h
11063	NIC_SRAM_FW_CMD_DATA_MBOX	0x00000b80	tg3.h
11064	NIC_SRAM_FW_ASF_STATUS_MBOX	0x00000c00	tg3.h
11065	NIC_SRAM_FW_DRV_STATE_MBOX	0x00000c04	tg3.h
11066	DRV_STATE_START	0x00000001	tg3.h
11067	DRV_STATE_UNLOAD	0x00000002	tg3.h
11068	DRV_STATE_WOL	0x00000003	tg3.h
11069	DRV_STATE_SUSPEND	0x00000004	tg3.h
11070	NIC_SRAM_FW_RESET_TYPE_MBOX	0x00000c08	tg3.h
11071	NIC_SRAM_MAC_ADDR_HIGH_MBOX	0x00000c14	tg3.h
11072	NIC_SRAM_MAC_ADDR_LOW_MBOX	0x00000c18	tg3.h
11073	NIC_SRAM_RX_MINI_BUFFER_DESC	0x00001000	tg3.h
11074	NIC_SRAM_DMA_DESC_POOL_BASE	0x00002000	tg3.h
11075	NIC_SRAM_DMA_DESC_POOL_SIZE	0x00002000	tg3.h
11076	NIC_SRAM_TX_BUFFER_DESC	0x00004000	tg3.h	512 entries
11077	NIC_SRAM_RX_BUFFER_DESC	0x00006000	tg3.h	256 entries
11078	NIC_SRAM_RX_JUMBO_BUFFER_DESC	0x00007000	tg3.h	256 entries
11079	NIC_SRAM_MBUF_POOL_BASE	0x00008000	tg3.h
11080	NIC_SRAM_MBUF_POOL_SIZE96	0x00018000	tg3.h
11081	NIC_SRAM_MBUF_POOL_SIZE64	0x00010000	tg3.h
11082	NIC_SRAM_MBUF_POOL_BASE5705	0x00010000	tg3.h
11083	NIC_SRAM_MBUF_POOL_SIZE5705	0x0000e000	tg3.h
11084	PHY_ADDR	0x01	tg3.h
11085	TG3_BMCR_SPEED1000	0x0040	tg3.h
11086	MII_TG3_CTRL	0x09	tg3.h	1000-baseT control register
11087	MII_TG3_CTRL_ADV_1000_HALF	0x0100	tg3.h
11088	MII_TG3_CTRL_ADV_1000_FULL	0x0200	tg3.h
11089	MII_TG3_CTRL_AS_MASTER	0x0800	tg3.h
11090	MII_TG3_CTRL_ENABLE_AS_MASTER	0x1000	tg3.h
11091	MII_TG3_EXT_CTRL	0x10	tg3.h	Extended control register
11092	MII_TG3_EXT_CTRL_LNK3_LED_MODE	0x0002	tg3.h
11093	MII_TG3_EXT_CTRL_TBI	0x8000	tg3.h
11094	MII_TG3_EXT_STAT	0x11	tg3.h	Extended status register
11095	MII_TG3_EXT_STAT_LPASS	0x0100	tg3.h
11096	MII_TG3_DSP_RW_PORT	0x15	tg3.h	DSP coefficient read/write port
11097	MII_TG3_DSP_ADDRESS	0x17	tg3.h	DSP address register
11098	MII_TG3_AUX_CTRL	0x18	tg3.h	auxilliary control register
11099	MII_TG3_AUX_STAT	0x19	tg3.h	auxilliary status register
11100	MII_TG3_AUX_STAT_LPASS	0x0004	tg3.h
11101	MII_TG3_AUX_STAT_SPDMASK	0x0700	tg3.h
11102	MII_TG3_AUX_STAT_10HALF	0x0100	tg3.h
11103	MII_TG3_AUX_STAT_10FULL	0x0200	tg3.h
11104	MII_TG3_AUX_STAT_100HALF	0x0300	tg3.h
11105	MII_TG3_AUX_STAT_100_4	0x0400	tg3.h
11106	MII_TG3_AUX_STAT_100FULL	0x0500	tg3.h
11107	MII_TG3_AUX_STAT_1000HALF	0x0600	tg3.h
11108	MII_TG3_AUX_STAT_1000FULL	0x0700	tg3.h
11109	MII_TG3_ISTAT	0x1a	tg3.h	IRQ status register
11110	MII_TG3_IMASK	0x1b	tg3.h	IRQ mask register
11111	MII_TG3_INT_LINKCHG	0x0002	tg3.h
11112	MII_TG3_INT_SPEEDCHG	0x0004	tg3.h
11113	MII_TG3_INT_DUPLEXCHG	0x0008	tg3.h
11114	MII_TG3_INT_ANEG_PAGE_RX	0x0400	tg3.h
11115	ADVERTISE_PAUSE_CAP	0x0400	tg3.h
11116	ADVERTISE_PAUSE_ASYM	0x0800	tg3.h
11117	LPA_PAUSE_CAP	0x0400	tg3.h
11118	LPA_PAUSE_ASYM	0x0800	tg3.h
11119	TXD_ADDR	0x00UL	tg3.h	64-bit
11120	TXD_LEN_FLAGS	0x08UL	tg3.h	32-bit (upper 16-bits are len)
11121	TXD_VLAN_TAG	0x0cUL	tg3.h	32-bit (upper 16-bits are tag)
11122	TXD_SIZE	0x10UL	tg3.h
11123	TG3_HW_STATUS_SIZE	0x50	tg3.h
11124	FALSE	0	tlan.h
11125	TRUE	1	tlan.h
11126	TLAN_MIN_FRAME_SIZE	64	tlan.h
11127	TLAN_MAX_FRAME_SIZE	1600	tlan.h
11128	TLAN_NUM_RX_LISTS	4	tlan.h
11129	TLAN_NUM_TX_LISTS	2	tlan.h
11130	TLAN_IGNORE	0	tlan.h
11131	TLAN_RECORD	1	tlan.h
11132	TLAN_DEBUG_GNRL	0x0001	tlan.h
11133	TLAN_DEBUG_TX	0x0002	tlan.h
11134	TLAN_DEBUG_RX	0x0004	tlan.h
11135	TLAN_DEBUG_LIST	0x0008	tlan.h
11136	TLAN_DEBUG_PROBE	0x0010	tlan.h
11137	TX_TIMEOUT	(10*HZ)	tlan.h	We need time for auto-neg
11138	MAX_TLAN_BOARDS	8	tlan.h	Max number of boards installed at a time
11139	PCI_DEVICE_ID_NETELLIGENT_10_T2	0xB012	tlan.h
11140	PCI_DEVICE_ID_NETELLIGENT_10_10	0xB030	tlan.h
11141	PCI_DEVICE_ID_OLICOM_OC2183	0x0013	tlan.h
11142	PCI_DEVICE_ID_OLICOM_OC2325	0x0012	tlan.h
11143	PCI_DEVICE_ID_OLICOM_OC2326	0x0014	tlan.h
11144	TLAN_ADAPTER_NONE	0x00000000	tlan.h
11145	TLAN_ADAPTER_UNMANAGED_PHY	0x00000001	tlan.h
11146	TLAN_ADAPTER_BIT_RATE_PHY	0x00000002	tlan.h
11147	TLAN_ADAPTER_USE_INTERN_10	0x00000004	tlan.h
11148	TLAN_ADAPTER_ACTIVITY_LED	0x00000008	tlan.h
11149	TLAN_SPEED_DEFAULT	0	tlan.h
11150	TLAN_SPEED_10	10	tlan.h
11151	TLAN_SPEED_100	100	tlan.h
11152	TLAN_DUPLEX_DEFAULT	0	tlan.h
11153	TLAN_DUPLEX_HALF	1	tlan.h
11154	TLAN_DUPLEX_FULL	2	tlan.h
11155	EISA_ID	0xc80	tlan.h	EISA ID Registers
11156	EISA_ID0	0xc80	tlan.h	EISA ID Register 0
11157	EISA_ID1	0xc81	tlan.h	EISA ID Register 1
11158	EISA_ID2	0xc82	tlan.h	EISA ID Register 2
11159	EISA_ID3	0xc83	tlan.h	EISA ID Register 3
11160	EISA_CR	0xc84	tlan.h	EISA Control Register
11161	EISA_REG0	0xc88	tlan.h	EISA Configuration Register 0
11162	EISA_REG1	0xc89	tlan.h	EISA Configuration Register 1
11163	EISA_REG2	0xc8a	tlan.h	EISA Configuration Register 2
11164	EISA_REG3	0xc8f	tlan.h	EISA Configuration Register 3
11165	EISA_APROM	0xc90	tlan.h	Ethernet Address PROM
11166	TLAN_BUFFERS_PER_LIST	10	tlan.h
11167	TLAN_LAST_BUFFER	0x80000000	tlan.h
11168	TLAN_CSTAT_UNUSED	0x8000	tlan.h
11169	TLAN_CSTAT_FRM_CMP	0x4000	tlan.h
11170	TLAN_CSTAT_READY	0x3000	tlan.h
11171	TLAN_CSTAT_EOC	0x0800	tlan.h
11172	TLAN_CSTAT_RX_ERROR	0x0400	tlan.h
11173	TLAN_CSTAT_PASS_CRC	0x0200	tlan.h
11174	TLAN_CSTAT_DP_PR	0x0100	tlan.h
11175	TLAN_PHY_MAX_ADDR	0x1F	tlan.h
11176	TLAN_PHY_NONE	0x20	tlan.h
11177	TLAN_TIMER_LINK_BEAT	1	tlan.h
11178	TLAN_TIMER_ACTIVITY	2	tlan.h
11179	TLAN_TIMER_PHY_PDOWN	3	tlan.h
11180	TLAN_TIMER_PHY_PUP	4	tlan.h
11181	TLAN_TIMER_PHY_RESET	5	tlan.h
11182	TLAN_TIMER_PHY_START_LINK	6	tlan.h
11183	TLAN_TIMER_PHY_FINISH_AN	7	tlan.h
11184	TLAN_TIMER_FINISH_RESET	8	tlan.h
11185	TLAN_TIMER_ACT_DELAY	(HZ/10)	tlan.h
11186	TLAN_EEPROM_ACK	0	tlan.h
11187	TLAN_EEPROM_STOP	1	tlan.h
11188	TLAN_HOST_CMD	0x00	tlan.h
11189	TLAN_HC_GO	0x80000000	tlan.h
11190	TLAN_HC_STOP	0x40000000	tlan.h
11191	TLAN_HC_ACK	0x20000000	tlan.h
11192	TLAN_HC_CS_MASK	0x1FE00000	tlan.h
11193	TLAN_HC_EOC	0x00100000	tlan.h
11194	TLAN_HC_RT	0x00080000	tlan.h
11195	TLAN_HC_NES	0x00040000	tlan.h
11196	TLAN_HC_AD_RST	0x00008000	tlan.h
11197	TLAN_HC_LD_TMR	0x00004000	tlan.h
11198	TLAN_HC_LD_THR	0x00002000	tlan.h
11199	TLAN_HC_REQ_INT	0x00001000	tlan.h
11200	TLAN_HC_INT_OFF	0x00000800	tlan.h
11201	TLAN_HC_INT_ON	0x00000400	tlan.h
11202	TLAN_HC_AC_MASK	0x000000FF	tlan.h
11203	TLAN_CH_PARM	0x04	tlan.h
11204	TLAN_DIO_ADR	0x08	tlan.h
11205	TLAN_DA_ADR_INC	0x8000	tlan.h
11206	TLAN_DA_RAM_ADR	0x4000	tlan.h
11207	TLAN_HOST_INT	0x0A	tlan.h
11208	TLAN_HI_IV_MASK	0x1FE0	tlan.h
11209	TLAN_HI_IT_MASK	0x001C	tlan.h
11210	TLAN_DIO_DATA	0x0C	tlan.h
11211	TLAN_NET_CMD	0x00	tlan.h
11212	TLAN_NET_CMD_NRESET	0x80	tlan.h
11213	TLAN_NET_CMD_NWRAP	0x40	tlan.h
11214	TLAN_NET_CMD_CSF	0x20	tlan.h
11215	TLAN_NET_CMD_CAF	0x10	tlan.h
11216	TLAN_NET_CMD_NOBRX	0x08	tlan.h
11217	TLAN_NET_CMD_DUPLEX	0x04	tlan.h
11218	TLAN_NET_CMD_TRFRAM	0x02	tlan.h
11219	TLAN_NET_CMD_TXPACE	0x01	tlan.h
11220	TLAN_NET_SIO	0x01	tlan.h
11221	TLAN_NET_SIO_MINTEN	0x80	tlan.h
11222	TLAN_NET_SIO_ECLOK	0x40	tlan.h
11223	TLAN_NET_SIO_ETXEN	0x20	tlan.h
11224	TLAN_NET_SIO_EDATA	0x10	tlan.h
11225	TLAN_NET_SIO_NMRST	0x08	tlan.h
11226	TLAN_NET_SIO_MCLK	0x04	tlan.h
11227	TLAN_NET_SIO_MTXEN	0x02	tlan.h
11228	TLAN_NET_SIO_MDATA	0x01	tlan.h
11229	TLAN_NET_STS	0x02	tlan.h
11230	TLAN_NET_STS_MIRQ	0x80	tlan.h
11231	TLAN_NET_STS_HBEAT	0x40	tlan.h
11232	TLAN_NET_STS_TXSTOP	0x20	tlan.h
11233	TLAN_NET_STS_RXSTOP	0x10	tlan.h
11234	TLAN_NET_STS_RSRVD	0x0F	tlan.h
11235	TLAN_NET_MASK	0x03	tlan.h
11236	TLAN_NET_MASK_MASK7	0x80	tlan.h
11237	TLAN_NET_MASK_MASK6	0x40	tlan.h
11238	TLAN_NET_MASK_MASK5	0x20	tlan.h
11239	TLAN_NET_MASK_MASK4	0x10	tlan.h
11240	TLAN_NET_MASK_RSRVD	0x0F	tlan.h
11241	TLAN_NET_CONFIG	0x04	tlan.h
11242	TLAN_NET_CFG_RCLK	0x8000	tlan.h
11243	TLAN_NET_CFG_TCLK	0x4000	tlan.h
11244	TLAN_NET_CFG_BIT	0x2000	tlan.h
11245	TLAN_NET_CFG_RXCRC	0x1000	tlan.h
11246	TLAN_NET_CFG_PEF	0x0800	tlan.h
11247	TLAN_NET_CFG_1FRAG	0x0400	tlan.h
11248	TLAN_NET_CFG_1CHAN	0x0200	tlan.h
11249	TLAN_NET_CFG_MTEST	0x0100	tlan.h
11250	TLAN_NET_CFG_PHY_EN	0x0080	tlan.h
11251	TLAN_NET_CFG_MSMASK	0x007F	tlan.h
11252	TLAN_MAN_TEST	0x06	tlan.h
11253	TLAN_DEF_VENDOR_ID	0x08	tlan.h
11254	TLAN_DEF_DEVICE_ID	0x0A	tlan.h
11255	TLAN_DEF_REVISION	0x0C	tlan.h
11256	TLAN_DEF_SUBCLASS	0x0D	tlan.h
11257	TLAN_DEF_MIN_LAT	0x0E	tlan.h
11258	TLAN_DEF_MAX_LAT	0x0F	tlan.h
11259	TLAN_AREG_0	0x10	tlan.h
11260	TLAN_AREG_1	0x16	tlan.h
11261	TLAN_AREG_2	0x1C	tlan.h
11262	TLAN_AREG_3	0x22	tlan.h
11263	TLAN_HASH_1	0x28	tlan.h
11264	TLAN_HASH_2	0x2C	tlan.h
11265	TLAN_GOOD_TX_FRMS	0x30	tlan.h
11266	TLAN_TX_UNDERUNS	0x33	tlan.h
11267	TLAN_GOOD_RX_FRMS	0x34	tlan.h
11268	TLAN_RX_OVERRUNS	0x37	tlan.h
11269	TLAN_DEFERRED_TX	0x38	tlan.h
11270	TLAN_CRC_ERRORS	0x3A	tlan.h
11271	TLAN_CODE_ERRORS	0x3B	tlan.h
11272	TLAN_MULTICOL_FRMS	0x3C	tlan.h
11273	TLAN_SINGLECOL_FRMS	0x3E	tlan.h
11274	TLAN_EXCESSCOL_FRMS	0x40	tlan.h
11275	TLAN_LATE_COLS	0x41	tlan.h
11276	TLAN_CARRIER_LOSS	0x42	tlan.h
11277	TLAN_ACOMMIT	0x43	tlan.h
11278	TLAN_LED_REG	0x44	tlan.h
11279	TLAN_LED_ACT	0x10	tlan.h
11280	TLAN_LED_LINK	0x01	tlan.h
11281	TLAN_BSIZE_REG	0x45	tlan.h
11282	TLAN_MAX_RX	0x46	tlan.h
11283	TLAN_INT_DIS	0x48	tlan.h
11284	TLAN_ID_TX_EOC	0x04	tlan.h
11285	TLAN_ID_RX_EOF	0x02	tlan.h
11286	TLAN_ID_RX_EOC	0x01	tlan.h
11287	TLAN_INT_NUMBER_OF_INTS	8	tlan.h
11288	TLAN_INT_NONE	0x0000	tlan.h
11289	TLAN_INT_TX_EOF	0x0001	tlan.h
11290	TLAN_INT_STAT_OVERFLOW	0x0002	tlan.h
11291	TLAN_INT_RX_EOF	0x0003	tlan.h
11292	TLAN_INT_DUMMY	0x0004	tlan.h
11293	TLAN_INT_TX_EOC	0x0005	tlan.h
11294	TLAN_INT_STATUS_CHECK	0x0006	tlan.h
11295	TLAN_INT_RX_EOC	0x0007	tlan.h
11296	MII_GEN_CTL	0x00	tlan.h
11297	MII_GC_RESET	0x8000	tlan.h
11298	MII_GC_LOOPBK	0x4000	tlan.h
11299	MII_GC_SPEEDSEL	0x2000	tlan.h
11300	MII_GC_AUTOENB	0x1000	tlan.h
11301	MII_GC_PDOWN	0x0800	tlan.h
11302	MII_GC_ISOLATE	0x0400	tlan.h
11303	MII_GC_AUTORSRT	0x0200	tlan.h
11304	MII_GC_DUPLEX	0x0100	tlan.h
11305	MII_GC_COLTEST	0x0080	tlan.h
11306	MII_GC_RESERVED	0x007F	tlan.h
11307	MII_GEN_STS	0x01	tlan.h
11308	MII_GS_100BT4	0x8000	tlan.h
11309	MII_GS_100BTXFD	0x4000	tlan.h
11310	MII_GS_100BTXHD	0x2000	tlan.h
11311	MII_GS_10BTFD	0x1000	tlan.h
11312	MII_GS_10BTHD	0x0800	tlan.h
11313	MII_GS_RESERVED	0x07C0	tlan.h
11314	MII_GS_AUTOCMPLT	0x0020	tlan.h
11315	MII_GS_RFLT	0x0010	tlan.h
11316	MII_GS_AUTONEG	0x0008	tlan.h
11317	MII_GS_LINK	0x0004	tlan.h
11318	MII_GS_JABBER	0x0002	tlan.h
11319	MII_GS_EXTCAP	0x0001	tlan.h
11320	MII_GEN_ID_HI	0x02	tlan.h
11321	MII_GEN_ID_LO	0x03	tlan.h
11322	MII_GIL_OUI	0xFC00	tlan.h
11323	MII_GIL_MODEL	0x03F0	tlan.h
11324	MII_GIL_REVISION	0x000F	tlan.h
11325	MII_AN_ADV	0x04	tlan.h
11326	MII_AN_LPA	0x05	tlan.h
11327	MII_AN_EXP	0x06	tlan.h
11328	TLAN_TLPHY_ID	0x10	tlan.h
11329	TLAN_TLPHY_CTL	0x11	tlan.h
11330	TLAN_TC_IGLINK	0x8000	tlan.h
11331	TLAN_TC_SWAPOL	0x4000	tlan.h
11332	TLAN_TC_AUISEL	0x2000	tlan.h
11333	TLAN_TC_SQEEN	0x1000	tlan.h
11334	TLAN_TC_MTEST	0x0800	tlan.h
11335	TLAN_TC_RESERVED	0x07F8	tlan.h
11336	TLAN_TC_NFEW	0x0004	tlan.h
11337	TLAN_TC_INTEN	0x0002	tlan.h
11338	TLAN_TC_TINT	0x0001	tlan.h
11339	TLAN_TLPHY_STS	0x12	tlan.h
11340	TLAN_TS_MINT	0x8000	tlan.h
11341	TLAN_TS_PHOK	0x4000	tlan.h
11342	TLAN_TS_POLOK	0x2000	tlan.h
11343	TLAN_TS_TPENERGY	0x1000	tlan.h
11344	TLAN_TS_RESERVED	0x0FFF	tlan.h
11345	TLAN_TLPHY_PAR	0x19	tlan.h
11346	TLAN_PHY_CIM_STAT	0x0020	tlan.h
11347	TLAN_PHY_SPEED_100	0x0040	tlan.h
11348	TLAN_PHY_DUPLEX_FULL	0x0080	tlan.h
11349	TLAN_PHY_AN_EN_STAT	0x0400	tlan.h
11350	NAT_SEM_ID1	0x2000	tlan.h
11351	NAT_SEM_ID2	0x5C01	tlan.h
11352	LEVEL1_ID1	0x7810	tlan.h
11353	LEVEL1_ID2	0x0000	tlan.h
11354	VELOCITY_NAME	"via-velocity"	via-velocity.h
11355	VELOCITY_FULL_DRV_NAM	"VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"	via-velocity.h
11356	VELOCITY_VERSION	"1.13"	via-velocity.h
11357	PKT_BUF_SZ	1564	via-velocity.h
11358	MAX_UNITS	8	via-velocity.h
11359	OPTION_DEFAULT	{ [0 ... MAX_UNITS-1] = -1}	via-velocity.h
11360	REV_ID_VT6110	(0)	via-velocity.h
11361	B_OWNED_BY_CHIP	1	via-velocity.h
11362	B_OWNED_BY_HOST	0	via-velocity.h
11363	RSR_DETAG	0x0080	via-velocity.h
11364	RSR_SNTAG	0x0040	via-velocity.h
11365	RSR_RXER	0x0020	via-velocity.h
11366	RSR_RL	0x0010	via-velocity.h
11367	RSR_CE	0x0008	via-velocity.h
11368	RSR_FAE	0x0004	via-velocity.h
11369	RSR_CRC	0x0002	via-velocity.h
11370	RSR_VIDM	0x0001	via-velocity.h
11371	RSR_RXOK	0x8000	via-velocity.h	rx OK
11372	RSR_PFT	0x4000	via-velocity.h	Perfect filtering address match
11373	RSR_MAR	0x2000	via-velocity.h	MAC accept multicast address packet
11374	RSR_BAR	0x1000	via-velocity.h	MAC accept broadcast address packet
11375	RSR_PHY	0x0800	via-velocity.h	MAC accept physical address packet
11376	RSR_VTAG	0x0400	via-velocity.h	802.1p/1q tagging packet indicator
11377	RSR_STP	0x0200	via-velocity.h	start of packet
11378	RSR_EDP	0x0100	via-velocity.h	end of packet
11379	RSR1_RXOK	0x80	via-velocity.h	rx OK
11380	RSR1_PFT	0x40	via-velocity.h	Perfect filtering address match
11381	RSR1_MAR	0x20	via-velocity.h	MAC accept multicast address packet
11382	RSR1_BAR	0x10	via-velocity.h	MAC accept broadcast address packet
11383	RSR1_PHY	0x08	via-velocity.h	MAC accept physical address packet
11384	RSR1_VTAG	0x04	via-velocity.h	802.1p/1q tagging packet indicator
11385	RSR1_STP	0x02	via-velocity.h	start of packet
11386	RSR1_EDP	0x01	via-velocity.h	end of packet
11387	CSM_IPOK	0x40	via-velocity.h	IP Checkusm validatiaon ok
11388	CSM_TUPOK	0x20	via-velocity.h	TCP/UDP Checkusm validatiaon ok
11389	CSM_FRAG	0x10	via-velocity.h	Fragment IP datagram
11390	CSM_IPKT	0x04	via-velocity.h	Received an IP packet
11391	CSM_TCPKT	0x02	via-velocity.h	Received a TCP packet
11392	CSM_UDPKT	0x01	via-velocity.h	Received a UDP packet
11393	TSR0_ABT	0x0080	via-velocity.h	Tx abort because of excessive collision
11394	TSR0_OWT	0x0040	via-velocity.h	Jumbo frame Tx abort
11395	TSR0_OWC	0x0020	via-velocity.h	Out of window collision
11396	TSR0_COLS	0x0010	via-velocity.h	experience collision in this transmit event
11397	TSR0_NCR3	0x0008	via-velocity.h	collision retry counter[3]
11398	TSR0_NCR2	0x0004	via-velocity.h	collision retry counter[2]
11399	TSR0_NCR1	0x0002	via-velocity.h	collision retry counter[1]
11400	TSR0_NCR0	0x0001	via-velocity.h	collision retry counter[0]
11401	TSR0_TERR	0x8000	via-velocity.h
11402	TSR0_FDX	0x4000	via-velocity.h	current transaction is serviced by full duplex mode
11403	TSR0_GMII	0x2000	via-velocity.h	current transaction is serviced by GMII mode
11404	TSR0_LNKFL	0x1000	via-velocity.h	packet serviced during link down
11405	TSR0_SHDN	0x0400	via-velocity.h	shutdown case
11406	TSR0_CRS	0x0200	via-velocity.h	carrier sense lost
11407	TSR0_CDH	0x0100	via-velocity.h	AQE test fail (CD heartbeat)
11408	TSR1_TERR	0x80	via-velocity.h
11409	TSR1_FDX	0x40	via-velocity.h	current transaction is serviced by full duplex mode
11410	TSR1_GMII	0x20	via-velocity.h	current transaction is serviced by GMII mode
11411	TSR1_LNKFL	0x10	via-velocity.h	packet serviced during link down
11412	TSR1_SHDN	0x04	via-velocity.h	shutdown case
11413	TSR1_CRS	0x02	via-velocity.h	carrier sense lost
11414	TSR1_CDH	0x01	via-velocity.h	AQE test fail (CD heartbeat)
11415	TCR0_TIC	0x80	via-velocity.h	assert interrupt immediately while descriptor has been send complete
11416	TCR0_PIC	0x40	via-velocity.h	priority interrupt request, INA# is issued over adaptive interrupt scheme
11417	TCR0_VETAG	0x20	via-velocity.h	enable VLAN tag
11418	TCR0_IPCK	0x10	via-velocity.h	request IP checksum calculation.
11419	TCR0_UDPCK	0x08	via-velocity.h	request UDP checksum calculation.
11420	TCR0_TCPCK	0x04	via-velocity.h	request TCP checksum calculation.
11421	TCR0_JMBO	0x02	via-velocity.h	indicate a jumbo packet in GMAC side
11422	TCR0_CRC	0x01	via-velocity.h	disable CRC generation
11423	TCPLS_NORMAL	3	via-velocity.h
11424	TCPLS_START	2	via-velocity.h
11425	TCPLS_END	1	via-velocity.h
11426	TCPLS_MED	0	via-velocity.h
11427	CB_RX_BUF_SIZE	2048UL	via-velocity.h	max buffer size
11428	CB_MAX_RD_NUM	512	via-velocity.h	MAX # of RD
11429	CB_MAX_TD_NUM	256	via-velocity.h	MAX # of TD
11430	CB_INIT_RD_NUM_3119	128	via-velocity.h	init # of RD, for setup VT3119
11431	CB_INIT_TD_NUM_3119	64	via-velocity.h	init # of TD, for setup VT3119
11432	CB_INIT_RD_NUM	128	via-velocity.h	init # of RD, for setup default
11433	CB_INIT_TD_NUM	64	via-velocity.h	init # of TD, for setup default
11434	CB_TD_RING_NUM	4	via-velocity.h	# of TD rings.
11435	CB_MAX_SEG_PER_PKT	7	via-velocity.h	max data seg per packet (Tx)
11436	CB_MAX_TX_ABORT_RETRY	3	via-velocity.h
11437	MCAM_SIZE	64	via-velocity.h
11438	VCAM_SIZE	64	via-velocity.h
11439	TX_QUEUE_NO	4	via-velocity.h
11440	MAX_HW_MIB_COUNTER	32	via-velocity.h
11441	VELOCITY_MIN_MTU	(1514-14)	via-velocity.h
11442	VELOCITY_MAX_MTU	(9000)	via-velocity.h
11443	MAC_REG_PAR	0x00	via-velocity.h	physical address
11444	MAC_REG_RCR	0x06	via-velocity.h
11445	MAC_REG_TCR	0x07	via-velocity.h
11446	MAC_REG_CR0_SET	0x08	via-velocity.h
11447	MAC_REG_CR1_SET	0x09	via-velocity.h
11448	MAC_REG_CR2_SET	0x0A	via-velocity.h
11449	MAC_REG_CR3_SET	0x0B	via-velocity.h
11450	MAC_REG_CR0_CLR	0x0C	via-velocity.h
11451	MAC_REG_CR1_CLR	0x0D	via-velocity.h
11452	MAC_REG_CR2_CLR	0x0E	via-velocity.h
11453	MAC_REG_CR3_CLR	0x0F	via-velocity.h
11454	MAC_REG_MAR	0x10	via-velocity.h
11455	MAC_REG_CAM	0x10	via-velocity.h
11456	MAC_REG_DEC_BASE_HI	0x18	via-velocity.h
11457	MAC_REG_DBF_BASE_HI	0x1C	via-velocity.h
11458	MAC_REG_ISR_CTL	0x20	via-velocity.h
11459	MAC_REG_ISR_HOTMR	0x20	via-velocity.h
11460	MAC_REG_ISR_TSUPTHR	0x20	via-velocity.h
11461	MAC_REG_ISR_RSUPTHR	0x20	via-velocity.h
11462	MAC_REG_ISR_CTL1	0x21	via-velocity.h
11463	MAC_REG_TXE_SR	0x22	via-velocity.h
11464	MAC_REG_RXE_SR	0x23	via-velocity.h
11465	MAC_REG_ISR	0x24	via-velocity.h
11466	MAC_REG_ISR0	0x24	via-velocity.h
11467	MAC_REG_ISR1	0x25	via-velocity.h
11468	MAC_REG_ISR2	0x26	via-velocity.h
11469	MAC_REG_ISR3	0x27	via-velocity.h
11470	MAC_REG_IMR	0x28	via-velocity.h
11471	MAC_REG_IMR0	0x28	via-velocity.h
11472	MAC_REG_IMR1	0x29	via-velocity.h
11473	MAC_REG_IMR2	0x2A	via-velocity.h
11474	MAC_REG_IMR3	0x2B	via-velocity.h
11475	MAC_REG_TDCSR_SET	0x30	via-velocity.h
11476	MAC_REG_RDCSR_SET	0x32	via-velocity.h
11477	MAC_REG_TDCSR_CLR	0x34	via-velocity.h
11478	MAC_REG_RDCSR_CLR	0x36	via-velocity.h
11479	MAC_REG_RDBASE_LO	0x38	via-velocity.h
11480	MAC_REG_RDINDX	0x3C	via-velocity.h
11481	MAC_REG_TDBASE_LO	0x40	via-velocity.h
11482	MAC_REG_RDCSIZE	0x50	via-velocity.h
11483	MAC_REG_TDCSIZE	0x52	via-velocity.h
11484	MAC_REG_TDINDX	0x54	via-velocity.h
11485	MAC_REG_TDIDX0	0x54	via-velocity.h
11486	MAC_REG_TDIDX1	0x56	via-velocity.h
11487	MAC_REG_TDIDX2	0x58	via-velocity.h
11488	MAC_REG_TDIDX3	0x5A	via-velocity.h
11489	MAC_REG_PAUSE_TIMER	0x5C	via-velocity.h
11490	MAC_REG_RBRDU	0x5E	via-velocity.h
11491	MAC_REG_FIFO_TEST0	0x60	via-velocity.h
11492	MAC_REG_FIFO_TEST1	0x64	via-velocity.h
11493	MAC_REG_CAMADDR	0x68	via-velocity.h
11494	MAC_REG_CAMCR	0x69	via-velocity.h
11495	MAC_REG_GFTEST	0x6A	via-velocity.h
11496	MAC_REG_FTSTCMD	0x6B	via-velocity.h
11497	MAC_REG_MIICFG	0x6C	via-velocity.h
11498	MAC_REG_MIISR	0x6D	via-velocity.h
11499	MAC_REG_PHYSR0	0x6E	via-velocity.h
11500	MAC_REG_PHYSR1	0x6F	via-velocity.h
11501	MAC_REG_MIICR	0x70	via-velocity.h
11502	MAC_REG_MIIADR	0x71	via-velocity.h
11503	MAC_REG_MIIDATA	0x72	via-velocity.h
11504	MAC_REG_SOFT_TIMER0	0x74	via-velocity.h
11505	MAC_REG_SOFT_TIMER1	0x76	via-velocity.h
11506	MAC_REG_CFGA	0x78	via-velocity.h
11507	MAC_REG_CFGB	0x79	via-velocity.h
11508	MAC_REG_CFGC	0x7A	via-velocity.h
11509	MAC_REG_CFGD	0x7B	via-velocity.h
11510	MAC_REG_DCFG0	0x7C	via-velocity.h
11511	MAC_REG_DCFG1	0x7D	via-velocity.h
11512	MAC_REG_MCFG0	0x7E	via-velocity.h
11513	MAC_REG_MCFG1	0x7F	via-velocity.h
11514	MAC_REG_TBIST	0x80	via-velocity.h
11515	MAC_REG_RBIST	0x81	via-velocity.h
11516	MAC_REG_PMCC	0x82	via-velocity.h
11517	MAC_REG_STICKHW	0x83	via-velocity.h
11518	MAC_REG_MIBCR	0x84	via-velocity.h
11519	MAC_REG_EERSV	0x85	via-velocity.h
11520	MAC_REG_REVID	0x86	via-velocity.h
11521	MAC_REG_MIBREAD	0x88	via-velocity.h
11522	MAC_REG_BPMA	0x8C	via-velocity.h
11523	MAC_REG_EEWR_DATA	0x8C	via-velocity.h
11524	MAC_REG_BPMD_WR	0x8F	via-velocity.h
11525	MAC_REG_BPCMD	0x90	via-velocity.h
11526	MAC_REG_BPMD_RD	0x91	via-velocity.h
11527	MAC_REG_EECHKSUM	0x92	via-velocity.h
11528	MAC_REG_EECSR	0x93	via-velocity.h
11529	MAC_REG_EERD_DATA	0x94	via-velocity.h
11530	MAC_REG_EADDR	0x96	via-velocity.h
11531	MAC_REG_EMBCMD	0x97	via-velocity.h
11532	MAC_REG_JMPSR0	0x98	via-velocity.h
11533	MAC_REG_JMPSR1	0x99	via-velocity.h
11534	MAC_REG_JMPSR2	0x9A	via-velocity.h
11535	MAC_REG_JMPSR3	0x9B	via-velocity.h
11536	MAC_REG_CHIPGSR	0x9C	via-velocity.h
11537	MAC_REG_TESTCFG	0x9D	via-velocity.h
11538	MAC_REG_DEBUG	0x9E	via-velocity.h
11539	MAC_REG_CHIPGCR	0x9F	via-velocity.h
11540	MAC_REG_WOLCR0_SET	0xA0	via-velocity.h
11541	MAC_REG_WOLCR1_SET	0xA1	via-velocity.h
11542	MAC_REG_PWCFG_SET	0xA2	via-velocity.h
11543	MAC_REG_WOLCFG_SET	0xA3	via-velocity.h
11544	MAC_REG_WOLCR0_CLR	0xA4	via-velocity.h
11545	MAC_REG_WOLCR1_CLR	0xA5	via-velocity.h
11546	MAC_REG_PWCFG_CLR	0xA6	via-velocity.h
11547	MAC_REG_WOLCFG_CLR	0xA7	via-velocity.h
11548	MAC_REG_WOLSR0_SET	0xA8	via-velocity.h
11549	MAC_REG_WOLSR1_SET	0xA9	via-velocity.h
11550	MAC_REG_WOLSR0_CLR	0xAC	via-velocity.h
11551	MAC_REG_WOLSR1_CLR	0xAD	via-velocity.h
11552	MAC_REG_PATRN_CRC0	0xB0	via-velocity.h
11553	MAC_REG_PATRN_CRC1	0xB2	via-velocity.h
11554	MAC_REG_PATRN_CRC2	0xB4	via-velocity.h
11555	MAC_REG_PATRN_CRC3	0xB6	via-velocity.h
11556	MAC_REG_PATRN_CRC4	0xB8	via-velocity.h
11557	MAC_REG_PATRN_CRC5	0xBA	via-velocity.h
11558	MAC_REG_PATRN_CRC6	0xBC	via-velocity.h
11559	MAC_REG_PATRN_CRC7	0xBE	via-velocity.h
11560	MAC_REG_BYTEMSK0_0	0xC0	via-velocity.h
11561	MAC_REG_BYTEMSK0_1	0xC4	via-velocity.h
11562	MAC_REG_BYTEMSK0_2	0xC8	via-velocity.h
11563	MAC_REG_BYTEMSK0_3	0xCC	via-velocity.h
11564	MAC_REG_BYTEMSK1_0	0xD0	via-velocity.h
11565	MAC_REG_BYTEMSK1_1	0xD4	via-velocity.h
11566	MAC_REG_BYTEMSK1_2	0xD8	via-velocity.h
11567	MAC_REG_BYTEMSK1_3	0xDC	via-velocity.h
11568	MAC_REG_BYTEMSK2_0	0xE0	via-velocity.h
11569	MAC_REG_BYTEMSK2_1	0xE4	via-velocity.h
11570	MAC_REG_BYTEMSK2_2	0xE8	via-velocity.h
11571	MAC_REG_BYTEMSK2_3	0xEC	via-velocity.h
11572	MAC_REG_BYTEMSK3_0	0xF0	via-velocity.h
11573	MAC_REG_BYTEMSK3_1	0xF4	via-velocity.h
11574	MAC_REG_BYTEMSK3_2	0xF8	via-velocity.h
11575	MAC_REG_BYTEMSK3_3	0xFC	via-velocity.h
11576	RCR_AS	0x80	via-velocity.h
11577	RCR_AP	0x40	via-velocity.h
11578	RCR_AL	0x20	via-velocity.h
11579	RCR_PROM	0x10	via-velocity.h
11580	RCR_AB	0x08	via-velocity.h
11581	RCR_AM	0x04	via-velocity.h
11582	RCR_AR	0x02	via-velocity.h
11583	RCR_SEP	0x01	via-velocity.h
11584	TCR_TB2BDIS	0x80	via-velocity.h
11585	TCR_COLTMC1	0x08	via-velocity.h
11586	TCR_COLTMC0	0x04	via-velocity.h
11587	TCR_LB1	0x02	via-velocity.h	loopback[1]
11588	TCR_LB0	0x01	via-velocity.h	loopback[0]
11589	CR0_TXON	0x00000008UL	via-velocity.h
11590	CR0_RXON	0x00000004UL	via-velocity.h
11591	CR0_STOP	0x00000002UL	via-velocity.h	stop MAC, default = 1
11592	CR0_STRT	0x00000001UL	via-velocity.h	start MAC
11593	CR0_SFRST	0x00008000UL	via-velocity.h	software reset
11594	CR0_TM1EN	0x00004000UL	via-velocity.h
11595	CR0_TM0EN	0x00002000UL	via-velocity.h
11596	CR0_DPOLL	0x00000800UL	via-velocity.h	disable rx/tx auto polling
11597	CR0_DISAU	0x00000100UL	via-velocity.h
11598	CR0_XONEN	0x00800000UL	via-velocity.h
11599	CR0_FDXTFCEN	0x00400000UL	via-velocity.h	full-duplex TX flow control enable
11600	CR0_FDXRFCEN	0x00200000UL	via-velocity.h	full-duplex RX flow control enable
11601	CR0_HDXFCEN	0x00100000UL	via-velocity.h	half-duplex flow control enable
11602	CR0_XHITH1	0x00080000UL	via-velocity.h	TX XON high threshold 1
11603	CR0_XHITH0	0x00040000UL	via-velocity.h	TX XON high threshold 0
11604	CR0_XLTH1	0x00020000UL	via-velocity.h	TX pause frame low threshold 1
11605	CR0_XLTH0	0x00010000UL	via-velocity.h	TX pause frame low threshold 0
11606	CR0_GSPRST	0x80000000UL	via-velocity.h
11607	CR0_FORSRST	0x40000000UL	via-velocity.h
11608	CR0_FPHYRST	0x20000000UL	via-velocity.h
11609	CR0_DIAG	0x10000000UL	via-velocity.h
11610	CR0_INTPCTL	0x04000000UL	via-velocity.h
11611	CR0_GINTMSK1	0x02000000UL	via-velocity.h
11612	CR0_GINTMSK0	0x01000000UL	via-velocity.h
11613	CR1_SFRST	0x80	via-velocity.h	software reset
11614	CR1_TM1EN	0x40	via-velocity.h
11615	CR1_TM0EN	0x20	via-velocity.h
11616	CR1_DPOLL	0x08	via-velocity.h	disable rx/tx auto polling
11617	CR1_DISAU	0x01	via-velocity.h
11618	CR2_XONEN	0x80	via-velocity.h
11619	CR2_FDXTFCEN	0x40	via-velocity.h	full-duplex TX flow control enable
11620	CR2_FDXRFCEN	0x20	via-velocity.h	full-duplex RX flow control enable
11621	CR2_HDXFCEN	0x10	via-velocity.h	half-duplex flow control enable
11622	CR2_XHITH1	0x08	via-velocity.h	TX XON high threshold 1
11623	CR2_XHITH0	0x04	via-velocity.h	TX XON high threshold 0
11624	CR2_XLTH1	0x02	via-velocity.h	TX pause frame low threshold 1
11625	CR2_XLTH0	0x01	via-velocity.h	TX pause frame low threshold 0
11626	CR3_GSPRST	0x80	via-velocity.h
11627	CR3_FORSRST	0x40	via-velocity.h
11628	CR3_FPHYRST	0x20	via-velocity.h
11629	CR3_DIAG	0x10	via-velocity.h
11630	CR3_INTPCTL	0x04	via-velocity.h
11631	CR3_GINTMSK1	0x02	via-velocity.h
11632	CR3_GINTMSK0	0x01	via-velocity.h
11633	ISRCTL_UDPINT	0x8000	via-velocity.h
11634	ISRCTL_TSUPDIS	0x4000	via-velocity.h
11635	ISRCTL_RSUPDIS	0x2000	via-velocity.h
11636	ISRCTL_PMSK1	0x1000	via-velocity.h
11637	ISRCTL_PMSK0	0x0800	via-velocity.h
11638	ISRCTL_INTPD	0x0400	via-velocity.h
11639	ISRCTL_HCRLD	0x0200	via-velocity.h
11640	ISRCTL_SCRLD	0x0100	via-velocity.h
11641	ISRCTL1_UDPINT	0x80	via-velocity.h
11642	ISRCTL1_TSUPDIS	0x40	via-velocity.h
11643	ISRCTL1_RSUPDIS	0x20	via-velocity.h
11644	ISRCTL1_PMSK1	0x10	via-velocity.h
11645	ISRCTL1_PMSK0	0x08	via-velocity.h
11646	ISRCTL1_INTPD	0x04	via-velocity.h
11647	ISRCTL1_HCRLD	0x02	via-velocity.h
11648	ISRCTL1_SCRLD	0x01	via-velocity.h
11649	TXESR_TFDBS	0x08	via-velocity.h
11650	TXESR_TDWBS	0x04	via-velocity.h
11651	TXESR_TDRBS	0x02	via-velocity.h
11652	TXESR_TDSTR	0x01	via-velocity.h
11653	RXESR_RFDBS	0x08	via-velocity.h
11654	RXESR_RDWBS	0x04	via-velocity.h
11655	RXESR_RDRBS	0x02	via-velocity.h
11656	RXESR_RDSTR	0x01	via-velocity.h
11657	ISR_ISR3	0x80000000UL	via-velocity.h
11658	ISR_ISR2	0x40000000UL	via-velocity.h
11659	ISR_ISR1	0x20000000UL	via-velocity.h
11660	ISR_ISR0	0x10000000UL	via-velocity.h
11661	ISR_TXSTLI	0x02000000UL	via-velocity.h
11662	ISR_RXSTLI	0x01000000UL	via-velocity.h
11663	ISR_HFLD	0x00800000UL	via-velocity.h
11664	ISR_UDPI	0x00400000UL	via-velocity.h
11665	ISR_MIBFI	0x00200000UL	via-velocity.h
11666	ISR_SHDNI	0x00100000UL	via-velocity.h
11667	ISR_PHYI	0x00080000UL	via-velocity.h
11668	ISR_PWEI	0x00040000UL	via-velocity.h
11669	ISR_TMR1I	0x00020000UL	via-velocity.h
11670	ISR_TMR0I	0x00010000UL	via-velocity.h
11671	ISR_SRCI	0x00008000UL	via-velocity.h
11672	ISR_LSTPEI	0x00004000UL	via-velocity.h
11673	ISR_LSTEI	0x00002000UL	via-velocity.h
11674	ISR_OVFI	0x00001000UL	via-velocity.h
11675	ISR_FLONI	0x00000800UL	via-velocity.h
11676	ISR_RACEI	0x00000400UL	via-velocity.h
11677	ISR_TXWB1I	0x00000200UL	via-velocity.h
11678	ISR_TXWB0I	0x00000100UL	via-velocity.h
11679	ISR_PTX3I	0x00000080UL	via-velocity.h
11680	ISR_PTX2I	0x00000040UL	via-velocity.h
11681	ISR_PTX1I	0x00000020UL	via-velocity.h
11682	ISR_PTX0I	0x00000010UL	via-velocity.h
11683	ISR_PTXI	0x00000008UL	via-velocity.h
11684	ISR_PRXI	0x00000004UL	via-velocity.h
11685	ISR_PPTXI	0x00000002UL	via-velocity.h
11686	ISR_PPRXI	0x00000001UL	via-velocity.h
11687	IMR_TXSTLM	0x02000000UL	via-velocity.h
11688	IMR_UDPIM	0x00400000UL	via-velocity.h
11689	IMR_MIBFIM	0x00200000UL	via-velocity.h
11690	IMR_SHDNIM	0x00100000UL	via-velocity.h
11691	IMR_PHYIM	0x00080000UL	via-velocity.h
11692	IMR_PWEIM	0x00040000UL	via-velocity.h
11693	IMR_TMR1IM	0x00020000UL	via-velocity.h
11694	IMR_TMR0IM	0x00010000UL	via-velocity.h
11695	IMR_SRCIM	0x00008000UL	via-velocity.h
11696	IMR_LSTPEIM	0x00004000UL	via-velocity.h
11697	IMR_LSTEIM	0x00002000UL	via-velocity.h
11698	IMR_OVFIM	0x00001000UL	via-velocity.h
11699	IMR_FLONIM	0x00000800UL	via-velocity.h
11700	IMR_RACEIM	0x00000400UL	via-velocity.h
11701	IMR_TXWB1IM	0x00000200UL	via-velocity.h
11702	IMR_TXWB0IM	0x00000100UL	via-velocity.h
11703	IMR_PTX3IM	0x00000080UL	via-velocity.h
11704	IMR_PTX2IM	0x00000040UL	via-velocity.h
11705	IMR_PTX1IM	0x00000020UL	via-velocity.h
11706	IMR_PTX0IM	0x00000010UL	via-velocity.h
11707	IMR_PTXIM	0x00000008UL	via-velocity.h
11708	IMR_PRXIM	0x00000004UL	via-velocity.h
11709	IMR_PPTXIM	0x00000002UL	via-velocity.h
11710	IMR_PPRXIM	0x00000001UL	via-velocity.h
11711	INT_MASK_DEF	( IMR_PPTXIM\|IMR_PPRXIM\| IMR_PTXIM\|IMR_PRXIM \| \ IMR_PWEIM\|IMR_TXWB0IM\|IMR_TXWB1IM\|IMR_FLONIM\| \ IMR_OVFIM\|IMR_LSTEIM\|IMR_LSTP	via-velocity.h
11712	TRDCSR_DEAD	0x0008	via-velocity.h
11713	TRDCSR_WAK	0x0004	via-velocity.h
11714	TRDCSR_ACT	0x0002	via-velocity.h
11715	TRDCSR_RUN	0x0001	via-velocity.h
11716	CAMADDR_CAMEN	0x80	via-velocity.h
11717	CAMADDR_VCAMSL	0x40	via-velocity.h
11718	CAMCR_PS1	0x80	via-velocity.h
11719	CAMCR_PS0	0x40	via-velocity.h
11720	CAMCR_AITRPKT	0x20	via-velocity.h
11721	CAMCR_AITR16	0x10	via-velocity.h
11722	CAMCR_CAMRD	0x08	via-velocity.h
11723	CAMCR_CAMWR	0x04	via-velocity.h
11724	CAMCR_PS_CAM_MASK	0x40	via-velocity.h
11725	CAMCR_PS_CAM_DATA	0x80	via-velocity.h
11726	CAMCR_PS_MAR	0x00	via-velocity.h
11727	MIICFG_MPO1	0x80	via-velocity.h
11728	MIICFG_MPO0	0x40	via-velocity.h
11729	MIICFG_MFDC	0x20	via-velocity.h
11730	MIISR_MIDLE	0x80	via-velocity.h
11731	PHYSR0_PHYRST	0x80	via-velocity.h
11732	PHYSR0_LINKGD	0x40	via-velocity.h
11733	PHYSR0_FDPX	0x10	via-velocity.h
11734	PHYSR0_SPDG	0x08	via-velocity.h
11735	PHYSR0_SPD10	0x04	via-velocity.h
11736	PHYSR0_RXFLC	0x02	via-velocity.h
11737	PHYSR0_TXFLC	0x01	via-velocity.h
11738	PHYSR1_PHYTBI	0x01	via-velocity.h
11739	MIICR_MAUTO	0x80	via-velocity.h
11740	MIICR_RCMD	0x40	via-velocity.h
11741	MIICR_WCMD	0x20	via-velocity.h
11742	MIICR_MDPM	0x10	via-velocity.h
11743	MIICR_MOUT	0x08	via-velocity.h
11744	MIICR_MDO	0x04	via-velocity.h
11745	MIICR_MDI	0x02	via-velocity.h
11746	MIICR_MDC	0x01	via-velocity.h
11747	MIIADR_SWMPL	0x80	via-velocity.h
11748	CFGA_PMHCTG	0x08	via-velocity.h
11749	CFGA_GPIO1PD	0x04	via-velocity.h
11750	CFGA_ABSHDN	0x02	via-velocity.h
11751	CFGA_PACPI	0x01	via-velocity.h
11752	CFGB_GTCKOPT	0x80	via-velocity.h
11753	CFGB_MIIOPT	0x40	via-velocity.h
11754	CFGB_CRSEOPT	0x20	via-velocity.h
11755	CFGB_OFSET	0x10	via-velocity.h
11756	CFGB_CRANDOM	0x08	via-velocity.h
11757	CFGB_CAP	0x04	via-velocity.h
11758	CFGB_MBA	0x02	via-velocity.h
11759	CFGB_BAKOPT	0x01	via-velocity.h
11760	CFGC_EELOAD	0x80	via-velocity.h
11761	CFGC_BROPT	0x40	via-velocity.h
11762	CFGC_DLYEN	0x20	via-velocity.h
11763	CFGC_DTSEL	0x10	via-velocity.h
11764	CFGC_BTSEL	0x08	via-velocity.h
11765	CFGC_BPS2	0x04	via-velocity.h	bootrom select[2]
11766	CFGC_BPS1	0x02	via-velocity.h	bootrom select[1]
11767	CFGC_BPS0	0x01	via-velocity.h	bootrom select[0]
11768	CFGD_IODIS	0x80	via-velocity.h
11769	CFGD_MSLVDACEN	0x40	via-velocity.h
11770	CFGD_CFGDACEN	0x20	via-velocity.h
11771	CFGD_PCI64EN	0x10	via-velocity.h
11772	CFGD_HTMRL4	0x08	via-velocity.h
11773	DCFG_XMWI	0x8000	via-velocity.h
11774	DCFG_XMRM	0x4000	via-velocity.h
11775	DCFG_XMRL	0x2000	via-velocity.h
11776	DCFG_PERDIS	0x1000	via-velocity.h
11777	DCFG_MRWAIT	0x0400	via-velocity.h
11778	DCFG_MWWAIT	0x0200	via-velocity.h
11779	DCFG_LATMEN	0x0100	via-velocity.h
11780	MCFG_RXARB	0x0080	via-velocity.h
11781	MCFG_RFT1	0x0020	via-velocity.h
11782	MCFG_RFT0	0x0010	via-velocity.h
11783	MCFG_LOWTHOPT	0x0008	via-velocity.h
11784	MCFG_PQEN	0x0004	via-velocity.h
11785	MCFG_RTGOPT	0x0002	via-velocity.h
11786	MCFG_VIDFR	0x0001	via-velocity.h
11787	MCFG_TXARB	0x8000	via-velocity.h
11788	MCFG_TXQBK1	0x0800	via-velocity.h
11789	MCFG_TXQBK0	0x0400	via-velocity.h
11790	MCFG_TXQNOBK	0x0200	via-velocity.h
11791	MCFG_SNAPOPT	0x0100	via-velocity.h
11792	PMCC_DSI	0x80	via-velocity.h
11793	PMCC_D2_DIS	0x40	via-velocity.h
11794	PMCC_D1_DIS	0x20	via-velocity.h
11795	PMCC_D3C_EN	0x10	via-velocity.h
11796	PMCC_D3H_EN	0x08	via-velocity.h
11797	PMCC_D2_EN	0x04	via-velocity.h
11798	PMCC_D1_EN	0x02	via-velocity.h
11799	PMCC_D0_EN	0x01	via-velocity.h
11800	STICKHW_SWPTAG	0x10	via-velocity.h
11801	STICKHW_WOLSR	0x08	via-velocity.h
11802	STICKHW_WOLEN	0x04	via-velocity.h
11803	STICKHW_DS1	0x02	via-velocity.h	R/W by software/cfg cycle
11804	STICKHW_DS0	0x01	via-velocity.h	suspend well DS write port
11805	MIBCR_MIBISTOK	0x80	via-velocity.h
11806	MIBCR_MIBISTGO	0x40	via-velocity.h
11807	MIBCR_MIBINC	0x20	via-velocity.h
11808	MIBCR_MIBHI	0x10	via-velocity.h
11809	MIBCR_MIBFRZ	0x08	via-velocity.h
11810	MIBCR_MIBFLSH	0x04	via-velocity.h
11811	MIBCR_MPTRINI	0x02	via-velocity.h
11812	MIBCR_MIBCLR	0x01	via-velocity.h
11813	EERSV_BOOT_RPL	((u8) 0x01)	via-velocity.h	Boot method selection for VT6110
11814	EERSV_BOOT_MASK	((u8) 0x06)	via-velocity.h
11815	EERSV_BOOT_INT19	((u8) 0x00)	via-velocity.h
11816	EERSV_BOOT_INT18	((u8) 0x02)	via-velocity.h
11817	EERSV_BOOT_LOCAL	((u8) 0x04)	via-velocity.h
11818	EERSV_BOOT_BEV	((u8) 0x06)	via-velocity.h
11819	BPCMD_BPDNE	0x80	via-velocity.h
11820	BPCMD_EBPWR	0x02	via-velocity.h
11821	BPCMD_EBPRD	0x01	via-velocity.h
11822	EECSR_EMBP	0x40	via-velocity.h	eeprom embeded programming
11823	EECSR_RELOAD	0x20	via-velocity.h	eeprom content reload
11824	EECSR_DPM	0x10	via-velocity.h	eeprom direct programming
11825	EECSR_ECS	0x08	via-velocity.h	eeprom CS pin
11826	EECSR_ECK	0x04	via-velocity.h	eeprom CK pin
11827	EECSR_EDI	0x02	via-velocity.h	eeprom DI pin
11828	EECSR_EDO	0x01	via-velocity.h	eeprom DO pin
11829	EMBCMD_EDONE	0x80	via-velocity.h
11830	EMBCMD_EWDIS	0x08	via-velocity.h
11831	EMBCMD_EWEN	0x04	via-velocity.h
11832	EMBCMD_EWR	0x02	via-velocity.h
11833	EMBCMD_ERD	0x01	via-velocity.h
11834	TESTCFG_HBDIS	0x80	via-velocity.h
11835	CHIPGCR_FCGMII	0x80	via-velocity.h
11836	CHIPGCR_FCFDX	0x40	via-velocity.h
11837	CHIPGCR_FCRESV	0x20	via-velocity.h
11838	CHIPGCR_FCMODE	0x10	via-velocity.h
11839	CHIPGCR_LPSOPT	0x08	via-velocity.h
11840	CHIPGCR_TM1US	0x04	via-velocity.h
11841	CHIPGCR_TM0US	0x02	via-velocity.h
11842	CHIPGCR_PHYINTEN	0x01	via-velocity.h
11843	WOLCR_MSWOLEN7	0x0080	via-velocity.h	enable pattern match filtering
11844	WOLCR_MSWOLEN6	0x0040	via-velocity.h
11845	WOLCR_MSWOLEN5	0x0020	via-velocity.h
11846	WOLCR_MSWOLEN4	0x0010	via-velocity.h
11847	WOLCR_MSWOLEN3	0x0008	via-velocity.h
11848	WOLCR_MSWOLEN2	0x0004	via-velocity.h
11849	WOLCR_MSWOLEN1	0x0002	via-velocity.h
11850	WOLCR_MSWOLEN0	0x0001	via-velocity.h
11851	WOLCR_ARP_EN	0x0001	via-velocity.h
11852	WOLCR_LINKOFF_EN	0x0800	via-velocity.h	link off detected enable
11853	WOLCR_LINKON_EN	0x0400	via-velocity.h	link on detected enable
11854	WOLCR_MAGIC_EN	0x0200	via-velocity.h	magic packet filter enable
11855	WOLCR_UNICAST_EN	0x0100	via-velocity.h	unicast filter enable
11856	PWCFG_PHYPWOPT	0x80	via-velocity.h	internal MII I/F timing
11857	PWCFG_PCISTICK	0x40	via-velocity.h	PCI sticky R/W enable
11858	PWCFG_WOLTYPE	0x20	via-velocity.h	pulse(1) or button (0)
11859	PWCFG_LEGCY_WOL	0x10	via-velocity.h
11860	PWCFG_PMCSR_PME_SR	0x08	via-velocity.h
11861	PWCFG_PMCSR_PME_EN	0x04	via-velocity.h	control by PCISTICK
11862	PWCFG_LEGACY_WOLSR	0x02	via-velocity.h	Legacy WOL_SR shadow
11863	PWCFG_LEGACY_WOLEN	0x01	via-velocity.h	Legacy WOL_EN shadow
11864	WOLCFG_PMEOVR	0x80	via-velocity.h	for legacy use, force PMEEN always
11865	WOLCFG_SAM	0x20	via-velocity.h	accept multicast case reset, default=0
11866	WOLCFG_SAB	0x10	via-velocity.h	accept broadcast case reset, default=0
11867	WOLCFG_SMIIACC	0x08	via-velocity.h	??
11868	WOLCFG_SGENWH	0x02	via-velocity.h
11869	WOLCFG_PHYINTEN	0x01	via-velocity.h	0:PHYINT trigger enable, 1:use internal MII
11870	WOLSR_LINKOFF_INT	0x0800	via-velocity.h
11871	WOLSR_LINKON_INT	0x0400	via-velocity.h
11872	WOLSR_MAGIC_INT	0x0200	via-velocity.h
11873	WOLSR_UNICAST_INT	0x0100	via-velocity.h
11874	PKT_TYPE_NONE	0x0000	via-velocity.h	Turn off receiver
11875	PKT_TYPE_DIRECTED	0x0001	via-velocity.h	obselete, directed address is always accepted
11876	PKT_TYPE_MULTICAST	0x0002	via-velocity.h
11877	PKT_TYPE_ALL_MULTICAST	0x0004	via-velocity.h
11878	PKT_TYPE_BROADCAST	0x0008	via-velocity.h
11879	PKT_TYPE_PROMISCUOUS	0x0020	via-velocity.h
11880	PKT_TYPE_LONG	0x2000	via-velocity.h	NOTE.... the definition of LONG is >2048 bytes in our chip
11881	PKT_TYPE_RUNT	0x4000	via-velocity.h
11882	PKT_TYPE_ERROR	0x8000	via-velocity.h	Accept error packets, e.g. CRC error
11883	MAC_LB_NONE	0x00	via-velocity.h
11884	MAC_LB_INTERNAL	0x01	via-velocity.h
11885	MAC_LB_EXTERNAL	0x02	via-velocity.h
11886	IMR_MASK_VALUE	0x0033FF0FUL	via-velocity.h	initial value of IMR
11887	IMR_MASK_VALUE	0x0013FB0FUL	via-velocity.h	initial value of IMR
11888	REV_ID_VT3119_A0	0x00	via-velocity.h
11889	REV_ID_VT3119_A1	0x01	via-velocity.h
11890	REV_ID_VT3216_A0	0x10	via-velocity.h
11891	W_MAX_TIMEOUT	0x0FFFU	via-velocity.h
11892	MII_REG_BMCR	0x00	via-velocity.h	physical address
11893	MII_REG_BMSR	0x01	via-velocity.h
11894	MII_REG_PHYID1	0x02	via-velocity.h	OUI
11895	MII_REG_PHYID2	0x03	via-velocity.h	OUI + Module ID + REV ID
11896	MII_REG_ANAR	0x04	via-velocity.h
11897	MII_REG_ANLPAR	0x05	via-velocity.h
11898	MII_REG_G1000CR	0x09	via-velocity.h
11899	MII_REG_G1000SR	0x0A	via-velocity.h
11900	MII_REG_MODCFG	0x10	via-velocity.h
11901	MII_REG_TCSR	0x16	via-velocity.h
11902	MII_REG_PLED	0x1B	via-velocity.h
11903	MII_REG_PCR	0x17	via-velocity.h
11904	MII_REG_PCSR	0x17	via-velocity.h
11905	MII_REG_AUXCR	0x1C	via-velocity.h
11906	MII_REG_PSCR	0x10	via-velocity.h	PHY specific control register
11907	BMCR_RESET	0x8000	via-velocity.h
11908	BMCR_LBK	0x4000	via-velocity.h
11909	BMCR_SPEED100	0x2000	via-velocity.h
11910	BMCR_AUTO	0x1000	via-velocity.h
11911	BMCR_PD	0x0800	via-velocity.h
11912	BMCR_ISO	0x0400	via-velocity.h
11913	BMCR_REAUTO	0x0200	via-velocity.h
11914	BMCR_FDX	0x0100	via-velocity.h
11915	BMCR_SPEED1G	0x0040	via-velocity.h
11916	BMSR_AUTOCM	0x0020	via-velocity.h
11917	BMSR_LNK	0x0004	via-velocity.h
11918	ANAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
11919	ANAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
11920	ANAR_T4	0x0200	via-velocity.h
11921	ANAR_TXFD	0x0100	via-velocity.h
11922	ANAR_TX	0x0080	via-velocity.h
11923	ANAR_10FD	0x0040	via-velocity.h
11924	ANAR_10	0x0020	via-velocity.h
11925	ANLPAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
11926	ANLPAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
11927	ANLPAR_T4	0x0200	via-velocity.h
11928	ANLPAR_TXFD	0x0100	via-velocity.h
11929	ANLPAR_TX	0x0080	via-velocity.h
11930	ANLPAR_10FD	0x0040	via-velocity.h
11931	ANLPAR_10	0x0020	via-velocity.h
11932	G1000CR_1000FD	0x0200	via-velocity.h	PHY is 1000-T Full-duplex capable
11933	G1000CR_1000	0x0100	via-velocity.h	PHY is 1000-T Half-duplex capable
11934	G1000SR_1000FD	0x0800	via-velocity.h	LP PHY is 1000-T Full-duplex capable
11935	G1000SR_1000	0x0400	via-velocity.h	LP PHY is 1000-T Half-duplex capable
11936	TCSR_ECHODIS	0x2000	via-velocity.h
11937	AUXCR_MDPPS	0x0004	via-velocity.h
11938	PLED_LALBE	0x0004	via-velocity.h
11939	PSCR_ACRSTX	0x0800	via-velocity.h	Assert CRS on Transmit
11940	PHYID_CICADA_CS8201	0x000FC410UL	via-velocity.h
11941	PHYID_VT3216_32BIT	0x000FC610UL	via-velocity.h
11942	PHYID_VT3216_64BIT	0x000FC600UL	via-velocity.h
11943	PHYID_MARVELL_1000	0x01410C50UL	via-velocity.h
11944	PHYID_MARVELL_1000S	0x01410C40UL	via-velocity.h
11945	PHYID_REV_ID_MASK	0x0000000FUL	via-velocity.h
11946	VELOCITY_WOL_MAGIC	0x00000000UL	via-velocity.h
11947	VELOCITY_WOL_PHY	0x00000001UL	via-velocity.h
11948	VELOCITY_WOL_ARP	0x00000002UL	via-velocity.h
11949	VELOCITY_WOL_UCAST	0x00000004UL	via-velocity.h
11950	VELOCITY_WOL_BCAST	0x00000010UL	via-velocity.h
11951	VELOCITY_WOL_MCAST	0x00000020UL	via-velocity.h
11952	VELOCITY_WOL_MAGIC_SEC	0x00000040UL	via-velocity.h
11953	VELOCITY_FLAGS_TAGGING	0x00000001UL	via-velocity.h
11954	VELOCITY_FLAGS_TX_CSUM	0x00000002UL	via-velocity.h
11955	VELOCITY_FLAGS_RX_CSUM	0x00000004UL	via-velocity.h
11956	VELOCITY_FLAGS_IP_ALIGN	0x00000008UL	via-velocity.h
11957	VELOCITY_FLAGS_VAL_PKT_LEN	0x00000010UL	via-velocity.h
11958	VELOCITY_FLAGS_FLOW_CTRL	0x01000000UL	via-velocity.h
11959	VELOCITY_FLAGS_OPENED	0x00010000UL	via-velocity.h
11960	VELOCITY_FLAGS_VMNS_CONNECTED	0x00020000UL	via-velocity.h
11961	VELOCITY_FLAGS_VMNS_COMMITTED	0x00040000UL	via-velocity.h
11962	VELOCITY_FLAGS_WOL_ENABLED	0x00080000UL	via-velocity.h
11963	VELOCITY_LINK_FAIL	0x00000001UL	via-velocity.h
11964	VELOCITY_SPEED_10	0x00000002UL	via-velocity.h
11965	VELOCITY_SPEED_100	0x00000004UL	via-velocity.h
11966	VELOCITY_SPEED_1000	0x00000008UL	via-velocity.h
11967	VELOCITY_DUPLEX_FULL	0x00000010UL	via-velocity.h
11968	VELOCITY_AUTONEG_ENABLE	0x00000020UL	via-velocity.h
11969	VELOCITY_FORCED_BY_EEPROM	0x00000040UL	via-velocity.h
11970	VELOCITY_LINK_CHANGE	0x00000001UL	via-velocity.h
11971	RX_DESC_MIN	4	via-velocity.h
11972	RX_DESC_MAX	255	via-velocity.h
11973	RX_DESC_DEF	RX_DESC_MIN	via-velocity.h
11974	TX_DESC_MIN	1	via-velocity.h
11975	TX_DESC_MAX	256	via-velocity.h
11976	TX_DESC_DEF	TX_DESC_MIN	via-velocity.h
11977	VIRTIO_NET_F_CSUM	0	virtio-net.h	Host handles pkts w/ partial csum
11978	VIRTIO_NET_F_GUEST_CSUM	1	virtio-net.h	Guest handles pkts w/ partial csum
11979	VIRTIO_NET_F_MAC	5	virtio-net.h	Host has given MAC address.
11980	VIRTIO_NET_F_GSO	6	virtio-net.h	Host handles pkts w/ any GSO type
11981	VIRTIO_NET_F_GUEST_TSO4	7	virtio-net.h	Guest can handle TSOv4 in.
11982	VIRTIO_NET_F_GUEST_TSO6	8	virtio-net.h	Guest can handle TSOv6 in.
11983	VIRTIO_NET_F_GUEST_ECN	9	virtio-net.h	Guest can handle TSO[6] w/ ECN in.
11984	VIRTIO_NET_F_GUEST_UFO	10	virtio-net.h	Guest can handle UFO in.
11985	VIRTIO_NET_F_HOST_TSO4	11	virtio-net.h	Host can handle TSOv4 in.
11986	VIRTIO_NET_F_HOST_TSO6	12	virtio-net.h	Host can handle TSOv6 in.
11987	VIRTIO_NET_F_HOST_ECN	13	virtio-net.h	Host can handle TSO[6] w/ ECN in.
11988	VIRTIO_NET_F_HOST_UFO	14	virtio-net.h	Host can handle UFO in.
11989	WLAN_Ix86	1	wlan_compat.h
11990	WLAN_PPC	2	wlan_compat.h
11991	WLAN_Ix96	3	wlan_compat.h
11992	WLAN_ARM	4	wlan_compat.h
11993	WLAN_ALPHA	5	wlan_compat.h
11994	WLAN_MIPS	6	wlan_compat.h
11995	WLAN_HPPA	7	wlan_compat.h
11996	WLAN_I386CORE	1	wlan_compat.h
11997	WLAN_PPCCORE	2	wlan_compat.h
11998	WLAN_I296	3	wlan_compat.h
11999	WLAN_ARMCORE	4	wlan_compat.h
12000	WLAN_ALPHACORE	5	wlan_compat.h
12001	WLAN_MIPSCORE	6	wlan_compat.h
12002	WLAN_HPPACORE	7	wlan_compat.h
12003	WLAN_I386PART	1	wlan_compat.h
12004	WLAN_MPC860	2	wlan_compat.h
12005	WLAN_MPC823	3	wlan_compat.h
12006	WLAN_I296SA	4	wlan_compat.h
12007	WLAN_PPCPART	5	wlan_compat.h
12008	WLAN_ARMPART	6	wlan_compat.h
12009	WLAN_ALPHAPART	7	wlan_compat.h
12010	WLAN_MIPSPART	8	wlan_compat.h
12011	WLAN_HPPAPART	9	wlan_compat.h
12012	WLAN_PCAT	1	wlan_compat.h
12013	WLAN_MBX	2	wlan_compat.h
12014	WLAN_RPX	3	wlan_compat.h
12015	WLAN_LWARCH	4	wlan_compat.h
12016	WLAN_PMAC	5	wlan_compat.h
12017	WLAN_SKIFF	6	wlan_compat.h
12018	WLAN_BITSY	7	wlan_compat.h
12019	WLAN_ALPHAARCH	7	wlan_compat.h
12020	WLAN_MIPSARCH	9	wlan_compat.h
12021	WLAN_HPPAARCH	10	wlan_compat.h
12022	WLAN_LINUX_KERNEL	1	wlan_compat.h
12023	WLAN_LINUX_USER	2	wlan_compat.h
12024	WLAN_PCMCIA	1	wlan_compat.h
12025	WLAN_ISA	2	wlan_compat.h
12026	WLAN_PCI	3	wlan_compat.h
12027	WLAN_USB	4	wlan_compat.h
12028	WLAN_PLX	5	wlan_compat.h
12029	WLAN_OS	WLAN_LINUX_KERNEL	wlan_compat.h
12030	WLAN_OS	WLAN_LINUX_USER	wlan_compat.h
12031	WLAN_CPU_FAMILY	WLAN_Ix86	wlan_compat.h
12032	WLAN_CPU_CORE	WLAN_I386CORE	wlan_compat.h
12033	WLAN_CPU_PART	WLAN_I386PART	wlan_compat.h
12034	WLAN_SYSARCH	WLAN_PCAT	wlan_compat.h
12035	WLAN_CPU_FAMILY	WLAN_PPC	wlan_compat.h
12036	WLAN_CPU_CORE	WLAN_PPCCORE	wlan_compat.h
12037	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
12038	WLAN_SYSARCH	WLAN_MBX	wlan_compat.h
12039	WLAN_CPU_PART	WLAN_MPC823	wlan_compat.h
12040	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
12041	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
12042	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
12043	WLAN_CPU_PART	WLAN_PPCPART	wlan_compat.h
12044	WLAN_SYSARCH	WLAN_PMAC	wlan_compat.h
12045	WLAN_CPU_FAMILY	WLAN_ARM	wlan_compat.h
12046	WLAN_CPU_CORE	WLAN_ARMCORE	wlan_compat.h
12047	WLAN_CPU_PART	WLAN_ARM_PART	wlan_compat.h
12048	WLAN_SYSARCH	WLAN_SKIFF	wlan_compat.h
12049	WLAN_CPU_FAMILY	WLAN_ALPHA	wlan_compat.h
12050	WLAN_CPU_CORE	WLAN_ALPHACORE	wlan_compat.h
12051	WLAN_CPU_PART	WLAN_ALPHAPART	wlan_compat.h
12052	WLAN_SYSARCH	WLAN_ALPHAARCH	wlan_compat.h
12053	WLAN_CPU_FAMILY	WLAN_MIPS	wlan_compat.h
12054	WLAN_CPU_CORE	WLAN_MIPSCORE	wlan_compat.h
12055	WLAN_CPU_PART	WLAN_MIPSPART	wlan_compat.h
12056	WLAN_SYSARCH	WLAN_MIPSARCH	wlan_compat.h
12057	WLAN_CPU_FAMILY	WLAN_HPPA	wlan_compat.h
12058	WLAN_CPU_CORE	WLAN_HPPACORE	wlan_compat.h
12059	WLAN_CPU_PART	WLAN_HPPAPART	wlan_compat.h
12060	WLAN_SYSARCH	WLAN_HPPAARCH	wlan_compat.h
12061	BIT0	0x00000001	wlan_compat.h
12062	BIT1	0x00000002	wlan_compat.h
12063	BIT2	0x00000004	wlan_compat.h
12064	BIT3	0x00000008	wlan_compat.h
12065	BIT4	0x00000010	wlan_compat.h
12066	BIT5	0x00000020	wlan_compat.h
12067	BIT6	0x00000040	wlan_compat.h
12068	BIT7	0x00000080	wlan_compat.h
12069	BIT8	0x00000100	wlan_compat.h
12070	BIT9	0x00000200	wlan_compat.h
12071	BIT10	0x00000400	wlan_compat.h
12072	BIT11	0x00000800	wlan_compat.h
12073	BIT12	0x00001000	wlan_compat.h
12074	BIT13	0x00002000	wlan_compat.h
12075	BIT14	0x00004000	wlan_compat.h
12076	BIT15	0x00008000	wlan_compat.h
12077	BIT16	0x00010000	wlan_compat.h
12078	BIT17	0x00020000	wlan_compat.h
12079	BIT18	0x00040000	wlan_compat.h
12080	BIT19	0x00080000	wlan_compat.h
12081	BIT20	0x00100000	wlan_compat.h
12082	BIT21	0x00200000	wlan_compat.h
12083	BIT22	0x00400000	wlan_compat.h
12084	BIT23	0x00800000	wlan_compat.h
12085	BIT24	0x01000000	wlan_compat.h
12086	BIT25	0x02000000	wlan_compat.h
12087	BIT26	0x04000000	wlan_compat.h
12088	BIT27	0x08000000	wlan_compat.h
12089	BIT28	0x10000000	wlan_compat.h
12090	BIT29	0x20000000	wlan_compat.h
12091	BIT30	0x40000000	wlan_compat.h
12092	BIT31	0x80000000	wlan_compat.h
12093	UINT8_MAX	(0xffUL)	wlan_compat.h
12094	UINT16_MAX	(0xffffUL)	wlan_compat.h
12095	UINT32_MAX	(0xffffffffUL)	wlan_compat.h
12096	INT8_MAX	(0x7fL)	wlan_compat.h
12097	INT16_MAX	(0x7fffL)	wlan_compat.h
12098	INT32_MAX	(0x7fffffffL)	wlan_compat.h
12099	__WLAN_ATTRIB_PACK__	__attribute__ ((packed))	wlan_compat.h
12100	__WLAN_INLINE__	inline	wlan_compat.h
12101	WLAN_MIN_ARRAY	0	wlan_compat.h
12102	WLAN_DBVAR	wlan_debug	wlan_compat.h
12103	DBFENTER	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Enter\n"); } }	wlan_compat.h
12104	DBFEXIT	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Exit\n"); } }	wlan_compat.h
12105	wlan_ms_per_tick	(1000UL / (wlan_ticks_per_sec))	wlan_compat.h
12106	MODVERSIONS	1	wlan_compat.h
12107	__SMP__	1	wlan_compat.h
12108	CONFIG_NETLINK	1	wlan_compat.h
12109	BAR_0	0	e1000.h
12110	BAR_1	1	e1000.h
12111	BAR_5	5	e1000.h
12112	E1000_RXBUFFER_128	128	e1000.h	Used for packet split
12113	E1000_RXBUFFER_256	256	e1000.h	Used for packet split
12114	E1000_RXBUFFER_512	512	e1000.h
12115	E1000_RXBUFFER_1024	1024	e1000.h
12116	E1000_RXBUFFER_2048	2048	e1000.h
12117	E1000_RXBUFFER_4096	4096	e1000.h
12118	E1000_RXBUFFER_8192	8192	e1000.h
12119	E1000_RXBUFFER_16384	16384	e1000.h
12120	E1000_SMARTSPEED_DOWNSHIFT	3	e1000.h
12121	E1000_SMARTSPEED_MAX	15	e1000.h
12122	E1000_PBA_BYTES_SHIFT	0xA	e1000.h
12123	E1000_TX_HEAD_ADDR_SHIFT	7	e1000.h
12124	E1000_PBA_TX_MASK	0xFFFF0000	e1000.h
12125	E1000_FC_HIGH_DIFF	0x1638	e1000.h	High: 5688 bytes below Rx FIFO size
12126	E1000_FC_LOW_DIFF	0x1640	e1000.h	Low: 5696 bytes below Rx FIFO size
12127	E1000_FC_PAUSE_TIME	0x0680	e1000.h	858 usec
12128	MAXIMUM_ETHERNET_VLAN_SIZE	1522	e1000.h
12129	E1000_TX_QUEUE_WAKE	16	e1000.h
12130	E1000_RX_BUFFER_WRITE	16	e1000.h	Must be power of 2
12131	AUTO_ALL_MODES	0	e1000.h
12132	E1000_EEPROM_82544_APM	0x0004	e1000.h
12133	E1000_EEPROM_ICH8_APME	0x0004	e1000.h
12134	E1000_EEPROM_APME	0x0400	e1000.h
12135	E1000_MASTER_SLAVE	e1000_ms_hw_default	e1000.h
12136	E1000_MNG2HOST_PORT_623	(1 << 5)	e1000.h
12137	E1000_MNG2HOST_PORT_664	(1 << 6)	e1000.h
12138	E1000_ERT_2048	0x100	e1000.h
12139	IORESOURCE_IO	0x00000100	e1000.h
12140	IORESOURCE_MEM	0x00000200	e1000.h
12141	IORESOURCE_PREFETCH	0x00001000	e1000.h
12142	E1000_HOST_IF_MAX_SIZE	2048	e1000_hw.h
12143	E1000_SUCCESS	0	e1000_hw.h
12144	E1000_ERR_EEPROM	1	e1000_hw.h
12145	E1000_ERR_PHY	2	e1000_hw.h
12146	E1000_ERR_CONFIG	3	e1000_hw.h
12147	E1000_ERR_PARAM	4	e1000_hw.h
12148	E1000_ERR_MAC_TYPE	5	e1000_hw.h
12149	E1000_ERR_PHY_TYPE	6	e1000_hw.h
12150	E1000_ERR_RESET	9	e1000_hw.h
12151	E1000_ERR_MASTER_REQUESTS_PENDI	10	e1000_hw.h
12152	E1000_ERR_HOST_INTERFACE_COMMAN	11	e1000_hw.h
12153	E1000_BLK_PHY_RESET	12	e1000_hw.h
12154	E1000_ERR_SWFW_SYNC	13	e1000_hw.h
12155	E1000_MNG_DHCP_TX_PAYLOAD_CMD	64	e1000_hw.h
12156	E1000_HI_MAX_MNG_DATA_LENGTH	0x6F8	e1000_hw.h	Host Interface data length
12157	E1000_MNG_DHCP_COMMAND_TIMEOUT	10	e1000_hw.h	Time in ms to process MNG command
12158	E1000_MNG_DHCP_COOKIE_OFFSET	0x6F0	e1000_hw.h	Cookie offset
12159	E1000_MNG_DHCP_COOKIE_LENGTH	0x10	e1000_hw.h	Cookie length
12160	E1000_MNG_IAMT_MODE	0x3	e1000_hw.h
12161	E1000_MNG_ICH_IAMT_MODE	0x2	e1000_hw.h
12162	E1000_IAMT_SIGNATURE	0x544D4149	e1000_hw.h	Intel(R) Active Management Technology signature
12163	E1000_MNG_DHCP_COOKIE_STATUS_PA	0x1	e1000_hw.h	DHCP parsing enabled
12164	E1000_MNG_DHCP_COOKIE_STATUS_VL	0x2	e1000_hw.h	DHCP parsing enabled
12165	E1000_VFTA_ENTRY_SHIFT	0x5	e1000_hw.h
12166	E1000_VFTA_ENTRY_MASK	0x7F	e1000_hw.h
12167	E1000_VFTA_ENTRY_BIT_SHIFT_MASK	0x1F	e1000_hw.h
12168	E1000_DEV_ID_82542	0x1000	e1000_hw.h
12169	E1000_DEV_ID_82543GC_FIBER	0x1001	e1000_hw.h
12170	E1000_DEV_ID_82543GC_COPPER	0x1004	e1000_hw.h
12171	E1000_DEV_ID_82544EI_COPPER	0x1008	e1000_hw.h
12172	E1000_DEV_ID_82544EI_FIBER	0x1009	e1000_hw.h
12173	E1000_DEV_ID_82544GC_COPPER	0x100C	e1000_hw.h
12174	E1000_DEV_ID_82544GC_LOM	0x100D	e1000_hw.h
12175	E1000_DEV_ID_82540EM	0x100E	e1000_hw.h
12176	E1000_DEV_ID_82540EM_LOM	0x1015	e1000_hw.h
12177	E1000_DEV_ID_82540EP_LOM	0x1016	e1000_hw.h
12178	E1000_DEV_ID_82540EP	0x1017	e1000_hw.h
12179	E1000_DEV_ID_82540EP_LP	0x101E	e1000_hw.h
12180	E1000_DEV_ID_82545EM_COPPER	0x100F	e1000_hw.h
12181	E1000_DEV_ID_82545EM_FIBER	0x1011	e1000_hw.h
12182	E1000_DEV_ID_82545GM_COPPER	0x1026	e1000_hw.h
12183	E1000_DEV_ID_82545GM_FIBER	0x1027	e1000_hw.h
12184	E1000_DEV_ID_82545GM_SERDES	0x1028	e1000_hw.h
12185	E1000_DEV_ID_82546EB_COPPER	0x1010	e1000_hw.h
12186	E1000_DEV_ID_82546EB_FIBER	0x1012	e1000_hw.h
12187	E1000_DEV_ID_82546EB_QUAD_COPPE	0x101D	e1000_hw.h
12188	E1000_DEV_ID_82541EI	0x1013	e1000_hw.h
12189	E1000_DEV_ID_82541EI_MOBILE	0x1018	e1000_hw.h
12190	E1000_DEV_ID_82541ER_LOM	0x1014	e1000_hw.h
12191	E1000_DEV_ID_82541ER	0x1078	e1000_hw.h
12192	E1000_DEV_ID_82547GI	0x1075	e1000_hw.h
12193	E1000_DEV_ID_82541GI	0x1076	e1000_hw.h
12194	E1000_DEV_ID_82541GI_MOBILE	0x1077	e1000_hw.h
12195	E1000_DEV_ID_82541GI_LF	0x107C	e1000_hw.h
12196	E1000_DEV_ID_82546GB_COPPER	0x1079	e1000_hw.h
12197	E1000_DEV_ID_82546GB_FIBER	0x107A	e1000_hw.h
12198	E1000_DEV_ID_82546GB_SERDES	0x107B	e1000_hw.h
12199	E1000_DEV_ID_82546GB_PCIE	0x108A	e1000_hw.h
12200	E1000_DEV_ID_82546GB_QUAD_COPPE	0x1099	e1000_hw.h
12201	E1000_DEV_ID_82547EI	0x1019	e1000_hw.h
12202	E1000_DEV_ID_82547EI_MOBILE	0x101A	e1000_hw.h
12203	E1000_DEV_ID_82571EB_COPPER	0x105E	e1000_hw.h
12204	E1000_DEV_ID_82571EB_FIBER	0x105F	e1000_hw.h
12205	E1000_DEV_ID_82571EB_SERDES	0x1060	e1000_hw.h
12206	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10A4	e1000_hw.h
12207	E1000_DEV_ID_82571EB_QUAD_FIBER	0x10A5	e1000_hw.h
12208	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10BC	e1000_hw.h
12209	E1000_DEV_ID_82571EB_SERDES_DUA	0x10D9	e1000_hw.h
12210	E1000_DEV_ID_82571EB_SERDES_QUA	0x10DA	e1000_hw.h
12211	E1000_DEV_ID_82572EI_COPPER	0x107D	e1000_hw.h
12212	E1000_DEV_ID_82572EI_FIBER	0x107E	e1000_hw.h
12213	E1000_DEV_ID_82572EI_SERDES	0x107F	e1000_hw.h
12214	E1000_DEV_ID_82572EI	0x10B9	e1000_hw.h
12215	E1000_DEV_ID_82573E	0x108B	e1000_hw.h
12216	E1000_DEV_ID_82573E_IAMT	0x108C	e1000_hw.h
12217	E1000_DEV_ID_82573L	0x109A	e1000_hw.h
12218	E1000_DEV_ID_82546GB_QUAD_COPPE	0x10B5	e1000_hw.h
12219	E1000_DEV_ID_80003ES2LAN_COPPER	0x1096	e1000_hw.h
12220	E1000_DEV_ID_80003ES2LAN_SERDES	0x1098	e1000_hw.h
12221	E1000_DEV_ID_80003ES2LAN_COPPER	0x10BA	e1000_hw.h
12222	E1000_DEV_ID_80003ES2LAN_SERDES	0x10BB	e1000_hw.h
12223	E1000_DEV_ID_ICH8_IGP_M_AMT	0x1049	e1000_hw.h
12224	E1000_DEV_ID_ICH8_IGP_AMT	0x104A	e1000_hw.h
12225	E1000_DEV_ID_ICH8_IGP_C	0x104B	e1000_hw.h
12226	E1000_DEV_ID_ICH8_IFE	0x104C	e1000_hw.h
12227	E1000_DEV_ID_ICH8_IFE_GT	0x10C4	e1000_hw.h
12228	E1000_DEV_ID_ICH8_IFE_G	0x10C5	e1000_hw.h
12229	E1000_DEV_ID_ICH8_IGP_M	0x104D	e1000_hw.h
12230	NODE_ADDRESS_SIZE	6	e1000_hw.h
12231	ETH_LENGTH_OF_ADDRESS	6	e1000_hw.h
12232	MAC_DECODE_SIZE	(128 * 1024)	e1000_hw.h
12233	E1000_82542_2_0_REV_ID	2	e1000_hw.h
12234	E1000_82542_2_1_REV_ID	3	e1000_hw.h
12235	E1000_REVISION_0	0	e1000_hw.h
12236	E1000_REVISION_1	1	e1000_hw.h
12237	E1000_REVISION_2	2	e1000_hw.h
12238	E1000_REVISION_3	3	e1000_hw.h
12239	SPEED_10	10	e1000_hw.h
12240	SPEED_100	100	e1000_hw.h
12241	SPEED_1000	1000	e1000_hw.h
12242	HALF_DUPLEX	1	e1000_hw.h
12243	FULL_DUPLEX	2	e1000_hw.h
12244	ENET_HEADER_SIZE	14	e1000_hw.h
12245	MAXIMUM_ETHERNET_FRAME_SIZE	1518	e1000_hw.h	With FCS
12246	MINIMUM_ETHERNET_FRAME_SIZE	64	e1000_hw.h	With FCS
12247	ETHERNET_FCS_SIZE	4	e1000_hw.h
12248	MAXIMUM_ETHERNET_PACKET_SIZE	(MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
12249	MINIMUM_ETHERNET_PACKET_SIZE	(MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
12250	CRC_LENGTH	ETHERNET_FCS_SIZE	e1000_hw.h
12251	MAX_JUMBO_FRAME_SIZE	0x3F00	e1000_hw.h
12252	VLAN_TAG_SIZE	4	e1000_hw.h	802.3ac tag (not DMAed)
12253	ETHERNET_IEEE_VLAN_TYPE	0x8100	e1000_hw.h	802.3ac packet
12254	ETHERNET_IP_TYPE	0x0800	e1000_hw.h	IP packets
12255	ETHERNET_ARP_TYPE	0x0806	e1000_hw.h	Address Resolution Protocol (ARP)
12256	IP_PROTOCOL_TCP	6	e1000_hw.h
12257	IP_PROTOCOL_UDP	0x11	e1000_hw.h
12258	POLL_IMS_ENABLE_MASK	( \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ)	e1000_hw.h
12259	IMS_ENABLE_MASK	( \ E1000_IMS_RXT0 \| \ E1000_IMS_TXDW \| \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ \| \ E1000_IMS_LSC)	e1000_hw.h
12260	IMS_ICH8LAN_ENABLE_MASK	(\ E1000_IMS_DSW \| \ E1000_IMS_PHYINT \| \ E1000_IMS_EPRST)	e1000_hw.h
12261	E1000_RAR_ENTRIES	15	e1000_hw.h
12262	E1000_RAR_ENTRIES_ICH8LAN	6	e1000_hw.h
12263	MIN_NUMBER_OF_DESCRIPTORS	8	e1000_hw.h
12264	MAX_NUMBER_OF_DESCRIPTORS	0xFFF8	e1000_hw.h
12265	MAX_PS_BUFFERS	4	e1000_hw.h
12266	E1000_RXD_STAT_DD	0x01	e1000_hw.h	Descriptor Done
12267	E1000_RXD_STAT_EOP	0x02	e1000_hw.h	End of Packet
12268	E1000_RXD_STAT_IXSM	0x04	e1000_hw.h	Ignore checksum
12269	E1000_RXD_STAT_VP	0x08	e1000_hw.h	IEEE VLAN Packet
12270	E1000_RXD_STAT_UDPCS	0x10	e1000_hw.h	UDP xsum caculated
12271	E1000_RXD_STAT_TCPCS	0x20	e1000_hw.h	TCP xsum calculated
12272	E1000_RXD_STAT_IPCS	0x40	e1000_hw.h	IP xsum calculated
12273	E1000_RXD_STAT_PIF	0x80	e1000_hw.h	passed in-exact filter
12274	E1000_RXD_STAT_IPIDV	0x200	e1000_hw.h	IP identification valid
12275	E1000_RXD_STAT_UDPV	0x400	e1000_hw.h	Valid UDP checksum
12276	E1000_RXD_STAT_ACK	0x8000	e1000_hw.h	ACK Packet indication
12277	E1000_RXD_ERR_CE	0x01	e1000_hw.h	CRC Error
12278	E1000_RXD_ERR_SE	0x02	e1000_hw.h	Symbol Error
12279	E1000_RXD_ERR_SEQ	0x04	e1000_hw.h	Sequence Error
12280	E1000_RXD_ERR_CXE	0x10	e1000_hw.h	Carrier Extension Error
12281	E1000_RXD_ERR_TCPE	0x20	e1000_hw.h	TCP/UDP Checksum Error
12282	E1000_RXD_ERR_IPE	0x40	e1000_hw.h	IP Checksum Error
12283	E1000_RXD_ERR_RXE	0x80	e1000_hw.h	Rx Data Error
12284	E1000_RXD_SPC_VLAN_MASK	0x0FFF	e1000_hw.h	VLAN ID is in lower 12 bits
12285	E1000_RXD_SPC_PRI_MASK	0xE000	e1000_hw.h	Priority is in upper 3 bits
12286	E1000_RXD_SPC_PRI_SHIFT	13	e1000_hw.h
12287	E1000_RXD_SPC_CFI_MASK	0x1000	e1000_hw.h	CFI is bit 12
12288	E1000_RXD_SPC_CFI_SHIFT	12	e1000_hw.h
12289	E1000_RXDEXT_STATERR_CE	0x01000000	e1000_hw.h
12290	E1000_RXDEXT_STATERR_SE	0x02000000	e1000_hw.h
12291	E1000_RXDEXT_STATERR_SEQ	0x04000000	e1000_hw.h
12292	E1000_RXDEXT_STATERR_CXE	0x10000000	e1000_hw.h
12293	E1000_RXDEXT_STATERR_TCPE	0x20000000	e1000_hw.h
12294	E1000_RXDEXT_STATERR_IPE	0x40000000	e1000_hw.h
12295	E1000_RXDEXT_STATERR_RXE	0x80000000	e1000_hw.h
12296	E1000_RXDPS_HDRSTAT_HDRSP	0x00008000	e1000_hw.h
12297	E1000_RXDPS_HDRSTAT_HDRLEN_MASK	0x000003FF	e1000_hw.h
12298	E1000_RXD_ERR_FRAME_ERR_MASK	( \ E1000_RXD_ERR_CE \| \ E1000_RXD_ERR_SE \| \ E1000_RXD_ERR_SEQ \| \ E1000_RXD_ER	e1000_hw.h
12299	E1000_RXDEXT_ERR_FRAME_ERR_MASK	( \ E1000_RXDEXT_STATERR_CE \| \ E1000_RXDEXT_STATERR_SE \| \ E1000_RXDEXT_STATERR_SEQ \| \ E10	e1000_hw.h
12300	E1000_TXD_DTYP_D	0x00100000	e1000_hw.h	Data Descriptor
12301	E1000_TXD_DTYP_C	0x00000000	e1000_hw.h	Context Descriptor
12302	E1000_TXD_POPTS_IXSM	0x01	e1000_hw.h	Insert IP checksum
12303	E1000_TXD_POPTS_TXSM	0x02	e1000_hw.h	Insert TCP/UDP checksum
12304	E1000_TXD_CMD_EOP	0x01000000	e1000_hw.h	End of Packet
12305	E1000_TXD_CMD_IFCS	0x02000000	e1000_hw.h	Insert FCS (Ethernet CRC)
12306	E1000_TXD_CMD_IC	0x04000000	e1000_hw.h	Insert Checksum
12307	E1000_TXD_CMD_RS	0x08000000	e1000_hw.h	Report Status
12308	E1000_TXD_CMD_RPS	0x10000000	e1000_hw.h	Report Packet Sent
12309	E1000_TXD_CMD_DEXT	0x20000000	e1000_hw.h	Descriptor extension (0 = legacy)
12310	E1000_TXD_CMD_VLE	0x40000000	e1000_hw.h	Add VLAN tag
12311	E1000_TXD_CMD_IDE	0x80000000	e1000_hw.h	Enable Tidv register
12312	E1000_TXD_STAT_DD	0x00000001	e1000_hw.h	Descriptor Done
12313	E1000_TXD_STAT_EC	0x00000002	e1000_hw.h	Excess Collisions
12314	E1000_TXD_STAT_LC	0x00000004	e1000_hw.h	Late Collisions
12315	E1000_TXD_STAT_TU	0x00000008	e1000_hw.h	Transmit underrun
12316	E1000_TXD_CMD_TCP	0x01000000	e1000_hw.h	TCP packet
12317	E1000_TXD_CMD_IP	0x02000000	e1000_hw.h	IP packet
12318	E1000_TXD_CMD_TSE	0x04000000	e1000_hw.h	TCP Seg enable
12319	E1000_TXD_STAT_TC	0x00000004	e1000_hw.h	Tx Underrun
12320	E1000_NUM_UNICAST	16	e1000_hw.h	Unicast filter entries
12321	E1000_MC_TBL_SIZE	128	e1000_hw.h	Multicast Filter Table (4096 bits)
12322	E1000_VLAN_FILTER_TBL_SIZE	128	e1000_hw.h	VLAN Filter Table (4096 bits)
12323	E1000_NUM_UNICAST_ICH8LAN	7	e1000_hw.h
12324	E1000_MC_TBL_SIZE_ICH8LAN	32	e1000_hw.h
12325	E1000_NUM_MTA_REGISTERS	128	e1000_hw.h
12326	E1000_NUM_MTA_REGISTERS_ICH8LAN	32	e1000_hw.h
12327	E1000_WAKEUP_IP_ADDRESS_COUNT_M	4	e1000_hw.h
12328	E1000_IP4AT_SIZE	E1000_WAKEUP_IP_ADDRESS_COUNT_MAX	e1000_hw.h
12329	E1000_IP4AT_SIZE_ICH8LAN	3	e1000_hw.h
12330	E1000_IP6AT_SIZE	1	e1000_hw.h
12331	E1000_FLEXIBLE_FILTER_COUNT_MAX	4	e1000_hw.h
12332	E1000_FLEXIBLE_FILTER_SIZE_MAX	128	e1000_hw.h
12333	E1000_FFLT_SIZE	E1000_FLEXIBLE_FILTER_COUNT_MAX	e1000_hw.h
12334	E1000_FFMT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
12335	E1000_FFVT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
12336	E1000_DISABLE_SERDES_LOOPBACK	0x0400	e1000_hw.h
12337	E1000_CTRL	0x00000	e1000_hw.h	Device Control - RW
12338	E1000_CTRL_DUP	0x00004	e1000_hw.h	Device Control Duplicate (Shadow) - RW
12339	E1000_STATUS	0x00008	e1000_hw.h	Device Status - RO
12340	E1000_EECD	0x00010	e1000_hw.h	EEPROM/Flash Control - RW
12341	E1000_EERD	0x00014	e1000_hw.h	EEPROM Read - RW
12342	E1000_CTRL_EXT	0x00018	e1000_hw.h	Extended Device Control - RW
12343	E1000_FLA	0x0001C	e1000_hw.h	Flash Access - RW
12344	E1000_MDIC	0x00020	e1000_hw.h	MDI Control - RW
12345	E1000_SCTL	0x00024	e1000_hw.h	SerDes Control - RW
12346	E1000_FEXTNVM	0x00028	e1000_hw.h	Future Extended NVM register
12347	E1000_FCAL	0x00028	e1000_hw.h	Flow Control Address Low - RW
12348	E1000_FCAH	0x0002C	e1000_hw.h	Flow Control Address High -RW
12349	E1000_FCT	0x00030	e1000_hw.h	Flow Control Type - RW
12350	E1000_VET	0x00038	e1000_hw.h	VLAN Ether Type - RW
12351	E1000_ICR	0x000C0	e1000_hw.h	Interrupt Cause Read - R/clr
12352	E1000_ITR	0x000C4	e1000_hw.h	Interrupt Throttling Rate - RW
12353	E1000_ICS	0x000C8	e1000_hw.h	Interrupt Cause Set - WO
12354	E1000_IMS	0x000D0	e1000_hw.h	Interrupt Mask Set - RW
12355	E1000_IMC	0x000D8	e1000_hw.h	Interrupt Mask Clear - WO
12356	E1000_IAM	0x000E0	e1000_hw.h	Interrupt Acknowledge Auto Mask
12357	E1000_RCTL	0x00100	e1000_hw.h	RX Control - RW
12358	E1000_RDTR1	0x02820	e1000_hw.h	RX Delay Timer (1) - RW
12359	E1000_RDBAL1	0x02900	e1000_hw.h	RX Descriptor Base Address Low (1) - RW
12360	E1000_RDBAH1	0x02904	e1000_hw.h	RX Descriptor Base Address High (1) - RW
12361	E1000_RDLEN1	0x02908	e1000_hw.h	RX Descriptor Length (1) - RW
12362	E1000_RDH1	0x02910	e1000_hw.h	RX Descriptor Head (1) - RW
12363	E1000_RDT1	0x02918	e1000_hw.h	RX Descriptor Tail (1) - RW
12364	E1000_FCTTV	0x00170	e1000_hw.h	Flow Control Transmit Timer Value - RW
12365	E1000_TXCW	0x00178	e1000_hw.h	TX Configuration Word - RW
12366	E1000_RXCW	0x00180	e1000_hw.h	RX Configuration Word - RO
12367	E1000_TCTL	0x00400	e1000_hw.h	TX Control - RW
12368	E1000_TCTL_EXT	0x00404	e1000_hw.h	Extended TX Control - RW
12369	E1000_TIPG	0x00410	e1000_hw.h	TX Inter-packet gap -RW
12370	E1000_TBT	0x00448	e1000_hw.h	TX Burst Timer - RW
12371	E1000_AIT	0x00458	e1000_hw.h	Adaptive Interframe Spacing Throttle - RW
12372	E1000_LEDCTL	0x00E00	e1000_hw.h	LED Control - RW
12373	E1000_EXTCNF_CTRL	0x00F00	e1000_hw.h	Extended Configuration Control
12374	E1000_EXTCNF_SIZE	0x00F08	e1000_hw.h	Extended Configuration Size
12375	E1000_PHY_CTRL	0x00F10	e1000_hw.h	PHY Control Register in CSR
12376	FEXTNVM_SW_CONFIG	0x0001	e1000_hw.h
12377	E1000_PBA	0x01000	e1000_hw.h	Packet Buffer Allocation - RW
12378	E1000_PBS	0x01008	e1000_hw.h	Packet Buffer Size
12379	E1000_EEMNGCTL	0x01010	e1000_hw.h	MNG EEprom Control
12380	E1000_FLASH_UPDATES	1000	e1000_hw.h
12381	E1000_EEARBC	0x01024	e1000_hw.h	EEPROM Auto Read Bus Control
12382	E1000_FLASHT	0x01028	e1000_hw.h	FLASH Timer Register
12383	E1000_EEWR	0x0102C	e1000_hw.h	EEPROM Write Register - RW
12384	E1000_FLSWCTL	0x01030	e1000_hw.h	FLASH control register
12385	E1000_FLSWDATA	0x01034	e1000_hw.h	FLASH data register
12386	E1000_FLSWCNT	0x01038	e1000_hw.h	FLASH Access Counter
12387	E1000_FLOP	0x0103C	e1000_hw.h	FLASH Opcode Register
12388	E1000_ERT	0x02008	e1000_hw.h	Early Rx Threshold - RW
12389	E1000_FCRTL	0x02160	e1000_hw.h	Flow Control Receive Threshold Low - RW
12390	E1000_FCRTH	0x02168	e1000_hw.h	Flow Control Receive Threshold High - RW
12391	E1000_PSRCTL	0x02170	e1000_hw.h	Packet Split Receive Control - RW
12392	E1000_RDBAL	0x02800	e1000_hw.h	RX Descriptor Base Address Low - RW
12393	E1000_RDBAH	0x02804	e1000_hw.h	RX Descriptor Base Address High - RW
12394	E1000_RDLEN	0x02808	e1000_hw.h	RX Descriptor Length - RW
12395	E1000_RDH	0x02810	e1000_hw.h	RX Descriptor Head - RW
12396	E1000_RDT	0x02818	e1000_hw.h	RX Descriptor Tail - RW
12397	E1000_RDTR	0x02820	e1000_hw.h	RX Delay Timer - RW
12398	E1000_RDBAL0	E1000_RDBAL	e1000_hw.h	RX Desc Base Address Low (0) - RW
12399	E1000_RDBAH0	E1000_RDBAH	e1000_hw.h	RX Desc Base Address High (0) - RW
12400	E1000_RDLEN0	E1000_RDLEN	e1000_hw.h	RX Desc Length (0) - RW
12401	E1000_RDH0	E1000_RDH	e1000_hw.h	RX Desc Head (0) - RW
12402	E1000_RDT0	E1000_RDT	e1000_hw.h	RX Desc Tail (0) - RW
12403	E1000_RDTR0	E1000_RDTR	e1000_hw.h	RX Delay Timer (0) - RW
12404	E1000_RXDCTL	0x02828	e1000_hw.h	RX Descriptor Control queue 0 - RW
12405	E1000_RXDCTL1	0x02928	e1000_hw.h	RX Descriptor Control queue 1 - RW
12406	E1000_RADV	0x0282C	e1000_hw.h	RX Interrupt Absolute Delay Timer - RW
12407	E1000_RSRPD	0x02C00	e1000_hw.h	RX Small Packet Detect - RW
12408	E1000_RAID	0x02C08	e1000_hw.h	Receive Ack Interrupt Delay - RW
12409	E1000_TXDMAC	0x03000	e1000_hw.h	TX DMA Control - RW
12410	E1000_KABGTXD	0x03004	e1000_hw.h	AFE Band Gap Transmit Ref Data
12411	E1000_TDFH	0x03410	e1000_hw.h	TX Data FIFO Head - RW
12412	E1000_TDFT	0x03418	e1000_hw.h	TX Data FIFO Tail - RW
12413	E1000_TDFHS	0x03420	e1000_hw.h	TX Data FIFO Head Saved - RW
12414	E1000_TDFTS	0x03428	e1000_hw.h	TX Data FIFO Tail Saved - RW
12415	E1000_TDFPC	0x03430	e1000_hw.h	TX Data FIFO Packet Count - RW
12416	E1000_TDBAL	0x03800	e1000_hw.h	TX Descriptor Base Address Low - RW
12417	E1000_TDBAH	0x03804	e1000_hw.h	TX Descriptor Base Address High - RW
12418	E1000_TDLEN	0x03808	e1000_hw.h	TX Descriptor Length - RW
12419	E1000_TDH	0x03810	e1000_hw.h	TX Descriptor Head - RW
12420	E1000_TDT	0x03818	e1000_hw.h	TX Descripotr Tail - RW
12421	E1000_TIDV	0x03820	e1000_hw.h	TX Interrupt Delay Value - RW
12422	E1000_TXDCTL	0x03828	e1000_hw.h	TX Descriptor Control - RW
12423	E1000_TADV	0x0382C	e1000_hw.h	TX Interrupt Absolute Delay Val - RW
12424	E1000_TSPMT	0x03830	e1000_hw.h	TCP Segmentation PAD & Min Threshold - RW
12425	E1000_TARC0	0x03840	e1000_hw.h	TX Arbitration Count (0)
12426	E1000_TDBAL1	0x03900	e1000_hw.h	TX Desc Base Address Low (1) - RW
12427	E1000_TDBAH1	0x03904	e1000_hw.h	TX Desc Base Address High (1) - RW
12428	E1000_TDLEN1	0x03908	e1000_hw.h	TX Desc Length (1) - RW
12429	E1000_TDH1	0x03910	e1000_hw.h	TX Desc Head (1) - RW
12430	E1000_TDT1	0x03918	e1000_hw.h	TX Desc Tail (1) - RW
12431	E1000_TXDCTL1	0x03928	e1000_hw.h	TX Descriptor Control (1) - RW
12432	E1000_TARC1	0x03940	e1000_hw.h	TX Arbitration Count (1)
12433	E1000_CRCERRS	0x04000	e1000_hw.h	CRC Error Count - R/clr
12434	E1000_ALGNERRC	0x04004	e1000_hw.h	Alignment Error Count - R/clr
12435	E1000_SYMERRS	0x04008	e1000_hw.h	Symbol Error Count - R/clr
12436	E1000_RXERRC	0x0400C	e1000_hw.h	Receive Error Count - R/clr
12437	E1000_MPC	0x04010	e1000_hw.h	Missed Packet Count - R/clr
12438	E1000_SCC	0x04014	e1000_hw.h	Single Collision Count - R/clr
12439	E1000_ECOL	0x04018	e1000_hw.h	Excessive Collision Count - R/clr
12440	E1000_MCC	0x0401C	e1000_hw.h	Multiple Collision Count - R/clr
12441	E1000_LATECOL	0x04020	e1000_hw.h	Late Collision Count - R/clr
12442	E1000_COLC	0x04028	e1000_hw.h	Collision Count - R/clr
12443	E1000_DC	0x04030	e1000_hw.h	Defer Count - R/clr
12444	E1000_TNCRS	0x04034	e1000_hw.h	TX-No CRS - R/clr
12445	E1000_SEC	0x04038	e1000_hw.h	Sequence Error Count - R/clr
12446	E1000_CEXTERR	0x0403C	e1000_hw.h	Carrier Extension Error Count - R/clr
12447	E1000_RLEC	0x04040	e1000_hw.h	Receive Length Error Count - R/clr
12448	E1000_XONRXC	0x04048	e1000_hw.h	XON RX Count - R/clr
12449	E1000_XONTXC	0x0404C	e1000_hw.h	XON TX Count - R/clr
12450	E1000_XOFFRXC	0x04050	e1000_hw.h	XOFF RX Count - R/clr
12451	E1000_XOFFTXC	0x04054	e1000_hw.h	XOFF TX Count - R/clr
12452	E1000_FCRUC	0x04058	e1000_hw.h	Flow Control RX Unsupported Count- R/clr
12453	E1000_PRC64	0x0405C	e1000_hw.h	Packets RX (64 bytes) - R/clr
12454	E1000_PRC127	0x04060	e1000_hw.h	Packets RX (65-127 bytes) - R/clr
12455	E1000_PRC255	0x04064	e1000_hw.h	Packets RX (128-255 bytes) - R/clr
12456	E1000_PRC511	0x04068	e1000_hw.h	Packets RX (255-511 bytes) - R/clr
12457	E1000_PRC1023	0x0406C	e1000_hw.h	Packets RX (512-1023 bytes) - R/clr
12458	E1000_PRC1522	0x04070	e1000_hw.h	Packets RX (1024-1522 bytes) - R/clr
12459	E1000_GPRC	0x04074	e1000_hw.h	Good Packets RX Count - R/clr
12460	E1000_BPRC	0x04078	e1000_hw.h	Broadcast Packets RX Count - R/clr
12461	E1000_MPRC	0x0407C	e1000_hw.h	Multicast Packets RX Count - R/clr
12462	E1000_GPTC	0x04080	e1000_hw.h	Good Packets TX Count - R/clr
12463	E1000_GORCL	0x04088	e1000_hw.h	Good Octets RX Count Low - R/clr
12464	E1000_GORCH	0x0408C	e1000_hw.h	Good Octets RX Count High - R/clr
12465	E1000_GOTCL	0x04090	e1000_hw.h	Good Octets TX Count Low - R/clr
12466	E1000_GOTCH	0x04094	e1000_hw.h	Good Octets TX Count High - R/clr
12467	E1000_RNBC	0x040A0	e1000_hw.h	RX No Buffers Count - R/clr
12468	E1000_RUC	0x040A4	e1000_hw.h	RX Undersize Count - R/clr
12469	E1000_RFC	0x040A8	e1000_hw.h	RX Fragment Count - R/clr
12470	E1000_ROC	0x040AC	e1000_hw.h	RX Oversize Count - R/clr
12471	E1000_RJC	0x040B0	e1000_hw.h	RX Jabber Count - R/clr
12472	E1000_MGTPRC	0x040B4	e1000_hw.h	Management Packets RX Count - R/clr
12473	E1000_MGTPDC	0x040B8	e1000_hw.h	Management Packets Dropped Count - R/clr
12474	E1000_MGTPTC	0x040BC	e1000_hw.h	Management Packets TX Count - R/clr
12475	E1000_TORL	0x040C0	e1000_hw.h	Total Octets RX Low - R/clr
12476	E1000_TORH	0x040C4	e1000_hw.h	Total Octets RX High - R/clr
12477	E1000_TOTL	0x040C8	e1000_hw.h	Total Octets TX Low - R/clr
12478	E1000_TOTH	0x040CC	e1000_hw.h	Total Octets TX High - R/clr
12479	E1000_TPR	0x040D0	e1000_hw.h	Total Packets RX - R/clr
12480	E1000_TPT	0x040D4	e1000_hw.h	Total Packets TX - R/clr
12481	E1000_PTC64	0x040D8	e1000_hw.h	Packets TX (64 bytes) - R/clr
12482	E1000_PTC127	0x040DC	e1000_hw.h	Packets TX (65-127 bytes) - R/clr
12483	E1000_PTC255	0x040E0	e1000_hw.h	Packets TX (128-255 bytes) - R/clr
12484	E1000_PTC511	0x040E4	e1000_hw.h	Packets TX (256-511 bytes) - R/clr
12485	E1000_PTC1023	0x040E8	e1000_hw.h	Packets TX (512-1023 bytes) - R/clr
12486	E1000_PTC1522	0x040EC	e1000_hw.h	Packets TX (1024-1522 Bytes) - R/clr
12487	E1000_MPTC	0x040F0	e1000_hw.h	Multicast Packets TX Count - R/clr
12488	E1000_BPTC	0x040F4	e1000_hw.h	Broadcast Packets TX Count - R/clr
12489	E1000_TSCTC	0x040F8	e1000_hw.h	TCP Segmentation Context TX - R/clr
12490	E1000_TSCTFC	0x040FC	e1000_hw.h	TCP Segmentation Context TX Fail - R/clr
12491	E1000_IAC	0x04100	e1000_hw.h	Interrupt Assertion Count
12492	E1000_ICRXPTC	0x04104	e1000_hw.h	Interrupt Cause Rx Packet Timer Expire Count
12493	E1000_ICRXATC	0x04108	e1000_hw.h	Interrupt Cause Rx Absolute Timer Expire Count
12494	E1000_ICTXPTC	0x0410C	e1000_hw.h	Interrupt Cause Tx Packet Timer Expire Count
12495	E1000_ICTXATC	0x04110	e1000_hw.h	Interrupt Cause Tx Absolute Timer Expire Count
12496	E1000_ICTXQEC	0x04118	e1000_hw.h	Interrupt Cause Tx Queue Empty Count
12497	E1000_ICTXQMTC	0x0411C	e1000_hw.h	Interrupt Cause Tx Queue Minimum Threshold Count
12498	E1000_ICRXDMTC	0x04120	e1000_hw.h	Interrupt Cause Rx Descriptor Minimum Threshold Count
12499	E1000_ICRXOC	0x04124	e1000_hw.h	Interrupt Cause Receiver Overrun Count
12500	E1000_RXCSUM	0x05000	e1000_hw.h	RX Checksum Control - RW
12501	E1000_RFCTL	0x05008	e1000_hw.h	Receive Filter Control
12502	E1000_MTA	0x05200	e1000_hw.h	Multicast Table Array - RW Array
12503	E1000_RA	0x05400	e1000_hw.h	Receive Address - RW Array
12504	E1000_VFTA	0x05600	e1000_hw.h	VLAN Filter Table Array - RW Array
12505	E1000_WUC	0x05800	e1000_hw.h	Wakeup Control - RW
12506	E1000_WUFC	0x05808	e1000_hw.h	Wakeup Filter Control - RW
12507	E1000_WUS	0x05810	e1000_hw.h	Wakeup Status - RO
12508	E1000_MANC	0x05820	e1000_hw.h	Management Control - RW
12509	E1000_IPAV	0x05838	e1000_hw.h	IP Address Valid - RW
12510	E1000_IP4AT	0x05840	e1000_hw.h	IPv4 Address Table - RW Array
12511	E1000_IP6AT	0x05880	e1000_hw.h	IPv6 Address Table - RW Array
12512	E1000_WUPL	0x05900	e1000_hw.h	Wakeup Packet Length - RW
12513	E1000_WUPM	0x05A00	e1000_hw.h	Wakeup Packet Memory - RO A
12514	E1000_FFLT	0x05F00	e1000_hw.h	Flexible Filter Length Table - RW Array
12515	E1000_HOST_IF	0x08800	e1000_hw.h	Host Interface
12516	E1000_FFMT	0x09000	e1000_hw.h	Flexible Filter Mask Table - RW Array
12517	E1000_FFVT	0x09800	e1000_hw.h	Flexible Filter Value Table - RW Array
12518	E1000_KUMCTRLSTA	0x00034	e1000_hw.h	MAC-PHY interface - RW
12519	E1000_MDPHYA	0x0003C	e1000_hw.h	PHY address - RW
12520	E1000_MANC2H	0x05860	e1000_hw.h	Managment Control To Host - RW
12521	E1000_SW_FW_SYNC	0x05B5C	e1000_hw.h	Software-Firmware Synchronization - RW
12522	E1000_GCR	0x05B00	e1000_hw.h	PCI-Ex Control
12523	E1000_GSCL_1	0x05B10	e1000_hw.h	PCI-Ex Statistic Control #1
12524	E1000_GSCL_2	0x05B14	e1000_hw.h	PCI-Ex Statistic Control #2
12525	E1000_GSCL_3	0x05B18	e1000_hw.h	PCI-Ex Statistic Control #3
12526	E1000_GSCL_4	0x05B1C	e1000_hw.h	PCI-Ex Statistic Control #4
12527	E1000_FACTPS	0x05B30	e1000_hw.h	Function Active and Power State to MNG
12528	E1000_SWSM	0x05B50	e1000_hw.h	SW Semaphore
12529	E1000_FWSM	0x05B54	e1000_hw.h	FW Semaphore
12530	E1000_FFLT_DBG	0x05F04	e1000_hw.h	Debug Register
12531	E1000_HICR	0x08F00	e1000_hw.h	Host Inteface Control
12532	E1000_CPUVEC	0x02C10	e1000_hw.h	CPU Vector Register - RW
12533	E1000_MRQC	0x05818	e1000_hw.h	Multiple Receive Control - RW
12534	E1000_RETA	0x05C00	e1000_hw.h	Redirection Table - RW Array
12535	E1000_RSSRK	0x05C80	e1000_hw.h	RSS Random Key - RW Array
12536	E1000_RSSIM	0x05864	e1000_hw.h	RSS Interrupt Mask
12537	E1000_RSSIR	0x05868	e1000_hw.h	RSS Interrupt Request
12538	E1000_82542_CTRL	E1000_CTRL	e1000_hw.h
12539	E1000_82542_CTRL_DUP	E1000_CTRL_DUP	e1000_hw.h
12540	E1000_82542_STATUS	E1000_STATUS	e1000_hw.h
12541	E1000_82542_EECD	E1000_EECD	e1000_hw.h
12542	E1000_82542_EERD	E1000_EERD	e1000_hw.h
12543	E1000_82542_CTRL_EXT	E1000_CTRL_EXT	e1000_hw.h
12544	E1000_82542_FLA	E1000_FLA	e1000_hw.h
12545	E1000_82542_MDIC	E1000_MDIC	e1000_hw.h
12546	E1000_82542_SCTL	E1000_SCTL	e1000_hw.h
12547	E1000_82542_FEXTNVM	E1000_FEXTNVM	e1000_hw.h
12548	E1000_82542_FCAL	E1000_FCAL	e1000_hw.h
12549	E1000_82542_FCAH	E1000_FCAH	e1000_hw.h
12550	E1000_82542_FCT	E1000_FCT	e1000_hw.h
12551	E1000_82542_VET	E1000_VET	e1000_hw.h
12552	E1000_82542_RA	0x00040	e1000_hw.h
12553	E1000_82542_ICR	E1000_ICR	e1000_hw.h
12554	E1000_82542_ITR	E1000_ITR	e1000_hw.h
12555	E1000_82542_ICS	E1000_ICS	e1000_hw.h
12556	E1000_82542_IMS	E1000_IMS	e1000_hw.h
12557	E1000_82542_IMC	E1000_IMC	e1000_hw.h
12558	E1000_82542_RCTL	E1000_RCTL	e1000_hw.h
12559	E1000_82542_RDTR	0x00108	e1000_hw.h
12560	E1000_82542_RDBAL	0x00110	e1000_hw.h
12561	E1000_82542_RDBAH	0x00114	e1000_hw.h
12562	E1000_82542_RDLEN	0x00118	e1000_hw.h
12563	E1000_82542_RDH	0x00120	e1000_hw.h
12564	E1000_82542_RDT	0x00128	e1000_hw.h
12565	E1000_82542_RDTR0	E1000_82542_RDTR	e1000_hw.h
12566	E1000_82542_RDBAL0	E1000_82542_RDBAL	e1000_hw.h
12567	E1000_82542_RDBAH0	E1000_82542_RDBAH	e1000_hw.h
12568	E1000_82542_RDLEN0	E1000_82542_RDLEN	e1000_hw.h
12569	E1000_82542_RDH0	E1000_82542_RDH	e1000_hw.h
12570	E1000_82542_RDT0	E1000_82542_RDT	e1000_hw.h
12571	E1000_82542_RDBAH3	0x02B04	e1000_hw.h	RX Desc Base High Queue 3 - RW
12572	E1000_82542_RDBAL3	0x02B00	e1000_hw.h	RX Desc Low Queue 3 - RW
12573	E1000_82542_RDLEN3	0x02B08	e1000_hw.h	RX Desc Length Queue 3 - RW
12574	E1000_82542_RDH3	0x02B10	e1000_hw.h	RX Desc Head Queue 3 - RW
12575	E1000_82542_RDT3	0x02B18	e1000_hw.h	RX Desc Tail Queue 3 - RW
12576	E1000_82542_RDBAL2	0x02A00	e1000_hw.h	RX Desc Base Low Queue 2 - RW
12577	E1000_82542_RDBAH2	0x02A04	e1000_hw.h	RX Desc Base High Queue 2 - RW
12578	E1000_82542_RDLEN2	0x02A08	e1000_hw.h	RX Desc Length Queue 2 - RW
12579	E1000_82542_RDH2	0x02A10	e1000_hw.h	RX Desc Head Queue 2 - RW
12580	E1000_82542_RDT2	0x02A18	e1000_hw.h	RX Desc Tail Queue 2 - RW
12581	E1000_82542_RDTR1	0x00130	e1000_hw.h
12582	E1000_82542_RDBAL1	0x00138	e1000_hw.h
12583	E1000_82542_RDBAH1	0x0013C	e1000_hw.h
12584	E1000_82542_RDLEN1	0x00140	e1000_hw.h
12585	E1000_82542_RDH1	0x00148	e1000_hw.h
12586	E1000_82542_RDT1	0x00150	e1000_hw.h
12587	E1000_82542_FCRTH	0x00160	e1000_hw.h
12588	E1000_82542_FCRTL	0x00168	e1000_hw.h
12589	E1000_82542_FCTTV	E1000_FCTTV	e1000_hw.h
12590	E1000_82542_TXCW	E1000_TXCW	e1000_hw.h
12591	E1000_82542_RXCW	E1000_RXCW	e1000_hw.h
12592	E1000_82542_MTA	0x00200	e1000_hw.h
12593	E1000_82542_TCTL	E1000_TCTL	e1000_hw.h
12594	E1000_82542_TCTL_EXT	E1000_TCTL_EXT	e1000_hw.h
12595	E1000_82542_TIPG	E1000_TIPG	e1000_hw.h
12596	E1000_82542_TDBAL	0x00420	e1000_hw.h
12597	E1000_82542_TDBAH	0x00424	e1000_hw.h
12598	E1000_82542_TDLEN	0x00428	e1000_hw.h
12599	E1000_82542_TDH	0x00430	e1000_hw.h
12600	E1000_82542_TDT	0x00438	e1000_hw.h
12601	E1000_82542_TIDV	0x00440	e1000_hw.h
12602	E1000_82542_TBT	E1000_TBT	e1000_hw.h
12603	E1000_82542_AIT	E1000_AIT	e1000_hw.h
12604	E1000_82542_VFTA	0x00600	e1000_hw.h
12605	E1000_82542_LEDCTL	E1000_LEDCTL	e1000_hw.h
12606	E1000_82542_PBA	E1000_PBA	e1000_hw.h
12607	E1000_82542_PBS	E1000_PBS	e1000_hw.h
12608	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
12609	E1000_82542_EEARBC	E1000_EEARBC	e1000_hw.h
12610	E1000_82542_FLASHT	E1000_FLASHT	e1000_hw.h
12611	E1000_82542_EEWR	E1000_EEWR	e1000_hw.h
12612	E1000_82542_FLSWCTL	E1000_FLSWCTL	e1000_hw.h
12613	E1000_82542_FLSWDATA	E1000_FLSWDATA	e1000_hw.h
12614	E1000_82542_FLSWCNT	E1000_FLSWCNT	e1000_hw.h
12615	E1000_82542_FLOP	E1000_FLOP	e1000_hw.h
12616	E1000_82542_EXTCNF_CTRL	E1000_EXTCNF_CTRL	e1000_hw.h
12617	E1000_82542_EXTCNF_SIZE	E1000_EXTCNF_SIZE	e1000_hw.h
12618	E1000_82542_PHY_CTRL	E1000_PHY_CTRL	e1000_hw.h
12619	E1000_82542_ERT	E1000_ERT	e1000_hw.h
12620	E1000_82542_RXDCTL	E1000_RXDCTL	e1000_hw.h
12621	E1000_82542_RXDCTL1	E1000_RXDCTL1	e1000_hw.h
12622	E1000_82542_RADV	E1000_RADV	e1000_hw.h
12623	E1000_82542_RSRPD	E1000_RSRPD	e1000_hw.h
12624	E1000_82542_TXDMAC	E1000_TXDMAC	e1000_hw.h
12625	E1000_82542_KABGTXD	E1000_KABGTXD	e1000_hw.h
12626	E1000_82542_TDFHS	E1000_TDFHS	e1000_hw.h
12627	E1000_82542_TDFTS	E1000_TDFTS	e1000_hw.h
12628	E1000_82542_TDFPC	E1000_TDFPC	e1000_hw.h
12629	E1000_82542_TXDCTL	E1000_TXDCTL	e1000_hw.h
12630	E1000_82542_TADV	E1000_TADV	e1000_hw.h
12631	E1000_82542_TSPMT	E1000_TSPMT	e1000_hw.h
12632	E1000_82542_CRCERRS	E1000_CRCERRS	e1000_hw.h
12633	E1000_82542_ALGNERRC	E1000_ALGNERRC	e1000_hw.h
12634	E1000_82542_SYMERRS	E1000_SYMERRS	e1000_hw.h
12635	E1000_82542_RXERRC	E1000_RXERRC	e1000_hw.h
12636	E1000_82542_MPC	E1000_MPC	e1000_hw.h
12637	E1000_82542_SCC	E1000_SCC	e1000_hw.h
12638	E1000_82542_ECOL	E1000_ECOL	e1000_hw.h
12639	E1000_82542_MCC	E1000_MCC	e1000_hw.h
12640	E1000_82542_LATECOL	E1000_LATECOL	e1000_hw.h
12641	E1000_82542_COLC	E1000_COLC	e1000_hw.h
12642	E1000_82542_DC	E1000_DC	e1000_hw.h
12643	E1000_82542_TNCRS	E1000_TNCRS	e1000_hw.h
12644	E1000_82542_SEC	E1000_SEC	e1000_hw.h
12645	E1000_82542_CEXTERR	E1000_CEXTERR	e1000_hw.h
12646	E1000_82542_RLEC	E1000_RLEC	e1000_hw.h
12647	E1000_82542_XONRXC	E1000_XONRXC	e1000_hw.h
12648	E1000_82542_XONTXC	E1000_XONTXC	e1000_hw.h
12649	E1000_82542_XOFFRXC	E1000_XOFFRXC	e1000_hw.h
12650	E1000_82542_XOFFTXC	E1000_XOFFTXC	e1000_hw.h
12651	E1000_82542_FCRUC	E1000_FCRUC	e1000_hw.h
12652	E1000_82542_PRC64	E1000_PRC64	e1000_hw.h
12653	E1000_82542_PRC127	E1000_PRC127	e1000_hw.h
12654	E1000_82542_PRC255	E1000_PRC255	e1000_hw.h
12655	E1000_82542_PRC511	E1000_PRC511	e1000_hw.h
12656	E1000_82542_PRC1023	E1000_PRC1023	e1000_hw.h
12657	E1000_82542_PRC1522	E1000_PRC1522	e1000_hw.h
12658	E1000_82542_GPRC	E1000_GPRC	e1000_hw.h
12659	E1000_82542_BPRC	E1000_BPRC	e1000_hw.h
12660	E1000_82542_MPRC	E1000_MPRC	e1000_hw.h
12661	E1000_82542_GPTC	E1000_GPTC	e1000_hw.h
12662	E1000_82542_GORCL	E1000_GORCL	e1000_hw.h
12663	E1000_82542_GORCH	E1000_GORCH	e1000_hw.h
12664	E1000_82542_GOTCL	E1000_GOTCL	e1000_hw.h
12665	E1000_82542_GOTCH	E1000_GOTCH	e1000_hw.h
12666	E1000_82542_RNBC	E1000_RNBC	e1000_hw.h
12667	E1000_82542_RUC	E1000_RUC	e1000_hw.h
12668	E1000_82542_RFC	E1000_RFC	e1000_hw.h
12669	E1000_82542_ROC	E1000_ROC	e1000_hw.h
12670	E1000_82542_RJC	E1000_RJC	e1000_hw.h
12671	E1000_82542_MGTPRC	E1000_MGTPRC	e1000_hw.h
12672	E1000_82542_MGTPDC	E1000_MGTPDC	e1000_hw.h
12673	E1000_82542_MGTPTC	E1000_MGTPTC	e1000_hw.h
12674	E1000_82542_TORL	E1000_TORL	e1000_hw.h
12675	E1000_82542_TORH	E1000_TORH	e1000_hw.h
12676	E1000_82542_TOTL	E1000_TOTL	e1000_hw.h
12677	E1000_82542_TOTH	E1000_TOTH	e1000_hw.h
12678	E1000_82542_TPR	E1000_TPR	e1000_hw.h
12679	E1000_82542_TPT	E1000_TPT	e1000_hw.h
12680	E1000_82542_PTC64	E1000_PTC64	e1000_hw.h
12681	E1000_82542_PTC127	E1000_PTC127	e1000_hw.h
12682	E1000_82542_PTC255	E1000_PTC255	e1000_hw.h
12683	E1000_82542_PTC511	E1000_PTC511	e1000_hw.h
12684	E1000_82542_PTC1023	E1000_PTC1023	e1000_hw.h
12685	E1000_82542_PTC1522	E1000_PTC1522	e1000_hw.h
12686	E1000_82542_MPTC	E1000_MPTC	e1000_hw.h
12687	E1000_82542_BPTC	E1000_BPTC	e1000_hw.h
12688	E1000_82542_TSCTC	E1000_TSCTC	e1000_hw.h
12689	E1000_82542_TSCTFC	E1000_TSCTFC	e1000_hw.h
12690	E1000_82542_RXCSUM	E1000_RXCSUM	e1000_hw.h
12691	E1000_82542_WUC	E1000_WUC	e1000_hw.h
12692	E1000_82542_WUFC	E1000_WUFC	e1000_hw.h
12693	E1000_82542_WUS	E1000_WUS	e1000_hw.h
12694	E1000_82542_MANC	E1000_MANC	e1000_hw.h
12695	E1000_82542_IPAV	E1000_IPAV	e1000_hw.h
12696	E1000_82542_IP4AT	E1000_IP4AT	e1000_hw.h
12697	E1000_82542_IP6AT	E1000_IP6AT	e1000_hw.h
12698	E1000_82542_WUPL	E1000_WUPL	e1000_hw.h
12699	E1000_82542_WUPM	E1000_WUPM	e1000_hw.h
12700	E1000_82542_FFLT	E1000_FFLT	e1000_hw.h
12701	E1000_82542_TDFH	0x08010	e1000_hw.h
12702	E1000_82542_TDFT	0x08018	e1000_hw.h
12703	E1000_82542_FFMT	E1000_FFMT	e1000_hw.h
12704	E1000_82542_FFVT	E1000_FFVT	e1000_hw.h
12705	E1000_82542_HOST_IF	E1000_HOST_IF	e1000_hw.h
12706	E1000_82542_IAM	E1000_IAM	e1000_hw.h
12707	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
12708	E1000_82542_PSRCTL	E1000_PSRCTL	e1000_hw.h
12709	E1000_82542_RAID	E1000_RAID	e1000_hw.h
12710	E1000_82542_TARC0	E1000_TARC0	e1000_hw.h
12711	E1000_82542_TDBAL1	E1000_TDBAL1	e1000_hw.h
12712	E1000_82542_TDBAH1	E1000_TDBAH1	e1000_hw.h
12713	E1000_82542_TDLEN1	E1000_TDLEN1	e1000_hw.h
12714	E1000_82542_TDH1	E1000_TDH1	e1000_hw.h
12715	E1000_82542_TDT1	E1000_TDT1	e1000_hw.h
12716	E1000_82542_TXDCTL1	E1000_TXDCTL1	e1000_hw.h
12717	E1000_82542_TARC1	E1000_TARC1	e1000_hw.h
12718	E1000_82542_RFCTL	E1000_RFCTL	e1000_hw.h
12719	E1000_82542_GCR	E1000_GCR	e1000_hw.h
12720	E1000_82542_GSCL_1	E1000_GSCL_1	e1000_hw.h
12721	E1000_82542_GSCL_2	E1000_GSCL_2	e1000_hw.h
12722	E1000_82542_GSCL_3	E1000_GSCL_3	e1000_hw.h
12723	E1000_82542_GSCL_4	E1000_GSCL_4	e1000_hw.h
12724	E1000_82542_FACTPS	E1000_FACTPS	e1000_hw.h
12725	E1000_82542_SWSM	E1000_SWSM	e1000_hw.h
12726	E1000_82542_FWSM	E1000_FWSM	e1000_hw.h
12727	E1000_82542_FFLT_DBG	E1000_FFLT_DBG	e1000_hw.h
12728	E1000_82542_IAC	E1000_IAC	e1000_hw.h
12729	E1000_82542_ICRXPTC	E1000_ICRXPTC	e1000_hw.h
12730	E1000_82542_ICRXATC	E1000_ICRXATC	e1000_hw.h
12731	E1000_82542_ICTXPTC	E1000_ICTXPTC	e1000_hw.h
12732	E1000_82542_ICTXATC	E1000_ICTXATC	e1000_hw.h
12733	E1000_82542_ICTXQEC	E1000_ICTXQEC	e1000_hw.h
12734	E1000_82542_ICTXQMTC	E1000_ICTXQMTC	e1000_hw.h
12735	E1000_82542_ICRXDMTC	E1000_ICRXDMTC	e1000_hw.h
12736	E1000_82542_ICRXOC	E1000_ICRXOC	e1000_hw.h
12737	E1000_82542_HICR	E1000_HICR	e1000_hw.h
12738	E1000_82542_CPUVEC	E1000_CPUVEC	e1000_hw.h
12739	E1000_82542_MRQC	E1000_MRQC	e1000_hw.h
12740	E1000_82542_RETA	E1000_RETA	e1000_hw.h
12741	E1000_82542_RSSRK	E1000_RSSRK	e1000_hw.h
12742	E1000_82542_RSSIM	E1000_RSSIM	e1000_hw.h
12743	E1000_82542_RSSIR	E1000_RSSIR	e1000_hw.h
12744	E1000_82542_KUMCTRLSTA	E1000_KUMCTRLSTA	e1000_hw.h
12745	E1000_82542_SW_FW_SYNC	E1000_SW_FW_SYNC	e1000_hw.h
12746	E1000_82542_MANC2H	E1000_MANC2H	e1000_hw.h
12747	E1000_EEPROM_SWDPIN0	0x0001	e1000_hw.h	SWDPIN 0 EEPROM Value
12748	E1000_EEPROM_LED_LOGIC	0x0020	e1000_hw.h	Led Logic Word
12749	E1000_EEPROM_RW_REG_DATA	16	e1000_hw.h	Offset to data in EEPROM read/write registers
12750	E1000_EEPROM_RW_REG_DONE	2	e1000_hw.h	Offset to READ/WRITE done bit
12751	E1000_EEPROM_RW_REG_START	1	e1000_hw.h	First bit for telling part to start operation
12752	E1000_EEPROM_RW_ADDR_SHIFT	2	e1000_hw.h	Shift to the address bits
12753	E1000_EEPROM_POLL_WRITE	1	e1000_hw.h	Flag for polling for write complete
12754	E1000_EEPROM_POLL_READ	0	e1000_hw.h	Flag for polling for read complete
12755	E1000_CTRL_FD	0x00000001	e1000_hw.h	Full duplex.0=half; 1=full
12756	E1000_CTRL_BEM	0x00000002	e1000_hw.h	Endian Mode.0=little,1=big
12757	E1000_CTRL_PRIOR	0x00000004	e1000_hw.h	Priority on PCI. 0=rx,1=fair
12758	E1000_CTRL_GIO_MASTER_DISABLE	0x00000004	e1000_hw.h	Blocks new Master requests
12759	E1000_CTRL_LRST	0x00000008	e1000_hw.h	Link reset. 0=normal,1=reset
12760	E1000_CTRL_TME	0x00000010	e1000_hw.h	Test mode. 0=normal,1=test
12761	E1000_CTRL_SLE	0x00000020	e1000_hw.h	Serial Link on 0=dis,1=en
12762	E1000_CTRL_ASDE	0x00000020	e1000_hw.h	Auto-speed detect enable
12763	E1000_CTRL_SLU	0x00000040	e1000_hw.h	Set link up (Force Link)
12764	E1000_CTRL_ILOS	0x00000080	e1000_hw.h	Invert Loss-Of Signal
12765	E1000_CTRL_SPD_SEL	0x00000300	e1000_hw.h	Speed Select Mask
12766	E1000_CTRL_SPD_10	0x00000000	e1000_hw.h	Force 10Mb
12767	E1000_CTRL_SPD_100	0x00000100	e1000_hw.h	Force 100Mb
12768	E1000_CTRL_SPD_1000	0x00000200	e1000_hw.h	Force 1Gb
12769	E1000_CTRL_BEM32	0x00000400	e1000_hw.h	Big Endian 32 mode
12770	E1000_CTRL_FRCSPD	0x00000800	e1000_hw.h	Force Speed
12771	E1000_CTRL_FRCDPX	0x00001000	e1000_hw.h	Force Duplex
12772	E1000_CTRL_D_UD_EN	0x00002000	e1000_hw.h	Dock/Undock enable
12773	E1000_CTRL_D_UD_POLARITY	0x00004000	e1000_hw.h	Defined polarity of Dock/Undock indication in SDP[0]
12774	E1000_CTRL_FORCE_PHY_RESET	0x00008000	e1000_hw.h	Reset both PHY ports, through PHYRST_N pin
12775	E1000_CTRL_EXT_LINK_EN	0x00010000	e1000_hw.h	enable link status from external LINK_0 and LINK_1 pins
12776	E1000_CTRL_SWDPIN0	0x00040000	e1000_hw.h	SWDPIN 0 value
12777	E1000_CTRL_SWDPIN1	0x00080000	e1000_hw.h	SWDPIN 1 value
12778	E1000_CTRL_SWDPIN2	0x00100000	e1000_hw.h	SWDPIN 2 value
12779	E1000_CTRL_SWDPIN3	0x00200000	e1000_hw.h	SWDPIN 3 value
12780	E1000_CTRL_SWDPIO0	0x00400000	e1000_hw.h	SWDPIN 0 Input or output
12781	E1000_CTRL_SWDPIO1	0x00800000	e1000_hw.h	SWDPIN 1 input or output
12782	E1000_CTRL_SWDPIO2	0x01000000	e1000_hw.h	SWDPIN 2 input or output
12783	E1000_CTRL_SWDPIO3	0x02000000	e1000_hw.h	SWDPIN 3 input or output
12784	E1000_CTRL_RST	0x04000000	e1000_hw.h	Global reset
12785	E1000_CTRL_RFCE	0x08000000	e1000_hw.h	Receive Flow Control enable
12786	E1000_CTRL_TFCE	0x10000000	e1000_hw.h	Transmit flow control enable
12787	E1000_CTRL_RTE	0x20000000	e1000_hw.h	Routing tag enable
12788	E1000_CTRL_VME	0x40000000	e1000_hw.h	IEEE VLAN mode enable
12789	E1000_CTRL_PHY_RST	0x80000000	e1000_hw.h	PHY Reset
12790	E1000_CTRL_SW2FW_INT	0x02000000	e1000_hw.h	Initiate an interrupt to manageability engine
12791	E1000_STATUS_FD	0x00000001	e1000_hw.h	Full duplex.0=half,1=full
12792	E1000_STATUS_LU	0x00000002	e1000_hw.h	Link up.0=no,1=link
12793	E1000_STATUS_FUNC_MASK	0x0000000C	e1000_hw.h	PCI Function Mask
12794	E1000_STATUS_FUNC_SHIFT	2	e1000_hw.h
12795	E1000_STATUS_FUNC_0	0x00000000	e1000_hw.h	Function 0
12796	E1000_STATUS_FUNC_1	0x00000004	e1000_hw.h	Function 1
12797	E1000_STATUS_TXOFF	0x00000010	e1000_hw.h	transmission paused
12798	E1000_STATUS_TBIMODE	0x00000020	e1000_hw.h	TBI mode
12799	E1000_STATUS_SPEED_MASK	0x000000C0	e1000_hw.h
12800	E1000_STATUS_SPEED_10	0x00000000	e1000_hw.h	Speed 10Mb/s
12801	E1000_STATUS_SPEED_100	0x00000040	e1000_hw.h	Speed 100Mb/s
12802	E1000_STATUS_SPEED_1000	0x00000080	e1000_hw.h	Speed 1000Mb/s
12803	E1000_STATUS_LAN_INIT_DONE	0x00000200	e1000_hw.h	Lan Init Completion
12804	E1000_STATUS_ASDV	0x00000300	e1000_hw.h	Auto speed detect value
12805	E1000_STATUS_DOCK_CI	0x00000800	e1000_hw.h	Change in Dock/Undock state. Clear on write '0'.
12806	E1000_STATUS_GIO_MASTER_ENABLE	0x00080000	e1000_hw.h	Status of Master requests.
12807	E1000_STATUS_MTXCKOK	0x00000400	e1000_hw.h	MTX clock running OK
12808	E1000_STATUS_PCI66	0x00000800	e1000_hw.h	In 66Mhz slot
12809	E1000_STATUS_BUS64	0x00001000	e1000_hw.h	In 64 bit slot
12810	E1000_STATUS_PCIX_MODE	0x00002000	e1000_hw.h	PCI-X mode
12811	E1000_STATUS_PCIX_SPEED	0x0000C000	e1000_hw.h	PCI-X bus speed
12812	E1000_STATUS_BMC_SKU_0	0x00100000	e1000_hw.h	BMC USB redirect disabled
12813	E1000_STATUS_BMC_SKU_1	0x00200000	e1000_hw.h	BMC SRAM disabled
12814	E1000_STATUS_BMC_SKU_2	0x00400000	e1000_hw.h	BMC SDRAM disabled
12815	E1000_STATUS_BMC_CRYPTO	0x00800000	e1000_hw.h	BMC crypto disabled
12816	E1000_STATUS_BMC_LITE	0x01000000	e1000_hw.h	BMC external code execution disabled
12817	E1000_STATUS_RGMII_ENABLE	0x02000000	e1000_hw.h	RGMII disabled
12818	E1000_STATUS_FUSE_8	0x04000000	e1000_hw.h
12819	E1000_STATUS_FUSE_9	0x08000000	e1000_hw.h
12820	E1000_STATUS_SERDES0_DIS	0x10000000	e1000_hw.h	SERDES disabled on port 0
12821	E1000_STATUS_SERDES1_DIS	0x20000000	e1000_hw.h	SERDES disabled on port 1
12822	E1000_STATUS_PCIX_SPEED_66	0x00000000	e1000_hw.h	PCI-X bus speed 50-66 MHz
12823	E1000_STATUS_PCIX_SPEED_100	0x00004000	e1000_hw.h	PCI-X bus speed 66-100 MHz
12824	E1000_STATUS_PCIX_SPEED_133	0x00008000	e1000_hw.h	PCI-X bus speed 100-133 MHz
12825	E1000_EECD_SK	0x00000001	e1000_hw.h	EEPROM Clock
12826	E1000_EECD_CS	0x00000002	e1000_hw.h	EEPROM Chip Select
12827	E1000_EECD_DI	0x00000004	e1000_hw.h	EEPROM Data In
12828	E1000_EECD_DO	0x00000008	e1000_hw.h	EEPROM Data Out
12829	E1000_EECD_FWE_MASK	0x00000030	e1000_hw.h
12830	E1000_EECD_FWE_DIS	0x00000010	e1000_hw.h	Disable FLASH writes
12831	E1000_EECD_FWE_EN	0x00000020	e1000_hw.h	Enable FLASH writes
12832	E1000_EECD_FWE_SHIFT	4	e1000_hw.h
12833	E1000_EECD_REQ	0x00000040	e1000_hw.h	EEPROM Access Request
12834	E1000_EECD_GNT	0x00000080	e1000_hw.h	EEPROM Access Grant
12835	E1000_EECD_PRES	0x00000100	e1000_hw.h	EEPROM Present
12836	E1000_EECD_SIZE	0x00000200	e1000_hw.h	EEPROM Size (0=64 word 1=256 word)
12837	E1000_EECD_ADDR_BITS	0x00000400	e1000_hw.h	EEPROM Addressing bits based on type
12838	E1000_EECD_TYPE	0x00002000	e1000_hw.h	EEPROM Type (1-SPI, 0-Microwire)
12839	E1000_EEPROM_GRANT_ATTEMPTS	1000	e1000_hw.h	EEPROM # attempts to gain grant
12840	E1000_EECD_AUTO_RD	0x00000200	e1000_hw.h	EEPROM Auto Read done
12841	E1000_EECD_SIZE_EX_MASK	0x00007800	e1000_hw.h	EEprom Size
12842	E1000_EECD_SIZE_EX_SHIFT	11	e1000_hw.h
12843	E1000_EECD_NVADDS	0x00018000	e1000_hw.h	NVM Address Size
12844	E1000_EECD_SELSHAD	0x00020000	e1000_hw.h	Select Shadow RAM
12845	E1000_EECD_INITSRAM	0x00040000	e1000_hw.h	Initialize Shadow RAM
12846	E1000_EECD_FLUPD	0x00080000	e1000_hw.h	Update FLASH
12847	E1000_EECD_AUPDEN	0x00100000	e1000_hw.h	Enable Autonomous FLASH update
12848	E1000_EECD_SHADV	0x00200000	e1000_hw.h	Shadow RAM Data Valid
12849	E1000_EECD_SEC1VAL	0x00400000	e1000_hw.h	Sector One Valid
12850	E1000_EECD_SECVAL_SHIFT	22	e1000_hw.h
12851	E1000_STM_OPCODE	0xDB00	e1000_hw.h
12852	E1000_HICR_FW_RESET	0xC0	e1000_hw.h
12853	E1000_SHADOW_RAM_WORDS	2048	e1000_hw.h
12854	E1000_ICH_NVM_SIG_WORD	0x13	e1000_hw.h
12855	E1000_ICH_NVM_SIG_MASK	0xC0	e1000_hw.h
12856	E1000_EERD_START	0x00000001	e1000_hw.h	Start Read
12857	E1000_EERD_DONE	0x00000010	e1000_hw.h	Read Done
12858	E1000_EERD_ADDR_SHIFT	8	e1000_hw.h
12859	E1000_EERD_ADDR_MASK	0x0000FF00	e1000_hw.h	Read Address
12860	E1000_EERD_DATA_SHIFT	16	e1000_hw.h
12861	E1000_EERD_DATA_MASK	0xFFFF0000	e1000_hw.h	Read Data
12862	EEPROM_STATUS_RDY_SPI	0x01	e1000_hw.h
12863	EEPROM_STATUS_WEN_SPI	0x02	e1000_hw.h
12864	EEPROM_STATUS_BP0_SPI	0x04	e1000_hw.h
12865	EEPROM_STATUS_BP1_SPI	0x08	e1000_hw.h
12866	EEPROM_STATUS_WPEN_SPI	0x80	e1000_hw.h
12867	E1000_CTRL_EXT_GPI0_EN	0x00000001	e1000_hw.h	Maps SDP4 to GPI0
12868	E1000_CTRL_EXT_GPI1_EN	0x00000002	e1000_hw.h	Maps SDP5 to GPI1
12869	E1000_CTRL_EXT_PHYINT_EN	E1000_CTRL_EXT_GPI1_EN	e1000_hw.h
12870	E1000_CTRL_EXT_GPI2_EN	0x00000004	e1000_hw.h	Maps SDP6 to GPI2
12871	E1000_CTRL_EXT_GPI3_EN	0x00000008	e1000_hw.h	Maps SDP7 to GPI3
12872	E1000_CTRL_EXT_SDP4_DATA	0x00000010	e1000_hw.h	Value of SW Defineable Pin 4
12873	E1000_CTRL_EXT_SDP5_DATA	0x00000020	e1000_hw.h	Value of SW Defineable Pin 5
12874	E1000_CTRL_EXT_PHY_INT	E1000_CTRL_EXT_SDP5_DATA	e1000_hw.h
12875	E1000_CTRL_EXT_SDP6_DATA	0x00000040	e1000_hw.h	Value of SW Defineable Pin 6
12876	E1000_CTRL_EXT_SDP7_DATA	0x00000080	e1000_hw.h	Value of SW Defineable Pin 7
12877	E1000_CTRL_EXT_SDP4_DIR	0x00000100	e1000_hw.h	Direction of SDP4 0=in 1=out
12878	E1000_CTRL_EXT_SDP5_DIR	0x00000200	e1000_hw.h	Direction of SDP5 0=in 1=out
12879	E1000_CTRL_EXT_SDP6_DIR	0x00000400	e1000_hw.h	Direction of SDP6 0=in 1=out
12880	E1000_CTRL_EXT_SDP7_DIR	0x00000800	e1000_hw.h	Direction of SDP7 0=in 1=out
12881	E1000_CTRL_EXT_ASDCHK	0x00001000	e1000_hw.h	Initiate an ASD sequence
12882	E1000_CTRL_EXT_EE_RST	0x00002000	e1000_hw.h	Reinitialize from EEPROM
12883	E1000_CTRL_EXT_IPS	0x00004000	e1000_hw.h	Invert Power State
12884	E1000_CTRL_EXT_SPD_BYPS	0x00008000	e1000_hw.h	Speed Select Bypass
12885	E1000_CTRL_EXT_RO_DIS	0x00020000	e1000_hw.h	Relaxed Ordering disable
12886	E1000_CTRL_EXT_LINK_MODE_MASK	0x00C00000	e1000_hw.h
12887	E1000_CTRL_EXT_LINK_MODE_GMII	0x00000000	e1000_hw.h
12888	E1000_CTRL_EXT_LINK_MODE_TBI	0x00C00000	e1000_hw.h
12889	E1000_CTRL_EXT_LINK_MODE_KMRN	0x00000000	e1000_hw.h
12890	E1000_CTRL_EXT_LINK_MODE_SERDES	0x00C00000	e1000_hw.h
12891	E1000_CTRL_EXT_LINK_MODE_SGMII	0x00800000	e1000_hw.h
12892	E1000_CTRL_EXT_WR_WMARK_MASK	0x03000000	e1000_hw.h
12893	E1000_CTRL_EXT_WR_WMARK_256	0x00000000	e1000_hw.h
12894	E1000_CTRL_EXT_WR_WMARK_320	0x01000000	e1000_hw.h
12895	E1000_CTRL_EXT_WR_WMARK_384	0x02000000	e1000_hw.h
12896	E1000_CTRL_EXT_WR_WMARK_448	0x03000000	e1000_hw.h
12897	E1000_CTRL_EXT_DRV_LOAD	0x10000000	e1000_hw.h	Driver loaded bit for FW
12898	E1000_CTRL_EXT_IAME	0x08000000	e1000_hw.h	Interrupt acknowledge Auto-mask
12899	E1000_CTRL_EXT_INT_TIMER_CLR	0x20000000	e1000_hw.h	Clear Interrupt timers after IMS clear
12900	E1000_CRTL_EXT_PB_PAREN	0x01000000	e1000_hw.h	packet buffer parity error detection enabled
12901	E1000_CTRL_EXT_DF_PAREN	0x02000000	e1000_hw.h	descriptor FIFO parity error detection enable
12902	E1000_CTRL_EXT_GHOST_PAREN	0x40000000	e1000_hw.h
12903	E1000_MDIC_DATA_MASK	0x0000FFFF	e1000_hw.h
12904	E1000_MDIC_REG_MASK	0x001F0000	e1000_hw.h
12905	E1000_MDIC_REG_SHIFT	16	e1000_hw.h
12906	E1000_MDIC_PHY_MASK	0x03E00000	e1000_hw.h
12907	E1000_MDIC_PHY_SHIFT	21	e1000_hw.h
12908	E1000_MDIC_OP_WRITE	0x04000000	e1000_hw.h
12909	E1000_MDIC_OP_READ	0x08000000	e1000_hw.h
12910	E1000_MDIC_READY	0x10000000	e1000_hw.h
12911	E1000_MDIC_INT_EN	0x20000000	e1000_hw.h
12912	E1000_MDIC_ERROR	0x40000000	e1000_hw.h
12913	E1000_KUMCTRLSTA_MASK	0x0000FFFF	e1000_hw.h
12914	E1000_KUMCTRLSTA_OFFSET	0x001F0000	e1000_hw.h
12915	E1000_KUMCTRLSTA_OFFSET_SHIFT	16	e1000_hw.h
12916	E1000_KUMCTRLSTA_REN	0x00200000	e1000_hw.h
12917	E1000_KUMCTRLSTA_OFFSET_FIFO_CT	0x00000000	e1000_hw.h
12918	E1000_KUMCTRLSTA_OFFSET_CTRL	0x00000001	e1000_hw.h
12919	E1000_KUMCTRLSTA_OFFSET_INB_CTR	0x00000002	e1000_hw.h
12920	E1000_KUMCTRLSTA_OFFSET_DIAG	0x00000003	e1000_hw.h
12921	E1000_KUMCTRLSTA_OFFSET_TIMEOUT	0x00000004	e1000_hw.h
12922	E1000_KUMCTRLSTA_OFFSET_INB_PAR	0x00000009	e1000_hw.h
12923	E1000_KUMCTRLSTA_OFFSET_HD_CTRL	0x00000010	e1000_hw.h
12924	E1000_KUMCTRLSTA_OFFSET_M2P_SER	0x0000001E	e1000_hw.h
12925	E1000_KUMCTRLSTA_OFFSET_M2P_MOD	0x0000001F	e1000_hw.h
12926	E1000_KUMCTRLSTA_FIFO_CTRL_RX_B	0x00000008	e1000_hw.h
12927	E1000_KUMCTRLSTA_FIFO_CTRL_TX_B	0x00000800	e1000_hw.h
12928	E1000_KUMCTRLSTA_INB_CTRL_LINK_	0x00000500	e1000_hw.h
12929	E1000_KUMCTRLSTA_INB_CTRL_DIS_P	0x00000010	e1000_hw.h
12930	E1000_KUMCTRLSTA_HD_CTRL_10_100	0x00000004	e1000_hw.h
12931	E1000_KUMCTRLSTA_HD_CTRL_1000_D	0x00000000	e1000_hw.h
12932	E1000_KUMCTRLSTA_OFFSET_K0S_CTR	0x0000001E	e1000_hw.h
12933	E1000_KUMCTRLSTA_DIAG_FELPBK	0x2000	e1000_hw.h
12934	E1000_KUMCTRLSTA_DIAG_NELPBK	0x1000	e1000_hw.h
12935	E1000_KUMCTRLSTA_K0S_100_EN	0x2000	e1000_hw.h
12936	E1000_KUMCTRLSTA_K0S_GBE_EN	0x1000	e1000_hw.h
12937	E1000_KUMCTRLSTA_K0S_ENTRY_LATE	0x0003	e1000_hw.h
12938	E1000_KABGTXD_BGSQLBIAS	0x00050000	e1000_hw.h
12939	E1000_PHY_CTRL_SPD_EN	0x00000001	e1000_hw.h
12940	E1000_PHY_CTRL_D0A_LPLU	0x00000002	e1000_hw.h
12941	E1000_PHY_CTRL_NOND0A_LPLU	0x00000004	e1000_hw.h
12942	E1000_PHY_CTRL_NOND0A_GBE_DISAB	0x00000008	e1000_hw.h
12943	E1000_PHY_CTRL_GBE_DISABLE	0x00000040	e1000_hw.h
12944	E1000_PHY_CTRL_B2B_EN	0x00000080	e1000_hw.h
12945	E1000_LEDCTL_LED0_MODE_MASK	0x0000000F	e1000_hw.h
12946	E1000_LEDCTL_LED0_MODE_SHIFT	0	e1000_hw.h
12947	E1000_LEDCTL_LED0_BLINK_RATE	0x0000020	e1000_hw.h
12948	E1000_LEDCTL_LED0_IVRT	0x00000040	e1000_hw.h
12949	E1000_LEDCTL_LED0_BLINK	0x00000080	e1000_hw.h
12950	E1000_LEDCTL_LED1_MODE_MASK	0x00000F00	e1000_hw.h
12951	E1000_LEDCTL_LED1_MODE_SHIFT	8	e1000_hw.h
12952	E1000_LEDCTL_LED1_BLINK_RATE	0x0002000	e1000_hw.h
12953	E1000_LEDCTL_LED1_IVRT	0x00004000	e1000_hw.h
12954	E1000_LEDCTL_LED1_BLINK	0x00008000	e1000_hw.h
12955	E1000_LEDCTL_LED2_MODE_MASK	0x000F0000	e1000_hw.h
12956	E1000_LEDCTL_LED2_MODE_SHIFT	16	e1000_hw.h
12957	E1000_LEDCTL_LED2_BLINK_RATE	0x00200000	e1000_hw.h
12958	E1000_LEDCTL_LED2_IVRT	0x00400000	e1000_hw.h
12959	E1000_LEDCTL_LED2_BLINK	0x00800000	e1000_hw.h
12960	E1000_LEDCTL_LED3_MODE_MASK	0x0F000000	e1000_hw.h
12961	E1000_LEDCTL_LED3_MODE_SHIFT	24	e1000_hw.h
12962	E1000_LEDCTL_LED3_BLINK_RATE	0x20000000	e1000_hw.h
12963	E1000_LEDCTL_LED3_IVRT	0x40000000	e1000_hw.h
12964	E1000_LEDCTL_LED3_BLINK	0x80000000	e1000_hw.h
12965	E1000_LEDCTL_MODE_LINK_10_1000	0x0	e1000_hw.h
12966	E1000_LEDCTL_MODE_LINK_100_1000	0x1	e1000_hw.h
12967	E1000_LEDCTL_MODE_LINK_UP	0x2	e1000_hw.h
12968	E1000_LEDCTL_MODE_ACTIVITY	0x3	e1000_hw.h
12969	E1000_LEDCTL_MODE_LINK_ACTIVITY	0x4	e1000_hw.h
12970	E1000_LEDCTL_MODE_LINK_10	0x5	e1000_hw.h
12971	E1000_LEDCTL_MODE_LINK_100	0x6	e1000_hw.h
12972	E1000_LEDCTL_MODE_LINK_1000	0x7	e1000_hw.h
12973	E1000_LEDCTL_MODE_PCIX_MODE	0x8	e1000_hw.h
12974	E1000_LEDCTL_MODE_FULL_DUPLEX	0x9	e1000_hw.h
12975	E1000_LEDCTL_MODE_COLLISION	0xA	e1000_hw.h
12976	E1000_LEDCTL_MODE_BUS_SPEED	0xB	e1000_hw.h
12977	E1000_LEDCTL_MODE_BUS_SIZE	0xC	e1000_hw.h
12978	E1000_LEDCTL_MODE_PAUSED	0xD	e1000_hw.h
12979	E1000_LEDCTL_MODE_LED_ON	0xE	e1000_hw.h
12980	E1000_LEDCTL_MODE_LED_OFF	0xF	e1000_hw.h
12981	E1000_RAH_AV	0x80000000	e1000_hw.h	Receive descriptor valid
12982	E1000_ICR_TXDW	0x00000001	e1000_hw.h	Transmit desc written back
12983	E1000_ICR_TXQE	0x00000002	e1000_hw.h	Transmit Queue empty
12984	E1000_ICR_LSC	0x00000004	e1000_hw.h	Link Status Change
12985	E1000_ICR_RXSEQ	0x00000008	e1000_hw.h	rx sequence error
12986	E1000_ICR_RXDMT0	0x00000010	e1000_hw.h	rx desc min. threshold (0)
12987	E1000_ICR_RXO	0x00000040	e1000_hw.h	rx overrun
12988	E1000_ICR_RXT0	0x00000080	e1000_hw.h	rx timer intr (ring 0)
12989	E1000_ICR_MDAC	0x00000200	e1000_hw.h	MDIO access complete
12990	E1000_ICR_RXCFG	0x00000400	e1000_hw.h	RX /c/ ordered set
12991	E1000_ICR_GPI_EN0	0x00000800	e1000_hw.h	GP Int 0
12992	E1000_ICR_GPI_EN1	0x00001000	e1000_hw.h	GP Int 1
12993	E1000_ICR_GPI_EN2	0x00002000	e1000_hw.h	GP Int 2
12994	E1000_ICR_GPI_EN3	0x00004000	e1000_hw.h	GP Int 3
12995	E1000_ICR_TXD_LOW	0x00008000	e1000_hw.h
12996	E1000_ICR_SRPD	0x00010000	e1000_hw.h
12997	E1000_ICR_ACK	0x00020000	e1000_hw.h	Receive Ack frame
12998	E1000_ICR_MNG	0x00040000	e1000_hw.h	Manageability event
12999	E1000_ICR_DOCK	0x00080000	e1000_hw.h	Dock/Undock
13000	E1000_ICR_INT_ASSERTED	0x80000000	e1000_hw.h	If this bit asserted, the driver should claim the interrupt
13001	E1000_ICR_RXD_FIFO_PAR0	0x00100000	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
13002	E1000_ICR_TXD_FIFO_PAR0	0x00200000	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
13003	E1000_ICR_HOST_ARB_PAR	0x00400000	e1000_hw.h	host arb read buffer parity error
13004	E1000_ICR_PB_PAR	0x00800000	e1000_hw.h	packet buffer parity error
13005	E1000_ICR_RXD_FIFO_PAR1	0x01000000	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
13006	E1000_ICR_TXD_FIFO_PAR1	0x02000000	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
13007	E1000_ICR_ALL_PARITY	0x03F00000	e1000_hw.h	all parity error bits
13008	E1000_ICR_DSW	0x00000020	e1000_hw.h	FW changed the status of DISSW bit in the FWSM
13009	E1000_ICR_PHYINT	0x00001000	e1000_hw.h	LAN connected device generates an interrupt
13010	E1000_ICR_EPRST	0x00100000	e1000_hw.h	ME handware reset occurs
13011	E1000_ICS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
13012	E1000_ICS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
13013	E1000_ICS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
13014	E1000_ICS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
13015	E1000_ICS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
13016	E1000_ICS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
13017	E1000_ICS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
13018	E1000_ICS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
13019	E1000_ICS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
13020	E1000_ICS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
13021	E1000_ICS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
13022	E1000_ICS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
13023	E1000_ICS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
13024	E1000_ICS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
13025	E1000_ICS_SRPD	E1000_ICR_SRPD	e1000_hw.h
13026	E1000_ICS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
13027	E1000_ICS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
13028	E1000_ICS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
13029	E1000_ICS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
13030	E1000_ICS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
13031	E1000_ICS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
13032	E1000_ICS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
13033	E1000_ICS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
13034	E1000_ICS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
13035	E1000_ICS_DSW	E1000_ICR_DSW	e1000_hw.h
13036	E1000_ICS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
13037	E1000_ICS_EPRST	E1000_ICR_EPRST	e1000_hw.h
13038	E1000_IMS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
13039	E1000_IMS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
13040	E1000_IMS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
13041	E1000_IMS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
13042	E1000_IMS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
13043	E1000_IMS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
13044	E1000_IMS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
13045	E1000_IMS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
13046	E1000_IMS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
13047	E1000_IMS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
13048	E1000_IMS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
13049	E1000_IMS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
13050	E1000_IMS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
13051	E1000_IMS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
13052	E1000_IMS_SRPD	E1000_ICR_SRPD	e1000_hw.h
13053	E1000_IMS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
13054	E1000_IMS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
13055	E1000_IMS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
13056	E1000_IMS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
13057	E1000_IMS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
13058	E1000_IMS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
13059	E1000_IMS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
13060	E1000_IMS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
13061	E1000_IMS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
13062	E1000_IMS_DSW	E1000_ICR_DSW	e1000_hw.h
13063	E1000_IMS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
13064	E1000_IMS_EPRST	E1000_ICR_EPRST	e1000_hw.h
13065	E1000_IMC_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
13066	E1000_IMC_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
13067	E1000_IMC_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
13068	E1000_IMC_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
13069	E1000_IMC_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
13070	E1000_IMC_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
13071	E1000_IMC_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
13072	E1000_IMC_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
13073	E1000_IMC_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
13074	E1000_IMC_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
13075	E1000_IMC_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
13076	E1000_IMC_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
13077	E1000_IMC_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
13078	E1000_IMC_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
13079	E1000_IMC_SRPD	E1000_ICR_SRPD	e1000_hw.h
13080	E1000_IMC_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
13081	E1000_IMC_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
13082	E1000_IMC_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
13083	E1000_IMC_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
13084	E1000_IMC_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
13085	E1000_IMC_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
13086	E1000_IMC_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
13087	E1000_IMC_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
13088	E1000_IMC_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
13089	E1000_IMC_DSW	E1000_ICR_DSW	e1000_hw.h
13090	E1000_IMC_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
13091	E1000_IMC_EPRST	E1000_ICR_EPRST	e1000_hw.h
13092	E1000_RCTL_RST	0x00000001	e1000_hw.h	Software reset
13093	E1000_RCTL_EN	0x00000002	e1000_hw.h	enable
13094	E1000_RCTL_SBP	0x00000004	e1000_hw.h	store bad packet
13095	E1000_RCTL_UPE	0x00000008	e1000_hw.h	unicast promiscuous enable
13096	E1000_RCTL_MPE	0x00000010	e1000_hw.h	multicast promiscuous enab
13097	E1000_RCTL_LPE	0x00000020	e1000_hw.h	long packet enable
13098	E1000_RCTL_LBM_NO	0x00000000	e1000_hw.h	no loopback mode
13099	E1000_RCTL_LBM_MAC	0x00000040	e1000_hw.h	MAC loopback mode
13100	E1000_RCTL_LBM_SLP	0x00000080	e1000_hw.h	serial link loopback mode
13101	E1000_RCTL_LBM_TCVR	0x000000C0	e1000_hw.h	tcvr loopback mode
13102	E1000_RCTL_DTYP_MASK	0x00000C00	e1000_hw.h	Descriptor type mask
13103	E1000_RCTL_DTYP_PS	0x00000400	e1000_hw.h	Packet Split descriptor
13104	E1000_RCTL_RDMTS_HALF	0x00000000	e1000_hw.h	rx desc min threshold size
13105	E1000_RCTL_RDMTS_QUAT	0x00000100	e1000_hw.h	rx desc min threshold size
13106	E1000_RCTL_RDMTS_EIGTH	0x00000200	e1000_hw.h	rx desc min threshold size
13107	E1000_RCTL_MO_SHIFT	12	e1000_hw.h	multicast offset shift
13108	E1000_RCTL_MO_0	0x00000000	e1000_hw.h	multicast offset 11:0
13109	E1000_RCTL_MO_1	0x00001000	e1000_hw.h	multicast offset 12:1
13110	E1000_RCTL_MO_2	0x00002000	e1000_hw.h	multicast offset 13:2
13111	E1000_RCTL_MO_3	0x00003000	e1000_hw.h	multicast offset 15:4
13112	E1000_RCTL_MDR	0x00004000	e1000_hw.h	multicast desc ring 0
13113	E1000_RCTL_BAM	0x00008000	e1000_hw.h	broadcast enable
13114	E1000_RCTL_SZ_2048	0x00000000	e1000_hw.h	rx buffer size 2048
13115	E1000_RCTL_SZ_1024	0x00010000	e1000_hw.h	rx buffer size 1024
13116	E1000_RCTL_SZ_512	0x00020000	e1000_hw.h	rx buffer size 512
13117	E1000_RCTL_SZ_256	0x00030000	e1000_hw.h	rx buffer size 256
13118	E1000_RCTL_SZ_16384	0x00010000	e1000_hw.h	rx buffer size 16384
13119	E1000_RCTL_SZ_8192	0x00020000	e1000_hw.h	rx buffer size 8192
13120	E1000_RCTL_SZ_4096	0x00030000	e1000_hw.h	rx buffer size 4096
13121	E1000_RCTL_VFE	0x00040000	e1000_hw.h	vlan filter enable
13122	E1000_RCTL_CFIEN	0x00080000	e1000_hw.h	canonical form enable
13123	E1000_RCTL_CFI	0x00100000	e1000_hw.h	canonical form indicator
13124	E1000_RCTL_DPF	0x00400000	e1000_hw.h	discard pause frames
13125	E1000_RCTL_PMCF	0x00800000	e1000_hw.h	pass MAC control frames
13126	E1000_RCTL_BSEX	0x02000000	e1000_hw.h	Buffer size extension
13127	E1000_RCTL_SECRC	0x04000000	e1000_hw.h	Strip Ethernet CRC
13128	E1000_RCTL_FLXBUF_MASK	0x78000000	e1000_hw.h	Flexible buffer size
13129	E1000_RCTL_FLXBUF_SHIFT	27	e1000_hw.h	Flexible buffer shift
13130	E1000_PSRCTL_BSIZE0_MASK	0x0000007F	e1000_hw.h
13131	E1000_PSRCTL_BSIZE1_MASK	0x00003F00	e1000_hw.h
13132	E1000_PSRCTL_BSIZE2_MASK	0x003F0000	e1000_hw.h
13133	E1000_PSRCTL_BSIZE3_MASK	0x3F000000	e1000_hw.h
13134	E1000_PSRCTL_BSIZE0_SHIFT	7	e1000_hw.h	Shift _right_ 7
13135	E1000_PSRCTL_BSIZE1_SHIFT	2	e1000_hw.h	Shift _right_ 2
13136	E1000_PSRCTL_BSIZE2_SHIFT	6	e1000_hw.h	Shift _left_ 6
13137	E1000_PSRCTL_BSIZE3_SHIFT	14	e1000_hw.h	Shift _left_ 14
13138	E1000_SWFW_EEP_SM	0x0001	e1000_hw.h
13139	E1000_SWFW_PHY0_SM	0x0002	e1000_hw.h
13140	E1000_SWFW_PHY1_SM	0x0004	e1000_hw.h
13141	E1000_SWFW_MAC_CSR_SM	0x0008	e1000_hw.h
13142	E1000_RDT_DELAY	0x0000ffff	e1000_hw.h	Delay timer (1=1024us)
13143	E1000_RDT_FPDB	0x80000000	e1000_hw.h	Flush descriptor block
13144	E1000_RDLEN_LEN	0x0007ff80	e1000_hw.h	descriptor length
13145	E1000_RDH_RDH	0x0000ffff	e1000_hw.h	receive descriptor head
13146	E1000_RDT_RDT	0x0000ffff	e1000_hw.h	receive descriptor tail
13147	E1000_FCRTH_RTH	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTH
13148	E1000_FCRTH_XFCE	0x80000000	e1000_hw.h	External Flow Control Enable
13149	E1000_FCRTL_RTL	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTL
13150	E1000_FCRTL_XONE	0x80000000	e1000_hw.h	Enable XON frame transmission
13151	E1000_RFCTL_ISCSI_DIS	0x00000001	e1000_hw.h
13152	E1000_RFCTL_ISCSI_DWC_MASK	0x0000003E	e1000_hw.h
13153	E1000_RFCTL_ISCSI_DWC_SHIFT	1	e1000_hw.h
13154	E1000_RFCTL_NFSW_DIS	0x00000040	e1000_hw.h
13155	E1000_RFCTL_NFSR_DIS	0x00000080	e1000_hw.h
13156	E1000_RFCTL_NFS_VER_MASK	0x00000300	e1000_hw.h
13157	E1000_RFCTL_NFS_VER_SHIFT	8	e1000_hw.h
13158	E1000_RFCTL_IPV6_DIS	0x00000400	e1000_hw.h
13159	E1000_RFCTL_IPV6_XSUM_DIS	0x00000800	e1000_hw.h
13160	E1000_RFCTL_ACK_DIS	0x00001000	e1000_hw.h
13161	E1000_RFCTL_ACKD_DIS	0x00002000	e1000_hw.h
13162	E1000_RFCTL_IPFRSP_DIS	0x00004000	e1000_hw.h
13163	E1000_RFCTL_EXTEN	0x00008000	e1000_hw.h
13164	E1000_RFCTL_IPV6_EX_DIS	0x00010000	e1000_hw.h
13165	E1000_RFCTL_NEW_IPV6_EXT_DIS	0x00020000	e1000_hw.h
13166	E1000_RXDCTL_PTHRESH	0x0000003F	e1000_hw.h	RXDCTL Prefetch Threshold
13167	E1000_RXDCTL_HTHRESH	0x00003F00	e1000_hw.h	RXDCTL Host Threshold
13168	E1000_RXDCTL_WTHRESH	0x003F0000	e1000_hw.h	RXDCTL Writeback Threshold
13169	E1000_RXDCTL_GRAN	0x01000000	e1000_hw.h	RXDCTL Granularity
13170	E1000_TXDCTL_PTHRESH	0x0000003F	e1000_hw.h	TXDCTL Prefetch Threshold
13171	E1000_TXDCTL_HTHRESH	0x00003F00	e1000_hw.h	TXDCTL Host Threshold
13172	E1000_TXDCTL_WTHRESH	0x003F0000	e1000_hw.h	TXDCTL Writeback Threshold
13173	E1000_TXDCTL_GRAN	0x01000000	e1000_hw.h	TXDCTL Granularity
13174	E1000_TXDCTL_LWTHRESH	0xFE000000	e1000_hw.h	TXDCTL Low Threshold
13175	E1000_TXDCTL_FULL_TX_DESC_WB	0x01010000	e1000_hw.h	GRAN=1, WTHRESH=1
13176	E1000_TXDCTL_COUNT_DESC	0x00400000	e1000_hw.h	Enable the counting of desc.
13177	E1000_TXCW_FD	0x00000020	e1000_hw.h	TXCW full duplex
13178	E1000_TXCW_HD	0x00000040	e1000_hw.h	TXCW half duplex
13179	E1000_TXCW_PAUSE	0x00000080	e1000_hw.h	TXCW sym pause request
13180	E1000_TXCW_ASM_DIR	0x00000100	e1000_hw.h	TXCW astm pause direction
13181	E1000_TXCW_PAUSE_MASK	0x00000180	e1000_hw.h	TXCW pause request mask
13182	E1000_TXCW_RF	0x00003000	e1000_hw.h	TXCW remote fault
13183	E1000_TXCW_NP	0x00008000	e1000_hw.h	TXCW next page
13184	E1000_TXCW_CW	0x0000ffff	e1000_hw.h	TxConfigWord mask
13185	E1000_TXCW_TXC	0x40000000	e1000_hw.h	Transmit Config control
13186	E1000_TXCW_ANE	0x80000000	e1000_hw.h	Auto-neg enable
13187	E1000_RXCW_CW	0x0000ffff	e1000_hw.h	RxConfigWord mask
13188	E1000_RXCW_NC	0x04000000	e1000_hw.h	Receive config no carrier
13189	E1000_RXCW_IV	0x08000000	e1000_hw.h	Receive config invalid
13190	E1000_RXCW_CC	0x10000000	e1000_hw.h	Receive config change
13191	E1000_RXCW_C	0x20000000	e1000_hw.h	Receive config
13192	E1000_RXCW_SYNCH	0x40000000	e1000_hw.h	Receive config synch
13193	E1000_RXCW_ANC	0x80000000	e1000_hw.h	Auto-neg complete
13194	E1000_TCTL_RST	0x00000001	e1000_hw.h	software reset
13195	E1000_TCTL_EN	0x00000002	e1000_hw.h	enable tx
13196	E1000_TCTL_BCE	0x00000004	e1000_hw.h	busy check enable
13197	E1000_TCTL_PSP	0x00000008	e1000_hw.h	pad short packets
13198	E1000_TCTL_CT	0x00000ff0	e1000_hw.h	collision threshold
13199	E1000_TCTL_COLD	0x003ff000	e1000_hw.h	collision distance
13200	E1000_TCTL_SWXOFF	0x00400000	e1000_hw.h	SW Xoff transmission
13201	E1000_TCTL_PBE	0x00800000	e1000_hw.h	Packet Burst Enable
13202	E1000_TCTL_RTLC	0x01000000	e1000_hw.h	Re-transmit on late collision
13203	E1000_TCTL_NRTU	0x02000000	e1000_hw.h	No Re-transmit on underrun
13204	E1000_TCTL_MULR	0x10000000	e1000_hw.h	Multiple request support
13205	E1000_TCTL_EXT_BST_MASK	0x000003FF	e1000_hw.h	Backoff Slot Time
13206	E1000_TCTL_EXT_GCEX_MASK	0x000FFC00	e1000_hw.h	Gigabit Carry Extend Padding
13207	DEFAULT_80003ES2LAN_TCTL_EXT_GC	0x00010000	e1000_hw.h
13208	E1000_RXCSUM_PCSS_MASK	0x000000FF	e1000_hw.h	Packet Checksum Start
13209	E1000_RXCSUM_IPOFL	0x00000100	e1000_hw.h	IPv4 checksum offload
13210	E1000_RXCSUM_TUOFL	0x00000200	e1000_hw.h	TCP / UDP checksum offload
13211	E1000_RXCSUM_IPV6OFL	0x00000400	e1000_hw.h	IPv6 checksum offload
13212	E1000_RXCSUM_IPPCSE	0x00001000	e1000_hw.h	IP payload checksum enable
13213	E1000_RXCSUM_PCSD	0x00002000	e1000_hw.h	packet checksum disabled
13214	E1000_MRQC_ENABLE_MASK	0x00000003	e1000_hw.h
13215	E1000_MRQC_ENABLE_RSS_2Q	0x00000001	e1000_hw.h
13216	E1000_MRQC_ENABLE_RSS_INT	0x00000004	e1000_hw.h
13217	E1000_MRQC_RSS_FIELD_MASK	0xFFFF0000	e1000_hw.h
13218	E1000_MRQC_RSS_FIELD_IPV4_TCP	0x00010000	e1000_hw.h
13219	E1000_MRQC_RSS_FIELD_IPV4	0x00020000	e1000_hw.h
13220	E1000_MRQC_RSS_FIELD_IPV6_TCP_E	0x00040000	e1000_hw.h
13221	E1000_MRQC_RSS_FIELD_IPV6_EX	0x00080000	e1000_hw.h
13222	E1000_MRQC_RSS_FIELD_IPV6	0x00100000	e1000_hw.h
13223	E1000_MRQC_RSS_FIELD_IPV6_TCP	0x00200000	e1000_hw.h
13224	E1000_WUC_APME	0x00000001	e1000_hw.h	APM Enable
13225	E1000_WUC_PME_EN	0x00000002	e1000_hw.h	PME Enable
13226	E1000_WUC_PME_STATUS	0x00000004	e1000_hw.h	PME Status
13227	E1000_WUC_APMPME	0x00000008	e1000_hw.h	Assert PME on APM Wakeup
13228	E1000_WUC_SPM	0x80000000	e1000_hw.h	Enable SPM
13229	E1000_WUFC_LNKC	0x00000001	e1000_hw.h	Link Status Change Wakeup Enable
13230	E1000_WUFC_MAG	0x00000002	e1000_hw.h	Magic Packet Wakeup Enable
13231	E1000_WUFC_EX	0x00000004	e1000_hw.h	Directed Exact Wakeup Enable
13232	E1000_WUFC_MC	0x00000008	e1000_hw.h	Directed Multicast Wakeup Enable
13233	E1000_WUFC_BC	0x00000010	e1000_hw.h	Broadcast Wakeup Enable
13234	E1000_WUFC_ARP	0x00000020	e1000_hw.h	ARP Request Packet Wakeup Enable
13235	E1000_WUFC_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Enable
13236	E1000_WUFC_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Enable
13237	E1000_WUFC_IGNORE_TCO	0x00008000	e1000_hw.h	Ignore WakeOn TCO packets
13238	E1000_WUFC_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Enable
13239	E1000_WUFC_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Enable
13240	E1000_WUFC_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Enable
13241	E1000_WUFC_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Enable
13242	E1000_WUFC_ALL_FILTERS	0x000F00FF	e1000_hw.h	Mask for all wakeup filters
13243	E1000_WUFC_FLX_OFFSET	16	e1000_hw.h	Offset to the Flexible Filters bits
13244	E1000_WUFC_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
13245	E1000_WUS_LNKC	0x00000001	e1000_hw.h	Link Status Changed
13246	E1000_WUS_MAG	0x00000002	e1000_hw.h	Magic Packet Received
13247	E1000_WUS_EX	0x00000004	e1000_hw.h	Directed Exact Received
13248	E1000_WUS_MC	0x00000008	e1000_hw.h	Directed Multicast Received
13249	E1000_WUS_BC	0x00000010	e1000_hw.h	Broadcast Received
13250	E1000_WUS_ARP	0x00000020	e1000_hw.h	ARP Request Packet Received
13251	E1000_WUS_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Received
13252	E1000_WUS_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Received
13253	E1000_WUS_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Match
13254	E1000_WUS_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Match
13255	E1000_WUS_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Match
13256	E1000_WUS_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Match
13257	E1000_WUS_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
13258	E1000_MANC_SMBUS_EN	0x00000001	e1000_hw.h	SMBus Enabled - RO
13259	E1000_MANC_ASF_EN	0x00000002	e1000_hw.h	ASF Enabled - RO
13260	E1000_MANC_R_ON_FORCE	0x00000004	e1000_hw.h	Reset on Force TCO - RO
13261	E1000_MANC_RMCP_EN	0x00000100	e1000_hw.h	Enable RCMP 026Fh Filtering
13262	E1000_MANC_0298_EN	0x00000200	e1000_hw.h	Enable RCMP 0298h Filtering
13263	E1000_MANC_IPV4_EN	0x00000400	e1000_hw.h	Enable IPv4
13264	E1000_MANC_IPV6_EN	0x00000800	e1000_hw.h	Enable IPv6
13265	E1000_MANC_SNAP_EN	0x00001000	e1000_hw.h	Accept LLC/SNAP
13266	E1000_MANC_ARP_EN	0x00002000	e1000_hw.h	Enable ARP Request Filtering
13267	E1000_MANC_NEIGHBOR_EN	0x00004000	e1000_hw.h	Enable Neighbor Discovery
13268	E1000_MANC_ARP_RES_EN	0x00008000	e1000_hw.h	Enable ARP response Filtering
13269	E1000_MANC_TCO_RESET	0x00010000	e1000_hw.h	TCO Reset Occurred
13270	E1000_MANC_RCV_TCO_EN	0x00020000	e1000_hw.h	Receive TCO Packets Enabled
13271	E1000_MANC_REPORT_STATUS	0x00040000	e1000_hw.h	Status Reporting Enabled
13272	E1000_MANC_RCV_ALL	0x00080000	e1000_hw.h	Receive All Enabled
13273	E1000_MANC_BLK_PHY_RST_ON_IDE	0x00040000	e1000_hw.h	Block phy resets
13274	E1000_MANC_EN_MAC_ADDR_FILTER	0x00100000	e1000_hw.h	Enable MAC address
13275	E1000_MANC_EN_MNG2HOST	0x00200000	e1000_hw.h	Enable MNG packets to host
13276	E1000_MANC_EN_IP_ADDR_FILTER	0x00400000	e1000_hw.h	Enable IP address
13277	E1000_MANC_EN_XSUM_FILTER	0x00800000	e1000_hw.h	Enable checksum filtering
13278	E1000_MANC_BR_EN	0x01000000	e1000_hw.h	Enable broadcast filtering
13279	E1000_MANC_SMB_REQ	0x01000000	e1000_hw.h	SMBus Request
13280	E1000_MANC_SMB_GNT	0x02000000	e1000_hw.h	SMBus Grant
13281	E1000_MANC_SMB_CLK_IN	0x04000000	e1000_hw.h	SMBus Clock In
13282	E1000_MANC_SMB_DATA_IN	0x08000000	e1000_hw.h	SMBus Data In
13283	E1000_MANC_SMB_DATA_OUT	0x10000000	e1000_hw.h	SMBus Data Out
13284	E1000_MANC_SMB_CLK_OUT	0x20000000	e1000_hw.h	SMBus Clock Out
13285	E1000_MANC_SMB_DATA_OUT_SHIFT	28	e1000_hw.h	SMBus Data Out Shift
13286	E1000_MANC_SMB_CLK_OUT_SHIFT	29	e1000_hw.h	SMBus Clock Out Shift
13287	E1000_SWSM_SMBI	0x00000001	e1000_hw.h	Driver Semaphore bit
13288	E1000_SWSM_SWESMBI	0x00000002	e1000_hw.h	FW Semaphore bit
13289	E1000_SWSM_WMNG	0x00000004	e1000_hw.h	Wake MNG Clock
13290	E1000_SWSM_DRV_LOAD	0x00000008	e1000_hw.h	Driver Loaded Bit
13291	E1000_FWSM_MODE_MASK	0x0000000E	e1000_hw.h	FW mode
13292	E1000_FWSM_MODE_SHIFT	1	e1000_hw.h
13293	E1000_FWSM_FW_VALID	0x00008000	e1000_hw.h	FW established a valid mode
13294	E1000_FWSM_RSPCIPHY	0x00000040	e1000_hw.h	Reset PHY on PCI reset
13295	E1000_FWSM_DISSW	0x10000000	e1000_hw.h	FW disable SW Write Access
13296	E1000_FWSM_SKUSEL_MASK	0x60000000	e1000_hw.h	LAN SKU select
13297	E1000_FWSM_SKUEL_SHIFT	29	e1000_hw.h
13298	E1000_FWSM_SKUSEL_EMB	0x0	e1000_hw.h	Embedded SKU
13299	E1000_FWSM_SKUSEL_CONS	0x1	e1000_hw.h	Consumer SKU
13300	E1000_FWSM_SKUSEL_PERF_100	0x2	e1000_hw.h	Perf & Corp 10/100 SKU
13301	E1000_FWSM_SKUSEL_PERF_GBE	0x3	e1000_hw.h	Perf & Copr GbE SKU
13302	E1000_FFLT_DBG_INVC	0x00100000	e1000_hw.h	Invalid /C/ code handling
13303	E1000_HICR_EN	0x00000001	e1000_hw.h	Enable Bit - RO
13304	E1000_HICR_C	0x00000002	e1000_hw.h	Driver sets this bit when done
13305	E1000_HICR_SV	0x00000004	e1000_hw.h	Status Validity
13306	E1000_HICR_FWR	0x00000080	e1000_hw.h	FW reset. Set by the Host
13307	E1000_HI_MAX_DATA_LENGTH	252	e1000_hw.h	Host Interface data length
13308	E1000_HI_MAX_BLOCK_BYTE_LENGTH	1792	e1000_hw.h	Number of bytes in range
13309	E1000_HI_MAX_BLOCK_DWORD_LENGTH	448	e1000_hw.h	Number of dwords in range
13310	E1000_HI_COMMAND_TIMEOUT	500	e1000_hw.h	Time in ms to process HI command
13311	E1000_HSMC0R_CLKIN	0x00000001	e1000_hw.h	SMB Clock in
13312	E1000_HSMC0R_DATAIN	0x00000002	e1000_hw.h	SMB Data in
13313	E1000_HSMC0R_DATAOUT	0x00000004	e1000_hw.h	SMB Data out
13314	E1000_HSMC0R_CLKOUT	0x00000008	e1000_hw.h	SMB Clock out
13315	E1000_HSMC1R_CLKIN	E1000_HSMC0R_CLKIN	e1000_hw.h
13316	E1000_HSMC1R_DATAIN	E1000_HSMC0R_DATAIN	e1000_hw.h
13317	E1000_HSMC1R_DATAOUT	E1000_HSMC0R_DATAOUT	e1000_hw.h
13318	E1000_HSMC1R_CLKOUT	E1000_HSMC0R_CLKOUT	e1000_hw.h
13319	E1000_FWSTS_FWS_MASK	0x000000FF	e1000_hw.h	FW Status
13320	E1000_WUPL_LENGTH_MASK	0x0FFF	e1000_hw.h	Only the lower 12 bits are valid
13321	E1000_MDALIGN	4096	e1000_hw.h
13322	E1000_GCR_RXD_NO_SNOOP	0x00000001	e1000_hw.h
13323	E1000_GCR_RXDSCW_NO_SNOOP	0x00000002	e1000_hw.h
13324	E1000_GCR_RXDSCR_NO_SNOOP	0x00000004	e1000_hw.h
13325	E1000_GCR_TXD_NO_SNOOP	0x00000008	e1000_hw.h
13326	E1000_GCR_TXDSCW_NO_SNOOP	0x00000010	e1000_hw.h
13327	E1000_GCR_TXDSCR_NO_SNOOP	0x00000020	e1000_hw.h
13328	PCI_EX_NO_SNOOP_ALL	(E1000_GCR_RXD_NO_SNOOP \| \ E1000_GCR_RXDSCW_NO_SNOOP \| \ E1000_GCR_RXDSCR_NO_SNOOP \| \ E1000_GCR_TXD_NO_SNOO	e1000_hw.h
13329	PCI_EX_82566_SNOOP_ALL	PCI_EX_NO_SNOOP_ALL	e1000_hw.h
13330	E1000_GCR_L1_ACT_WITHOUT_L0S_RX	0x08000000	e1000_hw.h
13331	E1000_FACTPS_FUNC0_POWER_STATE_	0x00000003	e1000_hw.h
13332	E1000_FACTPS_LAN0_VALID	0x00000004	e1000_hw.h
13333	E1000_FACTPS_FUNC0_AUX_EN	0x00000008	e1000_hw.h
13334	E1000_FACTPS_FUNC1_POWER_STATE_	0x000000C0	e1000_hw.h
13335	E1000_FACTPS_FUNC1_POWER_STATE_	6	e1000_hw.h
13336	E1000_FACTPS_LAN1_VALID	0x00000100	e1000_hw.h
13337	E1000_FACTPS_FUNC1_AUX_EN	0x00000200	e1000_hw.h
13338	E1000_FACTPS_FUNC2_POWER_STATE_	0x00003000	e1000_hw.h
13339	E1000_FACTPS_FUNC2_POWER_STATE_	12	e1000_hw.h
13340	E1000_FACTPS_IDE_ENABLE	0x00004000	e1000_hw.h
13341	E1000_FACTPS_FUNC2_AUX_EN	0x00008000	e1000_hw.h
13342	E1000_FACTPS_FUNC3_POWER_STATE_	0x000C0000	e1000_hw.h
13343	E1000_FACTPS_FUNC3_POWER_STATE_	18	e1000_hw.h
13344	E1000_FACTPS_SP_ENABLE	0x00100000	e1000_hw.h
13345	E1000_FACTPS_FUNC3_AUX_EN	0x00200000	e1000_hw.h
13346	E1000_FACTPS_FUNC4_POWER_STATE_	0x03000000	e1000_hw.h
13347	E1000_FACTPS_FUNC4_POWER_STATE_	24	e1000_hw.h
13348	E1000_FACTPS_IPMI_ENABLE	0x04000000	e1000_hw.h
13349	E1000_FACTPS_FUNC4_AUX_EN	0x08000000	e1000_hw.h
13350	E1000_FACTPS_MNGCG	0x20000000	e1000_hw.h
13351	E1000_FACTPS_LAN_FUNC_SEL	0x40000000	e1000_hw.h
13352	E1000_FACTPS_PM_STATE_CHANGED	0x80000000	e1000_hw.h
13353	PCI_EX_LINK_STATUS	0x12	e1000_hw.h
13354	PCI_EX_LINK_WIDTH_MASK	0x3F0	e1000_hw.h
13355	PCI_EX_LINK_WIDTH_SHIFT	4	e1000_hw.h
13356	EEPROM_READ_OPCODE_MICROWIRE	0x6	e1000_hw.h	EEPROM read opcode
13357	EEPROM_WRITE_OPCODE_MICROWIRE	0x5	e1000_hw.h	EEPROM write opcode
13358	EEPROM_ERASE_OPCODE_MICROWIRE	0x7	e1000_hw.h	EEPROM erase opcode
13359	EEPROM_EWEN_OPCODE_MICROWIRE	0x13	e1000_hw.h	EEPROM erase/write enable
13360	EEPROM_EWDS_OPCODE_MICROWIRE	0x10	e1000_hw.h	EEPROM erast/write disable
13361	EEPROM_MAX_RETRY_SPI	5000	e1000_hw.h	Max wait of 5ms, for RDY signal
13362	EEPROM_READ_OPCODE_SPI	0x03	e1000_hw.h	EEPROM read opcode
13363	EEPROM_WRITE_OPCODE_SPI	0x02	e1000_hw.h	EEPROM write opcode
13364	EEPROM_A8_OPCODE_SPI	0x08	e1000_hw.h	opcode bit-3 = address bit-8
13365	EEPROM_WREN_OPCODE_SPI	0x06	e1000_hw.h	EEPROM set Write Enable latch
13366	EEPROM_WRDI_OPCODE_SPI	0x04	e1000_hw.h	EEPROM reset Write Enable latch
13367	EEPROM_RDSR_OPCODE_SPI	0x05	e1000_hw.h	EEPROM read Status register
13368	EEPROM_WRSR_OPCODE_SPI	0x01	e1000_hw.h	EEPROM write Status register
13369	EEPROM_ERASE4K_OPCODE_SPI	0x20	e1000_hw.h	EEPROM ERASE 4KB
13370	EEPROM_ERASE64K_OPCODE_SPI	0xD8	e1000_hw.h	EEPROM ERASE 64KB
13371	EEPROM_ERASE256_OPCODE_SPI	0xDB	e1000_hw.h	EEPROM ERASE 256B
13372	EEPROM_WORD_SIZE_SHIFT	6	e1000_hw.h
13373	EEPROM_SIZE_SHIFT	10	e1000_hw.h
13374	EEPROM_SIZE_MASK	0x1C00	e1000_hw.h
13375	EEPROM_COMPAT	0x0003	e1000_hw.h
13376	EEPROM_ID_LED_SETTINGS	0x0004	e1000_hw.h
13377	EEPROM_VERSION	0x0005	e1000_hw.h
13378	EEPROM_SERDES_AMPLITUDE	0x0006	e1000_hw.h	For SERDES output amplitude adjustment.
13379	EEPROM_PHY_CLASS_WORD	0x0007	e1000_hw.h
13380	EEPROM_INIT_CONTROL1_REG	0x000A	e1000_hw.h
13381	EEPROM_INIT_CONTROL2_REG	0x000F	e1000_hw.h
13382	EEPROM_SWDEF_PINS_CTRL_PORT_1	0x0010	e1000_hw.h
13383	EEPROM_INIT_CONTROL3_PORT_B	0x0014	e1000_hw.h
13384	EEPROM_INIT_3GIO_3	0x001A	e1000_hw.h
13385	EEPROM_SWDEF_PINS_CTRL_PORT_0	0x0020	e1000_hw.h
13386	EEPROM_INIT_CONTROL3_PORT_A	0x0024	e1000_hw.h
13387	EEPROM_CFG	0x0012	e1000_hw.h
13388	EEPROM_FLASH_VERSION	0x0032	e1000_hw.h
13389	EEPROM_CHECKSUM_REG	0x003F	e1000_hw.h
13390	E1000_EEPROM_CFG_DONE	0x00040000	e1000_hw.h	MNG config cycle done
13391	E1000_EEPROM_CFG_DONE_PORT_1	0x00080000	e1000_hw.h	...for second port
13392	ID_LED_RESERVED_0000	0x0000	e1000_hw.h
13393	ID_LED_RESERVED_FFFF	0xFFFF	e1000_hw.h
13394	ID_LED_RESERVED_82573	0xF746	e1000_hw.h
13395	ID_LED_DEFAULT_82573	0x1811	e1000_hw.h
13396	ID_LED_DEFAULT	((ID_LED_OFF1_ON2 << 12) \| \ (ID_LED_OFF1_OFF2 << 8) \| \ (ID_LED_DEF1_DEF2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
13397	ID_LED_DEFAULT_ICH8LAN	((ID_LED_DEF1_DEF2 << 12) \| \ (ID_LED_DEF1_OFF2 << 8) \| \ (ID_LED_DEF1_ON2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
13398	ID_LED_DEF1_DEF2	0x1	e1000_hw.h
13399	ID_LED_DEF1_ON2	0x2	e1000_hw.h
13400	ID_LED_DEF1_OFF2	0x3	e1000_hw.h
13401	ID_LED_ON1_DEF2	0x4	e1000_hw.h
13402	ID_LED_ON1_ON2	0x5	e1000_hw.h
13403	ID_LED_ON1_OFF2	0x6	e1000_hw.h
13404	ID_LED_OFF1_DEF2	0x7	e1000_hw.h
13405	ID_LED_OFF1_ON2	0x8	e1000_hw.h
13406	ID_LED_OFF1_OFF2	0x9	e1000_hw.h
13407	IGP_ACTIVITY_LED_MASK	0xFFFFF0FF	e1000_hw.h
13408	IGP_ACTIVITY_LED_ENABLE	0x0300	e1000_hw.h
13409	IGP_LED3_MODE	0x07000000	e1000_hw.h
13410	EEPROM_SERDES_AMPLITUDE_MASK	0x000F	e1000_hw.h
13411	EEPROM_PHY_CLASS_A	0x8000	e1000_hw.h
13412	EEPROM_WORD0A_ILOS	0x0010	e1000_hw.h
13413	EEPROM_WORD0A_SWDPIO	0x01E0	e1000_hw.h
13414	EEPROM_WORD0A_LRST	0x0200	e1000_hw.h
13415	EEPROM_WORD0A_FD	0x0400	e1000_hw.h
13416	EEPROM_WORD0A_66MHZ	0x0800	e1000_hw.h
13417	EEPROM_WORD0F_PAUSE_MASK	0x3000	e1000_hw.h
13418	EEPROM_WORD0F_PAUSE	0x1000	e1000_hw.h
13419	EEPROM_WORD0F_ASM_DIR	0x2000	e1000_hw.h
13420	EEPROM_WORD0F_ANE	0x0800	e1000_hw.h
13421	EEPROM_WORD0F_SWPDIO_EXT	0x00F0	e1000_hw.h
13422	EEPROM_WORD0F_LPLU	0x0001	e1000_hw.h
13423	EEPROM_WORD1020_GIGA_DISABLE	0x0010	e1000_hw.h
13424	EEPROM_WORD1020_GIGA_DISABLE_NO	0x0008	e1000_hw.h
13425	EEPROM_WORD1A_ASPM_MASK	0x000C	e1000_hw.h
13426	EEPROM_SUM	0xBABA	e1000_hw.h
13427	EEPROM_NODE_ADDRESS_BYTE_0	0	e1000_hw.h
13428	EEPROM_PBA_BYTE_1	8	e1000_hw.h
13429	EEPROM_RESERVED_WORD	0xFFFF	e1000_hw.h
13430	PBA_SIZE	4	e1000_hw.h
13431	E1000_COLLISION_THRESHOLD	15	e1000_hw.h
13432	E1000_CT_SHIFT	4	e1000_hw.h
13433	E1000_COLLISION_DISTANCE	63	e1000_hw.h
13434	E1000_COLLISION_DISTANCE_82542	64	e1000_hw.h
13435	E1000_FDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
13436	E1000_HDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
13437	E1000_COLD_SHIFT	12	e1000_hw.h
13438	REQ_TX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
13439	REQ_RX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
13440	DEFAULT_82542_TIPG_IPGT	10	e1000_hw.h
13441	DEFAULT_82543_TIPG_IPGT_FIBER	9	e1000_hw.h
13442	DEFAULT_82543_TIPG_IPGT_COPPER	8	e1000_hw.h
13443	E1000_TIPG_IPGT_MASK	0x000003FF	e1000_hw.h
13444	E1000_TIPG_IPGR1_MASK	0x000FFC00	e1000_hw.h
13445	E1000_TIPG_IPGR2_MASK	0x3FF00000	e1000_hw.h
13446	DEFAULT_82542_TIPG_IPGR1	2	e1000_hw.h
13447	DEFAULT_82543_TIPG_IPGR1	8	e1000_hw.h
13448	E1000_TIPG_IPGR1_SHIFT	10	e1000_hw.h
13449	DEFAULT_82542_TIPG_IPGR2	10	e1000_hw.h
13450	DEFAULT_82543_TIPG_IPGR2	6	e1000_hw.h
13451	DEFAULT_80003ES2LAN_TIPG_IPGR2	7	e1000_hw.h
13452	E1000_TIPG_IPGR2_SHIFT	20	e1000_hw.h
13453	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000009	e1000_hw.h
13454	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000008	e1000_hw.h
13455	E1000_TXDMAC_DPP	0x00000001	e1000_hw.h
13456	TX_THRESHOLD_START	8	e1000_hw.h
13457	TX_THRESHOLD_INCREMENT	10	e1000_hw.h
13458	TX_THRESHOLD_DECREMENT	1	e1000_hw.h
13459	TX_THRESHOLD_STOP	190	e1000_hw.h
13460	TX_THRESHOLD_DISABLE	0	e1000_hw.h
13461	TX_THRESHOLD_TIMER_MS	10000	e1000_hw.h
13462	MIN_NUM_XMITS	1000	e1000_hw.h
13463	IFS_MAX	80	e1000_hw.h
13464	IFS_STEP	10	e1000_hw.h
13465	IFS_MIN	40	e1000_hw.h
13466	IFS_RATIO	4	e1000_hw.h
13467	E1000_EXTCNF_CTRL_PCIE_WRITE_EN	0x00000001	e1000_hw.h
13468	E1000_EXTCNF_CTRL_PHY_WRITE_ENA	0x00000002	e1000_hw.h
13469	E1000_EXTCNF_CTRL_D_UD_ENABLE	0x00000004	e1000_hw.h
13470	E1000_EXTCNF_CTRL_D_UD_LATENCY	0x00000008	e1000_hw.h
13471	E1000_EXTCNF_CTRL_D_UD_OWNER	0x00000010	e1000_hw.h
13472	E1000_EXTCNF_CTRL_MDIO_SW_OWNER	0x00000020	e1000_hw.h
13473	E1000_EXTCNF_CTRL_MDIO_HW_OWNER	0x00000040	e1000_hw.h
13474	E1000_EXTCNF_CTRL_EXT_CNF_POINT	0x0FFF0000	e1000_hw.h
13475	E1000_EXTCNF_SIZE_EXT_PHY_LENGT	0x000000FF	e1000_hw.h
13476	E1000_EXTCNF_SIZE_EXT_DOCK_LENG	0x0000FF00	e1000_hw.h
13477	E1000_EXTCNF_SIZE_EXT_PCIE_LENG	0x00FF0000	e1000_hw.h
13478	E1000_EXTCNF_CTRL_LCD_WRITE_ENA	0x00000001	e1000_hw.h
13479	E1000_EXTCNF_CTRL_SWFLAG	0x00000020	e1000_hw.h
13480	E1000_PBA_8K	0x0008	e1000_hw.h	8KB, default Rx allocation
13481	E1000_PBA_12K	0x000C	e1000_hw.h	12KB, default Rx allocation
13482	E1000_PBA_16K	0x0010	e1000_hw.h	16KB, default TX allocation
13483	E1000_PBA_20K	0x0014	e1000_hw.h
13484	E1000_PBA_22K	0x0016	e1000_hw.h
13485	E1000_PBA_24K	0x0018	e1000_hw.h
13486	E1000_PBA_30K	0x001E	e1000_hw.h
13487	E1000_PBA_32K	0x0020	e1000_hw.h
13488	E1000_PBA_34K	0x0022	e1000_hw.h
13489	E1000_PBA_38K	0x0026	e1000_hw.h
13490	E1000_PBA_40K	0x0028	e1000_hw.h
13491	E1000_PBA_48K	0x0030	e1000_hw.h	48KB, default RX allocation
13492	E1000_PBS_16K	E1000_PBA_16K	e1000_hw.h
13493	FLOW_CONTROL_ADDRESS_LOW	0x00C28001	e1000_hw.h
13494	FLOW_CONTROL_ADDRESS_HIGH	0x00000100	e1000_hw.h
13495	FLOW_CONTROL_TYPE	0x8808	e1000_hw.h
13496	FC_DEFAULT_HI_THRESH	(0x8000)	e1000_hw.h	32KB
13497	FC_DEFAULT_LO_THRESH	(0x4000)	e1000_hw.h	16KB
13498	FC_DEFAULT_TX_TIMER	(0x100)	e1000_hw.h	~130 us
13499	PCIX_COMMAND_REGISTER	0xE6	e1000_hw.h
13500	PCIX_STATUS_REGISTER_LO	0xE8	e1000_hw.h
13501	PCIX_STATUS_REGISTER_HI	0xEA	e1000_hw.h
13502	PCIX_COMMAND_MMRBC_MASK	0x000C	e1000_hw.h
13503	PCIX_COMMAND_MMRBC_SHIFT	0x2	e1000_hw.h
13504	PCIX_STATUS_HI_MMRBC_MASK	0x0060	e1000_hw.h
13505	PCIX_STATUS_HI_MMRBC_SHIFT	0x5	e1000_hw.h
13506	PCIX_STATUS_HI_MMRBC_4K	0x3	e1000_hw.h
13507	PCIX_STATUS_HI_MMRBC_2K	0x2	e1000_hw.h
13508	PAUSE_SHIFT	5	e1000_hw.h
13509	SWDPIO_SHIFT	17	e1000_hw.h
13510	SWDPIO__EXT_SHIFT	4	e1000_hw.h
13511	ILOS_SHIFT	3	e1000_hw.h
13512	RECEIVE_BUFFER_ALIGN_SIZE	(256)	e1000_hw.h
13513	LINK_UP_TIMEOUT	500	e1000_hw.h
13514	MASTER_DISABLE_TIMEOUT	800	e1000_hw.h
13515	AUTO_READ_DONE_TIMEOUT	10	e1000_hw.h
13516	PHY_CFG_TIMEOUT	100	e1000_hw.h
13517	E1000_TX_BUFFER_SIZE	((uint32_t)1514)	e1000_hw.h
13518	CARRIER_EXTENSION	0x0F	e1000_hw.h
13519	E1000_CTRL_PHY_RESET_DIR	E1000_CTRL_SWDPIO0	e1000_hw.h
13520	E1000_CTRL_PHY_RESET	E1000_CTRL_SWDPIN0	e1000_hw.h
13521	E1000_CTRL_MDIO_DIR	E1000_CTRL_SWDPIO2	e1000_hw.h
13522	E1000_CTRL_MDIO	E1000_CTRL_SWDPIN2	e1000_hw.h
13523	E1000_CTRL_MDC_DIR	E1000_CTRL_SWDPIO3	e1000_hw.h
13524	E1000_CTRL_MDC	E1000_CTRL_SWDPIN3	e1000_hw.h
13525	E1000_CTRL_PHY_RESET_DIR4	E1000_CTRL_EXT_SDP4_DIR	e1000_hw.h
13526	E1000_CTRL_PHY_RESET4	E1000_CTRL_EXT_SDP4_DATA	e1000_hw.h
13527	PHY_CTRL	0x00	e1000_hw.h	Control Register
13528	PHY_STATUS	0x01	e1000_hw.h	Status Regiser
13529	PHY_ID1	0x02	e1000_hw.h	Phy Id Reg (word 1)
13530	PHY_ID2	0x03	e1000_hw.h	Phy Id Reg (word 2)
13531	PHY_AUTONEG_ADV	0x04	e1000_hw.h	Autoneg Advertisement
13532	PHY_LP_ABILITY	0x05	e1000_hw.h	Link Partner Ability (Base Page)
13533	PHY_AUTONEG_EXP	0x06	e1000_hw.h	Autoneg Expansion Reg
13534	PHY_NEXT_PAGE_TX	0x07	e1000_hw.h	Next Page TX
13535	PHY_LP_NEXT_PAGE	0x08	e1000_hw.h	Link Partner Next Page
13536	PHY_1000T_CTRL	0x09	e1000_hw.h	1000Base-T Control Reg
13537	PHY_1000T_STATUS	0x0A	e1000_hw.h	1000Base-T Status Reg
13538	PHY_EXT_STATUS	0x0F	e1000_hw.h	Extended Status Reg
13539	MAX_PHY_REG_ADDRESS	0x1F	e1000_hw.h	5 bit address bus (0-0x1F)
13540	MAX_PHY_MULTI_PAGE_REG	0xF	e1000_hw.h	Registers equal on all pages
13541	M88E1000_PHY_SPEC_CTRL	0x10	e1000_hw.h	PHY Specific Control Register
13542	M88E1000_PHY_SPEC_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
13543	M88E1000_INT_ENABLE	0x12	e1000_hw.h	Interrupt Enable Register
13544	M88E1000_INT_STATUS	0x13	e1000_hw.h	Interrupt Status Register
13545	M88E1000_EXT_PHY_SPEC_CTRL	0x14	e1000_hw.h	Extended PHY Specific Control
13546	M88E1000_RX_ERR_CNTR	0x15	e1000_hw.h	Receive Error Counter
13547	M88E1000_PHY_EXT_CTRL	0x1A	e1000_hw.h	PHY extend control register
13548	M88E1000_PHY_PAGE_SELECT	0x1D	e1000_hw.h	Reg 29 for page number setting
13549	M88E1000_PHY_GEN_CONTROL	0x1E	e1000_hw.h	Its meaning depends on reg 29
13550	M88E1000_PHY_VCO_REG_BIT8	0x100	e1000_hw.h	Bits 8 & 11 are adjusted for
13551	M88E1000_PHY_VCO_REG_BIT11	0x800	e1000_hw.h	improved BER performance
13552	IGP01E1000_IEEE_REGS_PAGE	0x0000	e1000_hw.h
13553	IGP01E1000_IEEE_RESTART_AUTONEG	0x3300	e1000_hw.h
13554	IGP01E1000_IEEE_FORCE_GIGA	0x0140	e1000_hw.h
13555	IGP01E1000_PHY_PORT_CONFIG	0x10	e1000_hw.h	PHY Specific Port Config Register
13556	IGP01E1000_PHY_PORT_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
13557	IGP01E1000_PHY_PORT_CTRL	0x12	e1000_hw.h	PHY Specific Control Register
13558	IGP01E1000_PHY_LINK_HEALTH	0x13	e1000_hw.h	PHY Link Health Register
13559	IGP01E1000_GMII_FIFO	0x14	e1000_hw.h	GMII FIFO Register
13560	IGP01E1000_PHY_CHANNEL_QUALITY	0x15	e1000_hw.h	PHY Channel Quality Register
13561	IGP02E1000_PHY_POWER_MGMT	0x19	e1000_hw.h
13562	IGP01E1000_PHY_PAGE_SELECT	0x1F	e1000_hw.h	PHY Page Select Core Register
13563	IGP01E1000_PHY_AGC_A	0x1172	e1000_hw.h
13564	IGP01E1000_PHY_AGC_B	0x1272	e1000_hw.h
13565	IGP01E1000_PHY_AGC_C	0x1472	e1000_hw.h
13566	IGP01E1000_PHY_AGC_D	0x1872	e1000_hw.h
13567	IGP02E1000_PHY_AGC_A	0x11B1	e1000_hw.h
13568	IGP02E1000_PHY_AGC_B	0x12B1	e1000_hw.h
13569	IGP02E1000_PHY_AGC_C	0x14B1	e1000_hw.h
13570	IGP02E1000_PHY_AGC_D	0x18B1	e1000_hw.h
13571	IGP01E1000_PHY_DSP_RESET	0x1F33	e1000_hw.h
13572	IGP01E1000_PHY_DSP_SET	0x1F71	e1000_hw.h
13573	IGP01E1000_PHY_DSP_FFE	0x1F35	e1000_hw.h
13574	IGP01E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
13575	IGP02E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
13576	IGP01E1000_PHY_AGC_PARAM_A	0x1171	e1000_hw.h
13577	IGP01E1000_PHY_AGC_PARAM_B	0x1271	e1000_hw.h
13578	IGP01E1000_PHY_AGC_PARAM_C	0x1471	e1000_hw.h
13579	IGP01E1000_PHY_AGC_PARAM_D	0x1871	e1000_hw.h
13580	IGP01E1000_PHY_EDAC_MU_INDEX	0xC000	e1000_hw.h
13581	IGP01E1000_PHY_EDAC_SIGN_EXT_9_	0x8000	e1000_hw.h
13582	IGP01E1000_PHY_ANALOG_TX_STATE	0x2890	e1000_hw.h
13583	IGP01E1000_PHY_ANALOG_CLASS_A	0x2000	e1000_hw.h
13584	IGP01E1000_PHY_FORCE_ANALOG_ENA	0x0004	e1000_hw.h
13585	IGP01E1000_PHY_DSP_FFE_CM_CP	0x0069	e1000_hw.h
13586	IGP01E1000_PHY_DSP_FFE_DEFAULT	0x002A	e1000_hw.h
13587	IGP01E1000_PHY_PCS_INIT_REG	0x00B4	e1000_hw.h
13588	IGP01E1000_PHY_PCS_CTRL_REG	0x00B5	e1000_hw.h
13589	IGP01E1000_ANALOG_REGS_PAGE	0x20C0	e1000_hw.h
13590	GG82563_PAGE_SHIFT	5	e1000_hw.h
13591	GG82563_MIN_ALT_REG	30	e1000_hw.h
13592	GG82563_PHY_SPEC_CTRL	GG82563_REG(0, 16)	e1000_hw.h	PHY Specific Control
13593	GG82563_PHY_SPEC_STATUS	GG82563_REG(0, 17)	e1000_hw.h	PHY Specific Status
13594	GG82563_PHY_INT_ENABLE	GG82563_REG(0, 18)	e1000_hw.h	Interrupt Enable
13595	GG82563_PHY_SPEC_STATUS_2	GG82563_REG(0, 19)	e1000_hw.h	PHY Specific Status 2
13596	GG82563_PHY_RX_ERR_CNTR	GG82563_REG(0, 21)	e1000_hw.h	Receive Error Counter
13597	GG82563_PHY_PAGE_SELECT	GG82563_REG(0, 22)	e1000_hw.h	Page Select
13598	GG82563_PHY_SPEC_CTRL_2	GG82563_REG(0, 26)	e1000_hw.h	PHY Specific Control 2
13599	GG82563_PHY_PAGE_SELECT_ALT	GG82563_REG(0, 29)	e1000_hw.h	Alternate Page Select
13600	GG82563_PHY_TEST_CLK_CTRL	GG82563_REG(0, 30)	e1000_hw.h	Test Clock Control (use reg. 29 to select)
13601	GG82563_PHY_MAC_SPEC_CTRL	GG82563_REG(2, 21)	e1000_hw.h	MAC Specific Control Register
13602	GG82563_PHY_MAC_SPEC_CTRL_2	GG82563_REG(2, 26)	e1000_hw.h	MAC Specific Control 2
13603	GG82563_PHY_DSP_DISTANCE	GG82563_REG(5, 26)	e1000_hw.h	DSP Distance
13604	GG82563_PHY_KMRN_MODE_CTRL	GG82563_REG(193, 16)	e1000_hw.h	Kumeran Mode Control
13605	GG82563_PHY_PORT_RESET	GG82563_REG(193, 17)	e1000_hw.h	Port Reset
13606	GG82563_PHY_REVISION_ID	GG82563_REG(193, 18)	e1000_hw.h	Revision ID
13607	GG82563_PHY_DEVICE_ID	GG82563_REG(193, 19)	e1000_hw.h	Device ID
13608	GG82563_PHY_PWR_MGMT_CTRL	GG82563_REG(193, 20)	e1000_hw.h	Power Management Control
13609	GG82563_PHY_RATE_ADAPT_CTRL	GG82563_REG(193, 25)	e1000_hw.h	Rate Adaptation Control
13610	GG82563_PHY_KMRN_FIFO_CTRL_STAT	GG82563_REG(194, 16)	e1000_hw.h	FIFO's Control/Status
13611	GG82563_PHY_KMRN_CTRL	GG82563_REG(194, 17)	e1000_hw.h	Control
13612	GG82563_PHY_INBAND_CTRL	GG82563_REG(194, 18)	e1000_hw.h	Inband Control
13613	GG82563_PHY_KMRN_DIAGNOSTIC	GG82563_REG(194, 19)	e1000_hw.h	Diagnostic
13614	GG82563_PHY_ACK_TIMEOUTS	GG82563_REG(194, 20)	e1000_hw.h	Acknowledge Timeouts
13615	GG82563_PHY_ADV_ABILITY	GG82563_REG(194, 21)	e1000_hw.h	Advertised Ability
13616	GG82563_PHY_LINK_PARTNER_ADV_AB	GG82563_REG(194, 23)	e1000_hw.h	Link Partner Advertised Ability
13617	GG82563_PHY_ADV_NEXT_PAGE	GG82563_REG(194, 24)	e1000_hw.h	Advertised Next Page
13618	GG82563_PHY_LINK_PARTNER_ADV_NE	GG82563_REG(194, 25)	e1000_hw.h	Link Partner Advertised Next page
13619	GG82563_PHY_KMRN_MISC	GG82563_REG(194, 26)	e1000_hw.h	Misc.
13620	MII_CR_SPEED_SELECT_MSB	0x0040	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
13621	MII_CR_COLL_TEST_ENABLE	0x0080	e1000_hw.h	Collision test enable
13622	MII_CR_FULL_DUPLEX	0x0100	e1000_hw.h	FDX =1, half duplex =0
13623	MII_CR_RESTART_AUTO_NEG	0x0200	e1000_hw.h	Restart auto negotiation
13624	MII_CR_ISOLATE	0x0400	e1000_hw.h	Isolate PHY from MII
13625	MII_CR_POWER_DOWN	0x0800	e1000_hw.h	Power down
13626	MII_CR_AUTO_NEG_EN	0x1000	e1000_hw.h	Auto Neg Enable
13627	MII_CR_SPEED_SELECT_LSB	0x2000	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
13628	MII_CR_LOOPBACK	0x4000	e1000_hw.h	0 = normal, 1 = loopback
13629	MII_CR_RESET	0x8000	e1000_hw.h	0 = normal, 1 = PHY reset
13630	MII_SR_EXTENDED_CAPS	0x0001	e1000_hw.h	Extended register capabilities
13631	MII_SR_JABBER_DETECT	0x0002	e1000_hw.h	Jabber Detected
13632	MII_SR_LINK_STATUS	0x0004	e1000_hw.h	Link Status 1 = link
13633	MII_SR_AUTONEG_CAPS	0x0008	e1000_hw.h	Auto Neg Capable
13634	MII_SR_REMOTE_FAULT	0x0010	e1000_hw.h	Remote Fault Detect
13635	MII_SR_AUTONEG_COMPLETE	0x0020	e1000_hw.h	Auto Neg Complete
13636	MII_SR_PREAMBLE_SUPPRESS	0x0040	e1000_hw.h	Preamble may be suppressed
13637	MII_SR_EXTENDED_STATUS	0x0100	e1000_hw.h	Ext. status info in Reg 0x0F
13638	MII_SR_100T2_HD_CAPS	0x0200	e1000_hw.h	100T2 Half Duplex Capable
13639	MII_SR_100T2_FD_CAPS	0x0400	e1000_hw.h	100T2 Full Duplex Capable
13640	MII_SR_10T_HD_CAPS	0x0800	e1000_hw.h	10T Half Duplex Capable
13641	MII_SR_10T_FD_CAPS	0x1000	e1000_hw.h	10T Full Duplex Capable
13642	MII_SR_100X_HD_CAPS	0x2000	e1000_hw.h	100X Half Duplex Capable
13643	MII_SR_100X_FD_CAPS	0x4000	e1000_hw.h	100X Full Duplex Capable
13644	MII_SR_100T4_CAPS	0x8000	e1000_hw.h	100T4 Capable
13645	NWAY_AR_SELECTOR_FIELD	0x0001	e1000_hw.h	indicates IEEE 802.3 CSMA/CD
13646	NWAY_AR_10T_HD_CAPS	0x0020	e1000_hw.h	10T Half Duplex Capable
13647	NWAY_AR_10T_FD_CAPS	0x0040	e1000_hw.h	10T Full Duplex Capable
13648	NWAY_AR_100TX_HD_CAPS	0x0080	e1000_hw.h	100TX Half Duplex Capable
13649	NWAY_AR_100TX_FD_CAPS	0x0100	e1000_hw.h	100TX Full Duplex Capable
13650	NWAY_AR_100T4_CAPS	0x0200	e1000_hw.h	100T4 Capable
13651	NWAY_AR_PAUSE	0x0400	e1000_hw.h	Pause operation desired
13652	NWAY_AR_ASM_DIR	0x0800	e1000_hw.h	Asymmetric Pause Direction bit
13653	NWAY_AR_REMOTE_FAULT	0x2000	e1000_hw.h	Remote Fault detected
13654	NWAY_AR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
13655	NWAY_LPAR_SELECTOR_FIELD	0x0000	e1000_hw.h	LP protocol selector field
13656	NWAY_LPAR_10T_HD_CAPS	0x0020	e1000_hw.h	LP is 10T Half Duplex Capable
13657	NWAY_LPAR_10T_FD_CAPS	0x0040	e1000_hw.h	LP is 10T Full Duplex Capable
13658	NWAY_LPAR_100TX_HD_CAPS	0x0080	e1000_hw.h	LP is 100TX Half Duplex Capable
13659	NWAY_LPAR_100TX_FD_CAPS	0x0100	e1000_hw.h	LP is 100TX Full Duplex Capable
13660	NWAY_LPAR_100T4_CAPS	0x0200	e1000_hw.h	LP is 100T4 Capable
13661	NWAY_LPAR_PAUSE	0x0400	e1000_hw.h	LP Pause operation desired
13662	NWAY_LPAR_ASM_DIR	0x0800	e1000_hw.h	LP Asymmetric Pause Direction bit
13663	NWAY_LPAR_REMOTE_FAULT	0x2000	e1000_hw.h	LP has detected Remote Fault
13664	NWAY_LPAR_ACKNOWLEDGE	0x4000	e1000_hw.h	LP has rx'd link code word
13665	NWAY_LPAR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
13666	NWAY_ER_LP_NWAY_CAPS	0x0001	e1000_hw.h	LP has Auto Neg Capability
13667	NWAY_ER_PAGE_RXD	0x0002	e1000_hw.h	LP is 10T Half Duplex Capable
13668	NWAY_ER_NEXT_PAGE_CAPS	0x0004	e1000_hw.h	LP is 10T Full Duplex Capable
13669	NWAY_ER_LP_NEXT_PAGE_CAPS	0x0008	e1000_hw.h	LP is 100TX Half Duplex Capable
13670	NWAY_ER_PAR_DETECT_FAULT	0x0010	e1000_hw.h	LP is 100TX Full Duplex Capable
13671	NPTX_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
13672	NPTX_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
13673	NPTX_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
13674	NPTX_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
13675	NPTX_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
13676	LP_RNPR_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
13677	LP_RNPR_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
13678	LP_RNPR_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
13679	LP_RNPR_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
13680	LP_RNPR_ACKNOWLDGE	0x4000	e1000_hw.h	1 = ACK / 0 = NO ACK
13681	LP_RNPR_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
13682	CR_1000T_ASYM_PAUSE	0x0080	e1000_hw.h	Advertise asymmetric pause bit
13683	CR_1000T_HD_CAPS	0x0100	e1000_hw.h	Advertise 1000T HD capability
13684	CR_1000T_FD_CAPS	0x0200	e1000_hw.h	Advertise 1000T FD capability
13685	CR_1000T_REPEATER_DTE	0x0400	e1000_hw.h	1=Repeater/switch device port
13686	CR_1000T_MS_VALUE	0x0800	e1000_hw.h	1=Configure PHY as Master
13687	CR_1000T_MS_ENABLE	0x1000	e1000_hw.h	1=Master/Slave manual config value
13688	CR_1000T_TEST_MODE_NORMAL	0x0000	e1000_hw.h	Normal Operation
13689	CR_1000T_TEST_MODE_1	0x2000	e1000_hw.h	Transmit Waveform test
13690	CR_1000T_TEST_MODE_2	0x4000	e1000_hw.h	Master Transmit Jitter test
13691	CR_1000T_TEST_MODE_3	0x6000	e1000_hw.h	Slave Transmit Jitter test
13692	CR_1000T_TEST_MODE_4	0x8000	e1000_hw.h	Transmitter Distortion test
13693	SR_1000T_IDLE_ERROR_CNT	0x00FF	e1000_hw.h	Num idle errors since last read
13694	SR_1000T_ASYM_PAUSE_DIR	0x0100	e1000_hw.h	LP asymmetric pause direction bit
13695	SR_1000T_LP_HD_CAPS	0x0400	e1000_hw.h	LP is 1000T HD capable
13696	SR_1000T_LP_FD_CAPS	0x0800	e1000_hw.h	LP is 1000T FD capable
13697	SR_1000T_REMOTE_RX_STATUS	0x1000	e1000_hw.h	Remote receiver OK
13698	SR_1000T_LOCAL_RX_STATUS	0x2000	e1000_hw.h	Local receiver OK
13699	SR_1000T_MS_CONFIG_RES	0x4000	e1000_hw.h	1=Local TX is Master, 0=Slave
13700	SR_1000T_MS_CONFIG_FAULT	0x8000	e1000_hw.h	Master/Slave config fault
13701	SR_1000T_REMOTE_RX_STATUS_SHIFT	12	e1000_hw.h
13702	SR_1000T_LOCAL_RX_STATUS_SHIFT	13	e1000_hw.h
13703	SR_1000T_PHY_EXCESSIVE_IDLE_ERR	5	e1000_hw.h
13704	FFE_IDLE_ERR_COUNT_TIMEOUT_20	20	e1000_hw.h
13705	FFE_IDLE_ERR_COUNT_TIMEOUT_100	100	e1000_hw.h
13706	IEEE_ESR_1000T_HD_CAPS	0x1000	e1000_hw.h	1000T HD capable
13707	IEEE_ESR_1000T_FD_CAPS	0x2000	e1000_hw.h	1000T FD capable
13708	IEEE_ESR_1000X_HD_CAPS	0x4000	e1000_hw.h	1000X HD capable
13709	IEEE_ESR_1000X_FD_CAPS	0x8000	e1000_hw.h	1000X FD capable
13710	PHY_TX_POLARITY_MASK	0x0100	e1000_hw.h	register 10h bit 8 (polarity bit)
13711	PHY_TX_NORMAL_POLARITY	0	e1000_hw.h	register 10h bit 8 (normal polarity)
13712	AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	register 11h bit 4
13713	M88E1000_PSCR_JABBER_DISABLE	0x0001	e1000_hw.h	1=Jabber Function disabled
13714	M88E1000_PSCR_POLARITY_REVERSAL	0x0002	e1000_hw.h	1=Polarity Reversal enabled
13715	M88E1000_PSCR_SQE_TEST	0x0004	e1000_hw.h	1=SQE Test enabled
13716	M88E1000_PSCR_CLK125_DISABLE	0x0010	e1000_hw.h	1=CLK125 low,
13717	M88E1000_PSCR_MDI_MANUAL_MODE	0x0000	e1000_hw.h	MDI Crossover Mode bits 6:5
13718	M88E1000_PSCR_MDIX_MANUAL_MODE	0x0020	e1000_hw.h	Manual MDIX configuration
13719	M88E1000_PSCR_AUTO_X_1000T	0x0040	e1000_hw.h	1000BASE-T: Auto crossover,
13720	M88E1000_PSCR_AUTO_X_MODE	0x0060	e1000_hw.h	Auto crossover enabled
13721	M88E1000_PSCR_10BT_EXT_DIST_ENA	0x0080	e1000_hw.h
13722	M88E1000_PSCR_MII_5BIT_ENABLE	0x0100	e1000_hw.h
13723	M88E1000_PSCR_SCRAMBLER_DISABLE	0x0200	e1000_hw.h	1=Scrambler disable
13724	M88E1000_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force link good
13725	M88E1000_PSCR_ASSERT_CRS_ON_TX	0x0800	e1000_hw.h	1=Assert CRS on Transmit
13726	M88E1000_PSCR_POLARITY_REVERSAL	1	e1000_hw.h
13727	M88E1000_PSCR_AUTO_X_MODE_SHIFT	5	e1000_hw.h
13728	M88E1000_PSCR_10BT_EXT_DIST_ENA	7	e1000_hw.h
13729	M88E1000_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
13730	M88E1000_PSSR_REV_POLARITY	0x0002	e1000_hw.h	1=Polarity reversed
13731	M88E1000_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshifted
13732	M88E1000_PSSR_MDIX	0x0040	e1000_hw.h	1=MDIX; 0=MDI
13733	M88E1000_PSSR_CABLE_LENGTH	0x0380	e1000_hw.h	0=<50M;1=50-80M;2=80-110M;
13734	M88E1000_PSSR_LINK	0x0400	e1000_hw.h	1=Link up, 0=Link down
13735	M88E1000_PSSR_SPD_DPLX_RESOLVED	0x0800	e1000_hw.h	1=Speed & Duplex resolved
13736	M88E1000_PSSR_PAGE_RCVD	0x1000	e1000_hw.h	1=Page received
13737	M88E1000_PSSR_DPLX	0x2000	e1000_hw.h	1=Duplex 0=Half Duplex
13738	M88E1000_PSSR_SPEED	0xC000	e1000_hw.h	Speed, bits 14:15
13739	M88E1000_PSSR_10MBS	0x0000	e1000_hw.h	00=10Mbs
13740	M88E1000_PSSR_100MBS	0x4000	e1000_hw.h	01=100Mbs
13741	M88E1000_PSSR_1000MBS	0x8000	e1000_hw.h	10=1000Mbs
13742	M88E1000_PSSR_REV_POLARITY_SHIF	1	e1000_hw.h
13743	M88E1000_PSSR_DOWNSHIFT_SHIFT	5	e1000_hw.h
13744	M88E1000_PSSR_MDIX_SHIFT	6	e1000_hw.h
13745	M88E1000_PSSR_CABLE_LENGTH_SHIF	7	e1000_hw.h
13746	M88E1000_EPSCR_FIBER_LOOPBACK	0x4000	e1000_hw.h	1=Fiber loopback
13747	M88E1000_EPSCR_DOWN_NO_IDLE	0x8000	e1000_hw.h	1=Lost lock detect enabled.
13748	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
13749	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0000	e1000_hw.h
13750	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0400	e1000_hw.h
13751	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0800	e1000_hw.h
13752	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
13753	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
13754	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0000	e1000_hw.h
13755	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0100	e1000_hw.h
13756	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0200	e1000_hw.h
13757	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
13758	M88E1000_EPSCR_TX_CLK_2_5	0x0060	e1000_hw.h	2.5 MHz TX_CLK
13759	M88E1000_EPSCR_TX_CLK_25	0x0070	e1000_hw.h	25 MHz TX_CLK
13760	M88E1000_EPSCR_TX_CLK_0	0x0000	e1000_hw.h	NO TX_CLK
13761	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
13762	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0000	e1000_hw.h
13763	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0200	e1000_hw.h
13764	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0400	e1000_hw.h
13765	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0600	e1000_hw.h
13766	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0800	e1000_hw.h
13767	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0A00	e1000_hw.h
13768	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0C00	e1000_hw.h
13769	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
13770	IGP01E1000_PSCFR_AUTO_MDIX_PAR_	0x0010	e1000_hw.h
13771	IGP01E1000_PSCFR_PRE_EN	0x0020	e1000_hw.h
13772	IGP01E1000_PSCFR_SMART_SPEED	0x0080	e1000_hw.h
13773	IGP01E1000_PSCFR_DISABLE_TPLOOP	0x0100	e1000_hw.h
13774	IGP01E1000_PSCFR_DISABLE_JABBER	0x0400	e1000_hw.h
13775	IGP01E1000_PSCFR_DISABLE_TRANSM	0x2000	e1000_hw.h
13776	IGP01E1000_PSSR_AUTONEG_FAILED	0x0001	e1000_hw.h	RO LH SC
13777	IGP01E1000_PSSR_POLARITY_REVERS	0x0002	e1000_hw.h
13778	IGP01E1000_PSSR_CABLE_LENGTH	0x007C	e1000_hw.h
13779	IGP01E1000_PSSR_FULL_DUPLEX	0x0200	e1000_hw.h
13780	IGP01E1000_PSSR_LINK_UP	0x0400	e1000_hw.h
13781	IGP01E1000_PSSR_MDIX	0x0800	e1000_hw.h
13782	IGP01E1000_PSSR_SPEED_MASK	0xC000	e1000_hw.h	speed bits mask
13783	IGP01E1000_PSSR_SPEED_10MBPS	0x4000	e1000_hw.h
13784	IGP01E1000_PSSR_SPEED_100MBPS	0x8000	e1000_hw.h
13785	IGP01E1000_PSSR_SPEED_1000MBPS	0xC000	e1000_hw.h
13786	IGP01E1000_PSSR_CABLE_LENGTH_SH	0x0002	e1000_hw.h	shift right 2
13787	IGP01E1000_PSSR_MDIX_SHIFT	0x000B	e1000_hw.h	shift right 11
13788	IGP01E1000_PSCR_TP_LOOPBACK	0x0010	e1000_hw.h
13789	IGP01E1000_PSCR_CORRECT_NC_SCMB	0x0200	e1000_hw.h
13790	IGP01E1000_PSCR_TEN_CRS_SELECT	0x0400	e1000_hw.h
13791	IGP01E1000_PSCR_FLIP_CHIP	0x0800	e1000_hw.h
13792	IGP01E1000_PSCR_AUTO_MDIX	0x1000	e1000_hw.h
13793	IGP01E1000_PSCR_FORCE_MDI_MDIX	0x2000	e1000_hw.h	0-MDI, 1-MDIX
13794	IGP01E1000_PLHR_SS_DOWNGRADE	0x8000	e1000_hw.h
13795	IGP01E1000_PLHR_GIG_SCRAMBLER_E	0x4000	e1000_hw.h
13796	IGP01E1000_PLHR_MASTER_FAULT	0x2000	e1000_hw.h
13797	IGP01E1000_PLHR_MASTER_RESOLUTI	0x1000	e1000_hw.h
13798	IGP01E1000_PLHR_GIG_REM_RCVR_NO	0x0800	e1000_hw.h	LH
13799	IGP01E1000_PLHR_IDLE_ERROR_CNT_	0x0400	e1000_hw.h	LH
13800	IGP01E1000_PLHR_DATA_ERR_1	0x0200	e1000_hw.h	LH
13801	IGP01E1000_PLHR_DATA_ERR_0	0x0100	e1000_hw.h
13802	IGP01E1000_PLHR_AUTONEG_FAULT	0x0040	e1000_hw.h
13803	IGP01E1000_PLHR_AUTONEG_ACTIVE	0x0010	e1000_hw.h
13804	IGP01E1000_PLHR_VALID_CHANNEL_D	0x0008	e1000_hw.h
13805	IGP01E1000_PLHR_VALID_CHANNEL_C	0x0004	e1000_hw.h
13806	IGP01E1000_PLHR_VALID_CHANNEL_B	0x0002	e1000_hw.h
13807	IGP01E1000_PLHR_VALID_CHANNEL_A	0x0001	e1000_hw.h
13808	IGP01E1000_MSE_CHANNEL_D	0x000F	e1000_hw.h
13809	IGP01E1000_MSE_CHANNEL_C	0x00F0	e1000_hw.h
13810	IGP01E1000_MSE_CHANNEL_B	0x0F00	e1000_hw.h
13811	IGP01E1000_MSE_CHANNEL_A	0xF000	e1000_hw.h
13812	IGP02E1000_PM_SPD	0x0001	e1000_hw.h	Smart Power Down
13813	IGP02E1000_PM_D3_LPLU	0x0004	e1000_hw.h	Enable LPLU in non-D0a modes
13814	IGP02E1000_PM_D0_LPLU	0x0002	e1000_hw.h	Enable LPLU in D0a mode
13815	DSP_RESET_ENABLE	0x0	e1000_hw.h
13816	DSP_RESET_DISABLE	0x2	e1000_hw.h
13817	E1000_MAX_DSP_RESETS	10	e1000_hw.h
13818	IGP01E1000_AGC_LENGTH_SHIFT	7	e1000_hw.h	Coarse - 13:11, Fine - 10:7
13819	IGP02E1000_AGC_LENGTH_SHIFT	9	e1000_hw.h	Coarse - 15:13, Fine - 12:9
13820	IGP02E1000_AGC_LENGTH_MASK	0x7F	e1000_hw.h
13821	IGP01E1000_AGC_LENGTH_TABLE_SIZ	128	e1000_hw.h
13822	IGP02E1000_AGC_LENGTH_TABLE_SIZ	113	e1000_hw.h
13823	IGP01E1000_AGC_RANGE	10	e1000_hw.h
13824	IGP02E1000_AGC_RANGE	15	e1000_hw.h
13825	IGP01E1000_PHY_POLARITY_MASK	0x0078	e1000_hw.h
13826	IGP01E1000_GMII_FLEX_SPD	0x10	e1000_hw.h	Enable flexible speed
13827	IGP01E1000_GMII_SPD	0x20	e1000_hw.h	Enable SPD
13828	IGP01E1000_ANALOG_SPARE_FUSE_ST	0x20D1	e1000_hw.h
13829	IGP01E1000_ANALOG_FUSE_STATUS	0x20D0	e1000_hw.h
13830	IGP01E1000_ANALOG_FUSE_CONTROL	0x20DC	e1000_hw.h
13831	IGP01E1000_ANALOG_FUSE_BYPASS	0x20DE	e1000_hw.h
13832	IGP01E1000_ANALOG_FUSE_POLY_MAS	0xF000	e1000_hw.h
13833	IGP01E1000_ANALOG_FUSE_FINE_MAS	0x0F80	e1000_hw.h
13834	IGP01E1000_ANALOG_FUSE_COARSE_M	0x0070	e1000_hw.h
13835	IGP01E1000_ANALOG_SPARE_FUSE_EN	0x0100	e1000_hw.h
13836	IGP01E1000_ANALOG_FUSE_ENABLE_S	0x0002	e1000_hw.h
13837	IGP01E1000_ANALOG_FUSE_COARSE_T	0x0040	e1000_hw.h
13838	IGP01E1000_ANALOG_FUSE_COARSE_1	0x0010	e1000_hw.h
13839	IGP01E1000_ANALOG_FUSE_FINE_1	0x0080	e1000_hw.h
13840	IGP01E1000_ANALOG_FUSE_FINE_10	0x0500	e1000_hw.h
13841	GG82563_PSCR_DISABLE_JABBER	0x0001	e1000_hw.h	1=Disable Jabber
13842	GG82563_PSCR_POLARITY_REVERSAL_	0x0002	e1000_hw.h	1=Polarity Reversal Disabled
13843	GG82563_PSCR_POWER_DOWN	0x0004	e1000_hw.h	1=Power Down
13844	GG82563_PSCR_COPPER_TRANSMITER_	0x0008	e1000_hw.h	1=Transmitter Disabled
13845	GG82563_PSCR_CROSSOVER_MODE_MAS	0x0060	e1000_hw.h
13846	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0000	e1000_hw.h	00=Manual MDI configuration
13847	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0020	e1000_hw.h	01=Manual MDIX configuration
13848	GG82563_PSCR_CROSSOVER_MODE_AUT	0x0060	e1000_hw.h	11=Automatic crossover
13849	GG82563_PSCR_ENALBE_EXTENDED_DI	0x0080	e1000_hw.h	1=Enable Extended Distance
13850	GG82563_PSCR_ENERGY_DETECT_MASK	0x0300	e1000_hw.h
13851	GG82563_PSCR_ENERGY_DETECT_OFF	0x0000	e1000_hw.h	00,01=Off
13852	GG82563_PSCR_ENERGY_DETECT_RX	0x0200	e1000_hw.h	10=Sense on Rx only (Energy Detect)
13853	GG82563_PSCR_ENERGY_DETECT_RX_T	0x0300	e1000_hw.h	11=Sense and Tx NLP
13854	GG82563_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force Link Good
13855	GG82563_PSCR_DOWNSHIFT_ENABLE	0x0800	e1000_hw.h	1=Enable Downshift
13856	GG82563_PSCR_DOWNSHIFT_COUNTER_	0x7000	e1000_hw.h
13857	GG82563_PSCR_DOWNSHIFT_COUNTER_	12	e1000_hw.h
13858	GG82563_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
13859	GG82563_PSSR_POLARITY	0x0002	e1000_hw.h	1=Polarity Reversed
13860	GG82563_PSSR_LINK	0x0008	e1000_hw.h	1=Link is Up
13861	GG82563_PSSR_ENERGY_DETECT	0x0010	e1000_hw.h	1=Sleep, 0=Active
13862	GG82563_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshift
13863	GG82563_PSSR_CROSSOVER_STATUS	0x0040	e1000_hw.h	1=MDIX, 0=MDI
13864	GG82563_PSSR_RX_PAUSE_ENABLED	0x0100	e1000_hw.h	1=Receive Pause Enabled
13865	GG82563_PSSR_TX_PAUSE_ENABLED	0x0200	e1000_hw.h	1=Transmit Pause Enabled
13866	GG82563_PSSR_LINK_UP	0x0400	e1000_hw.h	1=Link Up
13867	GG82563_PSSR_SPEED_DUPLEX_RESOL	0x0800	e1000_hw.h	1=Resolved
13868	GG82563_PSSR_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
13869	GG82563_PSSR_DUPLEX	0x2000	e1000_hw.h	1-Full-Duplex
13870	GG82563_PSSR_SPEED_MASK	0xC000	e1000_hw.h
13871	GG82563_PSSR_SPEED_10MBPS	0x0000	e1000_hw.h	00=10Mbps
13872	GG82563_PSSR_SPEED_100MBPS	0x4000	e1000_hw.h	01=100Mbps
13873	GG82563_PSSR_SPEED_1000MBPS	0x8000	e1000_hw.h	10=1000Mbps
13874	GG82563_PSSR2_JABBER	0x0001	e1000_hw.h	1=Jabber
13875	GG82563_PSSR2_POLARITY_CHANGED	0x0002	e1000_hw.h	1=Polarity Changed
13876	GG82563_PSSR2_ENERGY_DETECT_CHA	0x0010	e1000_hw.h	1=Energy Detect Changed
13877	GG82563_PSSR2_DOWNSHIFT_INTERRU	0x0020	e1000_hw.h	1=Downshift Detected
13878	GG82563_PSSR2_MDI_CROSSOVER_CHA	0x0040	e1000_hw.h	1=Crossover Changed
13879	GG82563_PSSR2_FALSE_CARRIER	0x0100	e1000_hw.h	1=False Carrier
13880	GG82563_PSSR2_SYMBOL_ERROR	0x0200	e1000_hw.h	1=Symbol Error
13881	GG82563_PSSR2_LINK_STATUS_CHANG	0x0400	e1000_hw.h	1=Link Status Changed
13882	GG82563_PSSR2_AUTO_NEG_COMPLETE	0x0800	e1000_hw.h	1=Auto-Neg Completed
13883	GG82563_PSSR2_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
13884	GG82563_PSSR2_DUPLEX_CHANGED	0x2000	e1000_hw.h	1=Duplex Changed
13885	GG82563_PSSR2_SPEED_CHANGED	0x4000	e1000_hw.h	1=Speed Changed
13886	GG82563_PSSR2_AUTO_NEG_ERROR	0x8000	e1000_hw.h	1=Auto-Neg Error
13887	GG82563_PSCR2_10BT_POLARITY_FOR	0x0002	e1000_hw.h	1=Force Negative Polarity
13888	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h
13889	GG82563_PSCR2_1000MB_TEST_SELEC	0x0000	e1000_hw.h	00,01=Normal Operation
13890	GG82563_PSCR2_1000MB_TEST_SELEC	0x0008	e1000_hw.h	10=Select 112ns Sequence
13891	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h	11=Select 16ns Sequence
13892	GG82563_PSCR2_REVERSE_AUTO_NEG	0x2000	e1000_hw.h	1=Reverse Auto-Negotiation
13893	GG82563_PSCR2_1000BT_DISABLE	0x4000	e1000_hw.h	1=Disable 1000BASE-T
13894	GG82563_PSCR2_TRANSMITER_TYPE_M	0x8000	e1000_hw.h
13895	GG82563_PSCR2_TRANSMITTER_TYPE_	0x0000	e1000_hw.h	0=Class B
13896	GG82563_PSCR2_TRANSMITTER_TYPE_	0x8000	e1000_hw.h	1=Class A
13897	GG82563_MSCR_TX_CLK_MASK	0x0007	e1000_hw.h
13898	GG82563_MSCR_TX_CLK_10MBPS_2_5M	0x0004	e1000_hw.h
13899	GG82563_MSCR_TX_CLK_100MBPS_25M	0x0005	e1000_hw.h
13900	GG82563_MSCR_TX_CLK_1000MBPS_2_	0x0006	e1000_hw.h
13901	GG82563_MSCR_TX_CLK_1000MBPS_25	0x0007	e1000_hw.h
13902	GG82563_MSCR_ASSERT_CRS_ON_TX	0x0010	e1000_hw.h	1=Assert
13903	GG82563_DSPD_CABLE_LENGTH	0x0007	e1000_hw.h	0 = <50M;
13904	GG82563_KMCR_PHY_LEDS_EN	0x0020	e1000_hw.h	1=PHY LEDs, 0=Kumeran Inband LEDs
13905	GG82563_KMCR_FORCE_LINK_UP	0x0040	e1000_hw.h	1=Force Link Up
13906	GG82563_KMCR_SUPPRESS_SGMII_EPD	0x0080	e1000_hw.h
13907	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h
13908	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h	1=6.25MHz, 0=0.8MHz
13909	GG82563_KMCR_PASS_FALSE_CARRIER	0x0800	e1000_hw.h
13910	GG82563_PMCR_ENABLE_ELECTRICAL_	0x0001	e1000_hw.h	1=Enalbe SERDES Electrical Idle
13911	GG82563_PMCR_DISABLE_PORT	0x0002	e1000_hw.h	1=Disable Port
13912	GG82563_PMCR_DISABLE_SERDES	0x0004	e1000_hw.h	1=Disable SERDES
13913	GG82563_PMCR_REVERSE_AUTO_NEG	0x0008	e1000_hw.h	1=Enable Reverse Auto-Negotiation
13914	GG82563_PMCR_DISABLE_1000_NON_D	0x0010	e1000_hw.h	1=Disable 1000Mbps Auto-Neg in non D0
13915	GG82563_PMCR_DISABLE_1000	0x0020	e1000_hw.h	1=Disable 1000Mbps Auto-Neg Always
13916	GG82563_PMCR_REVERSE_AUTO_NEG_D	0x0040	e1000_hw.h	1=Enable D0a Reverse Auto-Negotiation
13917	GG82563_PMCR_FORCE_POWER_STATE	0x0080	e1000_hw.h	1=Force Power State
13918	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h
13919	GG82563_PMCR_PROGRAMMED_POWER_S	0x0000	e1000_hw.h	00=Dr
13920	GG82563_PMCR_PROGRAMMED_POWER_S	0x0100	e1000_hw.h	01=D0u
13921	GG82563_PMCR_PROGRAMMED_POWER_S	0x0200	e1000_hw.h	10=D0a
13922	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h	11=D3
13923	GG82563_ICR_DIS_PADDING	0x0010	e1000_hw.h	Disable Padding Use
13924	M88_VENDOR	0x0141	e1000_hw.h
13925	M88E1000_E_PHY_ID	0x01410C50	e1000_hw.h
13926	M88E1000_I_PHY_ID	0x01410C30	e1000_hw.h
13927	M88E1011_I_PHY_ID	0x01410C20	e1000_hw.h
13928	IGP01E1000_I_PHY_ID	0x02A80380	e1000_hw.h
13929	M88E1000_12_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
13930	M88E1000_14_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
13931	M88E1011_I_REV_4	0x04	e1000_hw.h
13932	M88E1111_I_PHY_ID	0x01410CC0	e1000_hw.h
13933	L1LXT971A_PHY_ID	0x001378E0	e1000_hw.h
13934	GG82563_E_PHY_ID	0x01410CA0	e1000_hw.h
13935	PHY_PAGE_SHIFT	5	e1000_hw.h
13936	IGP3_PHY_PORT_CTRL	PHY_REG(769, 17)	e1000_hw.h	Port General Configuration
13937	IGP3_PHY_RATE_ADAPT_CTRL	PHY_REG(769, 25)	e1000_hw.h	Rate Adapter Control Register
13938	IGP3_KMRN_FIFO_CTRL_STATS	PHY_REG(770, 16)	e1000_hw.h	KMRN FIFO's control/status register
13939	IGP3_KMRN_POWER_MNG_CTRL	PHY_REG(770, 17)	e1000_hw.h	KMRN Power Management Control Register
13940	IGP3_KMRN_INBAND_CTRL	PHY_REG(770, 18)	e1000_hw.h	KMRN Inband Control Register
13941	IGP3_KMRN_DIAG	PHY_REG(770, 19)	e1000_hw.h	KMRN Diagnostic register
13942	IGP3_KMRN_DIAG_PCS_LOCK_LOSS	0x0002	e1000_hw.h	RX PCS is not synced
13943	IGP3_KMRN_ACK_TIMEOUT	PHY_REG(770, 20)	e1000_hw.h	KMRN Acknowledge Timeouts register
13944	IGP3_VR_CTRL	PHY_REG(776, 18)	e1000_hw.h	Voltage regulator control register
13945	IGP3_VR_CTRL_MODE_SHUT	0x0200	e1000_hw.h	Enter powerdown, shutdown VRs
13946	IGP3_VR_CTRL_MODE_MASK	0x0300	e1000_hw.h	Shutdown VR Mask
13947	IGP3_CAPABILITY	PHY_REG(776, 19)	e1000_hw.h	IGP3 Capability Register
13948	IGP3_CAP_INITIATE_TEAM	0x0001	e1000_hw.h	Able to initiate a team
13949	IGP3_CAP_WFM	0x0002	e1000_hw.h	Support WoL and PXE
13950	IGP3_CAP_ASF	0x0004	e1000_hw.h	Support ASF
13951	IGP3_CAP_LPLU	0x0008	e1000_hw.h	Support Low Power Link Up
13952	IGP3_CAP_DC_AUTO_SPEED	0x0010	e1000_hw.h	Support AC/DC Auto Link Speed
13953	IGP3_CAP_SPD	0x0020	e1000_hw.h	Support Smart Power Down
13954	IGP3_CAP_MULT_QUEUE	0x0040	e1000_hw.h	Support 2 tx & 2 rx queues
13955	IGP3_CAP_RSS	0x0080	e1000_hw.h	Support RSS
13956	IGP3_CAP_8021PQ	0x0100	e1000_hw.h	Support 802.1Q & 802.1p
13957	IGP3_CAP_AMT_CB	0x0200	e1000_hw.h	Support active manageability and circuit breaker
13958	IGP3_PPC_JORDAN_EN	0x0001	e1000_hw.h
13959	IGP3_PPC_JORDAN_GIGA_SPEED	0x0002	e1000_hw.h
13960	IGP3_KMRN_PMC_EE_IDLE_LINK_DIS	0x0001	e1000_hw.h
13961	IGP3_KMRN_PMC_K0S_ENTRY_LATENCY	0x001E	e1000_hw.h
13962	IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA	0x0020	e1000_hw.h
13963	IGP3_KMRN_PMC_K0S_MODE1_EN_100	0x0040	e1000_hw.h
13964	IGP3E1000_PHY_MISC_CTRL	0x1B	e1000_hw.h	Misc. Ctrl register
13965	IGP3_PHY_MISC_DUPLEX_MANUAL_SET	0x1000	e1000_hw.h	Duplex Manual Set
13966	IGP3_KMRN_EXT_CTRL	PHY_REG(770, 18)	e1000_hw.h
13967	IGP3_KMRN_EC_DIS_INBAND	0x0080	e1000_hw.h
13968	IGP03E1000_E_PHY_ID	0x02A80390	e1000_hw.h
13969	IFE_E_PHY_ID	0x02A80330	e1000_hw.h	10/100 PHY
13970	IFE_PLUS_E_PHY_ID	0x02A80320	e1000_hw.h
13971	IFE_C_E_PHY_ID	0x02A80310	e1000_hw.h
13972	IFE_PHY_EXTENDED_STATUS_CONTROL	0x10	e1000_hw.h	100BaseTx Extended Status, Control and Address
13973	IFE_PHY_SPECIAL_CONTROL	0x11	e1000_hw.h	100BaseTx PHY special control register
13974	IFE_PHY_RCV_FALSE_CARRIER	0x13	e1000_hw.h	100BaseTx Receive False Carrier Counter
13975	IFE_PHY_RCV_DISCONNECT	0x14	e1000_hw.h	100BaseTx Receive Disconnet Counter
13976	IFE_PHY_RCV_ERROT_FRAME	0x15	e1000_hw.h	100BaseTx Receive Error Frame Counter
13977	IFE_PHY_RCV_SYMBOL_ERR	0x16	e1000_hw.h	Receive Symbol Error Counter
13978	IFE_PHY_PREM_EOF_ERR	0x17	e1000_hw.h	100BaseTx Receive Premature End Of Frame Error Counter
13979	IFE_PHY_RCV_EOF_ERR	0x18	e1000_hw.h	10BaseT Receive End Of Frame Error Counter
13980	IFE_PHY_TX_JABBER_DETECT	0x19	e1000_hw.h	10BaseT Transmit Jabber Detect Counter
13981	IFE_PHY_EQUALIZER	0x1A	e1000_hw.h	PHY Equalizer Control and Status
13982	IFE_PHY_SPECIAL_CONTROL_LED	0x1B	e1000_hw.h	PHY special control and LED configuration
13983	IFE_PHY_MDIX_CONTROL	0x1C	e1000_hw.h	MDI/MDI-X Control register
13984	IFE_PHY_HWI_CONTROL	0x1D	e1000_hw.h	Hardware Integrity Control (HWI)
13985	IFE_PESC_REDUCED_POWER_DOWN_DIS	0x2000	e1000_hw.h	Defaut 1 = Disable auto reduced power down
13986	IFE_PESC_100BTX_POWER_DOWN	0x0400	e1000_hw.h	Indicates the power state of 100BASE-TX
13987	IFE_PESC_10BTX_POWER_DOWN	0x0200	e1000_hw.h	Indicates the power state of 10BASE-T
13988	IFE_PESC_POLARITY_REVERSED	0x0100	e1000_hw.h	Indicates 10BASE-T polarity
13989	IFE_PESC_PHY_ADDR_MASK	0x007C	e1000_hw.h	Bit 6:2 for sampled PHY address
13990	IFE_PESC_SPEED	0x0002	e1000_hw.h	Auto-negotiation speed result 1=100Mbs, 0=10Mbs
13991	IFE_PESC_DUPLEX	0x0001	e1000_hw.h	Auto-negotiation duplex result 1=Full, 0=Half
13992	IFE_PESC_POLARITY_REVERSED_SHIF	8	e1000_hw.h
13993	IFE_PSC_DISABLE_DYNAMIC_POWER_D	0x0100	e1000_hw.h	1 = Dyanmic Power Down disabled
13994	IFE_PSC_FORCE_POLARITY	0x0020	e1000_hw.h	1=Reversed Polarity, 0=Normal
13995	IFE_PSC_AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	1=Auto Polarity Disabled, 0=Enabled
13996	IFE_PSC_JABBER_FUNC_DISABLE	0x0001	e1000_hw.h	1=Jabber Disabled, 0=Normal Jabber Operation
13997	IFE_PSC_FORCE_POLARITY_SHIFT	5	e1000_hw.h
13998	IFE_PSC_AUTO_POLARITY_DISABLE_S	4	e1000_hw.h
13999	IFE_PMC_AUTO_MDIX	0x0080	e1000_hw.h	1=enable MDI/MDI-X feature, default 0=disabled
14000	IFE_PMC_FORCE_MDIX	0x0040	e1000_hw.h	1=force MDIX-X, 0=force MDI
14001	IFE_PMC_MDIX_STATUS	0x0020	e1000_hw.h	1=MDI-X, 0=MDI
14002	IFE_PMC_AUTO_MDIX_COMPLETE	0x0010	e1000_hw.h	Resolution algorithm is completed
14003	IFE_PMC_MDIX_MODE_SHIFT	6	e1000_hw.h
14004	IFE_PHC_MDIX_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable auto MDI-X
14005	IFE_PHC_HWI_ENABLE	0x8000	e1000_hw.h	Enable the HWI feature
14006	IFE_PHC_ABILITY_CHECK	0x4000	e1000_hw.h	1= Test Passed, 0=failed
14007	IFE_PHC_TEST_EXEC	0x2000	e1000_hw.h	PHY launch test pulses on the wire
14008	IFE_PHC_HIGHZ	0x0200	e1000_hw.h	1 = Open Circuit
14009	IFE_PHC_LOWZ	0x0400	e1000_hw.h	1 = Short Circuit
14010	IFE_PHC_LOW_HIGH_Z_MASK	0x0600	e1000_hw.h	Mask for indication type of problem on the line
14011	IFE_PHC_DISTANCE_MASK	0x01FF	e1000_hw.h	Mask for distance to the cable problem, in 80cm granularity
14012	IFE_PHC_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable HWI
14013	IFE_PSCL_PROBE_MODE	0x0020	e1000_hw.h	LED Probe mode
14014	IFE_PSCL_PROBE_LEDS_OFF	0x0006	e1000_hw.h	Force LEDs 0 and 2 off
14015	IFE_PSCL_PROBE_LEDS_ON	0x0007	e1000_hw.h	Force LEDs 0 and 2 on
14016	ICH_FLASH_COMMAND_TIMEOUT	5000	e1000_hw.h	5000 uSecs - adjusted
14017	ICH_FLASH_ERASE_TIMEOUT	3000000	e1000_hw.h	Up to 3 seconds - worst case
14018	ICH_FLASH_CYCLE_REPEAT_COUNT	10	e1000_hw.h	10 cycles
14019	ICH_FLASH_SEG_SIZE_256	256	e1000_hw.h
14020	ICH_FLASH_SEG_SIZE_4K	4096	e1000_hw.h
14021	ICH_FLASH_SEG_SIZE_64K	65536	e1000_hw.h
14022	ICH_CYCLE_READ	0x0	e1000_hw.h
14023	ICH_CYCLE_RESERVED	0x1	e1000_hw.h
14024	ICH_CYCLE_WRITE	0x2	e1000_hw.h
14025	ICH_CYCLE_ERASE	0x3	e1000_hw.h
14026	ICH_FLASH_GFPREG	0x0000	e1000_hw.h
14027	ICH_FLASH_HSFSTS	0x0004	e1000_hw.h
14028	ICH_FLASH_HSFCTL	0x0006	e1000_hw.h
14029	ICH_FLASH_FADDR	0x0008	e1000_hw.h
14030	ICH_FLASH_FDATA0	0x0010	e1000_hw.h
14031	ICH_FLASH_FRACC	0x0050	e1000_hw.h
14032	ICH_FLASH_FREG0	0x0054	e1000_hw.h
14033	ICH_FLASH_FREG1	0x0058	e1000_hw.h
14034	ICH_FLASH_FREG2	0x005C	e1000_hw.h
14035	ICH_FLASH_FREG3	0x0060	e1000_hw.h
14036	ICH_FLASH_FPR0	0x0074	e1000_hw.h
14037	ICH_FLASH_FPR1	0x0078	e1000_hw.h
14038	ICH_FLASH_SSFSTS	0x0090	e1000_hw.h
14039	ICH_FLASH_SSFCTL	0x0092	e1000_hw.h
14040	ICH_FLASH_PREOP	0x0094	e1000_hw.h
14041	ICH_FLASH_OPTYPE	0x0096	e1000_hw.h
14042	ICH_FLASH_OPMENU	0x0098	e1000_hw.h
14043	ICH_FLASH_REG_MAPSIZE	0x00A0	e1000_hw.h
14044	ICH_FLASH_SECTOR_SIZE	4096	e1000_hw.h
14045	ICH_GFPREG_BASE_MASK	0x1FFF	e1000_hw.h
14046	ICH_FLASH_LINEAR_ADDR_MASK	0x00FFFFFF	e1000_hw.h
14047	PHY_PREAMBLE	0xFFFFFFFF	e1000_hw.h
14048	PHY_SOF	0x01	e1000_hw.h
14049	PHY_OP_READ	0x02	e1000_hw.h
14050	PHY_OP_WRITE	0x01	e1000_hw.h
14051	PHY_TURNAROUND	0x02	e1000_hw.h
14052	PHY_PREAMBLE_SIZE	32	e1000_hw.h
14053	MII_CR_SPEED_1000	0x0040	e1000_hw.h
14054	MII_CR_SPEED_100	0x2000	e1000_hw.h
14055	MII_CR_SPEED_10	0x0000	e1000_hw.h
14056	E1000_PHY_ADDRESS	0x01	e1000_hw.h
14057	PHY_AUTO_NEG_TIME	45	e1000_hw.h	4.5 Seconds
14058	PHY_FORCE_TIME	20	e1000_hw.h	2.0 Seconds
14059	PHY_REVISION_MASK	0xFFFFFFF0	e1000_hw.h
14060	DEVICE_SPEED_MASK	0x00000300	e1000_hw.h	Device Ctrl Reg Speed Mask
14061	REG4_SPEED_MASK	0x01E0	e1000_hw.h
14062	REG9_SPEED_MASK	0x0300	e1000_hw.h
14063	ADVERTISE_10_HALF	0x0001	e1000_hw.h
14064	ADVERTISE_10_FULL	0x0002	e1000_hw.h
14065	ADVERTISE_100_HALF	0x0004	e1000_hw.h
14066	ADVERTISE_100_FULL	0x0008	e1000_hw.h
14067	ADVERTISE_1000_HALF	0x0010	e1000_hw.h
14068	ADVERTISE_1000_FULL	0x0020	e1000_hw.h
14069	AUTONEG_ADVERTISE_SPEED_DEFAULT	0x002F	e1000_hw.h	Everything but 1000-Half
14070	AUTONEG_ADVERTISE_10_100_ALL	0x000F	e1000_hw.h	All 10/100 speeds
14071	AUTONEG_ADVERTISE_10_ALL	0x0003	e1000_hw.h	10Mbps Full & Half speeds
14072	DEBUGOUT2	DEBUGOUT1	e1000_osdep.h
14073	DEBUGOUT3	DEBUGOUT1	e1000_osdep.h
14074	DEBUGOUT7	DEBUGOUT1	e1000_osdep.h
14075	E1000_READ_REG_ARRAY_DWORD	E1000_READ_REG_ARRAY	e1000_osdep.h
14076	E1000_WRITE_REG_ARRAY_DWORD	E1000_WRITE_REG_ARRAY	e1000_osdep.h
14077	PHN_MAX_NUM_PORTS	4	phantom.c
14078	PHN_CMDPEG_INIT_TIMEOUT_SEC	50	phantom.c
14079	PHN_RCVPEG_INIT_TIMEOUT_SEC	2	phantom.c
14080	PHN_ISSUE_CMD_TIMEOUT_MS	2000	phantom.c
14081	PHN_TEST_MEM_TIMEOUT_MS	100	phantom.c
14082	PHN_CLP_CMD_TIMEOUT_MS	500	phantom.c
14083	PHN_LINK_POLL_FREQUENCY	4096	phantom.c
14084	PHN_NUM_RDS	32	phantom.c
14085	PHN_RDS_MAX_FILL	16	phantom.c
14086	PHN_RX_BUFSIZE	( 32 + \ ETH_FRAME_LEN )	phantom.c
14087	PHN_NUM_SDS	32	phantom.c
14088	PHN_NUM_CDS	8	phantom.c
14089	PHN_CLP_TAG_MAGIC	0xc19c1900UL	phantom.c
14090	PHN_CLP_TAG_MAGIC_MASK	0xffffff00UL	phantom.c
14091	PHN_CLP_BLKSIZE	( sizeof ( union phantom_clp_data ) )	phantom.c
14092	NX_CDRP_CLEAR	0x00000000	nxhal_nic_interface.h
14093	NX_CDRP_CMD_BIT	0x80000000	nxhal_nic_interface.h
14094	NX_CDRP_RSP_OK	0x00000001	nxhal_nic_interface.h
14095	NX_CDRP_RSP_FAIL	0x00000002	nxhal_nic_interface.h
14096	NX_CDRP_RSP_TIMEOUT	0x00000003	nxhal_nic_interface.h
14097	NX_CDRP_CMD_SUBMIT_CAPABILITIES	0x00000001	nxhal_nic_interface.h
14098	NX_CDRP_CMD_READ_MAX_RDS_PER_CT	0x00000002	nxhal_nic_interface.h
14099	NX_CDRP_CMD_READ_MAX_SDS_PER_CT	0x00000003	nxhal_nic_interface.h
14100	NX_CDRP_CMD_READ_MAX_RULES_PER_	0x00000004	nxhal_nic_interface.h
14101	NX_CDRP_CMD_READ_MAX_RX_CTX	0x00000005	nxhal_nic_interface.h
14102	NX_CDRP_CMD_READ_MAX_TX_CTX	0x00000006	nxhal_nic_interface.h
14103	NX_CDRP_CMD_CREATE_RX_CTX	0x00000007	nxhal_nic_interface.h
14104	NX_CDRP_CMD_DESTROY_RX_CTX	0x00000008	nxhal_nic_interface.h
14105	NX_CDRP_CMD_CREATE_TX_CTX	0x00000009	nxhal_nic_interface.h
14106	NX_CDRP_CMD_DESTROY_TX_CTX	0x0000000a	nxhal_nic_interface.h
14107	NX_CDRP_CMD_SETUP_STATISTICS	0x0000000e	nxhal_nic_interface.h
14108	NX_CDRP_CMD_GET_STATISTICS	0x0000000f	nxhal_nic_interface.h
14109	NX_CDRP_CMD_DELETE_STATISTICS	0x00000010	nxhal_nic_interface.h
14110	NX_CDRP_CMD_MAX	0x00000011	nxhal_nic_interface.h
14111	NX_CAP0_LEGACY_CONTEXT	NX_CAP_BIT(0, 0)	nxhal_nic_interface.h
14112	NX_CAP0_MULTI_CONTEXT	NX_CAP_BIT(0, 1)	nxhal_nic_interface.h
14113	NX_CAP0_LEGACY_MN	NX_CAP_BIT(0, 2)	nxhal_nic_interface.h
14114	NX_CAP0_LEGACY_MS	NX_CAP_BIT(0, 3)	nxhal_nic_interface.h
14115	NX_CAP0_CUT_THROUGH	NX_CAP_BIT(0, 4)	nxhal_nic_interface.h
14116	NX_CAP0_LRO	NX_CAP_BIT(0, 5)	nxhal_nic_interface.h
14117	NX_CAP0_LSO	NX_CAP_BIT(0, 6)	nxhal_nic_interface.h
14118	NX_CAP1_NIC	NX_CAP_BIT(1, 0)	nxhal_nic_interface.h
14119	NX_CAP1_PXE	NX_CAP_BIT(1, 1)	nxhal_nic_interface.h
14120	NX_CAP1_CHIMNEY	NX_CAP_BIT(1, 2)	nxhal_nic_interface.h
14121	NX_CAP1_LSA	NX_CAP_BIT(1, 3)	nxhal_nic_interface.h
14122	NX_CAP1_RDMA	NX_CAP_BIT(1, 4)	nxhal_nic_interface.h
14123	NX_CAP1_ISCSI	NX_CAP_BIT(1, 5)	nxhal_nic_interface.h
14124	NX_CAP1_FCOE	NX_CAP_BIT(1, 6)	nxhal_nic_interface.h
14125	NX_RX_RULETYPE_DEFAULT	0	nxhal_nic_interface.h
14126	NX_RX_RULETYPE_MAC	1	nxhal_nic_interface.h
14127	NX_RX_RULETYPE_MAC_VLAN	2	nxhal_nic_interface.h
14128	NX_RX_RULETYPE_MAC_RSS	3	nxhal_nic_interface.h
14129	NX_RX_RULETYPE_MAC_VLAN_RSS	4	nxhal_nic_interface.h
14130	NX_RX_RULETYPE_MAX	5	nxhal_nic_interface.h
14131	NX_RX_RULECMD_ADD	0	nxhal_nic_interface.h
14132	NX_RX_RULECMD_REMOVE	1	nxhal_nic_interface.h
14133	NX_RX_RULECMD_MAX	2	nxhal_nic_interface.h
14134	NX_HOST_CTX_STATE_FREED	0	nxhal_nic_interface.h	Invalid state
14135	NX_HOST_CTX_STATE_ALLOCATED	1	nxhal_nic_interface.h	Not committed
14136	NX_HOST_CTX_STATE_ACTIVE	2	nxhal_nic_interface.h
14137	NX_HOST_CTX_STATE_DISABLED	3	nxhal_nic_interface.h
14138	NX_HOST_CTX_STATE_QUIESCED	4	nxhal_nic_interface.h
14139	NX_HOST_CTX_STATE_MAX	5	nxhal_nic_interface.h
14140	NX_HOST_INT_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h
14141	NX_HOST_INT_CRB_MODE_SHARED	1	nxhal_nic_interface.h	<= LEGACY
14142	NX_HOST_INT_CRB_MODE_NORX	2	nxhal_nic_interface.h
14143	NX_HOST_INT_CRB_MODE_NOTX	3	nxhal_nic_interface.h
14144	NX_HOST_INT_CRB_MODE_NORXTX	4	nxhal_nic_interface.h
14145	NX_DESTROY_CTX_RESET	0	nxhal_nic_interface.h
14146	NX_DESTROY_CTX_D3_RESET	1	nxhal_nic_interface.h
14147	NX_DESTROY_CTX_MAX	2	nxhal_nic_interface.h
14148	NX_HOST_RDS_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h	<= LEGACY
14149	NX_HOST_RDS_CRB_MODE_SHARED	1	nxhal_nic_interface.h
14150	NX_HOST_RDS_CRB_MODE_CUSTOM	2	nxhal_nic_interface.h
14151	NX_HOST_RDS_CRB_MODE_MAX	3	nxhal_nic_interface.h
14152	NX_RDS_RING_TYPE_NORMAL	0	nxhal_nic_interface.h
14153	NX_RDS_RING_TYPE_JUMBO	1	nxhal_nic_interface.h
14154	NX_RDS_RING_TYPE_LRO	2	nxhal_nic_interface.h
14155	NX_RDS_RING_TYPE_MAX	3	nxhal_nic_interface.h
14156	NX_STATISTICS_MODE_INVALID	0	nxhal_nic_interface.h
14157	NX_STATISTICS_MODE_PULL	1	nxhal_nic_interface.h
14158	NX_STATISTICS_MODE_PUSH	2	nxhal_nic_interface.h
14159	NX_STATISTICS_MODE_SINGLE_SHOT	3	nxhal_nic_interface.h
14160	NX_STATISTICS_MODE_MAX	4	nxhal_nic_interface.h
14161	NX_STATISTICS_TYPE_INVALID	0	nxhal_nic_interface.h
14162	NX_STATISTICS_TYPE_NIC_RX_CORE	1	nxhal_nic_interface.h
14163	NX_STATISTICS_TYPE_NIC_TX_CORE	2	nxhal_nic_interface.h
14164	NX_STATISTICS_TYPE_NIC_RX_ALL	3	nxhal_nic_interface.h
14165	NX_STATISTICS_TYPE_NIC_TX_ALL	4	nxhal_nic_interface.h
14166	NX_STATISTICS_TYPE_MAX	5	nxhal_nic_interface.h
14167	NXHAL_VERSION	1	phantom.h
14168	UNM_DMA_BUFFER_ALIGN	16	phantom.h
14169	__unm_dma_aligned	__attribute__ (( aligned ( UNM_DMA_BUFFER_ALIGN ) ))	phantom.h
14170	UNM_128M_CRB_WINDOW	0x6110210UL	phantom.h
14171	UNM_32M_CRB_WINDOW	0x0110210UL	phantom.h
14172	UNM_2M_CRB_WINDOW	0x0130060UL	phantom.h
14173	UNM_CRB_PCIE	UNM_CRB_BASE ( UNM_CRB_BLK_PCIE )	phantom.h
14174	UNM_PCIE_SEM2_LOCK	( UNM_CRB_PCIE + 0x1c010 )	phantom.h
14175	UNM_PCIE_SEM2_UNLOCK	( UNM_CRB_PCIE + 0x1c014 )	phantom.h
14176	UNM_CRB_CAM	UNM_CRB_BASE ( UNM_CRB_BLK_CAM )	phantom.h
14177	UNM_CAM_RAM	( UNM_CRB_CAM + 0x02000 )	phantom.h
14178	UNM_CAM_RAM_PORT_MODE	( UNM_CAM_RAM + 0x00024 )	phantom.h
14179	UNM_CAM_RAM_PORT_MODE_AUTO_NEG	4	phantom.h
14180	UNM_CAM_RAM_PORT_MODE_AUTO_NEG_	5	phantom.h
14181	UNM_CAM_RAM_DMESG_SIG_MAGIC	0xcafebabeUL	phantom.h
14182	UNM_CAM_RAM_NUM_DMESG_BUFFERS	5	phantom.h
14183	UNM_CAM_RAM_CLP_COMMAND	( UNM_CAM_RAM + 0x000c0 )	phantom.h
14184	UNM_CAM_RAM_CLP_COMMAND_LAST	0x00000080UL	phantom.h
14185	UNM_CAM_RAM_CLP_DATA_LO	( UNM_CAM_RAM + 0x000c4 )	phantom.h
14186	UNM_CAM_RAM_CLP_DATA_HI	( UNM_CAM_RAM + 0x000c8 )	phantom.h
14187	UNM_CAM_RAM_CLP_STATUS	( UNM_CAM_RAM + 0x000cc )	phantom.h
14188	UNM_CAM_RAM_CLP_STATUS_START	0x00000001UL	phantom.h
14189	UNM_CAM_RAM_CLP_STATUS_DONE	0x00000002UL	phantom.h
14190	UNM_CAM_RAM_CLP_STATUS_ERROR	0x0000ff00UL	phantom.h
14191	UNM_CAM_RAM_CLP_STATUS_UNINITIA	0xffffffffUL	phantom.h
14192	UNM_CAM_RAM_BOOT_ENABLE	( UNM_CAM_RAM + 0x000fc )	phantom.h
14193	UNM_CAM_RAM_WOL_PORT_MODE	( UNM_CAM_RAM + 0x00198 )	phantom.h
14194	UNM_CAM_RAM_MAC_ADDRS	( UNM_CAM_RAM + 0x001c0 )	phantom.h
14195	UNM_CAM_RAM_COLD_BOOT	( UNM_CAM_RAM + 0x001fc )	phantom.h
14196	UNM_CAM_RAM_COLD_BOOT_MAGIC	0x55555555UL	phantom.h
14197	UNM_NIC_REG	( UNM_CRB_CAM + 0x02200 )	phantom.h
14198	UNM_NIC_REG_NX_CDRP	( UNM_NIC_REG + 0x00018 )	phantom.h
14199	UNM_NIC_REG_NX_ARG1	( UNM_NIC_REG + 0x0001c )	phantom.h
14200	UNM_NIC_REG_NX_ARG2	( UNM_NIC_REG + 0x00020 )	phantom.h
14201	UNM_NIC_REG_NX_ARG3	( UNM_NIC_REG + 0x00024 )	phantom.h
14202	UNM_NIC_REG_NX_SIGN	( UNM_NIC_REG + 0x00028 )	phantom.h
14203	UNM_NIC_REG_DUMMY_BUF_ADDR_HI	( UNM_NIC_REG + 0x0003c )	phantom.h
14204	UNM_NIC_REG_DUMMY_BUF_ADDR_LO	( UNM_NIC_REG + 0x00040 )	phantom.h
14205	UNM_NIC_REG_CMDPEG_STATE	( UNM_NIC_REG + 0x00050 )	phantom.h
14206	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xff01	phantom.h
14207	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xf00f	phantom.h
14208	UNM_NIC_REG_DUMMY_BUF	( UNM_NIC_REG + 0x000fc )	phantom.h
14209	UNM_NIC_REG_DUMMY_BUF_INIT	0	phantom.h
14210	UNM_NIC_REG_XG_STATE_P3	( UNM_NIC_REG + 0x00098 )	phantom.h
14211	UNM_NIC_REG_XG_STATE_P3_LINK_UP	0x01	phantom.h
14212	UNM_NIC_REG_XG_STATE_P3_LINK_DO	0x02	phantom.h
14213	UNM_NIC_REG_RCVPEG_STATE	( UNM_NIC_REG + 0x0013c )	phantom.h
14214	UNM_NIC_REG_RCVPEG_STATE_INITIA	0xff01	phantom.h
14215	UNM_NIC_REG_SW_INT_MASK_0	( UNM_NIC_REG + 0x001d8 )	phantom.h
14216	UNM_NIC_REG_SW_INT_MASK_1	( UNM_NIC_REG + 0x001e0 )	phantom.h
14217	UNM_NIC_REG_SW_INT_MASK_2	( UNM_NIC_REG + 0x001e4 )	phantom.h
14218	UNM_NIC_REG_SW_INT_MASK_3	( UNM_NIC_REG + 0x001e8 )	phantom.h
14219	UNM_CRB_ROMUSB	UNM_CRB_BASE ( UNM_CRB_BLK_ROMUSB )	phantom.h
14220	UNM_ROMUSB_GLB	( UNM_CRB_ROMUSB + 0x00000 )	phantom.h
14221	UNM_ROMUSB_GLB_STATUS	( UNM_ROMUSB_GLB + 0x00004 )	phantom.h
14222	UNM_ROMUSB_GLB_STATUS_ROM_DONE	( 1 << 1 )	phantom.h
14223	UNM_ROMUSB_GLB_SW_RESET	( UNM_ROMUSB_GLB + 0x00008 )	phantom.h
14224	UNM_ROMUSB_GLB_SW_RESET_MAGIC	0x0080000fUL	phantom.h
14225	UNM_ROMUSB_GLB_PEGTUNE_DONE	( UNM_ROMUSB_GLB + 0x0005c )	phantom.h
14226	UNM_ROMUSB_GLB_PEGTUNE_DONE_MAG	0x31	phantom.h
14227	UNM_ROMUSB_ROM	( UNM_CRB_ROMUSB + 0x10000 )	phantom.h
14228	UNM_ROMUSB_ROM_INSTR_OPCODE	( UNM_ROMUSB_ROM + 0x00004 )	phantom.h
14229	UNM_ROMUSB_ROM_ADDRESS	( UNM_ROMUSB_ROM + 0x00008 )	phantom.h
14230	UNM_ROMUSB_ROM_WDATA	( UNM_ROMUSB_ROM + 0x0000c )	phantom.h
14231	UNM_ROMUSB_ROM_ABYTE_CNT	( UNM_ROMUSB_ROM + 0x00010 )	phantom.h
14232	UNM_ROMUSB_ROM_DUMMY_BYTE_CNT	( UNM_ROMUSB_ROM + 0x00014 )	phantom.h
14233	UNM_ROMUSB_ROM_RDATA	( UNM_ROMUSB_ROM + 0x00018 )	phantom.h
14234	UNM_CRB_TEST	UNM_CRB_BASE ( UNM_CRB_BLK_TEST )	phantom.h
14235	UNM_TEST_CONTROL	( UNM_CRB_TEST + 0x00090 )	phantom.h
14236	UNM_TEST_CONTROL_START	0x01	phantom.h
14237	UNM_TEST_CONTROL_ENABLE	0x02	phantom.h
14238	UNM_TEST_CONTROL_BUSY	0x08	phantom.h
14239	UNM_TEST_ADDR_LO	( UNM_CRB_TEST + 0x00094 )	phantom.h
14240	UNM_TEST_ADDR_HI	( UNM_CRB_TEST + 0x00098 )	phantom.h
14241	UNM_TEST_RDDATA_LO	( UNM_CRB_TEST + 0x000a8 )	phantom.h
14242	UNM_TEST_RDDATA_HI	( UNM_CRB_TEST + 0x000ac )	phantom.h
14243	UNM_CRB_PEG_0	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_0 )	phantom.h
14244	UNM_PEG_0_HALT_STATUS	( UNM_CRB_PEG_0 + 0x00030 )	phantom.h
14245	UNM_PEG_0_HALT	( UNM_CRB_PEG_0 + 0x0003c )	phantom.h
14246	UNM_CRB_PEG_1	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_1 )	phantom.h
14247	UNM_PEG_1_HALT_STATUS	( UNM_CRB_PEG_1 + 0x00030 )	phantom.h
14248	UNM_PEG_1_HALT	( UNM_CRB_PEG_1 + 0x0003c )	phantom.h
14249	UNM_CRB_PEG_2	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_2 )	phantom.h
14250	UNM_PEG_2_HALT_STATUS	( UNM_CRB_PEG_2 + 0x00030 )	phantom.h
14251	UNM_PEG_2_HALT	( UNM_CRB_PEG_2 + 0x0003c )	phantom.h
14252	UNM_CRB_PEG_3	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_3 )	phantom.h
14253	UNM_PEG_3_HALT_STATUS	( UNM_CRB_PEG_3 + 0x00030 )	phantom.h
14254	UNM_PEG_3_HALT	( UNM_CRB_PEG_3 + 0x0003c )	phantom.h
14255	UNM_CRB_PEG_4	UNM_CRB_BASE ( UNM_CRB_BLK_PEG_4 )	phantom.h
14256	UNM_PEG_4_HALT_STATUS	( UNM_CRB_PEG_4 + 0x00030 )	phantom.h
14257	UNM_PEG_4_HALT	( UNM_CRB_PEG_4 + 0x0003c )	phantom.h
14258	READLINE_MAX	256	readline.c
14259	ERRFILE	0	strerror.c
14260	INPUT_DELAY	200	kb.c	half-blocking delay timer resolution (ms)
14261	INPUT_DELAY_TIMEOUT	1000	kb.c	half-blocking delay timeout
14262	MIN_SPACE_SIZE	2	slk.c
14263	SLK_MAX_LABEL_LEN	8	slk.c
14264	SLK_MAX_NUM_LABELS	12	slk.c
14265	SLK_MAX_NUM_SPACES	2	slk.c
14266	WRAP	0	mucurses.h
14267	NOWRAP	1	mucurses.h
14268	EDITBOX_MIN_CHARS	3	editbox.c
14269	CPAIR_NORMAL	1	login_ui.c
14270	CPAIR_LABEL	2	login_ui.c
14271	CPAIR_EDITBOX	3	login_ui.c
14272	USERNAME_LABEL_ROW	8	login_ui.c
14273	USERNAME_ROW	10	login_ui.c
14274	PASSWORD_LABEL_ROW	14	login_ui.c
14275	PASSWORD_ROW	16	login_ui.c
14276	LABEL_COL	36	login_ui.c
14277	EDITBOX_COL	30	login_ui.c
14278	EDITBOX_WIDTH	20	login_ui.c
14279	CPAIR_NORMAL	1	settings_ui.c
14280	CPAIR_SELECT	2	settings_ui.c
14281	CPAIR_EDIT	3	settings_ui.c
14282	CPAIR_ALERT	4	settings_ui.c
14283	TITLE_ROW	1	settings_ui.c
14284	SETTINGS_LIST_ROW	3	settings_ui.c
14285	SETTINGS_LIST_COL	1	settings_ui.c
14286	INFO_ROW	20	settings_ui.c
14287	ALERT_ROW	20	settings_ui.c
14288	INSTRUCTION_ROW	22	settings_ui.c
14289	INSTRUCTION_PAD	" "	settings_ui.c
14290	NUM_SETTINGS	( ( unsigned ) ( all_settings_end - all_settings ) )	settings_ui.c
14291	ASSERTING	0	assert.h
14292	ASSERTING	1	assert.h
14293	NON_STANDARD_BOOTP_SERVER	1067	bootp.h
14294	NON_STANDARD_BOOTP_CLIENT	1068	bootp.h
14295	BOOTP_SERVER	NON_STANDARD_BOOTP_SERVER	bootp.h
14296	BOOTP_SERVER	67	bootp.h
14297	BOOTP_CLIENT	NON_STANDARD_BOOTP_CLIENT	bootp.h
14298	BOOTP_CLIENT	68	bootp.h
14299	PROXYDHCP_SERVER	4011	bootp.h	For PXE
14300	BOOTP_REQUEST	1	bootp.h
14301	BOOTP_REPLY	2	bootp.h
14302	RFC1533_COOKIE	99, 130, 83, 99	bootp.h
14303	RFC1533_PAD	0	bootp.h
14304	RFC1533_NETMASK	1	bootp.h
14305	RFC1533_TIMEOFFSET	2	bootp.h
14306	RFC1533_GATEWAY	3	bootp.h
14307	RFC1533_TIMESERVER	4	bootp.h
14308	RFC1533_IEN116NS	5	bootp.h
14309	RFC1533_DNS	6	bootp.h
14310	RFC1533_LOGSERVER	7	bootp.h
14311	RFC1533_COOKIESERVER	8	bootp.h
14312	RFC1533_LPRSERVER	9	bootp.h
14313	RFC1533_IMPRESSSERVER	10	bootp.h
14314	RFC1533_RESOURCESERVER	11	bootp.h
14315	RFC1533_HOSTNAME	12	bootp.h
14316	RFC1533_BOOTFILESIZE	13	bootp.h
14317	RFC1533_MERITDUMPFILE	14	bootp.h
14318	RFC1533_DOMAINNAME	15	bootp.h
14319	RFC1533_SWAPSERVER	16	bootp.h
14320	RFC1533_ROOTPATH	17	bootp.h
14321	RFC1533_EXTENSIONPATH	18	bootp.h
14322	RFC1533_IPFORWARDING	19	bootp.h
14323	RFC1533_IPSOURCEROUTING	20	bootp.h
14324	RFC1533_IPPOLICYFILTER	21	bootp.h
14325	RFC1533_IPMAXREASSEMBLY	22	bootp.h
14326	RFC1533_IPTTL	23	bootp.h
14327	RFC1533_IPMTU	24	bootp.h
14328	RFC1533_IPMTUPLATEAU	25	bootp.h
14329	RFC1533_INTMTU	26	bootp.h
14330	RFC1533_INTLOCALSUBNETS	27	bootp.h
14331	RFC1533_INTBROADCAST	28	bootp.h
14332	RFC1533_INTICMPDISCOVER	29	bootp.h
14333	RFC1533_INTICMPRESPOND	30	bootp.h
14334	RFC1533_INTROUTEDISCOVER	31	bootp.h
14335	RFC1533_INTROUTESOLICIT	32	bootp.h
14336	RFC1533_INTSTATICROUTES	33	bootp.h
14337	RFC1533_LLTRAILERENCAP	34	bootp.h
14338	RFC1533_LLARPCACHETMO	35	bootp.h
14339	RFC1533_LLETHERNETENCAP	36	bootp.h
14340	RFC1533_TCPTTL	37	bootp.h
14341	RFC1533_TCPKEEPALIVETMO	38	bootp.h
14342	RFC1533_TCPKEEPALIVEGB	39	bootp.h
14343	RFC1533_NISDOMAIN	40	bootp.h
14344	RFC1533_NISSERVER	41	bootp.h
14345	RFC1533_NTPSERVER	42	bootp.h
14346	RFC1533_VENDOR	43	bootp.h
14347	RFC1533_NBNS	44	bootp.h
14348	RFC1533_NBDD	45	bootp.h
14349	RFC1533_NBNT	46	bootp.h
14350	RFC1533_NBSCOPE	47	bootp.h
14351	RFC1533_XFS	48	bootp.h
14352	RFC1533_XDM	49	bootp.h
14353	RFC2132_REQ_ADDR	50	bootp.h
14354	RFC2132_MSG_TYPE	53	bootp.h
14355	RFC2132_SRV_ID	54	bootp.h
14356	RFC2132_PARAM_LIST	55	bootp.h
14357	RFC2132_MAX_SIZE	57	bootp.h
14358	RFC2132_VENDOR_CLASS_ID	60	bootp.h
14359	RFC2132_CLIENT_ID	61	bootp.h
14360	RFC2132_TFTP_SERVER_NAME	66	bootp.h
14361	RFC2132_BOOTFILE_NAME	67	bootp.h
14362	RFC3004_USER_CLASS	77	bootp.h
14363	RFC3679_PXE_CLIENT_ARCH	93	bootp.h
14364	RFC3679_PXE_CLIENT_NDI	94	bootp.h
14365	RFC3679_PXE_CLIENT_UUID	97	bootp.h
14366	RFC3679_PXE_CLIENT_ARCH_LENGTH	2	bootp.h
14367	RFC3679_PXE_CLIENT_NDI_LENGTH	3	bootp.h
14368	RFC3679_PXE_CLIENT_UUID_LENGTH	17	bootp.h
14369	RFC3679_PXE_CLIENT_ARCH_IAX86PC	0,0	bootp.h
14370	RFC3679_PXE_CLIENT_ARCH_NECPC98	0,1	bootp.h
14371	RFC3679_PXE_CLIENT_ARCH_IA64PC	0,2	bootp.h
14372	RFC3679_PXE_CLIENT_ARCH_DECALPH	0,3	bootp.h
14373	RFC3679_PXE_CLIENT_ARCH_ARCX86	0,4	bootp.h
14374	RFC3679_PXE_CLIENT_ARCH_INTELLE	0,5	bootp.h
14375	RFC3679_PXE_CLIENT_NDI_21	1,2,1	bootp.h
14376	RFC3679_PXE_CLIENT_UUID_TYPE	0	bootp.h
14377	RFC3679_PXE_CLIENT_UUID_DEFAULT	RFC3679_PXE_CLIENT_UUID_TYPE, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF	bootp.h
14378	RFC2132_VENDOR_CLASS_ID_PXE_LEN	32	bootp.h
14379	RFC2132_VENDOR_CLASS_ID_PXE	'P','X','E','C','l','i','e','n','t',':', \ 'A','r','c','h',':','0','0','0','0','0',':', \ 'U','N','D','I',':','0','0','2','0'	bootp.h
14380	RFC1533_VENDOR_PXE_OPT128	128	bootp.h
14381	RFC1533_VENDOR_PXE_OPT129	129	bootp.h
14382	RFC1533_VENDOR_PXE_OPT130	130	bootp.h
14383	RFC1533_VENDOR_PXE_OPT131	131	bootp.h
14384	RFC1533_VENDOR_PXE_OPT132	132	bootp.h
14385	RFC1533_VENDOR_PXE_OPT133	133	bootp.h
14386	RFC1533_VENDOR_PXE_OPT134	134	bootp.h
14387	RFC1533_VENDOR_PXE_OPT135	135	bootp.h
14388	DHCPDISCOVER	1	bootp.h
14389	DHCPOFFER	2	bootp.h
14390	DHCPREQUEST	3	bootp.h
14391	DHCPACK	5	bootp.h
14392	RFC1533_VENDOR_MAJOR	0	bootp.h
14393	RFC1533_VENDOR_MINOR	0	bootp.h
14394	RFC1533_VENDOR_MAGIC	128	bootp.h
14395	RFC1533_VENDOR_ADDPARM	129	bootp.h
14396	RFC1533_VENDOR_ETHDEV	130	bootp.h
14397	RFC1533_VENDOR_ETHERBOOT_ENCAP	150	bootp.h
14398	RFC1533_VENDOR_HOWTO	132	bootp.h
14399	RFC1533_VENDOR_KERNEL_ENV	133	bootp.h
14400	RFC1533_VENDOR_NIC_DEV_ID	175	bootp.h
14401	RFC1533_VENDOR_ARCH	177	bootp.h
14402	RFC1533_END	255	bootp.h
14403	BOOTP_VENDOR_LEN	64	bootp.h
14404	DHCP_OPT_LEN	312	bootp.h
14405	u32	unsigned int	btext.h
14406	u16	unsigned short	btext.h
14407	u8	unsigned char	btext.h
14408	BOOTX_COLORTABLE_SIZE	(256UL3UL2UL)	btext.h
14409	CMDL_BUFFER_SIZE	256	cmdlinelib.h
14410	CMDL_PROMPT_SIZE	8	cmdlinelib.h
14411	CMDL_MAX_TAB_COMPLETE_RESULT	256	cmdlinelib.h
14412	NULL	((void *)0)	cmdlinelib.h
14413	F_RELFLG	0x0001	coff.h	If set, not reloc. info. Clear for executables
14414	F_EXEC	0x0002	coff.h	No unresolved symbols. Executable file !
14415	F_LNNO	0x0004	coff.h	If set, line information numbers removed
14416	F_LSYMS	0x0008	coff.h	If set, local symbols removed
14417	F_AR32WR	0x0100	coff.h	Indicates little endian file
14418	EM_E1	0x17a	coff.h	Magic number for Hyperstone. Big endian format
14419	O_MAGIC	0x017c	coff.h	Optional's header magic number for Hyperstone
14420	S_TYPE_TEXT	0x0020	coff.h	If set, the section contains only executable
14421	S_TYPE_DATA	0x0040	coff.h	If set, the section contains only initialized data
14422	S_TYPE_BSS	0x0080	coff.h	If set, the section is BSS no data stored
14423	OBJECT_SYMBOL	PREFIX_OBJECT(obj_)	compiler.h
14424	OBJECT_SYMBOL_STR	_XSTR ( OBJECT_SYMBOL )	compiler.h
14425	DEBUG_SYMBOL	PREFIX_OBJECT(debug_)	compiler.h
14426	DEBUG_SYMBOL_STR	_XSTR ( DEBUG_SYMBOL )	compiler.h
14427	DBGLVL_MAX	DEBUG_SYMBOL	compiler.h
14428	DBGLVL_MAX	0	compiler.h
14429	DBGLVL	( DBGLVL_MAX & ~__debug_disable )	compiler.h
14430	DBGLVL	0	compiler.h
14431	DBGLVL_LOG	1	compiler.h
14432	DBG_LOG	( DBGLVL & DBGLVL_LOG )	compiler.h
14433	DBGLVL_EXTRA	2	compiler.h
14434	DBG_EXTRA	( DBGLVL & DBGLVL_EXTRA )	compiler.h
14435	DBGLVL_PROFILE	4	compiler.h
14436	DBG_PROFILE	( DBGLVL & DBGLVL_PROFILE )	compiler.h
14437	DBGLVL_IO	8	compiler.h
14438	DBG_IO	( DBGLVL & DBGLVL_IO )	compiler.h
14439	ERRFILE	PREFIX_OBJECT ( ERRFILE_ )	compiler.h
14440	PACKED	__attribute__ (( packed ))	compiler.h
14441	__unused	__attribute__ (( unused ))	compiler.h
14442	__pure	__attribute__ (( pure ))	compiler.h
14443	__const	__attribute__ (( const ))	compiler.h
14444	__nonnull	__attribute__ (( nonnull ))	compiler.h
14445	__malloc	__attribute__ (( malloc ))	compiler.h
14446	__used	__attribute__ (( used ))	compiler.h
14447	__aligned	__attribute__ (( aligned ( 16 ) ))	compiler.h
14448	__always_inline	__attribute__ (( always_inline ))	compiler.h
14449	__shared	__asm__ ( "_shared_bss" ) __aligned	compiler.h
14450	__console_driver	__table ( struct console_driver, console, 01 )	console.h
14451	ERR	(-1)	curses.h
14452	FALSE	(0)	curses.h
14453	OK	(0)	curses.h
14454	TRUE	(1)	curses.h
14455	stdscr	( &_stdscr )	curses.h
14456	COLS	_COLS	curses.h
14457	LINES	_LINES	curses.h
14458	CPAIR_SHIFT	8	curses.h
14459	ATTRS_SHIFT	16	curses.h
14460	WA_DEFAULT	( 0x0000 << ATTRS_SHIFT )	curses.h
14461	WA_ALTCHARSET	( 0x0001 << ATTRS_SHIFT )	curses.h
14462	WA_BLINK	( 0x0002 << ATTRS_SHIFT )	curses.h
14463	WA_BOLD	( 0x0004 << ATTRS_SHIFT )	curses.h
14464	WA_DIM	( 0x0008 << ATTRS_SHIFT )	curses.h
14465	WA_INVIS	( 0x0010 << ATTRS_SHIFT )	curses.h
14466	WA_PROTECT	( 0x0020 << ATTRS_SHIFT )	curses.h
14467	WA_REVERSE	( 0x0040 << ATTRS_SHIFT )	curses.h
14468	WA_STANDOUT	( 0x0080 << ATTRS_SHIFT )	curses.h
14469	WA_UNDERLINE	( 0x0100 << ATTRS_SHIFT )	curses.h
14470	WA_HORIZONTAL	( 0x0200 << ATTRS_SHIFT )	curses.h
14471	WA_VERTICAL	( 0x0400 << ATTRS_SHIFT )	curses.h
14472	WA_LEFT	( 0x0800 << ATTRS_SHIFT )	curses.h
14473	WA_RIGHT	( 0x1000 << ATTRS_SHIFT )	curses.h
14474	WA_LOW	( 0x2000 << ATTRS_SHIFT )	curses.h
14475	WA_TOP	( 0x4000 << ATTRS_SHIFT )	curses.h
14476	A_DEFAULT	WA_DEFAULT	curses.h
14477	A_ALTCHARSET	WA_ALTCHARSET	curses.h
14478	A_BLINK	WA_BLINK	curses.h
14479	A_BOLD	WA_BOLD	curses.h
14480	A_DIM	WA_DIM	curses.h
14481	A_INVIS	WA_INVIS	curses.h
14482	A_PROTECT	WA_PROTECT	curses.h
14483	A_REVERSE	WA_REVERSE	curses.h
14484	A_STANDOUT	WA_STANDOUT	curses.h
14485	A_UNDERLINE	WA_UNDERLINE	curses.h
14486	A_ATTRIBUTES	( 0xffff << ATTRS_SHIFT )	curses.h
14487	A_CHARTEXT	( 0xff )	curses.h
14488	A_COLOUR	( 0xff << CPAIR_SHIFT )	curses.h
14489	A_COLOR	A_COLOUR	curses.h
14490	COLOUR_PAIRS	8	curses.h	Arbitrary limit
14491	COLOR_PAIRS	COLOUR_PAIRS	curses.h
14492	ACS_ULCORNER	'+'	curses.h
14493	ACS_LLCORNER	'+'	curses.h
14494	ACS_URCORNER	'+'	curses.h
14495	ACS_LRCORNER	'+'	curses.h
14496	ACS_RTEE	'+'	curses.h
14497	ACS_LTEE	'+'	curses.h
14498	ACS_BTEE	'+'	curses.h
14499	ACS_TTEE	'+'	curses.h
14500	ACS_HLINE	'-'	curses.h
14501	ACS_VLINE	'\|'	curses.h
14502	ACS_PLUS	'+'	curses.h
14503	ACS_S1	'-'	curses.h
14504	ACS_S9	'_'	curses.h
14505	ACS_DIAMOND	'+'	curses.h
14506	ACS_CKBOARD	':'	curses.h
14507	ACS_DEGREE	'\''	curses.h
14508	ACS_PLMINUS	'#'	curses.h
14509	ACS_BULLET	'o'	curses.h
14510	ACS_LARROW	'<'	curses.h
14511	ACS_RARROW	'>'	curses.h
14512	ACS_DARROW	'v'	curses.h
14513	ACS_UARROW	'^'	curses.h
14514	ACS_BOARD	'#'	curses.h
14515	ACS_LANTERN	'#'	curses.h
14516	ACS_BLOCK	'#'	curses.h
14517	COLOUR_BLACK	0	curses.h
14518	COLOUR_RED	1	curses.h
14519	COLOUR_GREEN	2	curses.h
14520	COLOUR_YELLOW	3	curses.h
14521	COLOUR_BLUE	4	curses.h
14522	COLOUR_MAGENTA	5	curses.h
14523	COLOUR_CYAN	6	curses.h
14524	COLOUR_WHITE	7	curses.h
14525	COLOURS	7	curses.h
14526	COLOUR_FG	30	curses.h
14527	COLOUR_BG	40	curses.h
14528	COLOR_FG	COLOUR_FG	curses.h
14529	COLOR_BG	COLOUR_BG	curses.h
14530	COLOR_BLACK	COLOUR_BLACK	curses.h
14531	COLOR_BLUE	COLOUR_BLUE	curses.h
14532	COLOR_GREEN	COLOUR_GREEN	curses.h
14533	COLOR_CYAN	COLOUR_CYAN	curses.h
14534	COLOR_RED	COLOUR_RED	curses.h
14535	COLOR_MAGENTA	COLOUR_MAGENTA	curses.h
14536	COLOR_YELLOW	COLOUR_YELLOW	curses.h
14537	COLOR_WHITE	COLOUR_WHITE	curses.h
14538	COLORS	COLOURS	curses.h
14539	init_color	( c, r, g, b ) init_colour ( (c), (r), (g), (b) )	curses.h
14540	DEBUG	1	debug.h
14541	debug_hexdump	hexdump	debug.h
14542	debugx	debug	debug.h
14543	EI_NIDENT	16	elf.h	Size of e_ident array.
14544	ET_NONE	0	elf.h	No file type
14545	ET_REL	1	elf.h	Relocatable file
14546	ET_EXEC	2	elf.h	Executable file
14547	ET_DYN	3	elf.h	Shared object file
14548	ET_CORE	4	elf.h	Core file
14549	EM_NONE	0	elf.h	No machine
14550	EM_M32	1	elf.h	AT&T WE 32100
14551	EM_SPARC	2	elf.h	SUN SPARC
14552	EM_386	3	elf.h	Intel 80386+
14553	EM_68K	4	elf.h	Motorola m68k family
14554	EM_88K	5	elf.h	Motorola m88k family
14555	EM_486	6	elf.h	Perhaps disused
14556	EM_860	7	elf.h	Intel 80860
14557	EM_MIPS	8	elf.h	MIPS R3000 big-endian
14558	EM_S370	9	elf.h	IBM System/370
14559	EM_MIPS_RS3_LE	10	elf.h	MIPS R3000 little-endian
14560	EM_PARISC	15	elf.h	HPPA
14561	EM_VPP500	17	elf.h	Fujitsu VPP500
14562	EM_SPARC32PLUS	18	elf.h	Sun's "v8plus"
14563	EM_960	19	elf.h	Intel 80960
14564	EM_PPC	20	elf.h	PowerPC
14565	EM_PPC64	21	elf.h	PowerPC 64-bit
14566	EM_S390	22	elf.h	IBM S390
14567	EM_V800	36	elf.h	NEC V800 series
14568	EM_FR20	37	elf.h	Fujitsu FR20
14569	EM_RH32	38	elf.h	TRW RH-32
14570	EM_RCE	39	elf.h	Motorola RCE
14571	EM_ARM	40	elf.h	ARM
14572	EM_FAKE_ALPHA	41	elf.h	Digital Alpha
14573	EM_SH	42	elf.h	Hitachi SH
14574	EM_SPARCV9	43	elf.h	SPARC v9 64-bit
14575	EM_TRICORE	44	elf.h	Siemens Tricore
14576	EM_ARC	45	elf.h	Argonaut RISC Core
14577	EM_H8_300	46	elf.h	Hitachi H8/300
14578	EM_H8_300H	47	elf.h	Hitachi H8/300H
14579	EM_H8S	48	elf.h	Hitachi H8S
14580	EM_H8_500	49	elf.h	Hitachi H8/500
14581	EM_IA_64	50	elf.h	Intel Merced
14582	EM_MIPS_X	51	elf.h	Stanford MIPS-X
14583	EM_COLDFIRE	52	elf.h	Motorola Coldfire
14584	EM_68HC12	53	elf.h	Motorola M68HC12
14585	EM_MMA	54	elf.h	Fujitsu MMA Multimedia Accelerator
14586	EM_PCP	55	elf.h	Siemens PCP
14587	EM_NCPU	56	elf.h	Sony nCPU embeeded RISC
14588	EM_NDR1	57	elf.h	Denso NDR1 microprocessor
14589	EM_STARCORE	58	elf.h	Motorola Start*Core processor
14590	EM_ME16	59	elf.h	Toyota ME16 processor
14591	EM_ST100	60	elf.h	STMicroelectronic ST100 processor
14592	EM_TINYJ	61	elf.h	Advanced Logic Corp. Tinyj emb.fam
14593	EM_X86_64	62	elf.h	AMD x86-64 architecture
14594	EM_PDSP	63	elf.h	Sony DSP Processor
14595	EM_FX66	66	elf.h	Siemens FX66 microcontroller
14596	EM_ST9PLUS	67	elf.h	STMicroelectronics ST9+ 8/16 mc
14597	EM_ST7	68	elf.h	STmicroelectronics ST7 8 bit mc
14598	EM_68HC16	69	elf.h	Motorola MC68HC16 microcontroller
14599	EM_68HC11	70	elf.h	Motorola MC68HC11 microcontroller
14600	EM_68HC08	71	elf.h	Motorola MC68HC08 microcontroller
14601	EM_68HC05	72	elf.h	Motorola MC68HC05 microcontroller
14602	EM_SVX	73	elf.h	Silicon Graphics SVx
14603	EM_AT19	74	elf.h	STMicroelectronics ST19 8 bit mc
14604	EM_VAX	75	elf.h	Digital VAX
14605	EM_CRIS	76	elf.h	Axis Communications 32-bit embedded processor
14606	EM_JAVELIN	77	elf.h	Infineon Technologies 32-bit embedded processor
14607	EM_FIREPATH	78	elf.h	Element 14 64-bit DSP Processor
14608	EM_ZSP	79	elf.h	LSI Logic 16-bit DSP Processor
14609	EM_MMIX	80	elf.h	Donald Knuth's educational 64-bit processor
14610	EM_HUANY	81	elf.h	Harvard University machine-independent object files
14611	EM_PRISM	82	elf.h	SiTera Prism
14612	EM_AVR	83	elf.h	Atmel AVR 8-bit microcontroller
14613	EM_FR30	84	elf.h	Fujitsu FR30
14614	EM_D10V	85	elf.h	Mitsubishi D10V
14615	EM_D30V	86	elf.h	Mitsubishi D30V
14616	EM_V850	87	elf.h	NEC v850
14617	EM_M32R	88	elf.h	Mitsubishi M32R
14618	EM_MN10300	89	elf.h	Matsushita MN10300
14619	EM_MN10200	90	elf.h	Matsushita MN10200
14620	EM_PJ	91	elf.h	picoJava
14621	EM_OPENRISC	92	elf.h	OpenRISC 32-bit embedded processor
14622	EM_ARC_A5	93	elf.h	ARC Cores Tangent-A5
14623	EM_XTENSA	94	elf.h	Tensilica Xtensa Architecture
14624	EM_NUM	95	elf.h
14625	PT_NULL	0	elf.h	Unused entry.
14626	PT_LOAD	1	elf.h	Loadable segment.
14627	PT_DYNAMIC	2	elf.h	Dynamic linking information segment.
14628	PT_INTERP	3	elf.h	Pathname of interpreter.
14629	PT_NOTE	4	elf.h	Auxiliary information.
14630	PT_SHLIB	5	elf.h	Reserved (not used).
14631	PT_PHDR	6	elf.h	Location of program header itself.
14632	PF_X	0x1	elf.h	Executable.
14633	PF_W	0x2	elf.h	Writable.
14634	PF_R	0x4	elf.h	Readable.
14635	ELF_PROGRAM_RETURNS_BIT	0x8000000	elf.h	e_flags bit 31
14636	EI_MAG0	0	elf.h
14637	ELFMAG0	0x7f	elf.h
14638	EI_MAG1	1	elf.h
14639	ELFMAG1	'E'	elf.h
14640	EI_MAG2	2	elf.h
14641	ELFMAG2	'L'	elf.h
14642	EI_MAG3	3	elf.h
14643	ELFMAG3	'F'	elf.h
14644	ELFMAG	"\177ELF"	elf.h
14645	SELFMAG	4	elf.h
14646	EI_CLASS	4	elf.h	File class byte index
14647	ELFCLASSNONE	0	elf.h	Invalid class
14648	ELFCLASS32	1	elf.h	32-bit objects
14649	ELFCLASS64	2	elf.h	64-bit objects
14650	EI_DATA	5	elf.h	Data encodeing byte index
14651	ELFDATANONE	0	elf.h	Invalid data encoding
14652	ELFDATA2LSB	1	elf.h	2's complement little endian
14653	ELFDATA2MSB	2	elf.h	2's complement big endian
14654	EI_VERSION	6	elf.h	File version byte index
14655	EV_NONE	0	elf.h	Invalid ELF Version
14656	EV_CURRENT	1	elf.h	Current version
14657	ELF32_PHDR_SIZE	(8*4)	elf.h	Size of an elf program header
14658	__LITTLE_ENDIAN	1234	endian.h
14659	__BIG_ENDIAN	4321	endian.h
14660	__PDP_ENDIAN	3412	endian.h
14661	ERRFILE	( 0 * ( ( int ) missing_errfile_declaration ) )	errno.h
14662	PXENV_STATUS_SUCCESS	0x0000	errno.h
14663	PXENV_STATUS_FAILURE	0x0001	errno.h
14664	PXENV_STATUS_BAD_FUNC	0x0002	errno.h
14665	PXENV_STATUS_UNSUPPORTED	0x0003	errno.h
14666	PXENV_STATUS_KEEP_UNDI	0x0004	errno.h
14667	PXENV_STATUS_KEEP_ALL	0x0005	errno.h
14668	PXENV_STATUS_OUT_OF_RESOURCES	0x0006	errno.h
14669	PXENV_STATUS_ARP_TIMEOUT	0x0011	errno.h
14670	PXENV_STATUS_UDP_CLOSED	0x0018	errno.h
14671	PXENV_STATUS_UDP_OPEN	0x0019	errno.h
14672	PXENV_STATUS_TFTP_CLOSED	0x001a	errno.h
14673	PXENV_STATUS_TFTP_OPEN	0x001b	errno.h
14674	PXENV_STATUS_MCOPY_PROBLEM	0x0020	errno.h
14675	PXENV_STATUS_BIS_INTEGRITY_FAIL	0x0021	errno.h
14676	PXENV_STATUS_BIS_VALIDATE_FAILU	0x0022	errno.h
14677	PXENV_STATUS_BIS_INIT_FAILURE	0x0023	errno.h
14678	PXENV_STATUS_BIS_SHUTDOWN_FAILU	0x0024	errno.h
14679	PXENV_STATUS_BIS_GBOA_FAILURE	0x0025	errno.h
14680	PXENV_STATUS_BIS_FREE_FAILURE	0x0026	errno.h
14681	PXENV_STATUS_BIS_GSI_FAILURE	0x0027	errno.h
14682	PXENV_STATUS_BIS_BAD_CKSUM	0x0028	errno.h
14683	PXENV_STATUS_TFTP_CANNOT_ARP_AD	0x0030	errno.h
14684	PXENV_STATUS_TFTP_OPEN_TIMEOUT	0x0032	errno.h
14685	PXENV_STATUS_TFTP_UNKNOWN_OPCOD	0x0033	errno.h
14686	PXENV_STATUS_TFTP_READ_TIMEOUT	0x0035	errno.h
14687	PXENV_STATUS_TFTP_ERROR_OPCODE	0x0036	errno.h
14688	PXENV_STATUS_TFTP_CANNOT_OPEN_C	0x0038	errno.h
14689	PXENV_STATUS_TFTP_CANNOT_READ_F	0x0039	errno.h
14690	PXENV_STATUS_TFTP_TOO_MANY_PACK	0x003a	errno.h
14691	PXENV_STATUS_TFTP_FILE_NOT_FOUN	0x003b	errno.h
14692	PXENV_STATUS_TFTP_ACCESS_VIOLAT	0x003c	errno.h
14693	PXENV_STATUS_TFTP_NO_MCAST_ADDR	0x003d	errno.h
14694	PXENV_STATUS_TFTP_NO_FILESIZE	0x003e	errno.h
14695	PXENV_STATUS_TFTP_INVALID_PACKE	0x003f	errno.h
14696	PXENV_STATUS_DHCP_TIMEOUT	0x0051	errno.h
14697	PXENV_STATUS_DHCP_NO_IP_ADDRESS	0x0052	errno.h
14698	PXENV_STATUS_DHCP_NO_BOOTFILE_N	0x0053	errno.h
14699	PXENV_STATUS_DHCP_BAD_IP_ADDRES	0x0054	errno.h
14700	PXENV_STATUS_UNDI_INVALID_FUNCT	0x0060	errno.h
14701	PXENV_STATUS_UNDI_MEDIATEST_FAI	0x0061	errno.h
14702	PXENV_STATUS_UNDI_CANNOT_INIT_N	0x0062	errno.h
14703	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0063	errno.h
14704	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0064	errno.h
14705	PXENV_STATUS_UNDI_CANNOT_READ_C	0x0065	errno.h
14706	PXENV_STATUS_UNDI_CANNOT_READ_I	0x0066	errno.h
14707	PXENV_STATUS_UNDI_BAD_MAC_ADDRE	0x0067	errno.h
14708	PXENV_STATUS_UNDI_BAD_EEPROM_CH	0x0068	errno.h
14709	PXENV_STATUS_UNDI_ERROR_SETTING	0x0069	errno.h
14710	PXENV_STATUS_UNDI_INVALID_STATE	0x006a	errno.h
14711	PXENV_STATUS_UNDI_TRANSMIT_ERRO	0x006b	errno.h
14712	PXENV_STATUS_UNDI_INVALID_PARAM	0x006c	errno.h
14713	PXENV_STATUS_BSTRAP_PROMPT_MENU	0x0074	errno.h
14714	PXENV_STATUS_BSTRAP_MCAST_ADDR	0x0076	errno.h
14715	PXENV_STATUS_BSTRAP_MISSING_LIS	0x0077	errno.h
14716	PXENV_STATUS_BSTRAP_NO_RESPONSE	0x0078	errno.h
14717	PXENV_STATUS_BSTRAP_FILE_TOO_BI	0x0079	errno.h
14718	PXENV_STATUS_BINL_CANCELED_BY_K	0x00a0	errno.h
14719	PXENV_STATUS_BINL_NO_PXE_SERVER	0x00a1	errno.h
14720	PXENV_STATUS_NOT_AVAILABLE_IN_P	0x00a2	errno.h
14721	PXENV_STATUS_NOT_AVAILABLE_IN_R	0x00a3	errno.h
14722	PXENV_STATUS_BUSD_DEVICE_NOT_SU	0x00b0	errno.h
14723	PXENV_STATUS_LOADER_NO_FREE_BAS	0x00c0	errno.h
14724	PXENV_STATUS_LOADER_NO_BC_ROMID	0x00c1	errno.h
14725	PXENV_STATUS_LOADER_BAD_BC_ROMI	0x00c2	errno.h
14726	PXENV_STATUS_LOADER_BAD_BC_RUNT	0x00c3	errno.h
14727	PXENV_STATUS_LOADER_NO_UNDI_ROM	0x00c4	errno.h
14728	PXENV_STATUS_LOADER_BAD_UNDI_RO	0x00c5	errno.h
14729	PXENV_STATUS_LOADER_BAD_UNDI_DR	0x00c6	errno.h
14730	PXENV_STATUS_LOADER_NO_PXE_STRU	0x00c8	errno.h
14731	PXENV_STATUS_LOADER_NO_PXENV_ST	0x00c9	errno.h
14732	PXENV_STATUS_LOADER_UNDI_START	0x00ca	errno.h
14733	PXENV_STATUS_LOADER_BC_START	0x00cb	errno.h
14734	ENOERR	( ERRFILE \| PXENV_STATUS_SUCCESS \| 0x00000000 )	errno.h
14735	E2BIG	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x01000000 )	errno.h
14736	EACCES	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x02000000 )	errno.h
14737	EADDRINUSE	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x03000000 )	errno.h
14738	EADDRNOTAVAIL	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x04000000 )	errno.h
14739	EAFNOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x05000000 )	errno.h
14740	EAGAIN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x06000000 )	errno.h
14741	EALREADY	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x07000000 )	errno.h
14742	EBADF	( ERRFILE \| PXENV_STATUS_TFTP_CLOSED \| 0x08000000 )	errno.h
14743	EBADMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x09000000 )	errno.h
14744	EBUSY	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x0a000000 )	errno.h
14745	ECANCELED	( ERRFILE \| PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE \| 0x0b000000 )	errno.h
14746	ECHILD	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x0c000000 )	errno.h
14747	ECONNABORTED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0d000000 )	errno.h
14748	ECONNREFUSED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION \| 0x0e000000 )	errno.h
14749	ECONNRESET	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0f000000 )	errno.h
14750	EDEADLK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x10000000 )	errno.h
14751	EDESTADDRREQ	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x11000000 )	errno.h
14752	EDOM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x12000000 )	errno.h
14753	EDQUOT	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x13000000 )	errno.h
14754	EEXIST	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x14000000 )	errno.h
14755	EFAULT	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x15000000 )	errno.h
14756	EFBIG	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x16000000 )	errno.h
14757	EHOSTUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x17000000 )	errno.h
14758	EIDRM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x18000000 )	errno.h
14759	EILSEQ	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x19000000 )	errno.h
14760	EINPROGRESS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1a000000 )	errno.h
14761	EINTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1b000000 )	errno.h
14762	EINVAL	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x1c000000 )	errno.h
14763	EIO	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x1d000000 )	errno.h
14764	EISCONN	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x1e000000 )	errno.h
14765	EISDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1f000000 )	errno.h
14766	ELOOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x20000000 )	errno.h
14767	EMFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x21000000 )	errno.h
14768	EMLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x22000000 )	errno.h
14769	EMSGSIZE	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x23000000 )	errno.h
14770	EMULTIHOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x24000000 )	errno.h
14771	ENAMETOOLONG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x25000000 )	errno.h
14772	ENETDOWN	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x26000000 )	errno.h
14773	ENETRESET	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x27000000 )	errno.h
14774	ENETUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x28000000 )	errno.h
14775	ENFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x29000000 )	errno.h
14776	ENOBUFS	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x2a000000 )	errno.h
14777	ENODATA	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2b000000 )	errno.h
14778	ENODEV	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2c000000 )	errno.h
14779	ENOENT	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2d000000 )	errno.h
14780	ENOEXEC	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2e000000 )	errno.h
14781	ENOLCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2f000000 )	errno.h
14782	ENOLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x30000000 )	errno.h
14783	ENOMEM	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x31000000 )	errno.h
14784	ENOMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x32000000 )	errno.h
14785	ENOPROTOOPT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x33000000 )	errno.h
14786	ENOSPC	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x34000000 )	errno.h
14787	ENOSR	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x35000000 )	errno.h
14788	ENOSTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x36000000 )	errno.h
14789	ENOSYS	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x37000000 )	errno.h
14790	ENOTCONN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x38000000 )	errno.h
14791	ENOTDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x39000000 )	errno.h
14792	ENOTEMPTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3a000000 )	errno.h
14793	ENOTSOCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3b000000 )	errno.h
14794	ENOTSUP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3c000000 )	errno.h
14795	ENOTTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3d000000 )	errno.h
14796	ENXIO	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x3e000000 )	errno.h
14797	EOPNOTSUPP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3f000000 )	errno.h
14798	EOVERFLOW	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x40000000 )	errno.h
14799	EPERM	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x41000000 )	errno.h
14800	EPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x42000000 )	errno.h
14801	EPROTO	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x43000000 )	errno.h
14802	EPROTONOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x44000000 )	errno.h
14803	EPROTOTYPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x45000000 )	errno.h
14804	ERANGE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x46000000 )	errno.h
14805	EROFS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x47000000 )	errno.h
14806	ESPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x48000000 )	errno.h
14807	ESRCH	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x49000000 )	errno.h
14808	ESTALE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4a000000 )	errno.h
14809	ETIME	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4b000000 )	errno.h
14810	ETIMEDOUT	( ERRFILE \| PXENV_STATUS_TFTP_READ_TIMEOUT \| 0x4c000000 )	errno.h
14811	ETXTBSY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4d000000 )	errno.h
14812	EWOULDBLOCK	( ERRFILE \| PXENV_STATUS_TFTP_OPEN \| 0x4e000000 )	errno.h
14813	EXDEV	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4f000000 )	errno.h
14814	EUNIQ_01	0x00000100	errno.h
14815	EUNIQ_02	0x00000200	errno.h
14816	EUNIQ_03	0x00000300	errno.h
14817	EUNIQ_04	0x00000400	errno.h
14818	EUNIQ_05	0x00000500	errno.h
14819	EUNIQ_06	0x00000600	errno.h
14820	EUNIQ_07	0x00000700	errno.h
14821	EUNIQ_08	0x00000800	errno.h
14822	EUNIQ_09	0x00000900	errno.h
14823	EUNIQ_0A	0x00000a00	errno.h
14824	EUNIQ_0B	0x00000b00	errno.h
14825	EUNIQ_0C	0x00000c00	errno.h
14826	EUNIQ_0D	0x00000d00	errno.h
14827	EUNIQ_0E	0x00000e00	errno.h
14828	EUNIQ_0F	0x00000f00	errno.h
14829	EUNIQ_10	0x00001000	errno.h
14830	EUNIQ_11	0x00001100	errno.h
14831	EUNIQ_12	0x00001200	errno.h
14832	EUNIQ_13	0x00001300	errno.h
14833	EUNIQ_14	0x00001400	errno.h
14834	EUNIQ_15	0x00001500	errno.h
14835	EUNIQ_16	0x00001600	errno.h
14836	EUNIQ_17	0x00001700	errno.h
14837	EUNIQ_18	0x00001800	errno.h
14838	EUNIQ_19	0x00001900	errno.h
14839	EUNIQ_1A	0x00001a00	errno.h
14840	EUNIQ_1B	0x00001b00	errno.h
14841	EUNIQ_1C	0x00001c00	errno.h
14842	EUNIQ_1D	0x00001d00	errno.h
14843	EUNIQ_1E	0x00001e00	errno.h
14844	EUNIQ_1F	0x00001f00	errno.h
14845	VALID_LINK_TIMEOUT	100	etherboot.h	10.0 seconds
14846	DISK_IDE	1	fs.h
14847	DISK_MEM	2	fs.h
14848	DISK_USB	3	fs.h
14849	PARTITION_UNKNOWN	0xbad6a7	fs.h
14850	I365_IDENT	0x00	i82365.h	Identification and revision
14851	I365_STATUS	0x01	i82365.h	Interface status
14852	I365_POWER	0x02	i82365.h	Power and RESETDRV control
14853	I365_INTCTL	0x03	i82365.h	Interrupt and general control
14854	I365_CSC	0x04	i82365.h	Card status change
14855	I365_CSCINT	0x05	i82365.h	Card status change interrupt control
14856	I365_ADDRWIN	0x06	i82365.h	Address window enable
14857	I365_IOCTL	0x07	i82365.h	I/O control
14858	I365_GENCTL	0x16	i82365.h	Card detect and general control
14859	I365_GBLCTL	0x1E	i82365.h	Global control register
14860	I365_W_START	0	i82365.h
14861	I365_W_STOP	2	i82365.h
14862	I365_W_OFF	4	i82365.h
14863	I365_CS_BVD1	0x01	i82365.h
14864	I365_CS_STSCHG	0x01	i82365.h
14865	I365_CS_BVD2	0x02	i82365.h
14866	I365_CS_SPKR	0x02	i82365.h
14867	I365_CS_DETECT	0x0C	i82365.h
14868	I365_CS_WRPROT	0x10	i82365.h
14869	I365_CS_READY	0x20	i82365.h	Inverted
14870	I365_CS_POWERON	0x40	i82365.h
14871	I365_CS_GPI	0x80	i82365.h
14872	I365_PWR_OFF	0x00	i82365.h	Turn off the socket
14873	I365_PWR_OUT	0x80	i82365.h	Output enable
14874	I365_PWR_NORESET	0x40	i82365.h	Disable RESETDRV on resume
14875	I365_PWR_AUTO	0x20	i82365.h	Auto pwr switch enable
14876	I365_VCC_MASK	0x18	i82365.h	Mask for turning off Vcc
14877	I365_VCC_5V	0x10	i82365.h	Vcc = 5.0v
14878	I365_VCC_3V	0x18	i82365.h	Vcc = 3.3v
14879	I365_VPP2_MASK	0x0c	i82365.h	Mask for turning off Vpp2
14880	I365_VPP2_5V	0x04	i82365.h	Vpp2 = 5.0v
14881	I365_VPP2_12V	0x08	i82365.h	Vpp2 = 12.0v
14882	I365_VPP1_MASK	0x03	i82365.h	Mask for turning off Vpp1
14883	I365_VPP1_5V	0x01	i82365.h	Vpp2 = 5.0v
14884	I365_VPP1_12V	0x02	i82365.h	Vpp2 = 12.0v
14885	I365_RING_ENA	0x80	i82365.h
14886	I365_PC_RESET	0x40	i82365.h
14887	I365_PC_IOCARD	0x20	i82365.h
14888	I365_INTR_ENA	0x10	i82365.h
14889	I365_IRQ_MASK	0x0F	i82365.h
14890	I365_CSC_BVD1	0x01	i82365.h
14891	I365_CSC_STSCHG	0x01	i82365.h
14892	I365_CSC_BVD2	0x02	i82365.h
14893	I365_CSC_READY	0x04	i82365.h
14894	I365_CSC_DETECT	0x08	i82365.h
14895	I365_CSC_ANY	0x0F	i82365.h
14896	I365_CSC_GPI	0x10	i82365.h
14897	I365_CTL_16DELAY	0x01	i82365.h
14898	I365_CTL_RESET	0x02	i82365.h
14899	I365_CTL_GPI_ENA	0x04	i82365.h
14900	I365_CTL_GPI_CTL	0x08	i82365.h
14901	I365_CTL_RESUME	0x10	i82365.h
14902	I365_CTL_SW_IRQ	0x20	i82365.h
14903	I365_GBL_PWRDOWN	0x01	i82365.h
14904	I365_GBL_CSC_LEV	0x02	i82365.h
14905	I365_GBL_WRBACK	0x04	i82365.h
14906	I365_GBL_IRQ_0_LEV	0x08	i82365.h
14907	I365_GBL_IRQ_1_LEV	0x10	i82365.h
14908	I365_MEM_16BIT	0x8000	i82365.h	In memory start high byte
14909	I365_MEM_0WS	0x4000	i82365.h
14910	I365_MEM_WS1	0x8000	i82365.h	In memory stop high byte
14911	I365_MEM_WS0	0x4000	i82365.h
14912	I365_MEM_WRPROT	0x8000	i82365.h	In offset high byte
14913	I365_MEM_REG	0x4000	i82365.h
14914	I365_IDENT_VADEM	0x08	i82365.h
14915	VG468_VPP2_MASK	0x0c	i82365.h
14916	VG468_VPP2_5V	0x04	i82365.h
14917	VG468_VPP2_12V	0x08	i82365.h
14918	VG469_VSENSE	0x1f	i82365.h	Card voltage sense
14919	VG469_VSELECT	0x2f	i82365.h	Card voltage select
14920	VG468_CTL	0x38	i82365.h	Control register
14921	VG468_TIMER	0x39	i82365.h	Timer control
14922	VG468_MISC	0x3a	i82365.h	Miscellaneous
14923	VG468_GPIO_CFG	0x3b	i82365.h	GPIO configuration
14924	VG469_EXT_MODE	0x3c	i82365.h	Extended mode register
14925	VG468_SELECT	0x3d	i82365.h	Programmable chip select
14926	VG468_SELECT_CFG	0x3e	i82365.h	Chip select configuration
14927	VG468_ATA	0x3f	i82365.h	ATA control
14928	VG469_VSENSE_A_VS1	0x01	i82365.h
14929	VG469_VSENSE_A_VS2	0x02	i82365.h
14930	VG469_VSENSE_B_VS1	0x04	i82365.h
14931	VG469_VSENSE_B_VS2	0x08	i82365.h
14932	VG469_VSEL_VCC	0x03	i82365.h
14933	VG469_VSEL_5V	0x00	i82365.h
14934	VG469_VSEL_3V	0x03	i82365.h
14935	VG469_VSEL_MAX	0x0c	i82365.h
14936	VG469_VSEL_EXT_STAT	0x10	i82365.h
14937	VG469_VSEL_EXT_BUS	0x20	i82365.h
14938	VG469_VSEL_MIXED	0x40	i82365.h
14939	VG469_VSEL_ISA	0x80	i82365.h
14940	VG468_CTL_SLOW	0x01	i82365.h	600ns memory timing
14941	VG468_CTL_ASYNC	0x02	i82365.h	Asynchronous bus clocking
14942	VG468_CTL_TSSI	0x08	i82365.h	Tri-state some outputs
14943	VG468_CTL_DELAY	0x10	i82365.h	Card detect debounce
14944	VG468_CTL_INPACK	0x20	i82365.h	Obey INPACK signal?
14945	VG468_CTL_POLARITY	0x40	i82365.h	VCCEN polarity
14946	VG468_CTL_COMPAT	0x80	i82365.h	Compatibility stuff
14947	VG469_CTL_WS_COMPAT	0x04	i82365.h	Wait state compatibility
14948	VG469_CTL_STRETCH	0x10	i82365.h	LED stretch
14949	VG468_TIMER_ZEROPWR	0x10	i82365.h	Zero power control
14950	VG468_TIMER_SIGEN	0x20	i82365.h	Power up
14951	VG468_TIMER_STATUS	0x40	i82365.h	Activity timer status
14952	VG468_TIMER_RES	0x80	i82365.h	Timer resolution
14953	VG468_TIMER_MASK	0x0f	i82365.h	Activity timer timeout
14954	VG468_MISC_GPIO	0x04	i82365.h	General-purpose IO
14955	VG468_MISC_DMAWSB	0x08	i82365.h	DMA wait state control
14956	VG469_MISC_LEDENA	0x10	i82365.h	LED enable
14957	VG468_MISC_VADEMREV	0x40	i82365.h	Vadem revision control
14958	VG468_MISC_UNLOCK	0x80	i82365.h	Unique register lock
14959	VG469_MODE_VPPST	0x03	i82365.h	Vpp steering control
14960	VG469_MODE_INT_SENSE	0x04	i82365.h	Internal voltage sense
14961	VG469_MODE_CABLE	0x08	i82365.h
14962	VG469_MODE_COMPAT	0x10	i82365.h	i82365sl B or DF step
14963	VG469_MODE_TEST	0x20	i82365.h
14964	VG469_MODE_RIO	0x40	i82365.h	Steer RIO to INTR?
14965	VG469_MODE_B_3V	0x01	i82365.h	3.3v for socket B
14966	RF5C_MODE_CTL	0x1f	i82365.h	Mode control
14967	RF5C_PWR_CTL	0x2f	i82365.h	Mixed voltage control
14968	RF5C_CHIP_ID	0x3a	i82365.h	Chip identification
14969	RF5C_MODE_CTL_3	0x3b	i82365.h	Mode control 3
14970	RF5C_MODE_ATA	0x01	i82365.h	ATA mode
14971	RF5C_MODE_LED_ENA	0x02	i82365.h	IRQ 12 is LED
14972	RF5C_MODE_CA21	0x04	i82365.h
14973	RF5C_MODE_CA22	0x08	i82365.h
14974	RF5C_MODE_CA23	0x10	i82365.h
14975	RF5C_MODE_CA24	0x20	i82365.h
14976	RF5C_MODE_CA25	0x40	i82365.h
14977	RF5C_MODE_3STATE_BIT7	0x80	i82365.h
14978	RF5C_PWR_VCC_3V	0x01	i82365.h
14979	RF5C_PWR_IREQ_HIGH	0x02	i82365.h
14980	RF5C_PWR_INPACK_ENA	0x04	i82365.h
14981	RF5C_PWR_5V_DET	0x08	i82365.h
14982	RF5C_PWR_TC_SEL	0x10	i82365.h	Terminal Count: irq 11 or 15
14983	RF5C_PWR_DREQ_LOW	0x20	i82365.h
14984	RF5C_PWR_DREQ_OFF	0x00	i82365.h	DREQ steering control
14985	RF5C_PWR_DREQ_INPACK	0x40	i82365.h
14986	RF5C_PWR_DREQ_SPKR	0x80	i82365.h
14987	RF5C_PWR_DREQ_IOIS16	0xc0	i82365.h
14988	RF5C_CHIP_RF5C296	0x32	i82365.h
14989	RF5C_CHIP_RF5C396	0xb2	i82365.h
14990	RF5C_MCTL3_DISABLE	0x01	i82365.h	Disable PCMCIA interface
14991	RF5C_MCTL3_DMA_ENA	0x02	i82365.h
14992	RL5C46X_BCR_3E0_ENA	0x0800	i82365.h
14993	RL5C46X_BCR_3E2_ENA	0x1000	i82365.h
14994	RL5C4XX_CONFIG	0x80	i82365.h	16 bit
14995	RL5C4XX_CONFIG_IO_1_MODE	0x0200	i82365.h
14996	RL5C4XX_CONFIG_IO_0_MODE	0x0100	i82365.h
14997	RL5C4XX_CONFIG_PREFETCH	0x0001	i82365.h
14998	RL5C4XX_MISC	0x0082	i82365.h	16 bit
14999	RL5C4XX_MISC_HW_SUSPEND_ENA	0x0002	i82365.h
15000	RL5C4XX_MISC_VCCEN_POL	0x0100	i82365.h
15001	RL5C4XX_MISC_VPPEN_POL	0x0200	i82365.h
15002	RL5C46X_MISC_SUSPEND	0x0001	i82365.h
15003	RL5C46X_MISC_PWR_SAVE_2	0x0004	i82365.h
15004	RL5C46X_MISC_IFACE_BUSY	0x0008	i82365.h
15005	RL5C46X_MISC_B_LOCK	0x0010	i82365.h
15006	RL5C46X_MISC_A_LOCK	0x0020	i82365.h
15007	RL5C46X_MISC_PCI_LOCK	0x0040	i82365.h
15008	RL5C47X_MISC_IFACE_BUSY	0x0004	i82365.h
15009	RL5C47X_MISC_PCI_INT_MASK	0x0018	i82365.h
15010	RL5C47X_MISC_PCI_INT_DIS	0x0020	i82365.h
15011	RL5C47X_MISC_SUBSYS_WR	0x0040	i82365.h
15012	RL5C47X_MISC_SRIRQ_ENA	0x0080	i82365.h
15013	RL5C47X_MISC_5V_DISABLE	0x0400	i82365.h
15014	RL5C47X_MISC_LED_POL	0x0800	i82365.h
15015	RL5C4XX_16BIT_CTL	0x0084	i82365.h	16 bit
15016	RL5C4XX_16CTL_IO_TIMING	0x0100	i82365.h
15017	RL5C4XX_16CTL_MEM_TIMING	0x0200	i82365.h
15018	RL5C46X_16CTL_LEVEL_1	0x0010	i82365.h
15019	RL5C46X_16CTL_LEVEL_2	0x0020	i82365.h
15020	RL5C4XX_16BIT_IO_0	0x0088	i82365.h	16 bit
15021	RL5C4XX_16BIT_MEM_0	0x0088	i82365.h	16 bit
15022	RL5C4XX_SETUP_MASK	0x0007	i82365.h
15023	RL5C4XX_SETUP_SHIFT	0	i82365.h
15024	RL5C4XX_CMD_MASK	0x01f0	i82365.h
15025	RL5C4XX_CMD_SHIFT	4	i82365.h
15026	RL5C4XX_HOLD_MASK	0x1c00	i82365.h
15027	RL5C4XX_HOLD_SHIFT	10	i82365.h
15028	RL5C4XX_MISC_CONTROL	0x2F	i82365.h	8 bit
15029	RL5C4XX_ZV_ENABLE	0x08	i82365.h
15030	PCI_VENDOR_ID_CIRRUS	0x1013	i82365.h
15031	PCI_DEVICE_ID_CIRRUS_6729	0x1100	i82365.h
15032	PCI_DEVICE_ID_CIRRUS_6832	0x1110	i82365.h
15033	PD67_MISC_CTL_1	0x16	i82365.h	Misc control 1
15034	PD67_FIFO_CTL	0x17	i82365.h	FIFO control
15035	PD67_MISC_CTL_2	0x1E	i82365.h	Misc control 2
15036	PD67_CHIP_INFO	0x1f	i82365.h	Chip information
15037	PD67_ATA_CTL	0x026	i82365.h	6730: ATA control
15038	PD67_EXT_INDEX	0x2e	i82365.h	Extension index
15039	PD67_EXT_DATA	0x2f	i82365.h	Extension data
15040	PD67_DATA_MASK0	0x01	i82365.h	Data mask 0
15041	PD67_DATA_MASK1	0x02	i82365.h	Data mask 1
15042	PD67_DMA_CTL	0x03	i82365.h	DMA control
15043	PD67_EXT_CTL_1	0x03	i82365.h	Extension control 1
15044	PD67_EXTERN_DATA	0x0a	i82365.h
15045	PD67_MISC_CTL_3	0x25	i82365.h
15046	PD67_SMB_PWR_CTL	0x26	i82365.h
15047	PD67_MC1_5V_DET	0x01	i82365.h	5v detect
15048	PD67_MC1_MEDIA_ENA	0x01	i82365.h	6730: Multimedia enable
15049	PD67_MC1_VCC_3V	0x02	i82365.h	3.3v Vcc
15050	PD67_MC1_PULSE_MGMT	0x04	i82365.h
15051	PD67_MC1_PULSE_IRQ	0x08	i82365.h
15052	PD67_MC1_SPKR_ENA	0x10	i82365.h
15053	PD67_MC1_INPACK_ENA	0x80	i82365.h
15054	PD67_FIFO_EMPTY	0x80	i82365.h
15055	PD67_MC2_FREQ_BYPASS	0x01	i82365.h
15056	PD67_MC2_DYNAMIC_MODE	0x02	i82365.h
15057	PD67_MC2_SUSPEND	0x04	i82365.h
15058	PD67_MC2_5V_CORE	0x08	i82365.h
15059	PD67_MC2_LED_ENA	0x10	i82365.h	IRQ 12 is LED enable
15060	PD67_MC2_FAST_PCI	0x10	i82365.h	6729: PCI bus > 25 MHz
15061	PD67_MC2_3STATE_BIT7	0x20	i82365.h	Floppy change bit
15062	PD67_MC2_DMA_MODE	0x40	i82365.h
15063	PD67_MC2_IRQ15_RI	0x80	i82365.h	IRQ 15 is ring enable
15064	PD67_INFO_SLOTS	0x20	i82365.h	0 = 1 slot, 1 = 2 slots
15065	PD67_INFO_CHIP_ID	0xc0	i82365.h
15066	PD67_INFO_REV	0x1c	i82365.h
15067	PD67_TIME_SCALE	0xc0	i82365.h
15068	PD67_TIME_SCALE_1	0x00	i82365.h
15069	PD67_TIME_SCALE_16	0x40	i82365.h
15070	PD67_TIME_SCALE_256	0x80	i82365.h
15071	PD67_TIME_SCALE_4096	0xc0	i82365.h
15072	PD67_TIME_MULT	0x3f	i82365.h
15073	PD67_DMA_MODE	0xc0	i82365.h
15074	PD67_DMA_OFF	0x00	i82365.h
15075	PD67_DMA_DREQ_INPACK	0x40	i82365.h
15076	PD67_DMA_DREQ_WP	0x80	i82365.h
15077	PD67_DMA_DREQ_BVD2	0xc0	i82365.h
15078	PD67_DMA_PULLUP	0x20	i82365.h	Disable socket pullups?
15079	PD67_EC1_VCC_PWR_LOCK	0x01	i82365.h
15080	PD67_EC1_AUTO_PWR_CLEAR	0x02	i82365.h
15081	PD67_EC1_LED_ENA	0x04	i82365.h
15082	PD67_EC1_INV_CARD_IRQ	0x08	i82365.h
15083	PD67_EC1_INV_MGMT_IRQ	0x10	i82365.h
15084	PD67_EC1_PULLUP_CTL	0x20	i82365.h
15085	PD67_MC3_IRQ_MASK	0x03	i82365.h
15086	PD67_MC3_IRQ_PCPCI	0x00	i82365.h
15087	PD67_MC3_IRQ_EXTERN	0x01	i82365.h
15088	PD67_MC3_IRQ_PCIWAY	0x02	i82365.h
15089	PD67_MC3_IRQ_PCI	0x03	i82365.h
15090	PD67_MC3_PWR_MASK	0x0c	i82365.h
15091	PD67_MC3_PWR_SERIAL	0x00	i82365.h
15092	PD67_MC3_PWR_TI2202	0x08	i82365.h
15093	PD67_MC3_PWR_SMB	0x0c	i82365.h
15094	PD68_EXT_CTL_2	0x0b	i82365.h
15095	PD68_PCI_SPACE	0x22	i82365.h
15096	PD68_PCCARD_SPACE	0x23	i82365.h
15097	PD68_WINDOW_TYPE	0x24	i82365.h
15098	PD68_EXT_CSC	0x2e	i82365.h
15099	PD68_MISC_CTL_4	0x2f	i82365.h
15100	PD68_MISC_CTL_5	0x30	i82365.h
15101	PD68_MISC_CTL_6	0x31	i82365.h
15102	PD68_MC3_HW_SUSP	0x10	i82365.h
15103	PD68_MC3_MM_EXPAND	0x40	i82365.h
15104	PD68_MC3_MM_ARM	0x80	i82365.h
15105	PD6832_BCR_MGMT_IRQ_ENA	0x0800	i82365.h
15106	PD6832_SOCKET_NUMBER	0x004c	i82365.h	8 bit
15107	IGMP_QUERY	0x11	igmp.h
15108	IGMPv1_REPORT	0x12	igmp.h
15109	IGMPv2_REPORT	0x16	igmp.h
15110	IGMP_LEAVE	0x17	igmp.h
15111	GROUP_ALL_HOSTS	0xe0000001	igmp.h	224.0.0.1 Host byte order
15112	MULTICAST_MASK	0xf0000000	igmp.h
15113	MULTICAST_NETWORK	0xe0000000	igmp.h
15114	LOADER_NOT_SUPPORT	0xbadf11e	lib.h
15115	MII_BMCR	0x00	mii.h	Basic mode control register
15116	MII_BMSR	0x01	mii.h	Basic mode status register
15117	MII_PHYSID1	0x02	mii.h	PHYS ID 1
15118	MII_PHYSID2	0x03	mii.h	PHYS ID 2
15119	MII_ADVERTISE	0x04	mii.h	Advertisement control reg
15120	MII_LPA	0x05	mii.h	Link partner ability reg
15121	MII_EXPANSION	0x06	mii.h	Expansion register
15122	MII_DCOUNTER	0x12	mii.h	Disconnect counter
15123	MII_FCSCOUNTER	0x13	mii.h	False carrier counter
15124	MII_NWAYTEST	0x14	mii.h	N-way auto-neg test reg
15125	MII_RERRCOUNTER	0x15	mii.h	Receive error counter
15126	MII_SREVISION	0x16	mii.h	Silicon revision
15127	MII_RESV1	0x17	mii.h	Reserved...
15128	MII_LBRERROR	0x18	mii.h	Lpback, rx, bypass error
15129	MII_PHYADDR	0x19	mii.h	PHY address
15130	MII_RESV2	0x1a	mii.h	Reserved...
15131	MII_TPISTATUS	0x1b	mii.h	TPI status for 10mbps
15132	MII_NCONFIG	0x1c	mii.h	Network interface config
15133	BMCR_RESV	0x007f	mii.h	Unused...
15134	BMCR_CTST	0x0080	mii.h	Collision test
15135	BMCR_FULLDPLX	0x0100	mii.h	Full duplex
15136	BMCR_ANRESTART	0x0200	mii.h	Auto negotiation restart
15137	BMCR_ISOLATE	0x0400	mii.h	Disconnect DP83840 from MII
15138	BMCR_PDOWN	0x0800	mii.h	Powerdown the DP83840
15139	BMCR_ANENABLE	0x1000	mii.h	Enable auto negotiation
15140	BMCR_SPEED100	0x2000	mii.h	Select 100Mbps
15141	BMCR_LOOPBACK	0x4000	mii.h	TXD loopback bits
15142	BMCR_RESET	0x8000	mii.h	Reset the DP83840
15143	BMSR_ERCAP	0x0001	mii.h	Ext-reg capability
15144	BMSR_JCD	0x0002	mii.h	Jabber detected
15145	BMSR_LSTATUS	0x0004	mii.h	Link status
15146	BMSR_ANEGCAPABLE	0x0008	mii.h	Able to do auto-negotiation
15147	BMSR_RFAULT	0x0010	mii.h	Remote fault detected
15148	BMSR_ANEGCOMPLETE	0x0020	mii.h	Auto-negotiation complete
15149	BMSR_RESV	0x07c0	mii.h	Unused...
15150	BMSR_10HALF	0x0800	mii.h	Can do 10mbps, half-duplex
15151	BMSR_10FULL	0x1000	mii.h	Can do 10mbps, full-duplex
15152	BMSR_100HALF	0x2000	mii.h	Can do 100mbps, half-duplex
15153	BMSR_100FULL	0x4000	mii.h	Can do 100mbps, full-duplex
15154	BMSR_100BASE4	0x8000	mii.h	Can do 100mbps, 4k packets
15155	ADVERTISE_SLCT	0x001f	mii.h	Selector bits
15156	ADVERTISE_CSMA	0x0001	mii.h	Only selector supported
15157	ADVERTISE_10HALF	0x0020	mii.h	Try for 10mbps half-duplex
15158	ADVERTISE_10FULL	0x0040	mii.h	Try for 10mbps full-duplex
15159	ADVERTISE_100HALF	0x0080	mii.h	Try for 100mbps half-duplex
15160	ADVERTISE_100FULL	0x0100	mii.h	Try for 100mbps full-duplex
15161	ADVERTISE_100BASE4	0x0200	mii.h	Try for 100mbps 4k packets
15162	ADVERTISE_RESV	0x1c00	mii.h	Unused...
15163	ADVERTISE_RFAULT	0x2000	mii.h	Say we can detect faults
15164	ADVERTISE_LPACK	0x4000	mii.h	Ack link partners response
15165	ADVERTISE_NPAGE	0x8000	mii.h	Next page bit
15166	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	mii.h
15167	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	mii.h
15168	LPA_SLCT	0x001f	mii.h	Same as advertise selector
15169	LPA_10HALF	0x0020	mii.h	Can do 10mbps half-duplex
15170	LPA_10FULL	0x0040	mii.h	Can do 10mbps full-duplex
15171	LPA_100HALF	0x0080	mii.h	Can do 100mbps half-duplex
15172	LPA_100FULL	0x0100	mii.h	Can do 100mbps full-duplex
15173	LPA_100BASE4	0x0200	mii.h	Can do 100mbps 4k packets
15174	LPA_RESV	0x1c00	mii.h	Unused...
15175	LPA_RFAULT	0x2000	mii.h	Link partner faulted
15176	LPA_LPACK	0x4000	mii.h	Link partner acked us
15177	LPA_NPAGE	0x8000	mii.h	Next page bit
15178	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	mii.h
15179	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	mii.h
15180	EXPANSION_NWAY	0x0001	mii.h	Can do N-way auto-nego
15181	EXPANSION_LCWP	0x0002	mii.h	Got new RX page code word
15182	EXPANSION_ENABLENPAGE	0x0004	mii.h	This enables npage words
15183	EXPANSION_NPCAPABLE	0x0008	mii.h	Link partner supports npage
15184	EXPANSION_MFAULTS	0x0010	mii.h	Multiple faults detected
15185	EXPANSION_RESV	0xffe0	mii.h	Unused...
15186	NWAYTEST_RESV1	0x00ff	mii.h	Unused...
15187	NWAYTEST_LOOPBACK	0x0100	mii.h	Enable loopback for N-way
15188	NWAYTEST_RESV2	0xfe00	mii.h	Unused...
15189	SUNRPC_PORT	111	nfs.h
15190	PROG_PORTMAP	100000	nfs.h
15191	PROG_NFS	100003	nfs.h
15192	PROG_MOUNT	100005	nfs.h
15193	MSG_CALL	0	nfs.h
15194	MSG_REPLY	1	nfs.h
15195	PORTMAP_GETPORT	3	nfs.h
15196	MOUNT_ADDENTRY	1	nfs.h
15197	MOUNT_UMOUNTALL	4	nfs.h
15198	NFS_LOOKUP	4	nfs.h
15199	NFS_READLINK	5	nfs.h
15200	NFS_READ	6	nfs.h
15201	NFS_FHSIZE	32	nfs.h
15202	NFSERR_PERM	1	nfs.h
15203	NFSERR_NOENT	2	nfs.h
15204	NFSERR_ACCES	13	nfs.h
15205	NFSERR_ISDIR	21	nfs.h
15206	NFSERR_INVAL	22	nfs.h
15207	NFS_READ_SIZE	1024	nfs.h
15208	NFS_MAXLINKDEPTH	16	nfs.h
15209	DNS_TYPE_NB	0x20	nmb.h
15210	DNS_FLAG_BROADCAST	( 0x01 << 4 )	nmb.h
15211	NBNS_UDP_PORT	137	nmb.h
15212	TCP_INITIAL_TIMEOUT	(3*TICKS_PER_SEC)	old_tcp.h
15213	TCP_MAX_TIMEOUT	(60*TICKS_PER_SEC)	old_tcp.h
15214	TCP_MIN_TIMEOUT	(TICKS_PER_SEC)	old_tcp.h
15215	TCP_MAX_RETRY	10	old_tcp.h
15216	TCP_MAX_HEADER	((int)sizeof(struct iphdr)+64)	old_tcp.h
15217	TCP_MIN_WINDOW	(1500-TCP_MAX_HEADER)	old_tcp.h
15218	TCP_MAX_WINDOW	(65535-TCP_MAX_HEADER)	old_tcp.h
15219	FIN	1	old_tcp.h
15220	SYN	2	old_tcp.h
15221	RST	4	old_tcp.h
15222	PSH	8	old_tcp.h
15223	ACK	16	old_tcp.h
15224	URG	32	old_tcp.h
15225	_yes_	1	pcmcia-opts.h
15226	_no_	0	pcmcia-opts.h
15227	SUPPORT_I82365	(_yes_)	pcmcia-opts.h
15228	PCMCIA_SHUTDOWN	(_yes_)	pcmcia-opts.h
15229	MAP_ATTRMEM_TO	0xd0000	pcmcia-opts.h
15230	MAP_ATTRMEM_LEN	0x02000	pcmcia-opts.h
15231	PDEBUG	3	pcmcia-opts.h
15232	MAXPCCSOCKS	8	pcmcia.h
15233	MAXPCCCONFIGS	8	pcmcia.h
15234	EINVAL	22	pcmcia.h
15235	SS_WRPROT	0x0001	pcmcia.h
15236	SS_CARDLOCK	0x0002	pcmcia.h
15237	SS_EJECTION	0x0004	pcmcia.h
15238	SS_INSERTION	0x0008	pcmcia.h
15239	SS_BATDEAD	0x0010	pcmcia.h
15240	SS_BATWARN	0x0020	pcmcia.h
15241	SS_READY	0x0040	pcmcia.h
15242	SS_DETECT	0x0080	pcmcia.h
15243	SS_POWERON	0x0100	pcmcia.h
15244	SS_GPI	0x0200	pcmcia.h
15245	SS_STSCHG	0x0400	pcmcia.h
15246	SS_CARDBUS	0x0800	pcmcia.h
15247	SS_3VCARD	0x1000	pcmcia.h
15248	SS_XVCARD	0x2000	pcmcia.h
15249	SS_PENDING	0x4000	pcmcia.h
15250	SS_CAP_PAGE_REGS	0x0001	pcmcia.h
15251	SS_CAP_VIRTUAL_BUS	0x0002	pcmcia.h
15252	SS_CAP_MEM_ALIGN	0x0004	pcmcia.h
15253	SS_CAP_STATIC_MAP	0x0008	pcmcia.h
15254	SS_CAP_PCCARD	0x4000	pcmcia.h
15255	SS_CAP_CARDBUS	0x8000	pcmcia.h
15256	SS_PWR_AUTO	0x0010	pcmcia.h
15257	SS_IOCARD	0x0020	pcmcia.h
15258	SS_RESET	0x0040	pcmcia.h
15259	SS_DMA_MODE	0x0080	pcmcia.h
15260	SS_SPKR_ENA	0x0100	pcmcia.h
15261	SS_OUTPUT_ENA	0x0200	pcmcia.h
15262	SS_DEBOUNCED	0x0400	pcmcia.h	Tell driver that the debounce delay has ended
15263	SS_ZVCARD	0x0800	pcmcia.h
15264	MAP_ACTIVE	0x01	pcmcia.h
15265	MAP_16BIT	0x02	pcmcia.h
15266	MAP_AUTOSZ	0x04	pcmcia.h
15267	MAP_0WS	0x08	pcmcia.h
15268	MAP_WRPROT	0x10	pcmcia.h
15269	MAP_ATTRIB	0x20	pcmcia.h
15270	MAP_USE_WAIT	0x40	pcmcia.h
15271	MAP_PREFETCH	0x80	pcmcia.h
15272	MAP_IOSPACE	0x20	pcmcia.h
15273	NULL	((void *)0)	stddef.h
15274	__WCHAR_TYPE__	long int	stddef.h
15275	ANSIESC_MAX_PARAMS	4	ansiesc.h
15276	ESC	0x1b	ansiesc.h
15277	CSI	"\033["	ansiesc.h
15278	ANSIESC_CUP	'H'	ansiesc.h
15279	ANSIESC_ED	'J'	ansiesc.h
15280	ANSIESC_ED_TO_END	0	ansiesc.h
15281	ANSIESC_ED_FROM_START	1	ansiesc.h
15282	ANSIESC_ED_ALL	2	ansiesc.h
15283	ANSIESC_SGR	'm'	ansiesc.h
15284	AOE_FL_EXTENDED	0x40	aoe.h	*< LBA48 extended addressing
15285	AOE_FL_DEV_HEAD	0x10	aoe.h	*< Device/head flag
15286	AOE_FL_ASYNC	0x02	aoe.h	*< Asynchronous write
15287	AOE_FL_WRITE	0x01	aoe.h	*< Write command
15288	AOE_VERSION	0x10	aoe.h	*< Version 1
15289	AOE_VERSION_MASK	0xf0	aoe.h	*< Version part of ver_flags field
15290	AOE_FL_RESPONSE	0x08	aoe.h	*< Message is a response
15291	AOE_FL_ERROR	0x04	aoe.h	*< Command generated an error
15292	AOE_MAJOR_BROADCAST	0xffff	aoe.h
15293	AOE_MINOR_BROADCAST	0xff	aoe.h
15294	AOE_CMD_ATA	0x00	aoe.h	*< Issue ATA command
15295	AOE_CMD_CONFIG	0x01	aoe.h	*< Query Config Information
15296	AOE_TAG_MAGIC	0xebeb0000	aoe.h
15297	AOE_ERR_BAD_COMMAND	1	aoe.h	*< Unrecognised command code
15298	AOE_ERR_BAD_PARAMETER	2	aoe.h	*< Bad argument parameter
15299	AOE_ERR_UNAVAILABLE	3	aoe.h	*< Device unavailable
15300	AOE_ERR_CONFIG_EXISTS	4	aoe.h	*< Config string present
15301	AOE_ERR_BAD_VERSION	5	aoe.h	*< Unsupported version
15302	AOE_STATUS_ERR_MASK	0x0f	aoe.h	*< Error portion of status code
15303	AOE_STATUS_PENDING	0x80	aoe.h	*< Command pending
15304	AOE_MAX_COUNT	2	aoe.h
15305	__arp_net_protocol	__table ( struct arp_net_protocol, arp_net_protocols, 01 )	arp.h
15306	ASN1_INTEGER	0x02	asn1.h
15307	ASN1_BIT_STRING	0x03	asn1.h
15308	ASN1_OCTET_STRING	0x04	asn1.h
15309	ASN1_NULL	0x05	asn1.h
15310	ASN1_OID	0x06	asn1.h
15311	ASN1_SEQUENCE	0x30	asn1.h
15312	ASN1_IP_ADDRESS	0x40	asn1.h
15313	ASN1_EXPLICIT_TAG	0xa0	asn1.h
15314	ATA_DEV_OBSOLETE	0xa0	ata.h
15315	ATA_DEV_LBA	0x40	ata.h
15316	ATA_DEV_SLAVE	0x10	ata.h
15317	ATA_DEV_MASTER	0x00	ata.h
15318	ATA_DEV_MASK	0xf0	ata.h
15319	ATA_CMD_READ	0x20	ata.h
15320	ATA_CMD_READ_EXT	0x24	ata.h
15321	ATA_CMD_WRITE	0x30	ata.h
15322	ATA_CMD_WRITE_EXT	0x34	ata.h
15323	ATA_CMD_IDENTIFY	0xec	ata.h
15324	ATA_SUPPORTS_LBA48	( 1 << 10 )	ata.h
15325	ATA_SECTOR_SIZE	512	ata.h
15326	BITMAP_BLKSIZE	( sizeof ( bitmap_block_t ) * 8 )	bitmap.h
15327	cpu_to_BIT64	cpu_to_le64	bitops.h
15328	cpu_to_BIT32	cpu_to_le32	bitops.h
15329	BIT64_to_cpu	le64_to_cpu	bitops.h
15330	BIT32_to_cpu	le32_to_cpu	bitops.h
15331	cpu_to_BIT64	cpu_to_be64	bitops.h
15332	cpu_to_BIT32	cpu_to_be32	bitops.h
15333	BIT64_to_cpu	be64_to_cpu	bitops.h
15334	BIT32_to_cpu	be32_to_cpu	bitops.h
15335	__command	__table ( struct command, commands, 01 )	command.h
15336	CPIO_MAGIC	"070701"	cpio.h
15337	BUS_TYPE_PCI	1	device.h
15338	BUS_TYPE_ISAPNP	2	device.h
15339	BUS_TYPE_EISA	3	device.h
15340	BUS_TYPE_MCA	4	device.h
15341	BUS_TYPE_ISA	5	device.h
15342	__root_device	__table ( struct root_device, root_devices, 01 )	device.h
15343	BOOTPS_PORT	67	dhcp.h
15344	BOOTPC_PORT	68	dhcp.h
15345	PXE_PORT	4011	dhcp.h
15346	DHCP_PAD	0	dhcp.h
15347	DHCP_MIN_OPTION	1	dhcp.h
15348	DHCP_SUBNET_MASK	1	dhcp.h
15349	DHCP_ROUTERS	3	dhcp.h
15350	DHCP_DNS_SERVERS	6	dhcp.h
15351	DHCP_LOG_SERVERS	7	dhcp.h
15352	DHCP_HOST_NAME	12	dhcp.h
15353	DHCP_DOMAIN_NAME	15	dhcp.h
15354	DHCP_ROOT_PATH	17	dhcp.h
15355	DHCP_VENDOR_ENCAP	43	dhcp.h
15356	DHCP_PXE_DISCOVERY_CONTROL	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 6 )	dhcp.h
15357	DHCP_PXE_BOOT_SERVER_MCAST	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 7 )	dhcp.h
15358	DHCP_PXE_BOOT_SERVERS	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 8 )	dhcp.h
15359	DHCP_PXE_BOOT_MENU	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 9 )	dhcp.h
15360	DHCP_PXE_BOOT_MENU_PROMPT	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 10 )	dhcp.h
15361	DHCP_PXE_BOOT_MENU_ITEM	DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 71 )	dhcp.h
15362	DHCP_REQUESTED_ADDRESS	50	dhcp.h
15363	DHCP_LEASE_TIME	51	dhcp.h
15364	DHCP_OPTION_OVERLOAD	52	dhcp.h
15365	DHCP_OPTION_OVERLOAD_FILE	1	dhcp.h
15366	DHCP_OPTION_OVERLOAD_SNAME	2	dhcp.h
15367	DHCP_MESSAGE_TYPE	53	dhcp.h
15368	DHCPNONE	0	dhcp.h
15369	DHCPDISCOVER	1	dhcp.h
15370	DHCPOFFER	2	dhcp.h
15371	DHCPREQUEST	3	dhcp.h
15372	DHCPDECLINE	4	dhcp.h
15373	DHCPACK	5	dhcp.h
15374	DHCPNAK	6	dhcp.h
15375	DHCPRELEASE	7	dhcp.h
15376	DHCPINFORM	8	dhcp.h
15377	DHCP_SERVER_IDENTIFIER	54	dhcp.h
15378	DHCP_PARAMETER_REQUEST_LIST	55	dhcp.h
15379	DHCP_MAX_MESSAGE_SIZE	57	dhcp.h
15380	DHCP_VENDOR_CLASS_ID	60	dhcp.h
15381	DHCP_CLIENT_ID	61	dhcp.h
15382	DHCP_TFTP_SERVER_NAME	66	dhcp.h
15383	DHCP_BOOTFILE_NAME	67	dhcp.h
15384	DHCP_USER_CLASS_ID	77	dhcp.h
15385	DHCP_CLIENT_ARCHITECTURE	93	dhcp.h
15386	DHCP_CLIENT_NDI	94	dhcp.h
15387	DHCP_CLIENT_UUID	97	dhcp.h
15388	DHCP_CLIENT_UUID_TYPE	0	dhcp.h
15389	DHCP_EB_ENCAP	175	dhcp.h
15390	DHCP_EB_PRIORITY	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x01 )	dhcp.h
15391	DHCP_EB_YIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x02 )	dhcp.h
15392	DHCP_EB_SIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x03 )	dhcp.h
15393	DHCP_EB_KEEP_SAN	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x08 )	dhcp.h
15394	DHCP_EB_NO_PXEDHCP	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb0 )	dhcp.h
15395	DHCP_EB_BUS_ID	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb1 )	dhcp.h
15396	DHCP_EB_BIOS_DRIVE	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbd )	dhcp.h
15397	DHCP_EB_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbe )	dhcp.h
15398	DHCP_EB_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbf )	dhcp.h
15399	DHCP_EB_REVERSE_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc0 )	dhcp.h
15400	DHCP_EB_REVERSE_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc1 )	dhcp.h
15401	DHCP_EB_VERSION	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xeb )	dhcp.h
15402	DHCP_ISCSI_PRIMARY_TARGET_IQN	201	dhcp.h
15403	DHCP_ISCSI_SECONDARY_TARGET_IQN	202	dhcp.h
15404	DHCP_ISCSI_INITIATOR_IQN	203	dhcp.h
15405	DHCP_MAX_OPTION	254	dhcp.h
15406	DHCP_END	255	dhcp.h
15407	DHCP_OPTION_HEADER_LEN	( offsetof ( struct dhcp_option, data ) )	dhcp.h
15408	DHCP_MAX_LEN	0xff	dhcp.h
15409	BOOTP_REQUEST	1	dhcp.h
15410	BOOTP_REPLY	2	dhcp.h
15411	BOOTP_FL_BROADCAST	0x8000	dhcp.h
15412	DHCP_MAGIC_COOKIE	0x63825363UL	dhcp.h
15413	DHCP_MIN_LEN	552	dhcp.h
15414	DHCP_MIN_TIMEOUT	( 1 * TICKS_PER_SEC )	dhcp.h
15415	DHCP_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	dhcp.h
15416	PROXYDHCP_MAX_TIMEOUT	( 2 * TICKS_PER_SEC )	dhcp.h
15417	PXEBS_MAX_TIMEOUT	( 3 * TICKS_PER_SEC )	dhcp.h
15418	DHCP_SETTINGS_NAME	"dhcp"	dhcp.h
15419	PROXYDHCP_SETTINGS_NAME	"proxydhcp"	dhcp.h
15420	PXEBS_SETTINGS_NAME	"pxebs"	dhcp.h
15421	DNS_TYPE_A	1	dns.h
15422	DNS_TYPE_CNAME	5	dns.h
15423	DNS_TYPE_ANY	255	dns.h
15424	DNS_CLASS_IN	1	dns.h
15425	DNS_CLASS_CS	2	dns.h
15426	DNS_CLASS_CH	3	dns.h
15427	DNS_CLASS_HS	4	dns.h
15428	DNS_FLAG_QUERY	( 0x00 << 15 )	dns.h
15429	DNS_FLAG_RESPONSE	( 0x01 << 15 )	dns.h
15430	DNS_FLAG_OPCODE_QUERY	( 0x00 << 11 )	dns.h
15431	DNS_FLAG_OPCODE_IQUERY	( 0x01 << 11 )	dns.h
15432	DNS_FLAG_OPCODE_STATUS	( 0x02 << 11 )	dns.h
15433	DNS_FLAG_RD	( 0x01 << 8 )	dns.h
15434	DNS_FLAG_RA	( 0x01 << 7 )	dns.h
15435	DNS_FLAG_RCODE_OK	( 0x00 << 0 )	dns.h
15436	DNS_FLAG_RCODE_NX	( 0x03 << 0 )	dns.h
15437	DNS_PORT	53	dns.h
15438	DNS_MAX_RETRIES	3	dns.h
15439	DNS_MAX_CNAME_RECURSION	0x30	dns.h
15440	EISA_MIN_SLOT	(0x1)	eisa.h
15441	EISA_MAX_SLOT	(0xf)	eisa.h	Must be 2^n - 1
15442	EISA_VENDOR_ID	( 0xc80 )	eisa.h
15443	EISA_PROD_ID	( 0xc82 )	eisa.h
15444	EISA_GLOBAL_CONFIG	( 0xc84 )	eisa.h
15445	EISA_CMD_RESET	( 1 << 2 )	eisa.h
15446	EISA_CMD_ENABLE	( 1 << 0 )	eisa.h
15447	__eisa_driver	__table ( struct eisa_driver, eisa_drivers, 01 )	eisa.h
15448	ERRFILE_CORE	0x00002000	errfile.h	*< Core code
15449	ERRFILE_DRIVER	0x00004000	errfile.h	*< Driver code
15450	ERRFILE_NET	0x00006000	errfile.h	*< Networking code
15451	ERRFILE_IMAGE	0x00008000	errfile.h	*< Image code
15452	ERRFILE_OTHER	0x0000e000	errfile.h	*< Any other code
15453	ERRFILE_ARCH	0x00800000	errfile.h
15454	ERRFILE_asprintf	( ERRFILE_CORE \| 0x00000000 )	errfile.h
15455	ERRFILE_downloader	( ERRFILE_CORE \| 0x00010000 )	errfile.h
15456	ERRFILE_exec	( ERRFILE_CORE \| 0x00020000 )	errfile.h
15457	ERRFILE_hw	( ERRFILE_CORE \| 0x00030000 )	errfile.h
15458	ERRFILE_iobuf	( ERRFILE_CORE \| 0x00040000 )	errfile.h
15459	ERRFILE_job	( ERRFILE_CORE \| 0x00050000 )	errfile.h
15460	ERRFILE_linebuf	( ERRFILE_CORE \| 0x00060000 )	errfile.h
15461	ERRFILE_monojob	( ERRFILE_CORE \| 0x00070000 )	errfile.h
15462	ERRFILE_nvo	( ERRFILE_CORE \| 0x00080000 )	errfile.h
15463	ERRFILE_open	( ERRFILE_CORE \| 0x00090000 )	errfile.h
15464	ERRFILE_posix_io	( ERRFILE_CORE \| 0x000a0000 )	errfile.h
15465	ERRFILE_resolv	( ERRFILE_CORE \| 0x000b0000 )	errfile.h
15466	ERRFILE_settings	( ERRFILE_CORE \| 0x000c0000 )	errfile.h
15467	ERRFILE_vsprintf	( ERRFILE_CORE \| 0x000d0000 )	errfile.h
15468	ERRFILE_xfer	( ERRFILE_CORE \| 0x000e0000 )	errfile.h
15469	ERRFILE_bitmap	( ERRFILE_CORE \| 0x000f0000 )	errfile.h
15470	ERRFILE_eisa	( ERRFILE_DRIVER \| 0x00000000 )	errfile.h
15471	ERRFILE_isa	( ERRFILE_DRIVER \| 0x00010000 )	errfile.h
15472	ERRFILE_isapnp	( ERRFILE_DRIVER \| 0x00020000 )	errfile.h
15473	ERRFILE_mca	( ERRFILE_DRIVER \| 0x00030000 )	errfile.h
15474	ERRFILE_pci	( ERRFILE_DRIVER \| 0x00040000 )	errfile.h
15475	ERRFILE_nvs	( ERRFILE_DRIVER \| 0x00100000 )	errfile.h
15476	ERRFILE_spi	( ERRFILE_DRIVER \| 0x00110000 )	errfile.h
15477	ERRFILE_i2c_bit	( ERRFILE_DRIVER \| 0x00120000 )	errfile.h
15478	ERRFILE_spi_bit	( ERRFILE_DRIVER \| 0x00130000 )	errfile.h
15479	ERRFILE_3c509	( ERRFILE_DRIVER \| 0x00200000 )	errfile.h
15480	ERRFILE_bnx2	( ERRFILE_DRIVER \| 0x00210000 )	errfile.h
15481	ERRFILE_cs89x0	( ERRFILE_DRIVER \| 0x00220000 )	errfile.h
15482	ERRFILE_eepro	( ERRFILE_DRIVER \| 0x00230000 )	errfile.h
15483	ERRFILE_etherfabric	( ERRFILE_DRIVER \| 0x00240000 )	errfile.h
15484	ERRFILE_legacy	( ERRFILE_DRIVER \| 0x00250000 )	errfile.h
15485	ERRFILE_natsemi	( ERRFILE_DRIVER \| 0x00260000 )	errfile.h
15486	ERRFILE_pnic	( ERRFILE_DRIVER \| 0x00270000 )	errfile.h
15487	ERRFILE_prism2_pci	( ERRFILE_DRIVER \| 0x00280000 )	errfile.h
15488	ERRFILE_prism2_plx	( ERRFILE_DRIVER \| 0x00290000 )	errfile.h
15489	ERRFILE_rtl8139	( ERRFILE_DRIVER \| 0x002a0000 )	errfile.h
15490	ERRFILE_smc9000	( ERRFILE_DRIVER \| 0x002b0000 )	errfile.h
15491	ERRFILE_tg3	( ERRFILE_DRIVER \| 0x002c0000 )	errfile.h
15492	ERRFILE_3c509_eisa	( ERRFILE_DRIVER \| 0x002d0000 )	errfile.h
15493	ERRFILE_3c515	( ERRFILE_DRIVER \| 0x002e0000 )	errfile.h
15494	ERRFILE_3c529	( ERRFILE_DRIVER \| 0x002f0000 )	errfile.h
15495	ERRFILE_3c595	( ERRFILE_DRIVER \| 0x00300000 )	errfile.h
15496	ERRFILE_3c5x9	( ERRFILE_DRIVER \| 0x00310000 )	errfile.h
15497	ERRFILE_3c90x	( ERRFILE_DRIVER \| 0x00320000 )	errfile.h
15498	ERRFILE_amd8111e	( ERRFILE_DRIVER \| 0x00330000 )	errfile.h
15499	ERRFILE_davicom	( ERRFILE_DRIVER \| 0x00340000 )	errfile.h
15500	ERRFILE_depca	( ERRFILE_DRIVER \| 0x00350000 )	errfile.h
15501	ERRFILE_dmfe	( ERRFILE_DRIVER \| 0x00360000 )	errfile.h
15502	ERRFILE_eepro100	( ERRFILE_DRIVER \| 0x00380000 )	errfile.h
15503	ERRFILE_epic100	( ERRFILE_DRIVER \| 0x00390000 )	errfile.h
15504	ERRFILE_forcedeth	( ERRFILE_DRIVER \| 0x003a0000 )	errfile.h
15505	ERRFILE_mtd80x	( ERRFILE_DRIVER \| 0x003b0000 )	errfile.h
15506	ERRFILE_ns83820	( ERRFILE_DRIVER \| 0x003c0000 )	errfile.h
15507	ERRFILE_ns8390	( ERRFILE_DRIVER \| 0x003d0000 )	errfile.h
15508	ERRFILE_pcnet32	( ERRFILE_DRIVER \| 0x003e0000 )	errfile.h
15509	ERRFILE_r8169	( ERRFILE_DRIVER \| 0x003f0000 )	errfile.h
15510	ERRFILE_sis900	( ERRFILE_DRIVER \| 0x00400000 )	errfile.h
15511	ERRFILE_sundance	( ERRFILE_DRIVER \| 0x00410000 )	errfile.h
15512	ERRFILE_tlan	( ERRFILE_DRIVER \| 0x00420000 )	errfile.h
15513	ERRFILE_tulip	( ERRFILE_DRIVER \| 0x00430000 )	errfile.h
15514	ERRFILE_via_rhine	( ERRFILE_DRIVER \| 0x00440000 )	errfile.h
15515	ERRFILE_via_velocity	( ERRFILE_DRIVER \| 0x00450000 )	errfile.h
15516	ERRFILE_w89c840	( ERRFILE_DRIVER \| 0x00460000 )	errfile.h
15517	ERRFILE_ipoib	( ERRFILE_DRIVER \| 0x00470000 )	errfile.h
15518	ERRFILE_e1000	( ERRFILE_DRIVER \| 0x00480000 )	errfile.h
15519	ERRFILE_e1000_hw	( ERRFILE_DRIVER \| 0x00490000 )	errfile.h
15520	ERRFILE_mtnic	( ERRFILE_DRIVER \| 0x004a0000 )	errfile.h
15521	ERRFILE_phantom	( ERRFILE_DRIVER \| 0x004b0000 )	errfile.h
15522	ERRFILE_ne2k_isa	( ERRFILE_DRIVER \| 0x004c0000 )	errfile.h
15523	ERRFILE_b44	( ERRFILE_DRIVER \| 0x004d0000 )	errfile.h
15524	ERRFILE_scsi	( ERRFILE_DRIVER \| 0x00700000 )	errfile.h
15525	ERRFILE_arbel	( ERRFILE_DRIVER \| 0x00710000 )	errfile.h
15526	ERRFILE_hermon	( ERRFILE_DRIVER \| 0x00720000 )	errfile.h
15527	ERRFILE_linda	( ERRFILE_DRIVER \| 0x00730000 )	errfile.h
15528	ERRFILE_aoe	( ERRFILE_NET \| 0x00000000 )	errfile.h
15529	ERRFILE_arp	( ERRFILE_NET \| 0x00010000 )	errfile.h
15530	ERRFILE_dhcpopts	( ERRFILE_NET \| 0x00020000 )	errfile.h
15531	ERRFILE_ethernet	( ERRFILE_NET \| 0x00030000 )	errfile.h
15532	ERRFILE_icmpv6	( ERRFILE_NET \| 0x00040000 )	errfile.h
15533	ERRFILE_ipv4	( ERRFILE_NET \| 0x00050000 )	errfile.h
15534	ERRFILE_ipv6	( ERRFILE_NET \| 0x00060000 )	errfile.h
15535	ERRFILE_ndp	( ERRFILE_NET \| 0x00070000 )	errfile.h
15536	ERRFILE_netdevice	( ERRFILE_NET \| 0x00080000 )	errfile.h
15537	ERRFILE_nullnet	( ERRFILE_NET \| 0x00090000 )	errfile.h
15538	ERRFILE_tcp	( ERRFILE_NET \| 0x000a0000 )	errfile.h
15539	ERRFILE_ftp	( ERRFILE_NET \| 0x000b0000 )	errfile.h
15540	ERRFILE_http	( ERRFILE_NET \| 0x000c0000 )	errfile.h
15541	ERRFILE_iscsi	( ERRFILE_NET \| 0x000d0000 )	errfile.h
15542	ERRFILE_tcpip	( ERRFILE_NET \| 0x000e0000 )	errfile.h
15543	ERRFILE_udp	( ERRFILE_NET \| 0x000f0000 )	errfile.h
15544	ERRFILE_dhcp	( ERRFILE_NET \| 0x00100000 )	errfile.h
15545	ERRFILE_dns	( ERRFILE_NET \| 0x00110000 )	errfile.h
15546	ERRFILE_tftp	( ERRFILE_NET \| 0x00120000 )	errfile.h
15547	ERRFILE_infiniband	( ERRFILE_NET \| 0x00130000 )	errfile.h
15548	ERRFILE_netdev_settings	( ERRFILE_NET \| 0x00140000 )	errfile.h
15549	ERRFILE_dhcppkt	( ERRFILE_NET \| 0x00150000 )	errfile.h
15550	ERRFILE_slam	( ERRFILE_NET \| 0x00160000 )	errfile.h
15551	ERRFILE_ib_sma	( ERRFILE_NET \| 0x00170000 )	errfile.h
15552	ERRFILE_ib_packet	( ERRFILE_NET \| 0x00180000 )	errfile.h
15553	ERRFILE_icmp	( ERRFILE_NET \| 0x00190000 )	errfile.h
15554	ERRFILE_image	( ERRFILE_IMAGE \| 0x00000000 )	errfile.h
15555	ERRFILE_elf	( ERRFILE_IMAGE \| 0x00010000 )	errfile.h
15556	ERRFILE_script	( ERRFILE_IMAGE \| 0x00020000 )	errfile.h
15557	ERRFILE_segment	( ERRFILE_IMAGE \| 0x00030000 )	errfile.h
15558	ERRFILE_efi_image	( ERRFILE_IMAGE \| 0x00040000 )	errfile.h
15559	ERRFILE_embedded	( ERRFILE_IMAGE \| 0x00050000 )	errfile.h
15560	ERRFILE_asn1	( ERRFILE_OTHER \| 0x00000000 )	errfile.h
15561	ERRFILE_chap	( ERRFILE_OTHER \| 0x00010000 )	errfile.h
15562	ERRFILE_aoeboot	( ERRFILE_OTHER \| 0x00020000 )	errfile.h
15563	ERRFILE_autoboot	( ERRFILE_OTHER \| 0x00030000 )	errfile.h
15564	ERRFILE_dhcpmgmt	( ERRFILE_OTHER \| 0x00040000 )	errfile.h
15565	ERRFILE_imgmgmt	( ERRFILE_OTHER \| 0x00050000 )	errfile.h
15566	ERRFILE_pxe_tftp	( ERRFILE_OTHER \| 0x00060000 )	errfile.h
15567	ERRFILE_pxe_udp	( ERRFILE_OTHER \| 0x00070000 )	errfile.h
15568	ERRFILE_axtls_aes	( ERRFILE_OTHER \| 0x00080000 )	errfile.h
15569	ERRFILE_cipher	( ERRFILE_OTHER \| 0x00090000 )	errfile.h
15570	ERRFILE_image_cmd	( ERRFILE_OTHER \| 0x000a0000 )	errfile.h
15571	ERRFILE_uri_test	( ERRFILE_OTHER \| 0x000b0000 )	errfile.h
15572	ERRFILE_ibft	( ERRFILE_OTHER \| 0x000c0000 )	errfile.h
15573	ERRFILE_tls	( ERRFILE_OTHER \| 0x000d0000 )	errfile.h
15574	ERRFILE_ifmgmt	( ERRFILE_OTHER \| 0x000e0000 )	errfile.h
15575	ERRFILE_iscsiboot	( ERRFILE_OTHER \| 0x000f0000 )	errfile.h
15576	ERRFILE_efi_pci	( ERRFILE_OTHER \| 0x00100000 )	errfile.h
15577	ERRFILE_efi_snp	( ERRFILE_OTHER \| 0x00110000 )	errfile.h
15578	ERRFILE_smbios	( ERRFILE_OTHER \| 0x00120000 )	errfile.h
15579	ERRFILE_smbios_settings	( ERRFILE_OTHER \| 0x00130000 )	errfile.h
15580	ERRFILE_efi_smbios	( ERRFILE_OTHER \| 0x00140000 )	errfile.h
15581	ERRFILE_pxemenu	( ERRFILE_OTHER \| 0x00150000 )	errfile.h
15582	ERRFILE_x509	( ERRFILE_OTHER \| 0x00160000 )	errfile.h
15583	ERRFILE_login_ui	( ERRFILE_OTHER \| 0x00170000 )	errfile.h
15584	__errortab	__table ( struct errortab, errortab, 01 )	errortab.h
15585	FEATURE_PROTOCOL	01	features.h	*< Network protocols
15586	FEATURE_IMAGE	02	features.h	*< Image formats
15587	FEATURE_MISC	03	features.h	*< Miscellaneous
15588	DHCP_EB_FEATURE_PXE_EXT	0x10	features.h	*< PXE API extensions
15589	DHCP_EB_FEATURE_ISCSI	0x11	features.h	*< iSCSI protocol
15590	DHCP_EB_FEATURE_AOE	0x12	features.h	*< AoE protocol
15591	DHCP_EB_FEATURE_HTTP	0x13	features.h	*< HTTP protocol
15592	DHCP_EB_FEATURE_HTTPS	0x14	features.h	*< HTTPS protocol
15593	DHCP_EB_FEATURE_TFTP	0x15	features.h	*< TFTP protocol
15594	DHCP_EB_FEATURE_FTP	0x16	features.h	*< FTP protocol
15595	DHCP_EB_FEATURE_DNS	0x17	features.h	*< DNS protocol
15596	DHCP_EB_FEATURE_BZIMAGE	0x18	features.h	*< bzImage format
15597	DHCP_EB_FEATURE_MULTIBOOT	0x19	features.h	*< Multiboot format
15598	DHCP_EB_FEATURE_SLAM	0x1a	features.h	*< SLAM protocol
15599	DHCP_EB_FEATURE_NBI	0x20	features.h	*< NBI format
15600	DHCP_EB_FEATURE_PXE	0x21	features.h	*< PXE format
15601	DHCP_EB_FEATURE_ELF	0x22	features.h	*< ELF format
15602	DHCP_EB_FEATURE_COMBOOT	0x23	features.h	*< COMBOOT format
15603	DHCP_EB_FEATURE_EFI	0x24	features.h	*< EFI format
15604	__dhcp_feature	__table ( uint8_t, dhcp_features, 01 )	features.h
15605	FTP_PORT	21	ftp.h
15606	__gdb_transport	__table ( struct gdb_transport, gdb_transports, 01 )	gdbstub.h
15607	HTTP_PORT	80	http.h
15608	HTTPS_PORT	443	http.h
15609	I2C_TENBIT_ADDRESS	0x7800	i2c.h
15610	I2C_WRITE	0	i2c.h
15611	I2C_READ	1	i2c.h
15612	I2C_UDELAY	5	i2c.h
15613	I2C_RESET_MAX_CYCLES	32	i2c.h
15614	IB_SMP_CLASS_VERSION	1	ib_mad.h
15615	IB_SMP_STATUS_D_INBOUND	0x8000	ib_mad.h
15616	IB_SMP_ATTR_NOTICE	0x0002	ib_mad.h
15617	IB_SMP_ATTR_NODE_DESC	0x0010	ib_mad.h
15618	IB_SMP_ATTR_NODE_INFO	0x0011	ib_mad.h
15619	IB_SMP_ATTR_SWITCH_INFO	0x0012	ib_mad.h
15620	IB_SMP_ATTR_GUID_INFO	0x0014	ib_mad.h
15621	IB_SMP_ATTR_PORT_INFO	0x0015	ib_mad.h
15622	IB_SMP_ATTR_PKEY_TABLE	0x0016	ib_mad.h
15623	IB_SMP_ATTR_SL_TO_VL_TABLE	0x0017	ib_mad.h
15624	IB_SMP_ATTR_VL_ARB_TABLE	0x0018	ib_mad.h
15625	IB_SMP_ATTR_LINEAR_FORWARD_TABL	0x0019	ib_mad.h
15626	IB_SMP_ATTR_RANDOM_FORWARD_TABL	0x001A	ib_mad.h
15627	IB_SMP_ATTR_MCAST_FORWARD_TABLE	0x001B	ib_mad.h
15628	IB_SMP_ATTR_SM_INFO	0x0020	ib_mad.h
15629	IB_SMP_ATTR_VENDOR_DIAG	0x0030	ib_mad.h
15630	IB_SMP_ATTR_LED_INFO	0x0031	ib_mad.h
15631	IB_SMP_ATTR_VENDOR_MASK	0xFF00	ib_mad.h
15632	IB_NODE_TYPE_HCA	0x01	ib_mad.h
15633	IB_NODE_TYPE_SWITCH	0x02	ib_mad.h
15634	IB_NODE_TYPE_ROUTER	0x03	ib_mad.h
15635	IB_LINK_WIDTH_1X	0x01	ib_mad.h
15636	IB_LINK_WIDTH_4X	0x02	ib_mad.h
15637	IB_LINK_WIDTH_8X	0x04	ib_mad.h
15638	IB_LINK_WIDTH_12X	0x08	ib_mad.h
15639	IB_LINK_SPEED_SDR	0x01	ib_mad.h
15640	IB_LINK_SPEED_DDR	0x02	ib_mad.h
15641	IB_LINK_SPEED_QDR	0x04	ib_mad.h
15642	IB_PORT_STATE_DOWN	0x01	ib_mad.h
15643	IB_PORT_STATE_INIT	0x02	ib_mad.h
15644	IB_PORT_STATE_ARMED	0x03	ib_mad.h
15645	IB_PORT_STATE_ACTIVE	0x04	ib_mad.h
15646	IB_PORT_PHYS_STATE_SLEEP	0x01	ib_mad.h
15647	IB_PORT_PHYS_STATE_POLLING	0x02	ib_mad.h
15648	IB_MTU_256	0x01	ib_mad.h
15649	IB_MTU_512	0x02	ib_mad.h
15650	IB_MTU_1024	0x03	ib_mad.h
15651	IB_MTU_2048	0x04	ib_mad.h
15652	IB_MTU_4096	0x05	ib_mad.h
15653	IB_VL_0	0x01	ib_mad.h
15654	IB_VL_0_1	0x02	ib_mad.h
15655	IB_VL_0_3	0x03	ib_mad.h
15656	IB_VL_0_7	0x04	ib_mad.h
15657	IB_VL_0_14	0x05	ib_mad.h
15658	IB_SA_ATTR_MC_MEMBER_REC	0x38	ib_mad.h
15659	IB_SA_ATTR_PATH_REC	0x35	ib_mad.h
15660	IB_SA_PATH_REC_DGID	(1<<2)	ib_mad.h
15661	IB_SA_PATH_REC_SGID	(1<<3)	ib_mad.h
15662	IB_SA_MCMEMBER_REC_MGID	(1<<0)	ib_mad.h
15663	IB_SA_MCMEMBER_REC_PORT_GID	(1<<1)	ib_mad.h
15664	IB_SA_MCMEMBER_REC_QKEY	(1<<2)	ib_mad.h
15665	IB_SA_MCMEMBER_REC_MLID	(1<<3)	ib_mad.h
15666	IB_SA_MCMEMBER_REC_MTU_SELECTOR	(1<<4)	ib_mad.h
15667	IB_SA_MCMEMBER_REC_MTU	(1<<5)	ib_mad.h
15668	IB_SA_MCMEMBER_REC_TRAFFIC_CLAS	(1<<6)	ib_mad.h
15669	IB_SA_MCMEMBER_REC_PKEY	(1<<7)	ib_mad.h
15670	IB_SA_MCMEMBER_REC_RATE_SELECTO	(1<<8)	ib_mad.h
15671	IB_SA_MCMEMBER_REC_RATE	(1<<9)	ib_mad.h
15672	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<10)	ib_mad.h
15673	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<11)	ib_mad.h
15674	IB_SA_MCMEMBER_REC_SL	(1<<12)	ib_mad.h
15675	IB_SA_MCMEMBER_REC_FLOW_LABEL	(1<<13)	ib_mad.h
15676	IB_SA_MCMEMBER_REC_HOP_LIMIT	(1<<14)	ib_mad.h
15677	IB_SA_MCMEMBER_REC_SCOPE	(1<<15)	ib_mad.h
15678	IB_SA_MCMEMBER_REC_JOIN_STATE	(1<<16)	ib_mad.h
15679	IB_SA_MCMEMBER_REC_PROXY_JOIN	(1<<17)	ib_mad.h
15680	IB_MGMT_BASE_VERSION	1	ib_mad.h
15681	IB_MGMT_CLASS_SUBN_LID_ROUTED	0x01	ib_mad.h
15682	IB_MGMT_CLASS_SUBN_DIRECTED_ROU	0x81	ib_mad.h
15683	IB_MGMT_CLASS_SUBN_ADM	0x03	ib_mad.h
15684	IB_MGMT_CLASS_PERF_MGMT	0x04	ib_mad.h
15685	IB_MGMT_CLASS_BM	0x05	ib_mad.h
15686	IB_MGMT_CLASS_DEVICE_MGMT	0x06	ib_mad.h
15687	IB_MGMT_CLASS_CM	0x07	ib_mad.h
15688	IB_MGMT_CLASS_SNMP	0x08	ib_mad.h
15689	IB_MGMT_CLASS_VENDOR_RANGE2_STA	0x30	ib_mad.h
15690	IB_MGMT_CLASS_VENDOR_RANGE2_END	0x4F	ib_mad.h
15691	IB_MGMT_METHOD_GET	0x01	ib_mad.h
15692	IB_MGMT_METHOD_SET	0x02	ib_mad.h
15693	IB_MGMT_METHOD_GET_RESP	0x81	ib_mad.h
15694	IB_MGMT_METHOD_SEND	0x03	ib_mad.h
15695	IB_MGMT_METHOD_TRAP	0x05	ib_mad.h
15696	IB_MGMT_METHOD_REPORT	0x06	ib_mad.h
15697	IB_MGMT_METHOD_REPORT_RESP	0x86	ib_mad.h
15698	IB_MGMT_METHOD_TRAP_REPRESS	0x07	ib_mad.h
15699	IB_MGMT_METHOD_DELETE	0x15	ib_mad.h
15700	IB_MGMT_STATUS_OK	0x0000	ib_mad.h
15701	IB_MGMT_STATUS_BAD_VERSION	0x0001	ib_mad.h
15702	IB_MGMT_STATUS_UNSUPPORTED_METH	0x0002	ib_mad.h
15703	IB_MGMT_STATUS_UNSUPPORTED_METH	0x0003	ib_mad.h
15704	IB_MGMT_STATUS_INVALID_VALUE	0x0004	ib_mad.h
15705	IB_LID_NONE	0xffff	ib_packet.h
15706	IB_GRH_IPVER_IPv6	0x06	ib_packet.h
15707	IB_GRH_NXTHDR_IBA	0x1b	ib_packet.h
15708	IB_PKEY_NONE	0xffff	ib_packet.h
15709	IB_QPN_SMP	0	ib_packet.h
15710	IB_MAX_HEADER_SIZE	sizeof ( union ib_headers )	ib_packet.h
15711	IB_SMA_PAYLOAD_LEN	2048	ib_sma.h
15712	IB_SMA_NUM_SEND_WQES	4	ib_sma.h
15713	IB_SMA_NUM_RECV_WQES	2	ib_sma.h
15714	IB_SMA_NUM_CQES	8	ib_sma.h
15715	ICMP_ECHO_RESPONSE	0	icmp.h
15716	ICMP_ECHO_REQUEST	8	icmp.h
15717	ICMP6_NSOLICIT	135	icmp6.h
15718	ICMP6_NADVERT	136	icmp6.h
15719	ICMP6_FLAGS_ROUTER	0x80	icmp6.h
15720	ICMP6_FLAGS_SOLICITED	0x40	icmp6.h
15721	ICMP6_FLAGS_OVERRIDE	0x20	icmp6.h
15722	ARPHRD_NETROM	0	if_arp.h	*< from KA9Q: NET/ROM pseudo
15723	ARPHRD_ETHER	1	if_arp.h	*< Ethernet 10Mbps
15724	ARPHRD_EETHER	2	if_arp.h	*< Experimental Ethernet
15725	ARPHRD_AX25	3	if_arp.h	*< AX.25 Level 2
15726	ARPHRD_PRONET	4	if_arp.h	*< PROnet token ring
15727	ARPHRD_CHAOS	5	if_arp.h	*< Chaosnet
15728	ARPHRD_IEEE802	6	if_arp.h	*< IEEE 802.2 Ethernet/TR/TB
15729	ARPHRD_ARCNET	7	if_arp.h	*< ARCnet
15730	ARPHRD_APPLETLK	8	if_arp.h	*< APPLEtalk
15731	ARPHRD_DLCI	15	if_arp.h	*< Frame Relay DLCI
15732	ARPHRD_ATM	19	if_arp.h	*< ATM
15733	ARPHRD_METRICOM	23	if_arp.h	*< Metricom STRIP (new IANA id)
15734	ARPHRD_IEEE1394	24	if_arp.h	*< IEEE 1394 IPv4 - RFC 2734
15735	ARPHRD_EUI64	27	if_arp.h	*< EUI-64
15736	ARPHRD_INFINIBAND	32	if_arp.h	*< InfiniBand
15737	ARPOP_REQUEST	1	if_arp.h	*< ARP request
15738	ARPOP_REPLY	2	if_arp.h	*< ARP reply
15739	ARPOP_RREQUEST	3	if_arp.h	*< RARP request
15740	ARPOP_RREPLY	4	if_arp.h	*< RARP reply
15741	ARPOP_InREQUEST	8	if_arp.h	*< InARP request
15742	ARPOP_InREPLY	9	if_arp.h	*< InARP reply
15743	ARPOP_NAK	10	if_arp.h	*< (ATM)ARP NAK
15744	ETH_ALEN	6	if_ether.h	Size of Ethernet address
15745	ETH_HLEN	14	if_ether.h	Size of ethernet header
15746	ETH_ZLEN	60	if_ether.h	Minimum packet
15747	ETH_FRAME_LEN	1514	if_ether.h	Maximum packet
15748	ETH_DATA_ALIGN	2	if_ether.h	Amount needed to align the data after an ethernet header
15749	ETH_MAX_MTU	(ETH_FRAME_LEN-ETH_HLEN)	if_ether.h
15750	ETH_P_RAW	0x0000	if_ether.h	Raw packet
15751	ETH_P_IP	0x0800	if_ether.h	Internet Protocl Packet
15752	ETH_P_ARP	0x0806	if_ether.h	Address Resolution Protocol
15753	ETH_P_RARP	0x8035	if_ether.h	Reverse Address resolution Protocol
15754	ETH_P_IPV6	0x86DD	if_ether.h	IPv6 over blueblook
15755	ETH_P_SLOW	0x8809	if_ether.h	Ethernet slow protocols
15756	ETH_P_AOE	0x88A2	if_ether.h	ATA over Ethernet
15757	IMAGE_LOADED	0x0001	image.h
15758	PROBE_MULTIBOOT	01	image.h
15759	PROBE_NORMAL	02	image.h
15760	PROBE_PXE	03	image.h
15761	IP_ICMP	1	in.h
15762	IP_IGMP	2	in.h
15763	IP_TCP	6	in.h
15764	IP_UDP	17	in.h
15765	IP_ICMP6	58	in.h
15766	INADDR_NONE	0xffffffff	in.h
15767	INADDR_BROADCAST	0xffffffff	in.h
15768	IN_CLASSA_NET	0xff000000	in.h
15769	IN_CLASSB_NET	0xffff0000	in.h
15770	IN_CLASSC_NET	0xffffff00	in.h
15771	IB_SA_QPN	1	infiniband.h
15772	IB_BROADCAST_QPN	0xffffffUL	infiniband.h
15773	IB_GLOBAL_QKEY	0x80010000UL	infiniband.h
15774	INIT_EARLY	01	init.h	*< Early initialisation
15775	INIT_SERIAL	02	init.h	*< Serial driver initialisation
15776	INIT_CONSOLE	03	init.h	*< Console initialisation
15777	INIT_NORMAL	04	init.h	*< Normal initialisation
15778	STARTUP_EARLY	01	init.h	*< Early startup
15779	STARTUP_NORMAL	02	init.h	*< Normal startup
15780	STARTUP_LATE	03	init.h	*< Late startup
15781	IOB_ALIGN	2048	iobuf.h
15782	IOB_ZLEN	64	iobuf.h
15783	IP_VER	0x40U	ip.h
15784	IP_MASK_VER	0xf0U	ip.h
15785	IP_MASK_HLEN	0x0fU	ip.h
15786	IP_MASK_OFFSET	0x1fffU	ip.h
15787	IP_MASK_DONOTFRAG	0x4000U	ip.h
15788	IP_MASK_MOREFRAGS	0x2000U	ip.h
15789	IP_PSHLEN	12	ip.h
15790	IP_TOS	0	ip.h
15791	IP_TTL	64	ip.h
15792	IP_FRAG_IOB_SIZE	1500	ip.h
15793	IP_FRAG_TIMEOUT	50	ip.h
15794	IP6_VERSION	0x6	ip6.h
15795	IP6_HOP_LIMIT	255	ip6.h
15796	MAX_HDR_LEN	100	ip6.h
15797	MAX_IOB_LEN	1500	ip6.h
15798	MIN_IOB_LEN	MAX_HDR_LEN + 100	ip6.h	To account for padding by LL
15799	IP6_HOPBYHOP	0x00	ip6.h
15800	IP6_ROUTING	0x43	ip6.h
15801	IP6_FRAGMENT	0x44	ip6.h
15802	IP6_AUTHENTICATION	0x51	ip6.h
15803	IP6_DEST_OPTS	0x60	ip6.h
15804	IP6_ESP	0x50	ip6.h
15805	IP6_ICMP6	0x58	ip6.h
15806	IP6_NO_HEADER	0x59	ip6.h
15807	IPOIB_PKT_LEN	2048	ipoib.h
15808	IPOIB_ALEN	20	ipoib.h
15809	IPOIB_HLEN	4	ipoib.h
15810	__isa_driver	__table ( struct isa_driver, isa_drivers, 01 )	isa.h
15811	ISAPNP_ADDRESS	0x279	isapnp.h
15812	ISAPNP_WRITE_DATA	0xa79	isapnp.h
15813	ISAPNP_READ_PORT_MIN	0x203	isapnp.h
15814	ISAPNP_READ_PORT_START	0x213	isapnp.h	ISAPnP spec says 0x203, but
15815	ISAPNP_READ_PORT_MAX	0x3ff	isapnp.h
15816	ISAPNP_READ_PORT_STEP	0x10	isapnp.h	Can be any multiple of 4
15817	ISAPNP_CSN_MIN	0x01	isapnp.h
15818	ISAPNP_CSN_MAX	0x0f	isapnp.h
15819	ISAPNP_READPORT	0x00	isapnp.h
15820	ISAPNP_SERIALISOLATION	0x01	isapnp.h
15821	ISAPNP_CONFIGCONTROL	0x02	isapnp.h
15822	ISAPNP_WAKE	0x03	isapnp.h
15823	ISAPNP_RESOURCEDATA	0x04	isapnp.h
15824	ISAPNP_STATUS	0x05	isapnp.h
15825	ISAPNP_CARDSELECTNUMBER	0x06	isapnp.h
15826	ISAPNP_LOGICALDEVICENUMBER	0x07	isapnp.h
15827	ISAPNP_ACTIVATE	0x30	isapnp.h
15828	ISAPNP_IORANGECHECK	0x31	isapnp.h
15829	ISAPNP_CONFIG_RESET	( 1 << 0 )	isapnp.h
15830	ISAPNP_CONFIG_WAIT_FOR_KEY	( 1 << 1 )	isapnp.h
15831	ISAPNP_CONFIG_RESET_CSN	( 1 << 2 )	isapnp.h
15832	ISAPNP_CONFIG_RESET_DRV	( ISAPNP_CONFIG_RESET \| \ ISAPNP_CONFIG_WAIT_FOR_KEY \| \ ISAPNP_CONFIG_RESET_CSN )	isapnp.h
15833	ISAPNP_LFSR_SEED	0x6a	isapnp.h
15834	ISAPNP_TAG_PNPVERNO	0x01	isapnp.h
15835	ISAPNP_TAG_LOGDEVID	0x02	isapnp.h
15836	ISAPNP_TAG_COMPATDEVID	0x03	isapnp.h
15837	ISAPNP_TAG_IRQ	0x04	isapnp.h
15838	ISAPNP_TAG_DMA	0x05	isapnp.h
15839	ISAPNP_TAG_STARTDEP	0x06	isapnp.h
15840	ISAPNP_TAG_ENDDEP	0x07	isapnp.h
15841	ISAPNP_TAG_IOPORT	0x08	isapnp.h
15842	ISAPNP_TAG_FIXEDIO	0x09	isapnp.h
15843	ISAPNP_TAG_RSVDSHORTA	0x0A	isapnp.h
15844	ISAPNP_TAG_RSVDSHORTB	0x0B	isapnp.h
15845	ISAPNP_TAG_RSVDSHORTC	0x0C	isapnp.h
15846	ISAPNP_TAG_RSVDSHORTD	0x0D	isapnp.h
15847	ISAPNP_TAG_VENDORSHORT	0x0E	isapnp.h
15848	ISAPNP_TAG_END	0x0F	isapnp.h
15849	ISAPNP_TAG_MEMRANGE	0x81	isapnp.h
15850	ISAPNP_TAG_ANSISTR	0x82	isapnp.h
15851	ISAPNP_TAG_UNICODESTR	0x83	isapnp.h
15852	ISAPNP_TAG_VENDORLONG	0x84	isapnp.h
15853	ISAPNP_TAG_MEM32RANGE	0x85	isapnp.h
15854	ISAPNP_TAG_FIXEDMEM32RANGE	0x86	isapnp.h
15855	ISAPNP_TAG_RSVDLONG0	0xF0	isapnp.h
15856	ISAPNP_TAG_RSVDLONG1	0xF1	isapnp.h
15857	ISAPNP_TAG_RSVDLONG2	0xF2	isapnp.h
15858	ISAPNP_TAG_RSVDLONG3	0xF3	isapnp.h
15859	ISAPNP_TAG_RSVDLONG4	0xF4	isapnp.h
15860	ISAPNP_TAG_RSVDLONG5	0xF5	isapnp.h
15861	ISAPNP_TAG_RSVDLONG6	0xF6	isapnp.h
15862	ISAPNP_TAG_RSVDLONG7	0xF7	isapnp.h
15863	ISAPNP_TAG_RSVDLONG8	0xF8	isapnp.h
15864	ISAPNP_TAG_RSVDLONG9	0xF9	isapnp.h
15865	ISAPNP_TAG_RSVDLONGA	0xFA	isapnp.h
15866	ISAPNP_TAG_RSVDLONGB	0xFB	isapnp.h
15867	ISAPNP_TAG_RSVDLONGC	0xFC	isapnp.h
15868	ISAPNP_TAG_RSVDLONGD	0xFD	isapnp.h
15869	ISAPNP_TAG_RSVDLONGE	0xFE	isapnp.h
15870	ISAPNP_TAG_RSVDLONGF	0xFF	isapnp.h
15871	ISAPNP_TAG_PSEUDO_NEWBOARD	0x100	isapnp.h
15872	__isapnp_driver	__table ( struct isapnp_driver, isapnp_drivers, 01 )	isapnp.h
15873	GENERIC_ISAPNP_VENDOR	ISAPNP_VENDOR ( 'P','N','P' )	isa_ids.h
15874	ISA_PROD_ID_MASK	( 0xf0ff )	isa_ids.h
15875	ISCSI_PORT	3260	iscsi.h
15876	ISCSI_OPCODE_MASK	0x3f	iscsi.h
15877	ISCSI_FLAG_IMMEDIATE	0x40	iscsi.h
15878	ISCSI_FLAG_FINAL	0x80	iscsi.h
15879	ISCSI_OPCODE_LOGIN_REQUEST	0x03	iscsi.h
15880	ISCSI_LOGIN_FLAG_TRANSITION	0x80	iscsi.h
15881	ISCSI_LOGIN_FLAG_CONTINUE	0x40	iscsi.h
15882	ISCSI_LOGIN_CSG_MASK	0x0c	iscsi.h
15883	ISCSI_LOGIN_CSG_SECURITY_NEGOTI	0x00	iscsi.h
15884	ISCSI_LOGIN_CSG_OPERATIONAL_NEG	0x04	iscsi.h
15885	ISCSI_LOGIN_CSG_FULL_FEATURE_PH	0x0c	iscsi.h
15886	ISCSI_LOGIN_NSG_MASK	0x03	iscsi.h
15887	ISCSI_LOGIN_NSG_SECURITY_NEGOTI	0x00	iscsi.h
15888	ISCSI_LOGIN_NSG_OPERATIONAL_NEG	0x01	iscsi.h
15889	ISCSI_LOGIN_NSG_FULL_FEATURE_PH	0x03	iscsi.h
15890	ISCSI_ISID_IANA	0x40000000	iscsi.h
15891	IANA_EN_FEN_SYSTEMS	10019	iscsi.h
15892	ISCSI_OPCODE_LOGIN_RESPONSE	0x23	iscsi.h
15893	ISCSI_STATUS_SUCCESS	0x00	iscsi.h
15894	ISCSI_STATUS_REDIRECT	0x01	iscsi.h
15895	ISCSI_STATUS_INITIATOR_ERROR	0x02	iscsi.h
15896	ISCSI_STATUS_INITIATOR_ERROR_AU	0x01	iscsi.h
15897	ISCSI_STATUS_INITIATOR_ERROR_AU	0x02	iscsi.h
15898	ISCSI_STATUS_INITIATOR_ERROR_NO	0x03	iscsi.h
15899	ISCSI_STATUS_INITIATOR_ERROR_RE	0x04	iscsi.h
15900	ISCSI_STATUS_TARGET_ERROR	0x03	iscsi.h
15901	ISCSI_OPCODE_SCSI_COMMAND	0x01	iscsi.h
15902	ISCSI_COMMAND_FLAG_READ	0x40	iscsi.h
15903	ISCSI_COMMAND_FLAG_WRITE	0x20	iscsi.h
15904	ISCSI_COMMAND_ATTR_UNTAGGED	0x00	iscsi.h
15905	ISCSI_COMMAND_ATTR_SIMPLE	0x01	iscsi.h
15906	ISCSI_COMMAND_ATTR_ORDERED	0x02	iscsi.h
15907	ISCSI_COMMAND_ATTR_HEAD_OF_QUEU	0x03	iscsi.h
15908	ISCSI_COMMAND_ATTR_ACA	0x04	iscsi.h
15909	ISCSI_OPCODE_SCSI_RESPONSE	0x21	iscsi.h
15910	ISCSI_RESPONSE_COMMAND_COMPLETE	0x00	iscsi.h
15911	ISCSI_RESPONSE_TARGET_FAILURE	0x01	iscsi.h
15912	ISCSI_SENSE_RESPONSE_CODE_OFFSE	2	iscsi.h
15913	ISCSI_OPCODE_DATA_IN	0x25	iscsi.h
15914	ISCSI_DATA_FLAG_ACKNOWLEDGE	0x40	iscsi.h
15915	ISCSI_DATA_FLAG_OVERFLOW	0x04	iscsi.h
15916	ISCSI_DATA_FLAG_UNDERFLOW	0x02	iscsi.h
15917	ISCSI_DATA_FLAG_STATUS	0x01	iscsi.h
15918	ISCSI_OPCODE_DATA_OUT	0x05	iscsi.h
15919	ISCSI_OPCODE_R2T	0x31	iscsi.h
15920	ISCSI_STATUS_SECURITY_NEGOTIATI	( ISCSI_LOGIN_CSG_SECURITY_NEGOTIATION \| \ ISCSI_LOGIN_NSG_OPERATIONAL_NEGOTIATION )	iscsi.h
15921	ISCSI_STATUS_OPERATIONAL_NEGOTI	( ISCSI_LOGIN_CSG_OPERATIONAL_NEGOTIATION \| \ ISCSI_LOGIN_NSG_FULL_FEATURE_PHASE )	iscsi.h
15922	ISCSI_STATUS_FULL_FEATURE_PHASE	ISCSI_LOGIN_CSG_FULL_FEATURE_PHASE	iscsi.h
15923	ISCSI_STATUS_PHASE_MASK	( ISCSI_LOGIN_CSG_MASK \| ISCSI_LOGIN_NSG_MASK )	iscsi.h
15924	ISCSI_STATUS_STRINGS_SECURITY	0x0100	iscsi.h
15925	ISCSI_STATUS_STRINGS_CHAP_ALGOR	0x0200	iscsi.h
15926	ISCSI_STATUS_STRINGS_CHAP_RESPO	0x0400	iscsi.h
15927	ISCSI_STATUS_STRINGS_CHAP_CHALL	0x0800	iscsi.h
15928	ISCSI_STATUS_STRINGS_OPERATIONA	0x1000	iscsi.h
15929	ISCSI_STATUS_STRINGS_MASK	0xff00	iscsi.h
15930	ISCSI_STATUS_AUTH_FORWARD_REQUI	0x00010000	iscsi.h
15931	ISCSI_STATUS_AUTH_REVERSE_REQUI	0x00020000	iscsi.h
15932	ISCSI_STATUS_AUTH_REVERSE_OK	0x00040000	iscsi.h
15933	ISCSI_MAX_RETRIES	2	iscsi.h
15934	NUL	0x00	keys.h
15935	CTRL_A	0x01	keys.h
15936	CTRL_B	0x02	keys.h
15937	CTRL_C	0x03	keys.h
15938	CTRL_D	0x04	keys.h
15939	CTRL_E	0x05	keys.h
15940	CTRL_F	0x06	keys.h
15941	CTRL_G	0x07	keys.h
15942	CTRL_H	0x08	keys.h
15943	CTRL_I	0x09	keys.h
15944	CTRL_J	0x0a	keys.h
15945	CTRL_K	0x0b	keys.h
15946	CTRL_L	0x0c	keys.h
15947	CTRL_M	0x0d	keys.h
15948	CTRL_N	0x0e	keys.h
15949	CTRL_O	0x0f	keys.h
15950	CTRL_P	0x10	keys.h
15951	CTRL_Q	0x11	keys.h
15952	CTRL_R	0x12	keys.h
15953	CTRL_S	0x13	keys.h
15954	CTRL_T	0x14	keys.h
15955	CTRL_U	0x15	keys.h
15956	CTRL_V	0x16	keys.h
15957	CTRL_W	0x17	keys.h
15958	CTRL_X	0x18	keys.h
15959	CTRL_Y	0x19	keys.h
15960	CTRL_Z	0x1a	keys.h
15961	BACKSPACE	CTRL_H	keys.h
15962	TAB	CTRL_I	keys.h
15963	LF	CTRL_J	keys.h
15964	CR	CTRL_M	keys.h
15965	ESC	0x1b	keys.h
15966	KEY_MIN	0x101	keys.h
15967	KEY_UP	KEY_ANSI ( 0, 'A' )	keys.h	*< Up arrow
15968	KEY_DOWN	KEY_ANSI ( 0, 'B' )	keys.h	*< Down arrow
15969	KEY_RIGHT	KEY_ANSI ( 0, 'C' )	keys.h	*< Right arrow
15970	KEY_LEFT	KEY_ANSI ( 0, 'D' )	keys.h	*< Left arrow
15971	KEY_END	KEY_ANSI ( 0, 'F' )	keys.h	*< End
15972	KEY_HOME	KEY_ANSI ( 0, 'H' )	keys.h	*< Home
15973	KEY_IC	KEY_ANSI ( 2, '~' )	keys.h	*< Insert
15974	KEY_DC	KEY_ANSI ( 3, '~' )	keys.h	*< Delete
15975	KEY_PPAGE	KEY_ANSI ( 5, '~' )	keys.h	*< Page up
15976	KEY_NPAGE	KEY_ANSI ( 6, '~' )	keys.h	*< Page down
15977	KEY_F8	KEY_ANSI ( 19, '~' )	keys.h	*< F8 (for PXE)
15978	KEY_BACKSPACE	BACKSPACE	keys.h
15979	KEY_ENTER	LF	keys.h
15980	printk	printf	linux_compat.h
15981	MCA_MOTHERBOARD_SETUP_REG	0x94	mca.h
15982	MCA_ADAPTER_SETUP_REG	0x96	mca.h
15983	MCA_MAX_SLOT_NR	0x07	mca.h	Must be 2^n - 1
15984	GENERIC_MCA_VENDOR	ISA_VENDOR ( 'M', 'C', 'A' )	mca.h
15985	__mca_driver	__table ( struct mca_driver, mca_drivers, 01 )	mca.h
15986	MD5_DIGEST_SIZE	16	md5.h
15987	MD5_BLOCK_WORDS	16	md5.h
15988	MD5_HASH_WORDS	4	md5.h
15989	MD5_CTX_SIZE	sizeof ( struct md5_ctx )	md5.h
15990	MAX_MEMORY_REGIONS	8	memmap.h
15991	NDP_STATE_INVALID	0	ndp.h
15992	NDP_STATE_INCOMPLETE	1	ndp.h
15993	NDP_STATE_REACHABLE	2	ndp.h
15994	NDP_STATE_DELAY	3	ndp.h
15995	NDP_STATE_PROBE	4	ndp.h
15996	NDP_STATE_STALE	5	ndp.h
15997	MAX_LL_ADDR_LEN	20	netdevice.h
15998	MAX_LL_HEADER_LEN	6	netdevice.h
15999	MAX_NET_ADDR_LEN	4	netdevice.h
16000	NETDEV_MAX_UNIQUE_ERRORS	4	netdevice.h
16001	NETDEV_OPEN	0x0001	netdevice.h
16002	NETDEV_LINK_UP	0x0002	netdevice.h
16003	__ll_protocol	__table ( struct ll_protocol, ll_protocols, 01 )	netdevice.h
16004	__net_protocol	__table ( struct net_protocol, net_protocols, 01 )	netdevice.h
16005	NAP_PREFIX_null	__null_	null_nap.h
16006	__uri_opener	__table ( struct uri_opener, uri_openers, 01 )	open.h
16007	__socket_opener	__table ( struct socket_opener, socket_openers, 01 )	open.h
16008	PCI_COMMAND_IO	0x1	pci.h	Enable response in I/O space
16009	PCI_COMMAND_MEM	0x2	pci.h	Enable response in mem space
16010	PCI_COMMAND_MASTER	0x4	pci.h	Enable bus mastering
16011	PCI_CACHE_LINE_SIZE	0x0c	pci.h	8 bits
16012	PCI_LATENCY_TIMER	0x0d	pci.h	8 bits
16013	PCI_COMMAND_SPECIAL	0x8	pci.h	Enable response to special cycles
16014	PCI_COMMAND_INVALIDATE	0x10	pci.h	Use memory write and invalidate
16015	PCI_COMMAND_VGA_PALETTE	0x20	pci.h	Enable palette snooping
16016	PCI_COMMAND_PARITY	0x40	pci.h	Enable parity checking
16017	PCI_COMMAND_WAIT	0x80	pci.h	Enable address/data stepping
16018	PCI_COMMAND_SERR	0x100	pci.h	Enable SERR
16019	PCI_COMMAND_FAST_BACK	0x200	pci.h	Enable back-to-back writes
16020	PCI_VENDOR_ID	0x00	pci.h	16 bits
16021	PCI_DEVICE_ID	0x02	pci.h	16 bits
16022	PCI_COMMAND	0x04	pci.h	16 bits
16023	PCI_STATUS	0x06	pci.h	16 bits
16024	PCI_STATUS_CAP_LIST	0x10	pci.h	Support Capability List
16025	PCI_STATUS_66MHZ	0x20	pci.h	Support 66 Mhz PCI 2.1 bus
16026	PCI_STATUS_UDF	0x40	pci.h	Support User Definable Features [obsolete]
16027	PCI_STATUS_FAST_BACK	0x80	pci.h	Accept fast-back to back
16028	PCI_STATUS_PARITY	0x100	pci.h	Detected parity error
16029	PCI_STATUS_DEVSEL_MASK	0x600	pci.h	DEVSEL timing
16030	PCI_STATUS_DEVSEL_FAST	0x000	pci.h
16031	PCI_STATUS_DEVSEL_MEDIUM	0x200	pci.h
16032	PCI_STATUS_DEVSEL_SLOW	0x400	pci.h
16033	PCI_STATUS_SIG_TARGET_ABORT	0x800	pci.h	Set on target abort
16034	PCI_STATUS_REC_TARGET_ABORT	0x1000	pci.h	Master ack of "
16035	PCI_STATUS_REC_MASTER_ABORT	0x2000	pci.h	Set on master abort
16036	PCI_STATUS_SIG_SYSTEM_ERROR	0x4000	pci.h	Set when we drive SERR
16037	PCI_STATUS_DETECTED_PARITY	0x8000	pci.h	Set on parity error
16038	PCI_REVISION	0x08	pci.h	8 bits
16039	PCI_REVISION_ID	0x08	pci.h	8 bits
16040	PCI_CLASS_REVISION	0x08	pci.h	32 bits
16041	PCI_CLASS_CODE	0x0b	pci.h	8 bits
16042	PCI_SUBCLASS_CODE	0x0a	pci.h	8 bits
16043	PCI_HEADER_TYPE	0x0e	pci.h	8 bits
16044	PCI_HEADER_TYPE_NORMAL	0	pci.h
16045	PCI_HEADER_TYPE_BRIDGE	1	pci.h
16046	PCI_HEADER_TYPE_CARDBUS	2	pci.h
16047	PCI_CARDBUS_CIS	0x28	pci.h
16048	PCI_SUBSYSTEM_VENDOR_ID	0x2c	pci.h
16049	PCI_SUBSYSTEM_ID	0x2e	pci.h
16050	PCI_BASE_ADDRESS_0	0x10	pci.h	32 bits
16051	PCI_BASE_ADDRESS_1	0x14	pci.h	32 bits
16052	PCI_BASE_ADDRESS_2	0x18	pci.h	32 bits
16053	PCI_BASE_ADDRESS_3	0x1c	pci.h	32 bits
16054	PCI_BASE_ADDRESS_4	0x20	pci.h	32 bits
16055	PCI_BASE_ADDRESS_5	0x24	pci.h	32 bits
16056	PCI_BASE_ADDRESS_SPACE	0x01	pci.h	0 = memory, 1 = I/O
16057	PCI_BASE_ADDRESS_SPACE_IO	0x01	pci.h
16058	PCI_BASE_ADDRESS_SPACE_MEMORY	0x00	pci.h
16059	PCI_BASE_ADDRESS_MEM_TYPE_MASK	0x06	pci.h
16060	PCI_BASE_ADDRESS_MEM_TYPE_32	0x00	pci.h	32 bit address
16061	PCI_BASE_ADDRESS_MEM_TYPE_1M	0x02	pci.h	Below 1M [obsolete]
16062	PCI_BASE_ADDRESS_MEM_TYPE_64	0x04	pci.h	64 bit address
16063	PCI_BASE_ADDRESS_MEM_MASK	(~0x0f)	pci.h
16064	PCI_BASE_ADDRESS_IO_MASK	(~0x03)	pci.h
16065	PCI_ROM_ADDRESS	0x30	pci.h	32 bits
16066	PCI_ROM_ADDRESS_ENABLE	0x01	pci.h	Write 1 to enable ROM,
16067	PCI_CAPABILITY_LIST	0x34	pci.h	Offset of first capability list entry
16068	PCI_INTERRUPT_LINE	0x3c	pci.h	IRQ number (0-15)
16069	PCI_INTERRUPT_PIN	0x3d	pci.h	IRQ pin on PCI bus (A-D)
16070	PCI_PRIMARY_BUS	0x18	pci.h	Primary bus number
16071	PCI_SECONDARY_BUS	0x19	pci.h	Secondary bus number
16072	PCI_SUBORDINATE_BUS	0x1a	pci.h	Highest bus number behind the bridge
16073	PCI_SEC_LATENCY_TIMER	0x1b	pci.h	Latency timer for secondary interface
16074	PCI_IO_BASE	0x1c	pci.h	I/O range behind the bridge
16075	PCI_IO_LIMIT	0x1d	pci.h
16076	PCI_IO_RANGE_TYPE_MASK	0x0f	pci.h	I/O bridging type
16077	PCI_IO_RANGE_TYPE_16	0x00	pci.h
16078	PCI_IO_RANGE_TYPE_32	0x01	pci.h
16079	PCI_IO_RANGE_MASK	~0x0f	pci.h
16080	PCI_SEC_STATUS	0x1e	pci.h	Secondary status register, only bit 14 used
16081	PCI_MEMORY_BASE	0x20	pci.h	Memory range behind
16082	PCI_MEMORY_LIMIT	0x22	pci.h
16083	PCI_MEMORY_RANGE_TYPE_MASK	0x0f	pci.h
16084	PCI_MEMORY_RANGE_MASK	~0x0f	pci.h
16085	PCI_PREF_MEMORY_BASE	0x24	pci.h	Prefetchable memory range behind
16086	PCI_PREF_MEMORY_LIMIT	0x26	pci.h
16087	PCI_PREF_RANGE_TYPE_MASK	0x0f	pci.h
16088	PCI_PREF_RANGE_TYPE_32	0x00	pci.h
16089	PCI_PREF_RANGE_TYPE_64	0x01	pci.h
16090	PCI_PREF_RANGE_MASK	~0x0f	pci.h
16091	PCI_PREF_BASE_UPPER32	0x28	pci.h	Upper half of prefetchable memory range
16092	PCI_PREF_LIMIT_UPPER32	0x2c	pci.h
16093	PCI_IO_BASE_UPPER16	0x30	pci.h	Upper half of I/O addresses
16094	PCI_IO_LIMIT_UPPER16	0x32	pci.h
16095	PCI_ROM_ADDRESS1	0x38	pci.h	Same as PCI_ROM_ADDRESS, but for htype 1
16096	PCI_BRIDGE_CONTROL	0x3e	pci.h
16097	PCI_BRIDGE_CTL_PARITY	0x01	pci.h	Enable parity detection on secondary interface
16098	PCI_BRIDGE_CTL_SERR	0x02	pci.h	The same for SERR forwarding
16099	PCI_BRIDGE_CTL_NO_ISA	0x04	pci.h	Disable bridging of ISA ports
16100	PCI_BRIDGE_CTL_VGA	0x08	pci.h	Forward VGA addresses
16101	PCI_BRIDGE_CTL_MASTER_ABORT	0x20	pci.h	Report master aborts
16102	PCI_BRIDGE_CTL_BUS_RESET	0x40	pci.h	Secondary bus reset
16103	PCI_BRIDGE_CTL_FAST_BACK	0x80	pci.h	Fast Back2Back enabled on secondary interface
16104	PCI_CB_CAPABILITY_LIST	0x14	pci.h
16105	PCI_CAP_LIST_ID	0	pci.h	Capability ID
16106	PCI_CAP_ID_PM	0x01	pci.h	Power Management
16107	PCI_CAP_ID_AGP	0x02	pci.h	Accelerated Graphics Port
16108	PCI_CAP_ID_VPD	0x03	pci.h	Vital Product Data
16109	PCI_CAP_ID_SLOTID	0x04	pci.h	Slot Identification
16110	PCI_CAP_ID_MSI	0x05	pci.h	Message Signalled Interrupts
16111	PCI_CAP_ID_CHSWP	0x06	pci.h	CompactPCI HotSwap
16112	PCI_CAP_ID_EXP	0x10	pci.h	PCI Express
16113	PCI_CAP_LIST_NEXT	1	pci.h	Next capability in the list
16114	PCI_CAP_FLAGS	2	pci.h	Capability defined flags (16 bits)
16115	PCI_CAP_SIZEOF	4	pci.h
16116	PCI_PM_PMC	2	pci.h	PM Capabilities Register
16117	PCI_PM_CAP_VER_MASK	0x0007	pci.h	Version
16118	PCI_PM_CAP_PME_CLOCK	0x0008	pci.h	PME clock required
16119	PCI_PM_CAP_RESERVED	0x0010	pci.h	Reserved field
16120	PCI_PM_CAP_DSI	0x0020	pci.h	Device specific initialization
16121	PCI_PM_CAP_AUX_POWER	0x01C0	pci.h	Auxilliary power support mask
16122	PCI_PM_CAP_D1	0x0200	pci.h	D1 power state support
16123	PCI_PM_CAP_D2	0x0400	pci.h	D2 power state support
16124	PCI_PM_CAP_PME	0x0800	pci.h	PME pin supported
16125	PCI_PM_CAP_PME_MASK	0xF800	pci.h	PME Mask of all supported states
16126	PCI_PM_CAP_PME_D0	0x0800	pci.h	PME# from D0
16127	PCI_PM_CAP_PME_D1	0x1000	pci.h	PME# from D1
16128	PCI_PM_CAP_PME_D2	0x2000	pci.h	PME# from D2
16129	PCI_PM_CAP_PME_D3	0x4000	pci.h	PME# from D3 (hot)
16130	PCI_PM_CAP_PME_D3cold	0x8000	pci.h	PME# from D3 (cold)
16131	PCI_PM_CTRL	4	pci.h	PM control and status register
16132	PCI_PM_CTRL_STATE_MASK	0x0003	pci.h	Current power state (D0 to D3)
16133	PCI_PM_CTRL_PME_ENABLE	0x0100	pci.h	PME pin enable
16134	PCI_PM_CTRL_DATA_SEL_MASK	0x1e00	pci.h	Data select (??)
16135	PCI_PM_CTRL_DATA_SCALE_MASK	0x6000	pci.h	Data scale (??)
16136	PCI_PM_CTRL_PME_STATUS	0x8000	pci.h	PME pin status
16137	PCI_PM_PPB_EXTENSIONS	6	pci.h	PPB support extensions (??)
16138	PCI_PM_PPB_B2_B3	0x40	pci.h	Stop clock when in D3hot (??)
16139	PCI_PM_BPCC_ENABLE	0x80	pci.h	Bus power/clock control enable (??)
16140	PCI_PM_DATA_REGISTER	7	pci.h	(??)
16141	PCI_PM_SIZEOF	8	pci.h
16142	PCI_AGP_VERSION	2	pci.h	BCD version number
16143	PCI_AGP_RFU	3	pci.h	Rest of capability flags
16144	PCI_AGP_STATUS	4	pci.h	Status register
16145	PCI_AGP_STATUS_RQ_MASK	0xff000000	pci.h	Maximum number of requests - 1
16146	PCI_AGP_STATUS_SBA	0x0200	pci.h	Sideband addressing supported
16147	PCI_AGP_STATUS_64BIT	0x0020	pci.h	64-bit addressing supported
16148	PCI_AGP_STATUS_FW	0x0010	pci.h	FW transfers supported
16149	PCI_AGP_STATUS_RATE4	0x0004	pci.h	4x transfer rate supported
16150	PCI_AGP_STATUS_RATE2	0x0002	pci.h	2x transfer rate supported
16151	PCI_AGP_STATUS_RATE1	0x0001	pci.h	1x transfer rate supported
16152	PCI_AGP_COMMAND	8	pci.h	Control register
16153	PCI_AGP_COMMAND_RQ_MASK	0xff000000	pci.h	Master: Maximum number of requests
16154	PCI_AGP_COMMAND_SBA	0x0200	pci.h	Sideband addressing enabled
16155	PCI_AGP_COMMAND_AGP	0x0100	pci.h	Allow processing of AGP transactions
16156	PCI_AGP_COMMAND_64BIT	0x0020	pci.h	Allow processing of 64-bit addresses
16157	PCI_AGP_COMMAND_FW	0x0010	pci.h	Force FW transfers
16158	PCI_AGP_COMMAND_RATE4	0x0004	pci.h	Use 4x rate
16159	PCI_AGP_COMMAND_RATE2	0x0002	pci.h	Use 2x rate
16160	PCI_AGP_COMMAND_RATE1	0x0001	pci.h	Use 1x rate
16161	PCI_AGP_SIZEOF	12	pci.h
16162	PCI_SID_ESR	2	pci.h	Expansion Slot Register
16163	PCI_SID_ESR_NSLOTS	0x1f	pci.h	Number of expansion slots available
16164	PCI_SID_ESR_FIC	0x20	pci.h	First In Chassis Flag
16165	PCI_SID_CHASSIS_NR	3	pci.h	Chassis Number
16166	PCI_MSI_FLAGS	2	pci.h	Various flags
16167	PCI_MSI_FLAGS_64BIT	0x80	pci.h	64-bit addresses allowed
16168	PCI_MSI_FLAGS_QSIZE	0x70	pci.h	Message queue size configured
16169	PCI_MSI_FLAGS_QMASK	0x0e	pci.h	Maximum queue size available
16170	PCI_MSI_FLAGS_ENABLE	0x01	pci.h	MSI feature enabled
16171	PCI_MSI_RFU	3	pci.h	Rest of capability flags
16172	PCI_MSI_ADDRESS_LO	4	pci.h	Lower 32 bits
16173	PCI_MSI_ADDRESS_HI	8	pci.h	Upper 32 bits (if PCI_MSI_FLAGS_64BIT set)
16174	PCI_MSI_DATA_32	8	pci.h	16 bits of data for 32-bit devices
16175	PCI_MSI_DATA_64	12	pci.h	16 bits of data for 64-bit devices
16176	PCI_ANY_ID	0xffff	pci.h
16177	__pci_driver	__table ( struct pci_driver, pci_drivers, 01 )	pci.h
16178	PCI_CLASS_NOT_DEFINED	0x0000	pci_ids.h
16179	PCI_CLASS_NOT_DEFINED_VGA	0x0001	pci_ids.h
16180	PCI_BASE_CLASS_STORAGE	0x01	pci_ids.h
16181	PCI_CLASS_STORAGE_SCSI	0x0100	pci_ids.h
16182	PCI_CLASS_STORAGE_IDE	0x0101	pci_ids.h
16183	PCI_CLASS_STORAGE_FLOPPY	0x0102	pci_ids.h
16184	PCI_CLASS_STORAGE_IPI	0x0103	pci_ids.h
16185	PCI_CLASS_STORAGE_RAID	0x0104	pci_ids.h
16186	PCI_CLASS_STORAGE_OTHER	0x0180	pci_ids.h
16187	PCI_BASE_CLASS_NETWORK	0x02	pci_ids.h
16188	PCI_CLASS_NETWORK_ETHERNET	0x0200	pci_ids.h
16189	PCI_CLASS_NETWORK_TOKEN_RING	0x0201	pci_ids.h
16190	PCI_CLASS_NETWORK_FDDI	0x0202	pci_ids.h
16191	PCI_CLASS_NETWORK_ATM	0x0203	pci_ids.h
16192	PCI_CLASS_NETWORK_OTHER	0x0280	pci_ids.h
16193	PCI_BASE_CLASS_DISPLAY	0x03	pci_ids.h
16194	PCI_CLASS_DISPLAY_VGA	0x0300	pci_ids.h
16195	PCI_CLASS_DISPLAY_XGA	0x0301	pci_ids.h
16196	PCI_CLASS_DISPLAY_3D	0x0302	pci_ids.h
16197	PCI_CLASS_DISPLAY_OTHER	0x0380	pci_ids.h
16198	PCI_BASE_CLASS_MULTIMEDIA	0x04	pci_ids.h
16199	PCI_CLASS_MULTIMEDIA_VIDEO	0x0400	pci_ids.h
16200	PCI_CLASS_MULTIMEDIA_AUDIO	0x0401	pci_ids.h
16201	PCI_CLASS_MULTIMEDIA_PHONE	0x0402	pci_ids.h
16202	PCI_CLASS_MULTIMEDIA_OTHER	0x0480	pci_ids.h
16203	PCI_BASE_CLASS_MEMORY	0x05	pci_ids.h
16204	PCI_CLASS_MEMORY_RAM	0x0500	pci_ids.h
16205	PCI_CLASS_MEMORY_FLASH	0x0501	pci_ids.h
16206	PCI_CLASS_MEMORY_OTHER	0x0580	pci_ids.h
16207	PCI_BASE_CLASS_BRIDGE	0x06	pci_ids.h
16208	PCI_CLASS_BRIDGE_HOST	0x0600	pci_ids.h
16209	PCI_CLASS_BRIDGE_ISA	0x0601	pci_ids.h
16210	PCI_CLASS_BRIDGE_EISA	0x0602	pci_ids.h
16211	PCI_CLASS_BRIDGE_MC	0x0603	pci_ids.h
16212	PCI_CLASS_BRIDGE_PCI	0x0604	pci_ids.h
16213	PCI_CLASS_BRIDGE_PCMCIA	0x0605	pci_ids.h
16214	PCI_CLASS_BRIDGE_NUBUS	0x0606	pci_ids.h
16215	PCI_CLASS_BRIDGE_CARDBUS	0x0607	pci_ids.h
16216	PCI_CLASS_BRIDGE_RACEWAY	0x0608	pci_ids.h
16217	PCI_CLASS_BRIDGE_OTHER	0x0680	pci_ids.h
16218	PCI_BASE_CLASS_COMMUNICATION	0x07	pci_ids.h
16219	PCI_CLASS_COMMUNICATION_SERIAL	0x0700	pci_ids.h
16220	PCI_CLASS_COMMUNICATION_PARALLE	0x0701	pci_ids.h
16221	PCI_CLASS_COMMUNICATION_MULTISE	0x0702	pci_ids.h
16222	PCI_CLASS_COMMUNICATION_MODEM	0x0703	pci_ids.h
16223	PCI_CLASS_COMMUNICATION_OTHER	0x0780	pci_ids.h
16224	PCI_BASE_CLASS_SYSTEM	0x08	pci_ids.h
16225	PCI_CLASS_SYSTEM_PIC	0x0800	pci_ids.h
16226	PCI_CLASS_SYSTEM_DMA	0x0801	pci_ids.h
16227	PCI_CLASS_SYSTEM_TIMER	0x0802	pci_ids.h
16228	PCI_CLASS_SYSTEM_RTC	0x0803	pci_ids.h
16229	PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804	pci_ids.h
16230	PCI_CLASS_SYSTEM_OTHER	0x0880	pci_ids.h
16231	PCI_BASE_CLASS_INPUT	0x09	pci_ids.h
16232	PCI_CLASS_INPUT_KEYBOARD	0x0900	pci_ids.h
16233	PCI_CLASS_INPUT_PEN	0x0901	pci_ids.h
16234	PCI_CLASS_INPUT_MOUSE	0x0902	pci_ids.h
16235	PCI_CLASS_INPUT_SCANNER	0x0903	pci_ids.h
16236	PCI_CLASS_INPUT_GAMEPORT	0x0904	pci_ids.h
16237	PCI_CLASS_INPUT_OTHER	0x0980	pci_ids.h
16238	PCI_BASE_CLASS_DOCKING	0x0a	pci_ids.h
16239	PCI_CLASS_DOCKING_GENERIC	0x0a00	pci_ids.h
16240	PCI_CLASS_DOCKING_OTHER	0x0a80	pci_ids.h
16241	PCI_BASE_CLASS_PROCESSOR	0x0b	pci_ids.h
16242	PCI_CLASS_PROCESSOR_386	0x0b00	pci_ids.h
16243	PCI_CLASS_PROCESSOR_486	0x0b01	pci_ids.h
16244	PCI_CLASS_PROCESSOR_PENTIUM	0x0b02	pci_ids.h
16245	PCI_CLASS_PROCESSOR_ALPHA	0x0b10	pci_ids.h
16246	PCI_CLASS_PROCESSOR_POWERPC	0x0b20	pci_ids.h
16247	PCI_CLASS_PROCESSOR_MIPS	0x0b30	pci_ids.h
16248	PCI_CLASS_PROCESSOR_CO	0x0b40	pci_ids.h
16249	PCI_BASE_CLASS_SERIAL	0x0c	pci_ids.h
16250	PCI_CLASS_SERIAL_FIREWIRE	0x0c00	pci_ids.h
16251	PCI_CLASS_SERIAL_ACCESS	0x0c01	pci_ids.h
16252	PCI_CLASS_SERIAL_SSA	0x0c02	pci_ids.h
16253	PCI_CLASS_SERIAL_USB	0x0c03	pci_ids.h
16254	PCI_CLASS_SERIAL_FIBER	0x0c04	pci_ids.h
16255	PCI_CLASS_SERIAL_SMBUS	0x0c05	pci_ids.h
16256	PCI_BASE_CLASS_INTELLIGENT	0x0e	pci_ids.h
16257	PCI_CLASS_INTELLIGENT_I2O	0x0e00	pci_ids.h
16258	PCI_BASE_CLASS_SATELLITE	0x0f	pci_ids.h
16259	PCI_CLASS_SATELLITE_TV	0x0f00	pci_ids.h
16260	PCI_CLASS_SATELLITE_AUDIO	0x0f01	pci_ids.h
16261	PCI_CLASS_SATELLITE_VOICE	0x0f03	pci_ids.h
16262	PCI_CLASS_SATELLITE_DATA	0x0f04	pci_ids.h
16263	PCI_BASE_CLASS_CRYPT	0x10	pci_ids.h
16264	PCI_CLASS_CRYPT_NETWORK	0x1000	pci_ids.h
16265	PCI_CLASS_CRYPT_ENTERTAINMENT	0x1001	pci_ids.h
16266	PCI_CLASS_CRYPT_OTHER	0x1080	pci_ids.h
16267	PCI_BASE_CLASS_SIGNAL_PROCESSIN	0x11	pci_ids.h
16268	PCI_CLASS_SP_DPIO	0x1100	pci_ids.h
16269	PCI_CLASS_SP_OTHER	0x1180	pci_ids.h
16270	PCI_CLASS_OTHERS	0xff	pci_ids.h
16271	PCI_VENDOR_ID_DYNALINK	0x0675	pci_ids.h
16272	PCI_VENDOR_ID_BERKOM	0x0871	pci_ids.h
16273	PCI_VENDOR_ID_COMPAQ	0x0e11	pci_ids.h
16274	PCI_VENDOR_ID_NCR	0x1000	pci_ids.h
16275	PCI_VENDOR_ID_LSI_LOGIC	0x1000	pci_ids.h
16276	PCI_VENDOR_ID_ATI	0x1002	pci_ids.h
16277	PCI_VENDOR_ID_VLSI	0x1004	pci_ids.h
16278	PCI_VENDOR_ID_ADL	0x1005	pci_ids.h
16279	PCI_VENDOR_ID_NS	0x100b	pci_ids.h
16280	PCI_VENDOR_ID_TSENG	0x100c	pci_ids.h
16281	PCI_VENDOR_ID_WEITEK	0x100e	pci_ids.h
16282	PCI_VENDOR_ID_DEC	0x1011	pci_ids.h
16283	PCI_VENDOR_ID_CIRRUS	0x1013	pci_ids.h
16284	PCI_VENDOR_ID_IBM	0x1014	pci_ids.h
16285	PCI_VENDOR_ID_COMPEX2	0x101a	pci_ids.h
16286	PCI_VENDOR_ID_WD	0x101c	pci_ids.h
16287	PCI_VENDOR_ID_AMI	0x101e	pci_ids.h
16288	PCI_VENDOR_ID_AMD	0x1022	pci_ids.h
16289	PCI_VENDOR_ID_TRIDENT	0x1023	pci_ids.h
16290	PCI_VENDOR_ID_AI	0x1025	pci_ids.h
16291	PCI_VENDOR_ID_DELL	0x1028	pci_ids.h
16292	PCI_VENDOR_ID_MATROX	0x102B	pci_ids.h
16293	PCI_VENDOR_ID_CT	0x102c	pci_ids.h
16294	PCI_VENDOR_ID_MIRO	0x1031	pci_ids.h
16295	PCI_VENDOR_ID_NEC	0x1033	pci_ids.h
16296	PCI_VENDOR_ID_FD	0x1036	pci_ids.h
16297	PCI_VENDOR_ID_SIS	0x1039	pci_ids.h
16298	PCI_VENDOR_ID_SI	0x1039	pci_ids.h
16299	PCI_VENDOR_ID_HP	0x103c	pci_ids.h
16300	PCI_VENDOR_ID_PCTECH	0x1042	pci_ids.h
16301	PCI_VENDOR_ID_ASUSTEK	0x1043	pci_ids.h
16302	PCI_VENDOR_ID_DPT	0x1044	pci_ids.h
16303	PCI_VENDOR_ID_OPTI	0x1045	pci_ids.h
16304	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
16305	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
16306	PCI_VENDOR_ID_SGS	0x104a	pci_ids.h
16307	PCI_VENDOR_ID_BUSLOGIC	0x104B	pci_ids.h
16308	PCI_VENDOR_ID_TI	0x104c	pci_ids.h
16309	PCI_VENDOR_ID_SONY	0x104d	pci_ids.h
16310	PCI_VENDOR_ID_OAK	0x104e	pci_ids.h
16311	PCI_VENDOR_ID_WINBOND2	0x1050	pci_ids.h
16312	PCI_VENDOR_ID_ANIGMA	0x1051	pci_ids.h
16313	PCI_VENDOR_ID_EFAR	0x1055	pci_ids.h
16314	PCI_VENDOR_ID_MOTOROLA	0x1057	pci_ids.h
16315	PCI_VENDOR_ID_MOTOROLA_OOPS	0x1507	pci_ids.h
16316	PCI_VENDOR_ID_PROMISE	0x105a	pci_ids.h
16317	PCI_VENDOR_ID_N9	0x105d	pci_ids.h
16318	PCI_VENDOR_ID_UMC	0x1060	pci_ids.h
16319	PCI_VENDOR_ID_X	0x1061	pci_ids.h
16320	PCI_VENDOR_ID_MYLEX	0x1069	pci_ids.h
16321	PCI_VENDOR_ID_PICOP	0x1066	pci_ids.h
16322	PCI_VENDOR_ID_APPLE	0x106b	pci_ids.h
16323	PCI_VENDOR_ID_YAMAHA	0x1073	pci_ids.h
16324	PCI_VENDOR_ID_NEXGEN	0x1074	pci_ids.h
16325	PCI_VENDOR_ID_QLOGIC	0x1077	pci_ids.h
16326	PCI_VENDOR_ID_CYRIX	0x1078	pci_ids.h
16327	PCI_VENDOR_ID_LEADTEK	0x107d	pci_ids.h
16328	PCI_VENDOR_ID_INTERPHASE	0x107e	pci_ids.h
16329	PCI_VENDOR_ID_CONTAQ	0x1080	pci_ids.h
16330	PCI_VENDOR_ID_FOREX	0x1083	pci_ids.h
16331	PCI_VENDOR_ID_OLICOM	0x108d	pci_ids.h
16332	PCI_VENDOR_ID_SUN	0x108e	pci_ids.h
16333	PCI_VENDOR_ID_CMD	0x1095	pci_ids.h
16334	PCI_VENDOR_ID_VISION	0x1098	pci_ids.h
16335	PCI_VENDOR_ID_BROOKTREE	0x109e	pci_ids.h
16336	PCI_VENDOR_ID_SIERRA	0x10a8	pci_ids.h
16337	PCI_VENDOR_ID_SGI	0x10a9	pci_ids.h
16338	PCI_VENDOR_ID_ACC	0x10aa	pci_ids.h
16339	PCI_VENDOR_ID_WINBOND	0x10ad	pci_ids.h
16340	PCI_VENDOR_ID_DATABOOK	0x10b3	pci_ids.h
16341	PCI_VENDOR_ID_PLX	0x10b5	pci_ids.h
16342	PCI_VENDOR_ID_MADGE	0x10b6	pci_ids.h
16343	PCI_VENDOR_ID_3COM	0x10b7	pci_ids.h
16344	PCI_VENDOR_ID_SMC	0x10b8	pci_ids.h
16345	PCI_VENDOR_ID_SUNDANCE	0x13F0	pci_ids.h
16346	PCI_VENDOR_ID_AL	0x10b9	pci_ids.h
16347	PCI_VENDOR_ID_MITSUBISHI	0x10ba	pci_ids.h
16348	PCI_VENDOR_ID_SURECOM	0x10bd	pci_ids.h
16349	PCI_VENDOR_ID_NEOMAGIC	0x10c8	pci_ids.h
16350	PCI_VENDOR_ID_ASP	0x10cd	pci_ids.h
16351	PCI_VENDOR_ID_MACRONIX	0x10d9	pci_ids.h
16352	PCI_VENDOR_ID_TCONRAD	0x10da	pci_ids.h
16353	PCI_VENDOR_ID_CERN	0x10dc	pci_ids.h
16354	PCI_VENDOR_ID_NVIDIA	0x10de	pci_ids.h
16355	PCI_VENDOR_ID_IMS	0x10e0	pci_ids.h
16356	PCI_VENDOR_ID_TEKRAM2	0x10e1	pci_ids.h
16357	PCI_VENDOR_ID_TUNDRA	0x10e3	pci_ids.h
16358	PCI_VENDOR_ID_AMCC	0x10e8	pci_ids.h
16359	PCI_VENDOR_ID_INTERG	0x10ea	pci_ids.h
16360	PCI_VENDOR_ID_REALTEK	0x10ec	pci_ids.h
16361	PCI_VENDOR_ID_XILINX	0x10ee	pci_ids.h
16362	PCI_VENDOR_ID_TRUEVISION	0x10fa	pci_ids.h
16363	PCI_VENDOR_ID_INIT	0x1101	pci_ids.h
16364	PCI_VENDOR_ID_CREATIVE	0x1102	pci_ids.h
16365	PCI_VENDOR_ID_ECTIVA	0x1102	pci_ids.h
16366	PCI_VENDOR_ID_TTI	0x1103	pci_ids.h
16367	PCI_VENDOR_ID_VIA	0x1106	pci_ids.h
16368	PCI_VENDOR_ID_VIATEC	0x1106	pci_ids.h
16369	PCI_VENDOR_ID_SIEMENS	0x110A	pci_ids.h
16370	PCI_VENDOR_ID_SMC2	0x1113	pci_ids.h
16371	PCI_VENDOR_ID_VORTEX	0x1119	pci_ids.h
16372	PCI_VENDOR_ID_EF	0x111a	pci_ids.h
16373	PCI_VENDOR_ID_IDT	0x111d	pci_ids.h
16374	PCI_VENDOR_ID_FORE	0x1127	pci_ids.h
16375	PCI_VENDOR_ID_IMAGINGTECH	0x112f	pci_ids.h
16376	PCI_VENDOR_ID_PHILIPS	0x1131	pci_ids.h
16377	PCI_VENDOR_ID_EICON	0x1133	pci_ids.h
16378	PCI_VENDOR_ID_CYCLONE	0x113c	pci_ids.h
16379	PCI_VENDOR_ID_ALLIANCE	0x1142	pci_ids.h
16380	PCI_VENDOR_ID_SYSKONNECT	0x1148	pci_ids.h
16381	PCI_VENDOR_ID_VMIC	0x114a	pci_ids.h
16382	PCI_VENDOR_ID_DIGI	0x114f	pci_ids.h
16383	PCI_VENDOR_ID_MUTECH	0x1159	pci_ids.h
16384	PCI_VENDOR_ID_XIRCOM	0x115d	pci_ids.h
16385	PCI_VENDOR_ID_RENDITION	0x1163	pci_ids.h
16386	PCI_VENDOR_ID_SERVERWORKS	0x1166	pci_ids.h
16387	PCI_VENDOR_ID_SBE	0x1176	pci_ids.h
16388	PCI_VENDOR_ID_TOSHIBA	0x1179	pci_ids.h
16389	PCI_VENDOR_ID_RICOH	0x1180	pci_ids.h
16390	PCI_VENDOR_ID_DLINK	0x1186	pci_ids.h
16391	PCI_VENDOR_ID_ARTOP	0x1191	pci_ids.h
16392	PCI_VENDOR_ID_ZEITNET	0x1193	pci_ids.h
16393	PCI_VENDOR_ID_OMEGA	0x119b	pci_ids.h
16394	PCI_VENDOR_ID_FUJITSU_ME	0x119e	pci_ids.h
16395	PCI_SUBVENDOR_ID_KEYSPAN	0x11a9	pci_ids.h
16396	PCI_VENDOR_ID_GALILEO	0x11ab	pci_ids.h
16397	PCI_VENDOR_ID_LINKSYS	0x11ad	pci_ids.h
16398	PCI_VENDOR_ID_LITEON	0x11ad	pci_ids.h
16399	PCI_VENDOR_ID_V3	0x11b0	pci_ids.h
16400	PCI_VENDOR_ID_NP	0x11bc	pci_ids.h
16401	PCI_VENDOR_ID_ATT	0x11c1	pci_ids.h
16402	PCI_VENDOR_ID_SPECIALIX	0x11cb	pci_ids.h
16403	PCI_VENDOR_ID_AURAVISION	0x11d1	pci_ids.h
16404	PCI_VENDOR_ID_ANALOG_DEVICES	0x11d4	pci_ids.h
16405	PCI_VENDOR_ID_IKON	0x11d5	pci_ids.h
16406	PCI_VENDOR_ID_ZORAN	0x11de	pci_ids.h
16407	PCI_VENDOR_ID_KINETIC	0x11f4	pci_ids.h
16408	PCI_VENDOR_ID_COMPEX	0x11f6	pci_ids.h
16409	PCI_VENDOR_ID_RP	0x11fe	pci_ids.h
16410	PCI_VENDOR_ID_CYCLADES	0x120e	pci_ids.h
16411	PCI_VENDOR_ID_ESSENTIAL	0x120f	pci_ids.h
16412	PCI_VENDOR_ID_O2	0x1217	pci_ids.h
16413	PCI_VENDOR_ID_3DFX	0x121a	pci_ids.h
16414	PCI_VENDOR_ID_SIGMADES	0x1236	pci_ids.h
16415	PCI_VENDOR_ID_CCUBE	0x123f	pci_ids.h
16416	PCI_VENDOR_ID_AVM	0x1244	pci_ids.h
16417	PCI_VENDOR_ID_DIPIX	0x1246	pci_ids.h
16418	PCI_VENDOR_ID_STALLION	0x124d	pci_ids.h
16419	PCI_VENDOR_ID_OPTIBASE	0x1255	pci_ids.h
16420	PCI_VENDOR_ID_ESS	0x125d	pci_ids.h
16421	PCI_VENDOR_ID_HARRIS	0x1260	pci_ids.h
16422	PCI_VENDOR_ID_SATSAGEM	0x1267	pci_ids.h
16423	PCI_VENDOR_ID_HUGHES	0x1273	pci_ids.h
16424	PCI_VENDOR_ID_ENSONIQ	0x1274	pci_ids.h
16425	PCI_VENDOR_ID_ROCKWELL	0x127A	pci_ids.h
16426	PCI_VENDOR_ID_DAVICOM	0x1282	pci_ids.h
16427	PCI_VENDOR_ID_ITE	0x1283	pci_ids.h
16428	PCI_VENDOR_ID_ESS_OLD	0x1285	pci_ids.h
16429	PCI_VENDOR_ID_ALTEON	0x12ae	pci_ids.h
16430	PCI_VENDOR_ID_USR	0x12B9	pci_ids.h
16431	PCI_VENDOR_ID_HOLTEK	0x12c3	pci_ids.h
16432	PCI_SUBVENDOR_ID_CONNECT_TECH	0x12c4	pci_ids.h
16433	PCI_VENDOR_ID_PICTUREL	0x12c5	pci_ids.h
16434	PCI_VENDOR_ID_NVIDIA_SGS	0x12d2	pci_ids.h
16435	PCI_SUBVENDOR_ID_CHASE_PCIFAST	0x12E0	pci_ids.h
16436	PCI_SUBVENDOR_ID_CHASE_PCIRAS	0x124D	pci_ids.h
16437	PCI_VENDOR_ID_AUREAL	0x12eb	pci_ids.h
16438	PCI_VENDOR_ID_CBOARDS	0x1307	pci_ids.h
16439	PCI_VENDOR_ID_SIIG	0x131f	pci_ids.h
16440	PCI_VENDOR_ID_ADMTEK	0x1317	pci_ids.h
16441	PCI_VENDOR_ID_DOMEX	0x134a	pci_ids.h
16442	PCI_VENDOR_ID_QUATECH	0x135C	pci_ids.h
16443	PCI_VENDOR_ID_SEALEVEL	0x135e	pci_ids.h
16444	PCI_VENDOR_ID_HYPERCOPE	0x1365	pci_ids.h
16445	PCI_VENDOR_ID_KAWASAKI	0x136b	pci_ids.h
16446	PCI_VENDOR_ID_LMC	0x1376	pci_ids.h
16447	PCI_VENDOR_ID_NETGEAR	0x1385	pci_ids.h
16448	PCI_VENDOR_ID_APPLICOM	0x1389	pci_ids.h
16449	PCI_VENDOR_ID_MOXA	0x1393	pci_ids.h
16450	PCI_VENDOR_ID_CCD	0x1397	pci_ids.h
16451	PCI_VENDOR_ID_MICROGATE	0x13c0	pci_ids.h
16452	PCI_VENDOR_ID_3WARE	0x13C1	pci_ids.h
16453	PCI_VENDOR_ID_ABOCOM	0x13D1	pci_ids.h
16454	PCI_VENDOR_ID_CMEDIA	0x13f6	pci_ids.h
16455	PCI_VENDOR_ID_LAVA	0x1407	pci_ids.h
16456	PCI_VENDOR_ID_TIMEDIA	0x1409	pci_ids.h
16457	PCI_VENDOR_ID_OXSEMI	0x1415	pci_ids.h
16458	PCI_VENDOR_ID_AIRONET	0x14b9	pci_ids.h
16459	PCI_VENDOR_ID_TITAN	0x14D2	pci_ids.h
16460	PCI_VENDOR_ID_PANACOM	0x14d4	pci_ids.h
16461	PCI_VENDOR_ID_BROADCOM	0x14e4	pci_ids.h
16462	PCI_VENDOR_ID_SYBA	0x1592	pci_ids.h
16463	PCI_VENDOR_ID_MORETON	0x15aa	pci_ids.h
16464	PCI_VENDOR_ID_ZOLTRIX	0x15b0	pci_ids.h
16465	PCI_VENDOR_ID_PDC	0x15e9	pci_ids.h
16466	PCI_VENDOR_ID_FSC	0x1734	pci_ids.h
16467	PCI_VENDOR_ID_SYMPHONY	0x1c1c	pci_ids.h
16468	PCI_VENDOR_ID_TEKRAM	0x1de1	pci_ids.h
16469	PCI_VENDOR_ID_3DLABS	0x3d3d	pci_ids.h
16470	PCI_VENDOR_ID_AVANCE	0x4005	pci_ids.h
16471	PCI_VENDOR_ID_AKS	0x416c	pci_ids.h
16472	PCI_VENDOR_ID_NETVIN	0x4a14	pci_ids.h
16473	PCI_VENDOR_ID_S3	0x5333	pci_ids.h
16474	PCI_VENDOR_ID_DCI	0x6666	pci_ids.h
16475	PCI_VENDOR_ID_GENROCO	0x5555	pci_ids.h
16476	PCI_VENDOR_ID_INTEL	0x8086	pci_ids.h
16477	PCI_VENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
16478	PCI_SUBVENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
16479	PCI_VENDOR_ID_KTI	0x8e2e	pci_ids.h
16480	PCI_VENDOR_ID_ADAPTEC	0x9004	pci_ids.h
16481	PCI_VENDOR_ID_ADAPTEC2	0x9005	pci_ids.h
16482	PCI_VENDOR_ID_ATRONICS	0x907f	pci_ids.h
16483	PCI_VENDOR_ID_HOLTEK2	0x9412	pci_ids.h
16484	PCI_VENDOR_ID_NETMOS	0x9710	pci_ids.h
16485	PCI_SUBVENDOR_ID_EXSYS	0xd84d	pci_ids.h
16486	PCI_VENDOR_ID_TIGERJET	0xe159	pci_ids.h
16487	PCI_VENDOR_ID_ARK	0xedd8	pci_ids.h
16488	POSIX_FD_MIN	( 1 )	posix_io.h
16489	POSIX_FD_MAX	( 31 )	posix_io.h
16490	RESOLV_NUMERIC	01	resolv.h
16491	RESOLV_NORMAL	02	resolv.h
16492	DEFAULT_MIN_TIMEOUT	( TICKS_PER_SEC / 4 )	retry.h
16493	DEFAULT_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	retry.h
16494	__sanboot_protocol	__table ( struct sanboot_protocol, sanboot_protocols, 01 )	sanboot.h
16495	SCSI_OPCODE_READ_10	0x28	scsi.h	*< READ (10)
16496	SCSI_OPCODE_READ_16	0x88	scsi.h	*< READ (16)
16497	SCSI_OPCODE_WRITE_10	0x2a	scsi.h	*< WRITE (10)
16498	SCSI_OPCODE_WRITE_16	0x8a	scsi.h	*< WRITE (16)
16499	SCSI_OPCODE_READ_CAPACITY_10	0x25	scsi.h	*< READ CAPACITY (10)
16500	SCSI_OPCODE_SERVICE_ACTION_IN	0x9e	scsi.h	*< SERVICE ACTION IN
16501	SCSI_SERVICE_ACTION_READ_CAPACI	0x10	scsi.h	*< READ CAPACITY (16)
16502	SCSI_FL_FUA_NV	0x02	scsi.h	*< Force unit access to NVS
16503	SCSI_FL_FUA	0x08	scsi.h	*< Force unit access
16504	SCSI_FL_DPO	0x10	scsi.h	*< Disable cache page out
16505	SCSI_CDB_FORMAT	"%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:" \ "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x"	scsi.h
16506	__setting	__table ( struct setting, settings, 01 )	settings.h
16507	__setting_type	__table ( struct setting_type, setting_types, 01 )	settings.h
16508	__settings_applicator	__table ( struct settings_applicator, settings_applicators, 01 )	settings.h
16509	SHA1_CTX_SIZE	sizeof ( SHA1_CTX )	sha1.h
16510	SHA1_DIGEST_SIZE	SHA1_SIZE	sha1.h
16511	SMBIOS_SIGNATURE	( ( '_' << 0 ) + ( 'S' << 8 ) + ( 'M' << 16 ) + ( '_' << 24 ) )	smbios.h
16512	SMBIOS_TYPE_SYSTEM_INFORMATION	1	smbios.h
16513	TCP_SOCK_STREAM	0x1	socket.h
16514	SOCK_STREAM	tcp_sock_stream	socket.h
16515	UDP_SOCK_DGRAM	0x2	socket.h
16516	SOCK_DGRAM	udp_sock_dgram	socket.h
16517	AF_INET	1	socket.h	*< IPv4 Internet addresses
16518	AF_INET6	2	socket.h	*< IPv6 Internet addresses
16519	SA_LEN	32	socket.h
16520	SPI_WRSR	0x01	spi.h
16521	SPI_WRITE	0x02	spi.h
16522	SPI_READ	0x03	spi.h
16523	SPI_WRDI	0x04	spi.h
16524	SPI_RDSR	0x05	spi.h
16525	SPI_WREN	0x06	spi.h
16526	ATMEL_SECTOR_ERASE	0x52	spi.h
16527	ATMEL_CHIP_ERASE	0x62	spi.h
16528	ATMEL_RDID	0x15	spi.h
16529	SPI_STATUS_WPEN	0x80	spi.h
16530	SPI_STATUS_BP2	0x10	spi.h
16531	SPI_STATUS_BP1	0x08	spi.h
16532	SPI_STATUS_BP0	0x04	spi.h
16533	SPI_STATUS_WEN	0x02	spi.h
16534	SPI_STATUS_NRDY	0x01	spi.h
16535	SPI_MODE_CPHA	0x01	spi.h
16536	SPI_MODE_CPOL	0x02	spi.h
16537	SPI_MODE_SSPOL	0x10	spi.h
16538	SPI_MODE_MICROWIRE	1	spi.h
16539	SPI_MODE_MICROWIRE_PLUS	0	spi.h
16540	SPI_MODE_THREEWIRE	( SPI_MODE_MICROWIRE_PLUS \| SPI_MODE_SSPOL )	spi.h
16541	SPI_BIT_UDELAY	1	spi_bit.h
16542	SPI_BIT_BIG_ENDIAN	0	spi_bit.h
16543	SPI_BIT_LITTLE_ENDIAN	1	spi_bit.h
16544	TCP_OPTION_END	0	tcp.h
16545	TCP_OPTION_NOP	1	tcp.h
16546	TCP_OPTION_MSS	2	tcp.h
16547	TCP_OPTION_TS	8	tcp.h
16548	TCP_CWR	0x80	tcp.h
16549	TCP_ECE	0x40	tcp.h
16550	TCP_URG	0x20	tcp.h
16551	TCP_ACK	0x10	tcp.h
16552	TCP_PSH	0x08	tcp.h
16553	TCP_RST	0x04	tcp.h
16554	TCP_SYN	0x02	tcp.h
16555	TCP_FIN	0x01	tcp.h
16556	TCP_CLOSED	TCP_RST	tcp.h
16557	TCP_LISTEN	0	tcp.h
16558	TCP_SYN_SENT	( TCP_STATE_SENT ( TCP_SYN ) )	tcp.h
16559	TCP_SYN_RCVD	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
16560	TCP_ESTABLISHED	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
16561	TCP_FIN_WAIT_1	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
16562	TCP_FIN_WAIT_2	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN )	tcp.h
16563	TCP_CLOSING_OR_LAST_ACK	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FI	tcp.h
16564	TCP_TIME_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN \|	tcp.h
16565	TCP_CLOSE_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FIN ) )	tcp.h
16566	TCP_MASK_HLEN	0xf0	tcp.h
16567	TCP_MIN_PORT	1	tcp.h
16568	MAX_HDR_LEN	100	tcp.h
16569	MAX_IOB_LEN	1500	tcp.h
16570	MIN_IOB_LEN	MAX_HDR_LEN + 100	tcp.h	To account for padding by LL
16571	TCP_MAX_WINDOW_SIZE	4096	tcp.h
16572	TCP_PATH_MTU	1460	tcp.h
16573	TCP_MSS	1460	tcp.h
16574	TCP_MSL	( 2 * 60 * TICKS_PER_SEC )	tcp.h
16575	TCPIP_EMPTY_CSUM	0xffff	tcpip.h
16576	__tcpip_protocol	__table ( struct tcpip_protocol, tcpip_protocols, 01 )	tcpip.h
16577	__tcpip_net_protocol	__table ( struct tcpip_net_protocol, tcpip_net_protocols, 01 )	tcpip.h
16578	TFTP_PORT	69	tftp.h	*< Default TFTP server port
16579	TFTP_DEFAULT_BLKSIZE	512	tftp.h	*< Default TFTP data block size
16580	TFTP_MAX_BLKSIZE	1432	tftp.h
16581	TFTP_RRQ	1	tftp.h	*< Read request opcode
16582	TFTP_WRQ	2	tftp.h	*< Write request opcode
16583	TFTP_DATA	3	tftp.h	*< Data block opcode
16584	TFTP_ACK	4	tftp.h	*< Data block acknowledgement opcode
16585	TFTP_ERROR	5	tftp.h	*< Error opcode
16586	TFTP_OACK	6	tftp.h	*< Options acknowledgement opcode
16587	TFTP_ERR_FILE_NOT_FOUND	1	tftp.h	*< File not found
16588	TFTP_ERR_ACCESS_DENIED	2	tftp.h	*< Access violation
16589	TFTP_ERR_DISK_FULL	3	tftp.h	*< Disk full or allocation exceeded
16590	TFTP_ERR_ILLEGAL_OP	4	tftp.h	*< Illegal TFTP operation
16591	TFTP_ERR_UNKNOWN_TID	5	tftp.h	*< Unknown transfer ID
16592	TFTP_ERR_FILE_EXISTS	6	tftp.h	*< File already exists
16593	TFTP_ERR_UNKNOWN_USER	7	tftp.h	*< No such user
16594	TFTP_ERR_BAD_OPTS	8	tftp.h	*< Option negotiation failed
16595	MTFTP_PORT	1759	tftp.h	*< Default MTFTP server port
16596	THREEWIRE_READ	0x6	threewire.h
16597	THREEWIRE_WRITE	0x5	threewire.h
16598	THREEWIRE_EWEN	0x4	threewire.h
16599	THREEWIRE_EWEN_ADDRESS	INT_MAX	threewire.h
16600	THREEWIRE_WRITE_MDELAY	10	threewire.h
16601	TICKS_PER_SEC	( ticks_per_sec() )	timer.h
16602	TLS_VERSION_TLS_1_0	0x0301	tls.h
16603	TLS_VERSION_TLS_1_1	0x0302	tls.h
16604	TLS_TYPE_CHANGE_CIPHER	20	tls.h
16605	TLS_TYPE_ALERT	21	tls.h
16606	TLS_TYPE_HANDSHAKE	22	tls.h
16607	TLS_TYPE_DATA	23	tls.h
16608	TLS_HELLO_REQUEST	0	tls.h
16609	TLS_CLIENT_HELLO	1	tls.h
16610	TLS_SERVER_HELLO	2	tls.h
16611	TLS_CERTIFICATE	11	tls.h
16612	TLS_SERVER_KEY_EXCHANGE	12	tls.h
16613	TLS_CERTIFICATE_REQUEST	13	tls.h
16614	TLS_SERVER_HELLO_DONE	14	tls.h
16615	TLS_CERTIFICATE_VERIFY	15	tls.h
16616	TLS_CLIENT_KEY_EXCHANGE	16	tls.h
16617	TLS_FINISHED	20	tls.h
16618	TLS_ALERT_WARNING	1	tls.h
16619	TLS_ALERT_FATAL	2	tls.h
16620	TLS_RSA_WITH_NULL_MD5	0x0001	tls.h
16621	TLS_RSA_WITH_NULL_SHA	0x0002	tls.h
16622	TLS_RSA_WITH_AES_128_CBC_SHA	0x002f	tls.h
16623	TLS_RSA_WITH_AES_256_CBC_SHA	0x0035	tls.h
16624	UNULL	( ( userptr_t ) 0 )	uaccess.h
16625	UDP_MAX_HLEN	72	udp.h
16626	UDP_MAX_TXIOB	ETH_MAX_MTU	udp.h
16627	UDP_MIN_TXIOB	ETH_ZLEN	udp.h
16628	VIRTIO_PCI_HOST_FEATURES	0	virtio-pci.h
16629	VIRTIO_PCI_GUEST_FEATURES	4	virtio-pci.h
16630	VIRTIO_PCI_QUEUE_PFN	8	virtio-pci.h
16631	VIRTIO_PCI_QUEUE_NUM	12	virtio-pci.h
16632	VIRTIO_PCI_QUEUE_SEL	14	virtio-pci.h
16633	VIRTIO_PCI_QUEUE_NOTIFY	16	virtio-pci.h
16634	VIRTIO_PCI_STATUS	18	virtio-pci.h
16635	VIRTIO_PCI_ISR	19	virtio-pci.h
16636	VIRTIO_PCI_ISR_CONFIG	0x2	virtio-pci.h
16637	VIRTIO_PCI_CONFIG	20	virtio-pci.h
16638	VIRTIO_PCI_ABI_VERSION	0	virtio-pci.h
16639	PAGE_SHIFT	(12)	virtio-ring.h
16640	PAGE_SIZE	(1<<PAGE_SHIFT)	virtio-ring.h
16641	PAGE_MASK	(PAGE_SIZE-1)	virtio-ring.h
16642	VIRTIO_CONFIG_S_ACKNOWLEDGE	1	virtio-ring.h
16643	VIRTIO_CONFIG_S_DRIVER	2	virtio-ring.h
16644	VIRTIO_CONFIG_S_DRIVER_OK	4	virtio-ring.h
16645	VIRTIO_CONFIG_S_FAILED	0x80	virtio-ring.h
16646	MAX_QUEUE_NUM	(512)	virtio-ring.h
16647	VRING_DESC_F_NEXT	1	virtio-ring.h
16648	VRING_DESC_F_WRITE	2	virtio-ring.h
16649	VRING_AVAIL_F_NO_INTERRUPT	1	virtio-ring.h
16650	VRING_USED_F_NO_NOTIFY	1	virtio-ring.h
16651	CONST	const	Base.h
16652	STATIC	static	Base.h
16653	VOID	void	Base.h
16654	TRUE	((BOOLEAN)(1==1))	Base.h
16655	FALSE	((BOOLEAN)(0==1))	Base.h
16656	NULL	((VOID *) 0)	Base.h
16657	BIT0	0x00000001	Base.h
16658	BIT1	0x00000002	Base.h
16659	BIT2	0x00000004	Base.h
16660	BIT3	0x00000008	Base.h
16661	BIT4	0x00000010	Base.h
16662	BIT5	0x00000020	Base.h
16663	BIT6	0x00000040	Base.h
16664	BIT7	0x00000080	Base.h
16665	BIT8	0x00000100	Base.h
16666	BIT9	0x00000200	Base.h
16667	BIT10	0x00000400	Base.h
16668	BIT11	0x00000800	Base.h
16669	BIT12	0x00001000	Base.h
16670	BIT13	0x00002000	Base.h
16671	BIT14	0x00004000	Base.h
16672	BIT15	0x00008000	Base.h
16673	BIT16	0x00010000	Base.h
16674	BIT17	0x00020000	Base.h
16675	BIT18	0x00040000	Base.h
16676	BIT19	0x00080000	Base.h
16677	BIT20	0x00100000	Base.h
16678	BIT21	0x00200000	Base.h
16679	BIT22	0x00400000	Base.h
16680	BIT23	0x00800000	Base.h
16681	BIT24	0x01000000	Base.h
16682	BIT25	0x02000000	Base.h
16683	BIT26	0x04000000	Base.h
16684	BIT27	0x08000000	Base.h
16685	BIT28	0x10000000	Base.h
16686	BIT29	0x20000000	Base.h
16687	BIT30	0x40000000	Base.h
16688	BIT31	0x80000000	Base.h
16689	BIT32	0x0000000100000000UL	Base.h
16690	BIT33	0x0000000200000000UL	Base.h
16691	BIT34	0x0000000400000000UL	Base.h
16692	BIT35	0x0000000800000000UL	Base.h
16693	BIT36	0x0000001000000000UL	Base.h
16694	BIT37	0x0000002000000000UL	Base.h
16695	BIT38	0x0000004000000000UL	Base.h
16696	BIT39	0x0000008000000000UL	Base.h
16697	BIT40	0x0000010000000000UL	Base.h
16698	BIT41	0x0000020000000000UL	Base.h
16699	BIT42	0x0000040000000000UL	Base.h
16700	BIT43	0x0000080000000000UL	Base.h
16701	BIT44	0x0000100000000000UL	Base.h
16702	BIT45	0x0000200000000000UL	Base.h
16703	BIT46	0x0000400000000000UL	Base.h
16704	BIT47	0x0000800000000000UL	Base.h
16705	BIT48	0x0001000000000000UL	Base.h
16706	BIT49	0x0002000000000000UL	Base.h
16707	BIT50	0x0004000000000000UL	Base.h
16708	BIT51	0x0008000000000000UL	Base.h
16709	BIT52	0x0010000000000000UL	Base.h
16710	BIT53	0x0020000000000000UL	Base.h
16711	BIT54	0x0040000000000000UL	Base.h
16712	BIT55	0x0080000000000000UL	Base.h
16713	BIT56	0x0100000000000000UL	Base.h
16714	BIT57	0x0200000000000000UL	Base.h
16715	BIT58	0x0400000000000000UL	Base.h
16716	BIT59	0x0800000000000000UL	Base.h
16717	BIT60	0x1000000000000000UL	Base.h
16718	BIT61	0x2000000000000000UL	Base.h
16719	BIT62	0x4000000000000000UL	Base.h
16720	BIT63	0x8000000000000000UL	Base.h
16721	RETURN_SUCCESS	0	Base.h
16722	RETURN_LOAD_ERROR	ENCODE_ERROR (1)	Base.h
16723	RETURN_INVALID_PARAMETER	ENCODE_ERROR (2)	Base.h
16724	RETURN_UNSUPPORTED	ENCODE_ERROR (3)	Base.h
16725	RETURN_BAD_BUFFER_SIZE	ENCODE_ERROR (4)	Base.h
16726	RETURN_BUFFER_TOO_SMALL	ENCODE_ERROR (5)	Base.h
16727	RETURN_NOT_READY	ENCODE_ERROR (6)	Base.h
16728	RETURN_DEVICE_ERROR	ENCODE_ERROR (7)	Base.h
16729	RETURN_WRITE_PROTECTED	ENCODE_ERROR (8)	Base.h
16730	RETURN_OUT_OF_RESOURCES	ENCODE_ERROR (9)	Base.h
16731	RETURN_VOLUME_CORRUPTED	ENCODE_ERROR (10)	Base.h
16732	RETURN_VOLUME_FULL	ENCODE_ERROR (11)	Base.h
16733	RETURN_NO_MEDIA	ENCODE_ERROR (12)	Base.h
16734	RETURN_MEDIA_CHANGED	ENCODE_ERROR (13)	Base.h
16735	RETURN_NOT_FOUND	ENCODE_ERROR (14)	Base.h
16736	RETURN_ACCESS_DENIED	ENCODE_ERROR (15)	Base.h
16737	RETURN_NO_RESPONSE	ENCODE_ERROR (16)	Base.h
16738	RETURN_NO_MAPPING	ENCODE_ERROR (17)	Base.h
16739	RETURN_TIMEOUT	ENCODE_ERROR (18)	Base.h
16740	RETURN_NOT_STARTED	ENCODE_ERROR (19)	Base.h
16741	RETURN_ALREADY_STARTED	ENCODE_ERROR (20)	Base.h
16742	RETURN_ABORTED	ENCODE_ERROR (21)	Base.h
16743	RETURN_ICMP_ERROR	ENCODE_ERROR (22)	Base.h
16744	RETURN_TFTP_ERROR	ENCODE_ERROR (23)	Base.h
16745	RETURN_PROTOCOL_ERROR	ENCODE_ERROR (24)	Base.h
16746	RETURN_INCOMPATIBLE_VERSION	ENCODE_ERROR (25)	Base.h
16747	RETURN_SECURITY_VIOLATION	ENCODE_ERROR (26)	Base.h
16748	RETURN_CRC_ERROR	ENCODE_ERROR (27)	Base.h
16749	RETURN_END_OF_MEDIA	ENCODE_ERROR (28)	Base.h
16750	RETURN_END_OF_FILE	ENCODE_ERROR (31)	Base.h
16751	RETURN_INVALID_LANGUAGE	ENCODE_ERROR (32)	Base.h
16752	RETURN_WARN_UNKNOWN_GLYPH	ENCODE_WARNING (1)	Base.h
16753	RETURN_WARN_DELETE_FAILURE	ENCODE_WARNING (2)	Base.h
16754	RETURN_WARN_WRITE_FAILURE	ENCODE_WARNING (3)	Base.h
16755	RETURN_WARN_BUFFER_TOO_SMALL	ENCODE_WARNING (4)	Base.h
16756	__efi_protocol	__table ( struct efi_protocol, efi_protocols, 01 )	efi.h
16757	__efi_config_table	__table ( struct efi_config_table, efi_config_tables, 01 )	efi.h
16758	IOAPI_PREFIX_efi	__efi_	efi_io.h
16759	PCIAPI_PREFIX_efi	__efi_	efi_pci.h
16760	EFIPCI_WIDTH_BYTE	0	efi_pci.h
16761	EFIPCI_WIDTH_WORD	1	efi_pci.h
16762	EFIPCI_WIDTH_DWORD	2	efi_pci.h
16763	SMBIOS_PREFIX_efi	__efi_	efi_smbios.h
16764	TIMER_PREFIX_efi	__efi_	efi_timer.h
16765	UACCESS_PREFIX_efi	__efi_	efi_uaccess.h
16766	UMALLOC_PREFIX_efi	__efi_	efi_umalloc.h
16767	EFI_PC_ANSI_GUID	{ \ 0xe0c14753, 0xf9be, 0x11d2, {0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PcAnsi.h
16768	EFI_VT_100_GUID	{ \ 0xdfa66065, 0xb419, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PcAnsi.h
16769	EFI_VT_100_PLUS_GUID	{ \ 0x7baec70b, 0x57e0, 0x4c76, {0x8e, 0x87, 0x2f, 0x9e, 0x28, 0x08, 0x83, 0x43 } \ }	PcAnsi.h
16770	EFI_VT_UTF8_GUID	{ \ 0xad15a0d6, 0x8bec, 0x4acf, {0xa0, 0x73, 0xd0, 0x1d, 0xe7, 0x7e, 0x2d, 0x88 } \ }	PcAnsi.h
16771	EFI_UART_DEVICE_PATH_GUID	{ \ 0x37499a9d, 0x542f, 0x4c89, {0xa0, 0x26, 0x35, 0xda, 0x14, 0x20, 0x94, 0xe4 } \ }	PcAnsi.h
16772	EFI_SAS_DEVICE_PATH_GUID	{ \ 0xd487ddb4, 0x008b, 0x11d9, {0xaf, 0xdc, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \ }	PcAnsi.h
16773	EFI_SMBIOS_TABLE_GUID	{ \ 0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	SmBios.h
16774	SMBIOS_TABLE_GUID	EFI_SMBIOS_TABLE_GUID	SmBios.h
16775	UINT8_MAX	0xff	ProcessorBind.h
16776	MAX_BIT	0x80000000	ProcessorBind.h
16777	MAX_2_BITS	0xC0000000	ProcessorBind.h
16778	MAX_ADDRESS	0xFFFFFFFF	ProcessorBind.h
16779	CPU_STACK_ALIGNMENT	sizeof(UINTN)	ProcessorBind.h
16780	EFIAPI	__cdecl	ProcessorBind.h
16781	EFIAPI	__attribute__((cdecl,regparm(0)))	ProcessorBind.h
16782	GLOBAL_REMOVE_IF_UNREFERENCED	__declspec(selectany)	ProcessorBind.h
16783	PCI_MAX_SEGMENT	0	Pci22.h
16784	PCI_MAX_BUS	255	Pci22.h
16785	PCI_MAX_DEVICE	31	Pci22.h
16786	PCI_MAX_FUNC	7	Pci22.h
16787	PCI_CLASS_OLD	0x00	Pci22.h
16788	PCI_CLASS_OLD_OTHER	0x00	Pci22.h
16789	PCI_CLASS_OLD_VGA	0x01	Pci22.h
16790	PCI_CLASS_MASS_STORAGE	0x01	Pci22.h
16791	PCI_CLASS_MASS_STORAGE_SCSI	0x00	Pci22.h
16792	PCI_CLASS_MASS_STORAGE_IDE	0x01	Pci22.h
16793	PCI_CLASS_MASS_STORAGE_FLOPPY	0x02	Pci22.h
16794	PCI_CLASS_MASS_STORAGE_IPI	0x03	Pci22.h
16795	PCI_CLASS_MASS_STORAGE_RAID	0x04	Pci22.h
16796	PCI_CLASS_MASS_STORAGE_OTHER	0x80	Pci22.h
16797	PCI_CLASS_NETWORK	0x02	Pci22.h
16798	PCI_CLASS_NETWORK_ETHERNET	0x00	Pci22.h
16799	PCI_CLASS_NETWORK_TOKENRING	0x01	Pci22.h
16800	PCI_CLASS_NETWORK_FDDI	0x02	Pci22.h
16801	PCI_CLASS_NETWORK_ATM	0x03	Pci22.h
16802	PCI_CLASS_NETWORK_ISDN	0x04	Pci22.h
16803	PCI_CLASS_NETWORK_OTHER	0x80	Pci22.h
16804	PCI_CLASS_DISPLAY	0x03	Pci22.h
16805	PCI_CLASS_DISPLAY_VGA	0x00	Pci22.h
16806	PCI_IF_VGA_VGA	0x00	Pci22.h
16807	PCI_IF_VGA_8514	0x01	Pci22.h
16808	PCI_CLASS_DISPLAY_XGA	0x01	Pci22.h
16809	PCI_CLASS_DISPLAY_3D	0x02	Pci22.h
16810	PCI_CLASS_DISPLAY_OTHER	0x80	Pci22.h
16811	PCI_CLASS_DISPLAY_GFX	0x80	Pci22.h
16812	PCI_CLASS_MEDIA	0x04	Pci22.h
16813	PCI_CLASS_MEDIA_VIDEO	0x00	Pci22.h
16814	PCI_CLASS_MEDIA_AUDIO	0x01	Pci22.h
16815	PCI_CLASS_MEDIA_TELEPHONE	0x02	Pci22.h
16816	PCI_CLASS_MEDIA_OTHER	0x80	Pci22.h
16817	PCI_CLASS_MEMORY_CONTROLLER	0x05	Pci22.h
16818	PCI_CLASS_MEMORY_RAM	0x00	Pci22.h
16819	PCI_CLASS_MEMORY_FLASH	0x01	Pci22.h
16820	PCI_CLASS_MEMORY_OTHER	0x80	Pci22.h
16821	PCI_CLASS_BRIDGE	0x06	Pci22.h
16822	PCI_CLASS_BRIDGE_HOST	0x00	Pci22.h
16823	PCI_CLASS_BRIDGE_ISA	0x01	Pci22.h
16824	PCI_CLASS_BRIDGE_EISA	0x02	Pci22.h
16825	PCI_CLASS_BRIDGE_MCA	0x03	Pci22.h
16826	PCI_CLASS_BRIDGE_P2P	0x04	Pci22.h
16827	PCI_IF_BRIDGE_P2P	0x00	Pci22.h
16828	PCI_IF_BRIDGE_P2P_SUBTRACTIVE	0x01	Pci22.h
16829	PCI_CLASS_BRIDGE_PCMCIA	0x05	Pci22.h
16830	PCI_CLASS_BRIDGE_NUBUS	0x06	Pci22.h
16831	PCI_CLASS_BRIDGE_CARDBUS	0x07	Pci22.h
16832	PCI_CLASS_BRIDGE_RACEWAY	0x08	Pci22.h
16833	PCI_CLASS_BRIDGE_OTHER	0x80	Pci22.h
16834	PCI_CLASS_BRIDGE_ISA_PDECODE	0x80	Pci22.h
16835	PCI_CLASS_SCC	0x07	Pci22.h	< Simple communications controllers
16836	PCI_SUBCLASS_SERIAL	0x00	Pci22.h
16837	PCI_IF_GENERIC_XT	0x00	Pci22.h
16838	PCI_IF_16450	0x01	Pci22.h
16839	PCI_IF_16550	0x02	Pci22.h
16840	PCI_IF_16650	0x03	Pci22.h
16841	PCI_IF_16750	0x04	Pci22.h
16842	PCI_IF_16850	0x05	Pci22.h
16843	PCI_IF_16950	0x06	Pci22.h
16844	PCI_SUBCLASS_PARALLEL	0x01	Pci22.h
16845	PCI_IF_PARALLEL_PORT	0x00	Pci22.h
16846	PCI_IF_BI_DIR_PARALLEL_PORT	0x01	Pci22.h
16847	PCI_IF_ECP_PARALLEL_PORT	0x02	Pci22.h
16848	PCI_IF_1284_CONTROLLER	0x03	Pci22.h
16849	PCI_IF_1284_DEVICE	0xFE	Pci22.h
16850	PCI_SUBCLASS_MULTIPORT_SERIAL	0x02	Pci22.h
16851	PCI_SUBCLASS_MODEM	0x03	Pci22.h
16852	PCI_IF_GENERIC_MODEM	0x00	Pci22.h
16853	PCI_IF_16450_MODEM	0x01	Pci22.h
16854	PCI_IF_16550_MODEM	0x02	Pci22.h
16855	PCI_IF_16650_MODEM	0x03	Pci22.h
16856	PCI_IF_16750_MODEM	0x04	Pci22.h
16857	PCI_SUBCLASS_SCC_OTHER	0x80	Pci22.h
16858	PCI_CLASS_SYSTEM_PERIPHERAL	0x08	Pci22.h
16859	PCI_SUBCLASS_PIC	0x00	Pci22.h
16860	PCI_IF_8259_PIC	0x00	Pci22.h
16861	PCI_IF_ISA_PIC	0x01	Pci22.h
16862	PCI_IF_EISA_PIC	0x02	Pci22.h
16863	PCI_IF_APIC_CONTROLLER	0x10	Pci22.h	< I/O APIC interrupt controller , 32 bye none-prefectable memory.
16864	PCI_IF_APIC_CONTROLLER2	0x20	Pci22.h
16865	PCI_SUBCLASS_DMA	0x01	Pci22.h
16866	PCI_IF_8237_DMA	0x00	Pci22.h
16867	PCI_IF_ISA_DMA	0x01	Pci22.h
16868	PCI_IF_EISA_DMA	0x02	Pci22.h
16869	PCI_SUBCLASS_TIMER	0x02	Pci22.h
16870	PCI_IF_8254_TIMER	0x00	Pci22.h
16871	PCI_IF_ISA_TIMER	0x01	Pci22.h
16872	PCI_IF_EISA_TIMER	0x02	Pci22.h
16873	PCI_SUBCLASS_RTC	0x03	Pci22.h
16874	PCI_IF_GENERIC_RTC	0x00	Pci22.h
16875	PCI_IF_ISA_RTC	0x00	Pci22.h
16876	PCI_SUBCLASS_PNP_CONTROLLER	0x04	Pci22.h	< HotPlug Controller
16877	PCI_SUBCLASS_PERIPHERAL_OTHER	0x80	Pci22.h
16878	PCI_CLASS_INPUT_DEVICE	0x09	Pci22.h
16879	PCI_SUBCLASS_KEYBOARD	0x00	Pci22.h
16880	PCI_SUBCLASS_PEN	0x01	Pci22.h
16881	PCI_SUBCLASS_MOUSE_CONTROLLER	0x02	Pci22.h
16882	PCI_SUBCLASS_SCAN_CONTROLLER	0x03	Pci22.h
16883	PCI_SUBCLASS_GAMEPORT	0x04	Pci22.h
16884	PCI_IF_GAMEPORT	0x00	Pci22.h
16885	PCI_IF_GAMEPORT1	0x01	Pci22.h
16886	PCI_SUBCLASS_INPUT_OTHER	0x80	Pci22.h
16887	PCI_CLASS_DOCKING_STATION	0x0A	Pci22.h
16888	PCI_CLASS_PROCESSOR	0x0B	Pci22.h
16889	PCI_SUBCLASS_PROC_386	0x00	Pci22.h
16890	PCI_SUBCLASS_PROC_486	0x01	Pci22.h
16891	PCI_SUBCLASS_PROC_PENTIUM	0x02	Pci22.h
16892	PCI_SUBCLASS_PROC_ALPHA	0x10	Pci22.h
16893	PCI_SUBCLASS_PROC_POWERPC	0x20	Pci22.h
16894	PCI_SUBCLASS_PROC_MIPS	0x30	Pci22.h
16895	PCI_SUBCLASS_PROC_CO_PORC	0x40	Pci22.h	< Co-Processor
16896	PCI_CLASS_SERIAL	0x0C	Pci22.h
16897	PCI_CLASS_SERIAL_FIREWIRE	0x00	Pci22.h
16898	PCI_IF_1394	0x00	Pci22.h
16899	PCI_IF_1394_OPEN_HCI	0x10	Pci22.h
16900	PCI_CLASS_SERIAL_ACCESS_BUS	0x01	Pci22.h
16901	PCI_CLASS_SERIAL_SSA	0x02	Pci22.h
16902	PCI_CLASS_SERIAL_USB	0x03	Pci22.h
16903	PCI_IF_UHCI	0x00	Pci22.h
16904	PCI_IF_OHCI	0x10	Pci22.h
16905	PCI_IF_USB_OTHER	0x80	Pci22.h
16906	PCI_IF_USB_DEVICE	0xFE	Pci22.h
16907	PCI_CLASS_SERIAL_FIBRECHANNEL	0x04	Pci22.h
16908	PCI_CLASS_SERIAL_SMB	0x05	Pci22.h
16909	PCI_CLASS_WIRELESS	0x0D	Pci22.h
16910	PCI_SUBCLASS_IRDA	0x00	Pci22.h
16911	PCI_SUBCLASS_IR	0x01	Pci22.h
16912	PCI_SUBCLASS_RF	0x02	Pci22.h
16913	PCI_SUBCLASS_WIRELESS_OTHER	0x80	Pci22.h
16914	PCI_CLASS_INTELLIGENT_IO	0x0E	Pci22.h
16915	PCI_CLASS_SATELLITE	0x0F	Pci22.h
16916	PCI_SUBCLASS_TV	0x01	Pci22.h
16917	PCI_SUBCLASS_AUDIO	0x02	Pci22.h
16918	PCI_SUBCLASS_VOICE	0x03	Pci22.h
16919	PCI_SUBCLASS_DATA	0x04	Pci22.h
16920	PCI_SECURITY_CONTROLLER	0x10	Pci22.h	< Encryption and decryption controller
16921	PCI_SUBCLASS_NET_COMPUT	0x00	Pci22.h
16922	PCI_SUBCLASS_ENTERTAINMENT	0x10	Pci22.h
16923	PCI_SUBCLASS_SECURITY_OTHER	0x80	Pci22.h
16924	PCI_CLASS_DPIO	0x11	Pci22.h
16925	PCI_SUBCLASS_DPIO	0x00	Pci22.h
16926	PCI_SUBCLASS_DPIO_OTHER	0x80	Pci22.h
16927	HEADER_TYPE_DEVICE	0x00	Pci22.h
16928	HEADER_TYPE_PCI_TO_PCI_BRIDGE	0x01	Pci22.h
16929	HEADER_TYPE_CARDBUS_BRIDGE	0x02	Pci22.h
16930	HEADER_TYPE_MULTI_FUNCTION	0x80	Pci22.h
16931	HEADER_LAYOUT_CODE	0x7f	Pci22.h
16932	PCI_BRIDGE_ROMBAR	0x38	Pci22.h
16933	PCI_MAX_BAR	0x0006	Pci22.h
16934	PCI_MAX_CONFIG_OFFSET	0x0100	Pci22.h
16935	PCI_VENDOR_ID_OFFSET	0x00	Pci22.h
16936	PCI_DEVICE_ID_OFFSET	0x02	Pci22.h
16937	PCI_COMMAND_OFFSET	0x04	Pci22.h
16938	PCI_PRIMARY_STATUS_OFFSET	0x06	Pci22.h
16939	PCI_REVISION_ID_OFFSET	0x08	Pci22.h
16940	PCI_CLASSCODE_OFFSET	0x09	Pci22.h
16941	PCI_CACHELINE_SIZE_OFFSET	0x0C	Pci22.h
16942	PCI_LATENCY_TIMER_OFFSET	0x0D	Pci22.h
16943	PCI_HEADER_TYPE_OFFSET	0x0E	Pci22.h
16944	PCI_BIST_OFFSET	0x0F	Pci22.h
16945	PCI_BASE_ADDRESSREG_OFFSET	0x10	Pci22.h
16946	PCI_CARDBUS_CIS_OFFSET	0x28	Pci22.h
16947	PCI_SVID_OFFSET	0x2C	Pci22.h	< SubSystem Vendor id
16948	PCI_SUBSYSTEM_VENDOR_ID_OFFSET	0x2C	Pci22.h
16949	PCI_SID_OFFSET	0x2E	Pci22.h	< SubSystem ID
16950	PCI_SUBSYSTEM_ID_OFFSET	0x2E	Pci22.h
16951	PCI_EXPANSION_ROM_BASE	0x30	Pci22.h
16952	PCI_CAPBILITY_POINTER_OFFSET	0x34	Pci22.h
16953	PCI_INT_LINE_OFFSET	0x3C	Pci22.h	< Interrupt Line Register
16954	PCI_INT_PIN_OFFSET	0x3D	Pci22.h	< Interrupt Pin Register
16955	PCI_MAXGNT_OFFSET	0x3E	Pci22.h	< Max Grant Register
16956	PCI_MAXLAT_OFFSET	0x3F	Pci22.h	< Max Latency Register
16957	PCI_BRIDGE_PRIMARY_BUS_REGISTER	0x18	Pci22.h
16958	PCI_BRIDGE_SECONDARY_BUS_REGIST	0x19	Pci22.h
16959	PCI_BRIDGE_SUBORDINATE_BUS_REGI	0x1a	Pci22.h
16960	PCI_BRIDGE_STATUS_REGISTER_OFFS	0x1E	Pci22.h
16961	PCI_BRIDGE_CONTROL_REGISTER_OFF	0x3E	Pci22.h
16962	PCI_INT_LINE_UNKNOWN	0xFF	Pci22.h
16963	EFI_PCI_COMMAND_IO_SPACE	BIT0	Pci22.h	< 0x0001
16964	EFI_PCI_COMMAND_MEMORY_SPACE	BIT1	Pci22.h	< 0x0002
16965	EFI_PCI_COMMAND_BUS_MASTER	BIT2	Pci22.h	< 0x0004
16966	EFI_PCI_COMMAND_SPECIAL_CYCLE	BIT3	Pci22.h	< 0x0008
16967	EFI_PCI_COMMAND_MEMORY_WRITE_AN	BIT4	Pci22.h	< 0x0010
16968	EFI_PCI_COMMAND_VGA_PALETTE_SNO	BIT5	Pci22.h	< 0x0020
16969	EFI_PCI_COMMAND_PARITY_ERROR_RE	BIT6	Pci22.h	< 0x0040
16970	EFI_PCI_COMMAND_STEPPING_CONTRO	BIT7	Pci22.h	< 0x0080
16971	EFI_PCI_COMMAND_SERR	BIT8	Pci22.h	< 0x0100
16972	EFI_PCI_COMMAND_FAST_BACK_TO_BA	BIT9	Pci22.h	< 0x0200
16973	EFI_PCI_BRIDGE_CONTROL_PARITY_E	BIT0	Pci22.h	< 0x0001
16974	EFI_PCI_BRIDGE_CONTROL_SERR	BIT1	Pci22.h	< 0x0002
16975	EFI_PCI_BRIDGE_CONTROL_ISA	BIT2	Pci22.h	< 0x0004
16976	EFI_PCI_BRIDGE_CONTROL_VGA	BIT3	Pci22.h	< 0x0008
16977	EFI_PCI_BRIDGE_CONTROL_VGA_16	BIT4	Pci22.h	< 0x0010
16978	EFI_PCI_BRIDGE_CONTROL_MASTER_A	BIT5	Pci22.h	< 0x0020
16979	EFI_PCI_BRIDGE_CONTROL_RESET_SE	BIT6	Pci22.h	< 0x0040
16980	EFI_PCI_BRIDGE_CONTROL_FAST_BAC	BIT7	Pci22.h	< 0x0080
16981	EFI_PCI_BRIDGE_CONTROL_PRIMARY_	BIT8	Pci22.h	< 0x0100
16982	EFI_PCI_BRIDGE_CONTROL_SECONDAR	BIT9	Pci22.h	< 0x0200
16983	EFI_PCI_BRIDGE_CONTROL_TIMER_ST	BIT10	Pci22.h	< 0x0400
16984	EFI_PCI_BRIDGE_CONTROL_DISCARD_	BIT11	Pci22.h	< 0x0800
16985	EFI_PCI_BRIDGE_CONTROL_IREQINT_	BIT7	Pci22.h	< 0x0080
16986	EFI_PCI_BRIDGE_CONTROL_RANGE0_M	BIT8	Pci22.h	< 0x0100
16987	EFI_PCI_BRIDGE_CONTROL_RANGE1_M	BIT9	Pci22.h	< 0x0200
16988	EFI_PCI_BRIDGE_CONTROL_WRITE_PO	BIT10	Pci22.h	< 0x0400
16989	EFI_PCI_STATUS_CAPABILITY	BIT4	Pci22.h	< 0x0010
16990	EFI_PCI_STATUS_66MZ_CAPABLE	BIT5	Pci22.h	< 0x0020
16991	EFI_PCI_FAST_BACK_TO_BACK_CAPAB	BIT7	Pci22.h	< 0x0080
16992	EFI_PCI_MASTER_DATA_PARITY_ERRO	BIT8	Pci22.h	< 0x0100
16993	EFI_PCI_CARDBUS_BRIDGE_CAPABILI	0x14	Pci22.h
16994	EFI_PCI_CAPABILITY_ID_PMI	0x01	Pci22.h
16995	EFI_PCI_CAPABILITY_ID_AGP	0x02	Pci22.h
16996	EFI_PCI_CAPABILITY_ID_VPD	0x03	Pci22.h
16997	EFI_PCI_CAPABILITY_ID_SLOTID	0x04	Pci22.h
16998	EFI_PCI_CAPABILITY_ID_MSI	0x05	Pci22.h
16999	EFI_PCI_CAPABILITY_ID_HOTPLUG	0x06	Pci22.h
17000	DEVICE_ID_NOCARE	0xFFFF	Pci22.h
17001	PCI_ACPI_UNUSED	0	Pci22.h
17002	PCI_BAR_NOCHANGE	0	Pci22.h
17003	PCI_BAR_OLD_ALIGN	0xFFFFFFFFFFFFFFFFULL	Pci22.h
17004	PCI_BAR_EVEN_ALIGN	0xFFFFFFFFFFFFFFFEULL	Pci22.h
17005	PCI_BAR_SQUAD_ALIGN	0xFFFFFFFFFFFFFFFDULL	Pci22.h
17006	PCI_BAR_DQUAD_ALIGN	0xFFFFFFFFFFFFFFFCULL	Pci22.h
17007	PCI_BAR_IDX0	0x00	Pci22.h
17008	PCI_BAR_IDX1	0x01	Pci22.h
17009	PCI_BAR_IDX2	0x02	Pci22.h
17010	PCI_BAR_IDX3	0x03	Pci22.h
17011	PCI_BAR_IDX4	0x04	Pci22.h
17012	PCI_BAR_IDX5	0x05	Pci22.h
17013	PCI_BAR_ALL	0xFF	Pci22.h
17014	EFI_ROOT_BRIDGE_LIST	'eprb'	Pci22.h
17015	EFI_PCI_EXPANSION_ROM_HEADER_EF	0x0EF1	Pci22.h	< defined in UEFI Spec.
17016	PCI_EXPANSION_ROM_HEADER_SIGNAT	0xaa55	Pci22.h
17017	PCI_DATA_STRUCTURE_SIGNATURE	SIGNATURE_32 ('P', 'C', 'I', 'R')	Pci22.h
17018	PCI_CODE_TYPE_PCAT_IMAGE	0x00	Pci22.h
17019	EFI_PCI_EXPANSION_ROM_HEADER_CO	0x0001	Pci22.h	<defined in UEFI spec.
17020	EFI_IMAGE_SUBSYSTEM_EFI_APPLICA	10	PeImage.h
17021	EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SE	11	PeImage.h
17022	EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME	12	PeImage.h
17023	EFI_IMAGE_SUBSYSTEM_EFI_EFI_ROM	13	PeImage.h
17024	EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME	13	PeImage.h	< defined PI Specification, 1.0
17025	IMAGE_FILE_MACHINE_I386	0x014c	PeImage.h
17026	IMAGE_FILE_MACHINE_IA64	0x0200	PeImage.h
17027	IMAGE_FILE_MACHINE_EBC	0x0EBC	PeImage.h
17028	IMAGE_FILE_MACHINE_X64	0x8664	PeImage.h
17029	EFI_IMAGE_MACHINE_IA32	IMAGE_FILE_MACHINE_I386	PeImage.h
17030	EFI_IMAGE_MACHINE_IA64	IMAGE_FILE_MACHINE_IA64	PeImage.h
17031	EFI_IMAGE_MACHINE_IPF	IMAGE_FILE_MACHINE_IA64	PeImage.h
17032	EFI_IMAGE_MACHINE_EBC	IMAGE_FILE_MACHINE_EBC	PeImage.h
17033	EFI_IMAGE_MACHINE_X64	IMAGE_FILE_MACHINE_X64	PeImage.h
17034	EFI_IMAGE_DOS_SIGNATURE	SIGNATURE_16('M', 'Z')	PeImage.h
17035	EFI_IMAGE_OS2_SIGNATURE	SIGNATURE_16('N', 'E')	PeImage.h
17036	EFI_IMAGE_OS2_SIGNATURE_LE	SIGNATURE_16('L', 'E')	PeImage.h
17037	EFI_IMAGE_NT_SIGNATURE	SIGNATURE_32('P', 'E', '\0', '\0')	PeImage.h
17038	EFI_IMAGE_SIZEOF_FILE_HEADER	20	PeImage.h
17039	EFI_IMAGE_FILE_RELOCS_STRIPPED	BIT0	PeImage.h	< 0x0001 Relocation info stripped from file.
17040	EFI_IMAGE_FILE_EXECUTABLE_IMAGE	BIT1	PeImage.h	< 0x0002 File is executable (i.e. no unresolved externel references).
17041	EFI_IMAGE_FILE_LINE_NUMS_STRIPP	BIT2	PeImage.h	< 0x0004 Line nunbers stripped from file.
17042	EFI_IMAGE_FILE_LOCAL_SYMS_STRIP	BIT3	PeImage.h	< 0x0008 Local symbols stripped from file.
17043	EFI_IMAGE_FILE_BYTES_REVERSED_L	BIT7	PeImage.h	< 0x0080 Bytes of machine word are reversed.
17044	EFI_IMAGE_FILE_32BIT_MACHINE	BIT8	PeImage.h	< 0x0100 32 bit word machine.
17045	EFI_IMAGE_FILE_DEBUG_STRIPPED	BIT9	PeImage.h	< 0x0200 Debugging info stripped from file in .DBG file
17046	EFI_IMAGE_FILE_SYSTEM	BIT12	PeImage.h	< 0x1000 System File.
17047	EFI_IMAGE_FILE_DLL	BIT13	PeImage.h	< 0x2000 File is a DLL.
17048	EFI_IMAGE_FILE_BYTES_REVERSED_H	BIT15	PeImage.h	< 0x8000 Bytes of machine word are reversed.
17049	EFI_IMAGE_FILE_MACHINE_UNKNOWN	0	PeImage.h	< Any machine type
17050	EFI_IMAGE_FILE_MACHINE_I386	0x14c	PeImage.h	< Intel 386.
17051	EFI_IMAGE_FILE_MACHINE_R3000	0x162	PeImage.h	< MIPS* little-endian, 0540 big-endian
17052	EFI_IMAGE_FILE_MACHINE_R4000	0x166	PeImage.h	< MIPS* little-endian
17053	EFI_IMAGE_FILE_MACHINE_POWERPC	0x1F0	PeImage.h	< IBM* PowerPC Little-Endian
17054	EFI_IMAGE_ROM_OPTIONAL_HDR_MAGI	0x107	PeImage.h
17055	EFI_IMAGE_DIRECTORY_ENTRY_EXPOR	0	PeImage.h
17056	EFI_IMAGE_DIRECTORY_ENTRY_IMPOR	1	PeImage.h
17057	EFI_IMAGE_DIRECTORY_ENTRY_RESOU	2	PeImage.h
17058	EFI_IMAGE_DIRECTORY_ENTRY_EXCEP	3	PeImage.h
17059	EFI_IMAGE_DIRECTORY_ENTRY_SECUR	4	PeImage.h
17060	EFI_IMAGE_DIRECTORY_ENTRY_BASER	5	PeImage.h
17061	EFI_IMAGE_DIRECTORY_ENTRY_DEBUG	6	PeImage.h
17062	EFI_IMAGE_DIRECTORY_ENTRY_COPYR	7	PeImage.h
17063	EFI_IMAGE_DIRECTORY_ENTRY_GLOBA	8	PeImage.h
17064	EFI_IMAGE_DIRECTORY_ENTRY_TLS	9	PeImage.h
17065	EFI_IMAGE_DIRECTORY_ENTRY_LOAD_	10	PeImage.h
17066	EFI_IMAGE_NUMBER_OF_DIRECTORY_E	16	PeImage.h
17067	EFI_IMAGE_NT_OPTIONAL_HDR32_MAG	0x10b	PeImage.h
17068	EFI_IMAGE_NT_OPTIONAL_HDR64_MAG	0x20b	PeImage.h
17069	EFI_IMAGE_SIZEOF_NT_OPTIONAL32_	sizeof (EFI_IMAGE_NT_HEADERS32)	PeImage.h
17070	EFI_IMAGE_SIZEOF_NT_OPTIONAL64_	sizeof (EFI_IMAGE_NT_HEADERS64)	PeImage.h
17071	EFI_IMAGE_SUBSYSTEM_UNKNOWN	0	PeImage.h
17072	EFI_IMAGE_SUBSYSTEM_NATIVE	1	PeImage.h
17073	EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI	2	PeImage.h
17074	EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI	3	PeImage.h
17075	EFI_IMAGE_SUBSYSTEM_OS2_CUI	5	PeImage.h
17076	EFI_IMAGE_SUBSYSTEM_POSIX_CUI	7	PeImage.h
17077	EFI_IMAGE_SIZEOF_SHORT_NAME	8	PeImage.h
17078	EFI_IMAGE_SIZEOF_SECTION_HEADER	40	PeImage.h
17079	EFI_IMAGE_SCN_TYPE_NO_PAD	BIT3	PeImage.h	< 0x00000008 ///< Reserved.
17080	EFI_IMAGE_SCN_CNT_CODE	BIT5	PeImage.h	< 0x00000020
17081	EFI_IMAGE_SCN_CNT_INITIALIZED_D	BIT6	PeImage.h	< 0x00000040
17082	EFI_IMAGE_SCN_CNT_UNINITIALIZED	BIT7	PeImage.h	< 0x00000080
17083	EFI_IMAGE_SCN_LNK_OTHER	BIT8	PeImage.h	< 0x00000100 ///< Reserved.
17084	EFI_IMAGE_SCN_LNK_INFO	BIT9	PeImage.h	< 0x00000200 ///< Section contains comments or some other type of information.
17085	EFI_IMAGE_SCN_LNK_REMOVE	BIT10	PeImage.h	< 0x00000800 ///< Section contents will not become part of image.
17086	EFI_IMAGE_SCN_LNK_COMDAT	BIT12	PeImage.h	< 0x00001000
17087	EFI_IMAGE_SCN_ALIGN_1BYTES	BIT20	PeImage.h	< 0x00100000
17088	EFI_IMAGE_SCN_ALIGN_2BYTES	BIT21	PeImage.h	< 0x00200000
17089	EFI_IMAGE_SCN_ALIGN_4BYTES	(BIT20\|BIT21)	PeImage.h	< 0x00300000
17090	EFI_IMAGE_SCN_ALIGN_8BYTES	BIT22	PeImage.h	< 0x00400000
17091	EFI_IMAGE_SCN_ALIGN_16BYTES	(BIT20\|BIT22)	PeImage.h	< 0x00500000
17092	EFI_IMAGE_SCN_ALIGN_32BYTES	(BIT21\|BIT22)	PeImage.h	< 0x00600000
17093	EFI_IMAGE_SCN_ALIGN_64BYTES	(BIT20\|BIT21\|BIT22)	PeImage.h	< 0x00700000
17094	EFI_IMAGE_SCN_MEM_DISCARDABLE	BIT25	PeImage.h	< 0x02000000
17095	EFI_IMAGE_SCN_MEM_NOT_CACHED	BIT26	PeImage.h	< 0x04000000
17096	EFI_IMAGE_SCN_MEM_NOT_PAGED	BIT27	PeImage.h	< 0x08000000
17097	EFI_IMAGE_SCN_MEM_SHARED	BIT28	PeImage.h	< 0x10000000
17098	EFI_IMAGE_SCN_MEM_EXECUTE	BIT29	PeImage.h	< 0x20000000
17099	EFI_IMAGE_SCN_MEM_READ	BIT30	PeImage.h	< 0x40000000
17100	EFI_IMAGE_SCN_MEM_WRITE	BIT31	PeImage.h	< 0x80000000
17101	EFI_IMAGE_SIZEOF_SYMBOL	18	PeImage.h
17102	EFI_IMAGE_SYM_UNDEFINED	(UINT16) 0	PeImage.h	< Symbol is undefined or is common.
17103	EFI_IMAGE_SYM_ABSOLUTE	(UINT16) -1	PeImage.h	< Symbol is an absolute value.
17104	EFI_IMAGE_SYM_DEBUG	(UINT16) -2	PeImage.h	< Symbol is a special debug item.
17105	EFI_IMAGE_SYM_TYPE_NULL	0	PeImage.h	< no type.
17106	EFI_IMAGE_SYM_TYPE_VOID	1	PeImage.h	< no valid type.
17107	EFI_IMAGE_SYM_TYPE_CHAR	2	PeImage.h	< type character.
17108	EFI_IMAGE_SYM_TYPE_SHORT	3	PeImage.h	< type short integer.
17109	EFI_IMAGE_SYM_TYPE_INT	4	PeImage.h
17110	EFI_IMAGE_SYM_TYPE_LONG	5	PeImage.h
17111	EFI_IMAGE_SYM_TYPE_FLOAT	6	PeImage.h
17112	EFI_IMAGE_SYM_TYPE_DOUBLE	7	PeImage.h
17113	EFI_IMAGE_SYM_TYPE_STRUCT	8	PeImage.h
17114	EFI_IMAGE_SYM_TYPE_UNION	9	PeImage.h
17115	EFI_IMAGE_SYM_TYPE_ENUM	10	PeImage.h	< enumeration.
17116	EFI_IMAGE_SYM_TYPE_MOE	11	PeImage.h	< member of enumeration.
17117	EFI_IMAGE_SYM_TYPE_BYTE	12	PeImage.h
17118	EFI_IMAGE_SYM_TYPE_WORD	13	PeImage.h
17119	EFI_IMAGE_SYM_TYPE_UINT	14	PeImage.h
17120	EFI_IMAGE_SYM_TYPE_DWORD	15	PeImage.h
17121	EFI_IMAGE_SYM_DTYPE_NULL	0	PeImage.h	< no derived type.
17122	EFI_IMAGE_SYM_DTYPE_POINTER	1	PeImage.h
17123	EFI_IMAGE_SYM_DTYPE_FUNCTION	2	PeImage.h
17124	EFI_IMAGE_SYM_DTYPE_ARRAY	3	PeImage.h
17125	EFI_IMAGE_SYM_CLASS_END_OF_FUNC	((UINT8) -1)	PeImage.h
17126	EFI_IMAGE_SYM_CLASS_NULL	0	PeImage.h
17127	EFI_IMAGE_SYM_CLASS_AUTOMATIC	1	PeImage.h
17128	EFI_IMAGE_SYM_CLASS_EXTERNAL	2	PeImage.h
17129	EFI_IMAGE_SYM_CLASS_STATIC	3	PeImage.h
17130	EFI_IMAGE_SYM_CLASS_REGISTER	4	PeImage.h
17131	EFI_IMAGE_SYM_CLASS_EXTERNAL_DE	5	PeImage.h
17132	EFI_IMAGE_SYM_CLASS_LABEL	6	PeImage.h
17133	EFI_IMAGE_SYM_CLASS_UNDEFINED_L	7	PeImage.h
17134	EFI_IMAGE_SYM_CLASS_MEMBER_OF_S	8	PeImage.h
17135	EFI_IMAGE_SYM_CLASS_ARGUMENT	9	PeImage.h
17136	EFI_IMAGE_SYM_CLASS_STRUCT_TAG	10	PeImage.h
17137	EFI_IMAGE_SYM_CLASS_MEMBER_OF_U	11	PeImage.h
17138	EFI_IMAGE_SYM_CLASS_UNION_TAG	12	PeImage.h
17139	EFI_IMAGE_SYM_CLASS_TYPE_DEFINI	13	PeImage.h
17140	EFI_IMAGE_SYM_CLASS_UNDEFINED_S	14	PeImage.h
17141	EFI_IMAGE_SYM_CLASS_ENUM_TAG	15	PeImage.h
17142	EFI_IMAGE_SYM_CLASS_MEMBER_OF_E	16	PeImage.h
17143	EFI_IMAGE_SYM_CLASS_REGISTER_PA	17	PeImage.h
17144	EFI_IMAGE_SYM_CLASS_BIT_FIELD	18	PeImage.h
17145	EFI_IMAGE_SYM_CLASS_BLOCK	100	PeImage.h
17146	EFI_IMAGE_SYM_CLASS_FUNCTION	101	PeImage.h
17147	EFI_IMAGE_SYM_CLASS_END_OF_STRU	102	PeImage.h
17148	EFI_IMAGE_SYM_CLASS_FILE	103	PeImage.h
17149	EFI_IMAGE_SYM_CLASS_SECTION	104	PeImage.h
17150	EFI_IMAGE_SYM_CLASS_WEAK_EXTERN	105	PeImage.h
17151	EFI_IMAGE_N_BTMASK	017	PeImage.h
17152	EFI_IMAGE_N_TMASK	060	PeImage.h
17153	EFI_IMAGE_N_TMASK1	0300	PeImage.h
17154	EFI_IMAGE_N_TMASK2	0360	PeImage.h
17155	EFI_IMAGE_N_BTSHFT	4	PeImage.h
17156	EFI_IMAGE_N_TSHIFT	2	PeImage.h
17157	EFI_IMAGE_COMDAT_SELECT_NODUPLI	1	PeImage.h
17158	EFI_IMAGE_COMDAT_SELECT_ANY	2	PeImage.h
17159	EFI_IMAGE_COMDAT_SELECT_SAME_SI	3	PeImage.h
17160	EFI_IMAGE_COMDAT_SELECT_EXACT_M	4	PeImage.h
17161	EFI_IMAGE_COMDAT_SELECT_ASSOCIA	5	PeImage.h
17162	EFI_IMAGE_WEAK_EXTERN_SEARCH_NO	1	PeImage.h
17163	EFI_IMAGE_WEAK_EXTERN_SEARCH_LI	2	PeImage.h
17164	EFI_IMAGE_WEAK_EXTERN_SEARCH_AL	3	PeImage.h
17165	EFI_IMAGE_SIZEOF_RELOCATION	10	PeImage.h
17166	EFI_IMAGE_REL_I386_ABSOLUTE	0x0000	PeImage.h	< Reference is absolute, no relocation is necessary
17167	EFI_IMAGE_REL_I386_DIR16	0x0001	PeImage.h	< Direct 16-bit reference to the symbols virtual address
17168	EFI_IMAGE_REL_I386_REL16	0x0002	PeImage.h	< PC-relative 16-bit reference to the symbols virtual address
17169	EFI_IMAGE_REL_I386_DIR32	0x0006	PeImage.h	< Direct 32-bit reference to the symbols virtual address
17170	EFI_IMAGE_REL_I386_DIR32NB	0x0007	PeImage.h	< Direct 32-bit reference to the symbols virtual address, base not included
17171	EFI_IMAGE_REL_I386_SEG12	0x0009	PeImage.h	< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address
17172	EFI_IMAGE_REL_I386_SECTION	0x000A	PeImage.h
17173	EFI_IMAGE_REL_I386_SECREL	0x000B	PeImage.h
17174	EFI_IMAGE_REL_I386_REL32	0x0014	PeImage.h	< PC-relative 32-bit reference to the symbols virtual address
17175	IMAGE_REL_AMD64_ABSOLUTE	0x0000	PeImage.h
17176	IMAGE_REL_AMD64_ADDR64	0x0001	PeImage.h
17177	IMAGE_REL_AMD64_ADDR32	0x0002	PeImage.h
17178	IMAGE_REL_AMD64_ADDR32NB	0x0003	PeImage.h
17179	IMAGE_REL_AMD64_REL32	0x0004	PeImage.h
17180	IMAGE_REL_AMD64_REL32_1	0x0005	PeImage.h
17181	IMAGE_REL_AMD64_REL32_2	0x0006	PeImage.h
17182	IMAGE_REL_AMD64_REL32_3	0x0007	PeImage.h
17183	IMAGE_REL_AMD64_REL32_4	0x0008	PeImage.h
17184	IMAGE_REL_AMD64_REL32_5	0x0009	PeImage.h
17185	IMAGE_REL_AMD64_SECTION	0x000A	PeImage.h
17186	IMAGE_REL_AMD64_SECREL	0x000B	PeImage.h
17187	IMAGE_REL_AMD64_SECREL7	0x000C	PeImage.h
17188	IMAGE_REL_AMD64_TOKEN	0x000D	PeImage.h
17189	IMAGE_REL_AMD64_SREL32	0x000E	PeImage.h
17190	IMAGE_REL_AMD64_PAIR	0x000F	PeImage.h
17191	IMAGE_REL_AMD64_SSPAN32	0x0010	PeImage.h
17192	EFI_IMAGE_SIZEOF_BASE_RELOCATIO	8	PeImage.h
17193	EFI_IMAGE_REL_BASED_ABSOLUTE	0	PeImage.h
17194	EFI_IMAGE_REL_BASED_HIGH	1	PeImage.h
17195	EFI_IMAGE_REL_BASED_LOW	2	PeImage.h
17196	EFI_IMAGE_REL_BASED_HIGHLOW	3	PeImage.h
17197	EFI_IMAGE_REL_BASED_HIGHADJ	4	PeImage.h
17198	EFI_IMAGE_REL_BASED_MIPS_JMPADD	5	PeImage.h
17199	EFI_IMAGE_REL_BASED_IA64_IMM64	9	PeImage.h
17200	IMAGE_REL_BASED_MIPS_JMPADDR16	9	PeImage.h
17201	EFI_IMAGE_REL_BASED_DIR64	10	PeImage.h
17202	EFI_IMAGE_SIZEOF_LINENUMBER	6	PeImage.h
17203	EFI_IMAGE_ARCHIVE_START_SIZE	8	PeImage.h
17204	EFI_IMAGE_ARCHIVE_START	"!<arch>\n"	PeImage.h
17205	EFI_IMAGE_ARCHIVE_END	"`\n"	PeImage.h
17206	EFI_IMAGE_ARCHIVE_PAD	"\n"	PeImage.h
17207	EFI_IMAGE_ARCHIVE_LINKER_MEMBER	"/ "	PeImage.h
17208	EFI_IMAGE_ARCHIVE_LONGNAMES_MEM	"// "	PeImage.h
17209	EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER	60	PeImage.h
17210	EFI_IMAGE_ORDINAL_FLAG	BIT31	PeImage.h	< Flag for PE32
17211	EFI_IMAGE_DEBUG_TYPE_CODEVIEW	2	PeImage.h	< The Visual C++ debug information
17212	CODEVIEW_SIGNATURE_NB10	SIGNATURE_32('N', 'B', '1', '0')	PeImage.h
17213	CODEVIEW_SIGNATURE_RSDS	SIGNATURE_32('R', 'S', 'D', 'S')	PeImage.h
17214	EFI_TE_IMAGE_HEADER_SIGNATURE	SIGNATURE_16('V', 'Z')	PeImage.h
17215	EFI_TE_IMAGE_DIRECTORY_ENTRY_BA	0	PeImage.h
17216	EFI_TE_IMAGE_DIRECTORY_ENTRY_DE	1	PeImage.h
17217	BOOT_WITH_FULL_CONFIGURATION	0x00	PiBootMode.h
17218	BOOT_WITH_MINIMAL_CONFIGURATION	0x01	PiBootMode.h
17219	BOOT_ASSUMING_NO_CONFIGURATION_	0x02	PiBootMode.h
17220	BOOT_WITH_FULL_CONFIGURATION_PL	0x03	PiBootMode.h
17221	BOOT_WITH_DEFAULT_SETTINGS	0x04	PiBootMode.h
17222	BOOT_ON_S4_RESUME	0x05	PiBootMode.h
17223	BOOT_ON_S5_RESUME	0x06	PiBootMode.h
17224	BOOT_ON_S2_RESUME	0x10	PiBootMode.h
17225	BOOT_ON_S3_RESUME	0x11	PiBootMode.h
17226	BOOT_ON_FLASH_UPDATE	0x12	PiBootMode.h
17227	BOOT_IN_RECOVERY_MODE	0x20	PiBootMode.h
17228	EFI_DEP_BEFORE	0x00	PiDependency.h
17229	EFI_DEP_AFTER	0x01	PiDependency.h
17230	EFI_DEP_PUSH	0x02	PiDependency.h
17231	EFI_DEP_AND	0x03	PiDependency.h
17232	EFI_DEP_OR	0x04	PiDependency.h
17233	EFI_DEP_NOT	0x05	PiDependency.h
17234	EFI_DEP_TRUE	0x06	PiDependency.h
17235	EFI_DEP_FALSE	0x07	PiDependency.h
17236	EFI_DEP_END	0x08	PiDependency.h
17237	EFI_DEP_SOR	0x09	PiDependency.h
17238	DXE_SERVICES_SIGNATURE	0x565245535f455844ULL	PiDxeCis.h
17239	DXE_SERVICES_REVISION	((1<<16) \| (00))	PiDxeCis.h
17240	EFI_FV_FILETYPE_ALL	0x00	PiFirmwareFile.h
17241	EFI_FV_FILETYPE_RAW	0x01	PiFirmwareFile.h
17242	EFI_FV_FILETYPE_FREEFORM	0x02	PiFirmwareFile.h
17243	EFI_FV_FILETYPE_SECURITY_CORE	0x03	PiFirmwareFile.h
17244	EFI_FV_FILETYPE_PEI_CORE	0x04	PiFirmwareFile.h
17245	EFI_FV_FILETYPE_DXE_CORE	0x05	PiFirmwareFile.h
17246	EFI_FV_FILETYPE_PEIM	0x06	PiFirmwareFile.h
17247	EFI_FV_FILETYPE_DRIVER	0x07	PiFirmwareFile.h
17248	EFI_FV_FILETYPE_COMBINED_PEIM_D	0x08	PiFirmwareFile.h
17249	EFI_FV_FILETYPE_APPLICATION	0x09	PiFirmwareFile.h
17250	EFI_FV_FILETYPE_FIRMWARE_VOLUME	0x0B	PiFirmwareFile.h
17251	EFI_FV_FILETYPE_OEM_MIN	0xc0	PiFirmwareFile.h
17252	EFI_FV_FILETYPE_OEM_MAX	0xdf	PiFirmwareFile.h
17253	EFI_FV_FILETYPE_DEBUG_MIN	0xe0	PiFirmwareFile.h
17254	EFI_FV_FILETYPE_DEBUG_MAX	0xef	PiFirmwareFile.h
17255	EFI_FV_FILETYPE_FFS_MIN	0xf0	PiFirmwareFile.h
17256	EFI_FV_FILETYPE_FFS_MAX	0xff	PiFirmwareFile.h
17257	EFI_FV_FILETYPE_FFS_PAD	0xf0	PiFirmwareFile.h
17258	FFS_ATTRIB_FIXED	0x04	PiFirmwareFile.h
17259	FFS_ATTRIB_DATA_ALIGNMENT	0x38	PiFirmwareFile.h
17260	FFS_ATTRIB_CHECKSUM	0x40	PiFirmwareFile.h
17261	EFI_FILE_HEADER_CONSTRUCTION	0x01	PiFirmwareFile.h
17262	EFI_FILE_HEADER_VALID	0x02	PiFirmwareFile.h
17263	EFI_FILE_DATA_VALID	0x04	PiFirmwareFile.h
17264	EFI_FILE_MARKED_FOR_UPDATE	0x08	PiFirmwareFile.h
17265	EFI_FILE_DELETED	0x10	PiFirmwareFile.h
17266	EFI_FILE_HEADER_INVALID	0x20	PiFirmwareFile.h
17267	EFI_SECTION_ALL	0x00	PiFirmwareFile.h
17268	EFI_SECTION_COMPRESSION	0x01	PiFirmwareFile.h
17269	EFI_SECTION_GUID_DEFINED	0x02	PiFirmwareFile.h
17270	EFI_SECTION_PE32	0x10	PiFirmwareFile.h
17271	EFI_SECTION_PIC	0x11	PiFirmwareFile.h
17272	EFI_SECTION_TE	0x12	PiFirmwareFile.h
17273	EFI_SECTION_DXE_DEPEX	0x13	PiFirmwareFile.h
17274	EFI_SECTION_VERSION	0x14	PiFirmwareFile.h
17275	EFI_SECTION_USER_INTERFACE	0x15	PiFirmwareFile.h
17276	EFI_SECTION_COMPATIBILITY16	0x16	PiFirmwareFile.h
17277	EFI_SECTION_FIRMWARE_VOLUME_IMA	0x17	PiFirmwareFile.h
17278	EFI_SECTION_FREEFORM_SUBTYPE_GU	0x18	PiFirmwareFile.h
17279	EFI_SECTION_RAW	0x19	PiFirmwareFile.h
17280	EFI_SECTION_PEI_DEPEX	0x1B	PiFirmwareFile.h
17281	EFI_NOT_COMPRESSED	0x00	PiFirmwareFile.h
17282	EFI_STANDARD_COMPRESSION	0x01	PiFirmwareFile.h
17283	EFI_GUIDED_SECTION_PROCESSING_R	0x01	PiFirmwareFile.h
17284	EFI_GUIDED_SECTION_AUTH_STATUS_	0x02	PiFirmwareFile.h
17285	EFI_FV_FILE_ATTRIB_ALIGNMENT	0x0000001F	PiFirmwareVolume.h
17286	EFI_FV_FILE_ATTRIB_FIXED	0x00000100	PiFirmwareVolume.h
17287	EFI_FV_FILE_ATTRIB_MEMORY_MAPPE	0x00000200	PiFirmwareVolume.h
17288	EFI_FVB2_READ_DISABLED_CAP	0x00000001	PiFirmwareVolume.h
17289	EFI_FVB2_READ_ENABLED_CAP	0x00000002	PiFirmwareVolume.h
17290	EFI_FVB2_READ_STATUS	0x00000004	PiFirmwareVolume.h
17291	EFI_FVB2_WRITE_DISABLED_CAP	0x00000008	PiFirmwareVolume.h
17292	EFI_FVB2_WRITE_ENABLED_CAP	0x00000010	PiFirmwareVolume.h
17293	EFI_FVB2_WRITE_STATUS	0x00000020	PiFirmwareVolume.h
17294	EFI_FVB2_LOCK_CAP	0x00000040	PiFirmwareVolume.h
17295	EFI_FVB2_LOCK_STATUS	0x00000080	PiFirmwareVolume.h
17296	EFI_FVB2_STICKY_WRITE	0x00000200	PiFirmwareVolume.h
17297	EFI_FVB2_MEMORY_MAPPED	0x00000400	PiFirmwareVolume.h
17298	EFI_FVB2_ERASE_POLARITY	0x00000800	PiFirmwareVolume.h
17299	EFI_FVB2_READ_LOCK_CAP	0x00001000	PiFirmwareVolume.h
17300	EFI_FVB2_READ_LOCK_STATUS	0x00002000	PiFirmwareVolume.h
17301	EFI_FVB2_WRITE_LOCK_CAP	0x00004000	PiFirmwareVolume.h
17302	EFI_FVB2_WRITE_LOCK_STATUS	0x00008000	PiFirmwareVolume.h
17303	EFI_FVB2_ALIGNMENT	0x001F0000	PiFirmwareVolume.h
17304	EFI_FVB2_ALIGNMENT_1	0x00000000	PiFirmwareVolume.h
17305	EFI_FVB2_ALIGNMENT_2	0x00010000	PiFirmwareVolume.h
17306	EFI_FVB2_ALIGNMENT_4	0x00020000	PiFirmwareVolume.h
17307	EFI_FVB2_ALIGNMENT_8	0x00030000	PiFirmwareVolume.h
17308	EFI_FVB2_ALIGNMENT_16	0x00040000	PiFirmwareVolume.h
17309	EFI_FVB2_ALIGNMENT_32	0x00050000	PiFirmwareVolume.h
17310	EFI_FVB2_ALIGNMENT_64	0x00060000	PiFirmwareVolume.h
17311	EFI_FVB2_ALIGNMENT_128	0x00070000	PiFirmwareVolume.h
17312	EFI_FVB2_ALIGNMENT_256	0x00080000	PiFirmwareVolume.h
17313	EFI_FVB2_ALIGNMENT_512	0x00090000	PiFirmwareVolume.h
17314	EFI_FVB2_ALIGNMENT_1K	0x000A0000	PiFirmwareVolume.h
17315	EFI_FVB2_ALIGNMENT_2K	0x000B0000	PiFirmwareVolume.h
17316	EFI_FVB2_ALIGNMENT_4K	0x000C0000	PiFirmwareVolume.h
17317	EFI_FVB2_ALIGNMENT_8K	0x000D0000	PiFirmwareVolume.h
17318	EFI_FVB2_ALIGNMENT_16K	0x000E0000	PiFirmwareVolume.h
17319	EFI_FVB2_ALIGNMENT_32K	0x000F0000	PiFirmwareVolume.h
17320	EFI_FVB2_ALIGNMENT_64K	0x00100000	PiFirmwareVolume.h
17321	EFI_FVB2_ALIGNMENT_128K	0x00110000	PiFirmwareVolume.h
17322	EFI_FVB2_ALIGNMENT_256K	0x00120000	PiFirmwareVolume.h
17323	EFI_FVB2_ALIGNMNET_512K	0x00130000	PiFirmwareVolume.h
17324	EFI_FVB2_ALIGNMENT_1M	0x00140000	PiFirmwareVolume.h
17325	EFI_FVB2_ALIGNMENT_2M	0x00150000	PiFirmwareVolume.h
17326	EFI_FVB2_ALIGNMENT_4M	0x00160000	PiFirmwareVolume.h
17327	EFI_FVB2_ALIGNMENT_8M	0x00170000	PiFirmwareVolume.h
17328	EFI_FVB2_ALIGNMENT_16M	0x00180000	PiFirmwareVolume.h
17329	EFI_FVB2_ALIGNMENT_32M	0x00190000	PiFirmwareVolume.h
17330	EFI_FVB2_ALIGNMENT_64M	0x001A0000	PiFirmwareVolume.h
17331	EFI_FVB2_ALIGNMENT_128M	0x001B0000	PiFirmwareVolume.h
17332	EFI_FVB2_ALIGNMENT_256M	0x001C0000	PiFirmwareVolume.h
17333	EFI_FVB2_ALIGNMENT_512M	0x001D0000	PiFirmwareVolume.h
17334	EFI_FVB2_ALIGNMENT_1G	0x001E0000	PiFirmwareVolume.h
17335	EFI_FVB2_ALIGNMENT_2G	0x001F0000	PiFirmwareVolume.h
17336	EFI_FVH_SIGNATURE	EFI_SIGNATURE_32 ('_', 'F', 'V', 'H')	PiFirmwareVolume.h
17337	EFI_FVH_REVISION	0x02	PiFirmwareVolume.h
17338	EFI_FV_EXT_TYPE_OEM_TYPE	0x01	PiFirmwareVolume.h
17339	EFI_HOB_TYPE_HANDOFF	0x0001	PiHob.h
17340	EFI_HOB_TYPE_MEMORY_ALLOCATION	0x0002	PiHob.h
17341	EFI_HOB_TYPE_RESOURCE_DESCRIPTO	0x0003	PiHob.h
17342	EFI_HOB_TYPE_GUID_EXTENSION	0x0004	PiHob.h
17343	EFI_HOB_TYPE_FV	0x0005	PiHob.h
17344	EFI_HOB_TYPE_CPU	0x0006	PiHob.h
17345	EFI_HOB_TYPE_MEMORY_POOL	0x0007	PiHob.h
17346	EFI_HOB_TYPE_FV2	0x0009	PiHob.h
17347	EFI_HOB_TYPE_LOAD_PEIM	0x000A	PiHob.h
17348	EFI_HOB_TYPE_UNUSED	0xFFFE	PiHob.h
17349	EFI_HOB_TYPE_END_OF_HOB_LIST	0xFFFF	PiHob.h
17350	EFI_HOB_HANDOFF_TABLE_VERSION	0x0009	PiHob.h
17351	EFI_RESOURCE_SYSTEM_MEMORY	0x00000000	PiHob.h
17352	EFI_RESOURCE_MEMORY_MAPPED_IO	0x00000001	PiHob.h
17353	EFI_RESOURCE_IO	0x00000002	PiHob.h
17354	EFI_RESOURCE_FIRMWARE_DEVICE	0x00000003	PiHob.h
17355	EFI_RESOURCE_MEMORY_MAPPED_IO_P	0x00000004	PiHob.h
17356	EFI_RESOURCE_MEMORY_RESERVED	0x00000005	PiHob.h
17357	EFI_RESOURCE_IO_RESERVED	0x00000006	PiHob.h
17358	EFI_RESOURCE_MAX_MEMORY_TYPE	0x00000007	PiHob.h
17359	EFI_RESOURCE_ATTRIBUTE_PRESENT	0x00000001	PiHob.h
17360	EFI_RESOURCE_ATTRIBUTE_INITIALI	0x00000002	PiHob.h
17361	EFI_RESOURCE_ATTRIBUTE_TESTED	0x00000004	PiHob.h
17362	EFI_RESOURCE_ATTRIBUTE_SINGLE_B	0x00000008	PiHob.h
17363	EFI_RESOURCE_ATTRIBUTE_MULTIPLE	0x00000010	PiHob.h
17364	EFI_RESOURCE_ATTRIBUTE_ECC_RESE	0x00000020	PiHob.h
17365	EFI_RESOURCE_ATTRIBUTE_ECC_RESE	0x00000040	PiHob.h
17366	EFI_RESOURCE_ATTRIBUTE_READ_PRO	0x00000080	PiHob.h
17367	EFI_RESOURCE_ATTRIBUTE_WRITE_PR	0x00000100	PiHob.h
17368	EFI_RESOURCE_ATTRIBUTE_EXECUTIO	0x00000200	PiHob.h
17369	EFI_RESOURCE_ATTRIBUTE_UNCACHEA	0x00000400	PiHob.h
17370	EFI_RESOURCE_ATTRIBUTE_WRITE_CO	0x00000800	PiHob.h
17371	EFI_RESOURCE_ATTRIBUTE_WRITE_TH	0x00001000	PiHob.h
17372	EFI_RESOURCE_ATTRIBUTE_WRITE_BA	0x00002000	PiHob.h
17373	EFI_RESOURCE_ATTRIBUTE_16_BIT_I	0x00004000	PiHob.h
17374	EFI_RESOURCE_ATTRIBUTE_32_BIT_I	0x00008000	PiHob.h
17375	EFI_RESOURCE_ATTRIBUTE_64_BIT_I	0x00010000	PiHob.h
17376	EFI_RESOURCE_ATTRIBUTE_UNCACHED	0x00020000	PiHob.h
17377	EFI_NOT_AVAILABLE_YET	EFIERR (32)	PiMultiPhase.h
17378	EFI_STATUS_CODE_TYPE_MASK	0x000000FF	PiMultiPhase.h
17379	EFI_STATUS_CODE_SEVERITY_MASK	0xFF000000	PiMultiPhase.h
17380	EFI_STATUS_CODE_RESERVED_MASK	0x00FFFF00	PiMultiPhase.h
17381	EFI_PROGRESS_CODE	0x00000001	PiMultiPhase.h
17382	EFI_ERROR_CODE	0x00000002	PiMultiPhase.h
17383	EFI_DEBUG_CODE	0x00000003	PiMultiPhase.h
17384	EFI_ERROR_MINOR	0x40000000	PiMultiPhase.h
17385	EFI_ERROR_MAJOR	0x80000000	PiMultiPhase.h
17386	EFI_ERROR_UNRECOVERED	0x90000000	PiMultiPhase.h
17387	EFI_ERROR_UNCONTAINED	0xa0000000	PiMultiPhase.h
17388	EFI_STATUS_CODE_CLASS_MASK	0xFF000000	PiMultiPhase.h
17389	EFI_STATUS_CODE_SUBCLASS_MASK	0x00FF0000	PiMultiPhase.h
17390	EFI_STATUS_CODE_OPERATION_MASK	0x0000FFFF	PiMultiPhase.h
17391	EFI_AUTH_STATUS_PLATFORM_OVERRI	0x01	PiMultiPhase.h
17392	EFI_AUTH_STATUS_IMAGE_SIGNED	0x02	PiMultiPhase.h
17393	EFI_AUTH_STATUS_NOT_TESTED	0x04	PiMultiPhase.h
17394	EFI_AUTH_STATUS_TEST_FAILED	0x08	PiMultiPhase.h
17395	EFI_AUTH_STATUS_ALL	0x0f	PiMultiPhase.h
17396	EFI_COMPONENT_NAME2_PROTOCOL_GU	{0x6a7a5cff, 0xe8d9, 0x4f70, { 0xba, 0xda, 0x75, 0xab, 0x30, 0x25, 0xce, 0x14 } }	ComponentName2.h
17397	EFI_CPU_ARCH_PROTOCOL_GUID	{ 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }	Cpu.h
17398	EFI_CPU_IO_PROTOCOL_GUID	{ \ 0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \ }	CpuIo.h
17399	EFI_DEBUG_SUPPORT_PROTOCOL_GUID	{ \ 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \ }	DebugSupport.h
17400	EXCEPT_IA32_DIVIDE_ERROR	0	DebugSupport.h
17401	EXCEPT_IA32_DEBUG	1	DebugSupport.h
17402	EXCEPT_IA32_NMI	2	DebugSupport.h
17403	EXCEPT_IA32_BREAKPOINT	3	DebugSupport.h
17404	EXCEPT_IA32_OVERFLOW	4	DebugSupport.h
17405	EXCEPT_IA32_BOUND	5	DebugSupport.h
17406	EXCEPT_IA32_INVALID_OPCODE	6	DebugSupport.h
17407	EXCEPT_IA32_DOUBLE_FAULT	8	DebugSupport.h
17408	EXCEPT_IA32_INVALID_TSS	10	DebugSupport.h
17409	EXCEPT_IA32_SEG_NOT_PRESENT	11	DebugSupport.h
17410	EXCEPT_IA32_STACK_FAULT	12	DebugSupport.h
17411	EXCEPT_IA32_GP_FAULT	13	DebugSupport.h
17412	EXCEPT_IA32_PAGE_FAULT	14	DebugSupport.h
17413	EXCEPT_IA32_FP_ERROR	16	DebugSupport.h
17414	EXCEPT_IA32_ALIGNMENT_CHECK	17	DebugSupport.h
17415	EXCEPT_IA32_MACHINE_CHECK	18	DebugSupport.h
17416	EXCEPT_IA32_SIMD	19	DebugSupport.h
17417	EXCEPT_X64_DIVIDE_ERROR	0	DebugSupport.h
17418	EXCEPT_X64_DEBUG	1	DebugSupport.h
17419	EXCEPT_X64_NMI	2	DebugSupport.h
17420	EXCEPT_X64_BREAKPOINT	3	DebugSupport.h
17421	EXCEPT_X64_OVERFLOW	4	DebugSupport.h
17422	EXCEPT_X64_BOUND	5	DebugSupport.h
17423	EXCEPT_X64_INVALID_OPCODE	6	DebugSupport.h
17424	EXCEPT_X64_DOUBLE_FAULT	8	DebugSupport.h
17425	EXCEPT_X64_INVALID_TSS	10	DebugSupport.h
17426	EXCEPT_X64_SEG_NOT_PRESENT	11	DebugSupport.h
17427	EXCEPT_X64_STACK_FAULT	12	DebugSupport.h
17428	EXCEPT_X64_GP_FAULT	13	DebugSupport.h
17429	EXCEPT_X64_PAGE_FAULT	14	DebugSupport.h
17430	EXCEPT_X64_FP_ERROR	16	DebugSupport.h
17431	EXCEPT_X64_ALIGNMENT_CHECK	17	DebugSupport.h
17432	EXCEPT_X64_MACHINE_CHECK	18	DebugSupport.h
17433	EXCEPT_X64_SIMD	19	DebugSupport.h
17434	EXCEPT_IPF_VHTP_TRANSLATION	0	DebugSupport.h
17435	EXCEPT_IPF_INSTRUCTION_TLB	1	DebugSupport.h
17436	EXCEPT_IPF_DATA_TLB	2	DebugSupport.h
17437	EXCEPT_IPF_ALT_INSTRUCTION_TLB	3	DebugSupport.h
17438	EXCEPT_IPF_ALT_DATA_TLB	4	DebugSupport.h
17439	EXCEPT_IPF_DATA_NESTED_TLB	5	DebugSupport.h
17440	EXCEPT_IPF_INSTRUCTION_KEY_MISS	6	DebugSupport.h
17441	EXCEPT_IPF_DATA_KEY_MISSED	7	DebugSupport.h
17442	EXCEPT_IPF_DIRTY_BIT	8	DebugSupport.h
17443	EXCEPT_IPF_INSTRUCTION_ACCESS_B	9	DebugSupport.h
17444	EXCEPT_IPF_DATA_ACCESS_BIT	10	DebugSupport.h
17445	EXCEPT_IPF_BREAKPOINT	11	DebugSupport.h
17446	EXCEPT_IPF_EXTERNAL_INTERRUPT	12	DebugSupport.h
17447	EXCEPT_IPF_PAGE_NOT_PRESENT	20	DebugSupport.h
17448	EXCEPT_IPF_KEY_PERMISSION	21	DebugSupport.h
17449	EXCEPT_IPF_INSTRUCTION_ACCESS_R	22	DebugSupport.h
17450	EXCEPT_IPF_DATA_ACCESS_RIGHTS	23	DebugSupport.h
17451	EXCEPT_IPF_GENERAL_EXCEPTION	24	DebugSupport.h
17452	EXCEPT_IPF_DISABLED_FP_REGISTER	25	DebugSupport.h
17453	EXCEPT_IPF_NAT_CONSUMPTION	26	DebugSupport.h
17454	EXCEPT_IPF_SPECULATION	27	DebugSupport.h
17455	EXCEPT_IPF_DEBUG	29	DebugSupport.h
17456	EXCEPT_IPF_UNALIGNED_REFERENCE	30	DebugSupport.h
17457	EXCEPT_IPF_UNSUPPORTED_DATA_REF	31	DebugSupport.h
17458	EXCEPT_IPF_FP_FAULT	32	DebugSupport.h
17459	EXCEPT_IPF_FP_TRAP	33	DebugSupport.h
17460	EXCEPT_IPF_LOWER_PRIVILEGE_TRAN	34	DebugSupport.h
17461	EXCEPT_IPF_TAKEN_BRANCH	35	DebugSupport.h
17462	EXCEPT_IPF_SINGLE_STEP	36	DebugSupport.h
17463	EXCEPT_IPF_IA32_EXCEPTION	45	DebugSupport.h
17464	EXCEPT_IPF_IA32_INTERCEPT	46	DebugSupport.h
17465	EXCEPT_IPF_IA32_INTERRUPT	47	DebugSupport.h
17466	EXCEPT_EBC_UNDEFINED	0	DebugSupport.h
17467	EXCEPT_EBC_DIVIDE_ERROR	1	DebugSupport.h
17468	EXCEPT_EBC_DEBUG	2	DebugSupport.h
17469	EXCEPT_EBC_BREAKPOINT	3	DebugSupport.h
17470	EXCEPT_EBC_OVERFLOW	4	DebugSupport.h
17471	EXCEPT_EBC_INVALID_OPCODE	5	DebugSupport.h	opcode out of range
17472	EXCEPT_EBC_STACK_FAULT	6	DebugSupport.h
17473	EXCEPT_EBC_ALIGNMENT_CHECK	7	DebugSupport.h
17474	EXCEPT_EBC_INSTRUCTION_ENCODING	8	DebugSupport.h	malformed instruction
17475	EXCEPT_EBC_BAD_BREAK	9	DebugSupport.h	BREAK 0 or undefined BREAK
17476	EXCEPT_EBC_STEP	10	DebugSupport.h	to support debug stepping
17477	MAX_EBC_EXCEPTION	EXCEPT_EBC_STEP	DebugSupport.h
17478	EFI_DEVICE_PATH_PROTOCOL_GUID	{ \ 0x9576e91, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	DevicePath.h
17479	DEVICE_PATH_PROTOCOL	EFI_DEVICE_PATH_PROTOCOL_GUID	DevicePath.h
17480	HARDWARE_DEVICE_PATH	0x01	DevicePath.h
17481	HW_PCI_DP	0x01	DevicePath.h
17482	HW_PCCARD_DP	0x02	DevicePath.h
17483	HW_MEMMAP_DP	0x03	DevicePath.h
17484	HW_VENDOR_DP	0x04	DevicePath.h
17485	HW_CONTROLLER_DP	0x05	DevicePath.h
17486	ACPI_DEVICE_PATH	0x02	DevicePath.h
17487	ACPI_DP	0x01	DevicePath.h
17488	ACPI_EXTENDED_DP	0x02	DevicePath.h
17489	PNP_EISA_ID_CONST	0x41d0	DevicePath.h
17490	PNP_EISA_ID_MASK	0xffff	DevicePath.h
17491	ACPI_ADR_DP	0x03	DevicePath.h
17492	ACPI_ADR_DISPLAY_TYPE_OTHER	0	DevicePath.h
17493	ACPI_ADR_DISPLAY_TYPE_VGA	1	DevicePath.h
17494	ACPI_ADR_DISPLAY_TYPE_TV	2	DevicePath.h
17495	ACPI_ADR_DISPLAY_TYPE_EXTERNAL_	3	DevicePath.h
17496	ACPI_ADR_DISPLAY_TYPE_INTERNAL_	4	DevicePath.h
17497	MESSAGING_DEVICE_PATH	0x03	DevicePath.h
17498	MSG_ATAPI_DP	0x01	DevicePath.h
17499	MSG_SCSI_DP	0x02	DevicePath.h
17500	MSG_FIBRECHANNEL_DP	0x03	DevicePath.h
17501	MSG_1394_DP	0x04	DevicePath.h
17502	MSG_USB_DP	0x05	DevicePath.h
17503	MSG_USB_CLASS_DP	0x0f	DevicePath.h
17504	MSG_USB_WWID_DP	0x10	DevicePath.h
17505	MSG_DEVICE_LOGICAL_UNIT_DP	0x11	DevicePath.h
17506	MSG_SATA_DP	0x12	DevicePath.h
17507	MSG_I2O_DP	0x06	DevicePath.h
17508	MSG_MAC_ADDR_DP	0x0b	DevicePath.h
17509	MSG_IPv4_DP	0x0c	DevicePath.h
17510	MSG_IPv6_DP	0x0d	DevicePath.h
17511	MSG_INFINIBAND_DP	0x09	DevicePath.h
17512	INFINIBAND_RESOURCE_FLAG_IOC_SE	0x01	DevicePath.h
17513	INFINIBAND_RESOURCE_FLAG_EXTEND	0x02	DevicePath.h
17514	INFINIBAND_RESOURCE_FLAG_CONSOL	0x04	DevicePath.h
17515	INFINIBAND_RESOURCE_FLAG_STORAG	0x08	DevicePath.h
17516	INFINIBAND_RESOURCE_FLAG_NETWOR	0x10	DevicePath.h
17517	MSG_UART_DP	0x0e	DevicePath.h
17518	MSG_VENDOR_DP	0x0a	DevicePath.h
17519	DEVICE_PATH_MESSAGING_PC_ANSI	EFI_PC_ANSI_GUID	DevicePath.h
17520	DEVICE_PATH_MESSAGING_VT_100	EFI_VT_100_GUID	DevicePath.h
17521	DEVICE_PATH_MESSAGING_VT_100_PL	EFI_VT_100_PLUS_GUID	DevicePath.h
17522	DEVICE_PATH_MESSAGING_VT_UTF8	EFI_VT_UTF8_GUID	DevicePath.h
17523	DEVICE_PATH_MESSAGING_UART_FLOW	EFI_UART_DEVICE_PATH_GUID	DevicePath.h
17524	DEVICE_PATH_MESSAGING_SAS	EFI_SAS_DEVICE_PATH_GUID	DevicePath.h
17525	MSG_ISCSI_DP	0x13	DevicePath.h
17526	ISCSI_LOGIN_OPTION_NO_HEADER_DI	0x0000	DevicePath.h
17527	ISCSI_LOGIN_OPTION_HEADER_DIGES	0x0002	DevicePath.h
17528	ISCSI_LOGIN_OPTION_NO_DATA_DIGE	0x0000	DevicePath.h
17529	ISCSI_LOGIN_OPTION_DATA_DIGEST_	0x0008	DevicePath.h
17530	ISCSI_LOGIN_OPTION_AUTHMETHOD_C	0x0000	DevicePath.h
17531	ISCSI_LOGIN_OPTION_AUTHMETHOD_N	0x1000	DevicePath.h
17532	ISCSI_LOGIN_OPTION_CHAP_BI	0x0000	DevicePath.h
17533	ISCSI_LOGIN_OPTION_CHAP_UNI	0x2000	DevicePath.h
17534	MEDIA_DEVICE_PATH	0x04	DevicePath.h
17535	MEDIA_HARDDRIVE_DP	0x01	DevicePath.h
17536	MBR_TYPE_PCAT	0x01	DevicePath.h
17537	MBR_TYPE_EFI_PARTITION_TABLE_HE	0x02	DevicePath.h
17538	SIGNATURE_TYPE_MBR	0x01	DevicePath.h
17539	SIGNATURE_TYPE_GUID	0x02	DevicePath.h
17540	MEDIA_CDROM_DP	0x02	DevicePath.h
17541	MEDIA_VENDOR_DP	0x03	DevicePath.h
17542	MEDIA_FILEPATH_DP	0x04	DevicePath.h
17543	SIZE_OF_FILEPATH_DEVICE_PATH	EFI_FIELD_OFFSET(FILEPATH_DEVICE_PATH,PathName)	DevicePath.h
17544	MEDIA_PROTOCOL_DP	0x05	DevicePath.h
17545	MEDIA_PIWG_FW_VOL_DP	0x7	DevicePath.h
17546	MEDIA_PIWG_FW_FILE_DP	0x6	DevicePath.h
17547	BBS_DEVICE_PATH	0x05	DevicePath.h
17548	BBS_BBS_DP	0x01	DevicePath.h
17549	BBS_TYPE_FLOPPY	0x01	DevicePath.h
17550	BBS_TYPE_HARDDRIVE	0x02	DevicePath.h
17551	BBS_TYPE_CDROM	0x03	DevicePath.h
17552	BBS_TYPE_PCMCIA	0x04	DevicePath.h
17553	BBS_TYPE_USB	0x05	DevicePath.h
17554	BBS_TYPE_EMBEDDED_NETWORK	0x06	DevicePath.h
17555	BBS_TYPE_BEV	0x80	DevicePath.h
17556	BBS_TYPE_UNKNOWN	0xFF	DevicePath.h
17557	END_DEVICE_PATH_TYPE	0x7f	DevicePath.h
17558	END_ENTIRE_DEVICE_PATH_SUBTYPE	0xFF	DevicePath.h
17559	END_INSTANCE_DEVICE_PATH_SUBTYP	0x01	DevicePath.h
17560	EFI_DRIVER_BINDING_PROTOCOL_GUI	{ \ 0x18a031ab, 0xb443, 0x4d1a, {0xa5, 0xc0, 0xc, 0x9, 0x26, 0x1e, 0x9f, 0x71 } \ }	DriverBinding.h
17561	EFI_NETWORK_INTERFACE_IDENTIFIE	{ \ 0xE18541CD, 0xF755, 0x4f73, {0x92, 0x8D, 0x64, 0x3C, 0x8A, 0x79, 0xB2, 0x29 } \ }	NetworkInterfaceIdentifier.h
17562	EFI_NETWORK_INTERFACE_IDENTIFIE	0x00010000	NetworkInterfaceIdentifier.h
17563	EFI_NETWORK_INTERFACE_IDENTIFIE	EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION	NetworkInterfaceIdentifier.h
17564	EFI_PCI_IO_PROTOCOL_GUID	{ \ 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \ }	PciIo.h
17565	EFI_PCI_IO_PASS_THROUGH_BAR	0xff	PciIo.h	< Special BAR that passes a memory or I/O cycle through unchanged
17566	EFI_PCI_IO_ATTRIBUTE_MASK	0x077f	PciIo.h	< All the following I/O and Memory cycles
17567	EFI_PCI_IO_ATTRIBUTE_ISA_MOTHER	0x0001	PciIo.h	< I/O cycles 0x0000-0x00FF (10 bit decode)
17568	EFI_PCI_IO_ATTRIBUTE_ISA_IO	0x0002	PciIo.h	< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
17569	EFI_PCI_IO_ATTRIBUTE_VGA_PALETT	0x0004	PciIo.h	< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
17570	EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY	0x0008	PciIo.h	< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
17571	EFI_PCI_IO_ATTRIBUTE_VGA_IO	0x0010	PciIo.h	< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
17572	EFI_PCI_IO_ATTRIBUTE_IDE_PRIMAR	0x0020	PciIo.h	< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
17573	EFI_PCI_IO_ATTRIBUTE_IDE_SECOND	0x0040	PciIo.h	< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
17574	EFI_PCI_IO_ATTRIBUTE_MEMORY_WRI	0x0080	PciIo.h	< Map a memory range so write are combined
17575	EFI_PCI_IO_ATTRIBUTE_IO	0x0100	PciIo.h	< Enable the I/O decode bit in the PCI Config Header
17576	EFI_PCI_IO_ATTRIBUTE_MEMORY	0x0200	PciIo.h	< Enable the Memory decode bit in the PCI Config Header
17577	EFI_PCI_IO_ATTRIBUTE_BUS_MASTER	0x0400	PciIo.h	< Enable the DMA bit in the PCI Config Header
17578	EFI_PCI_IO_ATTRIBUTE_MEMORY_CAC	0x0800	PciIo.h	< Map a memory range so all r/w accesses are cached
17579	EFI_PCI_IO_ATTRIBUTE_MEMORY_DIS	0x1000	PciIo.h	< Disable a memory range
17580	EFI_PCI_IO_ATTRIBUTE_EMBEDDED_D	0x2000	PciIo.h	< Clear for an add-in PCI Device
17581	EFI_PCI_IO_ATTRIBUTE_EMBEDDED_R	0x4000	PciIo.h	< Clear for a physical PCI Option ROM accessed through ROM BAR
17582	EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRE	0x8000	PciIo.h	< Clear for PCI controllers that can not genrate a DAC
17583	EFI_PCI_IO_ATTRIBUTE_ISA_IO_16	0x10000	PciIo.h	< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
17584	EFI_PCI_IO_ATTRIBUTE_VGA_PALETT	0x20000	PciIo.h	< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
17585	EFI_PCI_IO_ATTRIBUTE_VGA_IO_16	0x30000	PciIo.h	< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
17586	EFI_PCI_DEVICE_ENABLE	(EFI_PCI_IO_ATTRIBUTE_IO \| EFI_PCI_IO_ATTRIBUTE_MEMORY \| EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)	PciIo.h
17587	EFI_VGA_DEVICE_ENABLE	(EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO \| EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY \| EFI_PCI_IO_ATTRIBUTE_VGA_IO \| EFI_PCI_IO_ATTRIBUTE_IO)	PciIo.h
17588	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL	{ \ 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ }	PciRootBridgeIo.h
17589	EFI_PCI_ATTRIBUTE_ISA_MOTHERBOA	0x0001	PciRootBridgeIo.h
17590	EFI_PCI_ATTRIBUTE_ISA_IO	0x0002	PciRootBridgeIo.h
17591	EFI_PCI_ATTRIBUTE_VGA_PALETTE_I	0x0004	PciRootBridgeIo.h
17592	EFI_PCI_ATTRIBUTE_VGA_MEMORY	0x0008	PciRootBridgeIo.h
17593	EFI_PCI_ATTRIBUTE_VGA_IO	0x0010	PciRootBridgeIo.h
17594	EFI_PCI_ATTRIBUTE_IDE_PRIMARY_I	0x0020	PciRootBridgeIo.h
17595	EFI_PCI_ATTRIBUTE_IDE_SECONDARY	0x0040	PciRootBridgeIo.h
17596	EFI_PCI_ATTRIBUTE_MEMORY_WRITE_	0x0080	PciRootBridgeIo.h
17597	EFI_PCI_ATTRIBUTE_MEMORY_CACHED	0x0800	PciRootBridgeIo.h
17598	EFI_PCI_ATTRIBUTE_MEMORY_DISABL	0x1000	PciRootBridgeIo.h
17599	EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_	0x8000	PciRootBridgeIo.h
17600	EFI_PCI_ATTRIBUTE_VALID_FOR_ALL	(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EFI_PCI_ATTRIBUTE_MEMORY_CACHED \| EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)	PciRootBridgeIo.h
17601	EFI_PCI_ATTRIBUTE_INVALID_FOR_A	(~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)	PciRootBridgeIo.h
17602	EFI_SIMPLE_NETWORK_PROTOCOL_GUI	{ \ 0xA19832B9, 0xAC25, 0x11D3, {0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \ }	SimpleNetwork.h
17603	EFI_SIMPLE_NETWORK_RECEIVE_UNIC	0x01	SimpleNetwork.h
17604	EFI_SIMPLE_NETWORK_RECEIVE_MULT	0x02	SimpleNetwork.h
17605	EFI_SIMPLE_NETWORK_RECEIVE_BROA	0x04	SimpleNetwork.h
17606	EFI_SIMPLE_NETWORK_RECEIVE_PROM	0x08	SimpleNetwork.h
17607	EFI_SIMPLE_NETWORK_RECEIVE_PROM	0x10	SimpleNetwork.h
17608	EFI_SIMPLE_NETWORK_RECEIVE_INTE	0x01	SimpleNetwork.h
17609	EFI_SIMPLE_NETWORK_TRANSMIT_INT	0x02	SimpleNetwork.h
17610	EFI_SIMPLE_NETWORK_COMMAND_INTE	0x04	SimpleNetwork.h
17611	EFI_SIMPLE_NETWORK_SOFTWARE_INT	0x08	SimpleNetwork.h
17612	MAX_MCAST_FILTER_CNT	16	SimpleNetwork.h
17613	EFI_SIMPLE_NETWORK_PROTOCOL_REV	0x00010000	SimpleNetwork.h
17614	EFI_SIMPLE_NETWORK_INTERFACE_RE	EFI_SIMPLE_NETWORK_PROTOCOL_REVISION	SimpleNetwork.h
17615	EFI_SIMPLE_TEXT_INPUT_PROTOCOL_	{ \ 0x387477c1, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	SimpleTextIn.h
17616	SIMPLE_INPUT_PROTOCOL	EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID	SimpleTextIn.h
17617	CHAR_NULL	0x0000	SimpleTextIn.h
17618	CHAR_BACKSPACE	0x0008	SimpleTextIn.h
17619	CHAR_TAB	0x0009	SimpleTextIn.h
17620	CHAR_LINEFEED	0x000A	SimpleTextIn.h
17621	CHAR_CARRIAGE_RETURN	0x000D	SimpleTextIn.h
17622	SCAN_NULL	0x0000	SimpleTextIn.h
17623	SCAN_UP	0x0001	SimpleTextIn.h
17624	SCAN_DOWN	0x0002	SimpleTextIn.h
17625	SCAN_RIGHT	0x0003	SimpleTextIn.h
17626	SCAN_LEFT	0x0004	SimpleTextIn.h
17627	SCAN_HOME	0x0005	SimpleTextIn.h
17628	SCAN_END	0x0006	SimpleTextIn.h
17629	SCAN_INSERT	0x0007	SimpleTextIn.h
17630	SCAN_DELETE	0x0008	SimpleTextIn.h
17631	SCAN_PAGE_UP	0x0009	SimpleTextIn.h
17632	SCAN_PAGE_DOWN	0x000A	SimpleTextIn.h
17633	SCAN_F1	0x000B	SimpleTextIn.h
17634	SCAN_F2	0x000C	SimpleTextIn.h
17635	SCAN_F3	0x000D	SimpleTextIn.h
17636	SCAN_F4	0x000E	SimpleTextIn.h
17637	SCAN_F5	0x000F	SimpleTextIn.h
17638	SCAN_F6	0x0010	SimpleTextIn.h
17639	SCAN_F7	0x0011	SimpleTextIn.h
17640	SCAN_F8	0x0012	SimpleTextIn.h
17641	SCAN_F9	0x0013	SimpleTextIn.h
17642	SCAN_F10	0x0014	SimpleTextIn.h
17643	SCAN_F11	0x0015	SimpleTextIn.h
17644	SCAN_F12	0x0016	SimpleTextIn.h
17645	SCAN_ESC	0x0017	SimpleTextIn.h
17646	EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL	{ \ 0x387477c2, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ }	SimpleTextOut.h
17647	SIMPLE_TEXT_OUTPUT_PROTOCOL	EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID	SimpleTextOut.h
17648	BOXDRAW_HORIZONTAL	0x2500	SimpleTextOut.h
17649	BOXDRAW_VERTICAL	0x2502	SimpleTextOut.h
17650	BOXDRAW_DOWN_RIGHT	0x250c	SimpleTextOut.h
17651	BOXDRAW_DOWN_LEFT	0x2510	SimpleTextOut.h
17652	BOXDRAW_UP_RIGHT	0x2514	SimpleTextOut.h
17653	BOXDRAW_UP_LEFT	0x2518	SimpleTextOut.h
17654	BOXDRAW_VERTICAL_RIGHT	0x251c	SimpleTextOut.h
17655	BOXDRAW_VERTICAL_LEFT	0x2524	SimpleTextOut.h
17656	BOXDRAW_DOWN_HORIZONTAL	0x252c	SimpleTextOut.h
17657	BOXDRAW_UP_HORIZONTAL	0x2534	SimpleTextOut.h
17658	BOXDRAW_VERTICAL_HORIZONTAL	0x253c	SimpleTextOut.h
17659	BOXDRAW_DOUBLE_HORIZONTAL	0x2550	SimpleTextOut.h
17660	BOXDRAW_DOUBLE_VERTICAL	0x2551	SimpleTextOut.h
17661	BOXDRAW_DOWN_RIGHT_DOUBLE	0x2552	SimpleTextOut.h
17662	BOXDRAW_DOWN_DOUBLE_RIGHT	0x2553	SimpleTextOut.h
17663	BOXDRAW_DOUBLE_DOWN_RIGHT	0x2554	SimpleTextOut.h
17664	BOXDRAW_DOWN_LEFT_DOUBLE	0x2555	SimpleTextOut.h
17665	BOXDRAW_DOWN_DOUBLE_LEFT	0x2556	SimpleTextOut.h
17666	BOXDRAW_DOUBLE_DOWN_LEFT	0x2557	SimpleTextOut.h
17667	BOXDRAW_UP_RIGHT_DOUBLE	0x2558	SimpleTextOut.h
17668	BOXDRAW_UP_DOUBLE_RIGHT	0x2559	SimpleTextOut.h
17669	BOXDRAW_DOUBLE_UP_RIGHT	0x255a	SimpleTextOut.h
17670	BOXDRAW_UP_LEFT_DOUBLE	0x255b	SimpleTextOut.h
17671	BOXDRAW_UP_DOUBLE_LEFT	0x255c	SimpleTextOut.h
17672	BOXDRAW_DOUBLE_UP_LEFT	0x255d	SimpleTextOut.h
17673	BOXDRAW_VERTICAL_RIGHT_DOUBLE	0x255e	SimpleTextOut.h
17674	BOXDRAW_VERTICAL_DOUBLE_RIGHT	0x255f	SimpleTextOut.h
17675	BOXDRAW_DOUBLE_VERTICAL_RIGHT	0x2560	SimpleTextOut.h
17676	BOXDRAW_VERTICAL_LEFT_DOUBLE	0x2561	SimpleTextOut.h
17677	BOXDRAW_VERTICAL_DOUBLE_LEFT	0x2562	SimpleTextOut.h
17678	BOXDRAW_DOUBLE_VERTICAL_LEFT	0x2563	SimpleTextOut.h
17679	BOXDRAW_DOWN_HORIZONTAL_DOUBLE	0x2564	SimpleTextOut.h
17680	BOXDRAW_DOWN_DOUBLE_HORIZONTAL	0x2565	SimpleTextOut.h
17681	BOXDRAW_DOUBLE_DOWN_HORIZONTAL	0x2566	SimpleTextOut.h
17682	BOXDRAW_UP_HORIZONTAL_DOUBLE	0x2567	SimpleTextOut.h
17683	BOXDRAW_UP_DOUBLE_HORIZONTAL	0x2568	SimpleTextOut.h
17684	BOXDRAW_DOUBLE_UP_HORIZONTAL	0x2569	SimpleTextOut.h
17685	BOXDRAW_VERTICAL_HORIZONTAL_DOU	0x256a	SimpleTextOut.h
17686	BOXDRAW_VERTICAL_DOUBLE_HORIZON	0x256b	SimpleTextOut.h
17687	BOXDRAW_DOUBLE_VERTICAL_HORIZON	0x256c	SimpleTextOut.h
17688	BLOCKELEMENT_FULL_BLOCK	0x2588	SimpleTextOut.h
17689	BLOCKELEMENT_LIGHT_SHADE	0x2591	SimpleTextOut.h
17690	GEOMETRICSHAPE_UP_TRIANGLE	0x25b2	SimpleTextOut.h
17691	GEOMETRICSHAPE_RIGHT_TRIANGLE	0x25ba	SimpleTextOut.h
17692	GEOMETRICSHAPE_DOWN_TRIANGLE	0x25bc	SimpleTextOut.h
17693	GEOMETRICSHAPE_LEFT_TRIANGLE	0x25c4	SimpleTextOut.h
17694	ARROW_LEFT	0x2190	SimpleTextOut.h
17695	ARROW_UP	0x2191	SimpleTextOut.h
17696	ARROW_RIGHT	0x2192	SimpleTextOut.h
17697	ARROW_DOWN	0x2193	SimpleTextOut.h
17698	EFI_BLACK	0x00	SimpleTextOut.h
17699	EFI_BLUE	0x01	SimpleTextOut.h
17700	EFI_GREEN	0x02	SimpleTextOut.h
17701	EFI_CYAN	(EFI_BLUE \| EFI_GREEN)	SimpleTextOut.h
17702	EFI_RED	0x04	SimpleTextOut.h
17703	EFI_MAGENTA	(EFI_BLUE \| EFI_RED)	SimpleTextOut.h
17704	EFI_BROWN	(EFI_GREEN \| EFI_RED)	SimpleTextOut.h
17705	EFI_LIGHTGRAY	(EFI_BLUE \| EFI_GREEN \| EFI_RED)	SimpleTextOut.h
17706	EFI_BRIGHT	0x08	SimpleTextOut.h
17707	EFI_DARKGRAY	(EFI_BRIGHT)	SimpleTextOut.h
17708	EFI_LIGHTBLUE	(EFI_BLUE \| EFI_BRIGHT)	SimpleTextOut.h
17709	EFI_LIGHTGREEN	(EFI_GREEN \| EFI_BRIGHT)	SimpleTextOut.h
17710	EFI_LIGHTCYAN	(EFI_CYAN \| EFI_BRIGHT)	SimpleTextOut.h
17711	EFI_LIGHTRED	(EFI_RED \| EFI_BRIGHT)	SimpleTextOut.h
17712	EFI_LIGHTMAGENTA	(EFI_MAGENTA \| EFI_BRIGHT)	SimpleTextOut.h
17713	EFI_YELLOW	(EFI_BROWN \| EFI_BRIGHT)	SimpleTextOut.h
17714	EFI_WHITE	(EFI_BLUE \| EFI_GREEN \| EFI_RED \| EFI_BRIGHT)	SimpleTextOut.h
17715	EFI_BACKGROUND_BLACK	0x00	SimpleTextOut.h
17716	EFI_BACKGROUND_BLUE	0x10	SimpleTextOut.h
17717	EFI_BACKGROUND_GREEN	0x20	SimpleTextOut.h
17718	EFI_BACKGROUND_CYAN	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_GREEN)	SimpleTextOut.h
17719	EFI_BACKGROUND_RED	0x40	SimpleTextOut.h
17720	EFI_BACKGROUND_MAGENTA	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_RED)	SimpleTextOut.h
17721	EFI_BACKGROUND_BROWN	(EFI_BACKGROUND_GREEN \| EFI_BACKGROUND_RED)	SimpleTextOut.h
17722	EFI_BACKGROUND_LIGHTGRAY	(EFI_BACKGROUND_BLUE \| EFI_BACKGROUND_GREEN \| EFI_BACKGROUND_RED)	SimpleTextOut.h
17723	EFI_WIDE_ATTRIBUTE	0x80	SimpleTextOut.h
17724	EFI_SUCCESS	RETURN_SUCCESS	UefiBaseType.h
17725	EFI_LOAD_ERROR	RETURN_LOAD_ERROR	UefiBaseType.h
17726	EFI_INVALID_PARAMETER	RETURN_INVALID_PARAMETER	UefiBaseType.h
17727	EFI_UNSUPPORTED	RETURN_UNSUPPORTED	UefiBaseType.h
17728	EFI_BAD_BUFFER_SIZE	RETURN_BAD_BUFFER_SIZE	UefiBaseType.h
17729	EFI_BUFFER_TOO_SMALL	RETURN_BUFFER_TOO_SMALL	UefiBaseType.h
17730	EFI_NOT_READY	RETURN_NOT_READY	UefiBaseType.h
17731	EFI_DEVICE_ERROR	RETURN_DEVICE_ERROR	UefiBaseType.h
17732	EFI_WRITE_PROTECTED	RETURN_WRITE_PROTECTED	UefiBaseType.h
17733	EFI_OUT_OF_RESOURCES	RETURN_OUT_OF_RESOURCES	UefiBaseType.h
17734	EFI_VOLUME_CORRUPTED	RETURN_VOLUME_CORRUPTED	UefiBaseType.h
17735	EFI_VOLUME_FULL	RETURN_VOLUME_FULL	UefiBaseType.h
17736	EFI_NO_MEDIA	RETURN_NO_MEDIA	UefiBaseType.h
17737	EFI_MEDIA_CHANGED	RETURN_MEDIA_CHANGED	UefiBaseType.h
17738	EFI_NOT_FOUND	RETURN_NOT_FOUND	UefiBaseType.h
17739	EFI_ACCESS_DENIED	RETURN_ACCESS_DENIED	UefiBaseType.h
17740	EFI_NO_RESPONSE	RETURN_NO_RESPONSE	UefiBaseType.h
17741	EFI_NO_MAPPING	RETURN_NO_MAPPING	UefiBaseType.h
17742	EFI_TIMEOUT	RETURN_TIMEOUT	UefiBaseType.h
17743	EFI_NOT_STARTED	RETURN_NOT_STARTED	UefiBaseType.h
17744	EFI_ALREADY_STARTED	RETURN_ALREADY_STARTED	UefiBaseType.h
17745	EFI_ABORTED	RETURN_ABORTED	UefiBaseType.h
17746	EFI_ICMP_ERROR	RETURN_ICMP_ERROR	UefiBaseType.h
17747	EFI_TFTP_ERROR	RETURN_TFTP_ERROR	UefiBaseType.h
17748	EFI_PROTOCOL_ERROR	RETURN_PROTOCOL_ERROR	UefiBaseType.h
17749	EFI_INCOMPATIBLE_VERSION	RETURN_INCOMPATIBLE_VERSION	UefiBaseType.h
17750	EFI_SECURITY_VIOLATION	RETURN_SECURITY_VIOLATION	UefiBaseType.h
17751	EFI_CRC_ERROR	RETURN_CRC_ERROR	UefiBaseType.h
17752	EFI_END_OF_MEDIA	RETURN_END_OF_MEDIA	UefiBaseType.h
17753	EFI_END_OF_FILE	RETURN_END_OF_FILE	UefiBaseType.h
17754	EFI_INVALID_LANGUAGE	RETURN_INVALID_LANGUAGE	UefiBaseType.h
17755	EFI_WARN_UNKNOWN_GLYPH	RETURN_WARN_UNKNOWN_GLYPH	UefiBaseType.h
17756	EFI_WARN_DELETE_FAILURE	RETURN_WARN_DELETE_FAILURE	UefiBaseType.h
17757	EFI_WARN_WRITE_FAILURE	RETURN_WARN_WRITE_FAILURE	UefiBaseType.h
17758	EFI_WARN_BUFFER_TOO_SMALL	RETURN_WARN_BUFFER_TOO_SMALL	UefiBaseType.h
17759	EFI_PAGE_SIZE	0x1000	UefiBaseType.h
17760	EFI_PAGE_MASK	0xFFF	UefiBaseType.h
17761	EFI_PAGE_SHIFT	12	UefiBaseType.h
17762	EFI_MAX_BIT	MAX_BIT	UefiBaseType.h
17763	EFI_MAX_ADDRESS	MAX_ADDRESS	UefiBaseType.h
17764	RFC_3066_ENTRY_SIZE	(42 + 1)	UefiBaseType.h
17765	ISO_639_2_ENTRY_SIZE	3	UefiBaseType.h
17766	PRIMARY_PART_HEADER_LBA	1	UefiGpt.h
17767	EFI_PTAB_HEADER_ID	0x5452415020494645ULL	UefiGpt.h
17768	EFI_HII_PACKAGE_TYPE_ALL	0x00	UefiInternalFormRepresentation.h
17769	EFI_HII_PACKAGE_TYPE_GUID	0x01	UefiInternalFormRepresentation.h
17770	EFI_HII_PACKAGE_FORMS	0x02	UefiInternalFormRepresentation.h
17771	EFI_HII_PACKAGE_STRINGS	0x04	UefiInternalFormRepresentation.h
17772	EFI_HII_PACKAGE_FONTS	0x05	UefiInternalFormRepresentation.h
17773	EFI_HII_PACKAGE_IMAGES	0x06	UefiInternalFormRepresentation.h
17774	EFI_HII_PACKAGE_SIMPLE_FONTS	0x07	UefiInternalFormRepresentation.h
17775	EFI_HII_PACKAGE_DEVICE_PATH	0x08	UefiInternalFormRepresentation.h
17776	EFI_HII_PACKAGE_KEYBOARD_LAYOUT	0x09	UefiInternalFormRepresentation.h
17777	EFI_HII_PACKAGE_END	0xDF	UefiInternalFormRepresentation.h
17778	EFI_HII_PACKAGE_TYPE_SYSTEM_BEG	0xE0	UefiInternalFormRepresentation.h
17779	EFI_HII_PACKAGE_TYPE_SYSTEM_END	0xFF	UefiInternalFormRepresentation.h
17780	EFI_GLYPH_NON_SPACING	0x01	UefiInternalFormRepresentation.h
17781	EFI_GLYPH_WIDE	0x02	UefiInternalFormRepresentation.h
17782	EFI_GLYPH_HEIGHT	19	UefiInternalFormRepresentation.h
17783	EFI_GLYPH_WIDTH	8	UefiInternalFormRepresentation.h
17784	EFI_HII_FONT_STYLE_NORMAL	0x00000000	UefiInternalFormRepresentation.h
17785	EFI_HII_FONT_STYLE_BOLD	0x00000001	UefiInternalFormRepresentation.h
17786	EFI_HII_FONT_STYLE_ITALIC	0x00000002	UefiInternalFormRepresentation.h
17787	EFI_HII_FONT_STYLE_EMBOSS	0x00010000	UefiInternalFormRepresentation.h
17788	EFI_HII_FONT_STYLE_OUTLINE	0x00020000	UefiInternalFormRepresentation.h
17789	EFI_HII_FONT_STYLE_SHADOW	0x00040000	UefiInternalFormRepresentation.h
17790	EFI_HII_FONT_STYLE_UNDERLINE	0x00080000	UefiInternalFormRepresentation.h
17791	EFI_HII_FONT_STYLE_DBL_UNDER	0x00100000	UefiInternalFormRepresentation.h
17792	EFI_HII_GIBT_END	0x00	UefiInternalFormRepresentation.h
17793	EFI_HII_GIBT_GLYPH	0x10	UefiInternalFormRepresentation.h
17794	EFI_HII_GIBT_GLYPHS	0x11	UefiInternalFormRepresentation.h
17795	EFI_HII_GIBT_GLYPH_DEFAULT	0x12	UefiInternalFormRepresentation.h
17796	EFI_HII_GIBT_GLYPHS_DEFAULT	0x13	UefiInternalFormRepresentation.h
17797	EFI_HII_GIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
17798	EFI_HII_GIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
17799	EFI_HII_GIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
17800	EFI_HII_GIBT_DEFAULTS	0x23	UefiInternalFormRepresentation.h
17801	EFI_HII_GIBT_EXT1	0x30	UefiInternalFormRepresentation.h
17802	EFI_HII_GIBT_EXT2	0x31	UefiInternalFormRepresentation.h
17803	EFI_HII_GIBT_EXT4	0x32	UefiInternalFormRepresentation.h
17804	UEFI_CONFIG_LANG	L"x-UEFI"	UefiInternalFormRepresentation.h
17805	UEFI_CONFIG_LANG2	L"x-i-UEFI"	UefiInternalFormRepresentation.h
17806	EFI_HII_SIBT_END	0x00	UefiInternalFormRepresentation.h
17807	EFI_HII_SIBT_STRING_SCSU	0x10	UefiInternalFormRepresentation.h
17808	EFI_HII_SIBT_STRING_SCSU_FONT	0x11	UefiInternalFormRepresentation.h
17809	EFI_HII_SIBT_STRINGS_SCSU	0x12	UefiInternalFormRepresentation.h
17810	EFI_HII_SIBT_STRINGS_SCSU_FONT	0x13	UefiInternalFormRepresentation.h
17811	EFI_HII_SIBT_STRING_UCS2	0x14	UefiInternalFormRepresentation.h
17812	EFI_HII_SIBT_STRING_UCS2_FONT	0x15	UefiInternalFormRepresentation.h
17813	EFI_HII_SIBT_STRINGS_UCS2	0x16	UefiInternalFormRepresentation.h
17814	EFI_HII_SIBT_STRINGS_UCS2_FONT	0x17	UefiInternalFormRepresentation.h
17815	EFI_HII_SIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
17816	EFI_HII_SIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
17817	EFI_HII_SIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
17818	EFI_HII_SIBT_EXT1	0x30	UefiInternalFormRepresentation.h
17819	EFI_HII_SIBT_EXT2	0x31	UefiInternalFormRepresentation.h
17820	EFI_HII_SIBT_EXT4	0x32	UefiInternalFormRepresentation.h
17821	EFI_HII_SIBT_FONT	0x40	UefiInternalFormRepresentation.h
17822	EFI_HII_IIBT_END	0x00	UefiInternalFormRepresentation.h
17823	EFI_HII_IIBT_IMAGE_1BIT	0x10	UefiInternalFormRepresentation.h
17824	EFI_HII_IIBT_IMAGE_1BIT_TRANS	0x11	UefiInternalFormRepresentation.h
17825	EFI_HII_IIBT_IMAGE_4BIT	0x12	UefiInternalFormRepresentation.h
17826	EFI_HII_IIBT_IMAGE_4BIT_TRANS	0x13	UefiInternalFormRepresentation.h
17827	EFI_HII_IIBT_IMAGE_8BIT	0x14	UefiInternalFormRepresentation.h
17828	EFI_HII_IIBT_IMAGE_8BIT_TRANS	0x15	UefiInternalFormRepresentation.h
17829	EFI_HII_IIBT_IMAGE_24BIT	0x16	UefiInternalFormRepresentation.h
17830	EFI_HII_IIBT_IMAGE_24BIT_TRANS	0x17	UefiInternalFormRepresentation.h
17831	EFI_HII_IIBT_IMAGE_JPEG	0x18	UefiInternalFormRepresentation.h
17832	EFI_HII_IIBT_DUPLICATE	0x20	UefiInternalFormRepresentation.h
17833	EFI_HII_IIBT_SKIP2	0x21	UefiInternalFormRepresentation.h
17834	EFI_HII_IIBT_SKIP1	0x22	UefiInternalFormRepresentation.h
17835	EFI_HII_IIBT_EXT1	0x30	UefiInternalFormRepresentation.h
17836	EFI_HII_IIBT_EXT2	0x31	UefiInternalFormRepresentation.h
17837	EFI_HII_IIBT_EXT4	0x32	UefiInternalFormRepresentation.h
17838	EFI_IFR_FORM_OP	0x01	UefiInternalFormRepresentation.h
17839	EFI_IFR_SUBTITLE_OP	0x02	UefiInternalFormRepresentation.h
17840	EFI_IFR_TEXT_OP	0x03	UefiInternalFormRepresentation.h
17841	EFI_IFR_IMAGE_OP	0x04	UefiInternalFormRepresentation.h
17842	EFI_IFR_ONE_OF_OP	0x05	UefiInternalFormRepresentation.h
17843	EFI_IFR_CHECKBOX_OP	0x06	UefiInternalFormRepresentation.h
17844	EFI_IFR_NUMERIC_OP	0x07	UefiInternalFormRepresentation.h
17845	EFI_IFR_PASSWORD_OP	0x08	UefiInternalFormRepresentation.h
17846	EFI_IFR_ONE_OF_OPTION_OP	0x09	UefiInternalFormRepresentation.h
17847	EFI_IFR_SUPPRESS_IF_OP	0x0A	UefiInternalFormRepresentation.h
17848	EFI_IFR_LOCKED_OP	0x0B	UefiInternalFormRepresentation.h
17849	EFI_IFR_ACTION_OP	0x0C	UefiInternalFormRepresentation.h
17850	EFI_IFR_RESET_BUTTON_OP	0x0D	UefiInternalFormRepresentation.h
17851	EFI_IFR_FORM_SET_OP	0x0E	UefiInternalFormRepresentation.h
17852	EFI_IFR_REF_OP	0x0F	UefiInternalFormRepresentation.h
17853	EFI_IFR_NO_SUBMIT_IF_OP	0x10	UefiInternalFormRepresentation.h
17854	EFI_IFR_INCONSISTENT_IF_OP	0x11	UefiInternalFormRepresentation.h
17855	EFI_IFR_EQ_ID_VAL_OP	0x12	UefiInternalFormRepresentation.h
17856	EFI_IFR_EQ_ID_ID_OP	0x13	UefiInternalFormRepresentation.h
17857	EFI_IFR_EQ_ID_LIST_OP	0x14	UefiInternalFormRepresentation.h
17858	EFI_IFR_AND_OP	0x15	UefiInternalFormRepresentation.h
17859	EFI_IFR_OR_OP	0x16	UefiInternalFormRepresentation.h
17860	EFI_IFR_NOT_OP	0x17	UefiInternalFormRepresentation.h
17861	EFI_IFR_RULE_OP	0x18	UefiInternalFormRepresentation.h
17862	EFI_IFR_GRAY_OUT_IF_OP	0x19	UefiInternalFormRepresentation.h
17863	EFI_IFR_DATE_OP	0x1A	UefiInternalFormRepresentation.h
17864	EFI_IFR_TIME_OP	0x1B	UefiInternalFormRepresentation.h
17865	EFI_IFR_STRING_OP	0x1C	UefiInternalFormRepresentation.h
17866	EFI_IFR_REFRESH_OP	0x1D	UefiInternalFormRepresentation.h
17867	EFI_IFR_DISABLE_IF_OP	0x1E	UefiInternalFormRepresentation.h
17868	EFI_IFR_TO_LOWER_OP	0x20	UefiInternalFormRepresentation.h
17869	EFI_IFR_TO_UPPER_OP	0x21	UefiInternalFormRepresentation.h
17870	EFI_IFR_ORDERED_LIST_OP	0x23	UefiInternalFormRepresentation.h
17871	EFI_IFR_VARSTORE_OP	0x24	UefiInternalFormRepresentation.h
17872	EFI_IFR_VARSTORE_NAME_VALUE_OP	0x25	UefiInternalFormRepresentation.h
17873	EFI_IFR_VARSTORE_EFI_OP	0x26	UefiInternalFormRepresentation.h
17874	EFI_IFR_VARSTORE_DEVICE_OP	0x27	UefiInternalFormRepresentation.h
17875	EFI_IFR_VERSION_OP	0x28	UefiInternalFormRepresentation.h
17876	EFI_IFR_END_OP	0x29	UefiInternalFormRepresentation.h
17877	EFI_IFR_MATCH_OP	0x2A	UefiInternalFormRepresentation.h
17878	EFI_IFR_EQUAL_OP	0x2F	UefiInternalFormRepresentation.h
17879	EFI_IFR_NOT_EQUAL_OP	0x30	UefiInternalFormRepresentation.h
17880	EFI_IFR_GREATER_THAN_OP	0x31	UefiInternalFormRepresentation.h
17881	EFI_IFR_GREATER_EQUAL_OP	0x32	UefiInternalFormRepresentation.h
17882	EFI_IFR_LESS_THAN_OP	0x33	UefiInternalFormRepresentation.h
17883	EFI_IFR_LESS_EQUAL_OP	0x34	UefiInternalFormRepresentation.h
17884	EFI_IFR_BITWISE_AND_OP	0x35	UefiInternalFormRepresentation.h
17885	EFI_IFR_BITWISE_OR_OP	0x36	UefiInternalFormRepresentation.h
17886	EFI_IFR_BITWISE_NOT_OP	0x37	UefiInternalFormRepresentation.h
17887	EFI_IFR_SHIFT_LEFT_OP	0x38	UefiInternalFormRepresentation.h
17888	EFI_IFR_SHIFT_RIGHT_OP	0x39	UefiInternalFormRepresentation.h
17889	EFI_IFR_ADD_OP	0x3A	UefiInternalFormRepresentation.h
17890	EFI_IFR_SUBTRACT_OP	0x3B	UefiInternalFormRepresentation.h
17891	EFI_IFR_MULTIPLY_OP	0x3C	UefiInternalFormRepresentation.h
17892	EFI_IFR_DIVIDE_OP	0x3D	UefiInternalFormRepresentation.h
17893	EFI_IFR_MODULO_OP	0x3E	UefiInternalFormRepresentation.h
17894	EFI_IFR_RULE_REF_OP	0x3F	UefiInternalFormRepresentation.h
17895	EFI_IFR_QUESTION_REF1_OP	0x40	UefiInternalFormRepresentation.h
17896	EFI_IFR_QUESTION_REF2_OP	0x41	UefiInternalFormRepresentation.h
17897	EFI_IFR_UINT8_OP	0x42	UefiInternalFormRepresentation.h
17898	EFI_IFR_UINT16_OP	0x43	UefiInternalFormRepresentation.h
17899	EFI_IFR_UINT32_OP	0x44	UefiInternalFormRepresentation.h
17900	EFI_IFR_UINT64_OP	0x45	UefiInternalFormRepresentation.h
17901	EFI_IFR_TRUE_OP	0x46	UefiInternalFormRepresentation.h
17902	EFI_IFR_FALSE_OP	0x47	UefiInternalFormRepresentation.h
17903	EFI_IFR_TO_UINT_OP	0x48	UefiInternalFormRepresentation.h
17904	EFI_IFR_TO_STRING_OP	0x49	UefiInternalFormRepresentation.h
17905	EFI_IFR_TO_BOOLEAN_OP	0x4A	UefiInternalFormRepresentation.h
17906	EFI_IFR_MID_OP	0x4B	UefiInternalFormRepresentation.h
17907	EFI_IFR_FIND_OP	0x4C	UefiInternalFormRepresentation.h
17908	EFI_IFR_TOKEN_OP	0x4D	UefiInternalFormRepresentation.h
17909	EFI_IFR_STRING_REF1_OP	0x4E	UefiInternalFormRepresentation.h
17910	EFI_IFR_STRING_REF2_OP	0x4F	UefiInternalFormRepresentation.h
17911	EFI_IFR_CONDITIONAL_OP	0x50	UefiInternalFormRepresentation.h
17912	EFI_IFR_QUESTION_REF3_OP	0x51	UefiInternalFormRepresentation.h
17913	EFI_IFR_ZERO_OP	0x52	UefiInternalFormRepresentation.h
17914	EFI_IFR_ONE_OP	0x53	UefiInternalFormRepresentation.h
17915	EFI_IFR_ONES_OP	0x54	UefiInternalFormRepresentation.h
17916	EFI_IFR_UNDEFINED_OP	0x55	UefiInternalFormRepresentation.h
17917	EFI_IFR_LENGTH_OP	0x56	UefiInternalFormRepresentation.h
17918	EFI_IFR_DUP_OP	0x57	UefiInternalFormRepresentation.h
17919	EFI_IFR_THIS_OP	0x58	UefiInternalFormRepresentation.h
17920	EFI_IFR_SPAN_OP	0x59	UefiInternalFormRepresentation.h
17921	EFI_IFR_VALUE_OP	0x5A	UefiInternalFormRepresentation.h
17922	EFI_IFR_DEFAULT_OP	0x5B	UefiInternalFormRepresentation.h
17923	EFI_IFR_DEFAULTSTORE_OP	0x5C	UefiInternalFormRepresentation.h
17924	EFI_IFR_CATENATE_OP	0x5E	UefiInternalFormRepresentation.h
17925	EFI_IFR_GUID_OP	0x5F	UefiInternalFormRepresentation.h
17926	EFI_IFR_FLAG_READ_ONLY	0x01	UefiInternalFormRepresentation.h
17927	EFI_IFR_FLAG_CALLBACK	0x04	UefiInternalFormRepresentation.h
17928	EFI_IFR_FLAG_RESET_REQUIRED	0x10	UefiInternalFormRepresentation.h
17929	EFI_IFR_FLAG_OPTIONS_ONLY	0x80	UefiInternalFormRepresentation.h
17930	EFI_HII_DEFAULT_CLASS_STANDARD	0x0000	UefiInternalFormRepresentation.h
17931	EFI_HII_DEFAULT_CLASS_MANUFACTU	0x0001	UefiInternalFormRepresentation.h
17932	EFI_HII_DEFAULT_CLASS_SAFE	0x0002	UefiInternalFormRepresentation.h
17933	EFI_HII_DEFAULT_CLASS_PLATFORM_	0x4000	UefiInternalFormRepresentation.h
17934	EFI_HII_DEFAULT_CLASS_PLATFORM_	0x7fff	UefiInternalFormRepresentation.h
17935	EFI_HII_DEFAULT_CLASS_HARDWARE_	0x8000	UefiInternalFormRepresentation.h
17936	EFI_HII_DEFAULT_CLASS_HARDWARE_	0xbfff	UefiInternalFormRepresentation.h
17937	EFI_HII_DEFAULT_CLASS_FIRMWARE_	0xc000	UefiInternalFormRepresentation.h
17938	EFI_HII_DEFAULT_CLASS_FIRMWARE_	0xffff	UefiInternalFormRepresentation.h
17939	EFI_IFR_FLAGS_HORIZONTAL	0x01	UefiInternalFormRepresentation.h
17940	EFI_IFR_CHECKBOX_DEFAULT	0x01	UefiInternalFormRepresentation.h
17941	EFI_IFR_CHECKBOX_DEFAULT_MFG	0x02	UefiInternalFormRepresentation.h
17942	EFI_QF_DATE_YEAR_SUPPRESS	0x01	UefiInternalFormRepresentation.h
17943	EFI_QF_DATE_MONTH_SUPPRESS	0x02	UefiInternalFormRepresentation.h
17944	EFI_QF_DATE_DAY_SUPPRESS	0x04	UefiInternalFormRepresentation.h
17945	EFI_QF_DATE_STORAGE	0x30	UefiInternalFormRepresentation.h
17946	QF_DATE_STORAGE_NORMAL	0x00	UefiInternalFormRepresentation.h
17947	QF_DATE_STORAGE_TIME	0x10	UefiInternalFormRepresentation.h
17948	QF_DATE_STORAGE_WAKEUP	0x20	UefiInternalFormRepresentation.h
17949	EFI_IFR_NUMERIC_SIZE	0x03	UefiInternalFormRepresentation.h
17950	EFI_IFR_NUMERIC_SIZE_1	0x00	UefiInternalFormRepresentation.h
17951	EFI_IFR_NUMERIC_SIZE_2	0x01	UefiInternalFormRepresentation.h
17952	EFI_IFR_NUMERIC_SIZE_4	0x02	UefiInternalFormRepresentation.h
17953	EFI_IFR_NUMERIC_SIZE_8	0x03	UefiInternalFormRepresentation.h
17954	EFI_IFR_DISPLAY	0x30	UefiInternalFormRepresentation.h
17955	EFI_IFR_DISPLAY_INT_DEC	0x00	UefiInternalFormRepresentation.h
17956	EFI_IFR_DISPLAY_UINT_DEC	0x10	UefiInternalFormRepresentation.h
17957	EFI_IFR_DISPLAY_UINT_HEX	0x20	UefiInternalFormRepresentation.h
17958	EFI_IFR_STRING_MULTI_LINE	0x01	UefiInternalFormRepresentation.h
17959	EFI_IFR_UNIQUE_SET	0x01	UefiInternalFormRepresentation.h
17960	EFI_IFR_NO_EMPTY_SET	0x02	UefiInternalFormRepresentation.h
17961	QF_TIME_HOUR_SUPPRESS	0x01	UefiInternalFormRepresentation.h
17962	QF_TIME_MINUTE_SUPPRESS	0x02	UefiInternalFormRepresentation.h
17963	QF_TIME_SECOND_SUPPRESS	0x04	UefiInternalFormRepresentation.h
17964	QF_TIME_STORAGE	0x30	UefiInternalFormRepresentation.h
17965	QF_TIME_STORAGE_NORMAL	0x00	UefiInternalFormRepresentation.h
17966	QF_TIME_STORAGE_TIME	0x10	UefiInternalFormRepresentation.h
17967	QF_TIME_STORAGE_WAKEUP	0x20	UefiInternalFormRepresentation.h
17968	EFI_IFR_TYPE_NUM_SIZE_8	0x00	UefiInternalFormRepresentation.h
17969	EFI_IFR_TYPE_NUM_SIZE_16	0x01	UefiInternalFormRepresentation.h
17970	EFI_IFR_TYPE_NUM_SIZE_32	0x02	UefiInternalFormRepresentation.h
17971	EFI_IFR_TYPE_NUM_SIZE_64	0x03	UefiInternalFormRepresentation.h
17972	EFI_IFR_TYPE_BOOLEAN	0x04	UefiInternalFormRepresentation.h
17973	EFI_IFR_TYPE_TIME	0x05	UefiInternalFormRepresentation.h
17974	EFI_IFR_TYPE_DATE	0x06	UefiInternalFormRepresentation.h
17975	EFI_IFR_TYPE_STRING	0x07	UefiInternalFormRepresentation.h
17976	EFI_IFR_TYPE_OTHER	0x08	UefiInternalFormRepresentation.h
17977	EFI_IFR_OPTION_DEFAULT	0x10	UefiInternalFormRepresentation.h
17978	EFI_IFR_OPTION_DEFAULT_MFG	0x20	UefiInternalFormRepresentation.h
17979	EFI_IFR_STRING_UNSIGNED_DEC	0	UefiInternalFormRepresentation.h
17980	EFI_IFR_STRING_SIGNED_DEC	1	UefiInternalFormRepresentation.h
17981	EFI_IFR_STRING_LOWERCASE_HEX	2	UefiInternalFormRepresentation.h
17982	EFI_IFR_STRING_UPPERCASE_HEX	3	UefiInternalFormRepresentation.h
17983	EFI_IFR_STRING_ASCII	0	UefiInternalFormRepresentation.h
17984	EFI_IFR_STRING_UNICODE	8	UefiInternalFormRepresentation.h
17985	EFI_IFR_FF_CASE_SENSITIVE	0x00	UefiInternalFormRepresentation.h
17986	EFI_IFR_FF_CASE_INSENSITIVE	0x01	UefiInternalFormRepresentation.h
17987	EFI_IFR_FLAGS_FIRST_MATCHING	0x00	UefiInternalFormRepresentation.h
17988	EFI_IFR_FLAGS_FIRST_NON_MATCHIN	0x01	UefiInternalFormRepresentation.h
17989	EFI_AFFECTED_BY_STANDARD_SHIFT	0x0001	UefiInternalFormRepresentation.h
17990	EFI_AFFECTED_BY_CAPS_LOCK	0x0002	UefiInternalFormRepresentation.h
17991	EFI_AFFECTED_BY_NUM_LOCK	0x0004	UefiInternalFormRepresentation.h
17992	EFI_NULL_MODIFIER	0x0000	UefiInternalFormRepresentation.h
17993	EFI_LEFT_CONTROL_MODIFIER	0x0001	UefiInternalFormRepresentation.h
17994	EFI_RIGHT_CONTROL_MODIFIER	0x0002	UefiInternalFormRepresentation.h
17995	EFI_LEFT_ALT_MODIFIER	0x0003	UefiInternalFormRepresentation.h
17996	EFI_RIGHT_ALT_MODIFIER	0x0004	UefiInternalFormRepresentation.h
17997	EFI_ALT_GR_MODIFIER	0x0005	UefiInternalFormRepresentation.h
17998	EFI_INSERT_MODIFIER	0x0006	UefiInternalFormRepresentation.h
17999	EFI_DELETE_MODIFIER	0x0007	UefiInternalFormRepresentation.h
18000	EFI_PAGE_DOWN_MODIFIER	0x0008	UefiInternalFormRepresentation.h
18001	EFI_PAGE_UP_MODIFIER	0x0009	UefiInternalFormRepresentation.h
18002	EFI_HOME_MODIFIER	0x000A	UefiInternalFormRepresentation.h
18003	EFI_END_MODIFIER	0x000B	UefiInternalFormRepresentation.h
18004	EFI_LEFT_SHIFT_MODIFIER	0x000C	UefiInternalFormRepresentation.h
18005	EFI_RIGHT_SHIFT_MODIFIER	0x000D	UefiInternalFormRepresentation.h
18006	EFI_CAPS_LOCK_MODIFIER	0x000E	UefiInternalFormRepresentation.h
18007	EFI_NUM_LOCK_MODIFIER	0x000F	UefiInternalFormRepresentation.h
18008	EFI_LEFT_ARROW_MODIFIER	0x0010	UefiInternalFormRepresentation.h
18009	EFI_RIGHT_ARROW_MODIFIER	0x0011	UefiInternalFormRepresentation.h
18010	EFI_DOWN_ARROW_MODIFIER	0x0012	UefiInternalFormRepresentation.h
18011	EFI_UP_ARROW_MODIFIER	0x0013	UefiInternalFormRepresentation.h
18012	EFI_NS_KEY_MODIFIER	0x0014	UefiInternalFormRepresentation.h
18013	EFI_NS_KEY_DEPENDENCY_MODIFIER	0x0015	UefiInternalFormRepresentation.h
18014	EFI_FUNCTION_KEY_ONE_MODIFIER	0x0016	UefiInternalFormRepresentation.h
18015	EFI_FUNCTION_KEY_TWO_MODIFIER	0x0017	UefiInternalFormRepresentation.h
18016	EFI_FUNCTION_KEY_THREE_MODIFIER	0x0018	UefiInternalFormRepresentation.h
18017	EFI_FUNCTION_KEY_FOUR_MODIFIER	0x0019	UefiInternalFormRepresentation.h
18018	EFI_FUNCTION_KEY_FIVE_MODIFIER	0x001A	UefiInternalFormRepresentation.h
18019	EFI_FUNCTION_KEY_SIX_MODIFIER	0x001B	UefiInternalFormRepresentation.h
18020	EFI_FUNCTION_KEY_SEVEN_MODIFIER	0x001C	UefiInternalFormRepresentation.h
18021	EFI_FUNCTION_KEY_EIGHT_MODIFIER	0x001D	UefiInternalFormRepresentation.h
18022	EFI_FUNCTION_KEY_NINE_MODIFIER	0x001E	UefiInternalFormRepresentation.h
18023	EFI_FUNCTION_KEY_TEN_MODIFIER	0x001F	UefiInternalFormRepresentation.h
18024	EFI_FUNCTION_KEY_ELEVEN_MODIFIE	0x0020	UefiInternalFormRepresentation.h
18025	EFI_FUNCTION_KEY_TWELVE_MODIFIE	0x0021	UefiInternalFormRepresentation.h
18026	EFI_PRINT_MODIFIER	0x0022	UefiInternalFormRepresentation.h
18027	EFI_SYS_REQUEST_MODIFIER	0x0023	UefiInternalFormRepresentation.h
18028	EFI_SCROLL_LOCK_MODIFIER	0x0024	UefiInternalFormRepresentation.h
18029	EFI_PAUSE_MODIFIER	0x0025	UefiInternalFormRepresentation.h
18030	EFI_BREAK_MODIFIER	0x0026	UefiInternalFormRepresentation.h
18031	EFI_LEFT_LOGO_MODIFIER	0x0027	UefiInternalFormRepresentation.h
18032	EFI_RIGHT_LOGO_MODIFIER	0x0028	UefiInternalFormRepresentation.h
18033	EFI_MENU_MODIFIER	0x0029	UefiInternalFormRepresentation.h
18034	EFI_VARIABLE_NON_VOLATILE	0x00000001	UefiMultiPhase.h
18035	EFI_VARIABLE_BOOTSERVICE_ACCESS	0x00000002	UefiMultiPhase.h
18036	EFI_VARIABLE_RUNTIME_ACCESS	0x00000004	UefiMultiPhase.h
18037	EFI_VARIABLE_HARDWARE_ERROR_REC	0x00000008	UefiMultiPhase.h
18038	EFI_VARIABLE_AUTHENTICATED_WRIT	0x00000010	UefiMultiPhase.h
18039	WIN_CERT_TYPE_EFI_PKCS115	0x0EF0	UefiMultiPhase.h
18040	WIN_CERT_TYPE_EFI_GUID	0x0EF1	UefiMultiPhase.h
18041	EFI_CERT_TYPE_RSA2048_SHA256_GU	{0xa7717414, 0xc616, 0x4977, {0x94, 0x20, 0x84, 0x47, 0x12, 0xa7, 0x35, 0xbf } }	UefiMultiPhase.h
18042	PXE_BUSTYPE_PXE	PXE_BUSTYPE ('!', 'P', 'X', 'E')	UefiPxe.h
18043	PXE_BUSTYPE_PCI	PXE_BUSTYPE ('P', 'C', 'I', 'R')	UefiPxe.h
18044	PXE_BUSTYPE_PC_CARD	PXE_BUSTYPE ('P', 'C', 'C', 'R')	UefiPxe.h
18045	PXE_BUSTYPE_USB	PXE_BUSTYPE ('U', 'S', 'B', 'R')	UefiPxe.h
18046	PXE_BUSTYPE_1394	PXE_BUSTYPE ('1', '3', '9', '4')	UefiPxe.h
18047	PXE_CPBSIZE_NOT_USED	0	UefiPxe.h	< zero
18048	PXE_DBSIZE_NOT_USED	0	UefiPxe.h	< zero
18049	PXE_CPBADDR_NOT_USED	(PXE_UINT64) 0	UefiPxe.h	< zero
18050	PXE_DBADDR_NOT_USED	(PXE_UINT64) 0	UefiPxe.h	< zero
18051	PXE_CONST	CONST	UefiPxe.h
18052	PXE_VOLATILE	volatile	UefiPxe.h
18053	PXE_FALSE	0	UefiPxe.h	< zero
18054	PXE_TRUE	(!PXE_FALSE)	UefiPxe.h
18055	PXE_OPCODE_GET_STATE	0x0000	UefiPxe.h
18056	PXE_OPCODE_START	0x0001	UefiPxe.h
18057	PXE_OPCODE_STOP	0x0002	UefiPxe.h
18058	PXE_OPCODE_GET_INIT_INFO	0x0003	UefiPxe.h
18059	PXE_OPCODE_GET_CONFIG_INFO	0x0004	UefiPxe.h
18060	PXE_OPCODE_INITIALIZE	0x0005	UefiPxe.h
18061	PXE_OPCODE_RESET	0x0006	UefiPxe.h
18062	PXE_OPCODE_SHUTDOWN	0x0007	UefiPxe.h
18063	PXE_OPCODE_INTERRUPT_ENABLES	0x0008	UefiPxe.h
18064	PXE_OPCODE_RECEIVE_FILTERS	0x0009	UefiPxe.h
18065	PXE_OPCODE_STATION_ADDRESS	0x000A	UefiPxe.h
18066	PXE_OPCODE_STATISTICS	0x000B	UefiPxe.h
18067	PXE_OPCODE_MCAST_IP_TO_MAC	0x000C	UefiPxe.h
18068	PXE_OPCODE_NVDATA	0x000D	UefiPxe.h
18069	PXE_OPCODE_GET_STATUS	0x000E	UefiPxe.h
18070	PXE_OPCODE_FILL_HEADER	0x000F	UefiPxe.h
18071	PXE_OPCODE_TRANSMIT	0x0010	UefiPxe.h
18072	PXE_OPCODE_RECEIVE	0x0011	UefiPxe.h
18073	PXE_OPCODE_LAST_VALID	0x0011	UefiPxe.h
18074	PXE_OPFLAGS_NOT_USED	0x0000	UefiPxe.h
18075	PXE_OPFLAGS_INITIALIZE_CABLE_DE	0x0001	UefiPxe.h
18076	PXE_OPFLAGS_INITIALIZE_DETECT_C	0x0000	UefiPxe.h
18077	PXE_OPFLAGS_INITIALIZE_DO_NOT_D	0x0001	UefiPxe.h
18078	PXE_OPFLAGS_RESET_DISABLE_INTER	0x0001	UefiPxe.h
18079	PXE_OPFLAGS_RESET_DISABLE_FILTE	0x0002	UefiPxe.h
18080	PXE_OPFLAGS_INTERRUPT_OPMASK	0xC000	UefiPxe.h
18081	PXE_OPFLAGS_INTERRUPT_ENABLE	0x8000	UefiPxe.h
18082	PXE_OPFLAGS_INTERRUPT_DISABLE	0x4000	UefiPxe.h
18083	PXE_OPFLAGS_INTERRUPT_READ	0x0000	UefiPxe.h
18084	PXE_OPFLAGS_INTERRUPT_RECEIVE	0x0001	UefiPxe.h
18085	PXE_OPFLAGS_INTERRUPT_TRANSMIT	0x0002	UefiPxe.h
18086	PXE_OPFLAGS_INTERRUPT_COMMAND	0x0004	UefiPxe.h
18087	PXE_OPFLAGS_INTERRUPT_SOFTWARE	0x0008	UefiPxe.h
18088	PXE_OPFLAGS_RECEIVE_FILTER_OPMA	0xC000	UefiPxe.h
18089	PXE_OPFLAGS_RECEIVE_FILTER_ENAB	0x8000	UefiPxe.h
18090	PXE_OPFLAGS_RECEIVE_FILTER_DISA	0x4000	UefiPxe.h
18091	PXE_OPFLAGS_RECEIVE_FILTER_READ	0x0000	UefiPxe.h
18092	PXE_OPFLAGS_RECEIVE_FILTER_RESE	0x2000	UefiPxe.h
18093	PXE_OPFLAGS_RECEIVE_FILTER_UNIC	0x0001	UefiPxe.h
18094	PXE_OPFLAGS_RECEIVE_FILTER_BROA	0x0002	UefiPxe.h
18095	PXE_OPFLAGS_RECEIVE_FILTER_FILT	0x0004	UefiPxe.h
18096	PXE_OPFLAGS_RECEIVE_FILTER_PROM	0x0008	UefiPxe.h
18097	PXE_OPFLAGS_RECEIVE_FILTER_ALL_	0x0010	UefiPxe.h
18098	PXE_OPFLAGS_STATION_ADDRESS_REA	0x0000	UefiPxe.h
18099	PXE_OPFLAGS_STATION_ADDRESS_WRI	0x0000	UefiPxe.h
18100	PXE_OPFLAGS_STATION_ADDRESS_RES	0x0001	UefiPxe.h
18101	PXE_OPFLAGS_STATISTICS_READ	0x0000	UefiPxe.h
18102	PXE_OPFLAGS_STATISTICS_RESET	0x0001	UefiPxe.h
18103	PXE_OPFLAGS_MCAST_IP_TO_MAC_OPM	0x0003	UefiPxe.h
18104	PXE_OPFLAGS_MCAST_IPV4_TO_MAC	0x0000	UefiPxe.h
18105	PXE_OPFLAGS_MCAST_IPV6_TO_MAC	0x0001	UefiPxe.h
18106	PXE_OPFLAGS_NVDATA_OPMASK	0x0001	UefiPxe.h
18107	PXE_OPFLAGS_NVDATA_READ	0x0000	UefiPxe.h
18108	PXE_OPFLAGS_NVDATA_WRITE	0x0001	UefiPxe.h
18109	PXE_OPFLAGS_GET_INTERRUPT_STATU	0x0001	UefiPxe.h
18110	PXE_OPFLAGS_GET_TRANSMITTED_BUF	0x0002	UefiPxe.h
18111	PXE_OPFLAGS_FILL_HEADER_OPMASK	0x0001	UefiPxe.h
18112	PXE_OPFLAGS_FILL_HEADER_FRAGMEN	0x0001	UefiPxe.h
18113	PXE_OPFLAGS_FILL_HEADER_WHOLE	0x0000	UefiPxe.h
18114	PXE_OPFLAGS_SWUNDI_TRANSMIT_OPM	0x0001	UefiPxe.h
18115	PXE_OPFLAGS_TRANSMIT_BLOCK	0x0001	UefiPxe.h
18116	PXE_OPFLAGS_TRANSMIT_DONT_BLOCK	0x0000	UefiPxe.h
18117	PXE_OPFLAGS_TRANSMIT_OPMASK	0x0002	UefiPxe.h
18118	PXE_OPFLAGS_TRANSMIT_FRAGMENTED	0x0002	UefiPxe.h
18119	PXE_OPFLAGS_TRANSMIT_WHOLE	0x0000	UefiPxe.h
18120	PXE_STATFLAGS_INITIALIZE	0x0000	UefiPxe.h
18121	PXE_STATFLAGS_STATUS_MASK	0xC000	UefiPxe.h
18122	PXE_STATFLAGS_COMMAND_COMPLETE	0xC000	UefiPxe.h
18123	PXE_STATFLAGS_COMMAND_FAILED	0x8000	UefiPxe.h
18124	PXE_STATFLAGS_COMMAND_QUEUED	0x4000	UefiPxe.h
18125	PXE_STATFLAGS_GET_STATE_MASK	0x0003	UefiPxe.h
18126	PXE_STATFLAGS_GET_STATE_INITIAL	0x0002	UefiPxe.h
18127	PXE_STATFLAGS_GET_STATE_STARTED	0x0001	UefiPxe.h
18128	PXE_STATFLAGS_GET_STATE_STOPPED	0x0000	UefiPxe.h
18129	PXE_STATFLAGS_CABLE_DETECT_MASK	0x0001	UefiPxe.h
18130	PXE_STATFLAGS_CABLE_DETECT_NOT_	0x0000	UefiPxe.h
18131	PXE_STATFLAGS_CABLE_DETECT_SUPP	0x0001	UefiPxe.h
18132	PXE_STATFLAGS_INITIALIZED_NO_ME	0x0001	UefiPxe.h
18133	PXE_STATFLAGS_RESET_NO_MEDIA	0x0001	UefiPxe.h
18134	PXE_STATFLAGS_INTERRUPT_RECEIVE	0x0001	UefiPxe.h
18135	PXE_STATFLAGS_INTERRUPT_TRANSMI	0x0002	UefiPxe.h
18136	PXE_STATFLAGS_INTERRUPT_COMMAND	0x0004	UefiPxe.h
18137	PXE_STATFLAGS_RECEIVE_FILTER_UN	0x0001	UefiPxe.h
18138	PXE_STATFLAGS_RECEIVE_FILTER_BR	0x0002	UefiPxe.h
18139	PXE_STATFLAGS_RECEIVE_FILTER_FI	0x0004	UefiPxe.h
18140	PXE_STATFLAGS_RECEIVE_FILTER_PR	0x0008	UefiPxe.h
18141	PXE_STATFLAGS_RECEIVE_FILTER_AL	0x0010	UefiPxe.h
18142	PXE_STATFLAGS_GET_STATUS_INTERR	0x000F	UefiPxe.h
18143	PXE_STATFLAGS_GET_STATUS_NO_INT	0x0000	UefiPxe.h
18144	PXE_STATFLAGS_GET_STATUS_RECEIV	0x0001	UefiPxe.h
18145	PXE_STATFLAGS_GET_STATUS_TRANSM	0x0002	UefiPxe.h
18146	PXE_STATFLAGS_GET_STATUS_COMMAN	0x0004	UefiPxe.h
18147	PXE_STATFLAGS_GET_STATUS_SOFTWA	0x0008	UefiPxe.h
18148	PXE_STATFLAGS_GET_STATUS_TXBUF_	0x0010	UefiPxe.h
18149	PXE_STATFLAGS_GET_STATUS_NO_TXB	0x0020	UefiPxe.h
18150	PXE_STATCODE_INITIALIZE	0x0000	UefiPxe.h
18151	PXE_STATCODE_SUCCESS	0x0000	UefiPxe.h
18152	PXE_STATCODE_INVALID_CDB	0x0001	UefiPxe.h
18153	PXE_STATCODE_INVALID_CPB	0x0002	UefiPxe.h
18154	PXE_STATCODE_BUSY	0x0003	UefiPxe.h
18155	PXE_STATCODE_QUEUE_FULL	0x0004	UefiPxe.h
18156	PXE_STATCODE_ALREADY_STARTED	0x0005	UefiPxe.h
18157	PXE_STATCODE_NOT_STARTED	0x0006	UefiPxe.h
18158	PXE_STATCODE_NOT_SHUTDOWN	0x0007	UefiPxe.h
18159	PXE_STATCODE_ALREADY_INITIALIZE	0x0008	UefiPxe.h
18160	PXE_STATCODE_NOT_INITIALIZED	0x0009	UefiPxe.h
18161	PXE_STATCODE_DEVICE_FAILURE	0x000A	UefiPxe.h
18162	PXE_STATCODE_NVDATA_FAILURE	0x000B	UefiPxe.h
18163	PXE_STATCODE_UNSUPPORTED	0x000C	UefiPxe.h
18164	PXE_STATCODE_BUFFER_FULL	0x000D	UefiPxe.h
18165	PXE_STATCODE_INVALID_PARAMETER	0x000E	UefiPxe.h
18166	PXE_STATCODE_INVALID_UNDI	0x000F	UefiPxe.h
18167	PXE_STATCODE_IPV4_NOT_SUPPORTED	0x0010	UefiPxe.h
18168	PXE_STATCODE_IPV6_NOT_SUPPORTED	0x0011	UefiPxe.h
18169	PXE_STATCODE_NOT_ENOUGH_MEMORY	0x0012	UefiPxe.h
18170	PXE_STATCODE_NO_DATA	0x0013	UefiPxe.h
18171	PXE_IFNUM_START	0x0000	UefiPxe.h
18172	PXE_IFNUM_INVALID	0x0000	UefiPxe.h
18173	PXE_CONTROL_QUEUE_IF_BUSY	0x0002	UefiPxe.h
18174	PXE_CONTROL_LINK	0x0001	UefiPxe.h
18175	PXE_CONTROL_LAST_CDB_IN_LIST	0x0000	UefiPxe.h
18176	PXE_FRAME_TYPE_NONE	0x00	UefiPxe.h
18177	PXE_FRAME_TYPE_UNICAST	0x01	UefiPxe.h
18178	PXE_FRAME_TYPE_BROADCAST	0x02	UefiPxe.h
18179	PXE_FRAME_TYPE_FILTERED_MULTICA	0x03	UefiPxe.h
18180	PXE_FRAME_TYPE_PROMISCUOUS	0x04	UefiPxe.h
18181	PXE_FRAME_TYPE_PROMISCUOUS_MULT	0x05	UefiPxe.h
18182	PXE_FRAME_TYPE_MULTICAST	PXE_FRAME_TYPE_FILTERED_MULTICAST	UefiPxe.h
18183	PXE_MAC_LENGTH	32	UefiPxe.h
18184	PXE_IFTYPE_ETHERNET	0x01	UefiPxe.h
18185	PXE_IFTYPE_TOKENRING	0x04	UefiPxe.h
18186	PXE_IFTYPE_FIBRE_CHANNEL	0x12	UefiPxe.h
18187	PXE_HWSTAT_STATE_MASK	0xC0000000	UefiPxe.h
18188	PXE_HWSTAT_BUSY	0xC0000000	UefiPxe.h
18189	PXE_HWSTAT_INITIALIZED	0x80000000	UefiPxe.h
18190	PXE_HWSTAT_STARTED	0x40000000	UefiPxe.h
18191	PXE_HWSTAT_STOPPED	0x00000000	UefiPxe.h
18192	PXE_HWSTAT_COMMAND_FAILED	0x20000000	UefiPxe.h
18193	PXE_HWSTAT_PROMISCUOUS_MULTICAS	0x00001000	UefiPxe.h
18194	PXE_HWSTAT_PROMISCUOUS_RX_ENABL	0x00000800	UefiPxe.h
18195	PXE_HWSTAT_BROADCAST_RX_ENABLED	0x00000400	UefiPxe.h
18196	PXE_HWSTAT_MULTICAST_RX_ENABLED	0x00000200	UefiPxe.h
18197	PXE_HWSTAT_UNICAST_RX_ENABLED	0x00000100	UefiPxe.h
18198	PXE_HWSTAT_SOFTWARE_INT_ENABLED	0x00000080	UefiPxe.h
18199	PXE_HWSTAT_TX_COMPLETE_INT_ENAB	0x00000040	UefiPxe.h
18200	PXE_HWSTAT_PACKET_RX_INT_ENABLE	0x00000020	UefiPxe.h
18201	PXE_HWSTAT_CMD_COMPLETE_INT_ENA	0x00000010	UefiPxe.h
18202	PXE_HWSTAT_SOFTWARE_INT_PENDING	0x00000008	UefiPxe.h
18203	PXE_HWSTAT_TX_COMPLETE_INT_PEND	0x00000004	UefiPxe.h
18204	PXE_HWSTAT_PACKET_RX_INT_PENDIN	0x00000002	UefiPxe.h
18205	PXE_HWSTAT_CMD_COMPLETE_INT_PEN	0x00000001	UefiPxe.h
18206	PXE_HWCMD_ISSUE_COMMAND	0x80000000	UefiPxe.h
18207	PXE_HWCMD_INTS_AND_FILTS	0x00000000	UefiPxe.h
18208	PXE_HWCMD_PROMISCUOUS_MULTICAST	0x00001000	UefiPxe.h
18209	PXE_HWCMD_PROMISCUOUS_RX_ENABLE	0x00000800	UefiPxe.h
18210	PXE_HWCMD_BROADCAST_RX_ENABLE	0x00000400	UefiPxe.h
18211	PXE_HWCMD_MULTICAST_RX_ENABLE	0x00000200	UefiPxe.h
18212	PXE_HWCMD_UNICAST_RX_ENABLE	0x00000100	UefiPxe.h
18213	PXE_HWCMD_SOFTWARE_INT_ENABLE	0x00000080	UefiPxe.h
18214	PXE_HWCMD_TX_COMPLETE_INT_ENABL	0x00000040	UefiPxe.h
18215	PXE_HWCMD_PACKET_RX_INT_ENABLE	0x00000020	UefiPxe.h
18216	PXE_HWCMD_CMD_COMPLETE_INT_ENAB	0x00000010	UefiPxe.h
18217	PXE_HWCMD_CLEAR_SOFTWARE_INT	0x00000008	UefiPxe.h
18218	PXE_HWCMD_CLEAR_TX_COMPLETE_INT	0x00000004	UefiPxe.h
18219	PXE_HWCMD_CLEAR_PACKET_RX_INT	0x00000002	UefiPxe.h
18220	PXE_HWCMD_CLEAR_CMD_COMPLETE_IN	0x00000001	UefiPxe.h
18221	PXE_ROMID_SIGNATURE	PXE_BUSTYPE ('!', 'P', 'X', 'E')	UefiPxe.h
18222	PXE_ROMID_REV	0x02	UefiPxe.h
18223	PXE_ROMID_MAJORVER	0x03	UefiPxe.h
18224	PXE_ROMID_MINORVER	0x01	UefiPxe.h
18225	PXE_ROMID_IMP_HW_UNDI	0x80000000	UefiPxe.h
18226	PXE_ROMID_IMP_SW_VIRT_ADDR	0x40000000	UefiPxe.h
18227	PXE_ROMID_IMP_64BIT_DEVICE	0x00010000	UefiPxe.h
18228	PXE_ROMID_IMP_FRAG_SUPPORTED	0x00008000	UefiPxe.h
18229	PXE_ROMID_IMP_CMD_LINK_SUPPORTE	0x00004000	UefiPxe.h
18230	PXE_ROMID_IMP_CMD_QUEUE_SUPPORT	0x00002000	UefiPxe.h
18231	PXE_ROMID_IMP_MULTI_FRAME_SUPPO	0x00001000	UefiPxe.h
18232	PXE_ROMID_IMP_NVDATA_SUPPORT_MA	0x00000C00	UefiPxe.h
18233	PXE_ROMID_IMP_NVDATA_BULK_WRITA	0x00000C00	UefiPxe.h
18234	PXE_ROMID_IMP_NVDATA_SPARSE_WRI	0x00000800	UefiPxe.h
18235	PXE_ROMID_IMP_NVDATA_READ_ONLY	0x00000400	UefiPxe.h
18236	PXE_ROMID_IMP_NVDATA_NOT_AVAILA	0x00000000	UefiPxe.h
18237	PXE_ROMID_IMP_STATISTICS_SUPPOR	0x00000200	UefiPxe.h
18238	PXE_ROMID_IMP_STATION_ADDR_SETT	0x00000100	UefiPxe.h
18239	PXE_ROMID_IMP_PROMISCUOUS_MULTI	0x00000080	UefiPxe.h
18240	PXE_ROMID_IMP_PROMISCUOUS_RX_SU	0x00000040	UefiPxe.h
18241	PXE_ROMID_IMP_BROADCAST_RX_SUPP	0x00000020	UefiPxe.h
18242	PXE_ROMID_IMP_FILTERED_MULTICAS	0x00000010	UefiPxe.h
18243	PXE_ROMID_IMP_SOFTWARE_INT_SUPP	0x00000008	UefiPxe.h
18244	PXE_ROMID_IMP_TX_COMPLETE_INT_S	0x00000004	UefiPxe.h
18245	PXE_ROMID_IMP_PACKET_RX_INT_SUP	0x00000002	UefiPxe.h
18246	PXE_ROMID_IMP_CMD_COMPLETE_INT_	0x00000001	UefiPxe.h
18247	MAX_PCI_CONFIG_LEN	64	UefiPxe.h	< # of dwords
18248	MAX_EEPROM_LEN	128	UefiPxe.h	< # of dwords
18249	MAX_XMIT_BUFFERS	32	UefiPxe.h	< recycling Q length for xmit_done
18250	MAX_MCAST_ADDRESS_CNT	8	UefiPxe.h
18251	TO_AND_FROM_DEVICE	0	UefiPxe.h
18252	FROM_DEVICE	1	UefiPxe.h
18253	TO_DEVICE	2	UefiPxe.h
18254	PXE_DELAY_MILLISECOND	1000	UefiPxe.h
18255	PXE_DELAY_SECOND	1000000	UefiPxe.h
18256	PXE_IO_READ	0	UefiPxe.h
18257	PXE_IO_WRITE	1	UefiPxe.h
18258	PXE_MEM_READ	2	UefiPxe.h
18259	PXE_MEM_WRITE	4	UefiPxe.h
18260	PXE_MAX_TXRX_UNIT_ETHER	1500	UefiPxe.h
18261	PXE_HWADDR_LEN_ETHER	0x0006	UefiPxe.h
18262	PXE_MAC_HEADER_LEN_ETHER	0x000E	UefiPxe.h
18263	PXE_DUPLEX_ENABLE_FULL_SUPPORTE	1	UefiPxe.h
18264	PXE_DUPLEX_FORCE_FULL_SUPPORTED	2	UefiPxe.h
18265	PXE_LOOPBACK_INTERNAL_SUPPORTED	1	UefiPxe.h
18266	PXE_LOOPBACK_EXTERNAL_SUPPORTED	2	UefiPxe.h
18267	PXE_DUPLEX_DEFAULT	0x00	UefiPxe.h
18268	PXE_FORCE_FULL_DUPLEX	0x01	UefiPxe.h
18269	PXE_ENABLE_FULL_DUPLEX	0x02	UefiPxe.h
18270	PXE_FORCE_HALF_DUPLEX	0x04	UefiPxe.h
18271	PXE_DISABLE_FULL_DUPLEX	0x08	UefiPxe.h
18272	LOOPBACK_NORMAL	0	UefiPxe.h
18273	LOOPBACK_INTERNAL	1	UefiPxe.h
18274	LOOPBACK_EXTERNAL	2	UefiPxe.h
18275	PXE_STATISTICS_RX_TOTAL_FRAMES	0x00	UefiPxe.h
18276	PXE_STATISTICS_RX_GOOD_FRAMES	0x01	UefiPxe.h
18277	PXE_STATISTICS_RX_UNDERSIZE_FRA	0x02	UefiPxe.h
18278	PXE_STATISTICS_RX_OVERSIZE_FRAM	0x03	UefiPxe.h
18279	PXE_STATISTICS_RX_DROPPED_FRAME	0x04	UefiPxe.h
18280	PXE_STATISTICS_RX_UNICAST_FRAME	0x05	UefiPxe.h
18281	PXE_STATISTICS_RX_BROADCAST_FRA	0x06	UefiPxe.h
18282	PXE_STATISTICS_RX_MULTICAST_FRA	0x07	UefiPxe.h
18283	PXE_STATISTICS_RX_CRC_ERROR_FRA	0x08	UefiPxe.h
18284	PXE_STATISTICS_RX_TOTAL_BYTES	0x09	UefiPxe.h
18285	PXE_STATISTICS_TX_TOTAL_FRAMES	0x0A	UefiPxe.h
18286	PXE_STATISTICS_TX_GOOD_FRAMES	0x0B	UefiPxe.h
18287	PXE_STATISTICS_TX_UNDERSIZE_FRA	0x0C	UefiPxe.h
18288	PXE_STATISTICS_TX_OVERSIZE_FRAM	0x0D	UefiPxe.h
18289	PXE_STATISTICS_TX_DROPPED_FRAME	0x0E	UefiPxe.h
18290	PXE_STATISTICS_TX_UNICAST_FRAME	0x0F	UefiPxe.h
18291	PXE_STATISTICS_TX_BROADCAST_FRA	0x10	UefiPxe.h
18292	PXE_STATISTICS_TX_MULTICAST_FRA	0x11	UefiPxe.h
18293	PXE_STATISTICS_TX_CRC_ERROR_FRA	0x12	UefiPxe.h
18294	PXE_STATISTICS_TX_TOTAL_BYTES	0x13	UefiPxe.h
18295	PXE_STATISTICS_COLLISIONS	0x14	UefiPxe.h
18296	PXE_STATISTICS_UNSUPPORTED_PROT	0x15	UefiPxe.h
18297	PXE_PROTOCOL_ETHERNET_IP	0x0800	UefiPxe.h
18298	PXE_PROTOCOL_ETHERNET_ARP	0x0806	UefiPxe.h
18299	MAX_XMIT_FRAGMENTS	16	UefiPxe.h
18300	EFI_TIME_ADJUST_DAYLIGHT	0x01	UefiSpec.h
18301	EFI_TIME_IN_DAYLIGHT	0x02	UefiSpec.h
18302	EFI_UNSPECIFIED_TIMEZONE	0x07FF	UefiSpec.h
18303	EFI_MEMORY_UC	0x0000000000000001ULL	UefiSpec.h
18304	EFI_MEMORY_WC	0x0000000000000002ULL	UefiSpec.h
18305	EFI_MEMORY_WT	0x0000000000000004ULL	UefiSpec.h
18306	EFI_MEMORY_WB	0x0000000000000008ULL	UefiSpec.h
18307	EFI_MEMORY_UCE	0x0000000000000010ULL	UefiSpec.h
18308	EFI_MEMORY_WP	0x0000000000001000ULL	UefiSpec.h
18309	EFI_MEMORY_RP	0x0000000000002000ULL	UefiSpec.h
18310	EFI_MEMORY_XP	0x0000000000004000ULL	UefiSpec.h
18311	EFI_MEMORY_RUNTIME	0x8000000000000000ULL	UefiSpec.h
18312	EFI_MEMORY_DESCRIPTOR_VERSION	1	UefiSpec.h
18313	EFI_OPTIONAL_PTR	0x00000001	UefiSpec.h
18314	EFI_OPTIONAL_POINTER	EFI_OPTIONAL_PTR	UefiSpec.h
18315	EVT_TIMER	0x80000000	UefiSpec.h
18316	EVT_RUNTIME	0x40000000	UefiSpec.h
18317	EVT_NOTIFY_WAIT	0x00000100	UefiSpec.h
18318	EVT_NOTIFY_SIGNAL	0x00000200	UefiSpec.h
18319	EVT_SIGNAL_EXIT_BOOT_SERVICES	0x00000201	UefiSpec.h
18320	EVT_SIGNAL_VIRTUAL_ADDRESS_CHAN	0x60000202	UefiSpec.h
18321	EVT_RUNTIME_CONTEXT	0x20000000	UefiSpec.h
18322	TPL_APPLICATION	4	UefiSpec.h
18323	TPL_CALLBACK	8	UefiSpec.h
18324	TPL_NOTIFY	16	UefiSpec.h
18325	TPL_HIGH_LEVEL	31	UefiSpec.h
18326	EFI_OPEN_PROTOCOL_BY_HANDLE_PRO	0x00000001	UefiSpec.h
18327	EFI_OPEN_PROTOCOL_GET_PROTOCOL	0x00000002	UefiSpec.h
18328	EFI_OPEN_PROTOCOL_TEST_PROTOCOL	0x00000004	UefiSpec.h
18329	EFI_OPEN_PROTOCOL_BY_CHILD_CONT	0x00000008	UefiSpec.h
18330	EFI_OPEN_PROTOCOL_BY_DRIVER	0x00000010	UefiSpec.h
18331	EFI_OPEN_PROTOCOL_EXCLUSIVE	0x00000020	UefiSpec.h
18332	CAPSULE_FLAGS_PERSIST_ACROSS_RE	0x00010000	UefiSpec.h
18333	CAPSULE_FLAGS_POPULATE_SYSTEM_T	0x00020000	UefiSpec.h
18334	EFI_SYSTEM_TABLE_SIGNATURE	0x5453595320494249ULL	UefiSpec.h
18335	EFI_SYSTEM_TABLE_REVISION	((2<<16) \| (10))	UefiSpec.h
18336	EFI_2_10_SYSTEM_TABLE_REVISION	((2<<16) \| (10))	UefiSpec.h
18337	EFI_2_00_SYSTEM_TABLE_REVISION	((2<<16) \| (00))	UefiSpec.h
18338	EFI_1_10_SYSTEM_TABLE_REVISION	((1<<16) \| (10))	UefiSpec.h
18339	EFI_1_02_SYSTEM_TABLE_REVISION	((1<<16) \| (02))	UefiSpec.h
18340	EFI_RUNTIME_SERVICES_SIGNATURE	0x56524553544e5552ULL	UefiSpec.h
18341	EFI_RUNTIME_SERVICES_REVISION	EFI_2_10_SYSTEM_TABLE_REVISION	UefiSpec.h
18342	EFI_BOOT_SERVICES_SIGNATURE	0x56524553544f4f42ULL	UefiSpec.h
18343	EFI_BOOT_SERVICES_REVISION	EFI_2_10_SYSTEM_TABLE_REVISION	UefiSpec.h
18344	LOAD_OPTION_ACTIVE	0x00000001	UefiSpec.h
18345	LOAD_OPTION_FORCE_RECONNECT	0x00000002	UefiSpec.h
18346	LOAD_OPTION_HIDDEN	0x00000008	UefiSpec.h
18347	LOAD_OPTION_CATEGORY	0x00001F00	UefiSpec.h
18348	LOAD_OPTION_CATEGORY_BOOT	0x00000000	UefiSpec.h
18349	LOAD_OPTION_CATEGORY_APP	0x00000100	UefiSpec.h
18350	EFI_BOOT_OPTION_SUPPORT_KEY	0x00000001	UefiSpec.h
18351	EFI_BOOT_OPTION_SUPPORT_APP	0x00000002	UefiSpec.h
18352	EFI_BOOT_OPTION_SUPPORT_COUNT	0x00000300	UefiSpec.h
18353	EFI_KEY_OPTION_SHIFT	0x00000001	UefiSpec.h
18354	EFI_KEY_OPTION_CONTROL	0x00000002	UefiSpec.h
18355	EFI_KEY_OPTION_ALT	0x00000004	UefiSpec.h
18356	EFI_KEY_OPTION_LOGO	0x00000008	UefiSpec.h
18357	EFI_KEY_OPTION_MENU	0x00000010	UefiSpec.h
18358	EFI_KEY_OPTION_SYSREQ	0x00000020	UefiSpec.h
18359	EFI_KEY_CODE_COUNT	0x00000300	UefiSpec.h
18360	EFI_REMOVABLE_MEDIA_FILE_NAME_I	L"\\EFI\\BOOT\\BOOTIA32.EFI"	UefiSpec.h
18361	EFI_REMOVABLE_MEDIA_FILE_NAME_I	L"\\EFI\\BOOT\\BOOTIA64.EFI"	UefiSpec.h
18362	EFI_REMOVABLE_MEDIA_FILE_NAME_X	L"\\EFI\\BOOT\\BOOTX64.EFI"	UefiSpec.h
18363	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_IA32	UefiSpec.h
18364	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_IA64	UefiSpec.h
18365	EFI_REMOVABLE_MEDIA_FILE_NAME	EFI_REMOVABLE_MEDIA_FILE_NAME_X64	UefiSpec.h
18366	UINT8_MAX	0xff	ProcessorBind.h
18367	MAX_BIT	0x8000000000000000ULL	ProcessorBind.h
18368	MAX_2_BITS	0xC000000000000000ULL	ProcessorBind.h
18369	MAX_ADDRESS	0xFFFFFFFFFFFFFFFFULL	ProcessorBind.h
18370	CPU_STACK_ALIGNMENT	16	ProcessorBind.h
18371	EFIAPI	__cdecl	ProcessorBind.h
18372	EFIAPI	__attribute__((ms_abi))	ProcessorBind.h
18373	GLOBAL_REMOVE_IF_UNREFERENCED	__declspec(selectany)	ProcessorBind.h
18374	ATTR_BOLD	0x08	efi_console.c
18375	ATTR_FCOL_MASK	0x07	efi_console.c
18376	ATTR_FCOL_BLACK	0x00	efi_console.c
18377	ATTR_FCOL_BLUE	0x01	efi_console.c
18378	ATTR_FCOL_GREEN	0x02	efi_console.c
18379	ATTR_FCOL_CYAN	0x03	efi_console.c
18380	ATTR_FCOL_RED	0x04	efi_console.c
18381	ATTR_FCOL_MAGENTA	0x05	efi_console.c
18382	ATTR_FCOL_YELLOW	0x06	efi_console.c
18383	ATTR_FCOL_WHITE	0x07	efi_console.c
18384	ATTR_BCOL_MASK	0x70	efi_console.c
18385	ATTR_BCOL_BLACK	0x00	efi_console.c
18386	ATTR_BCOL_BLUE	0x10	efi_console.c
18387	ATTR_BCOL_GREEN	0x20	efi_console.c
18388	ATTR_BCOL_CYAN	0x30	efi_console.c
18389	ATTR_BCOL_RED	0x40	efi_console.c
18390	ATTR_BCOL_MAGENTA	0x50	efi_console.c
18391	ATTR_BCOL_YELLOW	0x60	efi_console.c
18392	ATTR_BCOL_WHITE	0x70	efi_console.c
18393	ATTR_DEFAULT	ATTR_FCOL_WHITE	efi_console.c
18394	MAX_PORT_ADDRESS	0xffff	efi_io.c
18395	EFI_TIMER0_SHIFT	12	efi_timer.c
18396	EFI_CALIBRATE_DELAY_MS	1	efi_timer.c
18397	UNOWHERE	( ~UNULL )	efi_umalloc.c
18398	SMBIOS_TAG_MAGIC	0x5B	smbios_settings.c	"SmBios"
18399	SMBIOS_EMPTY_TAG	( SMBIOS_TAG_MAGIC << 24 )	smbios_settings.c
18400	NUM_ARP_ENTRIES	4	arp.c
18401	arp_table_end	&arp_table[NUM_ARP_ENTRIES]	arp.c
18402	NUM_NDP_ENTRIES	4	ndp.c
18403	ndp_table_end	&ndp_table[NUM_NDP_ENTRIES]	ndp.c
18404	MIN_TIMEOUT	7	retry.c
18405	SLAM_DEFAULT_PORT	10000	slam.c
18406	SLAM_DEFAULT_MULTICAST_IP	( ( 239 << 24 ) \| ( 255 << 16 ) \| ( 1 << 8 ) \| ( 1 << 0 ) )	slam.c
18407	SLAM_DEFAULT_MULTICAST_PORT	10000	slam.c
18408	SLAM_MAX_HEADER_LEN	( 7 + 7 + \ 7 )	slam.c	block_size
18409	SLAM_MAX_BLOCKS_PER_NACK	4	slam.c
18410	SLAM_MAX_NACK_LEN	( 7 + 7 + 1 )	slam.c	block #blocks NUL
18411	SLAM_SLAVE_TIMEOUT	( 1 * TICKS_PER_SEC )	slam.c
18412	ETFTP_INVALID_BLKSIZE	EUNIQ_01	tftp.c
18413	ETFTP_INVALID_TSIZE	EUNIQ_02	tftp.c
18414	ETFTP_MC_NO_PORT	EUNIQ_03	tftp.c
18415	ETFTP_MC_NO_MC	EUNIQ_04	tftp.c
18416	ETFTP_MC_INVALID_MC	EUNIQ_05	tftp.c
18417	ETFTP_MC_INVALID_IP	EUNIQ_06	tftp.c
18418	ETFTP_MC_INVALID_PORT	EUNIQ_07	tftp.c
18419	MTFTP_MAX_TIMEOUTS	3	tftp.c
18420	FSP_PORT	21	fsp.c
18421	CC_GET_FILE	0x42	fsp.c
18422	CC_BYE	0x4A	fsp.c
18423	CC_ERR	0x40	fsp.c
18424	CC_STAT	0x4D	fsp.c
18425	FSP_MAXFILENAME	255	fsp.c
18426	FSP_MAXPAYLOAD	(ETH_MAX_MTU - \ (sizeof(struct iphdr) + sizeof(struct udphdr) + sizeof(struct fsp_header)))	fsp.c
18427	START_OPORT	700	nfs.c	mountd usually insists on secure ports
18428	OPORT_SWEEP	200	nfs.c	make sure we don't leave secure range
18429	__regparm	__attribute__ (( regparm(3) ))	memcpy_test.c
18430	URI_MAX_LEN	1024	uri_test.c
18431	LINK_WAIT_MS	15000	autoboot.c
18432	CPAIR_NORMAL	1	pxemenu.c
18433	CPAIR_SELECT	2	pxemenu.c
18434	EFI_FILE_ALIGN	0x20	elf2efi.c
18435	SNAPLEN	1600	hijack.c
18436	HAVE_PCAP_INJECT	0	hijack.c
18437	UCLPACK_COMPAT	0	nrv2b.c
18438	NDEBUG	1	nrv2b.c
18439	wterr	0	nrv2b.c
18440	ENDIAN	0	nrv2b.c
18441	BITSIZE	32	nrv2b.c
18442	N	(65536ul)	nrv2b.c	size of ring buffer
18443	THRESHOLD	1	nrv2b.c	lower limit for match length
18444	F	2048	nrv2b.c	upper limit for match length
18445	M2_MAX_OFFSET	0xd00	nrv2b.c
18446	UCL_E_OK	0	nrv2b.c
18447	UCL_E_INVALID_ARGUMENT	1	nrv2b.c
18448	UCL_E_OUT_OF_MEMORY	2	nrv2b.c
18449	UCL_E_ERROR	3	nrv2b.c
18450	SWD_HSIZE	16384	nrv2b.c
18451	SWD_MAX_CHAIN	2048	nrv2b.c
18452	SWD_BEST_OFF	1	nrv2b.c
18453	NIL2	UINT_MAX	nrv2b.c
18454	DEBUG	0	zbin.c
18455	K_RDWR	0x60	misc.c	keyboard data & cmds (read/write)
18456	K_STATUS	0x64	misc.c	keyboard status
18457	K_CMD	0x64	misc.c	keybd ctlr command (write-only)
18458	K_OBUF_FUL	0x01	misc.c	output buffer full
18459	K_IBUF_FUL	0x02	misc.c	input buffer full
18460	KC_CMD_WIN	0xd0	misc.c	read output port
18461	KC_CMD_WOUT	0xd1	misc.c	write output port
18462	KB_SET_A20	0xdf	misc.c	enable A20,
18463	KB_UNSET_A20	0xdd	misc.c	enable A20,
18464	CPUCLOCK	166	misc.c
18465	LL_MAX_LINE	16	bin2intelhex.c
18466	INTEL_DATA_TYPE	0	bin2intelhex.c
18467	EXIT_OK	0	bin2intelhex.c
18468	wterr	0	lzhuf.c
18469	N	4096	lzhuf.c	buffer size
18470	F	60	lzhuf.c	lookahead buffer size
18471	THRESHOLD	2	lzhuf.c
18472	NIL	N	lzhuf.c	leaf of tree
18473	N_CHAR	(256 - THRESHOLD + F)	lzhuf.c
18474	T	(N_CHAR * 2 - 1)	lzhuf.c	size of table
18475	R	(T - 1)	lzhuf.c	position of root
18476	MAX_FREQ	0x8000	lzhuf.c	updates tree when the
18477	BUFSZ	4096	loader.h
18478	LOOKAHEAD	60	loader.h
18479	THRESHOLD	2	loader.h
18480	NCHAR	(256+LOOKAHEAD-THRESHOLD)	loader.h
18481	TABLESZ	(NCHAR+NCHAR-1)	loader.h
18482	NIL	((unsigned short)-1)	loader.h
18483	SLAM_PORT	10000	mini-slamd.c
18484	SLAM_MULTICAST_IP	((239<<24)\|(255<<16)\|(1<<8)\|(1<<0))	mini-slamd.c
18485	SLAM_MULTICAST_PORT	10000	mini-slamd.c
18486	SLAM_MULTICAST_TTL	1	mini-slamd.c
18487	SLAM_MULTICAST_LOOPBACK	1	mini-slamd.c
18488	SLAM_MAX_CLIENTS	10	mini-slamd.c
18489	SLAM_PING_TIMEOUT	100	mini-slamd.c	ms
18490	MAX_HDR	(7 + 7 + 7)	mini-slamd.c	transaction, total size, block size
18491	MIN_HDR	(1 + 1 + 1)	mini-slamd.c	transaction, total size, block size
18492	MAX_DATA_HDR	(MAX_HDR + 7)	mini-slamd.c	header, packet #
18493	MIN_DATA_HDR	(MAX_HDR + 1)	mini-slamd.c	header, packet #
18494	SLAM_MAX_NACK	(1500 - (20 + 8))	mini-slamd.c
18495	SLAM_BLOCK_SIZE	(1500 - (20 + 8 + MAX_HDR))	mini-slamd.c
18496	DEBUG	0	mini-slamd.c
18497	MAXSIZE	(512*1024)	mkQNXnbi.c
18498	BASEPORT	9100	p910nd.c
18499	PIDFILE	"/var/run/p910%cd.pid"	p910nd.c
18500	LOCKFILE	LOCKFILE_DIR "/p910%cd"	p910nd.c
18501	LOCKFILE	"/var/lock/subsys/p910%cd"	p910nd.c
18502	PRINTERFILE	"/dev/lp%c"	p910nd.c
18503	LOGOPTS	LOG_ERR	p910nd.c
18504	HUGE	huge	rom-scan.c
18505	ROMSTART	0xC8000	rom-scan.c
18506	ROMEND	0xE8000	rom-scan.c
18507	ROMINCREMENT	0x00800	rom-scan.c
18508	ROMMASK	0x03FFF	rom-scan.c
18509	MAP_FAILED	((void *)(long long)-1)	rom-scan.c
18510	VERSION	"0.6"	romid.c
18511	VDATE	"2003-08-24"	romid.c
18512	ROMSTART	0xC8000	romid.c
18513	ROMEND	0xE8000	romid.c
18514	ROMINCREMENT	0x00800	romid.c
18515	ROMMASK	0x03FFF	romid.c
18516	NORMAL_ATYPE	0x4D	setenvs.c
18517	LAST_ATYPE	0x5A	setenvs.c
18518	PROCNAME	"dp83820"	dp83820flash.c
18519	MAXROMSIZE	0x200000	dp83820_write.c
18520	TIMEOUT	5	main.c	secs between rexmt's
18521	HELPINDENT	(sizeof("connect"))	main.c
18522	PKTSIZE	(1432+4)	tftp.c	SEGSIZE+4
18523	OACK	6	tftp.c
18524	TIMEOUT	5	tftpd.c
18525	OACK	06	tftpd.c
18526	EOPTNEG	8	tftpd.c
18527	PKTSIZE	(1432+4)	tftpd.c	SEGSIZE+4
18528	PKTSIZE	(1432+4)	tftpsubs.c	SEGSIZE+4 should be moved to tftp.h
18529	BF_ALLOC	-3	tftpsubs.c	alloc'd but not yet filled
18530	BF_FREE	-2	tftpsubs.c	free
18531	_ARPA_TFTP_H	1	tftp.h
18532	SEGSIZE	512	tftp.h	data segment size
18533	RRQ	01	tftp.h	read request
18534	WRQ	02	tftp.h	write request
18535	DATA	03	tftp.h	data packet
18536	ACK	04	tftp.h	acknowledgement
18537	ERROR	05	tftp.h	error code
18538	th_block	th_u.tu_block	tftp.h
18539	th_code	th_u.tu_code	tftp.h
18540	th_stuff	th_u.tu_stuff	tftp.h
18541	th_msg	th_data	tftp.h
18542	EUNDEF	0	tftp.h	not defined
18543	ENOTFOUND	1	tftp.h	file not found
18544	EACCESS	2	tftp.h	access violation
18545	ENOSPACE	3	tftp.h	disk full or allocation exceeded
18546	EBADOP	4	tftp.h	illegal TFTP operation
18547	EBADID	5	tftp.h	unknown transfer ID
18548	EEXISTS	6	tftp.h	file already exists
18549	ENOUSER	7	tftp.h	no such user
18550	WOL_MSG_LEN	(6 + 16*6)	wol.c
18551	K_RDWR	0x60	misc.c	keyboard data & cmds (read/write)
18552	K_STATUS	0x64	misc.c	keyboard status
18553	K_CMD	0x64	misc.c	keybd ctlr command (write-only)
18554	K_OBUF_FUL	0x01	misc.c	output buffer full
18555	K_IBUF_FUL	0x02	misc.c	input buffer full
18556	KC_CMD_WIN	0xd0	misc.c	read output port
18557	KC_CMD_WOUT	0xd1	misc.c	write output port
18558	KB_SET_A20	0xdf	misc.c	enable A20,
18559	KB_UNSET_A20	0xdd	misc.c	enable A20,
18560	CPUCLOCK	166	misc.c
18561	LL_MAX_LINE	16	bin2intelhex.c
18562	INTEL_DATA_TYPE	0	bin2intelhex.c
18563	EXIT_OK	0	bin2intelhex.c
18564	wterr	0	lzhuf.c
18565	N	4096	lzhuf.c	buffer size
18566	F	60	lzhuf.c	lookahead buffer size
18567	THRESHOLD	2	lzhuf.c
18568	NIL	N	lzhuf.c	leaf of tree
18569	N_CHAR	(256 - THRESHOLD + F)	lzhuf.c
18570	T	(N_CHAR * 2 - 1)	lzhuf.c	size of table
18571	R	(T - 1)	lzhuf.c	position of root
18572	MAX_FREQ	0x8000	lzhuf.c	updates tree when the
18573	BUFSZ	4096	loader.h
18574	LOOKAHEAD	60	loader.h
18575	THRESHOLD	2	loader.h
18576	NCHAR	(256+LOOKAHEAD-THRESHOLD)	loader.h
18577	TABLESZ	(NCHAR+NCHAR-1)	loader.h
18578	NIL	((unsigned short)-1)	loader.h
18579	SLAM_PORT	10000	mini-slamd.c
18580	SLAM_MULTICAST_IP	((239<<24)\|(255<<16)\|(1<<8)\|(1<<0))	mini-slamd.c
18581	SLAM_MULTICAST_PORT	10000	mini-slamd.c
18582	SLAM_MULTICAST_TTL	1	mini-slamd.c
18583	SLAM_MULTICAST_LOOPBACK	1	mini-slamd.c
18584	SLAM_MAX_CLIENTS	10	mini-slamd.c
18585	SLAM_PING_TIMEOUT	100	mini-slamd.c	ms
18586	MAX_HDR	(7 + 7 + 7)	mini-slamd.c	transaction, total size, block size
18587	MIN_HDR	(1 + 1 + 1)	mini-slamd.c	transaction, total size, block size
18588	MAX_DATA_HDR	(MAX_HDR + 7)	mini-slamd.c	header, packet #
18589	MIN_DATA_HDR	(MAX_HDR + 1)	mini-slamd.c	header, packet #
18590	SLAM_MAX_NACK	(1500 - (20 + 8))	mini-slamd.c
18591	SLAM_BLOCK_SIZE	(1500 - (20 + 8 + MAX_HDR))	mini-slamd.c
18592	DEBUG	0	mini-slamd.c
18593	MAXSIZE	(512*1024)	mkQNXnbi.c
18594	BASEPORT	9100	p910nd.c
18595	PIDFILE	"/var/run/p910%cd.pid"	p910nd.c
18596	LOCKFILE	LOCKFILE_DIR "/p910%cd"	p910nd.c
18597	LOCKFILE	"/var/lock/subsys/p910%cd"	p910nd.c
18598	PRINTERFILE	"/dev/lp%c"	p910nd.c
18599	LOGOPTS	LOG_ERR	p910nd.c
18600	HUGE	huge	rom-scan.c
18601	ROMSTART	0xC8000	rom-scan.c
18602	ROMEND	0xE8000	rom-scan.c
18603	ROMINCREMENT	0x00800	rom-scan.c
18604	ROMMASK	0x03FFF	rom-scan.c
18605	MAP_FAILED	((void *)(long long)-1)	rom-scan.c
18606	VERSION	"0.6"	romid.c
18607	VDATE	"2003-08-24"	romid.c
18608	ROMSTART	0xC8000	romid.c
18609	ROMEND	0xE8000	romid.c
18610	ROMINCREMENT	0x00800	romid.c
18611	ROMMASK	0x03FFF	romid.c
18612	NORMAL_ATYPE	0x4D	setenvs.c
18613	LAST_ATYPE	0x5A	setenvs.c
18614	PROCNAME	"dp83820"	dp83820flash.c
18615	MAXROMSIZE	0x200000	dp83820_write.c
18616	TIMEOUT	5	main.c	secs between rexmt's
18617	HELPINDENT	(sizeof("connect"))	main.c
18618	PKTSIZE	(1432+4)	tftp.c	SEGSIZE+4
18619	OACK	6	tftp.c
18620	TIMEOUT	5	tftpd.c
18621	OACK	06	tftpd.c
18622	EOPTNEG	8	tftpd.c
18623	PKTSIZE	(1432+4)	tftpd.c	SEGSIZE+4
18624	PKTSIZE	(1432+4)	tftpsubs.c	SEGSIZE+4 should be moved to tftp.h
18625	BF_ALLOC	-3	tftpsubs.c	alloc'd but not yet filled
18626	BF_FREE	-2	tftpsubs.c	free
18627	_ARPA_TFTP_H	1	tftp.h
18628	SEGSIZE	512	tftp.h	data segment size
18629	RRQ	01	tftp.h	read request
18630	WRQ	02	tftp.h	write request
18631	DATA	03	tftp.h	data packet
18632	ACK	04	tftp.h	acknowledgement
18633	ERROR	05	tftp.h	error code
18634	th_block	th_u.tu_block	tftp.h
18635	th_code	th_u.tu_code	tftp.h
18636	th_stuff	th_u.tu_stuff	tftp.h
18637	th_msg	th_data	tftp.h
18638	EUNDEF	0	tftp.h	not defined
18639	ENOTFOUND	1	tftp.h	file not found
18640	EACCESS	2	tftp.h	access violation
18641	ENOSPACE	3	tftp.h	disk full or allocation exceeded
18642	EBADOP	4	tftp.h	illegal TFTP operation
18643	EBADID	5	tftp.h	unknown transfer ID
18644	EEXISTS	6	tftp.h	file already exists
18645	ENOUSER	7	tftp.h	no such user
18646	WOL_MSG_LEN	(6 + 16*6)	wol.c
18647	COMCONSOLE	0x3f8	config.h	I/O port address
18648	COMSPEED	115200	config.h	Baud rate
18649	COMDATA	8	config.h	Data bits
18650	COMPARITY	0	config.h	Parity: 0=None, 1=Odd, 2=Even
18651	COMSTOP	1	config.h	Stop bits
18652	BANNER_TIMEOUT	20	config.h	Tenths of a second for which the shell
18653	BOOTINFO_VERSION	1	freebsd_loader.c
18654	NODEV	(-1)	freebsd_loader.c	non-existent device
18655	PAGE_SHIFT	12	freebsd_loader.c	LOG2(PAGE_SIZE)
18656	PAGE_SIZE	(1<<PAGE_SHIFT)	freebsd_loader.c	bytes/page
18657	PAGE_MASK	(PAGE_SIZE-1)	freebsd_loader.c
18658	N_BIOS_GEOM	8	freebsd_loader.c
18659	TIMER2_TICK_RATE	1193180U	i386_timer.c
18660	PPC_PORTB	0x61	i386_timer.c
18661	PPCB_T2OUT	0x20	i386_timer.c	Bit 5
18662	PPCB_SPKR	0x02	i386_timer.c	Bit 1
18663	PPCB_T2GATE	0x01	i386_timer.c	Bit 0
18664	TIMER2_PORT	0x42	i386_timer.c
18665	TIMER_MODE_PORT	0x43	i386_timer.c
18666	TIMER0_SEL	0x00	i386_timer.c
18667	TIMER1_SEL	0x40	i386_timer.c
18668	TIMER2_SEL	0x80	i386_timer.c
18669	READBACK_SEL	0xC0	i386_timer.c
18670	LATCH_COUNT	0x00	i386_timer.c
18671	LOBYTE_ACCESS	0x10	i386_timer.c
18672	HIBYTE_ACCESS	0x20	i386_timer.c
18673	WORD_ACCESS	0x30	i386_timer.c
18674	MODE0	0x00	i386_timer.c
18675	MODE1	0x02	i386_timer.c
18676	MODE2	0x04	i386_timer.c
18677	MODE3	0x06	i386_timer.c
18678	MODE4	0x08	i386_timer.c
18679	MODE5	0x0A	i386_timer.c
18680	BINARY_COUNT	0x00	i386_timer.c
18681	BCD_COUNT	0x01	i386_timer.c
18682	max_align	( ( unsigned int ) _max_align )	relocate.c
18683	MAX_ADDR	(0xfff00000UL)	relocate.c
18684	EM_ALIGN	( 4 * 1024 )	umalloc.c
18685	UNOWHERE	( ~UNULL )	umalloc.c
18686	VIDBUFFER	0xB8000	video_subr.c
18687	LOAD_DEBUG	0	wince_loader.c
18688	BOOT_ARG_PTR_LOCATION	0x001FFFFC	wince_loader.c
18689	PSIZE	(1500)	wince_loader.c	Max Packet Size
18690	DSIZE	(PSIZE+12)	wince_loader.c
18691	TIMER2_TICKS_PER_SEC	18	timer_bios.c
18692	undi_loader	__use_data16 ( undi_loader )	undiload.c
18693	undi_loader_entry	__use_data16 ( undi_loader_entry )	undiload.c
18694	UNDI_HACK_EB54	0x0001	undinet.c
18695	undinet_params	__use_data16 ( undinet_params )	undinet.c
18696	undinet_entry_point	__use_data16 ( undinet_entry_point )	undinet.c
18697	undiisr_irq	__use_data16 ( undiisr_irq )	undinet.c
18698	undiisr_next_handler	__use_data16 ( undiisr_next_handler )	undinet.c
18699	undiisr_trigger_count	__use_data16 ( undiisr_trigger_count )	undinet.c
18700	undinet_tbd	__use_data16 ( undinet_tbd )	undinet.c
18701	ATTR_BOLD	0x08	bios_console.c
18702	ATTR_FCOL_MASK	0x07	bios_console.c
18703	ATTR_FCOL_BLACK	0x00	bios_console.c
18704	ATTR_FCOL_BLUE	0x01	bios_console.c
18705	ATTR_FCOL_GREEN	0x02	bios_console.c
18706	ATTR_FCOL_CYAN	0x03	bios_console.c
18707	ATTR_FCOL_RED	0x04	bios_console.c
18708	ATTR_FCOL_MAGENTA	0x05	bios_console.c
18709	ATTR_FCOL_YELLOW	0x06	bios_console.c
18710	ATTR_FCOL_WHITE	0x07	bios_console.c
18711	ATTR_BCOL_MASK	0x70	bios_console.c
18712	ATTR_BCOL_BLACK	0x00	bios_console.c
18713	ATTR_BCOL_BLUE	0x10	bios_console.c
18714	ATTR_BCOL_GREEN	0x20	bios_console.c
18715	ATTR_BCOL_CYAN	0x30	bios_console.c
18716	ATTR_BCOL_RED	0x40	bios_console.c
18717	ATTR_BCOL_MAGENTA	0x50	bios_console.c
18718	ATTR_BCOL_YELLOW	0x60	bios_console.c
18719	ATTR_BCOL_WHITE	0x70	bios_console.c
18720	ATTR_DEFAULT	ATTR_FCOL_WHITE	bios_console.c
18721	BIOS_KEY_MIN	0x47	bios_console.c
18722	real_int15_vector	__use_text16 ( real_int15_vector )	fakee820.c
18723	E820_TYPE_RAM	1	fakee820.c	*< Normal memory
18724	E820_TYPE_RSVD	2	fakee820.c	*< Reserved and unavailable
18725	E820_TYPE_ACPI	3	fakee820.c	*< ACPI reclaim memory
18726	E820_TYPE_NVS	4	fakee820.c	*< ACPI NVS memory
18727	e820map	__use_text16 ( e820map )	fakee820.c
18728	K_RDWR	0x60	gateA20.c	keyboard data & cmds (read/write)
18729	K_STATUS	0x64	gateA20.c	keyboard status
18730	K_CMD	0x64	gateA20.c	keybd ctlr command (write-only)
18731	K_OBUF_FUL	0x01	gateA20.c	output buffer full
18732	K_IBUF_FUL	0x02	gateA20.c	input buffer full
18733	KC_CMD_WIN	0xd0	gateA20.c	read output port
18734	KC_CMD_WOUT	0xd1	gateA20.c	write output port
18735	KC_CMD_NULL	0xff	gateA20.c	null command ("pulse nothing")
18736	KB_SET_A20	0xdf	gateA20.c	enable A20,
18737	KB_UNSET_A20	0xdd	gateA20.c	enable A20,
18738	SCP_A	0x92	gateA20.c	System Control Port A
18739	A20_MAX_RETRIES	32	gateA20.c
18740	A20_INT15_RETRIES	32	gateA20.c
18741	A20_KBC_RETRIES	(2^21)	gateA20.c
18742	A20_SCPA_RETRIES	(2^21)	gateA20.c
18743	FAKE_E820	0	hidemem.c
18744	ALIGN_HIDDEN	4096	hidemem.c	4kB page alignment should be enough
18745	hidemem_base	__use_data16 ( hidemem_base )	hidemem.c
18746	hidemem_umalloc	__use_data16 ( hidemem_umalloc )	hidemem.c
18747	hidemem_text	__use_data16 ( hidemem_text )	hidemem.c
18748	int15_vector	__use_text16 ( int15_vector )	hidemem.c
18749	_text16_size	( ( unsigned int ) _text16_size )	hidemem.c
18750	_data16_size	( ( unsigned int ) _data16_size )	hidemem.c
18751	SMAP	( 0x534d4150 )	memmap.c
18752	E820_TYPE_RAM	1	memmap.c	*< Normal memory
18753	E820_TYPE_RESERVED	2	memmap.c	*< Reserved and unavailable
18754	E820_TYPE_ACPI	3	memmap.c	*< ACPI reclaim memory
18755	E820_TYPE_NVS	4	memmap.c	*< ACPI NVS memory
18756	E820_ATTR_ENABLED	0x00000001UL	memmap.c
18757	E820_ATTR_NONVOLATILE	0x00000002UL	memmap.c
18758	E820_ATTR_UNKNOWN	0xfffffffcUL	memmap.c
18759	E820_MIN_SIZE	20	memmap.c
18760	e820buf	__use_data16 ( e820buf )	memmap.c
18761	PNP_BIOS_SIGNATURE	( ( '$' << 0 ) + ( 'P' << 8 ) + ( 'n' << 16 ) + ( 'P' << 24 ) )	pnpbios.c
18762	SMBIOS_SIGNATURE	( ( '_' << 0 ) + ( 'S' << 8 ) + ( 'M' << 16 ) + ( '_' << 24 ) )	smbios.c
18763	COMBOOT_PSP_CMDLINE_OFFSET	0x81	comboot.c
18764	COMBOOT_MAX_CMDLINE_LEN	125	comboot.c
18765	ISO9660_BLKSIZE	2048	eltorito.c
18766	ELTORITO_VOL_DESC_OFFSET	( 17 * ISO9660_BLKSIZE )	eltorito.c
18767	ELTORITO_BOOTABLE	0x88	eltorito.c
18768	MAX_MODULES	8	multiboot.c
18769	MB_MAX_CMDLINE	512	multiboot.c
18770	MB_SUPPORTED_FLAGS	( MB_FLAG_PGALIGN \| MB_FLAG_MEMMAP \| \ MB_FLAG_VIDMODE \| MB_FLAG_RAW )	multiboot.c
18771	MB_COMPULSORY_FLAGS	0x0000ffff	multiboot.c
18772	MB_OPTIONAL_FLAGS	0xffff0000	multiboot.c
18773	MB_UNSUPPORTED_FLAGS	( MB_COMPULSORY_FLAGS & ~MB_SUPPORTED_FLAGS )	multiboot.c
18774	mb_cmdlines	__use_data16 ( mb_cmdlines )	multiboot.c
18775	mbinfo	__use_data16 ( mbinfo )	multiboot.c
18776	mb_bootloader_name	__use_data16 ( mb_bootloader_name )	multiboot.c
18777	mbmemmap	__use_data16 ( mbmemmap )	multiboot.c
18778	mbmodules	__use_data16 ( mbmodules )	multiboot.c
18779	NBI_MAGIC	0x1B031336UL	nbi.c
18780	NBI_HEADER_LENGTH	512	nbi.c
18781	NBI_LOADADDR_ABS	0x00	nbi.c
18782	NBI_LOADADDR_AFTER	0x01	nbi.c
18783	NBI_LOADADDR_END	0x02	nbi.c
18784	NBI_LOADADDR_BEFORE	0x03	nbi.c
18785	BASEMEM_PACKET_LEN	1514	basemem_packet.h
18786	basemem_packet	__use_data16 ( basemem_packet )	basemem_packet.h
18787	BDA_SEG	0x0040	bios.h
18788	BDA_FBMS	0x0013	bios.h
18789	BDA_NUM_DRIVES	0x0075	bios.h
18790	BIOS_DISK_MAX_NAME_LEN	6	bios_disks.h
18791	bochsbp	xchgw %bx, %bx	bochs.h
18792	BOCHSBP	bochsbp	bochs.h
18793	BZI_HDR_OFFSET	0x1f1	bzimage.h
18794	BZI_SIGNATURE	0x53726448	bzimage.h
18795	BZI_LOADER_TYPE_ETHERBOOT	0x40	bzimage.h
18796	BZI_LOADER_TYPE_GPXE	( BZI_LOADER_TYPE_ETHERBOOT \| 0x06 )	bzimage.h
18797	BZI_LOAD_HIGH	0x01	bzimage.h
18798	BZI_LOAD_HIGH_ADDR	0x100000	bzimage.h
18799	BZI_LOAD_LOW_ADDR	0x10000	bzimage.h
18800	BZI_CAN_USE_HEAP	0x80	bzimage.h
18801	BZI_VID_MODE_NORMAL	0xffff	bzimage.h
18802	BZI_VID_MODE_EXT	0xfffe	bzimage.h
18803	BZI_VID_MODE_ASK	0xfffd	bzimage.h
18804	BZI_INITRD_MAX	0x37ffffff	bzimage.h
18805	BZI_CMDLINE_OFFSET	0x20	bzimage.h
18806	BZI_CMDLINE_MAGIC	0xa33f	bzimage.h
18807	BZI_ASSUMED_RM_SIZE	0x8000	bzimage.h
18808	BZI_STACK_SIZE	0x1000	bzimage.h
18809	BZI_CMDLINE_SIZE	0x100	bzimage.h
18810	GDT_TYPE_DATA	(0x0)	callbacks_arch.h
18811	GDT_TYPE_STACK	(0x2)	callbacks_arch.h
18812	GDT_TYPE_WRITEABLE	(0x1)	callbacks_arch.h
18813	GDT_TYPE_CODE	(0x6)	callbacks_arch.h
18814	GDT_TYPE_EXEC_ONLY_CODE	(0x4)	callbacks_arch.h
18815	GDT_TYPE_CONFORMING	(0x1)	callbacks_arch.h
18816	GDT_SFLAG_SYSTEM	(0)	callbacks_arch.h
18817	GDT_SFLAG_NORMAL	(1)	callbacks_arch.h
18818	GDT_AVL_NORMAL	(0)	callbacks_arch.h
18819	GDT_SIZE_16BIT	(0x0)	callbacks_arch.h
18820	GDT_SIZE_32BIT	(0x2)	callbacks_arch.h
18821	GDT_SIZE_64BIT	(0x1)	callbacks_arch.h
18822	GDT_SIZE_UNKNOWN	(0x3)	callbacks_arch.h
18823	GDT_GRANULARITY_SMALL	(0)	callbacks_arch.h
18824	GDT_GRANULARITY_LARGE	(1)	callbacks_arch.h
18825	GDT_SEGMENT_PMCS_PHYS	GDT_SEGMENT_PMCS(0)	callbacks_arch.h
18826	GDT_SEGMENT_PMDS_PHYS	GDT_SEGMENT_PMDS(0)	callbacks_arch.h
18827	GDT_SEGMENT_LMCS_PHYS	GDT_SEGMENT_LMCS(0)	callbacks_arch.h
18828	GDT_SEGMENT_LMDS_PHYS	GDT_SEGMENT_LMDS(0)	callbacks_arch.h
18829	in_call_data_t	i386_in_call_data_t	callbacks_arch.h
18830	RM_IN_CALL	(0)	callbacks_arch.h
18831	RM_IN_CALL_FAR	(2)	callbacks_arch.h
18832	COMBOOT_PSP_SEG	0x07C0	comboot.h
18833	COM32_START_PHYS	0x101000	comboot.h
18834	COM32_BOUNCE_SEG	0x07C0	comboot.h
18835	COMBOOT_FILE_BLOCKSZ	512	comboot.h
18836	COMBOOT_FEATURE_LOCAL_BOOT	(1 << 0)	comboot.h
18837	COMBOOT_FEATURE_IDLE_LOOP	(1 << 1)	comboot.h
18838	COMBOOT_MAX_SHUFFLE_DESCRIPTORS	682	comboot.h
18839	COMBOOT_RETURN_EXIT	1	comboot.h
18840	COMBOOT_RETURN_RUN_KERNEL	2	comboot.h
18841	COMBOOT_VIDEO_GRAPHICS	0x01	comboot.h
18842	COMBOOT_VIDEO_NONSTANDARD	0x02	comboot.h
18843	COMBOOT_VIDEO_VESA	0x04	comboot.h
18844	COMBOOT_VIDEO_NOTEXT	0x08	comboot.h
18845	INT13_RESET	0x00	int13.h
18846	INT13_GET_LAST_STATUS	0x01	int13.h
18847	INT13_READ_SECTORS	0x02	int13.h
18848	INT13_WRITE_SECTORS	0x03	int13.h
18849	INT13_GET_PARAMETERS	0x08	int13.h
18850	INT13_GET_DISK_TYPE	0x15	int13.h
18851	INT13_EXTENSION_CHECK	0x41	int13.h
18852	INT13_EXTENDED_READ	0x42	int13.h
18853	INT13_EXTENDED_WRITE	0x43	int13.h
18854	INT13_GET_EXTENDED_PARAMETERS	0x48	int13.h
18855	INT13_CDROM_STATUS_TERMINATE	0x4b	int13.h
18856	INT13_STATUS_SUCCESS	0x00	int13.h
18857	INT13_STATUS_INVALID	0x01	int13.h
18858	INT13_STATUS_READ_ERROR	0x04	int13.h
18859	INT13_STATUS_WRITE_ERROR	0xcc	int13.h
18860	INT13_BLKSIZE	512	int13.h
18861	INT13_DISK_TYPE_NONE	0x00	int13.h
18862	INT13_DISK_TYPE_FDD	0x01	int13.h
18863	INT13_DISK_TYPE_FDD_CL	0x02	int13.h
18864	INT13_DISK_TYPE_HDD	0x03	int13.h
18865	INT13_FL_DMA_TRANSPARENT	0x01	int13.h
18866	INT13_FL_CHS_VALID	0x02	int13.h
18867	INT13_FL_REMOVABLE	0x04	int13.h
18868	INT13_FL_VERIFIABLE	0x08	int13.h
18869	INT13_FL_CHANGE_LINE	0x10	int13.h
18870	INT13_FL_LOCKABLE	0x20	int13.h
18871	INT13_FL_CHS_MAX	0x40	int13.h
18872	INT13_EXTENSION_LINEAR	0x01	int13.h
18873	INT13_EXTENSION_REMOVABLE	0x02	int13.h
18874	INT13_EXTENSION_EDD	0x04	int13.h
18875	INT13_EXTENSION_VER_1_X	0x01	int13.h
18876	INT13_EXTENSION_VER_2_0	0x20	int13.h
18877	INT13_EXTENSION_VER_2_1	0x21	int13.h
18878	INT13_EXTENSION_VER_3_0	0x30	int13.h
18879	virt_to_bus	virt_to_phys	io.h
18880	bus_to_virt	phys_to_virt	io.h
18881	__SLOW_DOWN_IO	__asm__ __volatile__("jmp 1f\n1:\tjmp 1f\n1:")	io.h
18882	__SLOW_DOWN_IO	__asm__ __volatile__("outb %al,$0x80")	io.h
18883	SLOW_DOWN_IO	{ __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; }	io.h
18884	SLOW_DOWN_IO	__SLOW_DOWN_IO	io.h
18885	code32	code16gcc	kir.h
18886	rm_cs	( _rm_cs() )	libkir.h
18887	rm_ds	( _rm_ds() )	libkir.h
18888	copy_to_real	copy_to_real_libkir	libkir.h
18889	copy_from_real	copy_from_real_libkir	libkir.h
18890	put_real	put_real_kir	libkir.h
18891	get_real	get_real_kir	libkir.h
18892	rm_cs	__use_data16 ( rm_cs )	librm.h
18893	rm_ds	__use_text16 ( rm_ds )	librm.h
18894	copy_to_real	copy_to_real_librm	librm.h
18895	copy_from_real	copy_from_real_librm	librm.h
18896	put_real	put_real_librm	librm.h
18897	get_real	get_real_librm	librm.h
18898	LIMITS_H	1	limits.h
18899	CHAR_BIT	8	limits.h
18900	SCHAR_MIN	(-128)	limits.h
18901	SCHAR_MAX	127	limits.h
18902	UCHAR_MAX	255	limits.h
18903	CHAR_MIN	SCHAR_MIN	limits.h
18904	CHAR_MAX	SCHAR_MAX	limits.h
18905	SHRT_MIN	(-32768)	limits.h
18906	SHRT_MAX	32767	limits.h
18907	USHRT_MAX	65535	limits.h
18908	INT_MIN	(-INT_MAX - 1)	limits.h
18909	INT_MAX	2147483647	limits.h
18910	UINT_MAX	4294967295U	limits.h
18911	INT_MAX	2147483647	limits.h
18912	INT_MIN	(-INT_MAX - 1)	limits.h
18913	UINT_MAX	4294967295U	limits.h
18914	LONG_MAX	2147483647	limits.h
18915	LONG_MIN	(-LONG_MAX - 1L)	limits.h
18916	ULONG_MAX	4294967295UL	limits.h
18917	LLONG_MAX	9223372036854775807LL	limits.h
18918	LLONG_MIN	(-LONG_MAX - 1LL)	limits.h
18919	ULLONG_MAX	18446744073709551615ULL	limits.h
18920	MULTIBOOT_HEADER_MAGIC	0x1BADB002	multiboot.h
18921	MB_FLAG_PGALIGN	0x00000001	multiboot.h
18922	MB_FLAG_MEMMAP	0x00000002	multiboot.h
18923	MB_FLAG_VIDMODE	0x00000004	multiboot.h
18924	MB_FLAG_RAW	0x00010000	multiboot.h
18925	MULTIBOOT_BOOTLOADER_MAGIC	0x2BADB002	multiboot.h
18926	MBI_FLAG_MEM	0x00000001	multiboot.h
18927	MBI_FLAG_BOOTDEV	0x00000002	multiboot.h
18928	MBI_FLAG_CMDLINE	0x00000004	multiboot.h
18929	MBI_FLAG_MODS	0x00000008	multiboot.h
18930	MBI_FLAG_AOUT	0x00000010	multiboot.h
18931	MBI_FLAG_ELF	0x00000020	multiboot.h
18932	MBI_FLAG_MMAP	0x00000040	multiboot.h
18933	MBI_FLAG_DRIVES	0x00000080	multiboot.h
18934	MBI_FLAG_CFGTBL	0x00000100	multiboot.h
18935	MBI_FLAG_LOADER	0x00000200	multiboot.h
18936	MBI_FLAG_APM	0x00000400	multiboot.h
18937	MBI_FLAG_VBE	0x00000800	multiboot.h
18938	MBMEM_RAM	1	multiboot.h
18939	PCIBIOS_INSTALLATION_CHECK	0xb1010000	pcibios.h
18940	PCIBIOS_READ_CONFIG_BYTE	0xb1080000	pcibios.h
18941	PCIBIOS_READ_CONFIG_WORD	0xb1090000	pcibios.h
18942	PCIBIOS_READ_CONFIG_DWORD	0xb10a0000	pcibios.h
18943	PCIBIOS_WRITE_CONFIG_BYTE	0xb10b0000	pcibios.h
18944	PCIBIOS_WRITE_CONFIG_WORD	0xb10c0000	pcibios.h
18945	PCIBIOS_WRITE_CONFIG_DWORD	0xb10d0000	pcibios.h
18946	PCIDIRECT_CONFIG_ADDRESS	0xcf8	pcidirect.h
18947	PCIDIRECT_CONFIG_DATA	0xcfc	pcidirect.h
18948	pci_max_bus	pcidirect_max_bus	pci_io.h
18949	pci_read_config_byte	pcidirect_read_config_byte	pci_io.h
18950	pci_read_config_word	pcidirect_read_config_word	pci_io.h
18951	pci_read_config_dword	pcidirect_read_config_dword	pci_io.h
18952	pci_write_config_byte	pcidirect_write_config_byte	pci_io.h
18953	pci_write_config_word	pcidirect_write_config_word	pci_io.h
18954	pci_write_config_dword	pcidirect_write_config_dword	pci_io.h
18955	pci_max_bus	pcibios_max_bus	pci_io.h
18956	pci_read_config_byte	pcibios_read_config_byte	pci_io.h
18957	pci_read_config_word	pcibios_read_config_word	pci_io.h
18958	pci_read_config_dword	pcibios_read_config_dword	pci_io.h
18959	pci_write_config_byte	pcibios_write_config_byte	pci_io.h
18960	pci_write_config_word	pcibios_write_config_word	pci_io.h
18961	pci_write_config_dword	pcibios_write_config_dword	pci_io.h
18962	IRQ_PIC_CUTOFF	8	pic8259.h
18963	PIC1_ICW1	0x20	pic8259.h
18964	PIC1_OCW2	0x20	pic8259.h
18965	PIC1_OCW3	0x20	pic8259.h
18966	PIC1_ICR	0x20	pic8259.h
18967	PIC1_IRR	0x20	pic8259.h
18968	PIC1_ISR	0x20	pic8259.h
18969	PIC1_ICW2	0x21	pic8259.h
18970	PIC1_ICW3	0x21	pic8259.h
18971	PIC1_ICW4	0x21	pic8259.h
18972	PIC1_IMR	0x21	pic8259.h
18973	PIC2_ICW1	0xa0	pic8259.h
18974	PIC2_OCW2	0xa0	pic8259.h
18975	PIC2_OCW3	0xa0	pic8259.h
18976	PIC2_ICR	0xa0	pic8259.h
18977	PIC2_IRR	0xa0	pic8259.h
18978	PIC2_ISR	0xa0	pic8259.h
18979	PIC2_ICW2	0xa1	pic8259.h
18980	PIC2_ICW3	0xa1	pic8259.h
18981	PIC2_ICW4	0xa1	pic8259.h
18982	PIC2_IMR	0xa1	pic8259.h
18983	OCW3_ID	0x08	pic8259.h
18984	OCW3_READ_IRR	0x03	pic8259.h
18985	OCW3_READ_ISR	0x02	pic8259.h
18986	ICR_EOI_NON_SPECIFIC	0x20	pic8259.h
18987	ICR_EOI_NOP	0x40	pic8259.h
18988	ICR_EOI_SPECIFIC	0x60	pic8259.h
18989	ICR_EOI_SET_PRIORITY	0xc0	pic8259.h
18990	CHAINED_IRQ	2	pic8259.h
18991	IRQ_MAX	15	pic8259.h
18992	IRQ_NONE	-1U	pic8259.h
18993	BIOS_SEG	0xf000	pnpbios.h
18994	PXE_LOAD_SEGMENT	0	pxe_call.h
18995	PXE_LOAD_OFFSET	0x7c00	pxe_call.h
18996	PXE_LOAD_PHYS	( ( PXE_LOAD_SEGMENT << 4 ) + PXE_LOAD_OFFSET )	pxe_call.h
18997	ppxe	__use_text16 ( ppxe )	pxe_call.h
18998	pxenv	__use_text16 ( pxenv )	pxe_call.h
18999	CF	( 1 << 0 )	registers.h
19000	PF	( 1 << 2 )	registers.h
19001	AF	( 1 << 4 )	registers.h
19002	ZF	( 1 << 6 )	registers.h
19003	SF	( 1 << 7 )	registers.h
19004	OF	( 1 << 11 )	registers.h
19005	JBLEN	6	setjmp.h
19006	SMBIOS_TYPE_SYSTEM_INFORMATION	1	smbios.h
19007	UNDI_NO_PCI_BUSDEVFN	0xffff	undi.h
19008	UNDI_NO_ISAPNP_CSN	0xffff	undi.h
19009	UNDI_NO_ISAPNP_READ_PORT	0xffff	undi.h
19010	UNDI_FL_STARTED	0x0001	undi.h
19011	preloaded_undi	__use_data16 ( preloaded_undi )	undipreload.h
19012	VGA_H_INCL	1	vga.h
19013	u8	unsigned char	vga.h
19014	u16	unsigned short	vga.h
19015	u32	unsigned int	vga.h
19016	__u32	u32	vga.h
19017	VERROR	-1	vga.h
19018	CHAR_HEIGHT	16	vga.h
19019	LINES	25	vga.h
19020	COLS	80	vga.h
19021	SYNC_HOR_HIGH_ACT	1	vga.h	horizontal sync high active
19022	SYNC_VERT_HIGH_ACT	2	vga.h	vertical sync high active
19023	SYNC_EXT	4	vga.h	external sync
19024	SYNC_COMP_HIGH_ACT	8	vga.h	composite sync high active
19025	SYNC_BROADCAST	16	vga.h	broadcast video timings
19026	SYNC_ON_GREEN	32	vga.h	sync on green
19027	VMODE_NONINTERLACED	0	vga.h	non interlaced
19028	VMODE_INTERLACED	1	vga.h	interlaced
19029	VMODE_DOUBLE	2	vga.h	double scan
19030	VMODE_MASK	255	vga.h
19031	VMODE_YWRAP	256	vga.h	ywrap instead of panning
19032	VMODE_SMOOTH_XPAN	512	vga.h	smooth xpan possible (internally used)
19033	VMODE_CONUPDATE	512	vga.h	don't update x/yoffset
19034	CRT_DC	0x3D5	vga.h	CRT Controller Data Register - color emulation
19035	CRT_DM	0x3B5	vga.h	CRT Controller Data Register - mono emulation
19036	ATT_R	0x3C1	vga.h	Attribute Controller Data Read Register
19037	GRA_D	0x3CF	vga.h	Graphics Controller Data Register
19038	SEQ_D	0x3C5	vga.h	Sequencer Data Register
19039	MIS_R	0x3CC	vga.h	Misc Output Read Register
19040	MIS_W	0x3C2	vga.h	Misc Output Write Register
19041	IS1_RC	0x3DA	vga.h	Input Status Register 1 - color emulation
19042	IS1_RM	0x3BA	vga.h	Input Status Register 1 - mono emulation
19043	PEL_D	0x3C9	vga.h	PEL Data Register
19044	PEL_MSK	0x3C6	vga.h	PEL mask register
19045	GRA_E0	0x3CC	vga.h	Graphics enable processor 0
19046	GRA_E1	0x3CA	vga.h	Graphics enable processor 1
19047	CRT_IC	0x3D4	vga.h	CRT Controller Index - color emulation
19048	CRT_IM	0x3B4	vga.h	CRT Controller Index - mono emulation
19049	ATT_IW	0x3C0	vga.h	Attribute Controller Index & Data Write Register
19050	GRA_I	0x3CE	vga.h	Graphics Controller Index
19051	SEQ_I	0x3C4	vga.h	Sequencer Index
19052	PEL_IW	0x3C8	vga.h	PEL Write Index
19053	PEL_IR	0x3C7	vga.h	PEL Read Index
19054	CRTC_C	25	vga.h	25 CRT Controller Registers sequentially set
19055	ATT_C	21	vga.h	21 Attribute Controller Registers
19056	GRA_C	9	vga.h	9 Graphics Controller Registers
19057	SEQ_C	5	vga.h	5 Sequencer Registers
19058	MIS_C	1	vga.h	1 Misc Output Register
19059	CRTC_H_TOTAL	0	vga.h
19060	CRTC_H_DISP	1	vga.h
19061	CRTC_H_BLANK_START	2	vga.h
19062	CRTC_H_BLANK_END	3	vga.h
19063	CRTC_H_SYNC_START	4	vga.h
19064	CRTC_H_SYNC_END	5	vga.h
19065	CRTC_V_TOTAL	6	vga.h
19066	CRTC_OVERFLOW	7	vga.h
19067	CRTC_PRESET_ROW	8	vga.h
19068	CRTC_MAX_SCAN	9	vga.h
19069	CRTC_CURSOR_START	0x0A	vga.h
19070	CRTC_CURSOR_END	0x0B	vga.h
19071	CRTC_START_HI	0x0C	vga.h
19072	CRTC_START_LO	0x0D	vga.h
19073	CRTC_CURSOR_HI	0x0E	vga.h
19074	CRTC_CURSOR_LO	0x0F	vga.h
19075	CRTC_V_SYNC_START	0x10	vga.h
19076	CRTC_V_SYNC_END	0x11	vga.h
19077	CRTC_V_DISP_END	0x12	vga.h
19078	CRTC_OFFSET	0x13	vga.h
19079	CRTC_UNDERLINE	0x14	vga.h
19080	CRTC_V_BLANK_START	0x15	vga.h
19081	CRTC_V_BLANK_END	0x16	vga.h
19082	CRTC_MODE	0x17	vga.h
19083	CRTC_LINE_COMPARE	0x18	vga.h
19084	ATC_MODE	0x10	vga.h
19085	ATC_OVERSCAN	0x11	vga.h
19086	ATC_PLANE_ENABLE	0x12	vga.h
19087	ATC_PEL	0x13	vga.h
19088	ATC_COLOR_PAGE	0x14	vga.h
19089	SEQ_CLOCK_MODE	0x01	vga.h
19090	SEQ_PLANE_WRITE	0x02	vga.h
19091	SEQ_CHARACTER_MAP	0x03	vga.h
19092	SEQ_MEMORY_MODE	0x04	vga.h
19093	GDC_SR_VALUE	0x00	vga.h
19094	GDC_SR_ENABLE	0x01	vga.h
19095	GDC_COMPARE_VALUE	0x02	vga.h
19096	GDC_DATA_ROTATE	0x03	vga.h
19097	GDC_PLANE_READ	0x04	vga.h
19098	GDC_MODE	0x05	vga.h
19099	GDC_MISC	0x06	vga.h
19100	GDC_COMPARE_MASK	0x07	vga.h
19101	GDC_BIT_MASK	0x08	vga.h
19102	VGA_ATTR_CLR_RED	0x4	vga.h
19103	VGA_ATTR_CLR_GRN	0x2	vga.h
19104	VGA_ATTR_CLR_BLU	0x1	vga.h
19105	VGA_ATTR_CLR_YEL	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN)	vga.h
19106	VGA_ATTR_CLR_CYN	(VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
19107	VGA_ATTR_CLR_MAG	(VGA_ATTR_CLR_BLU \| VGA_ATTR_CLR_RED)	vga.h
19108	VGA_ATTR_CLR_BLK	0	vga.h
19109	VGA_ATTR_CLR_WHT	(VGA_ATTR_CLR_RED \| VGA_ATTR_CLR_GRN \| VGA_ATTR_CLR_BLU)	vga.h
19110	VGA_ATTR_BNK	0x80	vga.h
19111	VGA_ATTR_ITN	0x08	vga.h
19112	VIRTUAL_CS	0x08	virtaddr.h
19113	VIRTUAL_DS	0x10	virtaddr.h
19114	PHYSICAL_CS	0x18	virtaddr.h
19115	PHYSICAL_DS	0x20	virtaddr.h
19116	REAL_CS	0x28	virtaddr.h
19117	REAL_DS	0x30	virtaddr.h
19118	LONG_CS	0x38	virtaddr.h
19119	LONG_DS	0x40	virtaddr.h
19120	X86_FEATURE_FPU	0	cpu.h	Onboard FPU
19121	X86_FEATURE_VME	1	cpu.h	Virtual Mode Extensions
19122	X86_FEATURE_DE	2	cpu.h	Debugging Extensions
19123	X86_FEATURE_PSE	3	cpu.h	Page Size Extensions
19124	X86_FEATURE_TSC	4	cpu.h	Time Stamp Counter
19125	X86_FEATURE_MSR	5	cpu.h	Model-Specific Registers, RDMSR, WRMSR
19126	X86_FEATURE_PAE	6	cpu.h	Physical Address Extensions
19127	X86_FEATURE_MCE	7	cpu.h	Machine Check Architecture
19128	X86_FEATURE_CX8	8	cpu.h	CMPXCHG8 instruction
19129	X86_FEATURE_APIC	9	cpu.h	Onboard APIC
19130	X86_FEATURE_SEP	11	cpu.h	SYSENTER/SYSEXIT
19131	X86_FEATURE_MTRR	12	cpu.h	Memory Type Range Registers
19132	X86_FEATURE_PGE	13	cpu.h	Page Global Enable
19133	X86_FEATURE_MCA	14	cpu.h	Machine Check Architecture
19134	X86_FEATURE_CMOV	15	cpu.h	CMOV instruction (FCMOVCC and FCOMI too if FPU present)
19135	X86_FEATURE_PAT	16	cpu.h	Page Attribute Table
19136	X86_FEATURE_PSE36	17	cpu.h	36-bit PSEs
19137	X86_FEATURE_PN	18	cpu.h	Processor serial number
19138	X86_FEATURE_CLFLSH	19	cpu.h	Supports the CLFLUSH instruction
19139	X86_FEATURE_DTES	21	cpu.h	Debug Trace Store
19140	X86_FEATURE_ACPI	22	cpu.h	ACPI via MSR
19141	X86_FEATURE_MMX	23	cpu.h	Multimedia Extensions
19142	X86_FEATURE_FXSR	24	cpu.h	FXSAVE and FXRSTOR instructions (fast save and restore
19143	X86_FEATURE_XMM	25	cpu.h	Streaming SIMD Extensions
19144	X86_FEATURE_XMM2	26	cpu.h	Streaming SIMD Extensions-2
19145	X86_FEATURE_SELFSNOOP	27	cpu.h	CPU self snoop
19146	X86_FEATURE_HT	28	cpu.h	Hyper-Threading
19147	X86_FEATURE_ACC	29	cpu.h	Automatic clock control
19148	X86_FEATURE_IA64	30	cpu.h	IA-64 processor
19149	X86_FEATURE_SYSCALL	11	cpu.h	SYSCALL/SYSRET
19150	X86_FEATURE_MMXEXT	22	cpu.h	AMD MMX extensions
19151	X86_FEATURE_LM	29	cpu.h	Long Mode (x86-64)
19152	X86_FEATURE_3DNOWEXT	30	cpu.h	AMD 3DNow! extensions
19153	X86_FEATURE_3DNOW	31	cpu.h	3DNow!
19154	X86_EFLAGS_CF	0x00000001	cpu.h	Carry Flag
19155	X86_EFLAGS_PF	0x00000004	cpu.h	Parity Flag
19156	X86_EFLAGS_AF	0x00000010	cpu.h	Auxillary carry Flag
19157	X86_EFLAGS_ZF	0x00000040	cpu.h	Zero Flag
19158	X86_EFLAGS_SF	0x00000080	cpu.h	Sign Flag
19159	X86_EFLAGS_TF	0x00000100	cpu.h	Trap Flag
19160	X86_EFLAGS_IF	0x00000200	cpu.h	Interrupt Flag
19161	X86_EFLAGS_DF	0x00000400	cpu.h	Direction Flag
19162	X86_EFLAGS_OF	0x00000800	cpu.h	Overflow Flag
19163	X86_EFLAGS_IOPL	0x00003000	cpu.h	IOPL mask
19164	X86_EFLAGS_NT	0x00004000	cpu.h	Nested Task
19165	X86_EFLAGS_RF	0x00010000	cpu.h	Resume Flag
19166	X86_EFLAGS_VM	0x00020000	cpu.h	Virtual Mode
19167	X86_EFLAGS_AC	0x00040000	cpu.h	Alignment Check
19168	X86_EFLAGS_VIF	0x00080000	cpu.h	Virtual Interrupt Flag
19169	X86_EFLAGS_VIP	0x00100000	cpu.h	Virtual Interrupt Pending
19170	X86_EFLAGS_ID	0x00200000	cpu.h	CPUID detection flag
19171	EM_CURRENT_64	EM_X86_64	elf.h
19172	EM_CURRENT_64_PRESENT	( \ CPU_FEATURE_P(cpu_info.x86_capability, LM) && \ CPU_FEATURE_P(cpu_info.x86_capability, PAE) && \ CPU_FEATURE_P(cpu_info.x86	elf.h
19173	__unused_i386	__unused	elf.h
19174	EM_CURRENT	EM_386	elf.h
19175	ELFDATA_CURRENT	ELFDATA2LSB	elf.h
19176	SHT_SYMTAB	2	elf.h	symbol table section
19177	SHT_STRTAB	3	elf.h	string table section
19178	MODINFO_END	0x0000	elf.h	End of list
19179	MODINFO_NAME	0x0001	elf.h	Name of module (string)
19180	MODINFO_TYPE	0x0002	elf.h	Type of module (string)
19181	MODINFO_METADATA	0x8000	elf.h	Module-specfic
19182	MODINFOMD_SSYM	0x0003	elf.h	start of symbols
19183	MODINFOMD_ESYM	0x0004	elf.h	end of symbols
19184	ARCH_ELF_CLASS	ELFCLASS32	elf_x.h
19185	ARCH_ELF_DATA	ELFDATA2LSB	elf_x.h
19186	ELTORITO_PLATFORM	ELTORITO_PLATFORM_X86	eltorito.h
19187	__BYTE_ORDER	__LITTLE_ENDIAN	endian.h
19188	ERRFILE_umalloc	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00000000 )	errfile.h
19189	ERRFILE_memmap	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00010000 )	errfile.h
19190	ERRFILE_pnpbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00020000 )	errfile.h
19191	ERRFILE_smbios	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00030000 )	errfile.h
19192	ERRFILE_biosint	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00040000 )	errfile.h
19193	ERRFILE_int13	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00050000 )	errfile.h
19194	ERRFILE_smbios_settings	( ERRFILE_ARCH \| ERRFILE_CORE \| 0x00060000 )	errfile.h
19195	ERRFILE_bootsector	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00000000 )	errfile.h
19196	ERRFILE_bzimage	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00010000 )	errfile.h
19197	ERRFILE_eltorito	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00020000 )	errfile.h
19198	ERRFILE_multiboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00030000 )	errfile.h
19199	ERRFILE_nbi	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00040000 )	errfile.h
19200	ERRFILE_pxe_image	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00050000 )	errfile.h
19201	ERRFILE_elfboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00060000 )	errfile.h
19202	ERRFILE_comboot	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00070000 )	errfile.h
19203	ERRFILE_com32	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00080000 )	errfile.h
19204	ERRFILE_comboot_resolv	( ERRFILE_ARCH \| ERRFILE_IMAGE \| 0x00090000 )	errfile.h
19205	ERRFILE_undi	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00000000 )	errfile.h
19206	ERRFILE_undiload	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00010000 )	errfile.h
19207	ERRFILE_undinet	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00020000 )	errfile.h
19208	ERRFILE_undionly	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00030000 )	errfile.h
19209	ERRFILE_undirom	( ERRFILE_ARCH \| ERRFILE_NET \| 0x00040000 )	errfile.h
19210	ERRFILE_timer_rdtsc	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00000000 )	errfile.h
19211	ERRFILE_timer_bios	( ERRFILE_ARCH \| ERRFILE_DRIVER \| 0x00010000 )	errfile.h
19212	int13_vector	__use_text16 ( int13_vector )	int13.c
19213	pxe_int_1a_vector	__use_text16 ( pxe_int_1a_vector )	pxe_call.c
19214	com32_regs	__use_data16 ( com32_regs )	com32_call.c
19215	com32_int_vector	__use_data16 ( com32_int_vector )	com32_call.c
19216	com32_farcall_proc	__use_data16 ( com32_farcall_proc )	com32_call.c
19217	syslinux_version	__use_data16 ( syslinux_version )	comboot_call.c
19218	syslinux_copyright	__use_data16 ( syslinux_copyright )	comboot_call.c
19219	syslinux_configuration_file	__use_data16 ( syslinux_configuration_file )	comboot_call.c
19220	comboot_feature_flags	__use_data16 ( comboot_feature_flags )	comboot_call.c
19221	int20_vector	__use_text16 ( int20_vector )	comboot_call.c
19222	int21_vector	__use_text16 ( int21_vector )	comboot_call.c
19223	int22_vector	__use_text16 ( int22_vector )	comboot_call.c
19224	abftab	__use_data16 ( abftab )	abft.c
19225	CHAR_256	0	btext.c
19226	cmapsz	(16*256)	btext.c
19227	cmapsz	(16*96)	btext.c
19228	BUILD_SERIAL_STR	" #" XSTR(BUILD_SERIAL_NUM)	config.c
19229	BUILD_SERIAL_STR	""	config.c
19230	BUILD_ID_STR	" " BUILD_ID	config.c
19231	BUILD_ID_STR	""	config.c
19232	BUILD_STRING	" [build" BUILD_ID_STR BUILD_SERIAL_STR "]"	config.c
19233	BUILD_STRING	""	config.c
19234	CONSOLE_FIRMWARE	1	config.c
19235	CONSOLE_SERIAL	1	config.c
19236	GUARD_SYMBOL	( ( 'M' << 24 ) \| ( 'I' << 16 ) \| ( 'N' << 8 ) \| 'E' )	debug.c
19237	NUM_AUTO_COLOURS	6	debug.c
19238	GETKEY_TIMEOUT	( TICKS_PER_SEC / 4 )	getkey.c
19239	IS_VADEM	0x0001	i82365.c
19240	IS_CIRRUS	0x0002	i82365.c
19241	IS_TI	0x0004	i82365.c
19242	IS_O2MICRO	0x0008	i82365.c
19243	IS_VIA	0x0010	i82365.c
19244	IS_TOPIC	0x0020	i82365.c
19245	IS_RICOH	0x0040	i82365.c
19246	IS_UNKNOWN	0x0400	i82365.c
19247	IS_VG_PWR	0x0800	i82365.c
19248	IS_DF_PWR	0x1000	i82365.c
19249	IS_PCI	0x2000	i82365.c
19250	IS_ALIVE	0x8000	i82365.c
19251	ibftab	__use_data16 ( ibftab )	ibft.c
19252	NORMAL	"\033[0m"	main.c
19253	BOLD	"\033[1m"	main.c
19254	CYAN	"\033[36m"	main.c
19255	MIN_MEMBLOCK_SIZE	( ( size_t ) ( 1 << ( fls ( sizeof ( struct memory_block ) - 1 ) ) ) )	malloc.c
19256	NOWHERE	( ( void * ) ~( ( intptr_t ) 0 ) )	malloc.c
19257	HEAP_SIZE	( 128 * 1024 )	malloc.c
19258	CODE_STATUS	"alpha"	pcmcia.c
19259	CODE_VERSION	"0.1.3"	pcmcia.c
19260	NUM_DRIVERS	(sizeof(driver)/(sizeof(struct driver_interact_t)))	pcmcia.c
19261	SHIFT	1	pc_kbd.c
19262	CONTROL	2	pc_kbd.c
19263	CAPS	4	pc_kbd.c
19264	LACP_DEBUG	0	proto_eth_slow.c
19265	SLOW_DST_MAC	"\x01\x80\xc2\x00\x00\x02"	proto_eth_slow.c
19266	SLOW_SUBTYPE_LACP	1	proto_eth_slow.c
19267	SLOW_SUBTYPE_MARKER	2	proto_eth_slow.c
19268	LACP_CMP_LEN	(2 + 6 + 2 + 2 + 2)	proto_eth_slow.c
19269	LACP_CP_LEN	(2 + 6 + 2 + 2 + 2 + 1)	proto_eth_slow.c
19270	FAST_PERIODIC_TIME	(1*TICKS_PER_SEC)	proto_eth_slow.c
19271	SLOW_PERIODIC_TIME	(30*TICKS_PER_SEC)	proto_eth_slow.c
19272	SHORT_TIMEOUT_TIME	(3*FAST_PERIODIC_TIME)	proto_eth_slow.c
19273	LONG_TIMEOUT_TIME	(3*SLOW_PERIODIC_TIME)	proto_eth_slow.c
19274	CHURN_DETECTION_TIME	(60*TICKS_PER_SEC)	proto_eth_slow.c
19275	AGGREGATE_WAIT_TIME	(2*TICKS_PER_SEC)	proto_eth_slow.c
19276	LACP_ACTIVITY	(1 << 0)	proto_eth_slow.c
19277	LACP_TIMEOUT	(1 << 1)	proto_eth_slow.c
19278	LACP_AGGREGATION	(1 << 2)	proto_eth_slow.c
19279	LACP_SYNCHRONIZATION	(1 << 3)	proto_eth_slow.c
19280	LACP_COLLECTING	(1 << 4)	proto_eth_slow.c
19281	LACP_DISTRIBUTING	(1 << 5)	proto_eth_slow.c
19282	LACP_DEFAULTED	(1 << 6)	proto_eth_slow.c
19283	LACP_EXPIRED	(1 << 7)	proto_eth_slow.c
19284	UNSELECTED	0	proto_eth_slow.c
19285	STANDBY	1	proto_eth_slow.c
19286	SELECTED	2	proto_eth_slow.c
19287	LACP_NTT_MASK	(LACP_ACTIVITY \| LACP_TIMEOUT \| \ LACP_SYNCHRONIZATION \| LACP_AGGREGATION)	proto_eth_slow.c
19288	COMCONSOLE	0x3f8	serial.c
19289	COMSPEED	9600	serial.c
19290	COMDATA	8	serial.c
19291	COMPARITY	0	serial.c
19292	COMSTOP	1	serial.c
19293	UART_BASE	( COMCONSOLE )	serial.c
19294	UART_BAUD	( COMSPEED )	serial.c
19295	COMBRD	(115200/UART_BAUD)	serial.c
19296	UART_LCS	( ( ( (COMDATA) - 5 ) << 0 ) \| \ ( ( (COMPARITY) ) << 3 ) \| \ ( ( (COMSTOP) - 1 ) << 2 ) )	serial.c
19297	UART_RBR	0x00	serial.c
19298	UART_TBR	0x00	serial.c
19299	UART_IER	0x01	serial.c
19300	UART_IIR	0x02	serial.c
19301	UART_FCR	0x02	serial.c
19302	UART_LCR	0x03	serial.c
19303	UART_MCR	0x04	serial.c
19304	UART_DLL	0x00	serial.c
19305	UART_DLM	0x01	serial.c
19306	UART_LSR	0x05	serial.c
19307	UART_LSR_TEMPT	0x40	serial.c	Transmitter empty
19308	UART_LSR_THRE	0x20	serial.c	Transmit-hold-register empty
19309	UART_LSR_BI	0x10	serial.c	Break interrupt indicator
19310	UART_LSR_FE	0x08	serial.c	Frame error indicator
19311	UART_LSR_PE	0x04	serial.c	Parity error indicator
19312	UART_LSR_OE	0x02	serial.c	Overrun error indicator
19313	UART_LSR_DR	0x01	serial.c	Receiver data ready
19314	UART_MSR	0x06	serial.c
19315	UART_SCR	0x07	serial.c
19316	settings_root	simple_settings_root.settings	settings.c
19317	CHAR_LEN	0	vsprintf.c	*< "hh" length modifier
19318	SHORT_LEN	1	vsprintf.c	*< "h" length modifier
19319	INT_LEN	2	vsprintf.c	*< no length modifier
19320	LONG_LEN	3	vsprintf.c	*< "l" length modifier
19321	LONGLONG_LEN	4	vsprintf.c	*< "ll" length modifier
19322	SIZE_T_LEN	5	vsprintf.c	*< "z" length modifier
19323	LCASE	0x20	vsprintf.c
19324	ALT_FORM	0x02	vsprintf.c
19325	__md5step	__attribute__ (( regparm ( 3 ) ))	md5.c
19326	mt	0x80808080	aes.c
19327	ml	0x7f7f7f7f	aes.c
19328	mh	0xfefefefe	aes.c
19329	mm	0x1b1b1b1b	aes.c
19330	SIG_OID_PREFIX_SIZE	8	axtls_asn1.c
19331	SIG_TYPE_MD2	0x02	axtls_asn1.c
19332	SIG_TYPE_MD5	0x04	axtls_asn1.c
19333	SIG_TYPE_SHA1	0x05	axtls_asn1.c
19334	BIGINT_M_OFFSET	0	bigint_impl.h	*< Normal modulo offset.
19335	BIGINT_P_OFFSET	1	bigint_impl.h	*< p modulo offset.
19336	BIGINT_Q_OFFSET	2	bigint_impl.h	*< q module offset.
19337	BIGINT_NUM_MODS	3	bigint_impl.h	*< The number of modulus constants used.
19338	BIGINT_NUM_MODS	1	bigint_impl.h
19339	COMP_RADIX	4294967296i64	bigint_impl.h
19340	COMP_BIG_MSB	0x8000000000000000i64	bigint_impl.h
19341	COMP_RADIX	4294967296ULL	bigint_impl.h	*< Max component + 1
19342	COMP_BIG_MSB	0x8000000000000000ULL	bigint_impl.h	*< (Max dbl comp + 1)/ 2
19343	COMP_BIT_SIZE	32	bigint_impl.h	*< Number of bits in a component.
19344	COMP_BYTE_SIZE	4	bigint_impl.h	*< Number of bytes in a component.
19345	COMP_NUM_NIBBLES	8	bigint_impl.h	*< Used For diagnostics only.
19346	PERMANENT	0x7FFF55AA	bigint_impl.h	*< A magic number for permanents.
19347	V1	v->comps[v->size-1]	bigint_impl.h	*< v1 for division
19348	V2	v->comps[v->size-2]	bigint_impl.h	*< v2 for division
19349	CONFIG_SSL_CERT_VERIFICATION	1	os_port.h
19350	CONFIG_SSL_MAX_CERTS	1	os_port.h
19351	CONFIG_X509_MAX_CA_CERTS	1	os_port.h
19352	CONFIG_SSL_EXPIRY_TIME	24	os_port.h
19353	CONFIG_SSL_ENABLE_CLIENT	1	os_port.h
19354	CONFIG_BIGINT_CLASSICAL	1	os_port.h
19355	SELECT_SLAVE	0	spi_bit.c
19356	DESELECT_SLAVE	SPI_MODE_SSPOL	spi_bit.c
19357	ISA_EXTRA_PROBE_ADDR_COUNT	( sizeof ( isa_extra_probe_addrs ) / sizeof ( isa_extra_probe_addrs[0] ) )	isa.c
19358	ISAPNP_CARD_ID_FMT	"ID %04x:%04x (\"%s\") serial %lx"	isapnp.c
19359	ISAPNP_DEV_ID_FMT	"ID %04x:%04x (\"%s\")"	isapnp.c
19360	ARBEL_NUM_PORTS	2	arbel.h
19361	ARBEL_PORT_BASE	1	arbel.h
19362	ARBEL_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	arbel.h
19363	ARBEL_PCI_CONFIG_BAR_SIZE	0x100000	arbel.h
19364	ARBEL_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	arbel.h
19365	ARBEL_PCI_UAR_IDX	1	arbel.h
19366	ARBEL_PCI_UAR_SIZE	0x1000	arbel.h
19367	ARBEL_UAR_RES_NONE	0x00	arbel.h
19368	ARBEL_UAR_RES_CQ_CI	0x01	arbel.h
19369	ARBEL_UAR_RES_CQ_ARM	0x02	arbel.h
19370	ARBEL_UAR_RES_SQ	0x03	arbel.h
19371	ARBEL_UAR_RES_RQ	0x04	arbel.h
19372	ARBEL_UAR_RES_GROUP_SEP	0x07	arbel.h
19373	ARBEL_OPCODE_SEND	0x0a	arbel.h
19374	ARBEL_OPCODE_RECV_ERROR	0xfe	arbel.h
19375	ARBEL_OPCODE_SEND_ERROR	0xff	arbel.h
19376	ARBEL_HCR_QUERY_DEV_LIM	0x0003	arbel.h
19377	ARBEL_HCR_QUERY_FW	0x0004	arbel.h
19378	ARBEL_HCR_INIT_HCA	0x0007	arbel.h
19379	ARBEL_HCR_CLOSE_HCA	0x0008	arbel.h
19380	ARBEL_HCR_INIT_IB	0x0009	arbel.h
19381	ARBEL_HCR_CLOSE_IB	0x000a	arbel.h
19382	ARBEL_HCR_SW2HW_MPT	0x000d	arbel.h
19383	ARBEL_HCR_MAP_EQ	0x0012	arbel.h
19384	ARBEL_HCR_SW2HW_EQ	0x0013	arbel.h
19385	ARBEL_HCR_HW2SW_EQ	0x0014	arbel.h
19386	ARBEL_HCR_SW2HW_CQ	0x0016	arbel.h
19387	ARBEL_HCR_HW2SW_CQ	0x0017	arbel.h
19388	ARBEL_HCR_RST2INIT_QPEE	0x0019	arbel.h
19389	ARBEL_HCR_INIT2RTR_QPEE	0x001a	arbel.h
19390	ARBEL_HCR_RTR2RTS_QPEE	0x001b	arbel.h
19391	ARBEL_HCR_RTS2RTS_QPEE	0x001c	arbel.h
19392	ARBEL_HCR_2RST_QPEE	0x0021	arbel.h
19393	ARBEL_HCR_MAD_IFC	0x0024	arbel.h
19394	ARBEL_HCR_READ_MGM	0x0025	arbel.h
19395	ARBEL_HCR_WRITE_MGM	0x0026	arbel.h
19396	ARBEL_HCR_MGID_HASH	0x0027	arbel.h
19397	ARBEL_HCR_RUN_FW	0x0ff6	arbel.h
19398	ARBEL_HCR_DISABLE_LAM	0x0ff7	arbel.h
19399	ARBEL_HCR_ENABLE_LAM	0x0ff8	arbel.h
19400	ARBEL_HCR_UNMAP_ICM	0x0ff9	arbel.h
19401	ARBEL_HCR_MAP_ICM	0x0ffa	arbel.h
19402	ARBEL_HCR_UNMAP_ICM_AUX	0x0ffb	arbel.h
19403	ARBEL_HCR_MAP_ICM_AUX	0x0ffc	arbel.h
19404	ARBEL_HCR_SET_ICM_SIZE	0x0ffd	arbel.h
19405	ARBEL_HCR_UNMAP_FA	0x0ffe	arbel.h
19406	ARBEL_HCR_MAP_FA	0x0fff	arbel.h
19407	ARBEL_ST_UD	0x03	arbel.h
19408	ARBEL_MTU_2048	0x04	arbel.h
19409	ARBEL_NO_EQ	64	arbel.h
19410	ARBEL_INVALID_LKEY	0x00000100UL	arbel.h
19411	ARBEL_PAGE_SIZE	4096	arbel.h
19412	ARBEL_DB_POST_SND_OFFSET	0x10	arbel.h
19413	ARBEL_QPEE_OPT_PARAM_QKEY	0x00000020UL	arbel.h
19414	ARBEL_MAP_EQ	( 0UL << 31 )	arbel.h
19415	ARBEL_UNMAP_EQ	( 1UL << 31 )	arbel.h
19416	ARBEL_EV_PORT_STATE_CHANGE	0x09	arbel.h
19417	ARBEL_MAX_GATHER	1	arbel.h
19418	ARBEL_MAX_SCATTER	1	arbel.h
19419	ARBEL_SEND_WQE_ALIGN	128	arbel.h
19420	ARBEL_RECV_WQE_ALIGN	64	arbel.h
19421	ARBEL_MAX_QPS	8	arbel.h
19422	ARBEL_QPN_BASE	0x550000	arbel.h
19423	ARBEL_MAX_CQS	8	arbel.h
19424	ARBEL_MAX_EQS	64	arbel.h
19425	ARBEL_NUM_EQES	4	arbel.h
19426	ARBEL_GLOBAL_PD	0x123456	arbel.h
19427	ARBEL_MKEY_PREFIX	0x77000000UL	arbel.h
19428	ARBEL_HCR_BASE	0x80680	arbel.h
19429	ARBEL_HCR_MAX_WAIT_MS	2000	arbel.h
19430	ARBEL_MBOX_ALIGN	4096	arbel.h
19431	ARBEL_MBOX_SIZE	512	arbel.h
19432	ARBEL_HCR_IN_MBOX	0x00001000UL	arbel.h
19433	ARBEL_HCR_OUT_MBOX	0x00002000UL	arbel.h
19434	ARBEL_MAX_DOORBELL_RECORDS	512	arbel.h
19435	ARBEL_GROUP_SEPARATOR_DOORBELL	( ARBEL_MAX_CQS + ARBEL_MAX_QPS )	arbel.h
19436	HERMON_NUM_PORTS	2	hermon.h
19437	HERMON_PORT_BASE	1	hermon.h
19438	HERMON_PCI_CONFIG_BAR	PCI_BASE_ADDRESS_0	hermon.h
19439	HERMON_PCI_CONFIG_BAR_SIZE	0x100000	hermon.h
19440	HERMON_PCI_UAR_BAR	PCI_BASE_ADDRESS_2	hermon.h
19441	HERMON_OPCODE_SEND	0x0a	hermon.h
19442	HERMON_OPCODE_RECV_ERROR	0xfe	hermon.h
19443	HERMON_OPCODE_SEND_ERROR	0xff	hermon.h
19444	HERMON_HCR_QUERY_DEV_CAP	0x0003	hermon.h
19445	HERMON_HCR_QUERY_FW	0x0004	hermon.h
19446	HERMON_HCR_INIT_HCA	0x0007	hermon.h
19447	HERMON_HCR_CLOSE_HCA	0x0008	hermon.h
19448	HERMON_HCR_INIT_PORT	0x0009	hermon.h
19449	HERMON_HCR_CLOSE_PORT	0x000a	hermon.h
19450	HERMON_HCR_SW2HW_MPT	0x000d	hermon.h
19451	HERMON_HCR_WRITE_MTT	0x0011	hermon.h
19452	HERMON_HCR_MAP_EQ	0x0012	hermon.h
19453	HERMON_HCR_SW2HW_EQ	0x0013	hermon.h
19454	HERMON_HCR_HW2SW_EQ	0x0014	hermon.h
19455	HERMON_HCR_QUERY_EQ	0x0015	hermon.h
19456	HERMON_HCR_SW2HW_CQ	0x0016	hermon.h
19457	HERMON_HCR_HW2SW_CQ	0x0017	hermon.h
19458	HERMON_HCR_RST2INIT_QP	0x0019	hermon.h
19459	HERMON_HCR_INIT2RTR_QP	0x001a	hermon.h
19460	HERMON_HCR_RTR2RTS_QP	0x001b	hermon.h
19461	HERMON_HCR_RTS2RTS_QP	0x001c	hermon.h
19462	HERMON_HCR_2RST_QP	0x0021	hermon.h
19463	HERMON_HCR_MAD_IFC	0x0024	hermon.h
19464	HERMON_HCR_READ_MCG	0x0025	hermon.h
19465	HERMON_HCR_WRITE_MCG	0x0026	hermon.h
19466	HERMON_HCR_MGID_HASH	0x0027	hermon.h
19467	HERMON_HCR_RUN_FW	0x0ff6	hermon.h
19468	HERMON_HCR_DISABLE_LAM	0x0ff7	hermon.h
19469	HERMON_HCR_ENABLE_LAM	0x0ff8	hermon.h
19470	HERMON_HCR_UNMAP_ICM	0x0ff9	hermon.h
19471	HERMON_HCR_MAP_ICM	0x0ffa	hermon.h
19472	HERMON_HCR_UNMAP_ICM_AUX	0x0ffb	hermon.h
19473	HERMON_HCR_MAP_ICM_AUX	0x0ffc	hermon.h
19474	HERMON_HCR_SET_ICM_SIZE	0x0ffd	hermon.h
19475	HERMON_HCR_UNMAP_FA	0x0ffe	hermon.h
19476	HERMON_HCR_MAP_FA	0x0fff	hermon.h
19477	HERMON_ST_UD	0x03	hermon.h
19478	HERMON_MTU_2048	0x04	hermon.h
19479	HERMON_INVALID_LKEY	0x00000100UL	hermon.h
19480	HERMON_PAGE_SIZE	4096	hermon.h
19481	HERMON_DB_POST_SND_OFFSET	0x14	hermon.h
19482	HERMON_QP_OPT_PARAM_QKEY	0x00000020UL	hermon.h
19483	HERMON_MAP_EQ	( 0UL << 31 )	hermon.h
19484	HERMON_UNMAP_EQ	( 1UL << 31 )	hermon.h
19485	HERMON_EV_PORT_STATE_CHANGE	0x09	hermon.h
19486	HERMON_MAX_GATHER	1	hermon.h
19487	HERMON_MAX_SCATTER	1	hermon.h
19488	HERMON_CMPT_MAX_ENTRIES	( 1 << 24 )	hermon.h
19489	HERMON_UAR_NON_EQ_PAGE	128	hermon.h
19490	HERMON_MAX_MTTS	64	hermon.h
19491	HERMON_SEND_WQE_ALIGN	128	hermon.h
19492	HERMON_RECV_WQE_ALIGN	16	hermon.h
19493	HERMON_MAX_QPS	8	hermon.h
19494	HERMON_QPN_BASE	0x550000	hermon.h
19495	HERMON_MAX_CQS	8	hermon.h
19496	HERMON_MAX_EQS	8	hermon.h
19497	HERMON_NUM_EQES	4	hermon.h
19498	HERMON_GLOBAL_PD	0x123456	hermon.h
19499	HERMON_MKEY_PREFIX	0x77000000UL	hermon.h
19500	HERMON_HCR_BASE	0x80680	hermon.h
19501	HERMON_HCR_MAX_WAIT_MS	2000	hermon.h
19502	HERMON_MBOX_ALIGN	4096	hermon.h
19503	HERMON_MBOX_SIZE	512	hermon.h
19504	HERMON_HCR_IN_MBOX	0x00001000UL	hermon.h
19505	HERMON_HCR_OUT_MBOX	0x00002000UL	hermon.h
19506	HZ	100	3c515.c
19507	CORKSCREW	1	3c515.c
19508	AUTOMEDIA	1	3c515.c
19509	TX_RING_SIZE	16	3c515.c
19510	RX_RING_SIZE	16	3c515.c
19511	PKT_BUF_SZ	1536	3c515.c	Size of each temporary Rx buffer.
19512	DRIVER_DEBUG	1	3c515.c
19513	CORKSCREW_ID	10	3c515.c
19514	EL3_CMD	0x0e	3c515.c
19515	EL3_STATUS	0x0e	3c515.c
19516	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c515.c
19517	XCVR_MAGIC	(0x5A00)	3c90x.c
19518	XMIT_RETRIES	250	3c90x.c
19519	INT_INTERRUPTLATCH	(1<<0)	3c90x.c
19520	INT_HOSTERROR	(1<<1)	3c90x.c
19521	INT_TXCOMPLETE	(1<<2)	3c90x.c
19522	INT_RXCOMPLETE	(1<<4)	3c90x.c
19523	INT_RXEARLY	(1<<5)	3c90x.c
19524	INT_INTREQUESTED	(1<<6)	3c90x.c
19525	INT_UPDATESTATS	(1<<7)	3c90x.c
19526	INT_LINKEVENT	(1<<8)	3c90x.c
19527	INT_DNCOMPLETE	(1<<9)	3c90x.c
19528	INT_UPCOMPLETE	(1<<10)	3c90x.c
19529	INT_CMDINPROGRESS	(1<<12)	3c90x.c
19530	INT_WINDOWNUMBER	(7<<13)	3c90x.c
19531	NUM_TX_SLOTS	2	amd8111e.c
19532	NUM_RX_SLOTS	4	amd8111e.c
19533	TX_SLOTS_MASK	1	amd8111e.c
19534	RX_SLOTS_MASK	3	amd8111e.c
19535	TX_BUF_LEN	1536	amd8111e.c
19536	RX_BUF_LEN	1536	amd8111e.c
19537	TX_PKT_LEN_MAX	(ETH_FRAME_LEN - ETH_HLEN)	amd8111e.c
19538	RX_PKT_LEN_MIN	60	amd8111e.c
19539	RX_PKT_LEN_MAX	ETH_FRAME_LEN	amd8111e.c
19540	TX_TIMEOUT	3000	amd8111e.c
19541	TX_PROCESS_TIME	10	amd8111e.c
19542	TX_RETRY	(TX_TIMEOUT / TX_PROCESS_TIME)	amd8111e.c
19543	PHY_RW_RETRY	10	amd8111e.c
19544	EBUSY	1	bnx2.c
19545	ENODEV	2	bnx2.c
19546	EINVAL	3	bnx2.c
19547	ENOMEM	4	bnx2.c
19548	EIO	5	bnx2.c
19549	ETHTOOL_ALL_FIBRE_SPEED	(ADVERTISED_1000baseT_Full)	bnx2.c
19550	ETHTOOL_ALL_COPPER_SPEED	(ADVERTISED_10baseT_Half \| ADVERTISED_10baseT_Full \| \ ADVERTISED_100baseT_Half \| ADVERTISED_100baseT_Full \| \ ADVERTISED_1	bnx2.c
19551	PHY_ALL_10_100_SPEED	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL \| ADVERTISE_CSMA)	bnx2.c
19552	PHY_ALL_1000_SPEED	(ADVERTISE_1000HALF \| ADVERTISE_1000FULL)	bnx2.c
19553	TX_TIME_OUT	2*TICKS_PER_SEC	davicom.c
19554	EEPROM_ADDRLEN	6	davicom.c
19555	EEPROM_SIZE	32	davicom.c	1 << EEPROM_ADDRLEN
19556	EE_WRITE_CMD	(5 << addr_len)	davicom.c
19557	EE_READ_CMD	(6 << addr_len)	davicom.c
19558	EE_ERASE_CMD	(7 << addr_len)	davicom.c
19559	EE_SHIFT_CLK	0x02	davicom.c	EEPROM shift clock.
19560	EE_CS	0x01	davicom.c	EEPROM chip select.
19561	EE_DATA_WRITE	0x04	davicom.c	EEPROM chip data in.
19562	EE_WRITE_0	0x01	davicom.c
19563	EE_WRITE_1	0x05	davicom.c
19564	EE_DATA_READ	0x08	davicom.c	EEPROM chip data out.
19565	EE_ENB	(0x4800 \| EE_CS)	davicom.c
19566	PHY_DATA_0	0x0	davicom.c
19567	PHY_DATA_1	0x20000	davicom.c
19568	MDCLKH	0x10000	davicom.c
19569	BUFLEN	1536	davicom.c
19570	NTXD	2	davicom.c
19571	NRXD	4	davicom.c
19572	txd	davicom_bufs.txd	davicom.c
19573	txb	davicom_bufs.txb	davicom.c
19574	rxd	davicom_bufs.rxd	davicom.c
19575	rxb	davicom_bufs.rxb	davicom.c
19576	DEPCA_NICSR	0x00	depca.c	Network interface CSR
19577	DEPCA_RBI	0x02	depca.c	RAM buffer index (2k buffer mode)
19578	DEPCA_DATA	0x04	depca.c	LANCE registers' data port
19579	DEPCA_ADDR	0x06	depca.c	LANCE registers' address port
19580	DEPCA_HBASE	0x08	depca.c	EISA high memory base address reg.
19581	DEPCA_PROM	0x0c	depca.c	Ethernet address ROM data port
19582	DEPCA_CNFG	0x0c	depca.c	EISA Configuration port
19583	DEPCA_RBSA	0x0e	depca.c	RAM buffer starting address (2k buff.)
19584	CSR0	0	depca.c
19585	CSR1	1	depca.c
19586	CSR2	2	depca.c
19587	CSR3	3	depca.c
19588	TO	0x0100	depca.c	Time Out for remote boot
19589	SHE	0x0080	depca.c	SHadow memory Enable
19590	BS	0x0040	depca.c	Bank Select
19591	BUF	0x0020	depca.c	BUFfer size (1->32k, 0->64k)
19592	RBE	0x0010	depca.c	Remote Boot Enable (1->net boot)
19593	AAC	0x0008	depca.c	Address ROM Address Counter (1->enable)
19594	_128KB	0x0008	depca.c	128kB Network RAM (1->enable)
19595	IM	0x0004	depca.c	Interrupt Mask (1->mask)
19596	IEN	0x0002	depca.c	Interrupt tristate ENable (1->enable)
19597	LED	0x0001	depca.c	LED control
19598	ERR	0x8000	depca.c	Error summary
19599	BABL	0x4000	depca.c	Babble transmitter timeout error
19600	CERR	0x2000	depca.c	Collision Error
19601	MISS	0x1000	depca.c	Missed packet
19602	MERR	0x0800	depca.c	Memory Error
19603	RINT	0x0400	depca.c	Receiver Interrupt
19604	TINT	0x0200	depca.c	Transmit Interrupt
19605	IDON	0x0100	depca.c	Initialization Done
19606	INTR	0x0080	depca.c	Interrupt Flag
19607	INEA	0x0040	depca.c	Interrupt Enable
19608	RXON	0x0020	depca.c	Receiver on
19609	TXON	0x0010	depca.c	Transmitter on
19610	TDMD	0x0008	depca.c	Transmit Demand
19611	STOP	0x0004	depca.c	Stop
19612	STRT	0x0002	depca.c	Start
19613	INIT	0x0001	depca.c	Initialize
19614	INTM	0xff00	depca.c	Interrupt Mask
19615	INTE	0xfff0	depca.c	Interrupt Enable
19616	BSWP	0x0004	depca.c	Byte SWaP
19617	ACON	0x0002	depca.c	ALE control
19618	BCON	0x0001	depca.c	Byte CONtrol
19619	PROM	0x8000	depca.c	Promiscuous Mode
19620	EMBA	0x0080	depca.c	Enable Modified Back-off Algorithm
19621	INTL	0x0040	depca.c	Internal Loopback
19622	DRTY	0x0020	depca.c	Disable Retry
19623	COLL	0x0010	depca.c	Force Collision
19624	DTCR	0x0008	depca.c	Disable Transmit CRC
19625	LOOP	0x0004	depca.c	Loopback
19626	DTX	0x0002	depca.c	Disable the Transmitter
19627	DRX	0x0001	depca.c	Disable the Receiver
19628	R_OWN	0x80000000	depca.c	Owner bit 0 = host, 1 = lance
19629	R_ERR	0x4000	depca.c	Error Summary
19630	R_FRAM	0x2000	depca.c	Framing Error
19631	R_OFLO	0x1000	depca.c	Overflow Error
19632	R_CRC	0x0800	depca.c	CRC Error
19633	R_BUFF	0x0400	depca.c	Buffer Error
19634	R_STP	0x0200	depca.c	Start of Packet
19635	R_ENP	0x0100	depca.c	End of Packet
19636	T_OWN	0x80000000	depca.c	Owner bit 0 = host, 1 = lance
19637	T_ERR	0x4000	depca.c	Error Summary
19638	T_ADD_FCS	0x2000	depca.c	More the 1 retry needed to Xmit
19639	T_MORE	0x1000	depca.c	>1 retry to transmit packet
19640	T_ONE	0x0800	depca.c	1 try needed to transmit the packet
19641	T_DEF	0x0400	depca.c	Deferred
19642	T_STP	0x02000000	depca.c	Start of Packet
19643	T_ENP	0x01000000	depca.c	End of Packet
19644	T_FLAGS	0xff000000	depca.c	TX Flags Field
19645	TMD3_BUFF	0x8000	depca.c	BUFFer error
19646	TMD3_UFLO	0x4000	depca.c	UnderFLOw error
19647	TMD3_RES	0x2000	depca.c	REServed
19648	TMD3_LCOL	0x1000	depca.c	Late COLlision
19649	TMD3_LCAR	0x0800	depca.c	Loss of CARrier
19650	TMD3_RTRY	0x0400	depca.c	ReTRY error
19651	PROBE_LENGTH	32	depca.c
19652	NUM_RX_DESC	2	depca.c	Number of RX descriptors
19653	NUM_TX_DESC	2	depca.c	Number of TX descriptors
19654	RX_BUFF_SZ	1536	depca.c	Buffer size for each Rx buffer
19655	TX_BUFF_SZ	1536	depca.c	Buffer size for each Tx buffer
19656	DEPCA_MODEL	DEPCA	depca.c
19657	DEPCA_RAM_BASE	0xd0000	depca.c
19658	ALIGN4	((u32)4 - 1)	depca.c	1 longword align
19659	ALIGN8	((u32)8 - 1)	depca.c	2 longword (quadword) align
19660	ALIGN	ALIGN8	depca.c	Keep the LANCE happy...
19661	LA_MASK	0x0000ffff	depca.c	LANCE address mask for mapping network RAM
19662	PCI_DM9132_ID	0x91321282	dmfe.c	Davicom DM9132 ID
19663	PCI_DM9102_ID	0x91021282	dmfe.c	Davicom DM9102 ID
19664	PCI_DM9100_ID	0x91001282	dmfe.c	Davicom DM9100 ID
19665	PCI_DM9009_ID	0x90091282	dmfe.c	Davicom DM9009 ID
19666	DM9102_IO_SIZE	0x80	dmfe.c
19667	DM9102A_IO_SIZE	0x100	dmfe.c
19668	TX_MAX_SEND_CNT	0x1	dmfe.c	Maximum tx packet per time
19669	TX_DESC_CNT	0x10	dmfe.c	Allocated Tx descriptors
19670	RX_DESC_CNT	0x20	dmfe.c	Allocated Rx descriptors
19671	TX_FREE_DESC_CNT	(TX_DESC_CNT - 2)	dmfe.c	Max TX packet count
19672	TX_WAKE_DESC_CNT	(TX_DESC_CNT - 3)	dmfe.c	TX wakeup count
19673	DESC_ALL_CNT	(TX_DESC_CNT + RX_DESC_CNT)	dmfe.c
19674	TX_BUF_ALLOC	0x600	dmfe.c
19675	RX_ALLOC_SIZE	0x620	dmfe.c
19676	DM910X_RESET	1	dmfe.c
19677	CR0_DEFAULT	0x00E00000	dmfe.c	TX & RX burst mode
19678	CR6_DEFAULT	0x00080000	dmfe.c	HD
19679	CR7_DEFAULT	0x180c1	dmfe.c
19680	CR15_DEFAULT	0x06	dmfe.c	TxJabber RxWatchdog
19681	TDES0_ERR_MASK	0x4302	dmfe.c	TXJT, LC, EC, FUE
19682	MAX_PACKET_SIZE	1514	dmfe.c
19683	DMFE_MAX_MULTICAST	14	dmfe.c
19684	RX_COPY_SIZE	100	dmfe.c
19685	MAX_CHECK_PACKET	0x8000	dmfe.c
19686	DM9801_NOISE_FLOOR	8	dmfe.c
19687	DM9802_NOISE_FLOOR	5	dmfe.c
19688	DMFE_10MHF	0	dmfe.c
19689	DMFE_100MHF	1	dmfe.c
19690	DMFE_10MFD	4	dmfe.c
19691	DMFE_100MFD	5	dmfe.c
19692	DMFE_AUTO	8	dmfe.c
19693	DMFE_1M_HPNA	0x10	dmfe.c
19694	DMFE_TXTH_72	0x400000	dmfe.c	TX TH 72 byte
19695	DMFE_TXTH_96	0x404000	dmfe.c	TX TH 96 byte
19696	DMFE_TXTH_128	0x0000	dmfe.c	TX TH 128 byte
19697	DMFE_TXTH_256	0x4000	dmfe.c	TX TH 256 byte
19698	DMFE_TXTH_512	0x8000	dmfe.c	TX TH 512 byte
19699	DMFE_TXTH_1K	0xC000	dmfe.c	TX TH 1K byte
19700	DMFE_TIMER_WUT	(jiffies + HZ * 1)	dmfe.c	timer wakeup time : 1 second
19701	DMFE_TX_TIMEOUT	((3*HZ)/2)	dmfe.c	tx packet time-out time 1.5 s"
19702	DMFE_TX_KICK	(HZ/2)	dmfe.c	tx packet Kick-out time 0.5 s"
19703	CR9_SROM_READ	0x4800	dmfe.c
19704	CR9_SRCS	0x1	dmfe.c
19705	CR9_SRCLK	0x2	dmfe.c
19706	CR9_CRDOUT	0x8	dmfe.c
19707	SROM_DATA_0	0x0	dmfe.c
19708	SROM_DATA_1	0x4	dmfe.c
19709	PHY_DATA_1	0x20000	dmfe.c
19710	PHY_DATA_0	0x00000	dmfe.c
19711	MDCLKH	0x10000	dmfe.c
19712	PHY_POWER_DOWN	0x800	dmfe.c
19713	SROM_V41_CODE	0x14	dmfe.c
19714	DEVICE	net_device	dmfe.c
19715	txd	dmfe_bufs.txd	dmfe.c
19716	txb	dmfe_bufs.txb	dmfe.c
19717	rxd	dmfe_bufs.rxd	dmfe.c
19718	rxb	dmfe_bufs.rxb	dmfe.c
19719	board_found	1	dmfe.c
19720	valid_link	0	dmfe.c
19721	LAN595	0	eepro.c
19722	LAN595TX	1	eepro.c
19723	LAN595FX	2	eepro.c
19724	LAN595FX_10ISA	3	eepro.c
19725	SLOW_DOWN	inb(0x80);	eepro.c
19726	SA_ADDR0	0x00	eepro.c	Etherexpress Pro/10
19727	SA_ADDR1	0xaa	eepro.c
19728	SA_ADDR2	0x00	eepro.c
19729	ee_PnP	0	eepro.c	Plug 'n Play enable bit
19730	ee_Word1	1	eepro.c	Word 1?
19731	ee_BusWidth	2	eepro.c	8/16 bit
19732	ee_FlashAddr	3	eepro.c	Flash Address
19733	ee_FlashMask	0x7	eepro.c	Mask
19734	ee_AutoIO	6	eepro.c
19735	ee_reserved0	7	eepro.c	=0!
19736	ee_Flash	8	eepro.c	Flash there?
19737	ee_AutoNeg	9	eepro.c	Auto Negotiation enabled?
19738	ee_IO0	10	eepro.c	IO Address LSB
19739	ee_IO0Mask	0x	eepro.c	...
19740	ee_IO1	15	eepro.c	IO MSB
19741	ee_IntSel	0	eepro.c	Interrupt
19742	ee_IntMask	0x7	eepro.c
19743	ee_LI	3	eepro.c	Link Integrity 0= enabled
19744	ee_PC	4	eepro.c	Polarity Correction 0= enabled
19745	ee_TPE_AUI	5	eepro.c	PortSelection 1=TPE
19746	ee_Jabber	6	eepro.c	Jabber prevention 0= enabled
19747	ee_AutoPort	7	eepro.c	Auto Port Selection 1= Disabled
19748	ee_SMOUT	8	eepro.c	SMout Pin Control 0= Input
19749	ee_PROM	9	eepro.c	Flash EPROM / PROM 0=Flash
19750	ee_reserved1	10	eepro.c	.. 12 =0!
19751	ee_AltReady	13	eepro.c	Alternate Ready, 0=normal
19752	ee_reserved2	14	eepro.c	=0!
19753	ee_Duplex	15	eepro.c
19754	ee_IA5	0	eepro.c	bit start for individual Addr Byte 5
19755	ee_IA4	8	eepro.c	bit start for individual Addr Byte 5
19756	ee_IA3	0	eepro.c	bit start for individual Addr Byte 5
19757	ee_IA2	8	eepro.c	bit start for individual Addr Byte 5
19758	ee_IA1	0	eepro.c	bit start for individual Addr Byte 5
19759	ee_IA0	8	eepro.c	bit start for individual Addr Byte 5
19760	ee_BNC_TPE	0	eepro.c	0=TPE
19761	ee_BootType	1	eepro.c	00=None, 01=IPX, 10=ODI, 11=NDIS
19762	ee_BootTypeMask	0x3	eepro.c
19763	ee_NumConn	3	eepro.c	Number of Connections 0= One or Two
19764	ee_FlashSock	4	eepro.c	Presence of Flash Socket 0= Present
19765	ee_PortTPE	5	eepro.c
19766	ee_PortBNC	6	eepro.c
19767	ee_PortAUI	7	eepro.c
19768	ee_PowerMgt	10	eepro.c	0= disabled
19769	ee_CP	13	eepro.c	Concurrent Processing
19770	ee_CPMask	0x7	eepro.c
19771	ee_Stepping	0	eepro.c	Stepping info
19772	ee_StepMask	0x0F	eepro.c
19773	ee_BoardID	4	eepro.c	Manucaturer Board ID, reserved
19774	ee_BoardMask	0x0FFF	eepro.c
19775	ee_INT_TO_IRQ	0	eepro.c	int to IRQ Mapping = 0x1EB8 for Pro/10+
19776	ee_FX_INT2IRQ	0x1EB8	eepro.c	the _only_ mapping allowed for FX chips
19777	ee_SIZE	0x40	eepro.c	total EEprom Size
19778	ee_Checksum	0xBABA	eepro.c	initial and final value for adding checksum
19779	ee_addr_vendor	0x10	eepro.c	Word offset for EISA Vendor ID
19780	ee_addr_id	0x11	eepro.c	Word offset for Card ID
19781	ee_addr_SN	0x12	eepro.c	Serial Number
19782	ee_addr_CRC_8	0x14	eepro.c	CRC over last thee Bytes
19783	ee_vendor_intel0	0x25	eepro.c	Vendor ID Intel
19784	ee_vendor_intel1	0xD4	eepro.c
19785	ee_id_eepro10p0	0x10	eepro.c	ID for eepro/10+
19786	ee_id_eepro10p1	0x31	eepro.c
19787	RAM_SIZE	0x8000	eepro.c
19788	RCV_HEADER	8	eepro.c
19789	RCV_DEFAULT_RAM	0x6000	eepro.c
19790	RCV_RAM	rcv_ram	eepro.c
19791	XMT_HEADER	8	eepro.c
19792	XMT_RAM	(RAM_SIZE - RCV_RAM)	eepro.c
19793	XMT_START	((rcv_start + RCV_RAM) % RAM_SIZE)	eepro.c
19794	RCV_LOWER_LIMIT	(rcv_start >> 8)	eepro.c
19795	RCV_UPPER_LIMIT	(((rcv_start + RCV_RAM) - 2) >> 8)	eepro.c
19796	XMT_LOWER_LIMIT	(XMT_START >> 8)	eepro.c
19797	XMT_UPPER_LIMIT	(((XMT_START + XMT_RAM) - 2) >> 8)	eepro.c
19798	RCV_START_PRO	0x00	eepro.c
19799	RCV_START_10	XMT_RAM	eepro.c
19800	RCV_DONE	0x0008	eepro.c
19801	RX_OK	0x2000	eepro.c
19802	RX_ERROR	0x0d81	eepro.c
19803	TX_DONE_BIT	0x0080	eepro.c
19804	CHAIN_BIT	0x8000	eepro.c
19805	XMT_STATUS	0x02	eepro.c
19806	XMT_CHAIN	0x04	eepro.c
19807	XMT_COUNT	0x06	eepro.c
19808	BANK0_SELECT	0x00	eepro.c
19809	BANK1_SELECT	0x40	eepro.c
19810	BANK2_SELECT	0x80	eepro.c
19811	COMMAND_REG	0x00	eepro.c	Register 0
19812	MC_SETUP	0x03	eepro.c
19813	XMT_CMD	0x04	eepro.c
19814	DIAGNOSE_CMD	0x07	eepro.c
19815	RCV_ENABLE_CMD	0x08	eepro.c
19816	RCV_DISABLE_CMD	0x0a	eepro.c
19817	STOP_RCV_CMD	0x0b	eepro.c
19818	RESET_CMD	0x0e	eepro.c
19819	POWER_DOWN_CMD	0x18	eepro.c
19820	RESUME_XMT_CMD	0x1c	eepro.c
19821	SEL_RESET_CMD	0x1e	eepro.c
19822	STATUS_REG	0x01	eepro.c	Register 1
19823	RX_INT	0x02	eepro.c
19824	TX_INT	0x04	eepro.c
19825	EXEC_STATUS	0x30	eepro.c
19826	ID_REG	0x02	eepro.c	Register 2
19827	R_ROBIN_BITS	0xc0	eepro.c	round robin counter
19828	ID_REG_MASK	0x2c	eepro.c
19829	ID_REG_SIG	0x24	eepro.c
19830	AUTO_ENABLE	0x10	eepro.c
19831	INT_MASK_REG	0x03	eepro.c	Register 3
19832	RX_STOP_MASK	0x01	eepro.c
19833	RX_MASK	0x02	eepro.c
19834	TX_MASK	0x04	eepro.c
19835	EXEC_MASK	0x08	eepro.c
19836	ALL_MASK	0x0f	eepro.c
19837	IO_32_BIT	0x10	eepro.c
19838	RCV_BAR	0x04	eepro.c	The following are word (16-bit) registers
19839	RCV_STOP	0x06	eepro.c
19840	XMT_BAR_PRO	0x0a	eepro.c
19841	XMT_BAR_10	0x0b	eepro.c
19842	HOST_ADDRESS_REG	0x0c	eepro.c
19843	IO_PORT	0x0e	eepro.c
19844	IO_PORT_32_BIT	0x0c	eepro.c
19845	REG1	0x01	eepro.c
19846	WORD_WIDTH	0x02	eepro.c
19847	INT_ENABLE	0x80	eepro.c
19848	INT_NO_REG	0x02	eepro.c
19849	RCV_LOWER_LIMIT_REG	0x08	eepro.c
19850	RCV_UPPER_LIMIT_REG	0x09	eepro.c
19851	XMT_LOWER_LIMIT_REG_PRO	0x0a	eepro.c
19852	XMT_UPPER_LIMIT_REG_PRO	0x0b	eepro.c
19853	XMT_LOWER_LIMIT_REG_10	0x0b	eepro.c
19854	XMT_UPPER_LIMIT_REG_10	0x0a	eepro.c
19855	XMT_Chain_Int	0x20	eepro.c	Interrupt at the end of the transmit chain
19856	XMT_Chain_ErrStop	0x40	eepro.c	Interrupt at the end of the chain even if there are errors
19857	RCV_Discard_BadFrame	0x80	eepro.c	Throw bad frames away, and continue to receive others
19858	REG2	0x02	eepro.c
19859	PRMSC_Mode	0x01	eepro.c
19860	Multi_IA	0x20	eepro.c
19861	REG3	0x03	eepro.c
19862	TPE_BIT	0x04	eepro.c
19863	BNC_BIT	0x20	eepro.c
19864	REG13	0x0d	eepro.c
19865	FDX	0x00	eepro.c
19866	A_N_ENABLE	0x02	eepro.c
19867	I_ADD_REG0	0x04	eepro.c
19868	I_ADD_REG1	0x05	eepro.c
19869	I_ADD_REG2	0x06	eepro.c
19870	I_ADD_REG3	0x07	eepro.c
19871	I_ADD_REG4	0x08	eepro.c
19872	I_ADD_REG5	0x09	eepro.c
19873	EEPROM_REG_PRO	0x0a	eepro.c
19874	EEPROM_REG_10	0x0b	eepro.c
19875	EESK	0x01	eepro.c
19876	EECS	0x02	eepro.c
19877	EEDI	0x04	eepro.c
19878	EEDO	0x08	eepro.c
19879	EE_READ_CMD	(6 << 6)	eepro.c
19880	EE_SHIFT_CLK	0x01	eepro100.c	EEPROM shift clock.
19881	EE_CS	0x02	eepro100.c	EEPROM chip select.
19882	EE_DATA_WRITE	0x04	eepro100.c	EEPROM chip data in.
19883	EE_DATA_READ	0x08	eepro100.c	EEPROM chip data out.
19884	EE_WRITE_0	0x4802	eepro100.c
19885	EE_WRITE_1	0x4806	eepro100.c
19886	EE_ENB	(0x4800 \| EE_CS)	eepro100.c
19887	EE_READ_CMD	6	eepro100.c
19888	CU_START	0x0010	eepro100.c
19889	CU_RESUME	0x0020	eepro100.c
19890	CU_STATSADDR	0x0040	eepro100.c
19891	CU_SHOWSTATS	0x0050	eepro100.c	Dump statistics counters.
19892	CU_CMD_BASE	0x0060	eepro100.c	Base address to add to add CU commands.
19893	CU_DUMPSTATS	0x0070	eepro100.c	Dump then reset stats counters.
19894	RX_START	0x0001	eepro100.c
19895	RX_RESUME	0x0002	eepro100.c
19896	RX_ABORT	0x0004	eepro100.c
19897	RX_ADDR_LOAD	0x0006	eepro100.c
19898	RX_RESUMENR	0x0007	eepro100.c
19899	INT_MASK	0x0100	eepro100.c
19900	DRVR_INT	0x0200	eepro100.c	Driver generated interrupt.
19901	RXFD_COUNT	4	eepro100.c
19902	rxfds	eepro100_bufs.rxfds	eepro100.c
19903	TX_RING_SIZE	2	epic100.c	use at least 2 buffers for TX
19904	RX_RING_SIZE	2	epic100.c
19905	PKT_BUF_SZ	1536	epic100.c	Size of each temporary Tx/Rx buffer.
19906	EPIC_DEBUG	0	epic100.c	debug level
19907	TD_STDFLAGS	TD_LASTDESC	epic100.c
19908	rx_ring	epic100_bufs.rx_ring	epic100.c
19909	tx_ring	epic100_bufs.tx_ring	epic100.c
19910	rx_packet	epic100_bufs.rx_packet	epic100.c
19911	tx_packet	epic100_bufs.tx_packet	epic100.c
19912	EE_SHIFT_CLK	0x04	epic100.c	EEPROM shift clock.
19913	EE_CS	0x02	epic100.c	EEPROM chip select.
19914	EE_DATA_WRITE	0x08	epic100.c	EEPROM chip data in.
19915	EE_WRITE_0	0x01	epic100.c
19916	EE_WRITE_1	0x09	epic100.c
19917	EE_DATA_READ	0x10	epic100.c	EEPROM chip data out.
19918	EE_ENB	(0x0001 \| EE_CS)	epic100.c
19919	EE_WRITE_CMD	(5 << 6)	epic100.c
19920	EE_READ_CMD	(6 << 6)	epic100.c
19921	EE_ERASE_CMD	(7 << 6)	epic100.c
19922	MII_READOP	1	epic100.c
19923	MII_WRITEOP	2	epic100.c
19924	dma_addr_t	unsigned long	etherfabric.c
19925	FALCON_USE_IO_BAR	1	etherfabric.c
19926	EFAB_VENDID_LEVEL5	0x1924	etherfabric.c
19927	FALCON_P_DEVID	0x0703	etherfabric.c	Temporary PCI ID
19928	EF1002_DEVID	0xC101	etherfabric.c
19929	EFAB_BUF_ALIGN	4096	etherfabric.c
19930	EFAB_DATA_BUF_SIZE	2048	etherfabric.c
19931	EFAB_RX_BUFS	16	etherfabric.c
19932	EFAB_RXD_SIZE	512	etherfabric.c
19933	EFAB_TXD_SIZE	512	etherfabric.c
19934	EFAB_EVQ_SIZE	512	etherfabric.c
19935	MII_BMSR	0x01	etherfabric.c	Basic mode status register
19936	MII_ADVERTISE	0x04	etherfabric.c	Advertisement control register
19937	MII_LPA	0x05	etherfabric.c	Link partner ability register
19938	GMII_GTCR	0x09	etherfabric.c	1000BASE-T control register
19939	GMII_GTSR	0x0a	etherfabric.c	1000BASE-T status register
19940	GMII_PSSR	0x11	etherfabric.c	PHY-specific status register
19941	BMSR_LSTATUS	0x0004	etherfabric.c	Link status
19942	LPA_10HALF	0x0020	etherfabric.c	Can do 10mbps half-duplex
19943	LPA_10FULL	0x0040	etherfabric.c	Can do 10mbps full-duplex
19944	LPA_100HALF	0x0080	etherfabric.c	Can do 100mbps half-duplex
19945	LPA_100FULL	0x0100	etherfabric.c	Can do 100mbps full-duplex
19946	LPA_100BASE4	0x0200	etherfabric.c	Can do 100mbps 4k packets
19947	LPA_PAUSE	0x0400	etherfabric.c	Bit 10 - MAC pause
19948	LPA_1000FULL	0x00020000	etherfabric.c
19949	LPA_1000HALF	0x00010000	etherfabric.c
19950	LPA_10000FULL	0x00040000	etherfabric.c
19951	LPA_10000HALF	0x00080000	etherfabric.c
19952	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	etherfabric.c
19953	LPA_1000	( LPA_1000FULL \| LPA_1000HALF )	etherfabric.c
19954	LPA_10000	( LPA_10000FULL \| LPA_10000HALF )	etherfabric.c
19955	LPA_DUPLEX	( LPA_10FULL \| LPA_100FULL \| LPA_1000FULL )	etherfabric.c
19956	LPA_OTHER	~( LPA_10FULL \| LPA_10HALF \| LPA_100FULL \| \ LPA_100HALF \| LPA_1000FULL \| LPA_1000HALF )	etherfabric.c
19957	PSSR_LSTATUS	0x0400	etherfabric.c	Bit 10 - link status
19958	GM_CFG1_REG_MAC	0x00	etherfabric.c
19959	GM_SW_RST_LBN	31	etherfabric.c
19960	GM_SW_RST_WIDTH	1	etherfabric.c
19961	GM_RX_FC_EN_LBN	5	etherfabric.c
19962	GM_RX_FC_EN_WIDTH	1	etherfabric.c
19963	GM_TX_FC_EN_LBN	4	etherfabric.c
19964	GM_TX_FC_EN_WIDTH	1	etherfabric.c
19965	GM_RX_EN_LBN	2	etherfabric.c
19966	GM_RX_EN_WIDTH	1	etherfabric.c
19967	GM_TX_EN_LBN	0	etherfabric.c
19968	GM_TX_EN_WIDTH	1	etherfabric.c
19969	GM_CFG2_REG_MAC	0x01	etherfabric.c
19970	GM_PAMBL_LEN_LBN	12	etherfabric.c
19971	GM_PAMBL_LEN_WIDTH	4	etherfabric.c
19972	GM_IF_MODE_LBN	8	etherfabric.c
19973	GM_IF_MODE_WIDTH	2	etherfabric.c
19974	GM_PAD_CRC_EN_LBN	2	etherfabric.c
19975	GM_PAD_CRC_EN_WIDTH	1	etherfabric.c
19976	GM_FD_LBN	0	etherfabric.c
19977	GM_FD_WIDTH	1	etherfabric.c
19978	GM_MAX_FLEN_REG_MAC	0x04	etherfabric.c
19979	GM_MAX_FLEN_LBN	0	etherfabric.c
19980	GM_MAX_FLEN_WIDTH	16	etherfabric.c
19981	GM_MII_MGMT_CFG_REG_MAC	0x08	etherfabric.c
19982	GM_MGMT_CLK_SEL_LBN	0	etherfabric.c
19983	GM_MGMT_CLK_SEL_WIDTH	3	etherfabric.c
19984	GM_MII_MGMT_CMD_REG_MAC	0x09	etherfabric.c
19985	GM_MGMT_SCAN_CYC_LBN	1	etherfabric.c
19986	GM_MGMT_SCAN_CYC_WIDTH	1	etherfabric.c
19987	GM_MGMT_RD_CYC_LBN	0	etherfabric.c
19988	GM_MGMT_RD_CYC_WIDTH	1	etherfabric.c
19989	GM_MII_MGMT_ADR_REG_MAC	0x0a	etherfabric.c
19990	GM_MGMT_PHY_ADDR_LBN	8	etherfabric.c
19991	GM_MGMT_PHY_ADDR_WIDTH	5	etherfabric.c
19992	GM_MGMT_REG_ADDR_LBN	0	etherfabric.c
19993	GM_MGMT_REG_ADDR_WIDTH	5	etherfabric.c
19994	GM_MII_MGMT_CTL_REG_MAC	0x0b	etherfabric.c
19995	GM_MGMT_CTL_LBN	0	etherfabric.c
19996	GM_MGMT_CTL_WIDTH	16	etherfabric.c
19997	GM_MII_MGMT_STAT_REG_MAC	0x0c	etherfabric.c
19998	GM_MGMT_STAT_LBN	0	etherfabric.c
19999	GM_MGMT_STAT_WIDTH	16	etherfabric.c
20000	GM_MII_MGMT_IND_REG_MAC	0x0d	etherfabric.c
20001	GM_MGMT_BUSY_LBN	0	etherfabric.c
20002	GM_MGMT_BUSY_WIDTH	1	etherfabric.c
20003	GM_ADR1_REG_MAC	0x10	etherfabric.c
20004	GM_HWADDR_5_LBN	24	etherfabric.c
20005	GM_HWADDR_5_WIDTH	8	etherfabric.c
20006	GM_HWADDR_4_LBN	16	etherfabric.c
20007	GM_HWADDR_4_WIDTH	8	etherfabric.c
20008	GM_HWADDR_3_LBN	8	etherfabric.c
20009	GM_HWADDR_3_WIDTH	8	etherfabric.c
20010	GM_HWADDR_2_LBN	0	etherfabric.c
20011	GM_HWADDR_2_WIDTH	8	etherfabric.c
20012	GM_ADR2_REG_MAC	0x11	etherfabric.c
20013	GM_HWADDR_1_LBN	24	etherfabric.c
20014	GM_HWADDR_1_WIDTH	8	etherfabric.c
20015	GM_HWADDR_0_LBN	16	etherfabric.c
20016	GM_HWADDR_0_WIDTH	8	etherfabric.c
20017	GMF_CFG0_REG_MAC	0x12	etherfabric.c
20018	GMF_FTFENREQ_LBN	12	etherfabric.c
20019	GMF_FTFENREQ_WIDTH	1	etherfabric.c
20020	GMF_STFENREQ_LBN	11	etherfabric.c
20021	GMF_STFENREQ_WIDTH	1	etherfabric.c
20022	GMF_FRFENREQ_LBN	10	etherfabric.c
20023	GMF_FRFENREQ_WIDTH	1	etherfabric.c
20024	GMF_SRFENREQ_LBN	9	etherfabric.c
20025	GMF_SRFENREQ_WIDTH	1	etherfabric.c
20026	GMF_WTMENREQ_LBN	8	etherfabric.c
20027	GMF_WTMENREQ_WIDTH	1	etherfabric.c
20028	GMF_CFG1_REG_MAC	0x13	etherfabric.c
20029	GMF_CFGFRTH_LBN	16	etherfabric.c
20030	GMF_CFGFRTH_WIDTH	5	etherfabric.c
20031	GMF_CFGXOFFRTX_LBN	0	etherfabric.c
20032	GMF_CFGXOFFRTX_WIDTH	16	etherfabric.c
20033	GMF_CFG2_REG_MAC	0x14	etherfabric.c
20034	GMF_CFGHWM_LBN	16	etherfabric.c
20035	GMF_CFGHWM_WIDTH	6	etherfabric.c
20036	GMF_CFGLWM_LBN	0	etherfabric.c
20037	GMF_CFGLWM_WIDTH	6	etherfabric.c
20038	GMF_CFG3_REG_MAC	0x15	etherfabric.c
20039	GMF_CFGHWMFT_LBN	16	etherfabric.c
20040	GMF_CFGHWMFT_WIDTH	6	etherfabric.c
20041	GMF_CFGFTTH_LBN	0	etherfabric.c
20042	GMF_CFGFTTH_WIDTH	6	etherfabric.c
20043	GMF_CFG4_REG_MAC	0x16	etherfabric.c
20044	GMF_HSTFLTRFRM_PAUSE_LBN	12	etherfabric.c
20045	GMF_HSTFLTRFRM_PAUSE_WIDTH	12	etherfabric.c
20046	GMF_CFG5_REG_MAC	0x17	etherfabric.c
20047	GMF_CFGHDPLX_LBN	22	etherfabric.c
20048	GMF_CFGHDPLX_WIDTH	1	etherfabric.c
20049	GMF_CFGBYTMODE_LBN	19	etherfabric.c
20050	GMF_CFGBYTMODE_WIDTH	1	etherfabric.c
20051	GMF_HSTDRPLT64_LBN	18	etherfabric.c
20052	GMF_HSTDRPLT64_WIDTH	1	etherfabric.c
20053	GMF_HSTFLTRFRMDC_PAUSE_LBN	12	etherfabric.c
20054	GMF_HSTFLTRFRMDC_PAUSE_WIDTH	1	etherfabric.c
20055	EF1_CTR_GEN_STATUS0_REG	0x0	etherfabric.c
20056	EF1_MASTER_EVENTS_LBN	12	etherfabric.c
20057	EF1_MASTER_EVENTS_WIDTH	1	etherfabric.c
20058	EF1_TX_ENGINE_EN_LBN	19	etherfabric.c
20059	EF1_TX_ENGINE_EN_WIDTH	1	etherfabric.c
20060	EF1_RX_ENGINE_EN_LBN	18	etherfabric.c
20061	EF1_RX_ENGINE_EN_WIDTH	1	etherfabric.c
20062	EF1_TURBO2_LBN	17	etherfabric.c
20063	EF1_TURBO2_WIDTH	1	etherfabric.c
20064	EF1_TURBO1_LBN	16	etherfabric.c
20065	EF1_TURBO1_WIDTH	1	etherfabric.c
20066	EF1_TURBO3_LBN	14	etherfabric.c
20067	EF1_TURBO3_WIDTH	1	etherfabric.c
20068	EF1_LB_RESET_LBN	3	etherfabric.c
20069	EF1_LB_RESET_WIDTH	1	etherfabric.c
20070	EF1_MAC_RESET_LBN	2	etherfabric.c
20071	EF1_MAC_RESET_WIDTH	1	etherfabric.c
20072	EF1_CAM_ENABLE_LBN	1	etherfabric.c
20073	EF1_CAM_ENABLE_WIDTH	1	etherfabric.c
20074	EF1_IRQ_SRC_REG	0x0008	etherfabric.c
20075	EF1_IRQ_MASK_REG	0x000c	etherfabric.c
20076	EF1_IRQ_PHY1_LBN	11	etherfabric.c
20077	EF1_IRQ_PHY1_WIDTH	1	etherfabric.c
20078	EF1_IRQ_PHY0_LBN	10	etherfabric.c
20079	EF1_IRQ_PHY0_WIDTH	1	etherfabric.c
20080	EF1_IRQ_SERR_LBN	7	etherfabric.c
20081	EF1_IRQ_SERR_WIDTH	1	etherfabric.c
20082	EF1_IRQ_EVQ_LBN	3	etherfabric.c
20083	EF1_IRQ_EVQ_WIDTH	1	etherfabric.c
20084	EF1_EVT3_REG	0x38	etherfabric.c
20085	EF1_EEPROM_REG	0x40	etherfabric.c
20086	EF1_EEPROM_SDA_LBN	31	etherfabric.c
20087	EF1_EEPROM_SDA_WIDTH	1	etherfabric.c
20088	EF1_EEPROM_SCL_LBN	30	etherfabric.c
20089	EF1_EEPROM_SCL_WIDTH	1	etherfabric.c
20090	EF1_JTAG_DISCONNECT_LBN	17	etherfabric.c
20091	EF1_JTAG_DISCONNECT_WIDTH	1	etherfabric.c
20092	EF1_EEPROM_LBN	0	etherfabric.c
20093	EF1_EEPROM_WIDTH	32	etherfabric.c
20094	EF1_CTL2_REG	0x4c	etherfabric.c
20095	EF1_PLL_TRAP_LBN	31	etherfabric.c
20096	EF1_PLL_TRAP_WIDTH	1	etherfabric.c
20097	EF1_MEM_MAP_4MB_LBN	11	etherfabric.c
20098	EF1_MEM_MAP_4MB_WIDTH	1	etherfabric.c
20099	EF1_EV_INTR_CLR_WRITE_LBN	6	etherfabric.c
20100	EF1_EV_INTR_CLR_WRITE_WIDTH	1	etherfabric.c
20101	EF1_BURST_MERGE_LBN	5	etherfabric.c
20102	EF1_BURST_MERGE_WIDTH	1	etherfabric.c
20103	EF1_CLEAR_NULL_PAD_LBN	4	etherfabric.c
20104	EF1_CLEAR_NULL_PAD_WIDTH	1	etherfabric.c
20105	EF1_SW_RESET_LBN	2	etherfabric.c
20106	EF1_SW_RESET_WIDTH	1	etherfabric.c
20107	EF1_INTR_AFTER_EVENT_LBN	1	etherfabric.c
20108	EF1_INTR_AFTER_EVENT_WIDTH	1	etherfabric.c
20109	EF1_EVENT_FIFO_REG	0x50	etherfabric.c
20110	EF1_EVENT_FIFO_COUNT_REG	0x5c	etherfabric.c
20111	EF1_EV_COUNT_LBN	0	etherfabric.c
20112	EF1_EV_COUNT_WIDTH	16	etherfabric.c
20113	EF1_DMA_TX_CSR_REG	0x80	etherfabric.c
20114	EF1_DMA_TX_CSR_CHAIN_EN_LBN	8	etherfabric.c
20115	EF1_DMA_TX_CSR_CHAIN_EN_WIDTH	1	etherfabric.c
20116	EF1_DMA_TX_CSR_ENABLE_LBN	4	etherfabric.c
20117	EF1_DMA_TX_CSR_ENABLE_WIDTH	1	etherfabric.c
20118	EF1_DMA_TX_CSR_INT_EN_LBN	0	etherfabric.c
20119	EF1_DMA_TX_CSR_INT_EN_WIDTH	1	etherfabric.c
20120	EF1_DMA_RX_CSR_REG	0xa0	etherfabric.c
20121	EF1_DMA_RX_ABOVE_1GB_EN_LBN	6	etherfabric.c
20122	EF1_DMA_RX_ABOVE_1GB_EN_WIDTH	1	etherfabric.c
20123	EF1_DMA_RX_BELOW_1MB_EN_LBN	5	etherfabric.c
20124	EF1_DMA_RX_BELOW_1MB_EN_WIDTH	1	etherfabric.c
20125	EF1_DMA_RX_CSR_ENABLE_LBN	0	etherfabric.c
20126	EF1_DMA_RX_CSR_ENABLE_WIDTH	1	etherfabric.c
20127	EF1_GMF_L5WM_REG_MAC	0x20	etherfabric.c
20128	EF1_L5WM_LBN	0	etherfabric.c
20129	EF1_L5WM_WIDTH	32	etherfabric.c
20130	EF1_GM_MAC_CLK_REG	0x112000	etherfabric.c
20131	EF1_GM_PORT0_MAC_CLK_LBN	0	etherfabric.c
20132	EF1_GM_PORT0_MAC_CLK_WIDTH	1	etherfabric.c
20133	EF1_GM_PORT1_MAC_CLK_LBN	1	etherfabric.c
20134	EF1_GM_PORT1_MAC_CLK_WIDTH	1	etherfabric.c
20135	EF1_TX_DESC_FIFO	0x141000	etherfabric.c
20136	EF1_TX_KER_EVQ_LBN	80	etherfabric.c
20137	EF1_TX_KER_EVQ_WIDTH	12	etherfabric.c
20138	EF1_TX_KER_IDX_LBN	64	etherfabric.c
20139	EF1_TX_KER_IDX_WIDTH	16	etherfabric.c
20140	EF1_TX_KER_MODE_LBN	63	etherfabric.c
20141	EF1_TX_KER_MODE_WIDTH	1	etherfabric.c
20142	EF1_TX_KER_PORT_LBN	60	etherfabric.c
20143	EF1_TX_KER_PORT_WIDTH	1	etherfabric.c
20144	EF1_TX_KER_CONT_LBN	56	etherfabric.c
20145	EF1_TX_KER_CONT_WIDTH	1	etherfabric.c
20146	EF1_TX_KER_BYTE_CNT_LBN	32	etherfabric.c
20147	EF1_TX_KER_BYTE_CNT_WIDTH	24	etherfabric.c
20148	EF1_TX_KER_BUF_ADR_LBN	0	etherfabric.c
20149	EF1_TX_KER_BUF_ADR_WIDTH	32	etherfabric.c
20150	EF1_TX_DESC_FIFO_FLUSH	0x141ffc	etherfabric.c
20151	EF1_RX_DESC_FIFO	0x145000	etherfabric.c
20152	EF1_RX_KER_EVQ_LBN	48	etherfabric.c
20153	EF1_RX_KER_EVQ_WIDTH	12	etherfabric.c
20154	EF1_RX_KER_IDX_LBN	32	etherfabric.c
20155	EF1_RX_KER_IDX_WIDTH	16	etherfabric.c
20156	EF1_RX_KER_BUF_ADR_LBN	0	etherfabric.c
20157	EF1_RX_KER_BUF_ADR_WIDTH	32	etherfabric.c
20158	EF1_RX_DESC_FIFO_FLUSH	0x145ffc	etherfabric.c
20159	EF1_CAM_BASE	0x1c0000	etherfabric.c
20160	EF1_CAM_WTF_DOES_THIS_DO_LBN	0	etherfabric.c
20161	EF1_CAM_WTF_DOES_THIS_DO_WIDTH	32	etherfabric.c
20162	EF1_EVQ_PTR_BASE	0x260000	etherfabric.c
20163	EF1_EVQ_SIZE_LBN	29	etherfabric.c
20164	EF1_EVQ_SIZE_WIDTH	2	etherfabric.c
20165	EF1_EVQ_SIZE_4K	3	etherfabric.c
20166	EF1_EVQ_SIZE_2K	2	etherfabric.c
20167	EF1_EVQ_SIZE_1K	1	etherfabric.c
20168	EF1_EVQ_SIZE_512	0	etherfabric.c
20169	EF1_EVQ_BUF_BASE_ID_LBN	0	etherfabric.c
20170	EF1_EVQ_BUF_BASE_ID_WIDTH	29	etherfabric.c
20171	EF1002_MAC_REGBANK	0x110000	etherfabric.c
20172	EF1002_MAC_REGBANK_SIZE	0x1000	etherfabric.c
20173	EF1002_MAC_REG_SIZE	0x08	etherfabric.c
20174	EF1_EV_CODE_LBN	20	etherfabric.c
20175	EF1_EV_CODE_WIDTH	8	etherfabric.c
20176	EF1_RX_EV_DECODE	0x01	etherfabric.c
20177	EF1_TX_EV_DECODE	0x02	etherfabric.c
20178	EF1_TIMER_EV_DECODE	0x0b	etherfabric.c
20179	EF1_DRV_GEN_EV_DECODE	0x0f	etherfabric.c
20180	EF1_RX_EV_LEN_LBN	48	etherfabric.c
20181	EF1_RX_EV_LEN_WIDTH	16	etherfabric.c
20182	EF1_RX_EV_PORT_LBN	17	etherfabric.c
20183	EF1_RX_EV_PORT_WIDTH	3	etherfabric.c
20184	EF1_RX_EV_OK_LBN	16	etherfabric.c
20185	EF1_RX_EV_OK_WIDTH	1	etherfabric.c
20186	EF1_RX_EV_IDX_LBN	0	etherfabric.c
20187	EF1_RX_EV_IDX_WIDTH	16	etherfabric.c
20188	EF1_TX_EV_PORT_LBN	17	etherfabric.c
20189	EF1_TX_EV_PORT_WIDTH	3	etherfabric.c
20190	EF1_TX_EV_OK_LBN	16	etherfabric.c
20191	EF1_TX_EV_OK_WIDTH	1	etherfabric.c
20192	EF1_TX_EV_IDX_LBN	0	etherfabric.c
20193	EF1_TX_EV_IDX_WIDTH	16	etherfabric.c
20194	EF1_EEPROM_I2C_ID	0x50	etherfabric.c
20195	EF1_EEPROM_HWADDR_OFFSET	0x0	etherfabric.c
20196	EFAB_NUM_PCI_REG	( sizeof ( efab_pci_reg_addr ) / sizeof ( efab_pci_reg_addr[0] ) )	etherfabric.c
20197	FCN_IOM_IND_ADR_REG	0x0	etherfabric.c
20198	FCN_IOM_IND_DAT_REG	0x4	etherfabric.c
20199	FCN_INT_EN_REG_KER	0x0010	etherfabric.c
20200	FCN_MEM_PERR_INT_EN_KER_LBN	5	etherfabric.c
20201	FCN_MEM_PERR_INT_EN_KER_WIDTH	1	etherfabric.c
20202	FCN_KER_INT_CHAR_LBN	4	etherfabric.c
20203	FCN_KER_INT_CHAR_WIDTH	1	etherfabric.c
20204	FCN_KER_INT_KER_LBN	3	etherfabric.c
20205	FCN_KER_INT_KER_WIDTH	1	etherfabric.c
20206	FCN_ILL_ADR_ERR_INT_EN_KER_LBN	2	etherfabric.c
20207	FCN_ILL_ADR_ERR_INT_EN_KER_WIDT	1	etherfabric.c
20208	FCN_SRM_PERR_INT_EN_KER_LBN	1	etherfabric.c
20209	FCN_SRM_PERR_INT_EN_KER_WIDTH	1	etherfabric.c
20210	FCN_DRV_INT_EN_KER_LBN	0	etherfabric.c
20211	FCN_DRV_INT_EN_KER_WIDTH	1	etherfabric.c
20212	FCN_INT_ADR_REG_KER	0x0030	etherfabric.c
20213	FCN_INT_ADR_KER_LBN	0	etherfabric.c
20214	FCN_INT_ADR_KER_WIDTH	EFAB_DMA_TYPE_WIDTH ( 64 )	etherfabric.c
20215	FCN_INT_ACK_KER_REG	0x0050	etherfabric.c
20216	FCN_EE_SPI_HCMD_REG_KER	0x0100	etherfabric.c
20217	FCN_EE_SPI_HCMD_CMD_EN_LBN	31	etherfabric.c
20218	FCN_EE_SPI_HCMD_CMD_EN_WIDTH	1	etherfabric.c
20219	FCN_EE_WR_TIMER_ACTIVE_LBN	28	etherfabric.c
20220	FCN_EE_WR_TIMER_ACTIVE_WIDTH	1	etherfabric.c
20221	FCN_EE_SPI_HCMD_SF_SEL_LBN	24	etherfabric.c
20222	FCN_EE_SPI_HCMD_SF_SEL_WIDTH	1	etherfabric.c
20223	FCN_EE_SPI_EEPROM	0	etherfabric.c
20224	FCN_EE_SPI_FLASH	1	etherfabric.c
20225	FCN_EE_SPI_HCMD_DABCNT_LBN	16	etherfabric.c
20226	FCN_EE_SPI_HCMD_DABCNT_WIDTH	5	etherfabric.c
20227	FCN_EE_SPI_HCMD_READ_LBN	15	etherfabric.c
20228	FCN_EE_SPI_HCMD_READ_WIDTH	1	etherfabric.c
20229	FCN_EE_SPI_READ	1	etherfabric.c
20230	FCN_EE_SPI_WRITE	0	etherfabric.c
20231	FCN_EE_SPI_HCMD_DUBCNT_LBN	12	etherfabric.c
20232	FCN_EE_SPI_HCMD_DUBCNT_WIDTH	2	etherfabric.c
20233	FCN_EE_SPI_HCMD_ADBCNT_LBN	8	etherfabric.c
20234	FCN_EE_SPI_HCMD_ADBCNT_WIDTH	2	etherfabric.c
20235	FCN_EE_SPI_HCMD_ENC_LBN	0	etherfabric.c
20236	FCN_EE_SPI_HCMD_ENC_WIDTH	8	etherfabric.c
20237	FCN_EE_SPI_HADR_REG_KER	0x0110	etherfabric.c
20238	FCN_EE_SPI_HADR_DUBYTE_LBN	24	etherfabric.c
20239	FCN_EE_SPI_HADR_DUBYTE_WIDTH	8	etherfabric.c
20240	FCN_EE_SPI_HADR_ADR_LBN	0	etherfabric.c
20241	FCN_EE_SPI_HADR_ADR_WIDTH	24	etherfabric.c
20242	FCN_EE_SPI_HDATA_REG_KER	0x0120	etherfabric.c
20243	FCN_EE_SPI_HDATA3_LBN	96	etherfabric.c
20244	FCN_EE_SPI_HDATA3_WIDTH	32	etherfabric.c
20245	FCN_EE_SPI_HDATA2_LBN	64	etherfabric.c
20246	FCN_EE_SPI_HDATA2_WIDTH	32	etherfabric.c
20247	FCN_EE_SPI_HDATA1_LBN	32	etherfabric.c
20248	FCN_EE_SPI_HDATA1_WIDTH	32	etherfabric.c
20249	FCN_EE_SPI_HDATA0_LBN	0	etherfabric.c
20250	FCN_EE_SPI_HDATA0_WIDTH	32	etherfabric.c
20251	FCN_VPD_CONFIG_REG_KER	0x0140	etherfabric.c
20252	FCN_VPD_9BIT_LBN	1	etherfabric.c
20253	FCN_VPD_9BIT_WIDTH	1	etherfabric.c
20254	FCN_NIC_STAT_REG	0x0200	etherfabric.c
20255	ONCHIP_SRAM_LBN	16	etherfabric.c
20256	ONCHIP_SRAM_WIDTH	1	etherfabric.c
20257	SF_PRST_LBN	9	etherfabric.c
20258	SF_PRST_WIDTH	1	etherfabric.c
20259	EE_PRST_LBN	8	etherfabric.c
20260	EE_PRST_WIDTH	1	etherfabric.c
20261	EE_STRAP_LBN	7	etherfabric.c
20262	EE_STRAP_WIDTH	1	etherfabric.c
20263	PCI_PCIX_MODE_LBN	4	etherfabric.c
20264	PCI_PCIX_MODE_WIDTH	3	etherfabric.c
20265	PCI_PCIX_MODE_PCI33_DECODE	0	etherfabric.c
20266	PCI_PCIX_MODE_PCI66_DECODE	1	etherfabric.c
20267	PCI_PCIX_MODE_PCIX66_DECODE	5	etherfabric.c
20268	PCI_PCIX_MODE_PCIX100_DECODE	6	etherfabric.c
20269	PCI_PCIX_MODE_PCIX133_DECODE	7	etherfabric.c
20270	STRAP_ISCSI_EN_LBN	3	etherfabric.c
20271	STRAP_ISCSI_EN_WIDTH	1	etherfabric.c
20272	STRAP_PINS_LBN	0	etherfabric.c
20273	STRAP_PINS_WIDTH	3	etherfabric.c
20274	STRAP_10G_LBN	2	etherfabric.c
20275	STRAP_10G_WIDTH	1	etherfabric.c
20276	STRAP_DUAL_PORT_LBN	1	etherfabric.c
20277	STRAP_DUAL_PORT_WIDTH	1	etherfabric.c
20278	STRAP_PCIE_LBN	0	etherfabric.c
20279	STRAP_PCIE_WIDTH	1	etherfabric.c
20280	FCN_GPIO_CTL_REG_KER	0x0210	etherfabric.c
20281	FCN_FLASH_PRESENT_LBN	7	etherfabric.c
20282	FCN_FLASH_PRESENT_WIDTH	1	etherfabric.c
20283	FCN_EEPROM_PRESENT_LBN	6	etherfabric.c
20284	FCN_EEPROM_PRESENT_WIDTH	1	etherfabric.c
20285	FCN_GLB_CTL_REG_KER	0x0220	etherfabric.c
20286	EXT_PHY_RST_CTL_LBN	63	etherfabric.c
20287	EXT_PHY_RST_CTL_WIDTH	1	etherfabric.c
20288	PCIE_SD_RST_CTL_LBN	61	etherfabric.c
20289	PCIE_SD_RST_CTL_WIDTH	1	etherfabric.c
20290	PCIX_RST_CTL_LBN	60	etherfabric.c
20291	PCIX_RST_CTL_WIDTH	1	etherfabric.c
20292	PCIE_STCK_RST_CTL_LBN	59	etherfabric.c
20293	PCIE_STCK_RST_CTL_WIDTH	1	etherfabric.c
20294	PCIE_NSTCK_RST_CTL_LBN	58	etherfabric.c
20295	PCIE_NSTCK_RST_CTL_WIDTH	1	etherfabric.c
20296	PCIE_CORE_RST_CTL_LBN	57	etherfabric.c
20297	PCIE_CORE_RST_CTL_WIDTH	1	etherfabric.c
20298	EE_RST_CTL_LBN	49	etherfabric.c
20299	EE_RST_CTL_WIDTH	1	etherfabric.c
20300	CS_RST_CTL_LBN	48	etherfabric.c
20301	CS_RST_CTL_WIDTH	1	etherfabric.c
20302	RST_EXT_PHY_LBN	31	etherfabric.c
20303	RST_EXT_PHY_WIDTH	1	etherfabric.c
20304	INT_RST_DUR_LBN	4	etherfabric.c
20305	INT_RST_DUR_WIDTH	3	etherfabric.c
20306	EXT_PHY_RST_DUR_LBN	1	etherfabric.c
20307	EXT_PHY_RST_DUR_WIDTH	3	etherfabric.c
20308	SWRST_LBN	0	etherfabric.c
20309	SWRST_WIDTH	1	etherfabric.c
20310	INCLUDE_IN_RESET	0	etherfabric.c
20311	EXCLUDE_FROM_RESET	1	etherfabric.c
20312	ALTERA_BUILD_REG_KER	0x0300	etherfabric.c
20313	VER_MAJOR_LBN	24	etherfabric.c
20314	VER_MAJOR_WIDTH	8	etherfabric.c
20315	VER_MINOR_LBN	16	etherfabric.c
20316	VER_MINOR_WIDTH	8	etherfabric.c
20317	VER_BUILD_LBN	0	etherfabric.c
20318	VER_BUILD_WIDTH	16	etherfabric.c
20319	VER_ALL_LBN	0	etherfabric.c
20320	VER_ALL_WIDTH	32	etherfabric.c
20321	FCN_TIMER_CMD_REG_KER	0x420	etherfabric.c
20322	FCN_TIMER_MODE_LBN	12	etherfabric.c
20323	FCN_TIMER_MODE_WIDTH	2	etherfabric.c
20324	FCN_TIMER_MODE_DIS	0	etherfabric.c
20325	FCN_TIMER_MODE_INT_HLDOFF	1	etherfabric.c
20326	FCN_TIMER_VAL_LBN	0	etherfabric.c
20327	FCN_TIMER_VAL_WIDTH	12	etherfabric.c
20328	FCN_RX_CFG_REG_KER	0x800	etherfabric.c
20329	FCN_RX_XOFF_EN_LBN	0	etherfabric.c
20330	FCN_RX_XOFF_EN_WIDTH	1	etherfabric.c
20331	FCN_SRM_RX_DC_CFG_REG_KER	0x610	etherfabric.c
20332	FCN_SRM_RX_DC_BASE_ADR_LBN	0	etherfabric.c
20333	FCN_SRM_RX_DC_BASE_ADR_WIDTH	21	etherfabric.c
20334	FCN_SRM_TX_DC_CFG_REG_KER	0x620	etherfabric.c
20335	FCN_SRM_TX_DC_BASE_ADR_LBN	0	etherfabric.c
20336	FCN_SRM_TX_DC_BASE_ADR_WIDTH	21	etherfabric.c
20337	FCN_RX_FILTER_CTL_REG_KER	0x810	etherfabric.c
20338	FCN_NUM_KER_LBN	24	etherfabric.c
20339	FCN_NUM_KER_WIDTH	2	etherfabric.c
20340	FCN_RX_DESC_UPD_REG_KER	0x0830	etherfabric.c
20341	FCN_RX_DESC_WPTR_LBN	96	etherfabric.c
20342	FCN_RX_DESC_WPTR_WIDTH	12	etherfabric.c
20343	FCN_RX_DESC_UPD_REG_KER_DWORD	( FCN_RX_DESC_UPD_REG_KER + 12 )	etherfabric.c
20344	FCN_RX_DESC_WPTR_DWORD_LBN	0	etherfabric.c
20345	FCN_RX_DESC_WPTR_DWORD_WIDTH	12	etherfabric.c
20346	FCN_RX_DC_CFG_REG_KER	0x840	etherfabric.c
20347	FCN_RX_DC_SIZE_LBN	0	etherfabric.c
20348	FCN_RX_DC_SIZE_WIDTH	2	etherfabric.c
20349	FCN_TX_DESC_UPD_REG_KER	0x0a10	etherfabric.c
20350	FCN_TX_DESC_WPTR_LBN	96	etherfabric.c
20351	FCN_TX_DESC_WPTR_WIDTH	12	etherfabric.c
20352	FCN_TX_DESC_UPD_REG_KER_DWORD	( FCN_TX_DESC_UPD_REG_KER + 12 )	etherfabric.c
20353	FCN_TX_DESC_WPTR_DWORD_LBN	0	etherfabric.c
20354	FCN_TX_DESC_WPTR_DWORD_WIDTH	12	etherfabric.c
20355	FCN_TX_DC_CFG_REG_KER	0xa20	etherfabric.c
20356	FCN_TX_DC_SIZE_LBN	0	etherfabric.c
20357	FCN_TX_DC_SIZE_WIDTH	2	etherfabric.c
20358	FCN_MD_TXD_REG_KER	0xc00	etherfabric.c
20359	FCN_MD_TXD_LBN	0	etherfabric.c
20360	FCN_MD_TXD_WIDTH	16	etherfabric.c
20361	FCN_MD_RXD_REG_KER	0xc10	etherfabric.c
20362	FCN_MD_RXD_LBN	0	etherfabric.c
20363	FCN_MD_RXD_WIDTH	16	etherfabric.c
20364	FCN_MD_CS_REG_KER	0xc20	etherfabric.c
20365	FCN_MD_GC_LBN	4	etherfabric.c
20366	FCN_MD_GC_WIDTH	1	etherfabric.c
20367	FCN_MD_RIC_LBN	2	etherfabric.c
20368	FCN_MD_RIC_WIDTH	1	etherfabric.c
20369	FCN_MD_WRC_LBN	0	etherfabric.c
20370	FCN_MD_WRC_WIDTH	1	etherfabric.c
20371	FCN_MD_PHY_ADR_REG_KER	0xc30	etherfabric.c
20372	FCN_MD_PHY_ADR_LBN	0	etherfabric.c
20373	FCN_MD_PHY_ADR_WIDTH	16	etherfabric.c
20374	FCN_MD_ID_REG_KER	0xc40	etherfabric.c
20375	FCN_MD_PRT_ADR_LBN	11	etherfabric.c
20376	FCN_MD_PRT_ADR_WIDTH	5	etherfabric.c
20377	FCN_MD_DEV_ADR_LBN	6	etherfabric.c
20378	FCN_MD_DEV_ADR_WIDTH	5	etherfabric.c
20379	FCN_MD_STAT_REG_KER	0xc50	etherfabric.c
20380	FCN_MD_BSY_LBN	0	etherfabric.c
20381	FCN_MD_BSY_WIDTH	1	etherfabric.c
20382	FCN_MAC0_CTRL_REG_KER	0xc80	etherfabric.c
20383	FCN_MAC1_CTRL_REG_KER	0xc90	etherfabric.c
20384	FCN_MAC_XOFF_VAL_LBN	16	etherfabric.c
20385	FCN_MAC_XOFF_VAL_WIDTH	16	etherfabric.c
20386	FCN_MAC_BCAD_ACPT_LBN	4	etherfabric.c
20387	FCN_MAC_BCAD_ACPT_WIDTH	1	etherfabric.c
20388	FCN_MAC_UC_PROM_LBN	3	etherfabric.c
20389	FCN_MAC_UC_PROM_WIDTH	1	etherfabric.c
20390	FCN_MAC_LINK_STATUS_LBN	2	etherfabric.c
20391	FCN_MAC_LINK_STATUS_WIDTH	1	etherfabric.c
20392	FCN_MAC_SPEED_LBN	0	etherfabric.c
20393	FCN_MAC_SPEED_WIDTH	2	etherfabric.c
20394	FALCON_GMAC_REGBANK	0xe00	etherfabric.c
20395	FALCON_GMAC_REGBANK_SIZE	0x200	etherfabric.c
20396	FALCON_GMAC_REG_SIZE	0x10	etherfabric.c
20397	FALCON_XMAC_REGBANK	0x1200	etherfabric.c
20398	FALCON_XMAC_REGBANK_SIZE	0x200	etherfabric.c
20399	FALCON_XMAC_REG_SIZE	0x10	etherfabric.c
20400	FCN_XM_ADR_LO_REG_MAC	0x00	etherfabric.c
20401	FCN_XM_ADR_3_LBN	24	etherfabric.c
20402	FCN_XM_ADR_3_WIDTH	8	etherfabric.c
20403	FCN_XM_ADR_2_LBN	16	etherfabric.c
20404	FCN_XM_ADR_2_WIDTH	8	etherfabric.c
20405	FCN_XM_ADR_1_LBN	8	etherfabric.c
20406	FCN_XM_ADR_1_WIDTH	8	etherfabric.c
20407	FCN_XM_ADR_0_LBN	0	etherfabric.c
20408	FCN_XM_ADR_0_WIDTH	8	etherfabric.c
20409	FCN_XM_ADR_HI_REG_MAC	0x01	etherfabric.c
20410	FCN_XM_ADR_5_LBN	8	etherfabric.c
20411	FCN_XM_ADR_5_WIDTH	8	etherfabric.c
20412	FCN_XM_ADR_4_LBN	0	etherfabric.c
20413	FCN_XM_ADR_4_WIDTH	8	etherfabric.c
20414	FCN_XM_GLB_CFG_REG_MAC	0x02	etherfabric.c
20415	FCN_XM_RX_STAT_EN_LBN	11	etherfabric.c
20416	FCN_XM_RX_STAT_EN_WIDTH	1	etherfabric.c
20417	FCN_XM_TX_STAT_EN_LBN	10	etherfabric.c
20418	FCN_XM_TX_STAT_EN_WIDTH	1	etherfabric.c
20419	FCN_XM_RX_JUMBO_MODE_LBN	6	etherfabric.c
20420	FCN_XM_RX_JUMBO_MODE_WIDTH	1	etherfabric.c
20421	FCN_XM_CORE_RST_LBN	0	etherfabric.c
20422	FCN_XM_CORE_RST_WIDTH	1	etherfabric.c
20423	FCN_XM_TX_CFG_REG_MAC	0x03	etherfabric.c
20424	FCN_XM_IPG_LBN	16	etherfabric.c
20425	FCN_XM_IPG_WIDTH	4	etherfabric.c
20426	FCN_XM_FCNTL_LBN	10	etherfabric.c
20427	FCN_XM_FCNTL_WIDTH	1	etherfabric.c
20428	FCN_XM_TXCRC_LBN	8	etherfabric.c
20429	FCN_XM_TXCRC_WIDTH	1	etherfabric.c
20430	FCN_XM_AUTO_PAD_LBN	5	etherfabric.c
20431	FCN_XM_AUTO_PAD_WIDTH	1	etherfabric.c
20432	FCN_XM_TX_PRMBL_LBN	2	etherfabric.c
20433	FCN_XM_TX_PRMBL_WIDTH	1	etherfabric.c
20434	FCN_XM_TXEN_LBN	1	etherfabric.c
20435	FCN_XM_TXEN_WIDTH	1	etherfabric.c
20436	FCN_XM_RX_CFG_REG_MAC	0x04	etherfabric.c
20437	FCN_XM_PASS_CRC_ERR_LBN	25	etherfabric.c
20438	FCN_XM_PASS_CRC_ERR_WIDTH	1	etherfabric.c
20439	FCN_XM_AUTO_DEPAD_LBN	8	etherfabric.c
20440	FCN_XM_AUTO_DEPAD_WIDTH	1	etherfabric.c
20441	FCN_XM_RXEN_LBN	1	etherfabric.c
20442	FCN_XM_RXEN_WIDTH	1	etherfabric.c
20443	FCN_XM_TX_PARAM_REG_MAC	0x0d	etherfabric.c
20444	FCN_XM_TX_JUMBO_MODE_LBN	31	etherfabric.c
20445	FCN_XM_TX_JUMBO_MODE_WIDTH	1	etherfabric.c
20446	FCN_XM_MAX_TX_FRM_SIZE_LBN	16	etherfabric.c
20447	FCN_XM_MAX_TX_FRM_SIZE_WIDTH	14	etherfabric.c
20448	FCN_XM_RX_PARAM_REG_MAC	0x0e	etherfabric.c
20449	FCN_XM_MAX_RX_FRM_SIZE_LBN	0	etherfabric.c
20450	FCN_XM_MAX_RX_FRM_SIZE_WIDTH	14	etherfabric.c
20451	FCN_XX_ALIGN_DONE_LBN	20	etherfabric.c
20452	FCN_XX_ALIGN_DONE_WIDTH	1	etherfabric.c
20453	FCN_XX_CORE_STAT_REG_MAC	0x16	etherfabric.c
20454	FCN_XX_SYNC_STAT_LBN	16	etherfabric.c
20455	FCN_XX_SYNC_STAT_WIDTH	4	etherfabric.c
20456	FCN_XX_SYNC_STAT_DECODE_SYNCED	0xf	etherfabric.c
20457	FCN_XX_COMMA_DET_LBN	12	etherfabric.c
20458	FCN_XX_COMMA_DET_WIDTH	4	etherfabric.c
20459	FCN_XX_COMMA_DET_RESET	0xf	etherfabric.c
20460	FCN_XX_PWR_RST_REG_MAC	0x10	etherfabric.c
20461	FCN_XX_RSTXGXSRX_EN_LBN	2	etherfabric.c
20462	FCN_XX_RSTXGXSRX_EN_WIDTH	1	etherfabric.c
20463	FCN_XX_RSTXGXSTX_EN_LBN	1	etherfabric.c
20464	FCN_XX_RSTXGXSTX_EN_WIDTH	1	etherfabric.c
20465	FCN_XX_RST_XX_EN_LBN	0	etherfabric.c
20466	FCN_XX_RST_XX_EN_WIDTH	1	etherfabric.c
20467	FCN_RX_DESC_PTR_TBL_KER	0x11800	etherfabric.c
20468	FCN_RX_DESCQ_BUF_BASE_ID_LBN	36	etherfabric.c
20469	FCN_RX_DESCQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
20470	FCN_RX_DESCQ_EVQ_ID_LBN	24	etherfabric.c
20471	FCN_RX_DESCQ_EVQ_ID_WIDTH	12	etherfabric.c
20472	FCN_RX_DESCQ_OWNER_ID_LBN	10	etherfabric.c
20473	FCN_RX_DESCQ_OWNER_ID_WIDTH	14	etherfabric.c
20474	FCN_RX_DESCQ_SIZE_LBN	3	etherfabric.c
20475	FCN_RX_DESCQ_SIZE_WIDTH	2	etherfabric.c
20476	FCN_RX_DESCQ_SIZE_4K	3	etherfabric.c
20477	FCN_RX_DESCQ_SIZE_2K	2	etherfabric.c
20478	FCN_RX_DESCQ_SIZE_1K	1	etherfabric.c
20479	FCN_RX_DESCQ_SIZE_512	0	etherfabric.c
20480	FCN_RX_DESCQ_TYPE_LBN	2	etherfabric.c
20481	FCN_RX_DESCQ_TYPE_WIDTH	1	etherfabric.c
20482	FCN_RX_DESCQ_JUMBO_LBN	1	etherfabric.c
20483	FCN_RX_DESCQ_JUMBO_WIDTH	1	etherfabric.c
20484	FCN_RX_DESCQ_EN_LBN	0	etherfabric.c
20485	FCN_RX_DESCQ_EN_WIDTH	1	etherfabric.c
20486	FCN_TX_DESC_PTR_TBL_KER	0x11900	etherfabric.c
20487	FCN_TX_DESCQ_EN_LBN	88	etherfabric.c
20488	FCN_TX_DESCQ_EN_WIDTH	1	etherfabric.c
20489	FCN_TX_DESCQ_BUF_BASE_ID_LBN	36	etherfabric.c
20490	FCN_TX_DESCQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
20491	FCN_TX_DESCQ_EVQ_ID_LBN	24	etherfabric.c
20492	FCN_TX_DESCQ_EVQ_ID_WIDTH	12	etherfabric.c
20493	FCN_TX_DESCQ_OWNER_ID_LBN	10	etherfabric.c
20494	FCN_TX_DESCQ_OWNER_ID_WIDTH	14	etherfabric.c
20495	FCN_TX_DESCQ_SIZE_LBN	3	etherfabric.c
20496	FCN_TX_DESCQ_SIZE_WIDTH	2	etherfabric.c
20497	FCN_TX_DESCQ_SIZE_4K	3	etherfabric.c
20498	FCN_TX_DESCQ_SIZE_2K	2	etherfabric.c
20499	FCN_TX_DESCQ_SIZE_1K	1	etherfabric.c
20500	FCN_TX_DESCQ_SIZE_512	0	etherfabric.c
20501	FCN_TX_DESCQ_TYPE_LBN	1	etherfabric.c
20502	FCN_TX_DESCQ_TYPE_WIDTH	2	etherfabric.c
20503	FCN_TX_DESCQ_FLUSH_LBN	0	etherfabric.c
20504	FCN_TX_DESCQ_FLUSH_WIDTH	1	etherfabric.c
20505	FCN_EVQ_PTR_TBL_KER	0x11a00	etherfabric.c
20506	FCN_EVQ_EN_LBN	23	etherfabric.c
20507	FCN_EVQ_EN_WIDTH	1	etherfabric.c
20508	FCN_EVQ_SIZE_LBN	20	etherfabric.c
20509	FCN_EVQ_SIZE_WIDTH	3	etherfabric.c
20510	FCN_EVQ_SIZE_32K	6	etherfabric.c
20511	FCN_EVQ_SIZE_16K	5	etherfabric.c
20512	FCN_EVQ_SIZE_8K	4	etherfabric.c
20513	FCN_EVQ_SIZE_4K	3	etherfabric.c
20514	FCN_EVQ_SIZE_2K	2	etherfabric.c
20515	FCN_EVQ_SIZE_1K	1	etherfabric.c
20516	FCN_EVQ_SIZE_512	0	etherfabric.c
20517	FCN_EVQ_BUF_BASE_ID_LBN	0	etherfabric.c
20518	FCN_EVQ_BUF_BASE_ID_WIDTH	20	etherfabric.c
20519	FCN_EVQ_RPTR_REG_KER	0x11b00	etherfabric.c
20520	FCN_EVQ_RPTR_LBN	0	etherfabric.c
20521	FCN_EVQ_RPTR_WIDTH	14	etherfabric.c
20522	FCN_EVQ_RPTR_REG_KER_DWORD	( FCN_EVQ_RPTR_REG_KER + 0 )	etherfabric.c
20523	FCN_EVQ_RPTR_DWORD_LBN	0	etherfabric.c
20524	FCN_EVQ_RPTR_DWORD_WIDTH	14	etherfabric.c
20525	FCN_BUF_FULL_TBL_KER	0x18000	etherfabric.c
20526	FCN_IP_DAT_BUF_SIZE_LBN	50	etherfabric.c
20527	FCN_IP_DAT_BUF_SIZE_WIDTH	1	etherfabric.c
20528	FCN_IP_DAT_BUF_SIZE_8K	1	etherfabric.c
20529	FCN_IP_DAT_BUF_SIZE_4K	0	etherfabric.c
20530	FCN_BUF_ADR_FBUF_LBN	14	etherfabric.c
20531	FCN_BUF_ADR_FBUF_WIDTH	34	etherfabric.c
20532	FCN_BUF_OWNER_ID_FBUF_LBN	0	etherfabric.c
20533	FCN_BUF_OWNER_ID_FBUF_WIDTH	14	etherfabric.c
20534	FCN_MAC_DATA_LBN	0	etherfabric.c
20535	FCN_MAC_DATA_WIDTH	32	etherfabric.c
20536	FCN_TX_KER_PORT_LBN	63	etherfabric.c
20537	FCN_TX_KER_PORT_WIDTH	1	etherfabric.c
20538	FCN_TX_KER_BYTE_CNT_LBN	48	etherfabric.c
20539	FCN_TX_KER_BYTE_CNT_WIDTH	14	etherfabric.c
20540	FCN_TX_KER_BUF_ADR_LBN	0	etherfabric.c
20541	FCN_TX_KER_BUF_ADR_WIDTH	EFAB_DMA_TYPE_WIDTH ( 46 )	etherfabric.c
20542	FCN_RX_KER_BUF_SIZE_LBN	48	etherfabric.c
20543	FCN_RX_KER_BUF_SIZE_WIDTH	14	etherfabric.c
20544	FCN_RX_KER_BUF_ADR_LBN	0	etherfabric.c
20545	FCN_RX_KER_BUF_ADR_WIDTH	EFAB_DMA_TYPE_WIDTH ( 46 )	etherfabric.c
20546	FCN_EV_CODE_LBN	60	etherfabric.c
20547	FCN_EV_CODE_WIDTH	4	etherfabric.c
20548	FCN_RX_IP_EV_DECODE	0	etherfabric.c
20549	FCN_TX_IP_EV_DECODE	2	etherfabric.c
20550	FCN_DRIVER_EV_DECODE	5	etherfabric.c
20551	FCN_RX_EV_PKT_OK_LBN	56	etherfabric.c
20552	FCN_RX_EV_PKT_OK_WIDTH	1	etherfabric.c
20553	FCN_RX_PORT_LBN	30	etherfabric.c
20554	FCN_RX_PORT_WIDTH	1	etherfabric.c
20555	FCN_RX_EV_BYTE_CNT_LBN	16	etherfabric.c
20556	FCN_RX_EV_BYTE_CNT_WIDTH	14	etherfabric.c
20557	FCN_RX_EV_DESC_PTR_LBN	0	etherfabric.c
20558	FCN_RX_EV_DESC_PTR_WIDTH	12	etherfabric.c
20559	FCN_TX_EV_DESC_PTR_LBN	0	etherfabric.c
20560	FCN_TX_EV_DESC_PTR_WIDTH	12	etherfabric.c
20561	FALCON_EVQ_ID	0	etherfabric.c
20562	FALCON_TXD_ID	1	etherfabric.c
20563	FALCON_RXD_ID	2	etherfabric.c
20564	drv_version	"v1.2"	forcedeth.c
20565	drv_date	"05-14-2005"	forcedeth.c
20566	ETH_DATA_LEN	1500	forcedeth.c
20567	PCI_DEVICE_ID_NVIDIA_NVENET_1	0x01c3	forcedeth.c
20568	PCI_DEVICE_ID_NVIDIA_NVENET_2	0x0066	forcedeth.c
20569	PCI_DEVICE_ID_NVIDIA_NVENET_4	0x0086	forcedeth.c
20570	PCI_DEVICE_ID_NVIDIA_NVENET_5	0x008c	forcedeth.c
20571	PCI_DEVICE_ID_NVIDIA_NVENET_3	0x00d6	forcedeth.c
20572	PCI_DEVICE_ID_NVIDIA_NVENET_7	0x00df	forcedeth.c
20573	PCI_DEVICE_ID_NVIDIA_NVENET_6	0x00e6	forcedeth.c
20574	PCI_DEVICE_ID_NVIDIA_NVENET_8	0x0056	forcedeth.c
20575	PCI_DEVICE_ID_NVIDIA_NVENET_9	0x0057	forcedeth.c
20576	PCI_DEVICE_ID_NVIDIA_NVENET_10	0x0037	forcedeth.c
20577	PCI_DEVICE_ID_NVIDIA_NVENET_11	0x0038	forcedeth.c
20578	PCI_DEVICE_ID_NVIDIA_NVENET_15	0x0373	forcedeth.c
20579	DEV_NEED_LASTPACKET1	0x0001	forcedeth.c	set LASTPACKET1 in tx flags
20580	DEV_IRQMASK_1	0x0002	forcedeth.c	use NVREG_IRQMASK_WANTED_1 for irq mask
20581	DEV_IRQMASK_2	0x0004	forcedeth.c	use NVREG_IRQMASK_WANTED_2 for irq mask
20582	DEV_NEED_TIMERIRQ	0x0008	forcedeth.c	set the timer irq flag in the irq mask
20583	DEV_NEED_LINKTIMER	0x0010	forcedeth.c	poll link settings. Relies on the timer irq
20584	FLAG_MASK_V1	0xffff0000	forcedeth.c
20585	FLAG_MASK_V2	0xffffc000	forcedeth.c
20586	LEN_MASK_V1	(0xffffffff ^ FLAG_MASK_V1)	forcedeth.c
20587	LEN_MASK_V2	(0xffffffff ^ FLAG_MASK_V2)	forcedeth.c
20588	NV_TX_LASTPACKET	(1<<16)	forcedeth.c
20589	NV_TX_RETRYERROR	(1<<19)	forcedeth.c
20590	NV_TX_LASTPACKET1	(1<<24)	forcedeth.c
20591	NV_TX_DEFERRED	(1<<26)	forcedeth.c
20592	NV_TX_CARRIERLOST	(1<<27)	forcedeth.c
20593	NV_TX_LATECOLLISION	(1<<28)	forcedeth.c
20594	NV_TX_UNDERFLOW	(1<<29)	forcedeth.c
20595	NV_TX_ERROR	(1<<30)	forcedeth.c
20596	NV_TX_VALID	(1<<31)	forcedeth.c
20597	NV_TX2_LASTPACKET	(1<<29)	forcedeth.c
20598	NV_TX2_RETRYERROR	(1<<18)	forcedeth.c
20599	NV_TX2_LASTPACKET1	(1<<23)	forcedeth.c
20600	NV_TX2_DEFERRED	(1<<25)	forcedeth.c
20601	NV_TX2_CARRIERLOST	(1<<26)	forcedeth.c
20602	NV_TX2_LATECOLLISION	(1<<27)	forcedeth.c
20603	NV_TX2_UNDERFLOW	(1<<28)	forcedeth.c
20604	NV_TX2_ERROR	(1<<30)	forcedeth.c
20605	NV_TX2_VALID	(1<<31)	forcedeth.c
20606	NV_RX_DESCRIPTORVALID	(1<<16)	forcedeth.c
20607	NV_RX_MISSEDFRAME	(1<<17)	forcedeth.c
20608	NV_RX_SUBSTRACT1	(1<<18)	forcedeth.c
20609	NV_RX_ERROR1	(1<<23)	forcedeth.c
20610	NV_RX_ERROR2	(1<<24)	forcedeth.c
20611	NV_RX_ERROR3	(1<<25)	forcedeth.c
20612	NV_RX_ERROR4	(1<<26)	forcedeth.c
20613	NV_RX_CRCERR	(1<<27)	forcedeth.c
20614	NV_RX_OVERFLOW	(1<<28)	forcedeth.c
20615	NV_RX_FRAMINGERR	(1<<29)	forcedeth.c
20616	NV_RX_ERROR	(1<<30)	forcedeth.c
20617	NV_RX_AVAIL	(1<<31)	forcedeth.c
20618	NV_RX2_CHECKSUMMASK	(0x1C000000)	forcedeth.c
20619	NV_RX2_CHECKSUMOK1	(0x10000000)	forcedeth.c
20620	NV_RX2_CHECKSUMOK2	(0x14000000)	forcedeth.c
20621	NV_RX2_CHECKSUMOK3	(0x18000000)	forcedeth.c
20622	NV_RX2_DESCRIPTORVALID	(1<<29)	forcedeth.c
20623	NV_RX2_SUBSTRACT1	(1<<25)	forcedeth.c
20624	NV_RX2_ERROR1	(1<<18)	forcedeth.c
20625	NV_RX2_ERROR2	(1<<19)	forcedeth.c
20626	NV_RX2_ERROR3	(1<<20)	forcedeth.c
20627	NV_RX2_ERROR4	(1<<21)	forcedeth.c
20628	NV_RX2_CRCERR	(1<<22)	forcedeth.c
20629	NV_RX2_OVERFLOW	(1<<23)	forcedeth.c
20630	NV_RX2_FRAMINGERR	(1<<24)	forcedeth.c
20631	NV_RX2_ERROR	(1<<30)	forcedeth.c
20632	NV_RX2_AVAIL	(1<<31)	forcedeth.c
20633	NV_PCI_REGSZ	0x270	forcedeth.c
20634	NV_TXRX_RESET_DELAY	4	forcedeth.c
20635	NV_TXSTOP_DELAY1	10	forcedeth.c
20636	NV_TXSTOP_DELAY1MAX	500000	forcedeth.c
20637	NV_TXSTOP_DELAY2	100	forcedeth.c
20638	NV_RXSTOP_DELAY1	10	forcedeth.c
20639	NV_RXSTOP_DELAY1MAX	500000	forcedeth.c
20640	NV_RXSTOP_DELAY2	100	forcedeth.c
20641	NV_SETUP5_DELAY	5	forcedeth.c
20642	NV_SETUP5_DELAYMAX	50000	forcedeth.c
20643	NV_POWERUP_DELAY	5	forcedeth.c
20644	NV_POWERUP_DELAYMAX	5000	forcedeth.c
20645	NV_MIIBUSY_DELAY	50	forcedeth.c
20646	NV_MIIPHY_DELAY	10	forcedeth.c
20647	NV_MIIPHY_DELAYMAX	10000	forcedeth.c
20648	NV_WAKEUPPATTERNS	5	forcedeth.c
20649	NV_WAKEUPMASKENTRIES	4	forcedeth.c
20650	NV_WATCHDOG_TIMEO	(5*HZ)	forcedeth.c
20651	RX_RING	4	forcedeth.c
20652	TX_RING	2	forcedeth.c
20653	TX_LIMIT_STOP	63	forcedeth.c
20654	TX_LIMIT_START	62	forcedeth.c
20655	RX_NIC_BUFSIZE	(ETH_DATA_LEN + 64)	forcedeth.c
20656	RX_ALLOC_BUFSIZE	(ETH_DATA_LEN + 128)	forcedeth.c
20657	OOM_REFILL	(1+HZ/20)	forcedeth.c
20658	POLL_WAIT	(1+HZ/100)	forcedeth.c
20659	LINK_TIMEOUT	(3*HZ)	forcedeth.c
20660	DESC_VER_1	0x0	forcedeth.c
20661	DESC_VER_2	(0x02100\|NVREG_TXRXCTL_RXCHECK)	forcedeth.c
20662	PHY_OUI_MARVELL	0x5043	forcedeth.c
20663	PHY_OUI_CICADA	0x03f1	forcedeth.c
20664	PHYID1_OUI_MASK	0x03ff	forcedeth.c
20665	PHYID1_OUI_SHFT	6	forcedeth.c
20666	PHYID2_OUI_MASK	0xfc00	forcedeth.c
20667	PHYID2_OUI_SHFT	10	forcedeth.c
20668	PHY_INIT1	0x0f000	forcedeth.c
20669	PHY_INIT2	0x0e00	forcedeth.c
20670	PHY_INIT3	0x01000	forcedeth.c
20671	PHY_INIT4	0x0200	forcedeth.c
20672	PHY_INIT5	0x0004	forcedeth.c
20673	PHY_INIT6	0x02000	forcedeth.c
20674	PHY_GIGABIT	0x0100	forcedeth.c
20675	PHY_TIMEOUT	0x1	forcedeth.c
20676	PHY_ERROR	0x2	forcedeth.c
20677	PHY_100	0x1	forcedeth.c
20678	PHY_1000	0x2	forcedeth.c
20679	PHY_HALF	0x100	forcedeth.c
20680	MII_1000BT_CR	0x09	forcedeth.c
20681	MII_1000BT_SR	0x0a	forcedeth.c
20682	ADVERTISE_1000FULL	0x0200	forcedeth.c
20683	ADVERTISE_1000HALF	0x0100	forcedeth.c
20684	LPA_1000FULL	0x0800	forcedeth.c
20685	LPA_1000HALF	0x0400	forcedeth.c
20686	tx_ring	forcedeth_bufs.tx_ring	forcedeth.c
20687	rx_ring	forcedeth_bufs.rx_ring	forcedeth.c
20688	txb	forcedeth_bufs.txb	forcedeth.c
20689	rxb	forcedeth_bufs.rxb	forcedeth.c
20690	MII_READ	(-1)	forcedeth.c
20691	MII_PHYSID1	0x02	forcedeth.c	PHYS ID 1
20692	MII_PHYSID2	0x03	forcedeth.c	PHYS ID 2
20693	MII_BMCR	0x00	forcedeth.c	Basic mode control register
20694	MII_BMSR	0x01	forcedeth.c	Basic mode status register
20695	MII_ADVERTISE	0x04	forcedeth.c	Advertisement control reg
20696	MII_LPA	0x05	forcedeth.c	Link partner ability reg
20697	BMSR_ANEGCOMPLETE	0x0020	forcedeth.c	Auto-negotiation complete
20698	LPA_SLCT	0x001f	forcedeth.c	Same as advertise selector
20699	LPA_10HALF	0x0020	forcedeth.c	Can do 10mbps half-duplex
20700	LPA_10FULL	0x0040	forcedeth.c	Can do 10mbps full-duplex
20701	LPA_100HALF	0x0080	forcedeth.c	Can do 100mbps half-duplex
20702	LPA_100FULL	0x0100	forcedeth.c	Can do 100mbps full-duplex
20703	LPA_100BASE4	0x0200	forcedeth.c	Can do 100mbps 4k packets
20704	LPA_RESV	0x1c00	forcedeth.c	Unused...
20705	LPA_RFAULT	0x2000	forcedeth.c	Link partner faulted
20706	LPA_LPACK	0x4000	forcedeth.c	Link partner acked us
20707	LPA_NPAGE	0x8000	forcedeth.c	Next page bit
20708	IORESOURCE_MEM	0x00000200	forcedeth.c
20709	board_found	1	forcedeth.c
20710	valid_link	0	forcedeth.c
20711	IPOIB_MTU	2048	ipoib.c
20712	IPOIB_DATA_NUM_SEND_WQES	2	ipoib.c
20713	IPOIB_DATA_NUM_RECV_WQES	4	ipoib.c
20714	IPOIB_DATA_NUM_CQES	8	ipoib.c
20715	IPOIB_META_NUM_SEND_WQES	2	ipoib.c
20716	IPOIB_META_NUM_RECV_WQES	2	ipoib.c
20717	IPOIB_META_NUM_CQES	8	ipoib.c
20718	IPOIB_NUM_CACHED_PATHS	2	ipoib.c
20719	IPOIB_TID_GET_PATH_REC	0x11111111UL	ipoib.c
20720	IPOIB_TID_MC_MEMBER_REC	0x22222222UL	ipoib.c
20721	IPOIB_JOIN_MAX_DELAY_MS	1000	ipoib.c
20722	IPOIB_BROADCAST_QPN	0xffffffffUL	ipoib.c
20723	TX_RING_SIZE	2	mtd80x.c
20724	TX_QUEUE_LEN	10	mtd80x.c	Limit ring entries actually used.
20725	RX_RING_SIZE	4	mtd80x.c
20726	HZ	100	mtd80x.c
20727	TX_TIME_OUT	(6*HZ)	mtd80x.c
20728	PKT_BUF_SZ	1536	mtd80x.c
20729	MII_BMCR	0x00	mtd80x.c	Basic mode control register
20730	MII_BMSR	0x01	mtd80x.c	Basic mode status register
20731	MII_PHYSID1	0x02	mtd80x.c	PHYS ID 1
20732	MII_PHYSID2	0x03	mtd80x.c	PHYS ID 2
20733	MII_ADVERTISE	0x04	mtd80x.c	Advertisement control reg
20734	MII_LPA	0x05	mtd80x.c	Link partner ability reg
20735	MII_EXPANSION	0x06	mtd80x.c	Expansion register
20736	MII_DCOUNTER	0x12	mtd80x.c	Disconnect counter
20737	MII_FCSCOUNTER	0x13	mtd80x.c	False carrier counter
20738	MII_NWAYTEST	0x14	mtd80x.c	N-way auto-neg test reg
20739	MII_RERRCOUNTER	0x15	mtd80x.c	Receive error counter
20740	MII_SREVISION	0x16	mtd80x.c	Silicon revision
20741	MII_RESV1	0x17	mtd80x.c	Reserved...
20742	MII_LBRERROR	0x18	mtd80x.c	Lpback, rx, bypass error
20743	MII_PHYADDR	0x19	mtd80x.c	PHY address
20744	MII_RESV2	0x1a	mtd80x.c	Reserved...
20745	MII_TPISTATUS	0x1b	mtd80x.c	TPI status for 10mbps
20746	MII_NCONFIG	0x1c	mtd80x.c	Network interface config
20747	BMCR_RESV	0x007f	mtd80x.c	Unused...
20748	BMCR_CTST	0x0080	mtd80x.c	Collision test
20749	BMCR_FULLDPLX	0x0100	mtd80x.c	Full duplex
20750	BMCR_ANRESTART	0x0200	mtd80x.c	Auto negotiation restart
20751	BMCR_ISOLATE	0x0400	mtd80x.c	Disconnect DP83840 from MII
20752	BMCR_PDOWN	0x0800	mtd80x.c	Powerdown the DP83840
20753	BMCR_ANENABLE	0x1000	mtd80x.c	Enable auto negotiation
20754	BMCR_SPEED100	0x2000	mtd80x.c	Select 100Mbps
20755	BMCR_LOOPBACK	0x4000	mtd80x.c	TXD loopback bits
20756	BMCR_RESET	0x8000	mtd80x.c	Reset the DP83840
20757	BMSR_ERCAP	0x0001	mtd80x.c	Ext-reg capability
20758	BMSR_JCD	0x0002	mtd80x.c	Jabber detected
20759	BMSR_LSTATUS	0x0004	mtd80x.c	Link status
20760	BMSR_ANEGCAPABLE	0x0008	mtd80x.c	Able to do auto-negotiation
20761	BMSR_RFAULT	0x0010	mtd80x.c	Remote fault detected
20762	BMSR_ANEGCOMPLETE	0x0020	mtd80x.c	Auto-negotiation complete
20763	BMSR_RESV	0x07c0	mtd80x.c	Unused...
20764	BMSR_10HALF	0x0800	mtd80x.c	Can do 10mbps, half-duplex
20765	BMSR_10FULL	0x1000	mtd80x.c	Can do 10mbps, full-duplex
20766	BMSR_100HALF	0x2000	mtd80x.c	Can do 100mbps, half-duplex
20767	BMSR_100FULL	0x4000	mtd80x.c	Can do 100mbps, full-duplex
20768	BMSR_100BASE4	0x8000	mtd80x.c	Can do 100mbps, 4k packets
20769	ADVERTISE_SLCT	0x001f	mtd80x.c	Selector bits
20770	ADVERTISE_CSMA	0x0001	mtd80x.c	Only selector supported
20771	ADVERTISE_10HALF	0x0020	mtd80x.c	Try for 10mbps half-duplex
20772	ADVERTISE_10FULL	0x0040	mtd80x.c	Try for 10mbps full-duplex
20773	ADVERTISE_100HALF	0x0080	mtd80x.c	Try for 100mbps half-duplex
20774	ADVERTISE_100FULL	0x0100	mtd80x.c	Try for 100mbps full-duplex
20775	ADVERTISE_100BASE4	0x0200	mtd80x.c	Try for 100mbps 4k packets
20776	ADVERTISE_RESV	0x1c00	mtd80x.c	Unused...
20777	ADVERTISE_RFAULT	0x2000	mtd80x.c	Say we can detect faults
20778	ADVERTISE_LPACK	0x4000	mtd80x.c	Ack link partners response
20779	ADVERTISE_NPAGE	0x8000	mtd80x.c	Next page bit
20780	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	mtd80x.c
20781	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	mtd80x.c
20782	MASK_MIIR_MII_READ	0x00000000	mtd80x.c
20783	MASK_MIIR_MII_WRITE	0x00000008	mtd80x.c
20784	MASK_MIIR_MII_MDO	0x00000004	mtd80x.c
20785	MASK_MIIR_MII_MDI	0x00000002	mtd80x.c
20786	MASK_MIIR_MII_MDC	0x00000001	mtd80x.c
20787	OP_READ	0x6000	mtd80x.c	ST:01+OP:10+PHYAD+REGAD+TA:Z0
20788	OP_WRITE	0x5002	mtd80x.c	ST:01+OP:01+PHYAD+REGAD+TA:10
20789	MysonPHYID	0xd0000302	mtd80x.c
20790	MysonPHYID0	0x0302	mtd80x.c
20791	StatusRegister	18	mtd80x.c
20792	SPEED100	0x0400	mtd80x.c	bit10
20793	FULLMODE	0x0800	mtd80x.c	bit11
20794	SeeqPHYID0	0x0016	mtd80x.c
20795	MIIRegister18	18	mtd80x.c
20796	SPD_DET_100	0x80	mtd80x.c
20797	DPLX_DET_FULL	0x40	mtd80x.c
20798	AhdocPHYID0	0x0022	mtd80x.c
20799	DiagnosticReg	18	mtd80x.c
20800	DPLX_FULL	0x0800	mtd80x.c
20801	Speed_100	0x0400	mtd80x.c
20802	MarvellPHYID0	0x0141	mtd80x.c
20803	LevelOnePHYID0	0x0013	mtd80x.c
20804	MII1000BaseTControlReg	9	mtd80x.c
20805	MII1000BaseTStatusReg	10	mtd80x.c
20806	SpecificReg	17	mtd80x.c
20807	PHYAbletoPerform1000FullDuplex	0x0200	mtd80x.c
20808	PHYAbletoPerform1000HalfDuplex	0x0100	mtd80x.c
20809	PHY1000AbilityMask	0x300	mtd80x.c
20810	SpeedMask	0x0c000	mtd80x.c
20811	Speed_1000M	0x08000	mtd80x.c
20812	Speed_100M	0x4000	mtd80x.c
20813	Speed_10M	0	mtd80x.c
20814	Full_Duplex	0x2000	mtd80x.c
20815	LXT1000_100M	0x08000	mtd80x.c
20816	LXT1000_1000M	0x0c000	mtd80x.c
20817	LXT1000_Full	0x200	mtd80x.c
20818	PS10	0x00080000	mtd80x.c
20819	FD	0x00100000	mtd80x.c
20820	PS1000	0x00010000	mtd80x.c
20821	LinkIsUp	0x0004	mtd80x.c
20822	LinkIsUp2	0x00040000	mtd80x.c
20823	txb	mtd80x_bufs.txb	mtd80x.c
20824	rxb	mtd80x_bufs.rxb	mtd80x.c
20825	MTNIC_ERROR	-EIO	mtnic.c
20826	MTNIC_PORT_NUM	0	mtnic.c
20827	INCLUDE_NE	1	ne.c
20828	NE_SCAN	0x300,0x280,0x320,0x340,0x380	ne.c
20829	HZ	100	ns83820.c
20830	USE_64BIT_ADDR	"+"	ns83820.c
20831	TRY_DAC	1	ns83820.c
20832	TRY_DAC	0	ns83820.c
20833	RX_BUF_SIZE	1500	ns83820.c	8192
20834	NR_RX_DESC	64	ns83820.c
20835	NR_TX_DESC	1	ns83820.c
20836	REAL_RX_BUF_SIZE	(RX_BUF_SIZE + 14 + 6)	ns83820.c	rx/tx mac addr + type
20837	MIN_TX_DESC_FREE	8	ns83820.c
20838	CFGCS	0x04	ns83820.c
20839	CR_TXE	0x00000001	ns83820.c
20840	CR_TXD	0x00000002	ns83820.c
20841	CR_RXE	0x00000004	ns83820.c
20842	CR_RXD	0x00000008	ns83820.c
20843	CR_TXR	0x00000010	ns83820.c
20844	CR_RXR	0x00000020	ns83820.c
20845	CR_SWI	0x00000080	ns83820.c
20846	CR_RST	0x00000100	ns83820.c
20847	PTSCR_EEBIST_FAIL	0x00000001	ns83820.c
20848	PTSCR_EEBIST_EN	0x00000002	ns83820.c
20849	PTSCR_EELOAD_EN	0x00000004	ns83820.c
20850	PTSCR_RBIST_FAIL	0x000001b8	ns83820.c
20851	PTSCR_RBIST_DONE	0x00000200	ns83820.c
20852	PTSCR_RBIST_EN	0x00000400	ns83820.c
20853	PTSCR_RBIST_RST	0x00002000	ns83820.c
20854	MEAR_EEDI	0x00000001	ns83820.c
20855	MEAR_EEDO	0x00000002	ns83820.c
20856	MEAR_EECLK	0x00000004	ns83820.c
20857	MEAR_EESEL	0x00000008	ns83820.c
20858	MEAR_MDIO	0x00000010	ns83820.c
20859	MEAR_MDDIR	0x00000020	ns83820.c
20860	MEAR_MDC	0x00000040	ns83820.c
20861	ISR_TXDESC3	0x40000000	ns83820.c
20862	ISR_TXDESC2	0x20000000	ns83820.c
20863	ISR_TXDESC1	0x10000000	ns83820.c
20864	ISR_TXDESC0	0x08000000	ns83820.c
20865	ISR_RXDESC3	0x04000000	ns83820.c
20866	ISR_RXDESC2	0x02000000	ns83820.c
20867	ISR_RXDESC1	0x01000000	ns83820.c
20868	ISR_RXDESC0	0x00800000	ns83820.c
20869	ISR_TXRCMP	0x00400000	ns83820.c
20870	ISR_RXRCMP	0x00200000	ns83820.c
20871	ISR_DPERR	0x00100000	ns83820.c
20872	ISR_SSERR	0x00080000	ns83820.c
20873	ISR_RMABT	0x00040000	ns83820.c
20874	ISR_RTABT	0x00020000	ns83820.c
20875	ISR_RXSOVR	0x00010000	ns83820.c
20876	ISR_HIBINT	0x00008000	ns83820.c
20877	ISR_PHY	0x00004000	ns83820.c
20878	ISR_PME	0x00002000	ns83820.c
20879	ISR_SWI	0x00001000	ns83820.c
20880	ISR_MIB	0x00000800	ns83820.c
20881	ISR_TXURN	0x00000400	ns83820.c
20882	ISR_TXIDLE	0x00000200	ns83820.c
20883	ISR_TXERR	0x00000100	ns83820.c
20884	ISR_TXDESC	0x00000080	ns83820.c
20885	ISR_TXOK	0x00000040	ns83820.c
20886	ISR_RXORN	0x00000020	ns83820.c
20887	ISR_RXIDLE	0x00000010	ns83820.c
20888	ISR_RXEARLY	0x00000008	ns83820.c
20889	ISR_RXERR	0x00000004	ns83820.c
20890	ISR_RXDESC	0x00000002	ns83820.c
20891	ISR_RXOK	0x00000001	ns83820.c
20892	TXCFG_CSI	0x80000000	ns83820.c
20893	TXCFG_HBI	0x40000000	ns83820.c
20894	TXCFG_MLB	0x20000000	ns83820.c
20895	TXCFG_ATP	0x10000000	ns83820.c
20896	TXCFG_ECRETRY	0x00800000	ns83820.c
20897	TXCFG_BRST_DIS	0x00080000	ns83820.c
20898	TXCFG_MXDMA1024	0x00000000	ns83820.c
20899	TXCFG_MXDMA512	0x00700000	ns83820.c
20900	TXCFG_MXDMA256	0x00600000	ns83820.c
20901	TXCFG_MXDMA128	0x00500000	ns83820.c
20902	TXCFG_MXDMA64	0x00400000	ns83820.c
20903	TXCFG_MXDMA32	0x00300000	ns83820.c
20904	TXCFG_MXDMA16	0x00200000	ns83820.c
20905	TXCFG_MXDMA8	0x00100000	ns83820.c
20906	CFG_LNKSTS	0x80000000	ns83820.c
20907	CFG_SPDSTS	0x60000000	ns83820.c
20908	CFG_SPDSTS1	0x40000000	ns83820.c
20909	CFG_SPDSTS0	0x20000000	ns83820.c
20910	CFG_DUPSTS	0x10000000	ns83820.c
20911	CFG_TBI_EN	0x01000000	ns83820.c
20912	CFG_MODE_1000	0x00400000	ns83820.c
20913	CFG_AUTO_1000	0x00200000	ns83820.c
20914	CFG_PINT_CTL	0x001c0000	ns83820.c
20915	CFG_PINT_DUPSTS	0x00100000	ns83820.c
20916	CFG_PINT_LNKSTS	0x00080000	ns83820.c
20917	CFG_PINT_SPDSTS	0x00040000	ns83820.c
20918	CFG_TMRTEST	0x00020000	ns83820.c
20919	CFG_MRM_DIS	0x00010000	ns83820.c
20920	CFG_MWI_DIS	0x00008000	ns83820.c
20921	CFG_T64ADDR	0x00004000	ns83820.c
20922	CFG_PCI64_DET	0x00002000	ns83820.c
20923	CFG_DATA64_EN	0x00001000	ns83820.c
20924	CFG_M64ADDR	0x00000800	ns83820.c
20925	CFG_PHY_RST	0x00000400	ns83820.c
20926	CFG_PHY_DIS	0x00000200	ns83820.c
20927	CFG_EXTSTS_EN	0x00000100	ns83820.c
20928	CFG_REQALG	0x00000080	ns83820.c
20929	CFG_SB	0x00000040	ns83820.c
20930	CFG_POW	0x00000020	ns83820.c
20931	CFG_EXD	0x00000010	ns83820.c
20932	CFG_PESEL	0x00000008	ns83820.c
20933	CFG_BROM_DIS	0x00000004	ns83820.c
20934	CFG_EXT_125	0x00000002	ns83820.c
20935	CFG_BEM	0x00000001	ns83820.c
20936	EXTSTS_UDPPKT	0x00200000	ns83820.c
20937	EXTSTS_TCPPKT	0x00080000	ns83820.c
20938	EXTSTS_IPPKT	0x00020000	ns83820.c
20939	SPDSTS_POLARITY	(CFG_SPDSTS1 \| CFG_SPDSTS0 \| CFG_DUPSTS \| (lnksts ? CFG_LNKSTS : 0))	ns83820.c
20940	MIBC_MIBS	0x00000008	ns83820.c
20941	MIBC_ACLR	0x00000004	ns83820.c
20942	MIBC_FRZ	0x00000002	ns83820.c
20943	MIBC_WRN	0x00000001	ns83820.c
20944	PCR_PSEN	(1 << 31)	ns83820.c
20945	PCR_PS_MCAST	(1 << 30)	ns83820.c
20946	PCR_PS_DA	(1 << 29)	ns83820.c
20947	PCR_STHI_8	(3 << 23)	ns83820.c
20948	PCR_STLO_4	(1 << 23)	ns83820.c
20949	PCR_FFHI_8K	(3 << 21)	ns83820.c
20950	PCR_FFLO_4K	(1 << 21)	ns83820.c
20951	PCR_PAUSE_CNT	0xFFFE	ns83820.c
20952	RXCFG_AEP	0x80000000	ns83820.c
20953	RXCFG_ARP	0x40000000	ns83820.c
20954	RXCFG_STRIPCRC	0x20000000	ns83820.c
20955	RXCFG_RX_FD	0x10000000	ns83820.c
20956	RXCFG_ALP	0x08000000	ns83820.c
20957	RXCFG_AIRL	0x04000000	ns83820.c
20958	RXCFG_MXDMA512	0x00700000	ns83820.c
20959	RXCFG_DRTH	0x0000003e	ns83820.c
20960	RXCFG_DRTH0	0x00000002	ns83820.c
20961	RFCR_RFEN	0x80000000	ns83820.c
20962	RFCR_AAB	0x40000000	ns83820.c
20963	RFCR_AAM	0x20000000	ns83820.c
20964	RFCR_AAU	0x10000000	ns83820.c
20965	RFCR_APM	0x08000000	ns83820.c
20966	RFCR_APAT	0x07800000	ns83820.c
20967	RFCR_APAT3	0x04000000	ns83820.c
20968	RFCR_APAT2	0x02000000	ns83820.c
20969	RFCR_APAT1	0x01000000	ns83820.c
20970	RFCR_APAT0	0x00800000	ns83820.c
20971	RFCR_AARP	0x00400000	ns83820.c
20972	RFCR_MHEN	0x00200000	ns83820.c
20973	RFCR_UHEN	0x00100000	ns83820.c
20974	RFCR_ULM	0x00080000	ns83820.c
20975	VRCR_RUDPE	0x00000080	ns83820.c
20976	VRCR_RTCPE	0x00000040	ns83820.c
20977	VRCR_RIPE	0x00000020	ns83820.c
20978	VRCR_IPEN	0x00000010	ns83820.c
20979	VRCR_DUTF	0x00000008	ns83820.c
20980	VRCR_DVTF	0x00000004	ns83820.c
20981	VRCR_VTREN	0x00000002	ns83820.c
20982	VRCR_VTDEN	0x00000001	ns83820.c
20983	VTCR_PPCHK	0x00000008	ns83820.c
20984	VTCR_GCHK	0x00000004	ns83820.c
20985	VTCR_VPPTI	0x00000002	ns83820.c
20986	VTCR_VGTI	0x00000001	ns83820.c
20987	CR	0x00	ns83820.c
20988	CFG	0x04	ns83820.c
20989	MEAR	0x08	ns83820.c
20990	PTSCR	0x0c	ns83820.c
20991	ISR	0x10	ns83820.c
20992	IMR	0x14	ns83820.c
20993	IER	0x18	ns83820.c
20994	IHR	0x1c	ns83820.c
20995	TXDP	0x20	ns83820.c
20996	TXDP_HI	0x24	ns83820.c
20997	TXCFG	0x28	ns83820.c
20998	GPIOR	0x2c	ns83820.c
20999	RXDP	0x30	ns83820.c
21000	RXDP_HI	0x34	ns83820.c
21001	RXCFG	0x38	ns83820.c
21002	PQCR	0x3c	ns83820.c
21003	WCSR	0x40	ns83820.c
21004	PCR	0x44	ns83820.c
21005	RFCR	0x48	ns83820.c
21006	RFDR	0x4c	ns83820.c
21007	SRR	0x58	ns83820.c
21008	VRCR	0xbc	ns83820.c
21009	VTCR	0xc0	ns83820.c
21010	VDR	0xc4	ns83820.c
21011	CCSR	0xcc	ns83820.c
21012	TBICR	0xe0	ns83820.c
21013	TBISR	0xe4	ns83820.c
21014	TANAR	0xe8	ns83820.c
21015	TANLPAR	0xec	ns83820.c
21016	TANER	0xf0	ns83820.c
21017	TESR	0xf4	ns83820.c
21018	TBICR_MR_AN_ENABLE	0x00001000	ns83820.c
21019	TBICR_MR_RESTART_AN	0x00000200	ns83820.c
21020	TBISR_MR_LINK_STATUS	0x00000020	ns83820.c
21021	TBISR_MR_AN_COMPLETE	0x00000004	ns83820.c
21022	TANAR_PS2	0x00000100	ns83820.c
21023	TANAR_PS1	0x00000080	ns83820.c
21024	TANAR_HALF_DUP	0x00000040	ns83820.c
21025	TANAR_FULL_DUP	0x00000020	ns83820.c
21026	GPIOR_GP5_OE	0x00000200	ns83820.c
21027	GPIOR_GP4_OE	0x00000100	ns83820.c
21028	GPIOR_GP3_OE	0x00000080	ns83820.c
21029	GPIOR_GP2_OE	0x00000040	ns83820.c
21030	GPIOR_GP1_OE	0x00000020	ns83820.c
21031	GPIOR_GP3_OUT	0x00000004	ns83820.c
21032	GPIOR_GP1_OUT	0x00000001	ns83820.c
21033	LINK_AUTONEGOTIATE	0x01	ns83820.c
21034	LINK_DOWN	0x02	ns83820.c
21035	LINK_UP	0x04	ns83820.c
21036	HW_ADDR_LEN	8	ns83820.c
21037	HW_ADDR_LEN	4	ns83820.c
21038	CMDSTS_OWN	0x80000000	ns83820.c
21039	CMDSTS_MORE	0x40000000	ns83820.c
21040	CMDSTS_INTR	0x20000000	ns83820.c
21041	CMDSTS_ERR	0x10000000	ns83820.c
21042	CMDSTS_OK	0x08000000	ns83820.c
21043	CMDSTS_LEN_MASK	0x0000ffff	ns83820.c
21044	CMDSTS_DEST_MASK	0x01800000	ns83820.c
21045	CMDSTS_DEST_SELF	0x00800000	ns83820.c
21046	CMDSTS_DEST_MULTI	0x01000000	ns83820.c
21047	DESC_SIZE	8	ns83820.c	Should be cache line sized
21048	tx_ring	ns83820_bufs.tx_ring	ns83820.c
21049	rx_ring	ns83820_bufs.rx_ring	ns83820.c
21050	txb	ns83820_bufs.txb	ns83820.c
21051	rxb	ns83820_bufs.rxb	ns83820.c
21052	board_found	1	ns83820.c
21053	valid_link	0	ns83820.c
21054	ASIC_PIO	WD_IAR	ns8390.c
21055	eth_probe	wd_probe	ns8390.c
21056	drv_version	"v1.3"	pcnet32.c
21057	drv_date	"03-29-2004"	pcnet32.c
21058	PCNET32_PORT_AUI	0x00	pcnet32.c
21059	PCNET32_PORT_10BT	0x01	pcnet32.c
21060	PCNET32_PORT_GPSI	0x02	pcnet32.c
21061	PCNET32_PORT_MII	0x03	pcnet32.c
21062	PCNET32_PORT_PORTSEL	0x03	pcnet32.c
21063	PCNET32_PORT_ASEL	0x04	pcnet32.c
21064	PCNET32_PORT_100	0x40	pcnet32.c
21065	PCNET32_PORT_FD	0x80	pcnet32.c
21066	PCNET32_DMA_MASK	0xffffffff	pcnet32.c
21067	MAX_UNITS	8	pcnet32.c	More are supported, limit only on options
21068	PCNET32_LOG_TX_BUFFERS	1	pcnet32.c
21069	PCNET32_LOG_RX_BUFFERS	2	pcnet32.c
21070	TX_RING_SIZE	(1 << (PCNET32_LOG_TX_BUFFERS))	pcnet32.c
21071	TX_RING_MOD_MASK	(TX_RING_SIZE - 1)	pcnet32.c
21072	TX_RING_LEN_BITS	0x0000	pcnet32.c	PCNET32_LOG_TX_BUFFERS) << 12)
21073	RX_RING_SIZE	(1 << (PCNET32_LOG_RX_BUFFERS))	pcnet32.c
21074	RX_RING_MOD_MASK	(RX_RING_SIZE - 1)	pcnet32.c
21075	RX_RING_LEN_BITS	((PCNET32_LOG_RX_BUFFERS) << 4)	pcnet32.c
21076	PKT_BUF_SZ	1544	pcnet32.c
21077	PCNET32_WIO_RDP	0x10	pcnet32.c
21078	PCNET32_WIO_RAP	0x12	pcnet32.c
21079	PCNET32_WIO_RESET	0x14	pcnet32.c
21080	PCNET32_WIO_BDP	0x16	pcnet32.c
21081	PCNET32_DWIO_RDP	0x10	pcnet32.c
21082	PCNET32_DWIO_RAP	0x14	pcnet32.c
21083	PCNET32_DWIO_RESET	0x18	pcnet32.c
21084	PCNET32_DWIO_BDP	0x1C	pcnet32.c
21085	PCNET32_TOTAL_SIZE	0x20	pcnet32.c
21086	MII_CNT	4	pcnet32.c
21087	MAX_JOIN_INFO_COUNT	2	prism2.c
21088	WLAN_HOSTIF	WLAN_PLX	prism2.c
21089	BAP_TIMEOUT	( 5000 )	prism2.c
21090	PLX_LOCAL_CONFIG_REGISTER_BASE	( PCI_BASE_ADDRESS_1 )	prism2.c
21091	PLX_LOCAL_ADDRESS_SPACE_0_BASE	( PCI_BASE_ADDRESS_2 )	prism2.c
21092	PLX_LOCAL_ADDRESS_SPACE_1_BASE	( PCI_BASE_ADDRESS_3 )	prism2.c
21093	PLX_LOCAL_ADDRESS_SPACE_2_BASE	( PCI_BASE_ADDRESS_4 )	prism2.c
21094	PLX_LOCAL_ADDRESS_SPACE_3_BASE	( PCI_BASE_ADDRESS_5 )	prism2.c
21095	PRISM2_PLX_ATTR_MEM_BASE	( PLX_LOCAL_ADDRESS_SPACE_0_BASE )	prism2.c
21096	PRISM2_PLX_IO_BASE	( PLX_LOCAL_ADDRESS_SPACE_1_BASE )	prism2.c
21097	PRISM2_PCI_MEM_BASE	( PCI_BASE_ADDRESS_0 )	prism2.c
21098	CISTPL_VERS_1	( 0x15 )	prism2.c
21099	CISTPL_END	( 0xff )	prism2.c
21100	CIS_STEP	( 2 )	prism2.c
21101	CISTPL_HEADER_LEN	( 2 * CIS_STEP )	prism2.c
21102	CISTPL_LEN_OFF	( 1 * CIS_STEP )	prism2.c
21103	CISTPL_VERS_1_STR_OFF	( 4 * CIS_STEP )	prism2.c
21104	COR_OFFSET	( 0x3e0 )	prism2.c	COR attribute offset of Prism2 PC card
21105	COR_VALUE	( 0x41 )	prism2.c	Enable PC card with irq in level trigger (but interrupts disabled)
21106	WLAN_IEEE_OUI_LEN	3	prism2.c
21107	WLAN_HOSTIF	WLAN_PCI	prism2_pci.c
21108	WLAN_HOSTIF	WLAN_PLX	prism2_plx.c
21109	drv_version	"v1.7+"	r8169.c
21110	drv_date	"03-19-2008"	r8169.c
21111	HZ	1000	r8169.c
21112	MAC_ADDR_LEN	6	r8169.c
21113	MAX_ETH_FRAME_SIZE	1536	r8169.c
21114	TX_FIFO_THRESH	256	r8169.c	In bytes
21115	RX_FIFO_THRESH	7	r8169.c	7 means NO threshold, Rx buffer level before first PCI xfer.
21116	RX_DMA_BURST	7	r8169.c	Maximum PCI burst, '6' is 1024
21117	TX_DMA_BURST	7	r8169.c	Maximum PCI burst, '6' is 1024
21118	ETTh	0x3F	r8169.c	0x3F means NO threshold
21119	EarlyTxThld	0x3F	r8169.c	0x3F means NO early transmit
21120	RxPacketMaxSize	0x0800	r8169.c	Maximum size supported is 16K-1
21121	InterFrameGap	0x03	r8169.c	3 means InterFrameGap = the shortest one
21122	NUM_TX_DESC	1	r8169.c	Number of Tx descriptor registers
21123	NUM_RX_DESC	4	r8169.c	Number of Rx descriptor registers
21124	RX_BUF_SIZE	1536	r8169.c	Rx Buffer size
21125	RTL_MIN_IO_SIZE	0x80	r8169.c
21126	TX_TIMEOUT	(6*HZ)	r8169.c
21127	RTL8169_TIMER_EXPIRE_TIME	100	r8169.c	100
21128	ETH_HDR_LEN	14	r8169.c
21129	DEFAULT_MTU	1500	r8169.c
21130	DEFAULT_RX_BUF_LEN	1536	r8169.c
21131	MAX_JUMBO_FRAME_MTU	( 10000 )	r8169.c
21132	MAX_RX_SKBDATA_SIZE	( MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN )	r8169.c
21133	MAX_RX_SKBDATA_SIZE	1600	r8169.c
21134	__align_256	__attribute__ (( aligned ( 256 ) ))	r8169.c
21135	tx_ring	r8169_bufs->tx_ring	r8169.c
21136	rx_ring	r8169_bufs->rx_ring	r8169.c
21137	txb	r8169_bufs->txb	r8169.c
21138	rxb	r8169_bufs->rxb	r8169.c
21139	IORESOURCE_MEM	0x00000200	r8169.c
21140	board_found	1	r8169.c
21141	valid_link	0	r8169.c
21142	TX_RING_SIZE	4	rtl8139.c
21143	TX_FIFO_THRESH	256	rtl8139.c	In bytes, rounded down to 32 byte units.
21144	RX_FIFO_THRESH	4	rtl8139.c	Rx buffer level before first PCI xfer.
21145	RX_DMA_BURST	4	rtl8139.c	Maximum PCI burst, '4' is 256 bytes
21146	TX_DMA_BURST	4	rtl8139.c	Calculate as 16<<val.
21147	TX_IPG	3	rtl8139.c	This is the only valid value
21148	RX_BUF_LEN_IDX	0	rtl8139.c	0, 1, 2 is allowed - 8,16,32K rx buffer
21149	RX_BUF_LEN	( (8192 << RX_BUF_LEN_IDX) )	rtl8139.c
21150	RX_BUF_PAD	4	rtl8139.c
21151	EE_M1	0x80	rtl8139.c	Mode select bit 1
21152	EE_M0	0x40	rtl8139.c	Mode select bit 0
21153	EE_CS	0x08	rtl8139.c	EEPROM chip select
21154	EE_SK	0x04	rtl8139.c	EEPROM shift clock
21155	EE_DI	0x02	rtl8139.c	Data in
21156	EE_DO	0x01	rtl8139.c	Data out
21157	EE_MAC	7	rtl8139.c
21158	txd	sis900_bufs.txd	sis900.c
21159	rxd	sis900_bufs.rxd	sis900.c
21160	txb	sis900_bufs.txb	sis900.c
21161	rxb	sis900_bufs.rxb	sis900.c
21162	LINUX_OUT_MACROS	1	smc9000.c
21163	SMC9000_DEBUG	0	smc9000.c
21164	PRINTK2	printf	smc9000.c
21165	_outb	outb	smc9000.c
21166	_outw	outw	smc9000.c
21167	drv_version	"v1.12"	sundance.c
21168	drv_date	"2004-03-21"	sundance.c
21169	HZ	100	sundance.c
21170	TX_RING_SIZE	2	sundance.c
21171	TX_QUEUE_LEN	10	sundance.c	Limit ring entries actually used.
21172	RX_RING_SIZE	4	sundance.c
21173	TX_TIME_OUT	(4*HZ)	sundance.c
21174	PKT_BUF_SZ	1536	sundance.c
21175	rxb	rx_tx_buf.rxb	sundance.c
21176	txb	rx_tx_buf.txb	sundance.c
21177	EEPROM_SIZE	128	sundance.c
21178	PCI_IOTYPE	(PCI_USES_MASTER \| PCI_USES_IO \| PCI_ADDR0)	sundance.c
21179	MII_CNT	4	sundance.c
21180	EEPROM_SA_OFFSET	0x10	sundance.c
21181	DEFAULT_INTR	(IntrRxDMADone \| IntrPCIErr \| \ IntrDrvRqst \| IntrTxDone \| StatsMax \| \ LinkChange)	sundance.c
21182	MDIO_EnbIn	(0)	sundance.c
21183	MDIO_WRITE0	(MDIO_EnbOutput)	sundance.c
21184	MDIO_WRITE1	(MDIO_Data \| MDIO_EnbOutput)	sundance.c
21185	SUPPORT_COPPER_PHY	1	tg3.c
21186	SUPPORT_FIBER_PHY	1	tg3.c
21187	SUPPORT_LINK_REPORT	1	tg3.c
21188	SUPPORT_PARTNO_STR	1	tg3.c
21189	SUPPORT_PHY_STR	1	tg3.c
21190	TG3_RX_RING_SIZE	512	tg3.c
21191	TG3_DEF_RX_RING_PENDING	20	tg3.c	RX_RING_PENDING seems to be o.k. at 20 and 200
21192	TG3_RX_RCB_RING_SIZE	1024	tg3.c
21193	TG3_TX_RING_SIZE	512	tg3.c
21194	TG3_DEF_TX_RING_PENDING	(TG3_TX_RING_SIZE - 1)	tg3.c
21195	TG3_RX_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RING_SIZE)	tg3.c
21196	TG3_RX_RCB_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RCB_RING_SIZE)	tg3.c
21197	TG3_TX_RING_BYTES	(sizeof(struct tg3_tx_buffer_desc) * TG3_TX_RING_SIZE)	tg3.c
21198	RX_PKT_BUF_SZ	(1536 + 2 + 64)	tg3.c
21199	PHY_BUSY_LOOPS	5000	tg3.c
21200	ANEG_OK	0	tg3.c
21201	ANEG_DONE	1	tg3.c
21202	ANEG_TIMER_ENAB	2	tg3.c
21203	ANEG_FAILED	-1	tg3.c
21204	ANEG_STATE_SETTLE_TIME	10000	tg3.c
21205	MAX_WAIT_CNT	1000	tg3.c
21206	drv_version	"v1.4"	tlan.c
21207	drv_date	"01-17-2004"	tlan.c
21208	HZ	100	tlan.c
21209	TX_TIME_OUT	(6*HZ)	tlan.c
21210	tx_ring	tlan_buffers.tx_ring	tlan.c
21211	txb	tlan_buffers.txb	tlan.c
21212	rx_ring	tlan_buffers.rx_ring	tlan.c
21213	rxb	tlan_buffers.rxb	tlan.c
21214	board_found	1	tlan.c
21215	valid_link	0	tlan.c
21216	TX_TIME_OUT	2*TICKS_PER_SEC	tulip.c
21217	TULIP_IOTYPE	PCI_USES_MASTER \| PCI_USES_IO \| PCI_ADDR0	tulip.c
21218	TULIP_SIZE	0x80	tulip.c
21219	FULL_DUPLEX_MAGIC	0x6969	tulip.c
21220	MEDIA_MASK	31	tulip.c
21221	EEPROM_ADDRLEN	6	tulip.c
21222	EEPROM_SIZE	128	tulip.c	2 << EEPROM_ADDRLEN
21223	EE_WRITE_CMD	(5 << addr_len)	tulip.c
21224	EE_READ_CMD	(6 << addr_len)	tulip.c
21225	EE_ERASE_CMD	(7 << addr_len)	tulip.c
21226	EE_SHIFT_CLK	0x02	tulip.c	EEPROM shift clock.
21227	EE_CS	0x01	tulip.c	EEPROM chip select.
21228	EE_DATA_WRITE	0x04	tulip.c	EEPROM chip data in.
21229	EE_WRITE_0	0x01	tulip.c
21230	EE_WRITE_1	0x05	tulip.c
21231	EE_DATA_READ	0x08	tulip.c	EEPROM chip data out.
21232	EE_ENB	(0x4800 \| EE_CS)	tulip.c
21233	BUFLEN	1536	tulip.c
21234	DESC_RING_WRAP	0x02000000	tulip.c
21235	TX_RING_SIZE	2	tulip.c
21236	RX_RING_SIZE	4	tulip.c
21237	tx_ring	tulip_bss.tx_ring	tulip.c
21238	txb	tulip_bss.txb	tulip.c
21239	rx_ring	tulip_bss.rx_ring	tulip.c
21240	rxb	tulip_bss.rxb	tulip.c
21241	MDIO_SHIFT_CLK	0x10000	tulip.c
21242	MDIO_DATA_WRITE0	0x00000	tulip.c
21243	MDIO_DATA_WRITE1	0x20000	tulip.c
21244	MDIO_ENB	0x00000	tulip.c	Ignore the 0x02000 databook setting.
21245	MDIO_ENB_IN	0x40000	tulip.c
21246	MDIO_DATA_READ	0x80000	tulip.c
21247	W_MAX_TIMEOUT	0x0FFFU	via-rhine.c
21248	RX_BUF_LEN_IDX	3	via-rhine.c	0==8K, 1==16K, 2==32K, 3==64K
21249	RX_BUF_LEN	(8192 << RX_BUF_LEN_IDX)	via-rhine.c
21250	TX_BUF_SIZE	1536	via-rhine.c
21251	RX_BUF_SIZE	1536	via-rhine.c
21252	TX_FIFO_THRESH	256	via-rhine.c	In bytes, rounded down to 32 byte units.
21253	RX_FIFO_THRESH	4	via-rhine.c	Rx buffer level before first PCI xfer.
21254	RX_DMA_BURST	4	via-rhine.c	Maximum PCI burst, '4' is 256 bytes
21255	TX_DMA_BURST	4	via-rhine.c
21256	TX_TIMEOUT	((2000*HZ)/1000)	via-rhine.c
21257	byPAR0	ioaddr	via-rhine.c
21258	byRCR	ioaddr + 6	via-rhine.c
21259	byTCR	ioaddr + 7	via-rhine.c
21260	byCR0	ioaddr + 8	via-rhine.c
21261	byCR1	ioaddr + 9	via-rhine.c
21262	byISR0	ioaddr + 0x0c	via-rhine.c
21263	byISR1	ioaddr + 0x0d	via-rhine.c
21264	byIMR0	ioaddr + 0x0e	via-rhine.c
21265	byIMR1	ioaddr + 0x0f	via-rhine.c
21266	byMAR0	ioaddr + 0x10	via-rhine.c
21267	byMAR1	ioaddr + 0x11	via-rhine.c
21268	byMAR2	ioaddr + 0x12	via-rhine.c
21269	byMAR3	ioaddr + 0x13	via-rhine.c
21270	byMAR4	ioaddr + 0x14	via-rhine.c
21271	byMAR5	ioaddr + 0x15	via-rhine.c
21272	byMAR6	ioaddr + 0x16	via-rhine.c
21273	byMAR7	ioaddr + 0x17	via-rhine.c
21274	dwCurrentRxDescAddr	ioaddr + 0x18	via-rhine.c
21275	dwCurrentTxDescAddr	ioaddr + 0x1c	via-rhine.c
21276	dwCurrentRDSE0	ioaddr + 0x20	via-rhine.c
21277	dwCurrentRDSE1	ioaddr + 0x24	via-rhine.c
21278	dwCurrentRDSE2	ioaddr + 0x28	via-rhine.c
21279	dwCurrentRDSE3	ioaddr + 0x2c	via-rhine.c
21280	dwNextRDSE0	ioaddr + 0x30	via-rhine.c
21281	dwNextRDSE1	ioaddr + 0x34	via-rhine.c
21282	dwNextRDSE2	ioaddr + 0x38	via-rhine.c
21283	dwNextRDSE3	ioaddr + 0x3c	via-rhine.c
21284	dwCurrentTDSE0	ioaddr + 0x40	via-rhine.c
21285	dwCurrentTDSE1	ioaddr + 0x44	via-rhine.c
21286	dwCurrentTDSE2	ioaddr + 0x48	via-rhine.c
21287	dwCurrentTDSE3	ioaddr + 0x4c	via-rhine.c
21288	dwNextTDSE0	ioaddr + 0x50	via-rhine.c
21289	dwNextTDSE1	ioaddr + 0x54	via-rhine.c
21290	dwNextTDSE2	ioaddr + 0x58	via-rhine.c
21291	dwNextTDSE3	ioaddr + 0x5c	via-rhine.c
21292	dwCurrRxDMAPtr	ioaddr + 0x60	via-rhine.c
21293	dwCurrTxDMAPtr	ioaddr + 0x64	via-rhine.c
21294	byMPHY	ioaddr + 0x6c	via-rhine.c
21295	byMIISR	ioaddr + 0x6d	via-rhine.c
21296	byBCR0	ioaddr + 0x6e	via-rhine.c
21297	byBCR1	ioaddr + 0x6f	via-rhine.c
21298	byMIICR	ioaddr + 0x70	via-rhine.c
21299	byMIIAD	ioaddr + 0x71	via-rhine.c
21300	wMIIDATA	ioaddr + 0x72	via-rhine.c
21301	byEECSR	ioaddr + 0x74	via-rhine.c
21302	byTEST	ioaddr + 0x75	via-rhine.c
21303	byGPIO	ioaddr + 0x76	via-rhine.c
21304	byCFGA	ioaddr + 0x78	via-rhine.c
21305	byCFGB	ioaddr + 0x79	via-rhine.c
21306	byCFGC	ioaddr + 0x7a	via-rhine.c
21307	byCFGD	ioaddr + 0x7b	via-rhine.c
21308	wTallyCntMPA	ioaddr + 0x7c	via-rhine.c
21309	wTallyCntCRC	ioaddr + 0x7d	via-rhine.c
21310	bySTICKHW	ioaddr + 0x83	via-rhine.c
21311	byWOLcrClr	ioaddr + 0xA4	via-rhine.c
21312	byWOLcgClr	ioaddr + 0xA7	via-rhine.c
21313	byPwrcsrClr	ioaddr + 0xAC	via-rhine.c
21314	RCR_RRFT2	0x80	via-rhine.c
21315	RCR_RRFT1	0x40	via-rhine.c
21316	RCR_RRFT0	0x20	via-rhine.c
21317	RCR_PROM	0x10	via-rhine.c
21318	RCR_AB	0x08	via-rhine.c
21319	RCR_AM	0x04	via-rhine.c
21320	RCR_AR	0x02	via-rhine.c
21321	RCR_SEP	0x01	via-rhine.c
21322	TCR_RTSF	0x80	via-rhine.c
21323	TCR_RTFT1	0x40	via-rhine.c
21324	TCR_RTFT0	0x20	via-rhine.c
21325	TCR_OFSET	0x08	via-rhine.c
21326	TCR_LB1	0x04	via-rhine.c	loopback[1]
21327	TCR_LB0	0x02	via-rhine.c	loopback[0]
21328	CR0_RDMD	0x40	via-rhine.c	rx descriptor polling demand
21329	CR0_TDMD	0x20	via-rhine.c	tx descriptor polling demand
21330	CR0_TXON	0x10	via-rhine.c
21331	CR0_RXON	0x08	via-rhine.c
21332	CR0_STOP	0x04	via-rhine.c	stop NIC, default = 1
21333	CR0_STRT	0x02	via-rhine.c	start NIC
21334	CR0_INIT	0x01	via-rhine.c	start init process
21335	CR1_SFRST	0x80	via-rhine.c	software reset
21336	CR1_RDMD1	0x40	via-rhine.c	RDMD1
21337	CR1_TDMD1	0x20	via-rhine.c	TDMD1
21338	CR1_KEYPAG	0x10	via-rhine.c	turn on par/key
21339	CR1_DPOLL	0x08	via-rhine.c	disable rx/tx auto polling
21340	CR1_FDX	0x04	via-rhine.c	full duplex mode
21341	CR1_ETEN	0x02	via-rhine.c	early tx mode
21342	CR1_EREN	0x01	via-rhine.c	early rx mode
21343	CR_RDMD	0x0040	via-rhine.c	rx descriptor polling demand
21344	CR_TDMD	0x0020	via-rhine.c	tx descriptor polling demand
21345	CR_TXON	0x0010	via-rhine.c
21346	CR_RXON	0x0008	via-rhine.c
21347	CR_STOP	0x0004	via-rhine.c	stop NIC, default = 1
21348	CR_STRT	0x0002	via-rhine.c	start NIC
21349	CR_INIT	0x0001	via-rhine.c	start init process
21350	CR_SFRST	0x8000	via-rhine.c	software reset
21351	CR_RDMD1	0x4000	via-rhine.c	RDMD1
21352	CR_TDMD1	0x2000	via-rhine.c	TDMD1
21353	CR_KEYPAG	0x1000	via-rhine.c	turn on par/key
21354	CR_DPOLL	0x0800	via-rhine.c	disable rx/tx auto polling
21355	CR_FDX	0x0400	via-rhine.c	full duplex mode
21356	CR_ETEN	0x0200	via-rhine.c	early tx mode
21357	CR_EREN	0x0100	via-rhine.c	early rx mode
21358	IMR0_CNTM	0x80	via-rhine.c
21359	IMR0_BEM	0x40	via-rhine.c
21360	IMR0_RUM	0x20	via-rhine.c
21361	IMR0_TUM	0x10	via-rhine.c
21362	IMR0_TXEM	0x08	via-rhine.c
21363	IMR0_RXEM	0x04	via-rhine.c
21364	IMR0_PTXM	0x02	via-rhine.c
21365	IMR0_PRXM	0x01	via-rhine.c
21366	IMRShadow	0x5AFF	via-rhine.c
21367	IMR1_INITM	0x80	via-rhine.c
21368	IMR1_SRCM	0x40	via-rhine.c
21369	IMR1_NBFM	0x10	via-rhine.c
21370	IMR1_PRAIM	0x08	via-rhine.c
21371	IMR1_RES0M	0x04	via-rhine.c
21372	IMR1_ETM	0x02	via-rhine.c
21373	IMR1_ERM	0x01	via-rhine.c
21374	ISR_INITI	0x8000	via-rhine.c
21375	ISR_SRCI	0x4000	via-rhine.c
21376	ISR_ABTI	0x2000	via-rhine.c
21377	ISR_NORBF	0x1000	via-rhine.c
21378	ISR_PKTRA	0x0800	via-rhine.c
21379	ISR_RES0	0x0400	via-rhine.c
21380	ISR_ETI	0x0200	via-rhine.c
21381	ISR_ERI	0x0100	via-rhine.c
21382	ISR_CNT	0x0080	via-rhine.c
21383	ISR_BE	0x0040	via-rhine.c
21384	ISR_RU	0x0020	via-rhine.c
21385	ISR_TU	0x0010	via-rhine.c
21386	ISR_TXE	0x0008	via-rhine.c
21387	ISR_RXE	0x0004	via-rhine.c
21388	ISR_PTX	0x0002	via-rhine.c
21389	ISR_PRX	0x0001	via-rhine.c
21390	ISR0_CNT	0x80	via-rhine.c
21391	ISR0_BE	0x40	via-rhine.c
21392	ISR0_RU	0x20	via-rhine.c
21393	ISR0_TU	0x10	via-rhine.c
21394	ISR0_TXE	0x08	via-rhine.c
21395	ISR0_RXE	0x04	via-rhine.c
21396	ISR0_PTX	0x02	via-rhine.c
21397	ISR0_PRX	0x01	via-rhine.c
21398	ISR1_INITI	0x80	via-rhine.c
21399	ISR1_SRCI	0x40	via-rhine.c
21400	ISR1_NORBF	0x10	via-rhine.c
21401	ISR1_PKTRA	0x08	via-rhine.c
21402	ISR1_ETI	0x02	via-rhine.c
21403	ISR1_ERI	0x01	via-rhine.c
21404	ISR_ABNORMAL	ISR_BE+ISR_RU+ISR_TU+ISR_CNT+ISR_NORBF+ISR_PKTRA	via-rhine.c
21405	MIISR_MIIERR	0x08	via-rhine.c
21406	MIISR_MRERR	0x04	via-rhine.c
21407	MIISR_LNKFL	0x02	via-rhine.c
21408	MIISR_SPEED	0x01	via-rhine.c
21409	MIICR_MAUTO	0x80	via-rhine.c
21410	MIICR_RCMD	0x40	via-rhine.c
21411	MIICR_WCMD	0x20	via-rhine.c
21412	MIICR_MDPM	0x10	via-rhine.c
21413	MIICR_MOUT	0x08	via-rhine.c
21414	MIICR_MDO	0x04	via-rhine.c
21415	MIICR_MDI	0x02	via-rhine.c
21416	MIICR_MDC	0x01	via-rhine.c
21417	EECSR_EEPR	0x80	via-rhine.c	eeprom programed status, 73h means programed
21418	EECSR_EMBP	0x40	via-rhine.c	eeprom embeded programming
21419	EECSR_AUTOLD	0x20	via-rhine.c	eeprom content reload
21420	EECSR_DPM	0x10	via-rhine.c	eeprom direct programming
21421	EECSR_CS	0x08	via-rhine.c	eeprom CS pin
21422	EECSR_SK	0x04	via-rhine.c	eeprom SK pin
21423	EECSR_DI	0x02	via-rhine.c	eeprom DI pin
21424	EECSR_DO	0x01	via-rhine.c	eeprom DO pin
21425	BCR0_CRFT2	0x20	via-rhine.c
21426	BCR0_CRFT1	0x10	via-rhine.c
21427	BCR0_CRFT0	0x08	via-rhine.c
21428	BCR0_DMAL2	0x04	via-rhine.c
21429	BCR0_DMAL1	0x02	via-rhine.c
21430	BCR0_DMAL0	0x01	via-rhine.c
21431	BCR1_CTSF	0x20	via-rhine.c
21432	BCR1_CTFT1	0x10	via-rhine.c
21433	BCR1_CTFT0	0x08	via-rhine.c
21434	BCR1_POT2	0x04	via-rhine.c
21435	BCR1_POT1	0x02	via-rhine.c
21436	BCR1_POT0	0x01	via-rhine.c
21437	CFGA_EELOAD	0x80	via-rhine.c	enable eeprom embeded and direct programming
21438	CFGA_JUMPER	0x40	via-rhine.c
21439	CFGA_MTGPIO	0x08	via-rhine.c
21440	CFGA_T10EN	0x02	via-rhine.c
21441	CFGA_AUTO	0x01	via-rhine.c
21442	CFGB_PD	0x80	via-rhine.c
21443	CFGB_POLEN	0x02	via-rhine.c
21444	CFGB_LNKEN	0x01	via-rhine.c
21445	CFGC_M10TIO	0x80	via-rhine.c
21446	CFGC_M10POL	0x40	via-rhine.c
21447	CFGC_PHY1	0x20	via-rhine.c
21448	CFGC_PHY0	0x10	via-rhine.c
21449	CFGC_BTSEL	0x08	via-rhine.c
21450	CFGC_BPS2	0x04	via-rhine.c	bootrom select[2]
21451	CFGC_BPS1	0x02	via-rhine.c	bootrom select[1]
21452	CFGC_BPS0	0x01	via-rhine.c	bootrom select[0]
21453	CFGD_GPIOEN	0x80	via-rhine.c
21454	CFGD_DIAG	0x40	via-rhine.c
21455	CFGD_MAGIC	0x10	via-rhine.c
21456	CFGD_RANDOM	0x08	via-rhine.c
21457	CFGD_CFDX	0x04	via-rhine.c
21458	CFGD_CEREN	0x02	via-rhine.c
21459	CFGD_CETEN	0x01	via-rhine.c
21460	RSR_RERR	0x00000001	via-rhine.c
21461	RSR_CRC	0x00000002	via-rhine.c
21462	RSR_FAE	0x00000004	via-rhine.c
21463	RSR_FOV	0x00000008	via-rhine.c
21464	RSR_LONG	0x00000010	via-rhine.c
21465	RSR_RUNT	0x00000020	via-rhine.c
21466	RSR_SERR	0x00000040	via-rhine.c
21467	RSR_BUFF	0x00000080	via-rhine.c
21468	RSR_EDP	0x00000100	via-rhine.c
21469	RSR_STP	0x00000200	via-rhine.c
21470	RSR_CHN	0x00000400	via-rhine.c
21471	RSR_PHY	0x00000800	via-rhine.c
21472	RSR_BAR	0x00001000	via-rhine.c
21473	RSR_MAR	0x00002000	via-rhine.c
21474	RSR_RXOK	0x00008000	via-rhine.c
21475	RSR_ABNORMAL	RSR_RERR+RSR_LONG+RSR_RUNT	via-rhine.c
21476	TSR_NCR0	0x00000001	via-rhine.c
21477	TSR_NCR1	0x00000002	via-rhine.c
21478	TSR_NCR2	0x00000004	via-rhine.c
21479	TSR_NCR3	0x00000008	via-rhine.c
21480	TSR_COLS	0x00000010	via-rhine.c
21481	TSR_CDH	0x00000080	via-rhine.c
21482	TSR_ABT	0x00000100	via-rhine.c
21483	TSR_OWC	0x00000200	via-rhine.c
21484	TSR_CRS	0x00000400	via-rhine.c
21485	TSR_UDF	0x00000800	via-rhine.c
21486	TSR_TBUFF	0x00001000	via-rhine.c
21487	TSR_SERR	0x00002000	via-rhine.c
21488	TSR_JAB	0x00004000	via-rhine.c
21489	TSR_TERR	0x00008000	via-rhine.c
21490	TSR_ABNORMAL	TSR_TERR+TSR_OWC+TSR_ABT+TSR_JAB+TSR_CRS	via-rhine.c
21491	TSR_OWN_BIT	0x80000000	via-rhine.c
21492	CB_DELAY_LOOP_WAIT	10	via-rhine.c	10ms
21493	W_IMR_MASK_VALUE	0x1BFF	via-rhine.c	initial value of IMR
21494	PKT_TYPE_DIRECTED	0x0001	via-rhine.c	obsolete, directed address is always accepted
21495	PKT_TYPE_MULTICAST	0x0002	via-rhine.c
21496	PKT_TYPE_ALL_MULTICAST	0x0004	via-rhine.c
21497	PKT_TYPE_BROADCAST	0x0008	via-rhine.c
21498	PKT_TYPE_PROMISCUOUS	0x0020	via-rhine.c
21499	PKT_TYPE_LONG	0x2000	via-rhine.c
21500	PKT_TYPE_RUNT	0x4000	via-rhine.c
21501	PKT_TYPE_ERROR	0x8000	via-rhine.c	accept error packets, e.g. CRC error
21502	NIC_LB_NONE	0x00	via-rhine.c
21503	NIC_LB_INTERNAL	0x01	via-rhine.c
21504	NIC_LB_PHY	0x02	via-rhine.c	MII or Internal-10BaseT loopback
21505	TX_RING_SIZE	2	via-rhine.c
21506	RX_RING_SIZE	2	via-rhine.c
21507	PKT_BUF_SZ	1536	via-rhine.c	Size of each temporary Rx buffer.
21508	PCI_REG_MODE3	0x53	via-rhine.c
21509	MODE3_MIION	0x04	via-rhine.c	in PCI_REG_MOD3 OF PCI space
21510	rhine_TOTAL_SIZE	0x80	via-rhine.c
21511	NUM_TX_DESC	2	via-rhine.c	Number of Tx descriptor registers.
21512	DEFAULT_INTR	(IntrRxDone \| IntrRxErr \| IntrRxEmpty\| IntrRxOverflow \| \ IntrRxDropped \| IntrRxNoBuf)	via-rhine.c
21513	IOSYNC	do { inb(nic->ioaddr + StationAddr); } while (0)	via-rhine.c
21514	PCI_D0	((int) 0)	via-velocity.c
21515	PCI_D1	((int) 1)	via-velocity.c
21516	PCI_D2	((int) 2)	via-velocity.c
21517	PCI_D3hot	((int) 3)	via-velocity.c
21518	PCI_D3cold	((int) 4)	via-velocity.c
21519	PCI_POWER_ERROR	((int) -1)	via-velocity.c
21520	VLAN_ID_MIN	0	via-velocity.c
21521	VLAN_ID_MAX	4095	via-velocity.c
21522	VLAN_ID_DEF	0	via-velocity.c
21523	RX_THRESH_MIN	0	via-velocity.c
21524	RX_THRESH_MAX	3	via-velocity.c
21525	RX_THRESH_DEF	0	via-velocity.c
21526	DMA_LENGTH_MIN	0	via-velocity.c
21527	DMA_LENGTH_MAX	7	via-velocity.c
21528	DMA_LENGTH_DEF	0	via-velocity.c
21529	TAGGING_DEF	0	via-velocity.c
21530	IP_ALIG_DEF	0	via-velocity.c
21531	TX_CSUM_DEF	1	via-velocity.c
21532	FLOW_CNTL_DEF	1	via-velocity.c
21533	FLOW_CNTL_MIN	1	via-velocity.c
21534	FLOW_CNTL_MAX	5	via-velocity.c
21535	MED_LNK_DEF	0	via-velocity.c
21536	MED_LNK_MIN	0	via-velocity.c
21537	MED_LNK_MAX	4	via-velocity.c
21538	VAL_PKT_LEN_DEF	0	via-velocity.c
21539	WOL_OPT_DEF	0	via-velocity.c
21540	WOL_OPT_MIN	0	via-velocity.c
21541	WOL_OPT_MAX	7	via-velocity.c
21542	INT_WORKS_DEF	20	via-velocity.c
21543	INT_WORKS_MIN	10	via-velocity.c
21544	INT_WORKS_MAX	64	via-velocity.c
21545	TX_TIMEOUT	(1000);	via-velocity.c
21546	IORESOURCE_IO	0x00000100	via-velocity.c	Resource type
21547	IORESOURCE_PREFETCH	0x00001000	via-velocity.c	No side effects
21548	IORESOURCE_MEM	0x00000200	via-velocity.c
21549	BAR_0	0	via-velocity.c
21550	BAR_1	1	via-velocity.c
21551	BAR_5	5	via-velocity.c
21552	PCI_BASE_ADDRESS_SPACE	0x01	via-velocity.c	0 = memory, 1 = I/O
21553	PCI_BASE_ADDRESS_SPACE_IO	0x01	via-velocity.c
21554	PCI_BASE_ADDRESS_SPACE_MEMORY	0x00	via-velocity.c
21555	PCI_BASE_ADDRESS_MEM_TYPE_MASK	0x06	via-velocity.c
21556	PCI_BASE_ADDRESS_MEM_TYPE_32	0x00	via-velocity.c	32 bit address
21557	PCI_BASE_ADDRESS_MEM_TYPE_1M	0x02	via-velocity.c	Below 1M [obsolete]
21558	PCI_BASE_ADDRESS_MEM_TYPE_64	0x04	via-velocity.c	64 bit address
21559	PCI_BASE_ADDRESS_MEM_PREFETCH	0x08	via-velocity.c	prefetchable?
21560	PCI_REG_COMMAND	0x04	via-velocity.c
21561	PCI_REG_MODE0	0x60	via-velocity.c
21562	PCI_REG_MODE1	0x61	via-velocity.c
21563	PCI_REG_MODE2	0x62	via-velocity.c
21564	PCI_REG_MODE3	0x63	via-velocity.c
21565	PCI_REG_DELAY_TIMER	0x64	via-velocity.c
21566	MODE2_PCEROPT	0x80	via-velocity.c	take PCI bus ERror as a fatal and shutdown from software control
21567	MODE2_TXQ16	0x40	via-velocity.c	TX write-back Queue control. 0->32 entries available in Tx write-back queue, 1->16 entries
21568	MODE2_TXPOST	0x08	via-velocity.c	(Not support in VT3119)
21569	MODE2_AUTOOPT	0x04	via-velocity.c	(VT3119 GHCI without such behavior)
21570	MODE2_MODE10T	0x02	via-velocity.c	used to control tx Threshold for 10M case
21571	MODE2_TCPLSOPT	0x01	via-velocity.c	TCP large send field update disable, hardware will not update related fields, leave it to software.
21572	MODE3_MIION	0x04	via-velocity.c	MII symbol codine error detect enable ??
21573	COMMAND_BUSM	0x04	via-velocity.c
21574	COMMAND_WAIT	0x80	via-velocity.c
21575	TX_RING_SIZE	2	w89c840.c
21576	RX_RING_SIZE	2	w89c840.c
21577	TX_FIFO_SIZE	(2048)	w89c840.c
21578	TX_BUG_FIFO_LIMIT	(TX_FIFO_SIZE-1514-16)	w89c840.c
21579	TX_TIMEOUT	(10*USECS_IN_MSEC)	w89c840.c
21580	PKT_BUF_SZ	1536	w89c840.c	Size of each temporary Rx buffer.
21581	W840_FLAGS	(PCI_USES_IO \| PCI_ADDR0 \| PCI_USES_MASTER)	w89c840.c
21582	W840_FLAGS	(PCI_USES_MEM \| PCI_ADDR1 \| PCI_USES_MASTER)	w89c840.c
21583	readb	inb	w89c840.c
21584	readw	inw	w89c840.c
21585	readl	inl	w89c840.c
21586	writeb	outb	w89c840.c
21587	writew	outw	w89c840.c
21588	writel	outl	w89c840.c
21589	PRIV_ALIGN	15	w89c840.c	Required alignment mask
21590	PRIV_ALIGN_BYTES	32	w89c840.c
21591	MDIO_WRITE0	(MDIO_EnbOutput)	w89c840.c
21592	MDIO_WRITE1	(MDIO_DataOut \| MDIO_EnbOutput)	w89c840.c
21593	WD_DEFAULT_MEM	0xCC000	wd.c
21594	TX_INIT_RATE	16	3c509.h
21595	TX_INIT_MAX_RATE	64	3c509.h
21596	RX_INIT_LATENCY	64	3c509.h
21597	RX_INIT_EARLY_THRESH	64	3c509.h
21598	MIN_RX_EARLY_THRESHF	16	3c509.h	not less than ether_header
21599	MIN_RX_EARLY_THRESHL	4	3c509.h
21600	EEPROMSIZE	0x40	3c509.h
21601	MAX_EEPROMBUSY	1000	3c509.h
21602	EP_ID_PORT_START	0x110	3c509.h	avoid 0x100 to avoid conflict with SB16
21603	EP_ID_PORT_INC	0x10	3c509.h
21604	EP_ID_PORT_END	0x200	3c509.h
21605	EP_TAG_MAX	0x7	3c509.h	must be 2^n - 1
21606	EEPROM_CMD_RD	0x0080	3c509.h	Read: Address required (5 bits)
21607	EEPROM_CMD_WR	0x0040	3c509.h	Write: Address required (5 bits)
21608	EEPROM_CMD_ERASE	0x00c0	3c509.h	Erase: Address required (5 bits)
21609	EEPROM_CMD_EWEN	0x0030	3c509.h	Erase/Write Enable: No data required
21610	EEPROM_BUSY	(1<<15)	3c509.h
21611	EEPROM_TST_MODE	(1<<14)	3c509.h
21612	EEPROM_NODE_ADDR_0	0x0	3c509.h	Word
21613	EEPROM_NODE_ADDR_1	0x1	3c509.h	Word
21614	EEPROM_NODE_ADDR_2	0x2	3c509.h	Word
21615	EEPROM_PROD_ID	0x3	3c509.h	0x9[0-f]50
21616	EEPROM_MFG_ID	0x7	3c509.h	0x6d50
21617	EEPROM_ADDR_CFG	0x8	3c509.h	Base addr
21618	EEPROM_RESOURCE_CFG	0x9	3c509.h	IRQ. Bits 12-15
21619	EP_COMMAND	0x0e	3c509.h	Write. BASE+0x0e is always a
21620	EP_STATUS	0x0e	3c509.h	Read. BASE+0x0e is always status
21621	EP_WINDOW	0x0f	3c509.h	Read. BASE+0x0f is always window
21622	EP_W0_EEPROM_DATA	0x0c	3c509.h
21623	EP_W0_EEPROM_COMMAND	0x0a	3c509.h
21624	EP_W0_RESOURCE_CFG	0x08	3c509.h
21625	EP_W0_ADDRESS_CFG	0x06	3c509.h
21626	EP_W0_CONFIG_CTRL	0x04	3c509.h
21627	EP_W0_PRODUCT_ID	0x02	3c509.h
21628	EP_W0_MFG_ID	0x00	3c509.h
21629	EP_W1_TX_PIO_WR_2	0x02	3c509.h
21630	EP_W1_TX_PIO_WR_1	0x00	3c509.h
21631	EP_W1_FREE_TX	0x0c	3c509.h
21632	EP_W1_TX_STATUS	0x0b	3c509.h	byte
21633	EP_W1_TIMER	0x0a	3c509.h	byte
21634	EP_W1_RX_STATUS	0x08	3c509.h
21635	EP_W1_RX_PIO_RD_2	0x02	3c509.h
21636	EP_W1_RX_PIO_RD_1	0x00	3c509.h
21637	EP_W2_ADDR_5	0x05	3c509.h
21638	EP_W2_ADDR_4	0x04	3c509.h
21639	EP_W2_ADDR_3	0x03	3c509.h
21640	EP_W2_ADDR_2	0x02	3c509.h
21641	EP_W2_ADDR_1	0x01	3c509.h
21642	EP_W2_ADDR_0	0x00	3c509.h
21643	EP_W3_FREE_TX	0x0c	3c509.h
21644	EP_W3_FREE_RX	0x0a	3c509.h
21645	EP_W4_MEDIA_TYPE	0x0a	3c509.h
21646	EP_W4_CTRLR_STATUS	0x08	3c509.h
21647	EP_W4_NET_DIAG	0x06	3c509.h
21648	EP_W4_FIFO_DIAG	0x04	3c509.h
21649	EP_W4_HOST_DIAG	0x02	3c509.h
21650	EP_W4_TX_DIAG	0x00	3c509.h
21651	EP_W5_READ_0_MASK	0x0c	3c509.h
21652	EP_W5_INTR_MASK	0x0a	3c509.h
21653	EP_W5_RX_FILTER	0x08	3c509.h
21654	EP_W5_RX_EARLY_THRESH	0x06	3c509.h
21655	EP_W5_TX_AVAIL_THRESH	0x02	3c509.h
21656	EP_W5_TX_START_THRESH	0x00	3c509.h
21657	TX_TOTAL_OK	0x0c	3c509.h
21658	RX_TOTAL_OK	0x0a	3c509.h
21659	TX_DEFERRALS	0x08	3c509.h
21660	RX_FRAMES_OK	0x07	3c509.h
21661	TX_FRAMES_OK	0x06	3c509.h
21662	RX_OVERRUNS	0x05	3c509.h
21663	TX_COLLISIONS	0x04	3c509.h
21664	TX_AFTER_1_COLLISION	0x03	3c509.h
21665	TX_AFTER_X_COLLISIONS	0x02	3c509.h
21666	TX_NO_SQE	0x01	3c509.h
21667	TX_CD_LOST	0x00	3c509.h
21668	GLOBAL_RESET	(unsigned short) 0x0000	3c509.h	Wait at least 1ms
21669	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c509.h
21670	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c509.h	Read ADDR_CFG reg to
21671	RX_DISABLE	(unsigned short) (0x3<<11)	3c509.h	state disabled on
21672	RX_ENABLE	(unsigned short) (0x4<<11)	3c509.h
21673	RX_RESET	(unsigned short) (0x5<<11)	3c509.h
21674	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c509.h
21675	TX_ENABLE	(unsigned short) (0x9<<11)	3c509.h
21676	TX_DISABLE	(unsigned short) (0xa<<11)	3c509.h
21677	TX_RESET	(unsigned short) (0xb<<11)	3c509.h
21678	REQ_INTR	(unsigned short) (0xc<<11)	3c509.h
21679	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c509.h
21680	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c509.h
21681	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c509.h
21682	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c509.h
21683	FIL_GROUP	(unsigned short) (0x2)	3c509.h
21684	FIL_BRDCST	(unsigned short) (0x4)	3c509.h
21685	FIL_ALL	(unsigned short) (0x8)	3c509.h
21686	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c509.h
21687	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c509.h
21688	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c509.h
21689	STATS_ENABLE	(unsigned short) (0x15<<11)	3c509.h
21690	STATS_DISABLE	(unsigned short) (0x16<<11)	3c509.h
21691	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c509.h
21692	ACK_INTR	(unsigned short) (0x6800)	3c509.h
21693	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c509.h
21694	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c509.h
21695	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c509.h
21696	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c509.h
21697	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c509.h
21698	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c509.h
21699	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c509.h
21700	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c509.h
21701	S_INTR_LATCH	(unsigned short) (0x1)	3c509.h
21702	S_CARD_FAILURE	(unsigned short) (0x2)	3c509.h
21703	S_TX_COMPLETE	(unsigned short) (0x4)	3c509.h
21704	S_TX_AVAIL	(unsigned short) (0x8)	3c509.h
21705	S_RX_COMPLETE	(unsigned short) (0x10)	3c509.h
21706	S_RX_EARLY	(unsigned short) (0x20)	3c509.h
21707	S_INT_RQD	(unsigned short) (0x40)	3c509.h
21708	S_UPD_STATS	(unsigned short) (0x80)	3c509.h
21709	S_5_INTS	(S_CARD_FAILURE\|S_TX_COMPLETE\|\ S_TX_AVAIL\|S_RX_COMPLETE\|S_RX_EARLY)	3c509.h
21710	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c509.h
21711	ERR_RX_INCOMPLETE	(unsigned short) (0x1<<15)	3c509.h
21712	ERR_RX	(unsigned short) (0x1<<14)	3c509.h
21713	ERR_RX_OVERRUN	(unsigned short) (0x8<<11)	3c509.h
21714	ERR_RX_RUN_PKT	(unsigned short) (0xb<<11)	3c509.h
21715	ERR_RX_ALIGN	(unsigned short) (0xc<<11)	3c509.h
21716	ERR_RX_CRC	(unsigned short) (0xd<<11)	3c509.h
21717	ERR_RX_OVERSIZE	(unsigned short) (0x9<<11)	3c509.h
21718	ERR_RX_DRIBBLE	(unsigned short) (0x2<<11)	3c509.h
21719	TXS_COMPLETE	0x80	3c509.h
21720	TXS_SUCCES_INTR_REQ	0x40	3c509.h
21721	TXS_JABBER	0x20	3c509.h
21722	TXS_UNDERRUN	0x10	3c509.h
21723	TXS_MAX_COLLISION	0x8	3c509.h
21724	TXS_STATUS_OVERFLOW	0x4	3c509.h
21725	IS_AUI	(1<<13)	3c509.h
21726	IS_BNC	(1<<12)	3c509.h
21727	IS_UTP	(1<<9)	3c509.h
21728	ENABLE_DRQ_IRQ	0x0001	3c509.h
21729	W0_P4_CMD_RESET_ADAPTER	0x4	3c509.h
21730	W0_P4_CMD_ENABLE_ADAPTER	0x1	3c509.h
21731	ENABLE_UTP	0xc0	3c509.h
21732	DISABLE_UTP	0x0	3c509.h
21733	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
21734	RX_ERROR	0x4000	3c509.h
21735	RX_INCOMPLETE	0x8000	3c509.h
21736	MFG_ID	0x6d50	3c509.h	in EEPROM and W0 ADDR_CONFIG
21737	PROD_ID	0x9150	3c509.h
21738	AUI	0x1	3c509.h
21739	BNC	0x2	3c509.h
21740	UTP	0x4	3c509.h
21741	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c509.h
21742	TX_INIT_RATE	16	3c595.h
21743	TX_INIT_MAX_RATE	64	3c595.h
21744	RX_INIT_LATENCY	64	3c595.h
21745	RX_INIT_EARLY_THRESH	64	3c595.h
21746	MIN_RX_EARLY_THRESHF	16	3c595.h	not less than ether_header
21747	MIN_RX_EARLY_THRESHL	4	3c595.h
21748	EEPROMSIZE	0x40	3c595.h
21749	MAX_EEPROMBUSY	1000	3c595.h
21750	VX_LAST_TAG	0xd7	3c595.h
21751	VX_MAX_BOARDS	16	3c595.h
21752	VX_ID_PORT	0x100	3c595.h
21753	BASE	(eth_nic_base)	3c595.h
21754	EEPROM_CMD_RD	0x0080	3c595.h	Read: Address required (5 bits)
21755	EEPROM_CMD_WR	0x0040	3c595.h	Write: Address required (5 bits)
21756	EEPROM_CMD_ERASE	0x00c0	3c595.h	Erase: Address required (5 bits)
21757	EEPROM_CMD_EWEN	0x0030	3c595.h	Erase/Write Enable: No data required
21758	EEPROM_BUSY	(1<<15)	3c595.h
21759	EEPROM_NODE_ADDR_0	0x0	3c595.h	Word
21760	EEPROM_NODE_ADDR_1	0x1	3c595.h	Word
21761	EEPROM_NODE_ADDR_2	0x2	3c595.h	Word
21762	EEPROM_PROD_ID	0x3	3c595.h	0x9[0-f]50
21763	EEPROM_MFG_ID	0x7	3c595.h	0x6d50
21764	EEPROM_ADDR_CFG	0x8	3c595.h	Base addr
21765	EEPROM_RESOURCE_CFG	0x9	3c595.h	IRQ. Bits 12-15
21766	EEPROM_OEM_ADDR_0	0xa	3c595.h	Word
21767	EEPROM_OEM_ADDR_1	0xb	3c595.h	Word
21768	EEPROM_OEM_ADDR_2	0xc	3c595.h	Word
21769	EEPROM_SOFT_INFO_2	0xf	3c595.h	Software information 2
21770	NO_RX_OVN_ANOMALY	(1<<5)	3c595.h
21771	VX_COMMAND	0x0e	3c595.h	Write. BASE+0x0e is always a
21772	VX_STATUS	0x0e	3c595.h	Read. BASE+0x0e is always status
21773	VX_WINDOW	0x0f	3c595.h	Read. BASE+0x0f is always window
21774	VX_W0_EEPROM_DATA	0x0c	3c595.h
21775	VX_W0_EEPROM_COMMAND	0x0a	3c595.h
21776	VX_W0_RESOURCE_CFG	0x08	3c595.h
21777	VX_W0_ADDRESS_CFG	0x06	3c595.h
21778	VX_W0_CONFIG_CTRL	0x04	3c595.h
21779	VX_W0_PRODUCT_ID	0x02	3c595.h
21780	VX_W0_MFG_ID	0x00	3c595.h
21781	VX_W1_TX_PIO_WR_2	0x02	3c595.h
21782	VX_W1_TX_PIO_WR_1	0x00	3c595.h
21783	VX_W1_FREE_TX	0x0c	3c595.h
21784	VX_W1_TX_STATUS	0x0b	3c595.h	byte
21785	VX_W1_TIMER	0x0a	3c595.h	byte
21786	VX_W1_RX_STATUS	0x08	3c595.h
21787	VX_W1_RX_PIO_RD_2	0x02	3c595.h
21788	VX_W1_RX_PIO_RD_1	0x00	3c595.h
21789	VX_W2_ADDR_5	0x05	3c595.h
21790	VX_W2_ADDR_4	0x04	3c595.h
21791	VX_W2_ADDR_3	0x03	3c595.h
21792	VX_W2_ADDR_2	0x02	3c595.h
21793	VX_W2_ADDR_1	0x01	3c595.h
21794	VX_W2_ADDR_0	0x00	3c595.h
21795	VX_W3_INTERNAL_CFG	0x00	3c595.h
21796	VX_W3_RESET_OPT	0x08	3c595.h
21797	VX_W3_FREE_TX	0x0c	3c595.h
21798	VX_W3_FREE_RX	0x0a	3c595.h
21799	VX_W4_MEDIA_TYPE	0x0a	3c595.h
21800	VX_W4_CTRLR_STATUS	0x08	3c595.h
21801	VX_W4_NET_DIAG	0x06	3c595.h
21802	VX_W4_FIFO_DIAG	0x04	3c595.h
21803	VX_W4_HOST_DIAG	0x02	3c595.h
21804	VX_W4_TX_DIAG	0x00	3c595.h
21805	VX_W5_READ_0_MASK	0x0c	3c595.h
21806	VX_W5_INTR_MASK	0x0a	3c595.h
21807	VX_W5_RX_FILTER	0x08	3c595.h
21808	VX_W5_RX_EARLY_THRESH	0x06	3c595.h
21809	VX_W5_TX_AVAIL_THRESH	0x02	3c595.h
21810	VX_W5_TX_START_THRESH	0x00	3c595.h
21811	TX_TOTAL_OK	0x0c	3c595.h
21812	RX_TOTAL_OK	0x0a	3c595.h
21813	TX_DEFERRALS	0x08	3c595.h
21814	RX_FRAMES_OK	0x07	3c595.h
21815	TX_FRAMES_OK	0x06	3c595.h
21816	RX_OVERRUNS	0x05	3c595.h
21817	TX_COLLISIONS	0x04	3c595.h
21818	TX_AFTER_1_COLLISION	0x03	3c595.h
21819	TX_AFTER_X_COLLISIONS	0x02	3c595.h
21820	TX_NO_SQE	0x01	3c595.h
21821	TX_CD_LOST	0x00	3c595.h
21822	GLOBAL_RESET	(unsigned short) 0x0000	3c595.h	Wait at least 1ms
21823	WINDOW_SELECT	(unsigned short) (0x1<<11)	3c595.h
21824	START_TRANSCEIVER	(unsigned short) (0x2<<11)	3c595.h	Read ADDR_CFG reg to
21825	RX_DISABLE	(unsigned short) (0x3<<11)	3c595.h	state disabled on
21826	RX_ENABLE	(unsigned short) (0x4<<11)	3c595.h
21827	RX_RESET	(unsigned short) (0x5<<11)	3c595.h
21828	RX_DISCARD_TOP_PACK	(unsigned short) (0x8<<11)	3c595.h
21829	TX_ENABLE	(unsigned short) (0x9<<11)	3c595.h
21830	TX_DISABLE	(unsigned short) (0xa<<11)	3c595.h
21831	TX_RESET	(unsigned short) (0xb<<11)	3c595.h
21832	REQ_INTR	(unsigned short) (0xc<<11)	3c595.h
21833	ACK_INTR	(unsigned short) (0x6800)	3c595.h
21834	C_INTR_LATCH	(unsigned short) (ACK_INTR\|0x1)	3c595.h
21835	C_CARD_FAILURE	(unsigned short) (ACK_INTR\|0x2)	3c595.h
21836	C_TX_COMPLETE	(unsigned short) (ACK_INTR\|0x4)	3c595.h
21837	C_TX_AVAIL	(unsigned short) (ACK_INTR\|0x8)	3c595.h
21838	C_RX_COMPLETE	(unsigned short) (ACK_INTR\|0x10)	3c595.h
21839	C_RX_EARLY	(unsigned short) (ACK_INTR\|0x20)	3c595.h
21840	C_INT_RQD	(unsigned short) (ACK_INTR\|0x40)	3c595.h
21841	C_UPD_STATS	(unsigned short) (ACK_INTR\|0x80)	3c595.h
21842	SET_INTR_MASK	(unsigned short) (0xe<<11)	3c595.h
21843	SET_RD_0_MASK	(unsigned short) (0xf<<11)	3c595.h
21844	SET_RX_FILTER	(unsigned short) (0x10<<11)	3c595.h
21845	FIL_INDIVIDUAL	(unsigned short) (0x1)	3c595.h
21846	FIL_MULTICAST	(unsigned short) (0x02)	3c595.h
21847	FIL_BRDCST	(unsigned short) (0x04)	3c595.h
21848	FIL_PROMISC	(unsigned short) (0x08)	3c595.h
21849	SET_RX_EARLY_THRESH	(unsigned short) (0x11<<11)	3c595.h
21850	SET_TX_AVAIL_THRESH	(unsigned short) (0x12<<11)	3c595.h
21851	SET_TX_START_THRESH	(unsigned short) (0x13<<11)	3c595.h
21852	STATS_ENABLE	(unsigned short) (0x15<<11)	3c595.h
21853	STATS_DISABLE	(unsigned short) (0x16<<11)	3c595.h
21854	STOP_TRANSCEIVER	(unsigned short) (0x17<<11)	3c595.h
21855	S_INTR_LATCH	(unsigned short) (0x1)	3c595.h
21856	S_CARD_FAILURE	(unsigned short) (0x2)	3c595.h
21857	S_TX_COMPLETE	(unsigned short) (0x4)	3c595.h
21858	S_TX_AVAIL	(unsigned short) (0x8)	3c595.h
21859	S_RX_COMPLETE	(unsigned short) (0x10)	3c595.h
21860	S_RX_EARLY	(unsigned short) (0x20)	3c595.h
21861	S_INT_RQD	(unsigned short) (0x40)	3c595.h
21862	S_UPD_STATS	(unsigned short) (0x80)	3c595.h
21863	S_COMMAND_IN_PROGRESS	(unsigned short) (0x1000)	3c595.h
21864	VX_BUSY_WAIT	while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS)	3c595.h
21865	ACF_CONNECTOR_BITS	14	3c595.h
21866	ACF_CONNECTOR_UTP	0	3c595.h
21867	ACF_CONNECTOR_AUI	1	3c595.h
21868	ACF_CONNECTOR_BNC	3	3c595.h
21869	INTERNAL_CONNECTOR_BITS	20	3c595.h
21870	INTERNAL_CONNECTOR_MASK	0x01700000	3c595.h
21871	ERR_INCOMPLETE	(unsigned short) (0x8000)	3c595.h
21872	ERR_RX	(unsigned short) (0x4000)	3c595.h
21873	ERR_MASK	(unsigned short) (0x7800)	3c595.h
21874	ERR_OVERRUN	(unsigned short) (0x4000)	3c595.h
21875	ERR_RUNT	(unsigned short) (0x5800)	3c595.h
21876	ERR_ALIGNMENT	(unsigned short) (0x6000)	3c595.h
21877	ERR_CRC	(unsigned short) (0x6800)	3c595.h
21878	ERR_OVERSIZE	(unsigned short) (0x4800)	3c595.h
21879	ERR_DRIBBLE	(unsigned short) (0x1000)	3c595.h
21880	TXS_COMPLETE	0x80	3c595.h
21881	TXS_INTR_REQ	0x40	3c595.h
21882	TXS_JABBER	0x20	3c595.h
21883	TXS_UNDERRUN	0x10	3c595.h
21884	TXS_MAX_COLLISION	0x8	3c595.h
21885	TXS_STATUS_OVERFLOW	0x4	3c595.h
21886	RS_AUI	(1<<5)	3c595.h
21887	RS_BNC	(1<<4)	3c595.h
21888	RS_UTP	(1<<3)	3c595.h
21889	RS_T4	(1<<0)	3c595.h
21890	RS_TX	(1<<1)	3c595.h
21891	RS_FX	(1<<2)	3c595.h
21892	RS_MII	(1<<6)	3c595.h
21893	FIFOS_RX_RECEIVING	(unsigned short) 0x8000	3c595.h
21894	FIFOS_RX_UNDERRUN	(unsigned short) 0x2000	3c595.h
21895	FIFOS_RX_STATUS_OVERRUN	(unsigned short) 0x1000	3c595.h
21896	FIFOS_RX_OVERRUN	(unsigned short) 0x0800	3c595.h
21897	FIFOS_TX_OVERRUN	(unsigned short) 0x0400	3c595.h
21898	TAG_ADAPTER	0xd0	3c595.h
21899	ACTIVATE_ADAPTER_TO_CONFIG	0xff	3c595.h
21900	ENABLE_DRQ_IRQ	0x0001	3c595.h
21901	MFG_ID	0x506d	3c595.h	`TCM'
21902	PROD_ID	0x5090	3c595.h
21903	JABBER_GUARD_ENABLE	0x40	3c595.h
21904	LINKBEAT_ENABLE	0x80	3c595.h
21905	ENABLE_UTP	(JABBER_GUARD_ENABLE \| LINKBEAT_ENABLE)	3c595.h
21906	DISABLE_UTP	0x0	3c595.h
21907	RX_BYTES_MASK	(unsigned short) (0x07ff)	3c595.h
21908	RX_ERROR	0x4000	3c595.h
21909	RX_INCOMPLETE	0x8000	3c595.h
21910	TX_INDICATE	1<<15	3c595.h
21911	VX_IOSIZE	0x20	3c595.h
21912	VX_CONNECTORS	8	3c595.h
21913	ASF_STAT	0x00	amd8111e.h	ASF status register
21914	CHIPID	0x04	amd8111e.h	Chip ID regsiter
21915	MIB_DATA	0x10	amd8111e.h	MIB data register
21916	MIB_ADDR	0x14	amd8111e.h	MIB address register
21917	STAT0	0x30	amd8111e.h	Status0 register
21918	INT0	0x38	amd8111e.h	Interrupt0 register
21919	INTEN0	0x40	amd8111e.h	Interrupt0 enable register
21920	CMD0	0x48	amd8111e.h	Command0 register
21921	CMD2	0x50	amd8111e.h	Command2 register
21922	CMD3	0x54	amd8111e.h	Command3 resiter
21923	CMD7	0x64	amd8111e.h	Command7 register
21924	CTRL1	0x6C	amd8111e.h	Control1 register
21925	CTRL2	0x70	amd8111e.h	Control2 register
21926	XMT_RING_LIMIT	0x7C	amd8111e.h	Transmit ring limit register
21927	AUTOPOLL0	0x88	amd8111e.h	Auto-poll0 register
21928	AUTOPOLL1	0x8A	amd8111e.h	Auto-poll1 register
21929	AUTOPOLL2	0x8C	amd8111e.h	Auto-poll2 register
21930	AUTOPOLL3	0x8E	amd8111e.h	Auto-poll3 register
21931	AUTOPOLL4	0x90	amd8111e.h	Auto-poll4 register
21932	AUTOPOLL5	0x92	amd8111e.h	Auto-poll5 register
21933	AP_VALUE	0x98	amd8111e.h	Auto-poll value register
21934	DLY_INT_A	0xA8	amd8111e.h	Group A delayed interrupt register
21935	DLY_INT_B	0xAC	amd8111e.h	Group B delayed interrupt register
21936	FLOW_CONTROL	0xC8	amd8111e.h	Flow control register
21937	PHY_ACCESS	0xD0	amd8111e.h	PHY access register
21938	STVAL	0xD8	amd8111e.h	Software timer value register
21939	XMT_RING_BASE_ADDR0	0x100	amd8111e.h	Transmit ring0 base addr register
21940	XMT_RING_BASE_ADDR1	0x108	amd8111e.h	Transmit ring1 base addr register
21941	XMT_RING_BASE_ADDR2	0x110	amd8111e.h	Transmit ring2 base addr register
21942	XMT_RING_BASE_ADDR3	0x118	amd8111e.h	Transmit ring2 base addr register
21943	RCV_RING_BASE_ADDR0	0x120	amd8111e.h	Transmit ring0 base addr register
21944	PMAT0	0x190	amd8111e.h	OnNow pattern register0
21945	PMAT1	0x194	amd8111e.h	OnNow pattern register1
21946	XMT_RING_LEN0	0x140	amd8111e.h	Transmit Ring0 length register
21947	XMT_RING_LEN1	0x144	amd8111e.h	Transmit Ring1 length register
21948	XMT_RING_LEN2	0x148	amd8111e.h	Transmit Ring2 length register
21949	XMT_RING_LEN3	0x14C	amd8111e.h	Transmit Ring3 length register
21950	RCV_RING_LEN0	0x150	amd8111e.h	Receive Ring0 length register
21951	SRAM_SIZE	0x178	amd8111e.h	SRAM size register
21952	SRAM_BOUNDARY	0x17A	amd8111e.h	SRAM boundary register
21953	PADR	0x160	amd8111e.h	Physical address register
21954	IFS1	0x18C	amd8111e.h	Inter-frame spacing Part1 register
21955	IFS	0x18D	amd8111e.h	Inter-frame spacing register
21956	IPG	0x18E	amd8111e.h	Inter-frame gap register
21957	LADRF	0x168	amd8111e.h	Logical address filter register
21958	PHY_SPEED_10	0x2	amd8111e.h
21959	PHY_SPEED_100	0x3	amd8111e.h
21960	rcv_miss_pkts	0x00	amd8111e.h
21961	rcv_octets	0x01	amd8111e.h
21962	rcv_broadcast_pkts	0x02	amd8111e.h
21963	rcv_multicast_pkts	0x03	amd8111e.h
21964	rcv_undersize_pkts	0x04	amd8111e.h
21965	rcv_oversize_pkts	0x05	amd8111e.h
21966	rcv_fragments	0x06	amd8111e.h
21967	rcv_jabbers	0x07	amd8111e.h
21968	rcv_unicast_pkts	0x08	amd8111e.h
21969	rcv_alignment_errors	0x09	amd8111e.h
21970	rcv_fcs_errors	0x0A	amd8111e.h
21971	rcv_good_octets	0x0B	amd8111e.h
21972	rcv_mac_ctrl	0x0C	amd8111e.h
21973	rcv_flow_ctrl	0x0D	amd8111e.h
21974	rcv_pkts_64_octets	0x0E	amd8111e.h
21975	rcv_pkts_65to127_octets	0x0F	amd8111e.h
21976	rcv_pkts_128to255_octets	0x10	amd8111e.h
21977	rcv_pkts_256to511_octets	0x11	amd8111e.h
21978	rcv_pkts_512to1023_octets	0x12	amd8111e.h
21979	rcv_pkts_1024to1518_octets	0x13	amd8111e.h
21980	rcv_unsupported_opcode	0x14	amd8111e.h
21981	rcv_symbol_errors	0x15	amd8111e.h
21982	rcv_drop_pkts_ring1	0x16	amd8111e.h
21983	rcv_drop_pkts_ring2	0x17	amd8111e.h
21984	rcv_drop_pkts_ring3	0x18	amd8111e.h
21985	rcv_drop_pkts_ring4	0x19	amd8111e.h
21986	rcv_jumbo_pkts	0x1A	amd8111e.h
21987	xmt_underrun_pkts	0x20	amd8111e.h
21988	xmt_octets	0x21	amd8111e.h
21989	xmt_packets	0x22	amd8111e.h
21990	xmt_broadcast_pkts	0x23	amd8111e.h
21991	xmt_multicast_pkts	0x24	amd8111e.h
21992	xmt_collisions	0x25	amd8111e.h
21993	xmt_unicast_pkts	0x26	amd8111e.h
21994	xmt_one_collision	0x27	amd8111e.h
21995	xmt_multiple_collision	0x28	amd8111e.h
21996	xmt_deferred_transmit	0x29	amd8111e.h
21997	xmt_late_collision	0x2A	amd8111e.h
21998	xmt_excessive_defer	0x2B	amd8111e.h
21999	xmt_loss_carrier	0x2C	amd8111e.h
22000	xmt_excessive_collision	0x2D	amd8111e.h
22001	xmt_back_pressure	0x2E	amd8111e.h
22002	xmt_flow_ctrl	0x2F	amd8111e.h
22003	xmt_pkts_64_octets	0x30	amd8111e.h
22004	xmt_pkts_65to127_octets	0x31	amd8111e.h
22005	xmt_pkts_128to255_octets	0x32	amd8111e.h
22006	xmt_pkts_256to511_octets	0x33	amd8111e.h
22007	xmt_pkts_512to1023_octets	0x34	amd8111e.h
22008	xmt_pkts_1024to1518_octet	0x35	amd8111e.h
22009	xmt_oversize_pkts	0x36	amd8111e.h
22010	xmt_jumbo_pkts	0x37	amd8111e.h
22011	DEFAULT_IPG	0x60	amd8111e.h
22012	IFS1_DELTA	36	amd8111e.h
22013	IPG_CONVERGE_JIFFIES	(HZ/2)	amd8111e.h
22014	IPG_STABLE_TIME	5	amd8111e.h
22015	MIN_IPG	96	amd8111e.h
22016	MAX_IPG	255	amd8111e.h
22017	IPG_STEP	16	amd8111e.h
22018	CSTATE	1	amd8111e.h
22019	SSTATE	2	amd8111e.h
22020	RESET_RX_FLAGS	0x0000	amd8111e.h
22021	TT_MASK	0x000c	amd8111e.h
22022	TCC_MASK	0x0003	amd8111e.h
22023	AMD8111E_REG_DUMP_LEN	13*sizeof(u32)	amd8111e.h
22024	CRC32	0xedb88320	amd8111e.h
22025	INITCRC	0xFFFFFFFF	amd8111e.h
22026	L1_CACHE_BYTES	128	bnx2.h	Rough approximaition of the cache line size
22027	PCI_D0	((pci_power_t) 0)	bnx2.h
22028	PCI_D1	((pci_power_t) 1)	bnx2.h
22029	PCI_D2	((pci_power_t) 2)	bnx2.h
22030	PCI_D3hot	((pci_power_t) 3)	bnx2.h
22031	PCI_D3cold	((pci_power_t) 4)	bnx2.h
22032	PCI_UNKNOWN	((pci_power_t) 5)	bnx2.h
22033	PCI_POWER_ERROR	((pci_power_t) -1)	bnx2.h
22034	PCI_CAP_ID_PCIX	0x07	bnx2.h	PCI-X
22035	PCI_X_CMD	2	bnx2.h	Modes & Features
22036	PCI_X_CMD_ERO	0x0002	bnx2.h	Enable Relaxed Ordering
22037	ADVERTISED_10baseT_Half	(1 << 0)	bnx2.h
22038	ADVERTISED_10baseT_Full	(1 << 1)	bnx2.h
22039	ADVERTISED_100baseT_Half	(1 << 2)	bnx2.h
22040	ADVERTISED_100baseT_Full	(1 << 3)	bnx2.h
22041	ADVERTISED_1000baseT_Half	(1 << 4)	bnx2.h
22042	ADVERTISED_1000baseT_Full	(1 << 5)	bnx2.h
22043	ADVERTISED_Autoneg	(1 << 6)	bnx2.h
22044	ADVERTISED_TP	(1 << 7)	bnx2.h
22045	ADVERTISED_AUI	(1 << 8)	bnx2.h
22046	ADVERTISED_MII	(1 << 9)	bnx2.h
22047	ADVERTISED_FIBRE	(1 << 10)	bnx2.h
22048	ADVERTISED_BNC	(1 << 11)	bnx2.h
22049	DUPLEX_HALF	0x00	bnx2.h
22050	DUPLEX_FULL	0x01	bnx2.h
22051	DUPLEX_INVALID	0x02	bnx2.h
22052	PORT_TP	0x00	bnx2.h
22053	PORT_AUI	0x01	bnx2.h
22054	PORT_MII	0x02	bnx2.h
22055	PORT_FIBRE	0x03	bnx2.h
22056	PORT_BNC	0x04	bnx2.h
22057	XCVR_INTERNAL	0x00	bnx2.h
22058	XCVR_EXTERNAL	0x01	bnx2.h
22059	XCVR_DUMMY1	0x02	bnx2.h
22060	XCVR_DUMMY2	0x03	bnx2.h
22061	XCVR_DUMMY3	0x04	bnx2.h
22062	AUTONEG_DISABLE	0x00	bnx2.h
22063	AUTONEG_ENABLE	0x01	bnx2.h
22064	WAKE_PHY	(1 << 0)	bnx2.h
22065	WAKE_UCAST	(1 << 1)	bnx2.h
22066	WAKE_MCAST	(1 << 2)	bnx2.h
22067	WAKE_BCAST	(1 << 3)	bnx2.h
22068	WAKE_ARP	(1 << 4)	bnx2.h
22069	WAKE_MAGIC	(1 << 5)	bnx2.h
22070	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
22071	MII_BMCR	0x00	bnx2.h	Basic mode control register
22072	MII_BMSR	0x01	bnx2.h	Basic mode status register
22073	MII_PHYSID1	0x02	bnx2.h	PHYS ID 1
22074	MII_PHYSID2	0x03	bnx2.h	PHYS ID 2
22075	MII_ADVERTISE	0x04	bnx2.h	Advertisement control reg
22076	MII_LPA	0x05	bnx2.h	Link partner ability reg
22077	MII_EXPANSION	0x06	bnx2.h	Expansion register
22078	MII_CTRL1000	0x09	bnx2.h	1000BASE-T control
22079	MII_STAT1000	0x0a	bnx2.h	1000BASE-T status
22080	MII_DCOUNTER	0x12	bnx2.h	Disconnect counter
22081	MII_FCSCOUNTER	0x13	bnx2.h	False carrier counter
22082	MII_NWAYTEST	0x14	bnx2.h	N-way auto-neg test reg
22083	MII_RERRCOUNTER	0x15	bnx2.h	Receive error counter
22084	MII_SREVISION	0x16	bnx2.h	Silicon revision
22085	MII_RESV1	0x17	bnx2.h	Reserved...
22086	MII_LBRERROR	0x18	bnx2.h	Lpback, rx, bypass error
22087	MII_PHYADDR	0x19	bnx2.h	PHY address
22088	MII_RESV2	0x1a	bnx2.h	Reserved...
22089	MII_TPISTATUS	0x1b	bnx2.h	TPI status for 10mbps
22090	MII_NCONFIG	0x1c	bnx2.h	Network interface config
22091	BMCR_RESV	0x007f	bnx2.h	Unused...
22092	BMCR_SPEED1000	0x0040	bnx2.h	MSB of Speed (1000)
22093	BMCR_CTST	0x0080	bnx2.h	Collision test
22094	BMCR_FULLDPLX	0x0100	bnx2.h	Full duplex
22095	BMCR_ANRESTART	0x0200	bnx2.h	Auto negotiation restart
22096	BMCR_ISOLATE	0x0400	bnx2.h	Disconnect DP83840 from MII
22097	BMCR_PDOWN	0x0800	bnx2.h	Powerdown the DP83840
22098	BMCR_ANENABLE	0x1000	bnx2.h	Enable auto negotiation
22099	BMCR_SPEED100	0x2000	bnx2.h	Select 100Mbps
22100	BMCR_LOOPBACK	0x4000	bnx2.h	TXD loopback bits
22101	BMCR_RESET	0x8000	bnx2.h	Reset the DP83840
22102	BMSR_ERCAP	0x0001	bnx2.h	Ext-reg capability
22103	BMSR_JCD	0x0002	bnx2.h	Jabber detected
22104	BMSR_LSTATUS	0x0004	bnx2.h	Link status
22105	BMSR_ANEGCAPABLE	0x0008	bnx2.h	Able to do auto-negotiation
22106	BMSR_RFAULT	0x0010	bnx2.h	Remote fault detected
22107	BMSR_ANEGCOMPLETE	0x0020	bnx2.h	Auto-negotiation complete
22108	BMSR_RESV	0x07c0	bnx2.h	Unused...
22109	BMSR_10HALF	0x0800	bnx2.h	Can do 10mbps, half-duplex
22110	BMSR_10FULL	0x1000	bnx2.h	Can do 10mbps, full-duplex
22111	BMSR_100HALF	0x2000	bnx2.h	Can do 100mbps, half-duplex
22112	BMSR_100FULL	0x4000	bnx2.h	Can do 100mbps, full-duplex
22113	BMSR_100BASE4	0x8000	bnx2.h	Can do 100mbps, 4k packets
22114	ADVERTISE_SLCT	0x001f	bnx2.h	Selector bits
22115	ADVERTISE_CSMA	0x0001	bnx2.h	Only selector supported
22116	ADVERTISE_10HALF	0x0020	bnx2.h	Try for 10mbps half-duplex
22117	ADVERTISE_10FULL	0x0040	bnx2.h	Try for 10mbps full-duplex
22118	ADVERTISE_100HALF	0x0080	bnx2.h	Try for 100mbps half-duplex
22119	ADVERTISE_100FULL	0x0100	bnx2.h	Try for 100mbps full-duplex
22120	ADVERTISE_100BASE4	0x0200	bnx2.h	Try for 100mbps 4k packets
22121	ADVERTISE_RESV	0x1c00	bnx2.h	Unused...
22122	ADVERTISE_RFAULT	0x2000	bnx2.h	Say we can detect faults
22123	ADVERTISE_LPACK	0x4000	bnx2.h	Ack link partners response
22124	ADVERTISE_NPAGE	0x8000	bnx2.h	Next page bit
22125	ADVERTISE_1000XFULL	0x0020	bnx2.h	Try for 1000BASE-X full-duplex
22126	ADVERTISE_10FULL	0x0040	bnx2.h	Try for 10mbps full-duplex
22127	ADVERTISE_1000XHALF	0x0040	bnx2.h	Try for 1000BASE-X half-duplex
22128	ADVERTISE_1000XPAUSE	0x0080	bnx2.h	Try for 1000BASE-X pause
22129	ADVERTISE_PAUSE_CAP	0x0400	bnx2.h	Try for pause
22130	ADVERTISE_1000XPSE_ASYM	0x0100	bnx2.h	Try for 1000BASE-X asym pause
22131	ADVERTISE_PAUSE_ASYM	0x0800	bnx2.h	Try for asymetric pause
22132	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	bnx2.h
22133	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	bnx2.h
22134	LPA_SLCT	0x001f	bnx2.h	Same as advertise selector
22135	LPA_10HALF	0x0020	bnx2.h	Can do 10mbps half-duplex
22136	LPA_10FULL	0x0040	bnx2.h	Can do 10mbps full-duplex
22137	LPA_100HALF	0x0080	bnx2.h	Can do 100mbps half-duplex
22138	LPA_100FULL	0x0100	bnx2.h	Can do 100mbps full-duplex
22139	LPA_100BASE4	0x0200	bnx2.h	Can do 100mbps 4k packets
22140	LPA_RESV	0x1c00	bnx2.h	Unused...
22141	LPA_RFAULT	0x2000	bnx2.h	Link partner faulted
22142	LPA_LPACK	0x4000	bnx2.h	Link partner acked us
22143	LPA_NPAGE	0x8000	bnx2.h	Next page bit
22144	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	bnx2.h
22145	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	bnx2.h
22146	EXPANSION_NWAY	0x0001	bnx2.h	Can do N-way auto-nego
22147	EXPANSION_LCWP	0x0002	bnx2.h	Got new RX page code word
22148	EXPANSION_ENABLENPAGE	0x0004	bnx2.h	This enables npage words
22149	EXPANSION_NPCAPABLE	0x0008	bnx2.h	Link partner supports npage
22150	EXPANSION_MFAULTS	0x0010	bnx2.h	Multiple faults detected
22151	EXPANSION_RESV	0xffe0	bnx2.h	Unused...
22152	ADVERTISE_1000FULL	0x0200	bnx2.h	Advertise 1000BASE-T full duplex
22153	ADVERTISE_1000HALF	0x0100	bnx2.h	Advertise 1000BASE-T half duplex
22154	NWAYTEST_RESV1	0x00ff	bnx2.h	Unused...
22155	NWAYTEST_LOOPBACK	0x0100	bnx2.h	Enable loopback for N-way
22156	NWAYTEST_RESV2	0xfe00	bnx2.h	Unused...
22157	SPEED_10	10	bnx2.h
22158	SPEED_100	100	bnx2.h
22159	SPEED_1000	1000	bnx2.h
22160	SPEED_2500	2500	bnx2.h
22161	SPEED_INVALID	0	bnx2.h	XXX was 3
22162	DUPLEX_HALF	0x00	bnx2.h
22163	DUPLEX_FULL	0x01	bnx2.h
22164	DUPLEX_INVALID	0x02	bnx2.h
22165	PORT_TP	0x00	bnx2.h
22166	PORT_AUI	0x01	bnx2.h
22167	PORT_MII	0x02	bnx2.h
22168	PORT_FIBRE	0x03	bnx2.h
22169	PORT_BNC	0x04	bnx2.h
22170	XCVR_INTERNAL	0x00	bnx2.h
22171	XCVR_EXTERNAL	0x01	bnx2.h
22172	XCVR_DUMMY1	0x02	bnx2.h
22173	XCVR_DUMMY2	0x03	bnx2.h
22174	XCVR_DUMMY3	0x04	bnx2.h
22175	AUTONEG_DISABLE	0x00	bnx2.h
22176	AUTONEG_ENABLE	0x01	bnx2.h
22177	WAKE_PHY	(1 << 0)	bnx2.h
22178	WAKE_UCAST	(1 << 1)	bnx2.h
22179	WAKE_MCAST	(1 << 2)	bnx2.h
22180	WAKE_BCAST	(1 << 3)	bnx2.h
22181	WAKE_ARP	(1 << 4)	bnx2.h
22182	WAKE_MAGIC	(1 << 5)	bnx2.h
22183	WAKE_MAGICSECURE	(1 << 6)	bnx2.h	only meaningful if WAKE_MAGIC
22184	BNX2_L2CTX_TYPE	0x00000000	bnx2.h
22185	BNX2_L2CTX_TYPE_SIZE_L2	((0xc0/0x20)<<16)	bnx2.h
22186	BNX2_L2CTX_TYPE_TYPE	(0xf<<28)	bnx2.h
22187	BNX2_L2CTX_TYPE_TYPE_EMPTY	(0<<28)	bnx2.h
22188	BNX2_L2CTX_TYPE_TYPE_L2	(1<<28)	bnx2.h
22189	BNX2_L2CTX_TX_HOST_BIDX	0x00000088	bnx2.h
22190	BNX2_L2CTX_EST_NBD	0x00000088	bnx2.h
22191	BNX2_L2CTX_CMD_TYPE	0x00000088	bnx2.h
22192	BNX2_L2CTX_CMD_TYPE_TYPE	(0xf<<24)	bnx2.h
22193	BNX2_L2CTX_CMD_TYPE_TYPE_L2	(0<<24)	bnx2.h
22194	BNX2_L2CTX_CMD_TYPE_TYPE_TCP	(1<<24)	bnx2.h
22195	BNX2_L2CTX_TX_HOST_BSEQ	0x00000090	bnx2.h
22196	BNX2_L2CTX_TSCH_BSEQ	0x00000094	bnx2.h
22197	BNX2_L2CTX_TBDR_BSEQ	0x00000098	bnx2.h
22198	BNX2_L2CTX_TBDR_BOFF	0x0000009c	bnx2.h
22199	BNX2_L2CTX_TBDR_BIDX	0x0000009c	bnx2.h
22200	BNX2_L2CTX_TBDR_BHADDR_HI	0x000000a0	bnx2.h
22201	BNX2_L2CTX_TBDR_BHADDR_LO	0x000000a4	bnx2.h
22202	BNX2_L2CTX_TXP_BOFF	0x000000a8	bnx2.h
22203	BNX2_L2CTX_TXP_BIDX	0x000000a8	bnx2.h
22204	BNX2_L2CTX_TXP_BSEQ	0x000000ac	bnx2.h
22205	BNX2_L2CTX_BD_PRE_READ	0x00000000	bnx2.h
22206	BNX2_L2CTX_CTX_SIZE	0x00000000	bnx2.h
22207	BNX2_L2CTX_CTX_TYPE	0x00000000	bnx2.h
22208	BNX2_L2CTX_CTX_TYPE_SIZE_L2	((0x20/20)<<16)	bnx2.h
22209	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0xf<<28)	bnx2.h
22210	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(0<<28)	bnx2.h
22211	BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_	(1<<28)	bnx2.h
22212	BNX2_L2CTX_HOST_BDIDX	0x00000004	bnx2.h
22213	BNX2_L2CTX_HOST_BSEQ	0x00000008	bnx2.h
22214	BNX2_L2CTX_NX_BSEQ	0x0000000c	bnx2.h
22215	BNX2_L2CTX_NX_BDHADDR_HI	0x00000010	bnx2.h
22216	BNX2_L2CTX_NX_BDHADDR_LO	0x00000014	bnx2.h
22217	BNX2_L2CTX_NX_BDIDX	0x00000018	bnx2.h
22218	BNX2_PCICFG_MISC_CONFIG	0x00000068	bnx2.h
22219	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<2)	bnx2.h
22220	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<3)	bnx2.h
22221	BNX2_PCICFG_MISC_CONFIG_CLOCK_C	(1L<<5)	bnx2.h
22222	BNX2_PCICFG_MISC_CONFIG_TARGET_	(1L<<6)	bnx2.h
22223	BNX2_PCICFG_MISC_CONFIG_REG_WIN	(1L<<7)	bnx2.h
22224	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<8)	bnx2.h
22225	BNX2_PCICFG_MISC_CONFIG_CORE_RS	(1L<<9)	bnx2.h
22226	BNX2_PCICFG_MISC_CONFIG_ASIC_ME	(0xffL<<16)	bnx2.h
22227	BNX2_PCICFG_MISC_CONFIG_ASIC_BA	(0xfL<<24)	bnx2.h
22228	BNX2_PCICFG_MISC_CONFIG_ASIC_ID	(0xfL<<28)	bnx2.h
22229	BNX2_PCICFG_MISC_STATUS	0x0000006c	bnx2.h
22230	BNX2_PCICFG_MISC_STATUS_INTA_VA	(1L<<0)	bnx2.h
22231	BNX2_PCICFG_MISC_STATUS_32BIT_D	(1L<<1)	bnx2.h
22232	BNX2_PCICFG_MISC_STATUS_M66EN	(1L<<2)	bnx2.h
22233	BNX2_PCICFG_MISC_STATUS_PCIX_DE	(1L<<3)	bnx2.h
22234	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0x3L<<4)	bnx2.h
22235	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(0L<<4)	bnx2.h
22236	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(1L<<4)	bnx2.h
22237	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(2L<<4)	bnx2.h
22238	BNX2_PCICFG_MISC_STATUS_PCIX_SP	(3L<<4)	bnx2.h
22239	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	0x00000070	bnx2.h
22240	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
22241	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<0)	bnx2.h
22242	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<0)	bnx2.h
22243	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<0)	bnx2.h
22244	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(3L<<0)	bnx2.h
22245	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<0)	bnx2.h
22246	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(5L<<0)	bnx2.h
22247	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(6L<<0)	bnx2.h
22248	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(7L<<0)	bnx2.h
22249	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<0)	bnx2.h
22250	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<6)	bnx2.h
22251	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<7)	bnx2.h
22252	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0x7L<<8)	bnx2.h
22253	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<8)	bnx2.h
22254	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<8)	bnx2.h
22255	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<8)	bnx2.h
22256	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<8)	bnx2.h
22257	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<11)	bnx2.h
22258	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfL<<12)	bnx2.h
22259	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0L<<12)	bnx2.h
22260	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<12)	bnx2.h
22261	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(2L<<12)	bnx2.h
22262	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(4L<<12)	bnx2.h
22263	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(8L<<12)	bnx2.h
22264	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<16)	bnx2.h
22265	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<17)	bnx2.h
22266	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<18)	bnx2.h
22267	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(1L<<19)	bnx2.h
22268	BNX2_PCICFG_PCI_CLOCK_CONTROL_B	(0xfffL<<20)	bnx2.h
22269	BNX2_PCICFG_REG_WINDOW_ADDRESS	0x00000078	bnx2.h
22270	BNX2_PCICFG_REG_WINDOW	0x00000080	bnx2.h
22271	BNX2_PCICFG_INT_ACK_CMD	0x00000084	bnx2.h
22272	BNX2_PCICFG_INT_ACK_CMD_INDEX	(0xffffL<<0)	bnx2.h
22273	BNX2_PCICFG_INT_ACK_CMD_INDEX_V	(1L<<16)	bnx2.h
22274	BNX2_PCICFG_INT_ACK_CMD_USE_INT	(1L<<17)	bnx2.h
22275	BNX2_PCICFG_INT_ACK_CMD_MASK_IN	(1L<<18)	bnx2.h
22276	BNX2_PCICFG_STATUS_BIT_SET_CMD	0x00000088	bnx2.h
22277	BNX2_PCICFG_STATUS_BIT_CLEAR_CM	0x0000008c	bnx2.h
22278	BNX2_PCICFG_MAILBOX_QUEUE_ADDR	0x00000090	bnx2.h
22279	BNX2_PCICFG_MAILBOX_QUEUE_DATA	0x00000094	bnx2.h
22280	BNX2_PCI_GRC_WINDOW_ADDR	0x00000400	bnx2.h
22281	BNX2_PCI_GRC_WINDOW_ADDR_PCI_GR	(0x3ffffL<<8)	bnx2.h
22282	BNX2_PCI_CONFIG_1	0x00000404	bnx2.h
22283	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0x7L<<8)	bnx2.h
22284	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(0L<<8)	bnx2.h
22285	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(1L<<8)	bnx2.h
22286	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(2L<<8)	bnx2.h
22287	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(3L<<8)	bnx2.h
22288	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(4L<<8)	bnx2.h
22289	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(5L<<8)	bnx2.h
22290	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(6L<<8)	bnx2.h
22291	BNX2_PCI_CONFIG_1_READ_BOUNDARY	(7L<<8)	bnx2.h
22292	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0x7L<<11)	bnx2.h
22293	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(0L<<11)	bnx2.h
22294	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(1L<<11)	bnx2.h
22295	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(2L<<11)	bnx2.h
22296	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(3L<<11)	bnx2.h
22297	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(4L<<11)	bnx2.h
22298	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(5L<<11)	bnx2.h
22299	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(6L<<11)	bnx2.h
22300	BNX2_PCI_CONFIG_1_WRITE_BOUNDAR	(7L<<11)	bnx2.h
22301	BNX2_PCI_CONFIG_2	0x00000408	bnx2.h
22302	BNX2_PCI_CONFIG_2_BAR1_SIZE	(0xfL<<0)	bnx2.h
22303	BNX2_PCI_CONFIG_2_BAR1_SIZE_DIS	(0L<<0)	bnx2.h
22304	BNX2_PCI_CONFIG_2_BAR1_SIZE_64K	(1L<<0)	bnx2.h
22305	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(2L<<0)	bnx2.h
22306	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(3L<<0)	bnx2.h
22307	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(4L<<0)	bnx2.h
22308	BNX2_PCI_CONFIG_2_BAR1_SIZE_1M	(5L<<0)	bnx2.h
22309	BNX2_PCI_CONFIG_2_BAR1_SIZE_2M	(6L<<0)	bnx2.h
22310	BNX2_PCI_CONFIG_2_BAR1_SIZE_4M	(7L<<0)	bnx2.h
22311	BNX2_PCI_CONFIG_2_BAR1_SIZE_8M	(8L<<0)	bnx2.h
22312	BNX2_PCI_CONFIG_2_BAR1_SIZE_16M	(9L<<0)	bnx2.h
22313	BNX2_PCI_CONFIG_2_BAR1_SIZE_32M	(10L<<0)	bnx2.h
22314	BNX2_PCI_CONFIG_2_BAR1_SIZE_64M	(11L<<0)	bnx2.h
22315	BNX2_PCI_CONFIG_2_BAR1_SIZE_128	(12L<<0)	bnx2.h
22316	BNX2_PCI_CONFIG_2_BAR1_SIZE_256	(13L<<0)	bnx2.h
22317	BNX2_PCI_CONFIG_2_BAR1_SIZE_512	(14L<<0)	bnx2.h
22318	BNX2_PCI_CONFIG_2_BAR1_SIZE_1G	(15L<<0)	bnx2.h
22319	BNX2_PCI_CONFIG_2_BAR1_64ENA	(1L<<4)	bnx2.h
22320	BNX2_PCI_CONFIG_2_EXP_ROM_RETRY	(1L<<5)	bnx2.h
22321	BNX2_PCI_CONFIG_2_CFG_CYCLE_RET	(1L<<6)	bnx2.h
22322	BNX2_PCI_CONFIG_2_FIRST_CFG_DON	(1L<<7)	bnx2.h
22323	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE	(0xffL<<8)	bnx2.h
22324	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(0L<<8)	bnx2.h
22325	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(1L<<8)	bnx2.h
22326	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(2L<<8)	bnx2.h
22327	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(3L<<8)	bnx2.h
22328	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(4L<<8)	bnx2.h
22329	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(5L<<8)	bnx2.h
22330	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(6L<<8)	bnx2.h
22331	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(7L<<8)	bnx2.h
22332	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(8L<<8)	bnx2.h
22333	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(9L<<8)	bnx2.h
22334	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(10L<<8)	bnx2.h
22335	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(11L<<8)	bnx2.h
22336	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(12L<<8)	bnx2.h
22337	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(13L<<8)	bnx2.h
22338	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(14L<<8)	bnx2.h
22339	BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_	(15L<<8)	bnx2.h
22340	BNX2_PCI_CONFIG_2_MAX_SPLIT_LIM	(0x1fL<<16)	bnx2.h
22341	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0x3L<<21)	bnx2.h
22342	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(0L<<21)	bnx2.h
22343	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(1L<<21)	bnx2.h
22344	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(2L<<21)	bnx2.h
22345	BNX2_PCI_CONFIG_2_MAX_READ_LIMI	(3L<<21)	bnx2.h
22346	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<23)	bnx2.h
22347	BNX2_PCI_CONFIG_2_FORCE_32_BIT_	(1L<<24)	bnx2.h
22348	BNX2_PCI_CONFIG_2_KEEP_REQ_ASSE	(1L<<25)	bnx2.h
22349	BNX2_PCI_CONFIG_3	0x0000040c	bnx2.h
22350	BNX2_PCI_CONFIG_3_STICKY_BYTE	(0xffL<<0)	bnx2.h
22351	BNX2_PCI_CONFIG_3_FORCE_PME	(1L<<24)	bnx2.h
22352	BNX2_PCI_CONFIG_3_PME_STATUS	(1L<<25)	bnx2.h
22353	BNX2_PCI_CONFIG_3_PME_ENABLE	(1L<<26)	bnx2.h
22354	BNX2_PCI_CONFIG_3_PM_STATE	(0x3L<<27)	bnx2.h
22355	BNX2_PCI_CONFIG_3_VAUX_PRESET	(1L<<30)	bnx2.h
22356	BNX2_PCI_CONFIG_3_PCI_POWER	(1L<<31)	bnx2.h
22357	BNX2_PCI_PM_DATA_A	0x00000410	bnx2.h
22358	BNX2_PCI_PM_DATA_A_PM_DATA_0_PR	(0xffL<<0)	bnx2.h
22359	BNX2_PCI_PM_DATA_A_PM_DATA_1_PR	(0xffL<<8)	bnx2.h
22360	BNX2_PCI_PM_DATA_A_PM_DATA_2_PR	(0xffL<<16)	bnx2.h
22361	BNX2_PCI_PM_DATA_A_PM_DATA_3_PR	(0xffL<<24)	bnx2.h
22362	BNX2_PCI_PM_DATA_B	0x00000414	bnx2.h
22363	BNX2_PCI_PM_DATA_B_PM_DATA_4_PR	(0xffL<<0)	bnx2.h
22364	BNX2_PCI_PM_DATA_B_PM_DATA_5_PR	(0xffL<<8)	bnx2.h
22365	BNX2_PCI_PM_DATA_B_PM_DATA_6_PR	(0xffL<<16)	bnx2.h
22366	BNX2_PCI_PM_DATA_B_PM_DATA_7_PR	(0xffL<<24)	bnx2.h
22367	BNX2_PCI_SWAP_DIAG0	0x00000418	bnx2.h
22368	BNX2_PCI_SWAP_DIAG1	0x0000041c	bnx2.h
22369	BNX2_PCI_EXP_ROM_ADDR	0x00000420	bnx2.h
22370	BNX2_PCI_EXP_ROM_ADDR_ADDRESS	(0x3fffffL<<2)	bnx2.h
22371	BNX2_PCI_EXP_ROM_ADDR_REQ	(1L<<31)	bnx2.h
22372	BNX2_PCI_EXP_ROM_DATA	0x00000424	bnx2.h
22373	BNX2_PCI_VPD_INTF	0x00000428	bnx2.h
22374	BNX2_PCI_VPD_INTF_INTF_REQ	(1L<<0)	bnx2.h
22375	BNX2_PCI_VPD_ADDR_FLAG	0x0000042c	bnx2.h
22376	BNX2_PCI_VPD_ADDR_FLAG_ADDRESS	(0x1fff<<2)	bnx2.h
22377	BNX2_PCI_VPD_ADDR_FLAG_WR	(1<<15)	bnx2.h
22378	BNX2_PCI_VPD_DATA	0x00000430	bnx2.h
22379	BNX2_PCI_ID_VAL1	0x00000434	bnx2.h
22380	BNX2_PCI_ID_VAL1_DEVICE_ID	(0xffffL<<0)	bnx2.h
22381	BNX2_PCI_ID_VAL1_VENDOR_ID	(0xffffL<<16)	bnx2.h
22382	BNX2_PCI_ID_VAL2	0x00000438	bnx2.h
22383	BNX2_PCI_ID_VAL2_SUBSYSTEM_VEND	(0xffffL<<0)	bnx2.h
22384	BNX2_PCI_ID_VAL2_SUBSYSTEM_ID	(0xffffL<<16)	bnx2.h
22385	BNX2_PCI_ID_VAL3	0x0000043c	bnx2.h
22386	BNX2_PCI_ID_VAL3_CLASS_CODE	(0xffffffL<<0)	bnx2.h
22387	BNX2_PCI_ID_VAL3_REVISION_ID	(0xffL<<24)	bnx2.h
22388	BNX2_PCI_ID_VAL4	0x00000440	bnx2.h
22389	BNX2_PCI_ID_VAL4_CAP_ENA	(0xfL<<0)	bnx2.h
22390	BNX2_PCI_ID_VAL4_CAP_ENA_0	(0L<<0)	bnx2.h
22391	BNX2_PCI_ID_VAL4_CAP_ENA_1	(1L<<0)	bnx2.h
22392	BNX2_PCI_ID_VAL4_CAP_ENA_2	(2L<<0)	bnx2.h
22393	BNX2_PCI_ID_VAL4_CAP_ENA_3	(3L<<0)	bnx2.h
22394	BNX2_PCI_ID_VAL4_CAP_ENA_4	(4L<<0)	bnx2.h
22395	BNX2_PCI_ID_VAL4_CAP_ENA_5	(5L<<0)	bnx2.h
22396	BNX2_PCI_ID_VAL4_CAP_ENA_6	(6L<<0)	bnx2.h
22397	BNX2_PCI_ID_VAL4_CAP_ENA_7	(7L<<0)	bnx2.h
22398	BNX2_PCI_ID_VAL4_CAP_ENA_8	(8L<<0)	bnx2.h
22399	BNX2_PCI_ID_VAL4_CAP_ENA_9	(9L<<0)	bnx2.h
22400	BNX2_PCI_ID_VAL4_CAP_ENA_10	(10L<<0)	bnx2.h
22401	BNX2_PCI_ID_VAL4_CAP_ENA_11	(11L<<0)	bnx2.h
22402	BNX2_PCI_ID_VAL4_CAP_ENA_12	(12L<<0)	bnx2.h
22403	BNX2_PCI_ID_VAL4_CAP_ENA_13	(13L<<0)	bnx2.h
22404	BNX2_PCI_ID_VAL4_CAP_ENA_14	(14L<<0)	bnx2.h
22405	BNX2_PCI_ID_VAL4_CAP_ENA_15	(15L<<0)	bnx2.h
22406	BNX2_PCI_ID_VAL4_PM_SCALE_PRG	(0x3L<<6)	bnx2.h
22407	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0	(0L<<6)	bnx2.h
22408	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1	(1L<<6)	bnx2.h
22409	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2	(2L<<6)	bnx2.h
22410	BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3	(3L<<6)	bnx2.h
22411	BNX2_PCI_ID_VAL4_MSI_LIMIT	(0x7L<<9)	bnx2.h
22412	BNX2_PCI_ID_VAL4_MSI_ADVERTIZE	(0x7L<<12)	bnx2.h
22413	BNX2_PCI_ID_VAL4_MSI_ENABLE	(1L<<15)	bnx2.h
22414	BNX2_PCI_ID_VAL4_MAX_64_ADVERTI	(1L<<16)	bnx2.h
22415	BNX2_PCI_ID_VAL4_MAX_133_ADVERT	(1L<<17)	bnx2.h
22416	BNX2_PCI_ID_VAL4_MAX_MEM_READ_S	(0x3L<<21)	bnx2.h
22417	BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE	(0x7L<<23)	bnx2.h
22418	BNX2_PCI_ID_VAL4_MAX_CUMULATIVE	(0x7L<<26)	bnx2.h
22419	BNX2_PCI_ID_VAL5	0x00000444	bnx2.h
22420	BNX2_PCI_ID_VAL5_D1_SUPPORT	(1L<<0)	bnx2.h
22421	BNX2_PCI_ID_VAL5_D2_SUPPORT	(1L<<1)	bnx2.h
22422	BNX2_PCI_ID_VAL5_PME_IN_D0	(1L<<2)	bnx2.h
22423	BNX2_PCI_ID_VAL5_PME_IN_D1	(1L<<3)	bnx2.h
22424	BNX2_PCI_ID_VAL5_PME_IN_D2	(1L<<4)	bnx2.h
22425	BNX2_PCI_ID_VAL5_PME_IN_D3_HOT	(1L<<5)	bnx2.h
22426	BNX2_PCI_PCIX_EXTENDED_STATUS	0x00000448	bnx2.h
22427	BNX2_PCI_PCIX_EXTENDED_STATUS_N	(1L<<8)	bnx2.h
22428	BNX2_PCI_PCIX_EXTENDED_STATUS_L	(1L<<9)	bnx2.h
22429	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xfL<<16)	bnx2.h
22430	BNX2_PCI_PCIX_EXTENDED_STATUS_S	(0xffL<<24)	bnx2.h
22431	BNX2_PCI_ID_VAL6	0x0000044c	bnx2.h
22432	BNX2_PCI_ID_VAL6_MAX_LAT	(0xffL<<0)	bnx2.h
22433	BNX2_PCI_ID_VAL6_MIN_GNT	(0xffL<<8)	bnx2.h
22434	BNX2_PCI_ID_VAL6_BIST	(0xffL<<16)	bnx2.h
22435	BNX2_PCI_MSI_DATA	0x00000450	bnx2.h
22436	BNX2_PCI_MSI_DATA_PCI_MSI_DATA	(0xffffL<<0)	bnx2.h
22437	BNX2_PCI_MSI_ADDR_H	0x00000454	bnx2.h
22438	BNX2_PCI_MSI_ADDR_L	0x00000458	bnx2.h
22439	BNX2_MISC_COMMAND	0x00000800	bnx2.h
22440	BNX2_MISC_COMMAND_ENABLE_ALL	(1L<<0)	bnx2.h
22441	BNX2_MISC_COMMAND_DISABLE_ALL	(1L<<1)	bnx2.h
22442	BNX2_MISC_COMMAND_CORE_RESET	(1L<<4)	bnx2.h
22443	BNX2_MISC_COMMAND_HARD_RESET	(1L<<5)	bnx2.h
22444	BNX2_MISC_COMMAND_PAR_ERROR	(1L<<8)	bnx2.h
22445	BNX2_MISC_COMMAND_PAR_ERR_RAM	(0x7fL<<16)	bnx2.h
22446	BNX2_MISC_CFG	0x00000804	bnx2.h
22447	BNX2_MISC_CFG_PCI_GRC_TMOUT	(1L<<0)	bnx2.h
22448	BNX2_MISC_CFG_NVM_WR_EN	(0x3L<<1)	bnx2.h
22449	BNX2_MISC_CFG_NVM_WR_EN_PROTECT	(0L<<1)	bnx2.h
22450	BNX2_MISC_CFG_NVM_WR_EN_PCI	(1L<<1)	bnx2.h
22451	BNX2_MISC_CFG_NVM_WR_EN_ALLOW	(2L<<1)	bnx2.h
22452	BNX2_MISC_CFG_NVM_WR_EN_ALLOW2	(3L<<1)	bnx2.h
22453	BNX2_MISC_CFG_BIST_EN	(1L<<3)	bnx2.h
22454	BNX2_MISC_CFG_CK25_OUT_ALT_SRC	(1L<<4)	bnx2.h
22455	BNX2_MISC_CFG_BYPASS_BSCAN	(1L<<5)	bnx2.h
22456	BNX2_MISC_CFG_BYPASS_EJTAG	(1L<<6)	bnx2.h
22457	BNX2_MISC_CFG_CLK_CTL_OVERRIDE	(1L<<7)	bnx2.h
22458	BNX2_MISC_CFG_LEDMODE	(0x3L<<8)	bnx2.h
22459	BNX2_MISC_CFG_LEDMODE_MAC	(0L<<8)	bnx2.h
22460	BNX2_MISC_CFG_LEDMODE_GPHY1	(1L<<8)	bnx2.h
22461	BNX2_MISC_CFG_LEDMODE_GPHY2	(2L<<8)	bnx2.h
22462	BNX2_MISC_ID	0x00000808	bnx2.h
22463	BNX2_MISC_ID_BOND_ID	(0xfL<<0)	bnx2.h
22464	BNX2_MISC_ID_CHIP_METAL	(0xffL<<4)	bnx2.h
22465	BNX2_MISC_ID_CHIP_REV	(0xfL<<12)	bnx2.h
22466	BNX2_MISC_ID_CHIP_NUM	(0xffffL<<16)	bnx2.h
22467	BNX2_MISC_ENABLE_STATUS_BITS	0x0000080c	bnx2.h
22468	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<0)	bnx2.h
22469	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<1)	bnx2.h
22470	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<2)	bnx2.h
22471	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<3)	bnx2.h
22472	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<4)	bnx2.h
22473	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<5)	bnx2.h
22474	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<6)	bnx2.h
22475	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<7)	bnx2.h
22476	BNX2_MISC_ENABLE_STATUS_BITS_TX	(1L<<8)	bnx2.h
22477	BNX2_MISC_ENABLE_STATUS_BITS_EM	(1L<<9)	bnx2.h
22478	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<10)	bnx2.h
22479	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<11)	bnx2.h
22480	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<12)	bnx2.h
22481	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<13)	bnx2.h
22482	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<14)	bnx2.h
22483	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<15)	bnx2.h
22484	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<16)	bnx2.h
22485	BNX2_MISC_ENABLE_STATUS_BITS_RX	(1L<<17)	bnx2.h
22486	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<18)	bnx2.h
22487	BNX2_MISC_ENABLE_STATUS_BITS_HO	(1L<<19)	bnx2.h
22488	BNX2_MISC_ENABLE_STATUS_BITS_MA	(1L<<20)	bnx2.h
22489	BNX2_MISC_ENABLE_STATUS_BITS_CO	(1L<<21)	bnx2.h
22490	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<22)	bnx2.h
22491	BNX2_MISC_ENABLE_STATUS_BITS_CM	(1L<<23)	bnx2.h
22492	BNX2_MISC_ENABLE_STATUS_BITS_MG	(1L<<24)	bnx2.h
22493	BNX2_MISC_ENABLE_STATUS_BITS_TI	(1L<<25)	bnx2.h
22494	BNX2_MISC_ENABLE_STATUS_BITS_DM	(1L<<26)	bnx2.h
22495	BNX2_MISC_ENABLE_STATUS_BITS_UM	(1L<<27)	bnx2.h
22496	BNX2_MISC_ENABLE_SET_BITS	0x00000810	bnx2.h
22497	BNX2_MISC_ENABLE_SET_BITS_TX_SC	(1L<<0)	bnx2.h
22498	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<1)	bnx2.h
22499	BNX2_MISC_ENABLE_SET_BITS_TX_BD	(1L<<2)	bnx2.h
22500	BNX2_MISC_ENABLE_SET_BITS_TX_PR	(1L<<3)	bnx2.h
22501	BNX2_MISC_ENABLE_SET_BITS_TX_DM	(1L<<4)	bnx2.h
22502	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<5)	bnx2.h
22503	BNX2_MISC_ENABLE_SET_BITS_TX_PA	(1L<<6)	bnx2.h
22504	BNX2_MISC_ENABLE_SET_BITS_TX_HE	(1L<<7)	bnx2.h
22505	BNX2_MISC_ENABLE_SET_BITS_TX_AS	(1L<<8)	bnx2.h
22506	BNX2_MISC_ENABLE_SET_BITS_EMAC_	(1L<<9)	bnx2.h
22507	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<10)	bnx2.h
22508	BNX2_MISC_ENABLE_SET_BITS_RX_PA	(1L<<11)	bnx2.h
22509	BNX2_MISC_ENABLE_SET_BITS_RX_MB	(1L<<12)	bnx2.h
22510	BNX2_MISC_ENABLE_SET_BITS_RX_LO	(1L<<13)	bnx2.h
22511	BNX2_MISC_ENABLE_SET_BITS_RX_PR	(1L<<14)	bnx2.h
22512	BNX2_MISC_ENABLE_SET_BITS_RX_V2	(1L<<15)	bnx2.h
22513	BNX2_MISC_ENABLE_SET_BITS_RX_BD	(1L<<16)	bnx2.h
22514	BNX2_MISC_ENABLE_SET_BITS_RX_DM	(1L<<17)	bnx2.h
22515	BNX2_MISC_ENABLE_SET_BITS_COMPL	(1L<<18)	bnx2.h
22516	BNX2_MISC_ENABLE_SET_BITS_HOST_	(1L<<19)	bnx2.h
22517	BNX2_MISC_ENABLE_SET_BITS_MAILB	(1L<<20)	bnx2.h
22518	BNX2_MISC_ENABLE_SET_BITS_CONTE	(1L<<21)	bnx2.h
22519	BNX2_MISC_ENABLE_SET_BITS_CMD_S	(1L<<22)	bnx2.h
22520	BNX2_MISC_ENABLE_SET_BITS_CMD_P	(1L<<23)	bnx2.h
22521	BNX2_MISC_ENABLE_SET_BITS_MGMT_	(1L<<24)	bnx2.h
22522	BNX2_MISC_ENABLE_SET_BITS_TIMER	(1L<<25)	bnx2.h
22523	BNX2_MISC_ENABLE_SET_BITS_DMA_E	(1L<<26)	bnx2.h
22524	BNX2_MISC_ENABLE_SET_BITS_UMP_E	(1L<<27)	bnx2.h
22525	BNX2_MISC_ENABLE_CLR_BITS	0x00000814	bnx2.h
22526	BNX2_MISC_ENABLE_CLR_BITS_TX_SC	(1L<<0)	bnx2.h
22527	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<1)	bnx2.h
22528	BNX2_MISC_ENABLE_CLR_BITS_TX_BD	(1L<<2)	bnx2.h
22529	BNX2_MISC_ENABLE_CLR_BITS_TX_PR	(1L<<3)	bnx2.h
22530	BNX2_MISC_ENABLE_CLR_BITS_TX_DM	(1L<<4)	bnx2.h
22531	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<5)	bnx2.h
22532	BNX2_MISC_ENABLE_CLR_BITS_TX_PA	(1L<<6)	bnx2.h
22533	BNX2_MISC_ENABLE_CLR_BITS_TX_HE	(1L<<7)	bnx2.h
22534	BNX2_MISC_ENABLE_CLR_BITS_TX_AS	(1L<<8)	bnx2.h
22535	BNX2_MISC_ENABLE_CLR_BITS_EMAC_	(1L<<9)	bnx2.h
22536	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<10)	bnx2.h
22537	BNX2_MISC_ENABLE_CLR_BITS_RX_PA	(1L<<11)	bnx2.h
22538	BNX2_MISC_ENABLE_CLR_BITS_RX_MB	(1L<<12)	bnx2.h
22539	BNX2_MISC_ENABLE_CLR_BITS_RX_LO	(1L<<13)	bnx2.h
22540	BNX2_MISC_ENABLE_CLR_BITS_RX_PR	(1L<<14)	bnx2.h
22541	BNX2_MISC_ENABLE_CLR_BITS_RX_V2	(1L<<15)	bnx2.h
22542	BNX2_MISC_ENABLE_CLR_BITS_RX_BD	(1L<<16)	bnx2.h
22543	BNX2_MISC_ENABLE_CLR_BITS_RX_DM	(1L<<17)	bnx2.h
22544	BNX2_MISC_ENABLE_CLR_BITS_COMPL	(1L<<18)	bnx2.h
22545	BNX2_MISC_ENABLE_CLR_BITS_HOST_	(1L<<19)	bnx2.h
22546	BNX2_MISC_ENABLE_CLR_BITS_MAILB	(1L<<20)	bnx2.h
22547	BNX2_MISC_ENABLE_CLR_BITS_CONTE	(1L<<21)	bnx2.h
22548	BNX2_MISC_ENABLE_CLR_BITS_CMD_S	(1L<<22)	bnx2.h
22549	BNX2_MISC_ENABLE_CLR_BITS_CMD_P	(1L<<23)	bnx2.h
22550	BNX2_MISC_ENABLE_CLR_BITS_MGMT_	(1L<<24)	bnx2.h
22551	BNX2_MISC_ENABLE_CLR_BITS_TIMER	(1L<<25)	bnx2.h
22552	BNX2_MISC_ENABLE_CLR_BITS_DMA_E	(1L<<26)	bnx2.h
22553	BNX2_MISC_ENABLE_CLR_BITS_UMP_E	(1L<<27)	bnx2.h
22554	BNX2_MISC_CLOCK_CONTROL_BITS	0x00000818	bnx2.h
22555	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
22556	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0L<<0)	bnx2.h
22557	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<0)	bnx2.h
22558	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(2L<<0)	bnx2.h
22559	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(3L<<0)	bnx2.h
22560	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(4L<<0)	bnx2.h
22561	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(5L<<0)	bnx2.h
22562	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(6L<<0)	bnx2.h
22563	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(7L<<0)	bnx2.h
22564	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(0xfL<<0)	bnx2.h
22565	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<6)	bnx2.h
22566	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<7)	bnx2.h
22567	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0x7L<<8)	bnx2.h
22568	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<8)	bnx2.h
22569	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<8)	bnx2.h
22570	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<8)	bnx2.h
22571	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<8)	bnx2.h
22572	BNX2_MISC_CLOCK_CONTROL_BITS_PL	(1L<<11)	bnx2.h
22573	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0xfL<<12)	bnx2.h
22574	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(0L<<12)	bnx2.h
22575	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<12)	bnx2.h
22576	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(2L<<12)	bnx2.h
22577	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(4L<<12)	bnx2.h
22578	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(8L<<12)	bnx2.h
22579	BNX2_MISC_CLOCK_CONTROL_BITS_CO	(1L<<16)	bnx2.h
22580	BNX2_MISC_CLOCK_CONTROL_BITS_PC	(1L<<17)	bnx2.h
22581	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(1L<<18)	bnx2.h
22582	BNX2_MISC_CLOCK_CONTROL_BITS_US	(1L<<19)	bnx2.h
22583	BNX2_MISC_CLOCK_CONTROL_BITS_RE	(0xfffL<<20)	bnx2.h
22584	BNX2_MISC_GPIO	0x0000081c	bnx2.h
22585	BNX2_MISC_GPIO_VALUE	(0xffL<<0)	bnx2.h
22586	BNX2_MISC_GPIO_SET	(0xffL<<8)	bnx2.h
22587	BNX2_MISC_GPIO_CLR	(0xffL<<16)	bnx2.h
22588	BNX2_MISC_GPIO_FLOAT	(0xffL<<24)	bnx2.h
22589	BNX2_MISC_GPIO_INT	0x00000820	bnx2.h
22590	BNX2_MISC_GPIO_INT_INT_STATE	(0xfL<<0)	bnx2.h
22591	BNX2_MISC_GPIO_INT_OLD_VALUE	(0xfL<<8)	bnx2.h
22592	BNX2_MISC_GPIO_INT_OLD_SET	(0xfL<<16)	bnx2.h
22593	BNX2_MISC_GPIO_INT_OLD_CLR	(0xfL<<24)	bnx2.h
22594	BNX2_MISC_CONFIG_LFSR	0x00000824	bnx2.h
22595	BNX2_MISC_CONFIG_LFSR_DIV	(0xffffL<<0)	bnx2.h
22596	BNX2_MISC_LFSR_MASK_BITS	0x00000828	bnx2.h
22597	BNX2_MISC_LFSR_MASK_BITS_TX_SCH	(1L<<0)	bnx2.h
22598	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<1)	bnx2.h
22599	BNX2_MISC_LFSR_MASK_BITS_TX_BD_	(1L<<2)	bnx2.h
22600	BNX2_MISC_LFSR_MASK_BITS_TX_PRO	(1L<<3)	bnx2.h
22601	BNX2_MISC_LFSR_MASK_BITS_TX_DMA	(1L<<4)	bnx2.h
22602	BNX2_MISC_LFSR_MASK_BITS_TX_PAT	(1L<<5)	bnx2.h
22603	BNX2_MISC_LFSR_MASK_BITS_TX_PAY	(1L<<6)	bnx2.h
22604	BNX2_MISC_LFSR_MASK_BITS_TX_HEA	(1L<<7)	bnx2.h
22605	BNX2_MISC_LFSR_MASK_BITS_TX_ASS	(1L<<8)	bnx2.h
22606	BNX2_MISC_LFSR_MASK_BITS_EMAC_E	(1L<<9)	bnx2.h
22607	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<10)	bnx2.h
22608	BNX2_MISC_LFSR_MASK_BITS_RX_PAR	(1L<<11)	bnx2.h
22609	BNX2_MISC_LFSR_MASK_BITS_RX_MBU	(1L<<12)	bnx2.h
22610	BNX2_MISC_LFSR_MASK_BITS_RX_LOO	(1L<<13)	bnx2.h
22611	BNX2_MISC_LFSR_MASK_BITS_RX_PRO	(1L<<14)	bnx2.h
22612	BNX2_MISC_LFSR_MASK_BITS_RX_V2P	(1L<<15)	bnx2.h
22613	BNX2_MISC_LFSR_MASK_BITS_RX_BD_	(1L<<16)	bnx2.h
22614	BNX2_MISC_LFSR_MASK_BITS_RX_DMA	(1L<<17)	bnx2.h
22615	BNX2_MISC_LFSR_MASK_BITS_COMPLE	(1L<<18)	bnx2.h
22616	BNX2_MISC_LFSR_MASK_BITS_HOST_C	(1L<<19)	bnx2.h
22617	BNX2_MISC_LFSR_MASK_BITS_MAILBO	(1L<<20)	bnx2.h
22618	BNX2_MISC_LFSR_MASK_BITS_CONTEX	(1L<<21)	bnx2.h
22619	BNX2_MISC_LFSR_MASK_BITS_CMD_SC	(1L<<22)	bnx2.h
22620	BNX2_MISC_LFSR_MASK_BITS_CMD_PR	(1L<<23)	bnx2.h
22621	BNX2_MISC_LFSR_MASK_BITS_MGMT_P	(1L<<24)	bnx2.h
22622	BNX2_MISC_LFSR_MASK_BITS_TIMER_	(1L<<25)	bnx2.h
22623	BNX2_MISC_LFSR_MASK_BITS_DMA_EN	(1L<<26)	bnx2.h
22624	BNX2_MISC_LFSR_MASK_BITS_UMP_EN	(1L<<27)	bnx2.h
22625	BNX2_MISC_ARB_REQ0	0x0000082c	bnx2.h
22626	BNX2_MISC_ARB_REQ1	0x00000830	bnx2.h
22627	BNX2_MISC_ARB_REQ2	0x00000834	bnx2.h
22628	BNX2_MISC_ARB_REQ3	0x00000838	bnx2.h
22629	BNX2_MISC_ARB_REQ4	0x0000083c	bnx2.h
22630	BNX2_MISC_ARB_FREE0	0x00000840	bnx2.h
22631	BNX2_MISC_ARB_FREE1	0x00000844	bnx2.h
22632	BNX2_MISC_ARB_FREE2	0x00000848	bnx2.h
22633	BNX2_MISC_ARB_FREE3	0x0000084c	bnx2.h
22634	BNX2_MISC_ARB_FREE4	0x00000850	bnx2.h
22635	BNX2_MISC_ARB_REQ_STATUS0	0x00000854	bnx2.h
22636	BNX2_MISC_ARB_REQ_STATUS1	0x00000858	bnx2.h
22637	BNX2_MISC_ARB_REQ_STATUS2	0x0000085c	bnx2.h
22638	BNX2_MISC_ARB_REQ_STATUS3	0x00000860	bnx2.h
22639	BNX2_MISC_ARB_REQ_STATUS4	0x00000864	bnx2.h
22640	BNX2_MISC_ARB_GNT0	0x00000868	bnx2.h
22641	BNX2_MISC_ARB_GNT0_0	(0x7L<<0)	bnx2.h
22642	BNX2_MISC_ARB_GNT0_1	(0x7L<<4)	bnx2.h
22643	BNX2_MISC_ARB_GNT0_2	(0x7L<<8)	bnx2.h
22644	BNX2_MISC_ARB_GNT0_3	(0x7L<<12)	bnx2.h
22645	BNX2_MISC_ARB_GNT0_4	(0x7L<<16)	bnx2.h
22646	BNX2_MISC_ARB_GNT0_5	(0x7L<<20)	bnx2.h
22647	BNX2_MISC_ARB_GNT0_6	(0x7L<<24)	bnx2.h
22648	BNX2_MISC_ARB_GNT0_7	(0x7L<<28)	bnx2.h
22649	BNX2_MISC_ARB_GNT1	0x0000086c	bnx2.h
22650	BNX2_MISC_ARB_GNT1_8	(0x7L<<0)	bnx2.h
22651	BNX2_MISC_ARB_GNT1_9	(0x7L<<4)	bnx2.h
22652	BNX2_MISC_ARB_GNT1_10	(0x7L<<8)	bnx2.h
22653	BNX2_MISC_ARB_GNT1_11	(0x7L<<12)	bnx2.h
22654	BNX2_MISC_ARB_GNT1_12	(0x7L<<16)	bnx2.h
22655	BNX2_MISC_ARB_GNT1_13	(0x7L<<20)	bnx2.h
22656	BNX2_MISC_ARB_GNT1_14	(0x7L<<24)	bnx2.h
22657	BNX2_MISC_ARB_GNT1_15	(0x7L<<28)	bnx2.h
22658	BNX2_MISC_ARB_GNT2	0x00000870	bnx2.h
22659	BNX2_MISC_ARB_GNT2_16	(0x7L<<0)	bnx2.h
22660	BNX2_MISC_ARB_GNT2_17	(0x7L<<4)	bnx2.h
22661	BNX2_MISC_ARB_GNT2_18	(0x7L<<8)	bnx2.h
22662	BNX2_MISC_ARB_GNT2_19	(0x7L<<12)	bnx2.h
22663	BNX2_MISC_ARB_GNT2_20	(0x7L<<16)	bnx2.h
22664	BNX2_MISC_ARB_GNT2_21	(0x7L<<20)	bnx2.h
22665	BNX2_MISC_ARB_GNT2_22	(0x7L<<24)	bnx2.h
22666	BNX2_MISC_ARB_GNT2_23	(0x7L<<28)	bnx2.h
22667	BNX2_MISC_ARB_GNT3	0x00000874	bnx2.h
22668	BNX2_MISC_ARB_GNT3_24	(0x7L<<0)	bnx2.h
22669	BNX2_MISC_ARB_GNT3_25	(0x7L<<4)	bnx2.h
22670	BNX2_MISC_ARB_GNT3_26	(0x7L<<8)	bnx2.h
22671	BNX2_MISC_ARB_GNT3_27	(0x7L<<12)	bnx2.h
22672	BNX2_MISC_ARB_GNT3_28	(0x7L<<16)	bnx2.h
22673	BNX2_MISC_ARB_GNT3_29	(0x7L<<20)	bnx2.h
22674	BNX2_MISC_ARB_GNT3_30	(0x7L<<24)	bnx2.h
22675	BNX2_MISC_ARB_GNT3_31	(0x7L<<28)	bnx2.h
22676	BNX2_MISC_PRBS_CONTROL	0x00000878	bnx2.h
22677	BNX2_MISC_PRBS_CONTROL_EN	(1L<<0)	bnx2.h
22678	BNX2_MISC_PRBS_CONTROL_RSTB	(1L<<1)	bnx2.h
22679	BNX2_MISC_PRBS_CONTROL_INV	(1L<<2)	bnx2.h
22680	BNX2_MISC_PRBS_CONTROL_ERR_CLR	(1L<<3)	bnx2.h
22681	BNX2_MISC_PRBS_CONTROL_ORDER	(0x3L<<4)	bnx2.h
22682	BNX2_MISC_PRBS_CONTROL_ORDER_7T	(0L<<4)	bnx2.h
22683	BNX2_MISC_PRBS_CONTROL_ORDER_15	(1L<<4)	bnx2.h
22684	BNX2_MISC_PRBS_CONTROL_ORDER_23	(2L<<4)	bnx2.h
22685	BNX2_MISC_PRBS_CONTROL_ORDER_31	(3L<<4)	bnx2.h
22686	BNX2_MISC_PRBS_STATUS	0x0000087c	bnx2.h
22687	BNX2_MISC_PRBS_STATUS_LOCK	(1L<<0)	bnx2.h
22688	BNX2_MISC_PRBS_STATUS_STKY	(1L<<1)	bnx2.h
22689	BNX2_MISC_PRBS_STATUS_ERRORS	(0x3fffL<<2)	bnx2.h
22690	BNX2_MISC_PRBS_STATUS_STATE	(0xfL<<16)	bnx2.h
22691	BNX2_MISC_SM_ASF_CONTROL	0x00000880	bnx2.h
22692	BNX2_MISC_SM_ASF_CONTROL_ASF_RS	(1L<<0)	bnx2.h
22693	BNX2_MISC_SM_ASF_CONTROL_TSC_EN	(1L<<1)	bnx2.h
22694	BNX2_MISC_SM_ASF_CONTROL_WG_TO	(1L<<2)	bnx2.h
22695	BNX2_MISC_SM_ASF_CONTROL_HB_TO	(1L<<3)	bnx2.h
22696	BNX2_MISC_SM_ASF_CONTROL_PA_TO	(1L<<4)	bnx2.h
22697	BNX2_MISC_SM_ASF_CONTROL_PL_TO	(1L<<5)	bnx2.h
22698	BNX2_MISC_SM_ASF_CONTROL_RT_TO	(1L<<6)	bnx2.h
22699	BNX2_MISC_SM_ASF_CONTROL_SMB_EV	(1L<<7)	bnx2.h
22700	BNX2_MISC_SM_ASF_CONTROL_RES	(0xfL<<8)	bnx2.h
22701	BNX2_MISC_SM_ASF_CONTROL_SMB_EN	(1L<<12)	bnx2.h
22702	BNX2_MISC_SM_ASF_CONTROL_SMB_BB	(1L<<13)	bnx2.h
22703	BNX2_MISC_SM_ASF_CONTROL_SMB_NO	(1L<<14)	bnx2.h
22704	BNX2_MISC_SM_ASF_CONTROL_SMB_AU	(1L<<15)	bnx2.h
22705	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<16)	bnx2.h
22706	BNX2_MISC_SM_ASF_CONTROL_NIC_SM	(0x3fL<<24)	bnx2.h
22707	BNX2_MISC_SM_ASF_CONTROL_EN_NIC	(1L<<30)	bnx2.h
22708	BNX2_MISC_SM_ASF_CONTROL_SMB_EA	(1L<<31)	bnx2.h
22709	BNX2_MISC_SMB_IN	0x00000884	bnx2.h
22710	BNX2_MISC_SMB_IN_DAT_IN	(0xffL<<0)	bnx2.h
22711	BNX2_MISC_SMB_IN_RDY	(1L<<8)	bnx2.h
22712	BNX2_MISC_SMB_IN_DONE	(1L<<9)	bnx2.h
22713	BNX2_MISC_SMB_IN_FIRSTBYTE	(1L<<10)	bnx2.h
22714	BNX2_MISC_SMB_IN_STATUS	(0x7L<<11)	bnx2.h
22715	BNX2_MISC_SMB_IN_STATUS_OK	(0x0L<<11)	bnx2.h
22716	BNX2_MISC_SMB_IN_STATUS_PEC	(0x1L<<11)	bnx2.h
22717	BNX2_MISC_SMB_IN_STATUS_OFLOW	(0x2L<<11)	bnx2.h
22718	BNX2_MISC_SMB_IN_STATUS_STOP	(0x3L<<11)	bnx2.h
22719	BNX2_MISC_SMB_IN_STATUS_TIMEOUT	(0x4L<<11)	bnx2.h
22720	BNX2_MISC_SMB_OUT	0x00000888	bnx2.h
22721	BNX2_MISC_SMB_OUT_DAT_OUT	(0xffL<<0)	bnx2.h
22722	BNX2_MISC_SMB_OUT_RDY	(1L<<8)	bnx2.h
22723	BNX2_MISC_SMB_OUT_START	(1L<<9)	bnx2.h
22724	BNX2_MISC_SMB_OUT_LAST	(1L<<10)	bnx2.h
22725	BNX2_MISC_SMB_OUT_ACC_TYPE	(1L<<11)	bnx2.h
22726	BNX2_MISC_SMB_OUT_ENB_PEC	(1L<<12)	bnx2.h
22727	BNX2_MISC_SMB_OUT_GET_RX_LEN	(1L<<13)	bnx2.h
22728	BNX2_MISC_SMB_OUT_SMB_READ_LEN	(0x3fL<<14)	bnx2.h
22729	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xfL<<20)	bnx2.h
22730	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0L<<20)	bnx2.h
22731	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(1L<<20)	bnx2.h
22732	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(9L<<20)	bnx2.h
22733	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(2L<<20)	bnx2.h
22734	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(3L<<20)	bnx2.h
22735	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(4L<<20)	bnx2.h
22736	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(5L<<20)	bnx2.h
22737	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0xdL<<20)	bnx2.h
22738	BNX2_MISC_SMB_OUT_SMB_OUT_STATU	(0x6L<<20)	bnx2.h
22739	BNX2_MISC_SMB_OUT_SMB_OUT_SLAVE	(1L<<24)	bnx2.h
22740	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_E	(1L<<25)	bnx2.h
22741	BNX2_MISC_SMB_OUT_SMB_OUT_DAT_I	(1L<<26)	bnx2.h
22742	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_E	(1L<<27)	bnx2.h
22743	BNX2_MISC_SMB_OUT_SMB_OUT_CLK_I	(1L<<28)	bnx2.h
22744	BNX2_MISC_SMB_WATCHDOG	0x0000088c	bnx2.h
22745	BNX2_MISC_SMB_WATCHDOG_WATCHDOG	(0xffffL<<0)	bnx2.h
22746	BNX2_MISC_SMB_HEARTBEAT	0x00000890	bnx2.h
22747	BNX2_MISC_SMB_HEARTBEAT_HEARTBE	(0xffffL<<0)	bnx2.h
22748	BNX2_MISC_SMB_POLL_ASF	0x00000894	bnx2.h
22749	BNX2_MISC_SMB_POLL_ASF_POLL_ASF	(0xffffL<<0)	bnx2.h
22750	BNX2_MISC_SMB_POLL_LEGACY	0x00000898	bnx2.h
22751	BNX2_MISC_SMB_POLL_LEGACY_POLL_	(0xffffL<<0)	bnx2.h
22752	BNX2_MISC_SMB_RETRAN	0x0000089c	bnx2.h
22753	BNX2_MISC_SMB_RETRAN_RETRAN	(0xffL<<0)	bnx2.h
22754	BNX2_MISC_SMB_TIMESTAMP	0x000008a0	bnx2.h
22755	BNX2_MISC_SMB_TIMESTAMP_TIMESTA	(0xffffffffL<<0)	bnx2.h
22756	BNX2_MISC_PERR_ENA0	0x000008a4	bnx2.h
22757	BNX2_MISC_PERR_ENA0_COM_MISC_CT	(1L<<0)	bnx2.h
22758	BNX2_MISC_PERR_ENA0_COM_MISC_RE	(1L<<1)	bnx2.h
22759	BNX2_MISC_PERR_ENA0_COM_MISC_SC	(1L<<2)	bnx2.h
22760	BNX2_MISC_PERR_ENA0_CP_MISC_CTX	(1L<<3)	bnx2.h
22761	BNX2_MISC_PERR_ENA0_CP_MISC_REG	(1L<<4)	bnx2.h
22762	BNX2_MISC_PERR_ENA0_CP_MISC_SCP	(1L<<5)	bnx2.h
22763	BNX2_MISC_PERR_ENA0_CS_MISC_TME	(1L<<6)	bnx2.h
22764	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<7)	bnx2.h
22765	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<8)	bnx2.h
22766	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<9)	bnx2.h
22767	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<10)	bnx2.h
22768	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<11)	bnx2.h
22769	BNX2_MISC_PERR_ENA0_CTX_MISC_AC	(1L<<12)	bnx2.h
22770	BNX2_MISC_PERR_ENA0_CTX_MISC_PG	(1L<<13)	bnx2.h
22771	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<14)	bnx2.h
22772	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<15)	bnx2.h
22773	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<16)	bnx2.h
22774	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<17)	bnx2.h
22775	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<18)	bnx2.h
22776	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<19)	bnx2.h
22777	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<20)	bnx2.h
22778	BNX2_MISC_PERR_ENA0_DMAE_MISC_D	(1L<<21)	bnx2.h
22779	BNX2_MISC_PERR_ENA0_HC_MISC_DMA	(1L<<22)	bnx2.h
22780	BNX2_MISC_PERR_ENA0_MCP_MISC_RE	(1L<<23)	bnx2.h
22781	BNX2_MISC_PERR_ENA0_MCP_MISC_SC	(1L<<24)	bnx2.h
22782	BNX2_MISC_PERR_ENA0_MQ_MISC_CTX	(1L<<25)	bnx2.h
22783	BNX2_MISC_PERR_ENA0_RBDC_MISC	(1L<<26)	bnx2.h
22784	BNX2_MISC_PERR_ENA0_RBUF_MISC_M	(1L<<27)	bnx2.h
22785	BNX2_MISC_PERR_ENA0_RBUF_MISC_P	(1L<<28)	bnx2.h
22786	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<29)	bnx2.h
22787	BNX2_MISC_PERR_ENA0_RDE_MISC_RP	(1L<<30)	bnx2.h
22788	BNX2_MISC_PERR_ENA0_RV2P_MISC_C	(1L<<31)	bnx2.h
22789	BNX2_MISC_PERR_ENA1	0x000008a8	bnx2.h
22790	BNX2_MISC_PERR_ENA1_RV2P_MISC_C	(1L<<0)	bnx2.h
22791	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<1)	bnx2.h
22792	BNX2_MISC_PERR_ENA1_RV2P_MISC_P	(1L<<2)	bnx2.h
22793	BNX2_MISC_PERR_ENA1_RXP_MISC_CT	(1L<<3)	bnx2.h
22794	BNX2_MISC_PERR_ENA1_RXP_MISC_RE	(1L<<4)	bnx2.h
22795	BNX2_MISC_PERR_ENA1_RXP_MISC_SC	(1L<<5)	bnx2.h
22796	BNX2_MISC_PERR_ENA1_RXP_MISC_RB	(1L<<6)	bnx2.h
22797	BNX2_MISC_PERR_ENA1_TBDC_MISC	(1L<<7)	bnx2.h
22798	BNX2_MISC_PERR_ENA1_TDMA_MISC	(1L<<8)	bnx2.h
22799	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<9)	bnx2.h
22800	BNX2_MISC_PERR_ENA1_THBUF_MISC_	(1L<<10)	bnx2.h
22801	BNX2_MISC_PERR_ENA1_TPAT_MISC_R	(1L<<11)	bnx2.h
22802	BNX2_MISC_PERR_ENA1_TPAT_MISC_S	(1L<<12)	bnx2.h
22803	BNX2_MISC_PERR_ENA1_TPBUF_MISC_	(1L<<13)	bnx2.h
22804	BNX2_MISC_PERR_ENA1_TSCH_MISC_L	(1L<<14)	bnx2.h
22805	BNX2_MISC_PERR_ENA1_TXP_MISC_CT	(1L<<15)	bnx2.h
22806	BNX2_MISC_PERR_ENA1_TXP_MISC_RE	(1L<<16)	bnx2.h
22807	BNX2_MISC_PERR_ENA1_TXP_MISC_SC	(1L<<17)	bnx2.h
22808	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<18)	bnx2.h
22809	BNX2_MISC_PERR_ENA1_UMP_MISC_FI	(1L<<19)	bnx2.h
22810	BNX2_MISC_PERR_ENA1_UMP_MISC_RX	(1L<<20)	bnx2.h
22811	BNX2_MISC_PERR_ENA1_UMP_MISC_TX	(1L<<21)	bnx2.h
22812	BNX2_MISC_PERR_ENA1_RDMAQ_MISC	(1L<<22)	bnx2.h
22813	BNX2_MISC_PERR_ENA1_CSQ_MISC	(1L<<23)	bnx2.h
22814	BNX2_MISC_PERR_ENA1_CPQ_MISC	(1L<<24)	bnx2.h
22815	BNX2_MISC_PERR_ENA1_MCPQ_MISC	(1L<<25)	bnx2.h
22816	BNX2_MISC_PERR_ENA1_RV2PMQ_MISC	(1L<<26)	bnx2.h
22817	BNX2_MISC_PERR_ENA1_RV2PPQ_MISC	(1L<<27)	bnx2.h
22818	BNX2_MISC_PERR_ENA1_RV2PTQ_MISC	(1L<<28)	bnx2.h
22819	BNX2_MISC_PERR_ENA1_RXPQ_MISC	(1L<<29)	bnx2.h
22820	BNX2_MISC_PERR_ENA1_RXPCQ_MISC	(1L<<30)	bnx2.h
22821	BNX2_MISC_PERR_ENA1_RLUPQ_MISC	(1L<<31)	bnx2.h
22822	BNX2_MISC_PERR_ENA2	0x000008ac	bnx2.h
22823	BNX2_MISC_PERR_ENA2_COMQ_MISC	(1L<<0)	bnx2.h
22824	BNX2_MISC_PERR_ENA2_COMXQ_MISC	(1L<<1)	bnx2.h
22825	BNX2_MISC_PERR_ENA2_COMTQ_MISC	(1L<<2)	bnx2.h
22826	BNX2_MISC_PERR_ENA2_TSCHQ_MISC	(1L<<3)	bnx2.h
22827	BNX2_MISC_PERR_ENA2_TBDRQ_MISC	(1L<<4)	bnx2.h
22828	BNX2_MISC_PERR_ENA2_TXPQ_MISC	(1L<<5)	bnx2.h
22829	BNX2_MISC_PERR_ENA2_TDMAQ_MISC	(1L<<6)	bnx2.h
22830	BNX2_MISC_PERR_ENA2_TPATQ_MISC	(1L<<7)	bnx2.h
22831	BNX2_MISC_PERR_ENA2_TASQ_MISC	(1L<<8)	bnx2.h
22832	BNX2_MISC_DEBUG_VECTOR_SEL	0x000008b0	bnx2.h
22833	BNX2_MISC_DEBUG_VECTOR_SEL_0	(0xfffL<<0)	bnx2.h
22834	BNX2_MISC_DEBUG_VECTOR_SEL_1	(0xfffL<<12)	bnx2.h
22835	BNX2_MISC_VREG_CONTROL	0x000008b4	bnx2.h
22836	BNX2_MISC_VREG_CONTROL_1_2	(0xfL<<0)	bnx2.h
22837	BNX2_MISC_VREG_CONTROL_2_5	(0xfL<<4)	bnx2.h
22838	BNX2_MISC_FINAL_CLK_CTL_VAL	0x000008b8	bnx2.h
22839	BNX2_MISC_FINAL_CLK_CTL_VAL_MIS	(0x3ffffffL<<6)	bnx2.h
22840	BNX2_MISC_UNUSED0	0x000008bc	bnx2.h
22841	BNX2_NVM_COMMAND	0x00006400	bnx2.h
22842	BNX2_NVM_COMMAND_RST	(1L<<0)	bnx2.h
22843	BNX2_NVM_COMMAND_DONE	(1L<<3)	bnx2.h
22844	BNX2_NVM_COMMAND_DOIT	(1L<<4)	bnx2.h
22845	BNX2_NVM_COMMAND_WR	(1L<<5)	bnx2.h
22846	BNX2_NVM_COMMAND_ERASE	(1L<<6)	bnx2.h
22847	BNX2_NVM_COMMAND_FIRST	(1L<<7)	bnx2.h
22848	BNX2_NVM_COMMAND_LAST	(1L<<8)	bnx2.h
22849	BNX2_NVM_COMMAND_WREN	(1L<<16)	bnx2.h
22850	BNX2_NVM_COMMAND_WRDI	(1L<<17)	bnx2.h
22851	BNX2_NVM_COMMAND_EWSR	(1L<<18)	bnx2.h
22852	BNX2_NVM_COMMAND_WRSR	(1L<<19)	bnx2.h
22853	BNX2_NVM_STATUS	0x00006404	bnx2.h
22854	BNX2_NVM_STATUS_PI_FSM_STATE	(0xfL<<0)	bnx2.h
22855	BNX2_NVM_STATUS_EE_FSM_STATE	(0xfL<<4)	bnx2.h
22856	BNX2_NVM_STATUS_EQ_FSM_STATE	(0xfL<<8)	bnx2.h
22857	BNX2_NVM_WRITE	0x00006408	bnx2.h
22858	BNX2_NVM_WRITE_NVM_WRITE_VALUE	(0xffffffffL<<0)	bnx2.h
22859	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(0L<<0)	bnx2.h
22860	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(1L<<0)	bnx2.h
22861	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(2L<<0)	bnx2.h
22862	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(4L<<0)	bnx2.h
22863	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(8L<<0)	bnx2.h
22864	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(16L<<0)	bnx2.h
22865	BNX2_NVM_WRITE_NVM_WRITE_VALUE_	(32L<<0)	bnx2.h
22866	BNX2_NVM_ADDR	0x0000640c	bnx2.h
22867	BNX2_NVM_ADDR_NVM_ADDR_VALUE	(0xffffffL<<0)	bnx2.h
22868	BNX2_NVM_ADDR_NVM_ADDR_VALUE_BI	(0L<<0)	bnx2.h
22869	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(1L<<0)	bnx2.h
22870	BNX2_NVM_ADDR_NVM_ADDR_VALUE_EE	(2L<<0)	bnx2.h
22871	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SC	(4L<<0)	bnx2.h
22872	BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS	(8L<<0)	bnx2.h
22873	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO	(16L<<0)	bnx2.h
22874	BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI	(32L<<0)	bnx2.h
22875	BNX2_NVM_READ	0x00006410	bnx2.h
22876	BNX2_NVM_READ_NVM_READ_VALUE	(0xffffffffL<<0)	bnx2.h
22877	BNX2_NVM_READ_NVM_READ_VALUE_BI	(0L<<0)	bnx2.h
22878	BNX2_NVM_READ_NVM_READ_VALUE_EE	(1L<<0)	bnx2.h
22879	BNX2_NVM_READ_NVM_READ_VALUE_EE	(2L<<0)	bnx2.h
22880	BNX2_NVM_READ_NVM_READ_VALUE_SC	(4L<<0)	bnx2.h
22881	BNX2_NVM_READ_NVM_READ_VALUE_CS	(8L<<0)	bnx2.h
22882	BNX2_NVM_READ_NVM_READ_VALUE_SO	(16L<<0)	bnx2.h
22883	BNX2_NVM_READ_NVM_READ_VALUE_SI	(32L<<0)	bnx2.h
22884	BNX2_NVM_CFG1	0x00006414	bnx2.h
22885	BNX2_NVM_CFG1_FLASH_MODE	(1L<<0)	bnx2.h
22886	BNX2_NVM_CFG1_BUFFER_MODE	(1L<<1)	bnx2.h
22887	BNX2_NVM_CFG1_PASS_MODE	(1L<<2)	bnx2.h
22888	BNX2_NVM_CFG1_BITBANG_MODE	(1L<<3)	bnx2.h
22889	BNX2_NVM_CFG1_STATUS_BIT	(0x7L<<4)	bnx2.h
22890	BNX2_NVM_CFG1_STATUS_BIT_FLASH_	(0L<<4)	bnx2.h
22891	BNX2_NVM_CFG1_STATUS_BIT_BUFFER	(7L<<4)	bnx2.h
22892	BNX2_NVM_CFG1_SPI_CLK_DIV	(0xfL<<7)	bnx2.h
22893	BNX2_NVM_CFG1_SEE_CLK_DIV	(0x7ffL<<11)	bnx2.h
22894	BNX2_NVM_CFG1_PROTECT_MODE	(1L<<24)	bnx2.h
22895	BNX2_NVM_CFG1_FLASH_SIZE	(1L<<25)	bnx2.h
22896	BNX2_NVM_CFG1_COMPAT_BYPASSS	(1L<<31)	bnx2.h
22897	BNX2_NVM_CFG2	0x00006418	bnx2.h
22898	BNX2_NVM_CFG2_ERASE_CMD	(0xffL<<0)	bnx2.h
22899	BNX2_NVM_CFG2_DUMMY	(0xffL<<8)	bnx2.h
22900	BNX2_NVM_CFG2_STATUS_CMD	(0xffL<<16)	bnx2.h
22901	BNX2_NVM_CFG3	0x0000641c	bnx2.h
22902	BNX2_NVM_CFG3_BUFFER_RD_CMD	(0xffL<<0)	bnx2.h
22903	BNX2_NVM_CFG3_WRITE_CMD	(0xffL<<8)	bnx2.h
22904	BNX2_NVM_CFG3_BUFFER_WRITE_CMD	(0xffL<<16)	bnx2.h
22905	BNX2_NVM_CFG3_READ_CMD	(0xffL<<24)	bnx2.h
22906	BNX2_NVM_SW_ARB	0x00006420	bnx2.h
22907	BNX2_NVM_SW_ARB_ARB_REQ_SET0	(1L<<0)	bnx2.h
22908	BNX2_NVM_SW_ARB_ARB_REQ_SET1	(1L<<1)	bnx2.h
22909	BNX2_NVM_SW_ARB_ARB_REQ_SET2	(1L<<2)	bnx2.h
22910	BNX2_NVM_SW_ARB_ARB_REQ_SET3	(1L<<3)	bnx2.h
22911	BNX2_NVM_SW_ARB_ARB_REQ_CLR0	(1L<<4)	bnx2.h
22912	BNX2_NVM_SW_ARB_ARB_REQ_CLR1	(1L<<5)	bnx2.h
22913	BNX2_NVM_SW_ARB_ARB_REQ_CLR2	(1L<<6)	bnx2.h
22914	BNX2_NVM_SW_ARB_ARB_REQ_CLR3	(1L<<7)	bnx2.h
22915	BNX2_NVM_SW_ARB_ARB_ARB0	(1L<<8)	bnx2.h
22916	BNX2_NVM_SW_ARB_ARB_ARB1	(1L<<9)	bnx2.h
22917	BNX2_NVM_SW_ARB_ARB_ARB2	(1L<<10)	bnx2.h
22918	BNX2_NVM_SW_ARB_ARB_ARB3	(1L<<11)	bnx2.h
22919	BNX2_NVM_SW_ARB_REQ0	(1L<<12)	bnx2.h
22920	BNX2_NVM_SW_ARB_REQ1	(1L<<13)	bnx2.h
22921	BNX2_NVM_SW_ARB_REQ2	(1L<<14)	bnx2.h
22922	BNX2_NVM_SW_ARB_REQ3	(1L<<15)	bnx2.h
22923	BNX2_NVM_ACCESS_ENABLE	0x00006424	bnx2.h
22924	BNX2_NVM_ACCESS_ENABLE_EN	(1L<<0)	bnx2.h
22925	BNX2_NVM_ACCESS_ENABLE_WR_EN	(1L<<1)	bnx2.h
22926	BNX2_NVM_WRITE1	0x00006428	bnx2.h
22927	BNX2_NVM_WRITE1_WREN_CMD	(0xffL<<0)	bnx2.h
22928	BNX2_NVM_WRITE1_WRDI_CMD	(0xffL<<8)	bnx2.h
22929	BNX2_NVM_WRITE1_SR_DATA	(0xffL<<16)	bnx2.h
22930	BNX2_DMA_COMMAND	0x00000c00	bnx2.h
22931	BNX2_DMA_COMMAND_ENABLE	(1L<<0)	bnx2.h
22932	BNX2_DMA_STATUS	0x00000c04	bnx2.h
22933	BNX2_DMA_STATUS_PAR_ERROR_STATE	(1L<<0)	bnx2.h
22934	BNX2_DMA_STATUS_READ_TRANSFERS_	(1L<<16)	bnx2.h
22935	BNX2_DMA_STATUS_READ_DELAY_PCI_	(1L<<17)	bnx2.h
22936	BNX2_DMA_STATUS_BIG_READ_TRANSF	(1L<<18)	bnx2.h
22937	BNX2_DMA_STATUS_BIG_READ_DELAY_	(1L<<19)	bnx2.h
22938	BNX2_DMA_STATUS_BIG_READ_RETRY_	(1L<<20)	bnx2.h
22939	BNX2_DMA_STATUS_WRITE_TRANSFERS	(1L<<21)	bnx2.h
22940	BNX2_DMA_STATUS_WRITE_DELAY_PCI	(1L<<22)	bnx2.h
22941	BNX2_DMA_STATUS_BIG_WRITE_TRANS	(1L<<23)	bnx2.h
22942	BNX2_DMA_STATUS_BIG_WRITE_DELAY	(1L<<24)	bnx2.h
22943	BNX2_DMA_STATUS_BIG_WRITE_RETRY	(1L<<25)	bnx2.h
22944	BNX2_DMA_CONFIG	0x00000c08	bnx2.h
22945	BNX2_DMA_CONFIG_DATA_BYTE_SWAP	(1L<<0)	bnx2.h
22946	BNX2_DMA_CONFIG_DATA_WORD_SWAP	(1L<<1)	bnx2.h
22947	BNX2_DMA_CONFIG_CNTL_BYTE_SWAP	(1L<<4)	bnx2.h
22948	BNX2_DMA_CONFIG_CNTL_WORD_SWAP	(1L<<5)	bnx2.h
22949	BNX2_DMA_CONFIG_ONE_DMA	(1L<<6)	bnx2.h
22950	BNX2_DMA_CONFIG_CNTL_TWO_DMA	(1L<<7)	bnx2.h
22951	BNX2_DMA_CONFIG_CNTL_FPGA_MODE	(1L<<8)	bnx2.h
22952	BNX2_DMA_CONFIG_CNTL_PING_PONG_	(1L<<10)	bnx2.h
22953	BNX2_DMA_CONFIG_CNTL_PCI_COMP_D	(1L<<11)	bnx2.h
22954	BNX2_DMA_CONFIG_NO_RCHANS_IN_US	(0xfL<<12)	bnx2.h
22955	BNX2_DMA_CONFIG_NO_WCHANS_IN_US	(0xfL<<16)	bnx2.h
22956	BNX2_DMA_CONFIG_PCI_CLK_CMP_BIT	(0x7L<<20)	bnx2.h
22957	BNX2_DMA_CONFIG_PCI_FAST_CLK_CM	(1L<<23)	bnx2.h
22958	BNX2_DMA_CONFIG_BIG_SIZE	(0xfL<<24)	bnx2.h
22959	BNX2_DMA_CONFIG_BIG_SIZE_NONE	(0x0L<<24)	bnx2.h
22960	BNX2_DMA_CONFIG_BIG_SIZE_64	(0x1L<<24)	bnx2.h
22961	BNX2_DMA_CONFIG_BIG_SIZE_128	(0x2L<<24)	bnx2.h
22962	BNX2_DMA_CONFIG_BIG_SIZE_256	(0x4L<<24)	bnx2.h
22963	BNX2_DMA_CONFIG_BIG_SIZE_512	(0x8L<<24)	bnx2.h
22964	BNX2_DMA_BLACKOUT	0x00000c0c	bnx2.h
22965	BNX2_DMA_BLACKOUT_RD_RETRY_BLAC	(0xffL<<0)	bnx2.h
22966	BNX2_DMA_BLACKOUT_2ND_RD_RETRY_	(0xffL<<8)	bnx2.h
22967	BNX2_DMA_BLACKOUT_WR_RETRY_BLAC	(0xffL<<16)	bnx2.h
22968	BNX2_DMA_RCHAN_STAT	0x00000c30	bnx2.h
22969	BNX2_DMA_RCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
22970	BNX2_DMA_RCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
22971	BNX2_DMA_RCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
22972	BNX2_DMA_RCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
22973	BNX2_DMA_RCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
22974	BNX2_DMA_RCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
22975	BNX2_DMA_RCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
22976	BNX2_DMA_RCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
22977	BNX2_DMA_RCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
22978	BNX2_DMA_RCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
22979	BNX2_DMA_RCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
22980	BNX2_DMA_RCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
22981	BNX2_DMA_RCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
22982	BNX2_DMA_RCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
22983	BNX2_DMA_RCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
22984	BNX2_DMA_RCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
22985	BNX2_DMA_WCHAN_STAT	0x00000c34	bnx2.h
22986	BNX2_DMA_WCHAN_STAT_COMP_CODE_0	(0x7L<<0)	bnx2.h
22987	BNX2_DMA_WCHAN_STAT_PAR_ERR_0	(1L<<3)	bnx2.h
22988	BNX2_DMA_WCHAN_STAT_COMP_CODE_1	(0x7L<<4)	bnx2.h
22989	BNX2_DMA_WCHAN_STAT_PAR_ERR_1	(1L<<7)	bnx2.h
22990	BNX2_DMA_WCHAN_STAT_COMP_CODE_2	(0x7L<<8)	bnx2.h
22991	BNX2_DMA_WCHAN_STAT_PAR_ERR_2	(1L<<11)	bnx2.h
22992	BNX2_DMA_WCHAN_STAT_COMP_CODE_3	(0x7L<<12)	bnx2.h
22993	BNX2_DMA_WCHAN_STAT_PAR_ERR_3	(1L<<15)	bnx2.h
22994	BNX2_DMA_WCHAN_STAT_COMP_CODE_4	(0x7L<<16)	bnx2.h
22995	BNX2_DMA_WCHAN_STAT_PAR_ERR_4	(1L<<19)	bnx2.h
22996	BNX2_DMA_WCHAN_STAT_COMP_CODE_5	(0x7L<<20)	bnx2.h
22997	BNX2_DMA_WCHAN_STAT_PAR_ERR_5	(1L<<23)	bnx2.h
22998	BNX2_DMA_WCHAN_STAT_COMP_CODE_6	(0x7L<<24)	bnx2.h
22999	BNX2_DMA_WCHAN_STAT_PAR_ERR_6	(1L<<27)	bnx2.h
23000	BNX2_DMA_WCHAN_STAT_COMP_CODE_7	(0x7L<<28)	bnx2.h
23001	BNX2_DMA_WCHAN_STAT_PAR_ERR_7	(1L<<31)	bnx2.h
23002	BNX2_DMA_RCHAN_ASSIGNMENT	0x00000c38	bnx2.h
23003	BNX2_DMA_RCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
23004	BNX2_DMA_RCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
23005	BNX2_DMA_RCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
23006	BNX2_DMA_RCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
23007	BNX2_DMA_RCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
23008	BNX2_DMA_RCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
23009	BNX2_DMA_RCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
23010	BNX2_DMA_RCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
23011	BNX2_DMA_WCHAN_ASSIGNMENT	0x00000c3c	bnx2.h
23012	BNX2_DMA_WCHAN_ASSIGNMENT_0	(0xfL<<0)	bnx2.h
23013	BNX2_DMA_WCHAN_ASSIGNMENT_1	(0xfL<<4)	bnx2.h
23014	BNX2_DMA_WCHAN_ASSIGNMENT_2	(0xfL<<8)	bnx2.h
23015	BNX2_DMA_WCHAN_ASSIGNMENT_3	(0xfL<<12)	bnx2.h
23016	BNX2_DMA_WCHAN_ASSIGNMENT_4	(0xfL<<16)	bnx2.h
23017	BNX2_DMA_WCHAN_ASSIGNMENT_5	(0xfL<<20)	bnx2.h
23018	BNX2_DMA_WCHAN_ASSIGNMENT_6	(0xfL<<24)	bnx2.h
23019	BNX2_DMA_WCHAN_ASSIGNMENT_7	(0xfL<<28)	bnx2.h
23020	BNX2_DMA_RCHAN_STAT_00	0x00000c40	bnx2.h
23021	BNX2_DMA_RCHAN_STAT_00_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
23022	BNX2_DMA_RCHAN_STAT_01	0x00000c44	bnx2.h
23023	BNX2_DMA_RCHAN_STAT_01_RCHAN_ST	(0xffffffffL<<0)	bnx2.h
23024	BNX2_DMA_RCHAN_STAT_02	0x00000c48	bnx2.h
23025	BNX2_DMA_RCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
23026	BNX2_DMA_RCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
23027	BNX2_DMA_RCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
23028	BNX2_DMA_RCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
23029	BNX2_DMA_RCHAN_STAT_10	0x00000c4c	bnx2.h
23030	BNX2_DMA_RCHAN_STAT_11	0x00000c50	bnx2.h
23031	BNX2_DMA_RCHAN_STAT_12	0x00000c54	bnx2.h
23032	BNX2_DMA_RCHAN_STAT_20	0x00000c58	bnx2.h
23033	BNX2_DMA_RCHAN_STAT_21	0x00000c5c	bnx2.h
23034	BNX2_DMA_RCHAN_STAT_22	0x00000c60	bnx2.h
23035	BNX2_DMA_RCHAN_STAT_30	0x00000c64	bnx2.h
23036	BNX2_DMA_RCHAN_STAT_31	0x00000c68	bnx2.h
23037	BNX2_DMA_RCHAN_STAT_32	0x00000c6c	bnx2.h
23038	BNX2_DMA_RCHAN_STAT_40	0x00000c70	bnx2.h
23039	BNX2_DMA_RCHAN_STAT_41	0x00000c74	bnx2.h
23040	BNX2_DMA_RCHAN_STAT_42	0x00000c78	bnx2.h
23041	BNX2_DMA_RCHAN_STAT_50	0x00000c7c	bnx2.h
23042	BNX2_DMA_RCHAN_STAT_51	0x00000c80	bnx2.h
23043	BNX2_DMA_RCHAN_STAT_52	0x00000c84	bnx2.h
23044	BNX2_DMA_RCHAN_STAT_60	0x00000c88	bnx2.h
23045	BNX2_DMA_RCHAN_STAT_61	0x00000c8c	bnx2.h
23046	BNX2_DMA_RCHAN_STAT_62	0x00000c90	bnx2.h
23047	BNX2_DMA_RCHAN_STAT_70	0x00000c94	bnx2.h
23048	BNX2_DMA_RCHAN_STAT_71	0x00000c98	bnx2.h
23049	BNX2_DMA_RCHAN_STAT_72	0x00000c9c	bnx2.h
23050	BNX2_DMA_WCHAN_STAT_00	0x00000ca0	bnx2.h
23051	BNX2_DMA_WCHAN_STAT_00_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
23052	BNX2_DMA_WCHAN_STAT_01	0x00000ca4	bnx2.h
23053	BNX2_DMA_WCHAN_STAT_01_WCHAN_ST	(0xffffffffL<<0)	bnx2.h
23054	BNX2_DMA_WCHAN_STAT_02	0x00000ca8	bnx2.h
23055	BNX2_DMA_WCHAN_STAT_02_LENGTH	(0xffffL<<0)	bnx2.h
23056	BNX2_DMA_WCHAN_STAT_02_WORD_SWA	(1L<<16)	bnx2.h
23057	BNX2_DMA_WCHAN_STAT_02_BYTE_SWA	(1L<<17)	bnx2.h
23058	BNX2_DMA_WCHAN_STAT_02_PRIORITY	(1L<<18)	bnx2.h
23059	BNX2_DMA_WCHAN_STAT_10	0x00000cac	bnx2.h
23060	BNX2_DMA_WCHAN_STAT_11	0x00000cb0	bnx2.h
23061	BNX2_DMA_WCHAN_STAT_12	0x00000cb4	bnx2.h
23062	BNX2_DMA_WCHAN_STAT_20	0x00000cb8	bnx2.h
23063	BNX2_DMA_WCHAN_STAT_21	0x00000cbc	bnx2.h
23064	BNX2_DMA_WCHAN_STAT_22	0x00000cc0	bnx2.h
23065	BNX2_DMA_WCHAN_STAT_30	0x00000cc4	bnx2.h
23066	BNX2_DMA_WCHAN_STAT_31	0x00000cc8	bnx2.h
23067	BNX2_DMA_WCHAN_STAT_32	0x00000ccc	bnx2.h
23068	BNX2_DMA_WCHAN_STAT_40	0x00000cd0	bnx2.h
23069	BNX2_DMA_WCHAN_STAT_41	0x00000cd4	bnx2.h
23070	BNX2_DMA_WCHAN_STAT_42	0x00000cd8	bnx2.h
23071	BNX2_DMA_WCHAN_STAT_50	0x00000cdc	bnx2.h
23072	BNX2_DMA_WCHAN_STAT_51	0x00000ce0	bnx2.h
23073	BNX2_DMA_WCHAN_STAT_52	0x00000ce4	bnx2.h
23074	BNX2_DMA_WCHAN_STAT_60	0x00000ce8	bnx2.h
23075	BNX2_DMA_WCHAN_STAT_61	0x00000cec	bnx2.h
23076	BNX2_DMA_WCHAN_STAT_62	0x00000cf0	bnx2.h
23077	BNX2_DMA_WCHAN_STAT_70	0x00000cf4	bnx2.h
23078	BNX2_DMA_WCHAN_STAT_71	0x00000cf8	bnx2.h
23079	BNX2_DMA_WCHAN_STAT_72	0x00000cfc	bnx2.h
23080	BNX2_DMA_ARB_STAT_00	0x00000d00	bnx2.h
23081	BNX2_DMA_ARB_STAT_00_MASTER	(0xffffL<<0)	bnx2.h
23082	BNX2_DMA_ARB_STAT_00_MASTER_ENC	(0xffL<<16)	bnx2.h
23083	BNX2_DMA_ARB_STAT_00_CUR_BINMST	(0xffL<<24)	bnx2.h
23084	BNX2_DMA_ARB_STAT_01	0x00000d04	bnx2.h
23085	BNX2_DMA_ARB_STAT_01_LPR_RPTR	(0xfL<<0)	bnx2.h
23086	BNX2_DMA_ARB_STAT_01_LPR_WPTR	(0xfL<<4)	bnx2.h
23087	BNX2_DMA_ARB_STAT_01_LPB_RPTR	(0xfL<<8)	bnx2.h
23088	BNX2_DMA_ARB_STAT_01_LPB_WPTR	(0xfL<<12)	bnx2.h
23089	BNX2_DMA_ARB_STAT_01_HPR_RPTR	(0xfL<<16)	bnx2.h
23090	BNX2_DMA_ARB_STAT_01_HPR_WPTR	(0xfL<<20)	bnx2.h
23091	BNX2_DMA_ARB_STAT_01_HPB_RPTR	(0xfL<<24)	bnx2.h
23092	BNX2_DMA_ARB_STAT_01_HPB_WPTR	(0xfL<<28)	bnx2.h
23093	BNX2_DMA_FUSE_CTRL0_CMD	0x00000f00	bnx2.h
23094	BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_D	(1L<<0)	bnx2.h
23095	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_D	(1L<<1)	bnx2.h
23096	BNX2_DMA_FUSE_CTRL0_CMD_SHIFT	(1L<<2)	bnx2.h
23097	BNX2_DMA_FUSE_CTRL0_CMD_LOAD	(1L<<3)	bnx2.h
23098	BNX2_DMA_FUSE_CTRL0_CMD_SEL	(0xfL<<8)	bnx2.h
23099	BNX2_DMA_FUSE_CTRL0_DATA	0x00000f04	bnx2.h
23100	BNX2_DMA_FUSE_CTRL1_CMD	0x00000f08	bnx2.h
23101	BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_D	(1L<<0)	bnx2.h
23102	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_D	(1L<<1)	bnx2.h
23103	BNX2_DMA_FUSE_CTRL1_CMD_SHIFT	(1L<<2)	bnx2.h
23104	BNX2_DMA_FUSE_CTRL1_CMD_LOAD	(1L<<3)	bnx2.h
23105	BNX2_DMA_FUSE_CTRL1_CMD_SEL	(0xfL<<8)	bnx2.h
23106	BNX2_DMA_FUSE_CTRL1_DATA	0x00000f0c	bnx2.h
23107	BNX2_DMA_FUSE_CTRL2_CMD	0x00000f10	bnx2.h
23108	BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_D	(1L<<0)	bnx2.h
23109	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_D	(1L<<1)	bnx2.h
23110	BNX2_DMA_FUSE_CTRL2_CMD_SHIFT	(1L<<2)	bnx2.h
23111	BNX2_DMA_FUSE_CTRL2_CMD_LOAD	(1L<<3)	bnx2.h
23112	BNX2_DMA_FUSE_CTRL2_CMD_SEL	(0xfL<<8)	bnx2.h
23113	BNX2_DMA_FUSE_CTRL2_DATA	0x00000f14	bnx2.h
23114	BNX2_CTX_COMMAND	0x00001000	bnx2.h
23115	BNX2_CTX_COMMAND_ENABLED	(1L<<0)	bnx2.h
23116	BNX2_CTX_STATUS	0x00001004	bnx2.h
23117	BNX2_CTX_STATUS_LOCK_WAIT	(1L<<0)	bnx2.h
23118	BNX2_CTX_STATUS_READ_STAT	(1L<<16)	bnx2.h
23119	BNX2_CTX_STATUS_WRITE_STAT	(1L<<17)	bnx2.h
23120	BNX2_CTX_STATUS_ACC_STALL_STAT	(1L<<18)	bnx2.h
23121	BNX2_CTX_STATUS_LOCK_STALL_STAT	(1L<<19)	bnx2.h
23122	BNX2_CTX_VIRT_ADDR	0x00001008	bnx2.h
23123	BNX2_CTX_VIRT_ADDR_VIRT_ADDR	(0x7fffL<<6)	bnx2.h
23124	BNX2_CTX_PAGE_TBL	0x0000100c	bnx2.h
23125	BNX2_CTX_PAGE_TBL_PAGE_TBL	(0x3fffL<<6)	bnx2.h
23126	BNX2_CTX_DATA_ADR	0x00001010	bnx2.h
23127	BNX2_CTX_DATA_ADR_DATA_ADR	(0x7ffffL<<2)	bnx2.h
23128	BNX2_CTX_DATA	0x00001014	bnx2.h
23129	BNX2_CTX_LOCK	0x00001018	bnx2.h
23130	BNX2_CTX_LOCK_TYPE	(0x7L<<0)	bnx2.h
23131	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VO	(0x0L<<0)	bnx2.h
23132	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_CO	(0x7L<<0)	bnx2.h
23133	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PR	(0x1L<<0)	bnx2.h
23134	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX	(0x2L<<0)	bnx2.h
23135	BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TI	(0x4L<<0)	bnx2.h
23136	BNX2_CTX_LOCK_CID_VALUE	(0x3fffL<<7)	bnx2.h
23137	BNX2_CTX_LOCK_GRANTED	(1L<<26)	bnx2.h
23138	BNX2_CTX_LOCK_MODE	(0x7L<<27)	bnx2.h
23139	BNX2_CTX_LOCK_MODE_UNLOCK	(0x0L<<27)	bnx2.h
23140	BNX2_CTX_LOCK_MODE_IMMEDIATE	(0x1L<<27)	bnx2.h
23141	BNX2_CTX_LOCK_MODE_SURE	(0x2L<<27)	bnx2.h
23142	BNX2_CTX_LOCK_STATUS	(1L<<30)	bnx2.h
23143	BNX2_CTX_LOCK_REQ	(1L<<31)	bnx2.h
23144	BNX2_CTX_ACCESS_STATUS	0x00001040	bnx2.h
23145	BNX2_CTX_ACCESS_STATUS_MASTEREN	(0xfL<<0)	bnx2.h
23146	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<10)	bnx2.h
23147	BNX2_CTX_ACCESS_STATUS_PAGETABL	(0x3L<<12)	bnx2.h
23148	BNX2_CTX_ACCESS_STATUS_ACCESSME	(0x3L<<14)	bnx2.h
23149	BNX2_CTX_ACCESS_STATUS_QUALIFIE	(0x7ffL<<17)	bnx2.h
23150	BNX2_CTX_DBG_LOCK_STATUS	0x00001044	bnx2.h
23151	BNX2_CTX_DBG_LOCK_STATUS_SM	(0x3ffL<<0)	bnx2.h
23152	BNX2_CTX_DBG_LOCK_STATUS_MATCH	(0x3ffL<<22)	bnx2.h
23153	BNX2_CTX_CHNL_LOCK_STATUS_0	0x00001080	bnx2.h
23154	BNX2_CTX_CHNL_LOCK_STATUS_0_CID	(0x3fffL<<0)	bnx2.h
23155	BNX2_CTX_CHNL_LOCK_STATUS_0_TYP	(0x3L<<14)	bnx2.h
23156	BNX2_CTX_CHNL_LOCK_STATUS_0_MOD	(1L<<16)	bnx2.h
23157	BNX2_CTX_CHNL_LOCK_STATUS_1	0x00001084	bnx2.h
23158	BNX2_CTX_CHNL_LOCK_STATUS_2	0x00001088	bnx2.h
23159	BNX2_CTX_CHNL_LOCK_STATUS_3	0x0000108c	bnx2.h
23160	BNX2_CTX_CHNL_LOCK_STATUS_4	0x00001090	bnx2.h
23161	BNX2_CTX_CHNL_LOCK_STATUS_5	0x00001094	bnx2.h
23162	BNX2_CTX_CHNL_LOCK_STATUS_6	0x00001098	bnx2.h
23163	BNX2_CTX_CHNL_LOCK_STATUS_7	0x0000109c	bnx2.h
23164	BNX2_CTX_CHNL_LOCK_STATUS_8	0x000010a0	bnx2.h
23165	BNX2_EMAC_MODE	0x00001400	bnx2.h
23166	BNX2_EMAC_MODE_RESET	(1L<<0)	bnx2.h
23167	BNX2_EMAC_MODE_HALF_DUPLEX	(1L<<1)	bnx2.h
23168	BNX2_EMAC_MODE_PORT	(0x3L<<2)	bnx2.h
23169	BNX2_EMAC_MODE_PORT_NONE	(0L<<2)	bnx2.h
23170	BNX2_EMAC_MODE_PORT_MII	(1L<<2)	bnx2.h
23171	BNX2_EMAC_MODE_PORT_GMII	(2L<<2)	bnx2.h
23172	BNX2_EMAC_MODE_PORT_MII_10	(3L<<2)	bnx2.h
23173	BNX2_EMAC_MODE_MAC_LOOP	(1L<<4)	bnx2.h
23174	BNX2_EMAC_MODE_25G	(1L<<5)	bnx2.h
23175	BNX2_EMAC_MODE_TAGGED_MAC_CTL	(1L<<7)	bnx2.h
23176	BNX2_EMAC_MODE_TX_BURST	(1L<<8)	bnx2.h
23177	BNX2_EMAC_MODE_MAX_DEFER_DROP_E	(1L<<9)	bnx2.h
23178	BNX2_EMAC_MODE_EXT_LINK_POL	(1L<<10)	bnx2.h
23179	BNX2_EMAC_MODE_FORCE_LINK	(1L<<11)	bnx2.h
23180	BNX2_EMAC_MODE_MPKT	(1L<<18)	bnx2.h
23181	BNX2_EMAC_MODE_MPKT_RCVD	(1L<<19)	bnx2.h
23182	BNX2_EMAC_MODE_ACPI_RCVD	(1L<<20)	bnx2.h
23183	BNX2_EMAC_STATUS	0x00001404	bnx2.h
23184	BNX2_EMAC_STATUS_LINK	(1L<<11)	bnx2.h
23185	BNX2_EMAC_STATUS_LINK_CHANGE	(1L<<12)	bnx2.h
23186	BNX2_EMAC_STATUS_MI_COMPLETE	(1L<<22)	bnx2.h
23187	BNX2_EMAC_STATUS_MI_INT	(1L<<23)	bnx2.h
23188	BNX2_EMAC_STATUS_AP_ERROR	(1L<<24)	bnx2.h
23189	BNX2_EMAC_STATUS_PARITY_ERROR_S	(1L<<31)	bnx2.h
23190	BNX2_EMAC_ATTENTION_ENA	0x00001408	bnx2.h
23191	BNX2_EMAC_ATTENTION_ENA_LINK	(1L<<11)	bnx2.h
23192	BNX2_EMAC_ATTENTION_ENA_MI_COMP	(1L<<22)	bnx2.h
23193	BNX2_EMAC_ATTENTION_ENA_MI_INT	(1L<<23)	bnx2.h
23194	BNX2_EMAC_ATTENTION_ENA_AP_ERRO	(1L<<24)	bnx2.h
23195	BNX2_EMAC_LED	0x0000140c	bnx2.h
23196	BNX2_EMAC_LED_OVERRIDE	(1L<<0)	bnx2.h
23197	BNX2_EMAC_LED_1000MB_OVERRIDE	(1L<<1)	bnx2.h
23198	BNX2_EMAC_LED_100MB_OVERRIDE	(1L<<2)	bnx2.h
23199	BNX2_EMAC_LED_10MB_OVERRIDE	(1L<<3)	bnx2.h
23200	BNX2_EMAC_LED_TRAFFIC_OVERRIDE	(1L<<4)	bnx2.h
23201	BNX2_EMAC_LED_BLNK_TRAFFIC	(1L<<5)	bnx2.h
23202	BNX2_EMAC_LED_TRAFFIC	(1L<<6)	bnx2.h
23203	BNX2_EMAC_LED_1000MB	(1L<<7)	bnx2.h
23204	BNX2_EMAC_LED_100MB	(1L<<8)	bnx2.h
23205	BNX2_EMAC_LED_10MB	(1L<<9)	bnx2.h
23206	BNX2_EMAC_LED_TRAFFIC_STAT	(1L<<10)	bnx2.h
23207	BNX2_EMAC_LED_BLNK_RATE	(0xfffL<<19)	bnx2.h
23208	BNX2_EMAC_LED_BLNK_RATE_ENA	(1L<<31)	bnx2.h
23209	BNX2_EMAC_MAC_MATCH0	0x00001410	bnx2.h
23210	BNX2_EMAC_MAC_MATCH1	0x00001414	bnx2.h
23211	BNX2_EMAC_MAC_MATCH2	0x00001418	bnx2.h
23212	BNX2_EMAC_MAC_MATCH3	0x0000141c	bnx2.h
23213	BNX2_EMAC_MAC_MATCH4	0x00001420	bnx2.h
23214	BNX2_EMAC_MAC_MATCH5	0x00001424	bnx2.h
23215	BNX2_EMAC_MAC_MATCH6	0x00001428	bnx2.h
23216	BNX2_EMAC_MAC_MATCH7	0x0000142c	bnx2.h
23217	BNX2_EMAC_MAC_MATCH8	0x00001430	bnx2.h
23218	BNX2_EMAC_MAC_MATCH9	0x00001434	bnx2.h
23219	BNX2_EMAC_MAC_MATCH10	0x00001438	bnx2.h
23220	BNX2_EMAC_MAC_MATCH11	0x0000143c	bnx2.h
23221	BNX2_EMAC_MAC_MATCH12	0x00001440	bnx2.h
23222	BNX2_EMAC_MAC_MATCH13	0x00001444	bnx2.h
23223	BNX2_EMAC_MAC_MATCH14	0x00001448	bnx2.h
23224	BNX2_EMAC_MAC_MATCH15	0x0000144c	bnx2.h
23225	BNX2_EMAC_MAC_MATCH16	0x00001450	bnx2.h
23226	BNX2_EMAC_MAC_MATCH17	0x00001454	bnx2.h
23227	BNX2_EMAC_MAC_MATCH18	0x00001458	bnx2.h
23228	BNX2_EMAC_MAC_MATCH19	0x0000145c	bnx2.h
23229	BNX2_EMAC_MAC_MATCH20	0x00001460	bnx2.h
23230	BNX2_EMAC_MAC_MATCH21	0x00001464	bnx2.h
23231	BNX2_EMAC_MAC_MATCH22	0x00001468	bnx2.h
23232	BNX2_EMAC_MAC_MATCH23	0x0000146c	bnx2.h
23233	BNX2_EMAC_MAC_MATCH24	0x00001470	bnx2.h
23234	BNX2_EMAC_MAC_MATCH25	0x00001474	bnx2.h
23235	BNX2_EMAC_MAC_MATCH26	0x00001478	bnx2.h
23236	BNX2_EMAC_MAC_MATCH27	0x0000147c	bnx2.h
23237	BNX2_EMAC_MAC_MATCH28	0x00001480	bnx2.h
23238	BNX2_EMAC_MAC_MATCH29	0x00001484	bnx2.h
23239	BNX2_EMAC_MAC_MATCH30	0x00001488	bnx2.h
23240	BNX2_EMAC_MAC_MATCH31	0x0000148c	bnx2.h
23241	BNX2_EMAC_BACKOFF_SEED	0x00001498	bnx2.h
23242	BNX2_EMAC_BACKOFF_SEED_EMAC_BAC	(0x3ffL<<0)	bnx2.h
23243	BNX2_EMAC_RX_MTU_SIZE	0x0000149c	bnx2.h
23244	BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE	(0xffffL<<0)	bnx2.h
23245	BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA	(1L<<31)	bnx2.h
23246	BNX2_EMAC_SERDES_CNTL	0x000014a4	bnx2.h
23247	BNX2_EMAC_SERDES_CNTL_RXR	(0x7L<<0)	bnx2.h
23248	BNX2_EMAC_SERDES_CNTL_RXG	(0x3L<<3)	bnx2.h
23249	BNX2_EMAC_SERDES_CNTL_RXCKSEL	(1L<<6)	bnx2.h
23250	BNX2_EMAC_SERDES_CNTL_TXBIAS	(0x7L<<7)	bnx2.h
23251	BNX2_EMAC_SERDES_CNTL_BGMAX	(1L<<10)	bnx2.h
23252	BNX2_EMAC_SERDES_CNTL_BGMIN	(1L<<11)	bnx2.h
23253	BNX2_EMAC_SERDES_CNTL_TXMODE	(1L<<12)	bnx2.h
23254	BNX2_EMAC_SERDES_CNTL_TXEDGE	(1L<<13)	bnx2.h
23255	BNX2_EMAC_SERDES_CNTL_SERDES_MO	(1L<<14)	bnx2.h
23256	BNX2_EMAC_SERDES_CNTL_PLLTEST	(1L<<15)	bnx2.h
23257	BNX2_EMAC_SERDES_CNTL_CDET_EN	(1L<<16)	bnx2.h
23258	BNX2_EMAC_SERDES_CNTL_TBI_LBK	(1L<<17)	bnx2.h
23259	BNX2_EMAC_SERDES_CNTL_REMOTE_LB	(1L<<18)	bnx2.h
23260	BNX2_EMAC_SERDES_CNTL_REV_PHASE	(1L<<19)	bnx2.h
23261	BNX2_EMAC_SERDES_CNTL_REGCTL12	(0x3L<<20)	bnx2.h
23262	BNX2_EMAC_SERDES_CNTL_REGCTL25	(0x3L<<22)	bnx2.h
23263	BNX2_EMAC_SERDES_STATUS	0x000014a8	bnx2.h
23264	BNX2_EMAC_SERDES_STATUS_RX_STAT	(0xffL<<0)	bnx2.h
23265	BNX2_EMAC_SERDES_STATUS_COMMA_D	(1L<<8)	bnx2.h
23266	BNX2_EMAC_MDIO_COMM	0x000014ac	bnx2.h
23267	BNX2_EMAC_MDIO_COMM_DATA	(0xffffL<<0)	bnx2.h
23268	BNX2_EMAC_MDIO_COMM_REG_ADDR	(0x1fL<<16)	bnx2.h
23269	BNX2_EMAC_MDIO_COMM_PHY_ADDR	(0x1fL<<21)	bnx2.h
23270	BNX2_EMAC_MDIO_COMM_COMMAND	(0x3L<<26)	bnx2.h
23271	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(0L<<26)	bnx2.h
23272	BNX2_EMAC_MDIO_COMM_COMMAND_WRI	(1L<<26)	bnx2.h
23273	BNX2_EMAC_MDIO_COMM_COMMAND_REA	(2L<<26)	bnx2.h
23274	BNX2_EMAC_MDIO_COMM_COMMAND_UND	(3L<<26)	bnx2.h
23275	BNX2_EMAC_MDIO_COMM_FAIL	(1L<<28)	bnx2.h
23276	BNX2_EMAC_MDIO_COMM_START_BUSY	(1L<<29)	bnx2.h
23277	BNX2_EMAC_MDIO_COMM_DISEXT	(1L<<30)	bnx2.h
23278	BNX2_EMAC_MDIO_STATUS	0x000014b0	bnx2.h
23279	BNX2_EMAC_MDIO_STATUS_LINK	(1L<<0)	bnx2.h
23280	BNX2_EMAC_MDIO_STATUS_10MB	(1L<<1)	bnx2.h
23281	BNX2_EMAC_MDIO_MODE	0x000014b4	bnx2.h
23282	BNX2_EMAC_MDIO_MODE_SHORT_PREAM	(1L<<1)	bnx2.h
23283	BNX2_EMAC_MDIO_MODE_AUTO_POLL	(1L<<4)	bnx2.h
23284	BNX2_EMAC_MDIO_MODE_BIT_BANG	(1L<<8)	bnx2.h
23285	BNX2_EMAC_MDIO_MODE_MDIO	(1L<<9)	bnx2.h
23286	BNX2_EMAC_MDIO_MODE_MDIO_OE	(1L<<10)	bnx2.h
23287	BNX2_EMAC_MDIO_MODE_MDC	(1L<<11)	bnx2.h
23288	BNX2_EMAC_MDIO_MODE_MDINT	(1L<<12)	bnx2.h
23289	BNX2_EMAC_MDIO_MODE_CLOCK_CNT	(0x1fL<<16)	bnx2.h
23290	BNX2_EMAC_MDIO_AUTO_STATUS	0x000014b8	bnx2.h
23291	BNX2_EMAC_MDIO_AUTO_STATUS_AUTO	(1L<<0)	bnx2.h
23292	BNX2_EMAC_TX_MODE	0x000014bc	bnx2.h
23293	BNX2_EMAC_TX_MODE_RESET	(1L<<0)	bnx2.h
23294	BNX2_EMAC_TX_MODE_EXT_PAUSE_EN	(1L<<3)	bnx2.h
23295	BNX2_EMAC_TX_MODE_FLOW_EN	(1L<<4)	bnx2.h
23296	BNX2_EMAC_TX_MODE_BIG_BACKOFF	(1L<<5)	bnx2.h
23297	BNX2_EMAC_TX_MODE_LONG_PAUSE	(1L<<6)	bnx2.h
23298	BNX2_EMAC_TX_MODE_LINK_AWARE	(1L<<7)	bnx2.h
23299	BNX2_EMAC_TX_STATUS	0x000014c0	bnx2.h
23300	BNX2_EMAC_TX_STATUS_XOFFED	(1L<<0)	bnx2.h
23301	BNX2_EMAC_TX_STATUS_XOFF_SENT	(1L<<1)	bnx2.h
23302	BNX2_EMAC_TX_STATUS_XON_SENT	(1L<<2)	bnx2.h
23303	BNX2_EMAC_TX_STATUS_LINK_UP	(1L<<3)	bnx2.h
23304	BNX2_EMAC_TX_STATUS_UNDERRUN	(1L<<4)	bnx2.h
23305	BNX2_EMAC_TX_LENGTHS	0x000014c4	bnx2.h
23306	BNX2_EMAC_TX_LENGTHS_SLOT	(0xffL<<0)	bnx2.h
23307	BNX2_EMAC_TX_LENGTHS_IPG	(0xfL<<8)	bnx2.h
23308	BNX2_EMAC_TX_LENGTHS_IPG_CRS	(0x3L<<12)	bnx2.h
23309	BNX2_EMAC_RX_MODE	0x000014c8	bnx2.h
23310	BNX2_EMAC_RX_MODE_RESET	(1L<<0)	bnx2.h
23311	BNX2_EMAC_RX_MODE_FLOW_EN	(1L<<2)	bnx2.h
23312	BNX2_EMAC_RX_MODE_KEEP_MAC_CONT	(1L<<3)	bnx2.h
23313	BNX2_EMAC_RX_MODE_KEEP_PAUSE	(1L<<4)	bnx2.h
23314	BNX2_EMAC_RX_MODE_ACCEPT_OVERSI	(1L<<5)	bnx2.h
23315	BNX2_EMAC_RX_MODE_ACCEPT_RUNTS	(1L<<6)	bnx2.h
23316	BNX2_EMAC_RX_MODE_LLC_CHK	(1L<<7)	bnx2.h
23317	BNX2_EMAC_RX_MODE_PROMISCUOUS	(1L<<8)	bnx2.h
23318	BNX2_EMAC_RX_MODE_NO_CRC_CHK	(1L<<9)	bnx2.h
23319	BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG	(1L<<10)	bnx2.h
23320	BNX2_EMAC_RX_MODE_FILT_BROADCAS	(1L<<11)	bnx2.h
23321	BNX2_EMAC_RX_MODE_SORT_MODE	(1L<<12)	bnx2.h
23322	BNX2_EMAC_RX_STATUS	0x000014cc	bnx2.h
23323	BNX2_EMAC_RX_STATUS_FFED	(1L<<0)	bnx2.h
23324	BNX2_EMAC_RX_STATUS_FF_RECEIVED	(1L<<1)	bnx2.h
23325	BNX2_EMAC_RX_STATUS_N_RECEIVED	(1L<<2)	bnx2.h
23326	BNX2_EMAC_MULTICAST_HASH0	0x000014d0	bnx2.h
23327	BNX2_EMAC_MULTICAST_HASH1	0x000014d4	bnx2.h
23328	BNX2_EMAC_MULTICAST_HASH2	0x000014d8	bnx2.h
23329	BNX2_EMAC_MULTICAST_HASH3	0x000014dc	bnx2.h
23330	BNX2_EMAC_MULTICAST_HASH4	0x000014e0	bnx2.h
23331	BNX2_EMAC_MULTICAST_HASH5	0x000014e4	bnx2.h
23332	BNX2_EMAC_MULTICAST_HASH6	0x000014e8	bnx2.h
23333	BNX2_EMAC_MULTICAST_HASH7	0x000014ec	bnx2.h
23334	BNX2_EMAC_RX_STAT_IFHCINOCTETS	0x00001500	bnx2.h
23335	BNX2_EMAC_RX_STAT_IFHCINBADOCTE	0x00001504	bnx2.h
23336	BNX2_EMAC_RX_STAT_ETHERSTATSFRA	0x00001508	bnx2.h
23337	BNX2_EMAC_RX_STAT_IFHCINUCASTPK	0x0000150c	bnx2.h
23338	BNX2_EMAC_RX_STAT_IFHCINMULTICA	0x00001510	bnx2.h
23339	BNX2_EMAC_RX_STAT_IFHCINBROADCA	0x00001514	bnx2.h
23340	BNX2_EMAC_RX_STAT_DOT3STATSFCSE	0x00001518	bnx2.h
23341	BNX2_EMAC_RX_STAT_DOT3STATSALIG	0x0000151c	bnx2.h
23342	BNX2_EMAC_RX_STAT_DOT3STATSCARR	0x00001520	bnx2.h
23343	BNX2_EMAC_RX_STAT_XONPAUSEFRAME	0x00001524	bnx2.h
23344	BNX2_EMAC_RX_STAT_XOFFPAUSEFRAM	0x00001528	bnx2.h
23345	BNX2_EMAC_RX_STAT_MACCONTROLFRA	0x0000152c	bnx2.h
23346	BNX2_EMAC_RX_STAT_XOFFSTATEENTE	0x00001530	bnx2.h
23347	BNX2_EMAC_RX_STAT_DOT3STATSFRAM	0x00001534	bnx2.h
23348	BNX2_EMAC_RX_STAT_ETHERSTATSJAB	0x00001538	bnx2.h
23349	BNX2_EMAC_RX_STAT_ETHERSTATSUND	0x0000153c	bnx2.h
23350	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001540	bnx2.h
23351	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001544	bnx2.h
23352	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001548	bnx2.h
23353	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x0000154c	bnx2.h
23354	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001550	bnx2.h
23355	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001554	bnx2.h
23356	BNX2_EMAC_RX_STAT_ETHERSTATSPKT	0x00001558	bnx2.h
23357	BNX2_EMAC_RXMAC_DEBUG0	0x0000155c	bnx2.h
23358	BNX2_EMAC_RXMAC_DEBUG1	0x00001560	bnx2.h
23359	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_N	(1L<<0)	bnx2.h
23360	BNX2_EMAC_RXMAC_DEBUG1_LENGTH_O	(1L<<1)	bnx2.h
23361	BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC	(1L<<2)	bnx2.h
23362	BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR	(1L<<3)	bnx2.h
23363	BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ER	(1L<<4)	bnx2.h
23364	BNX2_EMAC_RXMAC_DEBUG1_LAST_DAT	(1L<<5)	bnx2.h
23365	BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE	(1L<<6)	bnx2.h
23366	BNX2_EMAC_RXMAC_DEBUG1_BYTE_COU	(0xffffL<<7)	bnx2.h
23367	BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIM	(0xffL<<23)	bnx2.h
23368	BNX2_EMAC_RXMAC_DEBUG2	0x00001564	bnx2.h
23369	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
23370	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x0L<<0)	bnx2.h
23371	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x1L<<0)	bnx2.h
23372	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x2L<<0)	bnx2.h
23373	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x3L<<0)	bnx2.h
23374	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x4L<<0)	bnx2.h
23375	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x5L<<0)	bnx2.h
23376	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x6L<<0)	bnx2.h
23377	BNX2_EMAC_RXMAC_DEBUG2_SM_STATE	(0x7L<<0)	bnx2.h
23378	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0xfL<<3)	bnx2.h
23379	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x0L<<3)	bnx2.h
23380	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x1L<<3)	bnx2.h
23381	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x2L<<3)	bnx2.h
23382	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x3L<<3)	bnx2.h
23383	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x4L<<3)	bnx2.h
23384	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x5L<<3)	bnx2.h
23385	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x6L<<3)	bnx2.h
23386	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x7L<<3)	bnx2.h
23387	BNX2_EMAC_RXMAC_DEBUG2_IDI_STAT	(0x8L<<3)	bnx2.h
23388	BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN	(0xffL<<7)	bnx2.h
23389	BNX2_EMAC_RXMAC_DEBUG2_FALSEC	(1L<<15)	bnx2.h
23390	BNX2_EMAC_RXMAC_DEBUG2_TAGGED	(1L<<16)	bnx2.h
23391	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
23392	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(0L<<18)	bnx2.h
23393	BNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST	(1L<<18)	bnx2.h
23394	BNX2_EMAC_RXMAC_DEBUG2_SE_COUNT	(0xfL<<19)	bnx2.h
23395	BNX2_EMAC_RXMAC_DEBUG2_QUANTA	(0x1fL<<23)	bnx2.h
23396	BNX2_EMAC_RXMAC_DEBUG3	0x00001568	bnx2.h
23397	BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CT	(0xffffL<<0)	bnx2.h
23398	BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUS	(0xffffL<<16)	bnx2.h
23399	BNX2_EMAC_RXMAC_DEBUG4	0x0000156c	bnx2.h
23400	BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIE	(0xffffL<<0)	bnx2.h
23401	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3fL<<16)	bnx2.h
23402	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x0L<<16)	bnx2.h
23403	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1L<<16)	bnx2.h
23404	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2L<<16)	bnx2.h
23405	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x3L<<16)	bnx2.h
23406	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
23407	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x5L<<16)	bnx2.h
23408	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x6L<<16)	bnx2.h
23409	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x7L<<16)	bnx2.h
23410	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x8L<<16)	bnx2.h
23411	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x9L<<16)	bnx2.h
23412	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xaL<<16)	bnx2.h
23413	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xeL<<16)	bnx2.h
23414	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0xfL<<16)	bnx2.h
23415	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x10L<<16)	bnx2.h
23416	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x11L<<16)	bnx2.h
23417	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x12L<<16)	bnx2.h
23418	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x13L<<16)	bnx2.h
23419	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x14L<<16)	bnx2.h
23420	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x15L<<16)	bnx2.h
23421	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x16L<<16)	bnx2.h
23422	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x17L<<16)	bnx2.h
23423	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x18L<<16)	bnx2.h
23424	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x19L<<16)	bnx2.h
23425	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1aL<<16)	bnx2.h
23426	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1bL<<16)	bnx2.h
23427	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1cL<<16)	bnx2.h
23428	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1dL<<16)	bnx2.h
23429	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1eL<<16)	bnx2.h
23430	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x1fL<<16)	bnx2.h
23431	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x20L<<16)	bnx2.h
23432	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x21L<<16)	bnx2.h
23433	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x22L<<16)	bnx2.h
23434	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x23L<<16)	bnx2.h
23435	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x24L<<16)	bnx2.h
23436	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x25L<<16)	bnx2.h
23437	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x26L<<16)	bnx2.h
23438	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x27L<<16)	bnx2.h
23439	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x28L<<16)	bnx2.h
23440	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x29L<<16)	bnx2.h
23441	BNX2_EMAC_RXMAC_DEBUG4_FILT_STA	(0x2aL<<16)	bnx2.h
23442	BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT	(1L<<22)	bnx2.h
23443	BNX2_EMAC_RXMAC_DEBUG4_SLOT_FIL	(1L<<23)	bnx2.h
23444	BNX2_EMAC_RXMAC_DEBUG4_FALSE_CA	(1L<<24)	bnx2.h
23445	BNX2_EMAC_RXMAC_DEBUG4_LAST_DAT	(1L<<25)	bnx2.h
23446	BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUN	(1L<<26)	bnx2.h
23447	BNX2_EMAC_RXMAC_DEBUG4_ADVANCE	(1L<<27)	bnx2.h
23448	BNX2_EMAC_RXMAC_DEBUG4_START	(1L<<28)	bnx2.h
23449	BNX2_EMAC_RXMAC_DEBUG5	0x00001570	bnx2.h
23450	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0x7L<<0)	bnx2.h
23451	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(0L<<0)	bnx2.h
23452	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(1L<<0)	bnx2.h
23453	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(2L<<0)	bnx2.h
23454	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(3L<<0)	bnx2.h
23455	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(4L<<0)	bnx2.h
23456	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(5L<<0)	bnx2.h
23457	BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM	(6L<<0)	bnx2.h
23458	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
23459	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x0L<<4)	bnx2.h
23460	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x1L<<4)	bnx2.h
23461	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x2L<<4)	bnx2.h
23462	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x3L<<4)	bnx2.h
23463	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x4L<<4)	bnx2.h
23464	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x6L<<4)	bnx2.h
23465	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<4)	bnx2.h
23466	BNX2_EMAC_RXMAC_DEBUG5_EOF_DETE	(1L<<7)	bnx2.h
23467	BNX2_EMAC_RXMAC_DEBUG5_CCODE_BU	(0x7L<<8)	bnx2.h
23468	BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_	(1L<<11)	bnx2.h
23469	BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCO	(1L<<12)	bnx2.h
23470	BNX2_EMAC_RXMAC_DEBUG5_LOAD_DAT	(1L<<13)	bnx2.h
23471	BNX2_EMAC_RXMAC_DEBUG5_LOAD_STA	(1L<<14)	bnx2.h
23472	BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT	(1L<<15)	bnx2.h
23473	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(0x3L<<16)	bnx2.h
23474	BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_	(1L<<19)	bnx2.h
23475	BNX2_EMAC_RXMAC_DEBUG5_FMLEN	(0xfffL<<20)	bnx2.h
23476	BNX2_EMAC_RX_STAT_AC0	0x00001580	bnx2.h
23477	BNX2_EMAC_RX_STAT_AC1	0x00001584	bnx2.h
23478	BNX2_EMAC_RX_STAT_AC2	0x00001588	bnx2.h
23479	BNX2_EMAC_RX_STAT_AC3	0x0000158c	bnx2.h
23480	BNX2_EMAC_RX_STAT_AC4	0x00001590	bnx2.h
23481	BNX2_EMAC_RX_STAT_AC5	0x00001594	bnx2.h
23482	BNX2_EMAC_RX_STAT_AC6	0x00001598	bnx2.h
23483	BNX2_EMAC_RX_STAT_AC7	0x0000159c	bnx2.h
23484	BNX2_EMAC_RX_STAT_AC8	0x000015a0	bnx2.h
23485	BNX2_EMAC_RX_STAT_AC9	0x000015a4	bnx2.h
23486	BNX2_EMAC_RX_STAT_AC10	0x000015a8	bnx2.h
23487	BNX2_EMAC_RX_STAT_AC11	0x000015ac	bnx2.h
23488	BNX2_EMAC_RX_STAT_AC12	0x000015b0	bnx2.h
23489	BNX2_EMAC_RX_STAT_AC13	0x000015b4	bnx2.h
23490	BNX2_EMAC_RX_STAT_AC14	0x000015b8	bnx2.h
23491	BNX2_EMAC_RX_STAT_AC15	0x000015bc	bnx2.h
23492	BNX2_EMAC_RX_STAT_AC16	0x000015c0	bnx2.h
23493	BNX2_EMAC_RX_STAT_AC17	0x000015c4	bnx2.h
23494	BNX2_EMAC_RX_STAT_AC18	0x000015c8	bnx2.h
23495	BNX2_EMAC_RX_STAT_AC19	0x000015cc	bnx2.h
23496	BNX2_EMAC_RX_STAT_AC20	0x000015d0	bnx2.h
23497	BNX2_EMAC_RX_STAT_AC21	0x000015d4	bnx2.h
23498	BNX2_EMAC_RX_STAT_AC22	0x000015d8	bnx2.h
23499	BNX2_EMAC_RXMAC_SUC_DBG_OVERRUN	0x000015dc	bnx2.h
23500	BNX2_EMAC_TX_STAT_IFHCOUTOCTETS	0x00001600	bnx2.h
23501	BNX2_EMAC_TX_STAT_IFHCOUTBADOCT	0x00001604	bnx2.h
23502	BNX2_EMAC_TX_STAT_ETHERSTATSCOL	0x00001608	bnx2.h
23503	BNX2_EMAC_TX_STAT_OUTXONSENT	0x0000160c	bnx2.h
23504	BNX2_EMAC_TX_STAT_OUTXOFFSENT	0x00001610	bnx2.h
23505	BNX2_EMAC_TX_STAT_FLOWCONTROLDO	0x00001614	bnx2.h
23506	BNX2_EMAC_TX_STAT_DOT3STATSSING	0x00001618	bnx2.h
23507	BNX2_EMAC_TX_STAT_DOT3STATSMULT	0x0000161c	bnx2.h
23508	BNX2_EMAC_TX_STAT_DOT3STATSDEFE	0x00001620	bnx2.h
23509	BNX2_EMAC_TX_STAT_DOT3STATSEXCE	0x00001624	bnx2.h
23510	BNX2_EMAC_TX_STAT_DOT3STATSLATE	0x00001628	bnx2.h
23511	BNX2_EMAC_TX_STAT_IFHCOUTUCASTP	0x0000162c	bnx2.h
23512	BNX2_EMAC_TX_STAT_IFHCOUTMULTIC	0x00001630	bnx2.h
23513	BNX2_EMAC_TX_STAT_IFHCOUTBROADC	0x00001634	bnx2.h
23514	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001638	bnx2.h
23515	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000163c	bnx2.h
23516	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001640	bnx2.h
23517	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001644	bnx2.h
23518	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001648	bnx2.h
23519	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x0000164c	bnx2.h
23520	BNX2_EMAC_TX_STAT_ETHERSTATSPKT	0x00001650	bnx2.h
23521	BNX2_EMAC_TX_STAT_DOT3STATSINTE	0x00001654	bnx2.h
23522	BNX2_EMAC_TXMAC_DEBUG0	0x00001658	bnx2.h
23523	BNX2_EMAC_TXMAC_DEBUG1	0x0000165c	bnx2.h
23524	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0xfL<<0)	bnx2.h
23525	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x0L<<0)	bnx2.h
23526	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x1L<<0)	bnx2.h
23527	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x4L<<0)	bnx2.h
23528	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x5L<<0)	bnx2.h
23529	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x6L<<0)	bnx2.h
23530	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x7L<<0)	bnx2.h
23531	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x8L<<0)	bnx2.h
23532	BNX2_EMAC_TXMAC_DEBUG1_ODI_STAT	(0x9L<<0)	bnx2.h
23533	BNX2_EMAC_TXMAC_DEBUG1_CRS_ENAB	(1L<<4)	bnx2.h
23534	BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC	(1L<<5)	bnx2.h
23535	BNX2_EMAC_TXMAC_DEBUG1_SE_COUNT	(0xfL<<6)	bnx2.h
23536	BNX2_EMAC_TXMAC_DEBUG1_SEND_PAU	(1L<<10)	bnx2.h
23537	BNX2_EMAC_TXMAC_DEBUG1_LATE_COL	(1L<<11)	bnx2.h
23538	BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFE	(1L<<12)	bnx2.h
23539	BNX2_EMAC_TXMAC_DEBUG1_DEFERRED	(1L<<13)	bnx2.h
23540	BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE	(1L<<14)	bnx2.h
23541	BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME	(0xfL<<15)	bnx2.h
23542	BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIM	(0xffL<<19)	bnx2.h
23543	BNX2_EMAC_TXMAC_DEBUG2	0x00001660	bnx2.h
23544	BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF	(0x3ffL<<0)	bnx2.h
23545	BNX2_EMAC_TXMAC_DEBUG2_BYTE_COU	(0xffffL<<10)	bnx2.h
23546	BNX2_EMAC_TXMAC_DEBUG2_COL_COUN	(0x1fL<<26)	bnx2.h
23547	BNX2_EMAC_TXMAC_DEBUG2_COL_BIT	(1L<<31)	bnx2.h
23548	BNX2_EMAC_TXMAC_DEBUG3	0x00001664	bnx2.h
23549	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xfL<<0)	bnx2.h
23550	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x0L<<0)	bnx2.h
23551	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x1L<<0)	bnx2.h
23552	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x2L<<0)	bnx2.h
23553	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x3L<<0)	bnx2.h
23554	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x4L<<0)	bnx2.h
23555	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x5L<<0)	bnx2.h
23556	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x6L<<0)	bnx2.h
23557	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x7L<<0)	bnx2.h
23558	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x8L<<0)	bnx2.h
23559	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0x9L<<0)	bnx2.h
23560	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xaL<<0)	bnx2.h
23561	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xbL<<0)	bnx2.h
23562	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xcL<<0)	bnx2.h
23563	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xdL<<0)	bnx2.h
23564	BNX2_EMAC_TXMAC_DEBUG3_SM_STATE	(0xeL<<0)	bnx2.h
23565	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x7L<<4)	bnx2.h
23566	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x0L<<4)	bnx2.h
23567	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x1L<<4)	bnx2.h
23568	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x2L<<4)	bnx2.h
23569	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x3L<<4)	bnx2.h
23570	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x4L<<4)	bnx2.h
23571	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x5L<<4)	bnx2.h
23572	BNX2_EMAC_TXMAC_DEBUG3_FILT_STA	(0x6L<<4)	bnx2.h
23573	BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE	(1L<<7)	bnx2.h
23574	BNX2_EMAC_TXMAC_DEBUG3_XOFF	(1L<<8)	bnx2.h
23575	BNX2_EMAC_TXMAC_DEBUG3_SE_COUNT	(0xfL<<9)	bnx2.h
23576	BNX2_EMAC_TXMAC_DEBUG3_QUANTA_C	(0x1fL<<13)	bnx2.h
23577	BNX2_EMAC_TXMAC_DEBUG4	0x00001668	bnx2.h
23578	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_CO	(0xffffL<<0)	bnx2.h
23579	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xfL<<16)	bnx2.h
23580	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x0L<<16)	bnx2.h
23581	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x2L<<16)	bnx2.h
23582	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x3L<<16)	bnx2.h
23583	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x6L<<16)	bnx2.h
23584	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x7L<<16)	bnx2.h
23585	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x5L<<16)	bnx2.h
23586	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x4L<<16)	bnx2.h
23587	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xcL<<16)	bnx2.h
23588	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xeL<<16)	bnx2.h
23589	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xaL<<16)	bnx2.h
23590	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x8L<<16)	bnx2.h
23591	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0x9L<<16)	bnx2.h
23592	BNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST	(0xdL<<16)	bnx2.h
23593	BNX2_EMAC_TXMAC_DEBUG4_STATS0_V	(1L<<20)	bnx2.h
23594	BNX2_EMAC_TXMAC_DEBUG4_APPEND_C	(1L<<21)	bnx2.h
23595	BNX2_EMAC_TXMAC_DEBUG4_SLOT_FIL	(1L<<22)	bnx2.h
23596	BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFE	(1L<<23)	bnx2.h
23597	BNX2_EMAC_TXMAC_DEBUG4_SEND_EXT	(1L<<24)	bnx2.h
23598	BNX2_EMAC_TXMAC_DEBUG4_SEND_PAD	(1L<<25)	bnx2.h
23599	BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC	(1L<<26)	bnx2.h
23600	BNX2_EMAC_TXMAC_DEBUG4_COLLIDIN	(1L<<27)	bnx2.h
23601	BNX2_EMAC_TXMAC_DEBUG4_COL_IN	(1L<<28)	bnx2.h
23602	BNX2_EMAC_TXMAC_DEBUG4_BURSTING	(1L<<29)	bnx2.h
23603	BNX2_EMAC_TXMAC_DEBUG4_ADVANCE	(1L<<30)	bnx2.h
23604	BNX2_EMAC_TXMAC_DEBUG4_GO	(1L<<31)	bnx2.h
23605	BNX2_EMAC_TX_STAT_AC0	0x00001680	bnx2.h
23606	BNX2_EMAC_TX_STAT_AC1	0x00001684	bnx2.h
23607	BNX2_EMAC_TX_STAT_AC2	0x00001688	bnx2.h
23608	BNX2_EMAC_TX_STAT_AC3	0x0000168c	bnx2.h
23609	BNX2_EMAC_TX_STAT_AC4	0x00001690	bnx2.h
23610	BNX2_EMAC_TX_STAT_AC5	0x00001694	bnx2.h
23611	BNX2_EMAC_TX_STAT_AC6	0x00001698	bnx2.h
23612	BNX2_EMAC_TX_STAT_AC7	0x0000169c	bnx2.h
23613	BNX2_EMAC_TX_STAT_AC8	0x000016a0	bnx2.h
23614	BNX2_EMAC_TX_STAT_AC9	0x000016a4	bnx2.h
23615	BNX2_EMAC_TX_STAT_AC10	0x000016a8	bnx2.h
23616	BNX2_EMAC_TX_STAT_AC11	0x000016ac	bnx2.h
23617	BNX2_EMAC_TX_STAT_AC12	0x000016b0	bnx2.h
23618	BNX2_EMAC_TX_STAT_AC13	0x000016b4	bnx2.h
23619	BNX2_EMAC_TX_STAT_AC14	0x000016b8	bnx2.h
23620	BNX2_EMAC_TX_STAT_AC15	0x000016bc	bnx2.h
23621	BNX2_EMAC_TX_STAT_AC16	0x000016c0	bnx2.h
23622	BNX2_EMAC_TX_STAT_AC17	0x000016c4	bnx2.h
23623	BNX2_EMAC_TX_STAT_AC18	0x000016c8	bnx2.h
23624	BNX2_EMAC_TX_STAT_AC19	0x000016cc	bnx2.h
23625	BNX2_EMAC_TX_STAT_AC20	0x000016d0	bnx2.h
23626	BNX2_EMAC_TX_STAT_AC21	0x000016d4	bnx2.h
23627	BNX2_EMAC_TXMAC_SUC_DBG_OVERRUN	0x000016d8	bnx2.h
23628	BNX2_RPM_COMMAND	0x00001800	bnx2.h
23629	BNX2_RPM_COMMAND_ENABLED	(1L<<0)	bnx2.h
23630	BNX2_RPM_COMMAND_OVERRUN_ABORT	(1L<<4)	bnx2.h
23631	BNX2_RPM_STATUS	0x00001804	bnx2.h
23632	BNX2_RPM_STATUS_MBUF_WAIT	(1L<<0)	bnx2.h
23633	BNX2_RPM_STATUS_FREE_WAIT	(1L<<1)	bnx2.h
23634	BNX2_RPM_CONFIG	0x00001808	bnx2.h
23635	BNX2_RPM_CONFIG_NO_PSD_HDR_CKSU	(1L<<0)	bnx2.h
23636	BNX2_RPM_CONFIG_ACPI_ENA	(1L<<1)	bnx2.h
23637	BNX2_RPM_CONFIG_ACPI_KEEP	(1L<<2)	bnx2.h
23638	BNX2_RPM_CONFIG_MP_KEEP	(1L<<3)	bnx2.h
23639	BNX2_RPM_CONFIG_SORT_VECT_VAL	(0xfL<<4)	bnx2.h
23640	BNX2_RPM_CONFIG_IGNORE_VLAN	(1L<<31)	bnx2.h
23641	BNX2_RPM_VLAN_MATCH0	0x00001810	bnx2.h
23642	BNX2_RPM_VLAN_MATCH0_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
23643	BNX2_RPM_VLAN_MATCH1	0x00001814	bnx2.h
23644	BNX2_RPM_VLAN_MATCH1_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
23645	BNX2_RPM_VLAN_MATCH2	0x00001818	bnx2.h
23646	BNX2_RPM_VLAN_MATCH2_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
23647	BNX2_RPM_VLAN_MATCH3	0x0000181c	bnx2.h
23648	BNX2_RPM_VLAN_MATCH3_RPM_VLAN_M	(0xfffL<<0)	bnx2.h
23649	BNX2_RPM_SORT_USER0	0x00001820	bnx2.h
23650	BNX2_RPM_SORT_USER0_PM_EN	(0xffffL<<0)	bnx2.h
23651	BNX2_RPM_SORT_USER0_BC_EN	(1L<<16)	bnx2.h
23652	BNX2_RPM_SORT_USER0_MC_EN	(1L<<17)	bnx2.h
23653	BNX2_RPM_SORT_USER0_MC_HSH_EN	(1L<<18)	bnx2.h
23654	BNX2_RPM_SORT_USER0_PROM_EN	(1L<<19)	bnx2.h
23655	BNX2_RPM_SORT_USER0_VLAN_EN	(0xfL<<20)	bnx2.h
23656	BNX2_RPM_SORT_USER0_PROM_VLAN	(1L<<24)	bnx2.h
23657	BNX2_RPM_SORT_USER0_ENA	(1L<<31)	bnx2.h
23658	BNX2_RPM_SORT_USER1	0x00001824	bnx2.h
23659	BNX2_RPM_SORT_USER1_PM_EN	(0xffffL<<0)	bnx2.h
23660	BNX2_RPM_SORT_USER1_BC_EN	(1L<<16)	bnx2.h
23661	BNX2_RPM_SORT_USER1_MC_EN	(1L<<17)	bnx2.h
23662	BNX2_RPM_SORT_USER1_MC_HSH_EN	(1L<<18)	bnx2.h
23663	BNX2_RPM_SORT_USER1_PROM_EN	(1L<<19)	bnx2.h
23664	BNX2_RPM_SORT_USER1_VLAN_EN	(0xfL<<20)	bnx2.h
23665	BNX2_RPM_SORT_USER1_PROM_VLAN	(1L<<24)	bnx2.h
23666	BNX2_RPM_SORT_USER1_ENA	(1L<<31)	bnx2.h
23667	BNX2_RPM_SORT_USER2	0x00001828	bnx2.h
23668	BNX2_RPM_SORT_USER2_PM_EN	(0xffffL<<0)	bnx2.h
23669	BNX2_RPM_SORT_USER2_BC_EN	(1L<<16)	bnx2.h
23670	BNX2_RPM_SORT_USER2_MC_EN	(1L<<17)	bnx2.h
23671	BNX2_RPM_SORT_USER2_MC_HSH_EN	(1L<<18)	bnx2.h
23672	BNX2_RPM_SORT_USER2_PROM_EN	(1L<<19)	bnx2.h
23673	BNX2_RPM_SORT_USER2_VLAN_EN	(0xfL<<20)	bnx2.h
23674	BNX2_RPM_SORT_USER2_PROM_VLAN	(1L<<24)	bnx2.h
23675	BNX2_RPM_SORT_USER2_ENA	(1L<<31)	bnx2.h
23676	BNX2_RPM_SORT_USER3	0x0000182c	bnx2.h
23677	BNX2_RPM_SORT_USER3_PM_EN	(0xffffL<<0)	bnx2.h
23678	BNX2_RPM_SORT_USER3_BC_EN	(1L<<16)	bnx2.h
23679	BNX2_RPM_SORT_USER3_MC_EN	(1L<<17)	bnx2.h
23680	BNX2_RPM_SORT_USER3_MC_HSH_EN	(1L<<18)	bnx2.h
23681	BNX2_RPM_SORT_USER3_PROM_EN	(1L<<19)	bnx2.h
23682	BNX2_RPM_SORT_USER3_VLAN_EN	(0xfL<<20)	bnx2.h
23683	BNX2_RPM_SORT_USER3_PROM_VLAN	(1L<<24)	bnx2.h
23684	BNX2_RPM_SORT_USER3_ENA	(1L<<31)	bnx2.h
23685	BNX2_RPM_STAT_L2_FILTER_DISCARD	0x00001840	bnx2.h
23686	BNX2_RPM_STAT_RULE_CHECKER_DISC	0x00001844	bnx2.h
23687	BNX2_RPM_STAT_IFINFTQDISCARDS	0x00001848	bnx2.h
23688	BNX2_RPM_STAT_IFINMBUFDISCARD	0x0000184c	bnx2.h
23689	BNX2_RPM_STAT_RULE_CHECKER_P4_H	0x00001850	bnx2.h
23690	BNX2_RPM_STAT_AC0	0x00001880	bnx2.h
23691	BNX2_RPM_STAT_AC1	0x00001884	bnx2.h
23692	BNX2_RPM_STAT_AC2	0x00001888	bnx2.h
23693	BNX2_RPM_STAT_AC3	0x0000188c	bnx2.h
23694	BNX2_RPM_STAT_AC4	0x00001890	bnx2.h
23695	BNX2_RPM_RC_CNTL_0	0x00001900	bnx2.h
23696	BNX2_RPM_RC_CNTL_0_OFFSET	(0xffL<<0)	bnx2.h
23697	BNX2_RPM_RC_CNTL_0_CLASS	(0x7L<<8)	bnx2.h
23698	BNX2_RPM_RC_CNTL_0_PRIORITY	(1L<<11)	bnx2.h
23699	BNX2_RPM_RC_CNTL_0_P4	(1L<<12)	bnx2.h
23700	BNX2_RPM_RC_CNTL_0_HDR_TYPE	(0x7L<<13)	bnx2.h
23701	BNX2_RPM_RC_CNTL_0_HDR_TYPE_STA	(0L<<13)	bnx2.h
23702	BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP	(1L<<13)	bnx2.h
23703	BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP	(2L<<13)	bnx2.h
23704	BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP	(3L<<13)	bnx2.h
23705	BNX2_RPM_RC_CNTL_0_HDR_TYPE_DAT	(4L<<13)	bnx2.h
23706	BNX2_RPM_RC_CNTL_0_COMP	(0x3L<<16)	bnx2.h
23707	BNX2_RPM_RC_CNTL_0_COMP_EQUAL	(0L<<16)	bnx2.h
23708	BNX2_RPM_RC_CNTL_0_COMP_NEQUAL	(1L<<16)	bnx2.h
23709	BNX2_RPM_RC_CNTL_0_COMP_GREATER	(2L<<16)	bnx2.h
23710	BNX2_RPM_RC_CNTL_0_COMP_LESS	(3L<<16)	bnx2.h
23711	BNX2_RPM_RC_CNTL_0_SBIT	(1L<<19)	bnx2.h
23712	BNX2_RPM_RC_CNTL_0_CMDSEL	(0xfL<<20)	bnx2.h
23713	BNX2_RPM_RC_CNTL_0_MAP	(1L<<24)	bnx2.h
23714	BNX2_RPM_RC_CNTL_0_DISCARD	(1L<<25)	bnx2.h
23715	BNX2_RPM_RC_CNTL_0_MASK	(1L<<26)	bnx2.h
23716	BNX2_RPM_RC_CNTL_0_P1	(1L<<27)	bnx2.h
23717	BNX2_RPM_RC_CNTL_0_P2	(1L<<28)	bnx2.h
23718	BNX2_RPM_RC_CNTL_0_P3	(1L<<29)	bnx2.h
23719	BNX2_RPM_RC_CNTL_0_NBIT	(1L<<30)	bnx2.h
23720	BNX2_RPM_RC_VALUE_MASK_0	0x00001904	bnx2.h
23721	BNX2_RPM_RC_VALUE_MASK_0_VALUE	(0xffffL<<0)	bnx2.h
23722	BNX2_RPM_RC_VALUE_MASK_0_MASK	(0xffffL<<16)	bnx2.h
23723	BNX2_RPM_RC_CNTL_1	0x00001908	bnx2.h
23724	BNX2_RPM_RC_CNTL_1_A	(0x3ffffL<<0)	bnx2.h
23725	BNX2_RPM_RC_CNTL_1_B	(0xfffL<<19)	bnx2.h
23726	BNX2_RPM_RC_VALUE_MASK_1	0x0000190c	bnx2.h
23727	BNX2_RPM_RC_CNTL_2	0x00001910	bnx2.h
23728	BNX2_RPM_RC_CNTL_2_A	(0x3ffffL<<0)	bnx2.h
23729	BNX2_RPM_RC_CNTL_2_B	(0xfffL<<19)	bnx2.h
23730	BNX2_RPM_RC_VALUE_MASK_2	0x00001914	bnx2.h
23731	BNX2_RPM_RC_CNTL_3	0x00001918	bnx2.h
23732	BNX2_RPM_RC_CNTL_3_A	(0x3ffffL<<0)	bnx2.h
23733	BNX2_RPM_RC_CNTL_3_B	(0xfffL<<19)	bnx2.h
23734	BNX2_RPM_RC_VALUE_MASK_3	0x0000191c	bnx2.h
23735	BNX2_RPM_RC_CNTL_4	0x00001920	bnx2.h
23736	BNX2_RPM_RC_CNTL_4_A	(0x3ffffL<<0)	bnx2.h
23737	BNX2_RPM_RC_CNTL_4_B	(0xfffL<<19)	bnx2.h
23738	BNX2_RPM_RC_VALUE_MASK_4	0x00001924	bnx2.h
23739	BNX2_RPM_RC_CNTL_5	0x00001928	bnx2.h
23740	BNX2_RPM_RC_CNTL_5_A	(0x3ffffL<<0)	bnx2.h
23741	BNX2_RPM_RC_CNTL_5_B	(0xfffL<<19)	bnx2.h
23742	BNX2_RPM_RC_VALUE_MASK_5	0x0000192c	bnx2.h
23743	BNX2_RPM_RC_CNTL_6	0x00001930	bnx2.h
23744	BNX2_RPM_RC_CNTL_6_A	(0x3ffffL<<0)	bnx2.h
23745	BNX2_RPM_RC_CNTL_6_B	(0xfffL<<19)	bnx2.h
23746	BNX2_RPM_RC_VALUE_MASK_6	0x00001934	bnx2.h
23747	BNX2_RPM_RC_CNTL_7	0x00001938	bnx2.h
23748	BNX2_RPM_RC_CNTL_7_A	(0x3ffffL<<0)	bnx2.h
23749	BNX2_RPM_RC_CNTL_7_B	(0xfffL<<19)	bnx2.h
23750	BNX2_RPM_RC_VALUE_MASK_7	0x0000193c	bnx2.h
23751	BNX2_RPM_RC_CNTL_8	0x00001940	bnx2.h
23752	BNX2_RPM_RC_CNTL_8_A	(0x3ffffL<<0)	bnx2.h
23753	BNX2_RPM_RC_CNTL_8_B	(0xfffL<<19)	bnx2.h
23754	BNX2_RPM_RC_VALUE_MASK_8	0x00001944	bnx2.h
23755	BNX2_RPM_RC_CNTL_9	0x00001948	bnx2.h
23756	BNX2_RPM_RC_CNTL_9_A	(0x3ffffL<<0)	bnx2.h
23757	BNX2_RPM_RC_CNTL_9_B	(0xfffL<<19)	bnx2.h
23758	BNX2_RPM_RC_VALUE_MASK_9	0x0000194c	bnx2.h
23759	BNX2_RPM_RC_CNTL_10	0x00001950	bnx2.h
23760	BNX2_RPM_RC_CNTL_10_A	(0x3ffffL<<0)	bnx2.h
23761	BNX2_RPM_RC_CNTL_10_B	(0xfffL<<19)	bnx2.h
23762	BNX2_RPM_RC_VALUE_MASK_10	0x00001954	bnx2.h
23763	BNX2_RPM_RC_CNTL_11	0x00001958	bnx2.h
23764	BNX2_RPM_RC_CNTL_11_A	(0x3ffffL<<0)	bnx2.h
23765	BNX2_RPM_RC_CNTL_11_B	(0xfffL<<19)	bnx2.h
23766	BNX2_RPM_RC_VALUE_MASK_11	0x0000195c	bnx2.h
23767	BNX2_RPM_RC_CNTL_12	0x00001960	bnx2.h
23768	BNX2_RPM_RC_CNTL_12_A	(0x3ffffL<<0)	bnx2.h
23769	BNX2_RPM_RC_CNTL_12_B	(0xfffL<<19)	bnx2.h
23770	BNX2_RPM_RC_VALUE_MASK_12	0x00001964	bnx2.h
23771	BNX2_RPM_RC_CNTL_13	0x00001968	bnx2.h
23772	BNX2_RPM_RC_CNTL_13_A	(0x3ffffL<<0)	bnx2.h
23773	BNX2_RPM_RC_CNTL_13_B	(0xfffL<<19)	bnx2.h
23774	BNX2_RPM_RC_VALUE_MASK_13	0x0000196c	bnx2.h
23775	BNX2_RPM_RC_CNTL_14	0x00001970	bnx2.h
23776	BNX2_RPM_RC_CNTL_14_A	(0x3ffffL<<0)	bnx2.h
23777	BNX2_RPM_RC_CNTL_14_B	(0xfffL<<19)	bnx2.h
23778	BNX2_RPM_RC_VALUE_MASK_14	0x00001974	bnx2.h
23779	BNX2_RPM_RC_CNTL_15	0x00001978	bnx2.h
23780	BNX2_RPM_RC_CNTL_15_A	(0x3ffffL<<0)	bnx2.h
23781	BNX2_RPM_RC_CNTL_15_B	(0xfffL<<19)	bnx2.h
23782	BNX2_RPM_RC_VALUE_MASK_15	0x0000197c	bnx2.h
23783	BNX2_RPM_RC_CONFIG	0x00001980	bnx2.h
23784	BNX2_RPM_RC_CONFIG_RULE_ENABLE	(0xffffL<<0)	bnx2.h
23785	BNX2_RPM_RC_CONFIG_DEF_CLASS	(0x7L<<24)	bnx2.h
23786	BNX2_RPM_DEBUG0	0x00001984	bnx2.h
23787	BNX2_RPM_DEBUG0_FM_BCNT	(0xffffL<<0)	bnx2.h
23788	BNX2_RPM_DEBUG0_T_DATA_OFST_VLD	(1L<<16)	bnx2.h
23789	BNX2_RPM_DEBUG0_T_UDP_OFST_VLD	(1L<<17)	bnx2.h
23790	BNX2_RPM_DEBUG0_T_TCP_OFST_VLD	(1L<<18)	bnx2.h
23791	BNX2_RPM_DEBUG0_T_IP_OFST_VLD	(1L<<19)	bnx2.h
23792	BNX2_RPM_DEBUG0_IP_MORE_FRGMT	(1L<<20)	bnx2.h
23793	BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP	(1L<<21)	bnx2.h
23794	BNX2_RPM_DEBUG0_LLC_SNAP	(1L<<22)	bnx2.h
23795	BNX2_RPM_DEBUG0_FM_STARTED	(1L<<23)	bnx2.h
23796	BNX2_RPM_DEBUG0_DONE	(1L<<24)	bnx2.h
23797	BNX2_RPM_DEBUG0_WAIT_4_DONE	(1L<<25)	bnx2.h
23798	BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM	(1L<<26)	bnx2.h
23799	BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_C	(1L<<27)	bnx2.h
23800	BNX2_RPM_DEBUG0_IGNORE_VLAN	(1L<<28)	bnx2.h
23801	BNX2_RPM_DEBUG0_RP_ENA_ACTIVE	(1L<<31)	bnx2.h
23802	BNX2_RPM_DEBUG1	0x00001988	bnx2.h
23803	BNX2_RPM_DEBUG1_FSM_CUR_ST	(0xffffL<<0)	bnx2.h
23804	BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE	(0L<<0)	bnx2.h
23805	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(1L<<0)	bnx2.h
23806	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(2L<<0)	bnx2.h
23807	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(4L<<0)	bnx2.h
23808	BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP	(8L<<0)	bnx2.h
23809	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_S	(16L<<0)	bnx2.h
23810	BNX2_RPM_DEBUG1_FSM_CUR_ST_IP	(32L<<0)	bnx2.h
23811	BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP	(64L<<0)	bnx2.h
23812	BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP	(128L<<0)	bnx2.h
23813	BNX2_RPM_DEBUG1_FSM_CUR_ST_AH	(256L<<0)	bnx2.h
23814	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP	(512L<<0)	bnx2.h
23815	BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_	(1024L<<0)	bnx2.h
23816	BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA	(2048L<<0)	bnx2.h
23817	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x2000L<<0)	bnx2.h
23818	BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_	(0x4000L<<0)	bnx2.h
23819	BNX2_RPM_DEBUG1_FSM_CUR_ST_LATC	(0x8000L<<0)	bnx2.h
23820	BNX2_RPM_DEBUG1_HDR_BCNT	(0x7ffL<<16)	bnx2.h
23821	BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D	(1L<<28)	bnx2.h
23822	BNX2_RPM_DEBUG1_VLAN_REMOVED_D2	(1L<<29)	bnx2.h
23823	BNX2_RPM_DEBUG1_VLAN_REMOVED_D1	(1L<<30)	bnx2.h
23824	BNX2_RPM_DEBUG1_EOF_0XTRA_WD	(1L<<31)	bnx2.h
23825	BNX2_RPM_DEBUG2	0x0000198c	bnx2.h
23826	BNX2_RPM_DEBUG2_CMD_HIT_VEC	(0xffffL<<0)	bnx2.h
23827	BNX2_RPM_DEBUG2_IP_BCNT	(0xffL<<16)	bnx2.h
23828	BNX2_RPM_DEBUG2_THIS_CMD_M4	(1L<<24)	bnx2.h
23829	BNX2_RPM_DEBUG2_THIS_CMD_M3	(1L<<25)	bnx2.h
23830	BNX2_RPM_DEBUG2_THIS_CMD_M2	(1L<<26)	bnx2.h
23831	BNX2_RPM_DEBUG2_THIS_CMD_M1	(1L<<27)	bnx2.h
23832	BNX2_RPM_DEBUG2_IPIPE_EMPTY	(1L<<28)	bnx2.h
23833	BNX2_RPM_DEBUG2_FM_DISCARD	(1L<<29)	bnx2.h
23834	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<30)	bnx2.h
23835	BNX2_RPM_DEBUG2_LAST_RULE_IN_FM	(1L<<31)	bnx2.h
23836	BNX2_RPM_DEBUG3	0x00001990	bnx2.h
23837	BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR	(0x1ffL<<0)	bnx2.h
23838	BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_RE	(1L<<9)	bnx2.h
23839	BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAS	(1L<<10)	bnx2.h
23840	BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ	(1L<<11)	bnx2.h
23841	BNX2_RPM_DEBUG3_RDE_RBUF_FREE_R	(1L<<12)	bnx2.h
23842	BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_	(1L<<13)	bnx2.h
23843	BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAV	(1L<<14)	bnx2.h
23844	BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DR	(1L<<15)	bnx2.h
23845	BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY	(0xfL<<16)	bnx2.h
23846	BNX2_RPM_DEBUG3_RDE_SRC_FIFO_AL	(1L<<21)	bnx2.h
23847	BNX2_RPM_DEBUG3_DROP_NXT_VLD	(1L<<22)	bnx2.h
23848	BNX2_RPM_DEBUG3_DROP_NXT	(1L<<23)	bnx2.h
23849	BNX2_RPM_DEBUG3_FTQ_FSM	(0x3L<<24)	bnx2.h
23850	BNX2_RPM_DEBUG3_FTQ_FSM_IDLE	(0x0L<<24)	bnx2.h
23851	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_AC	(0x1L<<24)	bnx2.h
23852	BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FR	(0x2L<<24)	bnx2.h
23853	BNX2_RPM_DEBUG3_MBWRITE_FSM	(0x3L<<26)	bnx2.h
23854	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x0L<<26)	bnx2.h
23855	BNX2_RPM_DEBUG3_MBWRITE_FSM_GET	(0x1L<<26)	bnx2.h
23856	BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA	(0x2L<<26)	bnx2.h
23857	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x3L<<26)	bnx2.h
23858	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x4L<<26)	bnx2.h
23859	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x5L<<26)	bnx2.h
23860	BNX2_RPM_DEBUG3_MBWRITE_FSM_WAI	(0x6L<<26)	bnx2.h
23861	BNX2_RPM_DEBUG3_MBWRITE_FSM_DON	(0x7L<<26)	bnx2.h
23862	BNX2_RPM_DEBUG3_MBFREE_FSM	(1L<<29)	bnx2.h
23863	BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE	(0L<<29)	bnx2.h
23864	BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT	(1L<<29)	bnx2.h
23865	BNX2_RPM_DEBUG3_MBALLOC_FSM	(1L<<30)	bnx2.h
23866	BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_	(0x0L<<30)	bnx2.h
23867	BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE	(0x1L<<30)	bnx2.h
23868	BNX2_RPM_DEBUG3_CCODE_EOF_ERROR	(1L<<31)	bnx2.h
23869	BNX2_RPM_DEBUG4	0x00001994	bnx2.h
23870	BNX2_RPM_DEBUG4_DFSM_MBUF_CLUST	(0x1ffffffL<<0)	bnx2.h
23871	BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE	(0x7L<<25)	bnx2.h
23872	BNX2_RPM_DEBUG4_MBWRITE_FSM	(0x7L<<28)	bnx2.h
23873	BNX2_RPM_DEBUG4_DFIFO_EMPTY	(1L<<31)	bnx2.h
23874	BNX2_RPM_DEBUG5	0x00001998	bnx2.h
23875	BNX2_RPM_DEBUG5_RDROP_WPTR	(0x1fL<<0)	bnx2.h
23876	BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR	(0x1fL<<5)	bnx2.h
23877	BNX2_RPM_DEBUG5_RDROP_MC_RPTR	(0x1fL<<10)	bnx2.h
23878	BNX2_RPM_DEBUG5_RDROP_RC_RPTR	(0x1fL<<15)	bnx2.h
23879	BNX2_RPM_DEBUG5_RDROP_ACPI_EMPT	(1L<<20)	bnx2.h
23880	BNX2_RPM_DEBUG5_RDROP_MC_EMPTY	(1L<<21)	bnx2.h
23881	BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_	(1L<<22)	bnx2.h
23882	BNX2_RPM_DEBUG5_HOLDREG_WOL_DRO	(1L<<23)	bnx2.h
23883	BNX2_RPM_DEBUG5_HOLDREG_DISCARD	(1L<<24)	bnx2.h
23884	BNX2_RPM_DEBUG5_HOLDREG_MBUF_NO	(1L<<25)	bnx2.h
23885	BNX2_RPM_DEBUG5_HOLDREG_MC_EMPT	(1L<<26)	bnx2.h
23886	BNX2_RPM_DEBUG5_HOLDREG_RC_EMPT	(1L<<27)	bnx2.h
23887	BNX2_RPM_DEBUG5_HOLDREG_FC_EMPT	(1L<<28)	bnx2.h
23888	BNX2_RPM_DEBUG5_HOLDREG_ACPI_EM	(1L<<29)	bnx2.h
23889	BNX2_RPM_DEBUG5_HOLDREG_FULL_T	(1L<<30)	bnx2.h
23890	BNX2_RPM_DEBUG5_HOLDREG_RD	(1L<<31)	bnx2.h
23891	BNX2_RPM_DEBUG6	0x0000199c	bnx2.h
23892	BNX2_RPM_DEBUG6_ACPI_VEC	(0xffffL<<0)	bnx2.h
23893	BNX2_RPM_DEBUG6_VEC	(0xffffL<<16)	bnx2.h
23894	BNX2_RPM_DEBUG7	0x000019a0	bnx2.h
23895	BNX2_RPM_DEBUG7_RPM_DBG7_LAST_C	(0xffffffffL<<0)	bnx2.h
23896	BNX2_RPM_DEBUG8	0x000019a4	bnx2.h
23897	BNX2_RPM_DEBUG8_PS_ACPI_FSM	(0xfL<<0)	bnx2.h
23898	BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDL	(0L<<0)	bnx2.h
23899	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(1L<<0)	bnx2.h
23900	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(2L<<0)	bnx2.h
23901	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(3L<<0)	bnx2.h
23902	BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF	(4L<<0)	bnx2.h
23903	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(5L<<0)	bnx2.h
23904	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_	(6L<<0)	bnx2.h
23905	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_	(7L<<0)	bnx2.h
23906	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_	(8L<<0)	bnx2.h
23907	BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_	(9L<<0)	bnx2.h
23908	BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAI	(10L<<0)	bnx2.h
23909	BNX2_RPM_DEBUG8_COMPARE_AT_W0	(1L<<4)	bnx2.h
23910	BNX2_RPM_DEBUG8_COMPARE_AT_W3_D	(1L<<5)	bnx2.h
23911	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<6)	bnx2.h
23912	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<7)	bnx2.h
23913	BNX2_RPM_DEBUG8_COMPARE_AT_SOF_	(1L<<8)	bnx2.h
23914	BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLD	(1L<<9)	bnx2.h
23915	BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLD	(1L<<10)	bnx2.h
23916	BNX2_RPM_DEBUG8_NXT_EOF_W_12_VL	(1L<<11)	bnx2.h
23917	BNX2_RPM_DEBUG8_EOF_DET	(1L<<12)	bnx2.h
23918	BNX2_RPM_DEBUG8_SOF_DET	(1L<<13)	bnx2.h
23919	BNX2_RPM_DEBUG8_WAIT_4_SOF	(1L<<14)	bnx2.h
23920	BNX2_RPM_DEBUG8_ALL_DONE	(1L<<15)	bnx2.h
23921	BNX2_RPM_DEBUG8_THBUF_ADDR	(0x7fL<<16)	bnx2.h
23922	BNX2_RPM_DEBUG8_BYTE_CTR	(0xffL<<24)	bnx2.h
23923	BNX2_RPM_DEBUG9	0x000019a8	bnx2.h
23924	BNX2_RPM_DEBUG9_OUTFIFO_COUNT	(0x7L<<0)	bnx2.h
23925	BNX2_RPM_DEBUG9_RDE_ACPI_RDY	(1L<<3)	bnx2.h
23926	BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT	(0x7L<<4)	bnx2.h
23927	BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN	(1L<<28)	bnx2.h
23928	BNX2_RPM_DEBUG9_INFIFO_OVERRUN_	(1L<<29)	bnx2.h
23929	BNX2_RPM_DEBUG9_ACPI_MATCH_INT	(1L<<30)	bnx2.h
23930	BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN	(1L<<31)	bnx2.h
23931	BNX2_RPM_ACPI_DBG_BUF_W00	0x000019c0	bnx2.h
23932	BNX2_RPM_ACPI_DBG_BUF_W01	0x000019c4	bnx2.h
23933	BNX2_RPM_ACPI_DBG_BUF_W02	0x000019c8	bnx2.h
23934	BNX2_RPM_ACPI_DBG_BUF_W03	0x000019cc	bnx2.h
23935	BNX2_RPM_ACPI_DBG_BUF_W10	0x000019d0	bnx2.h
23936	BNX2_RPM_ACPI_DBG_BUF_W11	0x000019d4	bnx2.h
23937	BNX2_RPM_ACPI_DBG_BUF_W12	0x000019d8	bnx2.h
23938	BNX2_RPM_ACPI_DBG_BUF_W13	0x000019dc	bnx2.h
23939	BNX2_RPM_ACPI_DBG_BUF_W20	0x000019e0	bnx2.h
23940	BNX2_RPM_ACPI_DBG_BUF_W21	0x000019e4	bnx2.h
23941	BNX2_RPM_ACPI_DBG_BUF_W22	0x000019e8	bnx2.h
23942	BNX2_RPM_ACPI_DBG_BUF_W23	0x000019ec	bnx2.h
23943	BNX2_RPM_ACPI_DBG_BUF_W30	0x000019f0	bnx2.h
23944	BNX2_RPM_ACPI_DBG_BUF_W31	0x000019f4	bnx2.h
23945	BNX2_RPM_ACPI_DBG_BUF_W32	0x000019f8	bnx2.h
23946	BNX2_RPM_ACPI_DBG_BUF_W33	0x000019fc	bnx2.h
23947	BNX2_RBUF_COMMAND	0x00200000	bnx2.h
23948	BNX2_RBUF_COMMAND_ENABLED	(1L<<0)	bnx2.h
23949	BNX2_RBUF_COMMAND_FREE_INIT	(1L<<1)	bnx2.h
23950	BNX2_RBUF_COMMAND_RAM_INIT	(1L<<2)	bnx2.h
23951	BNX2_RBUF_COMMAND_OVER_FREE	(1L<<4)	bnx2.h
23952	BNX2_RBUF_COMMAND_ALLOC_REQ	(1L<<5)	bnx2.h
23953	BNX2_RBUF_STATUS1	0x00200004	bnx2.h
23954	BNX2_RBUF_STATUS1_FREE_COUNT	(0x3ffL<<0)	bnx2.h
23955	BNX2_RBUF_STATUS2	0x00200008	bnx2.h
23956	BNX2_RBUF_STATUS2_FREE_TAIL	(0x3ffL<<0)	bnx2.h
23957	BNX2_RBUF_STATUS2_FREE_HEAD	(0x3ffL<<16)	bnx2.h
23958	BNX2_RBUF_CONFIG	0x0020000c	bnx2.h
23959	BNX2_RBUF_CONFIG_XOFF_TRIP	(0x3ffL<<0)	bnx2.h
23960	BNX2_RBUF_CONFIG_XON_TRIP	(0x3ffL<<16)	bnx2.h
23961	BNX2_RBUF_FW_BUF_ALLOC	0x00200010	bnx2.h
23962	BNX2_RBUF_FW_BUF_ALLOC_VALUE	(0x1ffL<<7)	bnx2.h
23963	BNX2_RBUF_FW_BUF_FREE	0x00200014	bnx2.h
23964	BNX2_RBUF_FW_BUF_FREE_COUNT	(0x7fL<<0)	bnx2.h
23965	BNX2_RBUF_FW_BUF_FREE_TAIL	(0x1ffL<<7)	bnx2.h
23966	BNX2_RBUF_FW_BUF_FREE_HEAD	(0x1ffL<<16)	bnx2.h
23967	BNX2_RBUF_FW_BUF_SEL	0x00200018	bnx2.h
23968	BNX2_RBUF_FW_BUF_SEL_COUNT	(0x7fL<<0)	bnx2.h
23969	BNX2_RBUF_FW_BUF_SEL_TAIL	(0x1ffL<<7)	bnx2.h
23970	BNX2_RBUF_FW_BUF_SEL_HEAD	(0x1ffL<<16)	bnx2.h
23971	BNX2_RBUF_CONFIG2	0x0020001c	bnx2.h
23972	BNX2_RBUF_CONFIG2_MAC_DROP_TRIP	(0x3ffL<<0)	bnx2.h
23973	BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
23974	BNX2_RBUF_CONFIG3	0x00200020	bnx2.h
23975	BNX2_RBUF_CONFIG3_CU_DROP_TRIP	(0x3ffL<<0)	bnx2.h
23976	BNX2_RBUF_CONFIG3_CU_KEEP_TRIP	(0x3ffL<<16)	bnx2.h
23977	BNX2_RBUF_PKT_DATA	0x00208000	bnx2.h
23978	BNX2_RBUF_CLIST_DATA	0x00210000	bnx2.h
23979	BNX2_RBUF_BUF_DATA	0x00220000	bnx2.h
23980	BNX2_RV2P_COMMAND	0x00002800	bnx2.h
23981	BNX2_RV2P_COMMAND_ENABLED	(1L<<0)	bnx2.h
23982	BNX2_RV2P_COMMAND_PROC1_INTRPT	(1L<<1)	bnx2.h
23983	BNX2_RV2P_COMMAND_PROC2_INTRPT	(1L<<2)	bnx2.h
23984	BNX2_RV2P_COMMAND_ABORT0	(1L<<4)	bnx2.h
23985	BNX2_RV2P_COMMAND_ABORT1	(1L<<5)	bnx2.h
23986	BNX2_RV2P_COMMAND_ABORT2	(1L<<6)	bnx2.h
23987	BNX2_RV2P_COMMAND_ABORT3	(1L<<7)	bnx2.h
23988	BNX2_RV2P_COMMAND_ABORT4	(1L<<8)	bnx2.h
23989	BNX2_RV2P_COMMAND_ABORT5	(1L<<9)	bnx2.h
23990	BNX2_RV2P_COMMAND_PROC1_RESET	(1L<<16)	bnx2.h
23991	BNX2_RV2P_COMMAND_PROC2_RESET	(1L<<17)	bnx2.h
23992	BNX2_RV2P_COMMAND_CTXIF_RESET	(1L<<18)	bnx2.h
23993	BNX2_RV2P_STATUS	0x00002804	bnx2.h
23994	BNX2_RV2P_STATUS_ALWAYS_0	(1L<<0)	bnx2.h
23995	BNX2_RV2P_STATUS_RV2P_GEN_STAT0	(1L<<8)	bnx2.h
23996	BNX2_RV2P_STATUS_RV2P_GEN_STAT1	(1L<<9)	bnx2.h
23997	BNX2_RV2P_STATUS_RV2P_GEN_STAT2	(1L<<10)	bnx2.h
23998	BNX2_RV2P_STATUS_RV2P_GEN_STAT3	(1L<<11)	bnx2.h
23999	BNX2_RV2P_STATUS_RV2P_GEN_STAT4	(1L<<12)	bnx2.h
24000	BNX2_RV2P_STATUS_RV2P_GEN_STAT5	(1L<<13)	bnx2.h
24001	BNX2_RV2P_CONFIG	0x00002808	bnx2.h
24002	BNX2_RV2P_CONFIG_STALL_PROC1	(1L<<0)	bnx2.h
24003	BNX2_RV2P_CONFIG_STALL_PROC2	(1L<<1)	bnx2.h
24004	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<8)	bnx2.h
24005	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<9)	bnx2.h
24006	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<10)	bnx2.h
24007	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<11)	bnx2.h
24008	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<12)	bnx2.h
24009	BNX2_RV2P_CONFIG_PROC1_STALL_ON	(1L<<13)	bnx2.h
24010	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<16)	bnx2.h
24011	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<17)	bnx2.h
24012	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<18)	bnx2.h
24013	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<19)	bnx2.h
24014	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<20)	bnx2.h
24015	BNX2_RV2P_CONFIG_PROC2_STALL_ON	(1L<<21)	bnx2.h
24016	BNX2_RV2P_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
24017	BNX2_RV2P_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
24018	BNX2_RV2P_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
24019	BNX2_RV2P_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
24020	BNX2_RV2P_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
24021	BNX2_RV2P_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
24022	BNX2_RV2P_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
24023	BNX2_RV2P_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
24024	BNX2_RV2P_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
24025	BNX2_RV2P_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
24026	BNX2_RV2P_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
24027	BNX2_RV2P_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
24028	BNX2_RV2P_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
24029	BNX2_RV2P_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
24030	BNX2_RV2P_GEN_BFR_ADDR_0	0x00002810	bnx2.h
24031	BNX2_RV2P_GEN_BFR_ADDR_0_VALUE	(0xffffL<<16)	bnx2.h
24032	BNX2_RV2P_GEN_BFR_ADDR_1	0x00002814	bnx2.h
24033	BNX2_RV2P_GEN_BFR_ADDR_1_VALUE	(0xffffL<<16)	bnx2.h
24034	BNX2_RV2P_GEN_BFR_ADDR_2	0x00002818	bnx2.h
24035	BNX2_RV2P_GEN_BFR_ADDR_2_VALUE	(0xffffL<<16)	bnx2.h
24036	BNX2_RV2P_GEN_BFR_ADDR_3	0x0000281c	bnx2.h
24037	BNX2_RV2P_GEN_BFR_ADDR_3_VALUE	(0xffffL<<16)	bnx2.h
24038	BNX2_RV2P_INSTR_HIGH	0x00002830	bnx2.h
24039	BNX2_RV2P_INSTR_HIGH_HIGH	(0x1fL<<0)	bnx2.h
24040	BNX2_RV2P_INSTR_LOW	0x00002834	bnx2.h
24041	BNX2_RV2P_PROC1_ADDR_CMD	0x00002838	bnx2.h
24042	BNX2_RV2P_PROC1_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
24043	BNX2_RV2P_PROC1_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
24044	BNX2_RV2P_PROC2_ADDR_CMD	0x0000283c	bnx2.h
24045	BNX2_RV2P_PROC2_ADDR_CMD_ADD	(0x3ffL<<0)	bnx2.h
24046	BNX2_RV2P_PROC2_ADDR_CMD_RDWR	(1L<<31)	bnx2.h
24047	BNX2_RV2P_PROC1_GRC_DEBUG	0x00002840	bnx2.h
24048	BNX2_RV2P_PROC2_GRC_DEBUG	0x00002844	bnx2.h
24049	BNX2_RV2P_GRC_PROC_DEBUG	0x00002848	bnx2.h
24050	BNX2_RV2P_DEBUG_VECT_PEEK	0x0000284c	bnx2.h
24051	BNX2_RV2P_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
24052	BNX2_RV2P_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
24053	BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
24054	BNX2_RV2P_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
24055	BNX2_RV2P_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
24056	BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
24057	BNX2_RV2P_PFTQ_DATA	0x00002b40	bnx2.h
24058	BNX2_RV2P_PFTQ_CMD	0x00002b78	bnx2.h
24059	BNX2_RV2P_PFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24060	BNX2_RV2P_PFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24061	BNX2_RV2P_PFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24062	BNX2_RV2P_PFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24063	BNX2_RV2P_PFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24064	BNX2_RV2P_PFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24065	BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24066	BNX2_RV2P_PFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24067	BNX2_RV2P_PFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
24068	BNX2_RV2P_PFTQ_CMD_POP	(1L<<30)	bnx2.h
24069	BNX2_RV2P_PFTQ_CMD_BUSY	(1L<<31)	bnx2.h
24070	BNX2_RV2P_PFTQ_CTL	0x00002b7c	bnx2.h
24071	BNX2_RV2P_PFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24072	BNX2_RV2P_PFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24073	BNX2_RV2P_PFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
24074	BNX2_RV2P_PFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24075	BNX2_RV2P_PFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24076	BNX2_RV2P_TFTQ_DATA	0x00002b80	bnx2.h
24077	BNX2_RV2P_TFTQ_CMD	0x00002bb8	bnx2.h
24078	BNX2_RV2P_TFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24079	BNX2_RV2P_TFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24080	BNX2_RV2P_TFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24081	BNX2_RV2P_TFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24082	BNX2_RV2P_TFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24083	BNX2_RV2P_TFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24084	BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24085	BNX2_RV2P_TFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24086	BNX2_RV2P_TFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
24087	BNX2_RV2P_TFTQ_CMD_POP	(1L<<30)	bnx2.h
24088	BNX2_RV2P_TFTQ_CMD_BUSY	(1L<<31)	bnx2.h
24089	BNX2_RV2P_TFTQ_CTL	0x00002bbc	bnx2.h
24090	BNX2_RV2P_TFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24091	BNX2_RV2P_TFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24092	BNX2_RV2P_TFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
24093	BNX2_RV2P_TFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24094	BNX2_RV2P_TFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24095	BNX2_RV2P_MFTQ_DATA	0x00002bc0	bnx2.h
24096	BNX2_RV2P_MFTQ_CMD	0x00002bf8	bnx2.h
24097	BNX2_RV2P_MFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24098	BNX2_RV2P_MFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24099	BNX2_RV2P_MFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24100	BNX2_RV2P_MFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24101	BNX2_RV2P_MFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24102	BNX2_RV2P_MFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24103	BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24104	BNX2_RV2P_MFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24105	BNX2_RV2P_MFTQ_CMD_INTERVENE_CL	(1L<<29)	bnx2.h
24106	BNX2_RV2P_MFTQ_CMD_POP	(1L<<30)	bnx2.h
24107	BNX2_RV2P_MFTQ_CMD_BUSY	(1L<<31)	bnx2.h
24108	BNX2_RV2P_MFTQ_CTL	0x00002bfc	bnx2.h
24109	BNX2_RV2P_MFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24110	BNX2_RV2P_MFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24111	BNX2_RV2P_MFTQ_CTL_FORCE_INTERV	(1L<<2)	bnx2.h
24112	BNX2_RV2P_MFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24113	BNX2_RV2P_MFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24114	BNX2_MQ_COMMAND	0x00003c00	bnx2.h
24115	BNX2_MQ_COMMAND_ENABLED	(1L<<0)	bnx2.h
24116	BNX2_MQ_COMMAND_OVERFLOW	(1L<<4)	bnx2.h
24117	BNX2_MQ_COMMAND_WR_ERROR	(1L<<5)	bnx2.h
24118	BNX2_MQ_COMMAND_RD_ERROR	(1L<<6)	bnx2.h
24119	BNX2_MQ_STATUS	0x00003c04	bnx2.h
24120	BNX2_MQ_STATUS_CTX_ACCESS_STAT	(1L<<16)	bnx2.h
24121	BNX2_MQ_STATUS_CTX_ACCESS64_STA	(1L<<17)	bnx2.h
24122	BNX2_MQ_STATUS_PCI_STALL_STAT	(1L<<18)	bnx2.h
24123	BNX2_MQ_CONFIG	0x00003c08	bnx2.h
24124	BNX2_MQ_CONFIG_TX_HIGH_PRI	(1L<<0)	bnx2.h
24125	BNX2_MQ_CONFIG_HALT_DIS	(1L<<1)	bnx2.h
24126	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0x7L<<4)	bnx2.h
24127	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(0L<<4)	bnx2.h
24128	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(1L<<4)	bnx2.h
24129	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(2L<<4)	bnx2.h
24130	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(3L<<4)	bnx2.h
24131	BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE	(4L<<4)	bnx2.h
24132	BNX2_MQ_CONFIG_MAX_DEPTH	(0x7fL<<8)	bnx2.h
24133	BNX2_MQ_CONFIG_CUR_DEPTH	(0x7fL<<20)	bnx2.h
24134	BNX2_MQ_ENQUEUE1	0x00003c0c	bnx2.h
24135	BNX2_MQ_ENQUEUE1_OFFSET	(0x3fL<<2)	bnx2.h
24136	BNX2_MQ_ENQUEUE1_CID	(0x3fffL<<8)	bnx2.h
24137	BNX2_MQ_ENQUEUE1_BYTE_MASK	(0xfL<<24)	bnx2.h
24138	BNX2_MQ_ENQUEUE1_KNL_MODE	(1L<<28)	bnx2.h
24139	BNX2_MQ_ENQUEUE2	0x00003c10	bnx2.h
24140	BNX2_MQ_BAD_WR_ADDR	0x00003c14	bnx2.h
24141	BNX2_MQ_BAD_RD_ADDR	0x00003c18	bnx2.h
24142	BNX2_MQ_KNL_BYP_WIND_START	0x00003c1c	bnx2.h
24143	BNX2_MQ_KNL_BYP_WIND_START_VALU	(0xfffffL<<12)	bnx2.h
24144	BNX2_MQ_KNL_WIND_END	0x00003c20	bnx2.h
24145	BNX2_MQ_KNL_WIND_END_VALUE	(0xffffffL<<8)	bnx2.h
24146	BNX2_MQ_KNL_WRITE_MASK1	0x00003c24	bnx2.h
24147	BNX2_MQ_KNL_TX_MASK1	0x00003c28	bnx2.h
24148	BNX2_MQ_KNL_CMD_MASK1	0x00003c2c	bnx2.h
24149	BNX2_MQ_KNL_COND_ENQUEUE_MASK1	0x00003c30	bnx2.h
24150	BNX2_MQ_KNL_RX_V2P_MASK1	0x00003c34	bnx2.h
24151	BNX2_MQ_KNL_WRITE_MASK2	0x00003c38	bnx2.h
24152	BNX2_MQ_KNL_TX_MASK2	0x00003c3c	bnx2.h
24153	BNX2_MQ_KNL_CMD_MASK2	0x00003c40	bnx2.h
24154	BNX2_MQ_KNL_COND_ENQUEUE_MASK2	0x00003c44	bnx2.h
24155	BNX2_MQ_KNL_RX_V2P_MASK2	0x00003c48	bnx2.h
24156	BNX2_MQ_KNL_BYP_WRITE_MASK1	0x00003c4c	bnx2.h
24157	BNX2_MQ_KNL_BYP_TX_MASK1	0x00003c50	bnx2.h
24158	BNX2_MQ_KNL_BYP_CMD_MASK1	0x00003c54	bnx2.h
24159	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c58	bnx2.h
24160	BNX2_MQ_KNL_BYP_RX_V2P_MASK1	0x00003c5c	bnx2.h
24161	BNX2_MQ_KNL_BYP_WRITE_MASK2	0x00003c60	bnx2.h
24162	BNX2_MQ_KNL_BYP_TX_MASK2	0x00003c64	bnx2.h
24163	BNX2_MQ_KNL_BYP_CMD_MASK2	0x00003c68	bnx2.h
24164	BNX2_MQ_KNL_BYP_COND_ENQUEUE_MA	0x00003c6c	bnx2.h
24165	BNX2_MQ_KNL_BYP_RX_V2P_MASK2	0x00003c70	bnx2.h
24166	BNX2_MQ_MEM_WR_ADDR	0x00003c74	bnx2.h
24167	BNX2_MQ_MEM_WR_ADDR_VALUE	(0x3fL<<0)	bnx2.h
24168	BNX2_MQ_MEM_WR_DATA0	0x00003c78	bnx2.h
24169	BNX2_MQ_MEM_WR_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
24170	BNX2_MQ_MEM_WR_DATA1	0x00003c7c	bnx2.h
24171	BNX2_MQ_MEM_WR_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
24172	BNX2_MQ_MEM_WR_DATA2	0x00003c80	bnx2.h
24173	BNX2_MQ_MEM_WR_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
24174	BNX2_MQ_MEM_RD_ADDR	0x00003c84	bnx2.h
24175	BNX2_MQ_MEM_RD_ADDR_VALUE	(0x3fL<<0)	bnx2.h
24176	BNX2_MQ_MEM_RD_DATA0	0x00003c88	bnx2.h
24177	BNX2_MQ_MEM_RD_DATA0_VALUE	(0xffffffffL<<0)	bnx2.h
24178	BNX2_MQ_MEM_RD_DATA1	0x00003c8c	bnx2.h
24179	BNX2_MQ_MEM_RD_DATA1_VALUE	(0xffffffffL<<0)	bnx2.h
24180	BNX2_MQ_MEM_RD_DATA2	0x00003c90	bnx2.h
24181	BNX2_MQ_MEM_RD_DATA2_VALUE	(0x3fffffffL<<0)	bnx2.h
24182	BNX2_TBDR_COMMAND	0x00005000	bnx2.h
24183	BNX2_TBDR_COMMAND_ENABLE	(1L<<0)	bnx2.h
24184	BNX2_TBDR_COMMAND_SOFT_RST	(1L<<1)	bnx2.h
24185	BNX2_TBDR_COMMAND_MSTR_ABORT	(1L<<4)	bnx2.h
24186	BNX2_TBDR_STATUS	0x00005004	bnx2.h
24187	BNX2_TBDR_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
24188	BNX2_TBDR_STATUS_FTQ_WAIT	(1L<<1)	bnx2.h
24189	BNX2_TBDR_STATUS_FIFO_OVERFLOW	(1L<<2)	bnx2.h
24190	BNX2_TBDR_STATUS_FIFO_UNDERFLOW	(1L<<3)	bnx2.h
24191	BNX2_TBDR_STATUS_SEARCHMISS_ERR	(1L<<4)	bnx2.h
24192	BNX2_TBDR_STATUS_FTQ_ENTRY_CNT	(1L<<5)	bnx2.h
24193	BNX2_TBDR_STATUS_BURST_CNT	(1L<<6)	bnx2.h
24194	BNX2_TBDR_CONFIG	0x00005008	bnx2.h
24195	BNX2_TBDR_CONFIG_MAX_BDS	(0xffL<<0)	bnx2.h
24196	BNX2_TBDR_CONFIG_SWAP_MODE	(1L<<8)	bnx2.h
24197	BNX2_TBDR_CONFIG_PRIORITY	(1L<<9)	bnx2.h
24198	BNX2_TBDR_CONFIG_CACHE_NEXT_PAG	(1L<<10)	bnx2.h
24199	BNX2_TBDR_CONFIG_PAGE_SIZE	(0xfL<<24)	bnx2.h
24200	BNX2_TBDR_CONFIG_PAGE_SIZE_256	(0L<<24)	bnx2.h
24201	BNX2_TBDR_CONFIG_PAGE_SIZE_512	(1L<<24)	bnx2.h
24202	BNX2_TBDR_CONFIG_PAGE_SIZE_1K	(2L<<24)	bnx2.h
24203	BNX2_TBDR_CONFIG_PAGE_SIZE_2K	(3L<<24)	bnx2.h
24204	BNX2_TBDR_CONFIG_PAGE_SIZE_4K	(4L<<24)	bnx2.h
24205	BNX2_TBDR_CONFIG_PAGE_SIZE_8K	(5L<<24)	bnx2.h
24206	BNX2_TBDR_CONFIG_PAGE_SIZE_16K	(6L<<24)	bnx2.h
24207	BNX2_TBDR_CONFIG_PAGE_SIZE_32K	(7L<<24)	bnx2.h
24208	BNX2_TBDR_CONFIG_PAGE_SIZE_64K	(8L<<24)	bnx2.h
24209	BNX2_TBDR_CONFIG_PAGE_SIZE_128K	(9L<<24)	bnx2.h
24210	BNX2_TBDR_CONFIG_PAGE_SIZE_256K	(10L<<24)	bnx2.h
24211	BNX2_TBDR_CONFIG_PAGE_SIZE_512K	(11L<<24)	bnx2.h
24212	BNX2_TBDR_CONFIG_PAGE_SIZE_1M	(12L<<24)	bnx2.h
24213	BNX2_TBDR_DEBUG_VECT_PEEK	0x0000500c	bnx2.h
24214	BNX2_TBDR_DEBUG_VECT_PEEK_1_VAL	(0x7ffL<<0)	bnx2.h
24215	BNX2_TBDR_DEBUG_VECT_PEEK_1_PEE	(1L<<11)	bnx2.h
24216	BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
24217	BNX2_TBDR_DEBUG_VECT_PEEK_2_VAL	(0x7ffL<<16)	bnx2.h
24218	BNX2_TBDR_DEBUG_VECT_PEEK_2_PEE	(1L<<27)	bnx2.h
24219	BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
24220	BNX2_TBDR_FTQ_DATA	0x000053c0	bnx2.h
24221	BNX2_TBDR_FTQ_CMD	0x000053f8	bnx2.h
24222	BNX2_TBDR_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24223	BNX2_TBDR_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24224	BNX2_TBDR_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24225	BNX2_TBDR_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24226	BNX2_TBDR_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24227	BNX2_TBDR_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24228	BNX2_TBDR_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24229	BNX2_TBDR_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24230	BNX2_TBDR_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
24231	BNX2_TBDR_FTQ_CMD_POP	(1L<<30)	bnx2.h
24232	BNX2_TBDR_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24233	BNX2_TBDR_FTQ_CTL	0x000053fc	bnx2.h
24234	BNX2_TBDR_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24235	BNX2_TBDR_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24236	BNX2_TBDR_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
24237	BNX2_TBDR_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24238	BNX2_TBDR_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24239	BNX2_TDMA_COMMAND	0x00005c00	bnx2.h
24240	BNX2_TDMA_COMMAND_ENABLED	(1L<<0)	bnx2.h
24241	BNX2_TDMA_COMMAND_MASTER_ABORT	(1L<<4)	bnx2.h
24242	BNX2_TDMA_COMMAND_BAD_L2_LENGTH	(1L<<7)	bnx2.h
24243	BNX2_TDMA_STATUS	0x00005c04	bnx2.h
24244	BNX2_TDMA_STATUS_DMA_WAIT	(1L<<0)	bnx2.h
24245	BNX2_TDMA_STATUS_PAYLOAD_WAIT	(1L<<1)	bnx2.h
24246	BNX2_TDMA_STATUS_PATCH_FTQ_WAIT	(1L<<2)	bnx2.h
24247	BNX2_TDMA_STATUS_LOCK_WAIT	(1L<<3)	bnx2.h
24248	BNX2_TDMA_STATUS_FTQ_ENTRY_CNT	(1L<<16)	bnx2.h
24249	BNX2_TDMA_STATUS_BURST_CNT	(1L<<17)	bnx2.h
24250	BNX2_TDMA_CONFIG	0x00005c08	bnx2.h
24251	BNX2_TDMA_CONFIG_ONE_DMA	(1L<<0)	bnx2.h
24252	BNX2_TDMA_CONFIG_ONE_RECORD	(1L<<1)	bnx2.h
24253	BNX2_TDMA_CONFIG_LIMIT_SZ	(0xfL<<4)	bnx2.h
24254	BNX2_TDMA_CONFIG_LIMIT_SZ_64	(0L<<4)	bnx2.h
24255	BNX2_TDMA_CONFIG_LIMIT_SZ_128	(0x4L<<4)	bnx2.h
24256	BNX2_TDMA_CONFIG_LIMIT_SZ_256	(0x6L<<4)	bnx2.h
24257	BNX2_TDMA_CONFIG_LIMIT_SZ_512	(0x8L<<4)	bnx2.h
24258	BNX2_TDMA_CONFIG_LINE_SZ	(0xfL<<8)	bnx2.h
24259	BNX2_TDMA_CONFIG_LINE_SZ_64	(0L<<8)	bnx2.h
24260	BNX2_TDMA_CONFIG_LINE_SZ_128	(4L<<8)	bnx2.h
24261	BNX2_TDMA_CONFIG_LINE_SZ_256	(6L<<8)	bnx2.h
24262	BNX2_TDMA_CONFIG_LINE_SZ_512	(8L<<8)	bnx2.h
24263	BNX2_TDMA_CONFIG_ALIGN_ENA	(1L<<15)	bnx2.h
24264	BNX2_TDMA_CONFIG_CHK_L2_BD	(1L<<16)	bnx2.h
24265	BNX2_TDMA_CONFIG_FIFO_CMP	(0xfL<<20)	bnx2.h
24266	BNX2_TDMA_PAYLOAD_PROD	0x00005c0c	bnx2.h
24267	BNX2_TDMA_PAYLOAD_PROD_VALUE	(0x1fffL<<3)	bnx2.h
24268	BNX2_TDMA_DBG_WATCHDOG	0x00005c10	bnx2.h
24269	BNX2_TDMA_DBG_TRIGGER	0x00005c14	bnx2.h
24270	BNX2_TDMA_DMAD_FSM	0x00005c80	bnx2.h
24271	BNX2_TDMA_DMAD_FSM_BD_INVLD	(1L<<0)	bnx2.h
24272	BNX2_TDMA_DMAD_FSM_PUSH	(0xfL<<4)	bnx2.h
24273	BNX2_TDMA_DMAD_FSM_ARB_TBDC	(0x3L<<8)	bnx2.h
24274	BNX2_TDMA_DMAD_FSM_ARB_CTX	(1L<<12)	bnx2.h
24275	BNX2_TDMA_DMAD_FSM_DR_INTF	(1L<<16)	bnx2.h
24276	BNX2_TDMA_DMAD_FSM_DMAD	(0x7L<<20)	bnx2.h
24277	BNX2_TDMA_DMAD_FSM_BD	(0xfL<<24)	bnx2.h
24278	BNX2_TDMA_DMAD_STATUS	0x00005c84	bnx2.h
24279	BNX2_TDMA_DMAD_STATUS_RHOLD_PUS	(0x3L<<0)	bnx2.h
24280	BNX2_TDMA_DMAD_STATUS_RHOLD_DMA	(0x3L<<4)	bnx2.h
24281	BNX2_TDMA_DMAD_STATUS_RHOLD_BD_	(0x3L<<8)	bnx2.h
24282	BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM	(0xfL<<12)	bnx2.h
24283	BNX2_TDMA_DR_INTF_FSM	0x00005c88	bnx2.h
24284	BNX2_TDMA_DR_INTF_FSM_L2_COMP	(0x3L<<0)	bnx2.h
24285	BNX2_TDMA_DR_INTF_FSM_TPATQ	(0x7L<<4)	bnx2.h
24286	BNX2_TDMA_DR_INTF_FSM_TPBUF	(0x3L<<8)	bnx2.h
24287	BNX2_TDMA_DR_INTF_FSM_DR_BUF	(0x7L<<12)	bnx2.h
24288	BNX2_TDMA_DR_INTF_FSM_DMAD	(0x7L<<16)	bnx2.h
24289	BNX2_TDMA_DR_INTF_STATUS	0x00005c8c	bnx2.h
24290	BNX2_TDMA_DR_INTF_STATUS_HOLE_P	(0x7L<<0)	bnx2.h
24291	BNX2_TDMA_DR_INTF_STATUS_DATA_A	(0x3L<<4)	bnx2.h
24292	BNX2_TDMA_DR_INTF_STATUS_SHIFT_	(0x7L<<8)	bnx2.h
24293	BNX2_TDMA_DR_INTF_STATUS_NXT_PN	(0xfL<<12)	bnx2.h
24294	BNX2_TDMA_DR_INTF_STATUS_BYTE_C	(0x7L<<16)	bnx2.h
24295	BNX2_TDMA_FTQ_DATA	0x00005fc0	bnx2.h
24296	BNX2_TDMA_FTQ_CMD	0x00005ff8	bnx2.h
24297	BNX2_TDMA_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24298	BNX2_TDMA_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24299	BNX2_TDMA_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24300	BNX2_TDMA_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24301	BNX2_TDMA_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24302	BNX2_TDMA_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24303	BNX2_TDMA_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24304	BNX2_TDMA_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24305	BNX2_TDMA_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
24306	BNX2_TDMA_FTQ_CMD_POP	(1L<<30)	bnx2.h
24307	BNX2_TDMA_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24308	BNX2_TDMA_FTQ_CTL	0x00005ffc	bnx2.h
24309	BNX2_TDMA_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24310	BNX2_TDMA_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24311	BNX2_TDMA_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
24312	BNX2_TDMA_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24313	BNX2_TDMA_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24314	BNX2_HC_COMMAND	0x00006800	bnx2.h
24315	BNX2_HC_COMMAND_ENABLE	(1L<<0)	bnx2.h
24316	BNX2_HC_COMMAND_SKIP_ABORT	(1L<<4)	bnx2.h
24317	BNX2_HC_COMMAND_COAL_NOW	(1L<<16)	bnx2.h
24318	BNX2_HC_COMMAND_COAL_NOW_WO_INT	(1L<<17)	bnx2.h
24319	BNX2_HC_COMMAND_STATS_NOW	(1L<<18)	bnx2.h
24320	BNX2_HC_COMMAND_FORCE_INT	(0x3L<<19)	bnx2.h
24321	BNX2_HC_COMMAND_FORCE_INT_NULL	(0L<<19)	bnx2.h
24322	BNX2_HC_COMMAND_FORCE_INT_HIGH	(1L<<19)	bnx2.h
24323	BNX2_HC_COMMAND_FORCE_INT_LOW	(2L<<19)	bnx2.h
24324	BNX2_HC_COMMAND_FORCE_INT_FREE	(3L<<19)	bnx2.h
24325	BNX2_HC_COMMAND_CLR_STAT_NOW	(1L<<21)	bnx2.h
24326	BNX2_HC_STATUS	0x00006804	bnx2.h
24327	BNX2_HC_STATUS_MASTER_ABORT	(1L<<0)	bnx2.h
24328	BNX2_HC_STATUS_PARITY_ERROR_STA	(1L<<1)	bnx2.h
24329	BNX2_HC_STATUS_PCI_CLK_CNT_STAT	(1L<<16)	bnx2.h
24330	BNX2_HC_STATUS_CORE_CLK_CNT_STA	(1L<<17)	bnx2.h
24331	BNX2_HC_STATUS_NUM_STATUS_BLOCK	(1L<<18)	bnx2.h
24332	BNX2_HC_STATUS_NUM_INT_GEN_STAT	(1L<<19)	bnx2.h
24333	BNX2_HC_STATUS_NUM_INT_MBOX_WR_	(1L<<20)	bnx2.h
24334	BNX2_HC_STATUS_CORE_CLKS_TO_HW_	(1L<<23)	bnx2.h
24335	BNX2_HC_STATUS_CORE_CLKS_TO_SW_	(1L<<24)	bnx2.h
24336	BNX2_HC_STATUS_CORE_CLKS_DURING	(1L<<25)	bnx2.h
24337	BNX2_HC_CONFIG	0x00006808	bnx2.h
24338	BNX2_HC_CONFIG_COLLECT_STATS	(1L<<0)	bnx2.h
24339	BNX2_HC_CONFIG_RX_TMR_MODE	(1L<<1)	bnx2.h
24340	BNX2_HC_CONFIG_TX_TMR_MODE	(1L<<2)	bnx2.h
24341	BNX2_HC_CONFIG_COM_TMR_MODE	(1L<<3)	bnx2.h
24342	BNX2_HC_CONFIG_CMD_TMR_MODE	(1L<<4)	bnx2.h
24343	BNX2_HC_CONFIG_STATISTIC_PRIORI	(1L<<5)	bnx2.h
24344	BNX2_HC_CONFIG_STATUS_PRIORITY	(1L<<6)	bnx2.h
24345	BNX2_HC_CONFIG_STAT_MEM_ADDR	(0xffL<<8)	bnx2.h
24346	BNX2_HC_ATTN_BITS_ENABLE	0x0000680c	bnx2.h
24347	BNX2_HC_STATUS_ADDR_L	0x00006810	bnx2.h
24348	BNX2_HC_STATUS_ADDR_H	0x00006814	bnx2.h
24349	BNX2_HC_STATISTICS_ADDR_L	0x00006818	bnx2.h
24350	BNX2_HC_STATISTICS_ADDR_H	0x0000681c	bnx2.h
24351	BNX2_HC_TX_QUICK_CONS_TRIP	0x00006820	bnx2.h
24352	BNX2_HC_TX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
24353	BNX2_HC_TX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
24354	BNX2_HC_COMP_PROD_TRIP	0x00006824	bnx2.h
24355	BNX2_HC_COMP_PROD_TRIP_VALUE	(0xffL<<0)	bnx2.h
24356	BNX2_HC_COMP_PROD_TRIP_INT	(0xffL<<16)	bnx2.h
24357	BNX2_HC_RX_QUICK_CONS_TRIP	0x00006828	bnx2.h
24358	BNX2_HC_RX_QUICK_CONS_TRIP_VALU	(0xffL<<0)	bnx2.h
24359	BNX2_HC_RX_QUICK_CONS_TRIP_INT	(0xffL<<16)	bnx2.h
24360	BNX2_HC_RX_TICKS	0x0000682c	bnx2.h
24361	BNX2_HC_RX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
24362	BNX2_HC_RX_TICKS_INT	(0x3ffL<<16)	bnx2.h
24363	BNX2_HC_TX_TICKS	0x00006830	bnx2.h
24364	BNX2_HC_TX_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
24365	BNX2_HC_TX_TICKS_INT	(0x3ffL<<16)	bnx2.h
24366	BNX2_HC_COM_TICKS	0x00006834	bnx2.h
24367	BNX2_HC_COM_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
24368	BNX2_HC_COM_TICKS_INT	(0x3ffL<<16)	bnx2.h
24369	BNX2_HC_CMD_TICKS	0x00006838	bnx2.h
24370	BNX2_HC_CMD_TICKS_VALUE	(0x3ffL<<0)	bnx2.h
24371	BNX2_HC_CMD_TICKS_INT	(0x3ffL<<16)	bnx2.h
24372	BNX2_HC_PERIODIC_TICKS	0x0000683c	bnx2.h
24373	BNX2_HC_PERIODIC_TICKS_HC_PERIO	(0xffffL<<0)	bnx2.h
24374	BNX2_HC_STAT_COLLECT_TICKS	0x00006840	bnx2.h
24375	BNX2_HC_STAT_COLLECT_TICKS_HC_S	(0xffL<<4)	bnx2.h
24376	BNX2_HC_STATS_TICKS	0x00006844	bnx2.h
24377	BNX2_HC_STATS_TICKS_HC_STAT_TIC	(0xffffL<<8)	bnx2.h
24378	BNX2_HC_STAT_MEM_DATA	0x0000684c	bnx2.h
24379	BNX2_HC_STAT_GEN_SEL_0	0x00006850	bnx2.h
24380	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<0)	bnx2.h
24381	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0L<<0)	bnx2.h
24382	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(1L<<0)	bnx2.h
24383	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(2L<<0)	bnx2.h
24384	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(3L<<0)	bnx2.h
24385	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(4L<<0)	bnx2.h
24386	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(5L<<0)	bnx2.h
24387	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(6L<<0)	bnx2.h
24388	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(7L<<0)	bnx2.h
24389	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(8L<<0)	bnx2.h
24390	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(9L<<0)	bnx2.h
24391	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(10L<<0)	bnx2.h
24392	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(11L<<0)	bnx2.h
24393	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(12L<<0)	bnx2.h
24394	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(13L<<0)	bnx2.h
24395	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(14L<<0)	bnx2.h
24396	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(15L<<0)	bnx2.h
24397	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(16L<<0)	bnx2.h
24398	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(17L<<0)	bnx2.h
24399	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(18L<<0)	bnx2.h
24400	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(19L<<0)	bnx2.h
24401	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(20L<<0)	bnx2.h
24402	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(21L<<0)	bnx2.h
24403	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(22L<<0)	bnx2.h
24404	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(23L<<0)	bnx2.h
24405	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(24L<<0)	bnx2.h
24406	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(25L<<0)	bnx2.h
24407	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(26L<<0)	bnx2.h
24408	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(27L<<0)	bnx2.h
24409	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(28L<<0)	bnx2.h
24410	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(29L<<0)	bnx2.h
24411	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(30L<<0)	bnx2.h
24412	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(31L<<0)	bnx2.h
24413	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(32L<<0)	bnx2.h
24414	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(33L<<0)	bnx2.h
24415	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(34L<<0)	bnx2.h
24416	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(35L<<0)	bnx2.h
24417	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(36L<<0)	bnx2.h
24418	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(37L<<0)	bnx2.h
24419	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(38L<<0)	bnx2.h
24420	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(39L<<0)	bnx2.h
24421	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(40L<<0)	bnx2.h
24422	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(41L<<0)	bnx2.h
24423	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(42L<<0)	bnx2.h
24424	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(43L<<0)	bnx2.h
24425	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(44L<<0)	bnx2.h
24426	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(45L<<0)	bnx2.h
24427	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(46L<<0)	bnx2.h
24428	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(47L<<0)	bnx2.h
24429	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(48L<<0)	bnx2.h
24430	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(49L<<0)	bnx2.h
24431	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(50L<<0)	bnx2.h
24432	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(51L<<0)	bnx2.h
24433	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(52L<<0)	bnx2.h
24434	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(53L<<0)	bnx2.h
24435	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(54L<<0)	bnx2.h
24436	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(55L<<0)	bnx2.h
24437	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(56L<<0)	bnx2.h
24438	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(59L<<0)	bnx2.h
24439	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(60L<<0)	bnx2.h
24440	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(61L<<0)	bnx2.h
24441	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(62L<<0)	bnx2.h
24442	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(63L<<0)	bnx2.h
24443	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(64L<<0)	bnx2.h
24444	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(65L<<0)	bnx2.h
24445	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(66L<<0)	bnx2.h
24446	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(67L<<0)	bnx2.h
24447	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(68L<<0)	bnx2.h
24448	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(69L<<0)	bnx2.h
24449	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(70L<<0)	bnx2.h
24450	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(71L<<0)	bnx2.h
24451	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(72L<<0)	bnx2.h
24452	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(73L<<0)	bnx2.h
24453	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(74L<<0)	bnx2.h
24454	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(75L<<0)	bnx2.h
24455	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(76L<<0)	bnx2.h
24456	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(77L<<0)	bnx2.h
24457	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(78L<<0)	bnx2.h
24458	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(79L<<0)	bnx2.h
24459	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(80L<<0)	bnx2.h
24460	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(81L<<0)	bnx2.h
24461	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(82L<<0)	bnx2.h
24462	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(83L<<0)	bnx2.h
24463	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(84L<<0)	bnx2.h
24464	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(85L<<0)	bnx2.h
24465	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(86L<<0)	bnx2.h
24466	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(87L<<0)	bnx2.h
24467	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(88L<<0)	bnx2.h
24468	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(89L<<0)	bnx2.h
24469	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(90L<<0)	bnx2.h
24470	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(91L<<0)	bnx2.h
24471	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(92L<<0)	bnx2.h
24472	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(93L<<0)	bnx2.h
24473	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(94L<<0)	bnx2.h
24474	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(95L<<0)	bnx2.h
24475	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(96L<<0)	bnx2.h
24476	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(97L<<0)	bnx2.h
24477	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(98L<<0)	bnx2.h
24478	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(99L<<0)	bnx2.h
24479	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(100L<<0)	bnx2.h
24480	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(101L<<0)	bnx2.h
24481	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(102L<<0)	bnx2.h
24482	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(103L<<0)	bnx2.h
24483	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(104L<<0)	bnx2.h
24484	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(105L<<0)	bnx2.h
24485	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(106L<<0)	bnx2.h
24486	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(107L<<0)	bnx2.h
24487	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(108L<<0)	bnx2.h
24488	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(109L<<0)	bnx2.h
24489	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(110L<<0)	bnx2.h
24490	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(111L<<0)	bnx2.h
24491	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(112L<<0)	bnx2.h
24492	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(113L<<0)	bnx2.h
24493	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(114L<<0)	bnx2.h
24494	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(115L<<0)	bnx2.h
24495	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(116L<<0)	bnx2.h
24496	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(117L<<0)	bnx2.h
24497	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(118L<<0)	bnx2.h
24498	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(119L<<0)	bnx2.h
24499	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(120L<<0)	bnx2.h
24500	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(121L<<0)	bnx2.h
24501	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(122L<<0)	bnx2.h
24502	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(127L<<0)	bnx2.h
24503	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<8)	bnx2.h
24504	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<16)	bnx2.h
24505	BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_	(0x7fL<<24)	bnx2.h
24506	BNX2_HC_STAT_GEN_SEL_1	0x00006854	bnx2.h
24507	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<0)	bnx2.h
24508	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<8)	bnx2.h
24509	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<16)	bnx2.h
24510	BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_	(0x7fL<<24)	bnx2.h
24511	BNX2_HC_STAT_GEN_SEL_2	0x00006858	bnx2.h
24512	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<0)	bnx2.h
24513	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<8)	bnx2.h
24514	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<16)	bnx2.h
24515	BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_	(0x7fL<<24)	bnx2.h
24516	BNX2_HC_STAT_GEN_SEL_3	0x0000685c	bnx2.h
24517	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<0)	bnx2.h
24518	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<8)	bnx2.h
24519	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<16)	bnx2.h
24520	BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_	(0x7fL<<24)	bnx2.h
24521	BNX2_HC_STAT_GEN_STAT0	0x00006888	bnx2.h
24522	BNX2_HC_STAT_GEN_STAT1	0x0000688c	bnx2.h
24523	BNX2_HC_STAT_GEN_STAT2	0x00006890	bnx2.h
24524	BNX2_HC_STAT_GEN_STAT3	0x00006894	bnx2.h
24525	BNX2_HC_STAT_GEN_STAT4	0x00006898	bnx2.h
24526	BNX2_HC_STAT_GEN_STAT5	0x0000689c	bnx2.h
24527	BNX2_HC_STAT_GEN_STAT6	0x000068a0	bnx2.h
24528	BNX2_HC_STAT_GEN_STAT7	0x000068a4	bnx2.h
24529	BNX2_HC_STAT_GEN_STAT8	0x000068a8	bnx2.h
24530	BNX2_HC_STAT_GEN_STAT9	0x000068ac	bnx2.h
24531	BNX2_HC_STAT_GEN_STAT10	0x000068b0	bnx2.h
24532	BNX2_HC_STAT_GEN_STAT11	0x000068b4	bnx2.h
24533	BNX2_HC_STAT_GEN_STAT12	0x000068b8	bnx2.h
24534	BNX2_HC_STAT_GEN_STAT13	0x000068bc	bnx2.h
24535	BNX2_HC_STAT_GEN_STAT14	0x000068c0	bnx2.h
24536	BNX2_HC_STAT_GEN_STAT15	0x000068c4	bnx2.h
24537	BNX2_HC_STAT_GEN_STAT_AC0	0x000068c8	bnx2.h
24538	BNX2_HC_STAT_GEN_STAT_AC1	0x000068cc	bnx2.h
24539	BNX2_HC_STAT_GEN_STAT_AC2	0x000068d0	bnx2.h
24540	BNX2_HC_STAT_GEN_STAT_AC3	0x000068d4	bnx2.h
24541	BNX2_HC_STAT_GEN_STAT_AC4	0x000068d8	bnx2.h
24542	BNX2_HC_STAT_GEN_STAT_AC5	0x000068dc	bnx2.h
24543	BNX2_HC_STAT_GEN_STAT_AC6	0x000068e0	bnx2.h
24544	BNX2_HC_STAT_GEN_STAT_AC7	0x000068e4	bnx2.h
24545	BNX2_HC_STAT_GEN_STAT_AC8	0x000068e8	bnx2.h
24546	BNX2_HC_STAT_GEN_STAT_AC9	0x000068ec	bnx2.h
24547	BNX2_HC_STAT_GEN_STAT_AC10	0x000068f0	bnx2.h
24548	BNX2_HC_STAT_GEN_STAT_AC11	0x000068f4	bnx2.h
24549	BNX2_HC_STAT_GEN_STAT_AC12	0x000068f8	bnx2.h
24550	BNX2_HC_STAT_GEN_STAT_AC13	0x000068fc	bnx2.h
24551	BNX2_HC_STAT_GEN_STAT_AC14	0x00006900	bnx2.h
24552	BNX2_HC_STAT_GEN_STAT_AC15	0x00006904	bnx2.h
24553	BNX2_HC_VIS	0x00006908	bnx2.h
24554	BNX2_HC_VIS_STAT_BUILD_STATE	(0xfL<<0)	bnx2.h
24555	BNX2_HC_VIS_STAT_BUILD_STATE_ID	(0L<<0)	bnx2.h
24556	BNX2_HC_VIS_STAT_BUILD_STATE_ST	(1L<<0)	bnx2.h
24557	BNX2_HC_VIS_STAT_BUILD_STATE_RE	(2L<<0)	bnx2.h
24558	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(3L<<0)	bnx2.h
24559	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(4L<<0)	bnx2.h
24560	BNX2_HC_VIS_STAT_BUILD_STATE_UP	(5L<<0)	bnx2.h
24561	BNX2_HC_VIS_STAT_BUILD_STATE_DM	(6L<<0)	bnx2.h
24562	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(7L<<0)	bnx2.h
24563	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(8L<<0)	bnx2.h
24564	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(9L<<0)	bnx2.h
24565	BNX2_HC_VIS_STAT_BUILD_STATE_MS	(10L<<0)	bnx2.h
24566	BNX2_HC_VIS_DMA_STAT_STATE	(0xfL<<8)	bnx2.h
24567	BNX2_HC_VIS_DMA_STAT_STATE_IDLE	(0L<<8)	bnx2.h
24568	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(1L<<8)	bnx2.h
24569	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(2L<<8)	bnx2.h
24570	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(3L<<8)	bnx2.h
24571	BNX2_HC_VIS_DMA_STAT_STATE_COMP	(4L<<8)	bnx2.h
24572	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(5L<<8)	bnx2.h
24573	BNX2_HC_VIS_DMA_STAT_STATE_STAT	(6L<<8)	bnx2.h
24574	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(7L<<8)	bnx2.h
24575	BNX2_HC_VIS_DMA_STAT_STATE_WRIT	(8L<<8)	bnx2.h
24576	BNX2_HC_VIS_DMA_STAT_STATE_WAIT	(9L<<8)	bnx2.h
24577	BNX2_HC_VIS_DMA_STAT_STATE_ABOR	(15L<<8)	bnx2.h
24578	BNX2_HC_VIS_DMA_MSI_STATE	(0x7L<<12)	bnx2.h
24579	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0x3L<<15)	bnx2.h
24580	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(0L<<15)	bnx2.h
24581	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(1L<<15)	bnx2.h
24582	BNX2_HC_VIS_STATISTIC_DMA_EN_ST	(2L<<15)	bnx2.h
24583	BNX2_HC_VIS_1	0x0000690c	bnx2.h
24584	BNX2_HC_VIS_1_HW_INTACK_STATE	(1L<<4)	bnx2.h
24585	BNX2_HC_VIS_1_HW_INTACK_STATE_I	(0L<<4)	bnx2.h
24586	BNX2_HC_VIS_1_HW_INTACK_STATE_C	(1L<<4)	bnx2.h
24587	BNX2_HC_VIS_1_SW_INTACK_STATE	(1L<<5)	bnx2.h
24588	BNX2_HC_VIS_1_SW_INTACK_STATE_I	(0L<<5)	bnx2.h
24589	BNX2_HC_VIS_1_SW_INTACK_STATE_C	(1L<<5)	bnx2.h
24590	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
24591	BNX2_HC_VIS_1_DURING_SW_INTACK_	(0L<<6)	bnx2.h
24592	BNX2_HC_VIS_1_DURING_SW_INTACK_	(1L<<6)	bnx2.h
24593	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
24594	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(0L<<7)	bnx2.h
24595	BNX2_HC_VIS_1_MAILBOX_COUNT_STA	(1L<<7)	bnx2.h
24596	BNX2_HC_VIS_1_RAM_RD_ARB_STATE	(0xfL<<17)	bnx2.h
24597	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(0L<<17)	bnx2.h
24598	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(1L<<17)	bnx2.h
24599	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(2L<<17)	bnx2.h
24600	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(3L<<17)	bnx2.h
24601	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(4L<<17)	bnx2.h
24602	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(5L<<17)	bnx2.h
24603	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(6L<<17)	bnx2.h
24604	BNX2_HC_VIS_1_RAM_RD_ARB_STATE_	(7L<<17)	bnx2.h
24605	BNX2_HC_VIS_1_RAM_WR_ARB_STATE	(0x3L<<21)	bnx2.h
24606	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(0L<<21)	bnx2.h
24607	BNX2_HC_VIS_1_RAM_WR_ARB_STATE_	(1L<<21)	bnx2.h
24608	BNX2_HC_VIS_1_INT_GEN_STATE	(1L<<23)	bnx2.h
24609	BNX2_HC_VIS_1_INT_GEN_STATE_DLE	(0L<<23)	bnx2.h
24610	BNX2_HC_VIS_1_INT_GEN_STATE_NTE	(1L<<23)	bnx2.h
24611	BNX2_HC_VIS_1_STAT_CHAN_ID	(0x7L<<24)	bnx2.h
24612	BNX2_HC_VIS_1_INT_B	(1L<<27)	bnx2.h
24613	BNX2_HC_DEBUG_VECT_PEEK	0x00006910	bnx2.h
24614	BNX2_HC_DEBUG_VECT_PEEK_1_VALUE	(0x7ffL<<0)	bnx2.h
24615	BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_	(1L<<11)	bnx2.h
24616	BNX2_HC_DEBUG_VECT_PEEK_1_SEL	(0xfL<<12)	bnx2.h
24617	BNX2_HC_DEBUG_VECT_PEEK_2_VALUE	(0x7ffL<<16)	bnx2.h
24618	BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_	(1L<<27)	bnx2.h
24619	BNX2_HC_DEBUG_VECT_PEEK_2_SEL	(0xfL<<28)	bnx2.h
24620	BNX2_TXP_CPU_MODE	0x00045000	bnx2.h
24621	BNX2_TXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
24622	BNX2_TXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
24623	BNX2_TXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
24624	BNX2_TXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
24625	BNX2_TXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
24626	BNX2_TXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
24627	BNX2_TXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
24628	BNX2_TXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
24629	BNX2_TXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
24630	BNX2_TXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
24631	BNX2_TXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
24632	BNX2_TXP_CPU_STATE	0x00045004	bnx2.h
24633	BNX2_TXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
24634	BNX2_TXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
24635	BNX2_TXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
24636	BNX2_TXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
24637	BNX2_TXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
24638	BNX2_TXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
24639	BNX2_TXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
24640	BNX2_TXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
24641	BNX2_TXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
24642	BNX2_TXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
24643	BNX2_TXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
24644	BNX2_TXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
24645	BNX2_TXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
24646	BNX2_TXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
24647	BNX2_TXP_CPU_EVENT_MASK	0x00045008	bnx2.h
24648	BNX2_TXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
24649	BNX2_TXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
24650	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
24651	BNX2_TXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
24652	BNX2_TXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
24653	BNX2_TXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
24654	BNX2_TXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
24655	BNX2_TXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
24656	BNX2_TXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
24657	BNX2_TXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
24658	BNX2_TXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
24659	BNX2_TXP_CPU_PROGRAM_COUNTER	0x0004501c	bnx2.h
24660	BNX2_TXP_CPU_INSTRUCTION	0x00045020	bnx2.h
24661	BNX2_TXP_CPU_DATA_ACCESS	0x00045024	bnx2.h
24662	BNX2_TXP_CPU_INTERRUPT_ENABLE	0x00045028	bnx2.h
24663	BNX2_TXP_CPU_INTERRUPT_VECTOR	0x0004502c	bnx2.h
24664	BNX2_TXP_CPU_INTERRUPT_SAVED_PC	0x00045030	bnx2.h
24665	BNX2_TXP_CPU_HW_BREAKPOINT	0x00045034	bnx2.h
24666	BNX2_TXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
24667	BNX2_TXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
24668	BNX2_TXP_CPU_DEBUG_VECT_PEEK	0x00045038	bnx2.h
24669	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
24670	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
24671	BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
24672	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
24673	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
24674	BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
24675	BNX2_TXP_CPU_LAST_BRANCH_ADDR	0x00045048	bnx2.h
24676	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
24677	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
24678	BNX2_TXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
24679	BNX2_TXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
24680	BNX2_TXP_CPU_REG_FILE	0x00045200	bnx2.h
24681	BNX2_TXP_FTQ_DATA	0x000453c0	bnx2.h
24682	BNX2_TXP_FTQ_CMD	0x000453f8	bnx2.h
24683	BNX2_TXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24684	BNX2_TXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24685	BNX2_TXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24686	BNX2_TXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24687	BNX2_TXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24688	BNX2_TXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24689	BNX2_TXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24690	BNX2_TXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24691	BNX2_TXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
24692	BNX2_TXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
24693	BNX2_TXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24694	BNX2_TXP_FTQ_CTL	0x000453fc	bnx2.h
24695	BNX2_TXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24696	BNX2_TXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24697	BNX2_TXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
24698	BNX2_TXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24699	BNX2_TXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24700	BNX2_TXP_SCRATCH	0x00060000	bnx2.h
24701	BNX2_TPAT_CPU_MODE	0x00085000	bnx2.h
24702	BNX2_TPAT_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
24703	BNX2_TPAT_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
24704	BNX2_TPAT_CPU_MODE_PAGE_0_DATA_	(1L<<2)	bnx2.h
24705	BNX2_TPAT_CPU_MODE_PAGE_0_INST_	(1L<<3)	bnx2.h
24706	BNX2_TPAT_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
24707	BNX2_TPAT_CPU_MODE_INTERRUPT_EN	(1L<<7)	bnx2.h
24708	BNX2_TPAT_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
24709	BNX2_TPAT_CPU_MODE_BAD_DATA_HAL	(1L<<11)	bnx2.h
24710	BNX2_TPAT_CPU_MODE_BAD_INST_HAL	(1L<<12)	bnx2.h
24711	BNX2_TPAT_CPU_MODE_FIO_ABORT_HA	(1L<<13)	bnx2.h
24712	BNX2_TPAT_CPU_MODE_SPAD_UNDERFL	(1L<<15)	bnx2.h
24713	BNX2_TPAT_CPU_STATE	0x00085004	bnx2.h
24714	BNX2_TPAT_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
24715	BNX2_TPAT_CPU_STATE_BAD_INST_HA	(1L<<2)	bnx2.h
24716	BNX2_TPAT_CPU_STATE_PAGE_0_DATA	(1L<<3)	bnx2.h
24717	BNX2_TPAT_CPU_STATE_PAGE_0_INST	(1L<<4)	bnx2.h
24718	BNX2_TPAT_CPU_STATE_BAD_DATA_AD	(1L<<5)	bnx2.h
24719	BNX2_TPAT_CPU_STATE_BAD_pc_HALT	(1L<<6)	bnx2.h
24720	BNX2_TPAT_CPU_STATE_ALIGN_HALTE	(1L<<7)	bnx2.h
24721	BNX2_TPAT_CPU_STATE_FIO_ABORT_H	(1L<<8)	bnx2.h
24722	BNX2_TPAT_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
24723	BNX2_TPAT_CPU_STATE_SPAD_UNDERF	(1L<<11)	bnx2.h
24724	BNX2_TPAT_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
24725	BNX2_TPAT_CPU_STATE_DATA_ACCESS	(1L<<14)	bnx2.h
24726	BNX2_TPAT_CPU_STATE_INST_FETCH_	(1L<<15)	bnx2.h
24727	BNX2_TPAT_CPU_STATE_BLOCKED_REA	(1L<<31)	bnx2.h
24728	BNX2_TPAT_CPU_EVENT_MASK	0x00085008	bnx2.h
24729	BNX2_TPAT_CPU_EVENT_MASK_BREAKP	(1L<<0)	bnx2.h
24730	BNX2_TPAT_CPU_EVENT_MASK_BAD_IN	(1L<<2)	bnx2.h
24731	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<3)	bnx2.h
24732	BNX2_TPAT_CPU_EVENT_MASK_PAGE_0	(1L<<4)	bnx2.h
24733	BNX2_TPAT_CPU_EVENT_MASK_BAD_DA	(1L<<5)	bnx2.h
24734	BNX2_TPAT_CPU_EVENT_MASK_BAD_PC	(1L<<6)	bnx2.h
24735	BNX2_TPAT_CPU_EVENT_MASK_ALIGN_	(1L<<7)	bnx2.h
24736	BNX2_TPAT_CPU_EVENT_MASK_FIO_AB	(1L<<8)	bnx2.h
24737	BNX2_TPAT_CPU_EVENT_MASK_SOFT_H	(1L<<10)	bnx2.h
24738	BNX2_TPAT_CPU_EVENT_MASK_SPAD_U	(1L<<11)	bnx2.h
24739	BNX2_TPAT_CPU_EVENT_MASK_INTERR	(1L<<12)	bnx2.h
24740	BNX2_TPAT_CPU_PROGRAM_COUNTER	0x0008501c	bnx2.h
24741	BNX2_TPAT_CPU_INSTRUCTION	0x00085020	bnx2.h
24742	BNX2_TPAT_CPU_DATA_ACCESS	0x00085024	bnx2.h
24743	BNX2_TPAT_CPU_INTERRUPT_ENABLE	0x00085028	bnx2.h
24744	BNX2_TPAT_CPU_INTERRUPT_VECTOR	0x0008502c	bnx2.h
24745	BNX2_TPAT_CPU_INTERRUPT_SAVED_P	0x00085030	bnx2.h
24746	BNX2_TPAT_CPU_HW_BREAKPOINT	0x00085034	bnx2.h
24747	BNX2_TPAT_CPU_HW_BREAKPOINT_DIS	(1L<<0)	bnx2.h
24748	BNX2_TPAT_CPU_HW_BREAKPOINT_ADD	(0x3fffffffL<<2)	bnx2.h
24749	BNX2_TPAT_CPU_DEBUG_VECT_PEEK	0x00085038	bnx2.h
24750	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0x7ffL<<0)	bnx2.h
24751	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(1L<<11)	bnx2.h
24752	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1	(0xfL<<12)	bnx2.h
24753	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0x7ffL<<16)	bnx2.h
24754	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(1L<<27)	bnx2.h
24755	BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2	(0xfL<<28)	bnx2.h
24756	BNX2_TPAT_CPU_LAST_BRANCH_ADDR	0x00085048	bnx2.h
24757	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
24758	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0L<<1)	bnx2.h
24759	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(1L<<1)	bnx2.h
24760	BNX2_TPAT_CPU_LAST_BRANCH_ADDR_	(0x3fffffffL<<2)	bnx2.h
24761	BNX2_TPAT_CPU_REG_FILE	0x00085200	bnx2.h
24762	BNX2_TPAT_FTQ_DATA	0x000853c0	bnx2.h
24763	BNX2_TPAT_FTQ_CMD	0x000853f8	bnx2.h
24764	BNX2_TPAT_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24765	BNX2_TPAT_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24766	BNX2_TPAT_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24767	BNX2_TPAT_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24768	BNX2_TPAT_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24769	BNX2_TPAT_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24770	BNX2_TPAT_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24771	BNX2_TPAT_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24772	BNX2_TPAT_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
24773	BNX2_TPAT_FTQ_CMD_POP	(1L<<30)	bnx2.h
24774	BNX2_TPAT_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24775	BNX2_TPAT_FTQ_CTL	0x000853fc	bnx2.h
24776	BNX2_TPAT_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24777	BNX2_TPAT_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24778	BNX2_TPAT_FTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
24779	BNX2_TPAT_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24780	BNX2_TPAT_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24781	BNX2_TPAT_SCRATCH	0x000a0000	bnx2.h
24782	BNX2_RXP_CPU_MODE	0x000c5000	bnx2.h
24783	BNX2_RXP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
24784	BNX2_RXP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
24785	BNX2_RXP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
24786	BNX2_RXP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
24787	BNX2_RXP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
24788	BNX2_RXP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
24789	BNX2_RXP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
24790	BNX2_RXP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
24791	BNX2_RXP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
24792	BNX2_RXP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
24793	BNX2_RXP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
24794	BNX2_RXP_CPU_STATE	0x000c5004	bnx2.h
24795	BNX2_RXP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
24796	BNX2_RXP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
24797	BNX2_RXP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
24798	BNX2_RXP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
24799	BNX2_RXP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
24800	BNX2_RXP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
24801	BNX2_RXP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
24802	BNX2_RXP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
24803	BNX2_RXP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
24804	BNX2_RXP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
24805	BNX2_RXP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
24806	BNX2_RXP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
24807	BNX2_RXP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
24808	BNX2_RXP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
24809	BNX2_RXP_CPU_EVENT_MASK	0x000c5008	bnx2.h
24810	BNX2_RXP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
24811	BNX2_RXP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
24812	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
24813	BNX2_RXP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
24814	BNX2_RXP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
24815	BNX2_RXP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
24816	BNX2_RXP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
24817	BNX2_RXP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
24818	BNX2_RXP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
24819	BNX2_RXP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
24820	BNX2_RXP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
24821	BNX2_RXP_CPU_PROGRAM_COUNTER	0x000c501c	bnx2.h
24822	BNX2_RXP_CPU_INSTRUCTION	0x000c5020	bnx2.h
24823	BNX2_RXP_CPU_DATA_ACCESS	0x000c5024	bnx2.h
24824	BNX2_RXP_CPU_INTERRUPT_ENABLE	0x000c5028	bnx2.h
24825	BNX2_RXP_CPU_INTERRUPT_VECTOR	0x000c502c	bnx2.h
24826	BNX2_RXP_CPU_INTERRUPT_SAVED_PC	0x000c5030	bnx2.h
24827	BNX2_RXP_CPU_HW_BREAKPOINT	0x000c5034	bnx2.h
24828	BNX2_RXP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
24829	BNX2_RXP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
24830	BNX2_RXP_CPU_DEBUG_VECT_PEEK	0x000c5038	bnx2.h
24831	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
24832	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
24833	BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
24834	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
24835	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
24836	BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
24837	BNX2_RXP_CPU_LAST_BRANCH_ADDR	0x000c5048	bnx2.h
24838	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
24839	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
24840	BNX2_RXP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
24841	BNX2_RXP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
24842	BNX2_RXP_CPU_REG_FILE	0x000c5200	bnx2.h
24843	BNX2_RXP_CFTQ_DATA	0x000c5380	bnx2.h
24844	BNX2_RXP_CFTQ_CMD	0x000c53b8	bnx2.h
24845	BNX2_RXP_CFTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24846	BNX2_RXP_CFTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24847	BNX2_RXP_CFTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24848	BNX2_RXP_CFTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24849	BNX2_RXP_CFTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24850	BNX2_RXP_CFTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24851	BNX2_RXP_CFTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24852	BNX2_RXP_CFTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24853	BNX2_RXP_CFTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
24854	BNX2_RXP_CFTQ_CMD_POP	(1L<<30)	bnx2.h
24855	BNX2_RXP_CFTQ_CMD_BUSY	(1L<<31)	bnx2.h
24856	BNX2_RXP_CFTQ_CTL	0x000c53bc	bnx2.h
24857	BNX2_RXP_CFTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24858	BNX2_RXP_CFTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24859	BNX2_RXP_CFTQ_CTL_FORCE_INTERVE	(1L<<2)	bnx2.h
24860	BNX2_RXP_CFTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24861	BNX2_RXP_CFTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24862	BNX2_RXP_FTQ_DATA	0x000c53c0	bnx2.h
24863	BNX2_RXP_FTQ_CMD	0x000c53f8	bnx2.h
24864	BNX2_RXP_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24865	BNX2_RXP_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24866	BNX2_RXP_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24867	BNX2_RXP_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24868	BNX2_RXP_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24869	BNX2_RXP_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24870	BNX2_RXP_FTQ_CMD_ADD_INTERVEN	(1L<<27)	bnx2.h
24871	BNX2_RXP_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24872	BNX2_RXP_FTQ_CMD_INTERVENE_CLR	(1L<<29)	bnx2.h
24873	BNX2_RXP_FTQ_CMD_POP	(1L<<30)	bnx2.h
24874	BNX2_RXP_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24875	BNX2_RXP_FTQ_CTL	0x000c53fc	bnx2.h
24876	BNX2_RXP_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24877	BNX2_RXP_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24878	BNX2_RXP_FTQ_CTL_FORCE_INTERVEN	(1L<<2)	bnx2.h
24879	BNX2_RXP_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24880	BNX2_RXP_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
24881	BNX2_RXP_SCRATCH	0x000e0000	bnx2.h
24882	BNX2_COM_CPU_MODE	0x00105000	bnx2.h
24883	BNX2_COM_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
24884	BNX2_COM_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
24885	BNX2_COM_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
24886	BNX2_COM_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
24887	BNX2_COM_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
24888	BNX2_COM_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
24889	BNX2_COM_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
24890	BNX2_COM_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
24891	BNX2_COM_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
24892	BNX2_COM_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
24893	BNX2_COM_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
24894	BNX2_COM_CPU_STATE	0x00105004	bnx2.h
24895	BNX2_COM_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
24896	BNX2_COM_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
24897	BNX2_COM_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
24898	BNX2_COM_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
24899	BNX2_COM_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
24900	BNX2_COM_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
24901	BNX2_COM_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
24902	BNX2_COM_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
24903	BNX2_COM_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
24904	BNX2_COM_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
24905	BNX2_COM_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
24906	BNX2_COM_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
24907	BNX2_COM_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
24908	BNX2_COM_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
24909	BNX2_COM_CPU_EVENT_MASK	0x00105008	bnx2.h
24910	BNX2_COM_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
24911	BNX2_COM_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
24912	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
24913	BNX2_COM_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
24914	BNX2_COM_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
24915	BNX2_COM_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
24916	BNX2_COM_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
24917	BNX2_COM_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
24918	BNX2_COM_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
24919	BNX2_COM_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
24920	BNX2_COM_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
24921	BNX2_COM_CPU_PROGRAM_COUNTER	0x0010501c	bnx2.h
24922	BNX2_COM_CPU_INSTRUCTION	0x00105020	bnx2.h
24923	BNX2_COM_CPU_DATA_ACCESS	0x00105024	bnx2.h
24924	BNX2_COM_CPU_INTERRUPT_ENABLE	0x00105028	bnx2.h
24925	BNX2_COM_CPU_INTERRUPT_VECTOR	0x0010502c	bnx2.h
24926	BNX2_COM_CPU_INTERRUPT_SAVED_PC	0x00105030	bnx2.h
24927	BNX2_COM_CPU_HW_BREAKPOINT	0x00105034	bnx2.h
24928	BNX2_COM_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
24929	BNX2_COM_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
24930	BNX2_COM_CPU_DEBUG_VECT_PEEK	0x00105038	bnx2.h
24931	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
24932	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
24933	BNX2_COM_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
24934	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
24935	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
24936	BNX2_COM_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
24937	BNX2_COM_CPU_LAST_BRANCH_ADDR	0x00105048	bnx2.h
24938	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
24939	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
24940	BNX2_COM_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
24941	BNX2_COM_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
24942	BNX2_COM_CPU_REG_FILE	0x00105200	bnx2.h
24943	BNX2_COM_COMXQ_FTQ_DATA	0x00105340	bnx2.h
24944	BNX2_COM_COMXQ_FTQ_CMD	0x00105378	bnx2.h
24945	BNX2_COM_COMXQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24946	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24947	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24948	BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24949	BNX2_COM_COMXQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
24950	BNX2_COM_COMXQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24951	BNX2_COM_COMXQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
24952	BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24953	BNX2_COM_COMXQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
24954	BNX2_COM_COMXQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
24955	BNX2_COM_COMXQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24956	BNX2_COM_COMXQ_FTQ_CTL	0x0010537c	bnx2.h
24957	BNX2_COM_COMXQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
24958	BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24959	BNX2_COM_COMXQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
24960	BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
24961	BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
24962	BNX2_COM_COMTQ_FTQ_DATA	0x00105380	bnx2.h
24963	BNX2_COM_COMTQ_FTQ_CMD	0x001053b8	bnx2.h
24964	BNX2_COM_COMTQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24965	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24966	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24967	BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24968	BNX2_COM_COMTQ_FTQ_CMD_SFT_RESE	(1L<<25)	bnx2.h
24969	BNX2_COM_COMTQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24970	BNX2_COM_COMTQ_FTQ_CMD_ADD_INTE	(1L<<27)	bnx2.h
24971	BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24972	BNX2_COM_COMTQ_FTQ_CMD_INTERVEN	(1L<<29)	bnx2.h
24973	BNX2_COM_COMTQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
24974	BNX2_COM_COMTQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24975	BNX2_COM_COMTQ_FTQ_CTL	0x001053bc	bnx2.h
24976	BNX2_COM_COMTQ_FTQ_CTL_INTERVEN	(1L<<0)	bnx2.h
24977	BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24978	BNX2_COM_COMTQ_FTQ_CTL_FORCE_IN	(1L<<2)	bnx2.h
24979	BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPT	(0x3ffL<<12)	bnx2.h
24980	BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPT	(0x3ffL<<22)	bnx2.h
24981	BNX2_COM_COMQ_FTQ_DATA	0x001053c0	bnx2.h
24982	BNX2_COM_COMQ_FTQ_CMD	0x001053f8	bnx2.h
24983	BNX2_COM_COMQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
24984	BNX2_COM_COMQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
24985	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
24986	BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
24987	BNX2_COM_COMQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
24988	BNX2_COM_COMQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
24989	BNX2_COM_COMQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
24990	BNX2_COM_COMQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
24991	BNX2_COM_COMQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
24992	BNX2_COM_COMQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
24993	BNX2_COM_COMQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
24994	BNX2_COM_COMQ_FTQ_CTL	0x001053fc	bnx2.h
24995	BNX2_COM_COMQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
24996	BNX2_COM_COMQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
24997	BNX2_COM_COMQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
24998	BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
24999	BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
25000	BNX2_COM_SCRATCH	0x00120000	bnx2.h
25001	BNX2_CP_CPU_MODE	0x00185000	bnx2.h
25002	BNX2_CP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
25003	BNX2_CP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
25004	BNX2_CP_CPU_MODE_PAGE_0_DATA_EN	(1L<<2)	bnx2.h
25005	BNX2_CP_CPU_MODE_PAGE_0_INST_EN	(1L<<3)	bnx2.h
25006	BNX2_CP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
25007	BNX2_CP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
25008	BNX2_CP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
25009	BNX2_CP_CPU_MODE_BAD_DATA_HALT_	(1L<<11)	bnx2.h
25010	BNX2_CP_CPU_MODE_BAD_INST_HALT_	(1L<<12)	bnx2.h
25011	BNX2_CP_CPU_MODE_FIO_ABORT_HALT	(1L<<13)	bnx2.h
25012	BNX2_CP_CPU_MODE_SPAD_UNDERFLOW	(1L<<15)	bnx2.h
25013	BNX2_CP_CPU_STATE	0x00185004	bnx2.h
25014	BNX2_CP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
25015	BNX2_CP_CPU_STATE_BAD_INST_HALT	(1L<<2)	bnx2.h
25016	BNX2_CP_CPU_STATE_PAGE_0_DATA_H	(1L<<3)	bnx2.h
25017	BNX2_CP_CPU_STATE_PAGE_0_INST_H	(1L<<4)	bnx2.h
25018	BNX2_CP_CPU_STATE_BAD_DATA_ADDR	(1L<<5)	bnx2.h
25019	BNX2_CP_CPU_STATE_BAD_pc_HALTED	(1L<<6)	bnx2.h
25020	BNX2_CP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
25021	BNX2_CP_CPU_STATE_FIO_ABORT_HAL	(1L<<8)	bnx2.h
25022	BNX2_CP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
25023	BNX2_CP_CPU_STATE_SPAD_UNDERFLO	(1L<<11)	bnx2.h
25024	BNX2_CP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
25025	BNX2_CP_CPU_STATE_DATA_ACCESS_S	(1L<<14)	bnx2.h
25026	BNX2_CP_CPU_STATE_INST_FETCH_ST	(1L<<15)	bnx2.h
25027	BNX2_CP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
25028	BNX2_CP_CPU_EVENT_MASK	0x00185008	bnx2.h
25029	BNX2_CP_CPU_EVENT_MASK_BREAKPOI	(1L<<0)	bnx2.h
25030	BNX2_CP_CPU_EVENT_MASK_BAD_INST	(1L<<2)	bnx2.h
25031	BNX2_CP_CPU_EVENT_MASK_PAGE_0_D	(1L<<3)	bnx2.h
25032	BNX2_CP_CPU_EVENT_MASK_PAGE_0_I	(1L<<4)	bnx2.h
25033	BNX2_CP_CPU_EVENT_MASK_BAD_DATA	(1L<<5)	bnx2.h
25034	BNX2_CP_CPU_EVENT_MASK_BAD_PC_H	(1L<<6)	bnx2.h
25035	BNX2_CP_CPU_EVENT_MASK_ALIGN_HA	(1L<<7)	bnx2.h
25036	BNX2_CP_CPU_EVENT_MASK_FIO_ABOR	(1L<<8)	bnx2.h
25037	BNX2_CP_CPU_EVENT_MASK_SOFT_HAL	(1L<<10)	bnx2.h
25038	BNX2_CP_CPU_EVENT_MASK_SPAD_UND	(1L<<11)	bnx2.h
25039	BNX2_CP_CPU_EVENT_MASK_INTERRUP	(1L<<12)	bnx2.h
25040	BNX2_CP_CPU_PROGRAM_COUNTER	0x0018501c	bnx2.h
25041	BNX2_CP_CPU_INSTRUCTION	0x00185020	bnx2.h
25042	BNX2_CP_CPU_DATA_ACCESS	0x00185024	bnx2.h
25043	BNX2_CP_CPU_INTERRUPT_ENABLE	0x00185028	bnx2.h
25044	BNX2_CP_CPU_INTERRUPT_VECTOR	0x0018502c	bnx2.h
25045	BNX2_CP_CPU_INTERRUPT_SAVED_PC	0x00185030	bnx2.h
25046	BNX2_CP_CPU_HW_BREAKPOINT	0x00185034	bnx2.h
25047	BNX2_CP_CPU_HW_BREAKPOINT_DISAB	(1L<<0)	bnx2.h
25048	BNX2_CP_CPU_HW_BREAKPOINT_ADDRE	(0x3fffffffL<<2)	bnx2.h
25049	BNX2_CP_CPU_DEBUG_VECT_PEEK	0x00185038	bnx2.h
25050	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_V	(0x7ffL<<0)	bnx2.h
25051	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_P	(1L<<11)	bnx2.h
25052	BNX2_CP_CPU_DEBUG_VECT_PEEK_1_S	(0xfL<<12)	bnx2.h
25053	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_V	(0x7ffL<<16)	bnx2.h
25054	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_P	(1L<<27)	bnx2.h
25055	BNX2_CP_CPU_DEBUG_VECT_PEEK_2_S	(0xfL<<28)	bnx2.h
25056	BNX2_CP_CPU_LAST_BRANCH_ADDR	0x00185048	bnx2.h
25057	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
25058	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(0L<<1)	bnx2.h
25059	BNX2_CP_CPU_LAST_BRANCH_ADDR_TY	(1L<<1)	bnx2.h
25060	BNX2_CP_CPU_LAST_BRANCH_ADDR_LB	(0x3fffffffL<<2)	bnx2.h
25061	BNX2_CP_CPU_REG_FILE	0x00185200	bnx2.h
25062	BNX2_CP_CPQ_FTQ_DATA	0x001853c0	bnx2.h
25063	BNX2_CP_CPQ_FTQ_CMD	0x001853f8	bnx2.h
25064	BNX2_CP_CPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
25065	BNX2_CP_CPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
25066	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
25067	BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
25068	BNX2_CP_CPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
25069	BNX2_CP_CPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
25070	BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVE	(1L<<27)	bnx2.h
25071	BNX2_CP_CPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
25072	BNX2_CP_CPQ_FTQ_CMD_INTERVENE_C	(1L<<29)	bnx2.h
25073	BNX2_CP_CPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
25074	BNX2_CP_CPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
25075	BNX2_CP_CPQ_FTQ_CTL	0x001853fc	bnx2.h
25076	BNX2_CP_CPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
25077	BNX2_CP_CPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
25078	BNX2_CP_CPQ_FTQ_CTL_FORCE_INTER	(1L<<2)	bnx2.h
25079	BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
25080	BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
25081	BNX2_CP_SCRATCH	0x001a0000	bnx2.h
25082	BNX2_MCP_CPU_MODE	0x00145000	bnx2.h
25083	BNX2_MCP_CPU_MODE_LOCAL_RST	(1L<<0)	bnx2.h
25084	BNX2_MCP_CPU_MODE_STEP_ENA	(1L<<1)	bnx2.h
25085	BNX2_MCP_CPU_MODE_PAGE_0_DATA_E	(1L<<2)	bnx2.h
25086	BNX2_MCP_CPU_MODE_PAGE_0_INST_E	(1L<<3)	bnx2.h
25087	BNX2_MCP_CPU_MODE_MSG_BIT1	(1L<<6)	bnx2.h
25088	BNX2_MCP_CPU_MODE_INTERRUPT_ENA	(1L<<7)	bnx2.h
25089	BNX2_MCP_CPU_MODE_SOFT_HALT	(1L<<10)	bnx2.h
25090	BNX2_MCP_CPU_MODE_BAD_DATA_HALT	(1L<<11)	bnx2.h
25091	BNX2_MCP_CPU_MODE_BAD_INST_HALT	(1L<<12)	bnx2.h
25092	BNX2_MCP_CPU_MODE_FIO_ABORT_HAL	(1L<<13)	bnx2.h
25093	BNX2_MCP_CPU_MODE_SPAD_UNDERFLO	(1L<<15)	bnx2.h
25094	BNX2_MCP_CPU_STATE	0x00145004	bnx2.h
25095	BNX2_MCP_CPU_STATE_BREAKPOINT	(1L<<0)	bnx2.h
25096	BNX2_MCP_CPU_STATE_BAD_INST_HAL	(1L<<2)	bnx2.h
25097	BNX2_MCP_CPU_STATE_PAGE_0_DATA_	(1L<<3)	bnx2.h
25098	BNX2_MCP_CPU_STATE_PAGE_0_INST_	(1L<<4)	bnx2.h
25099	BNX2_MCP_CPU_STATE_BAD_DATA_ADD	(1L<<5)	bnx2.h
25100	BNX2_MCP_CPU_STATE_BAD_pc_HALTE	(1L<<6)	bnx2.h
25101	BNX2_MCP_CPU_STATE_ALIGN_HALTED	(1L<<7)	bnx2.h
25102	BNX2_MCP_CPU_STATE_FIO_ABORT_HA	(1L<<8)	bnx2.h
25103	BNX2_MCP_CPU_STATE_SOFT_HALTED	(1L<<10)	bnx2.h
25104	BNX2_MCP_CPU_STATE_SPAD_UNDERFL	(1L<<11)	bnx2.h
25105	BNX2_MCP_CPU_STATE_INTERRRUPT	(1L<<12)	bnx2.h
25106	BNX2_MCP_CPU_STATE_DATA_ACCESS_	(1L<<14)	bnx2.h
25107	BNX2_MCP_CPU_STATE_INST_FETCH_S	(1L<<15)	bnx2.h
25108	BNX2_MCP_CPU_STATE_BLOCKED_READ	(1L<<31)	bnx2.h
25109	BNX2_MCP_CPU_EVENT_MASK	0x00145008	bnx2.h
25110	BNX2_MCP_CPU_EVENT_MASK_BREAKPO	(1L<<0)	bnx2.h
25111	BNX2_MCP_CPU_EVENT_MASK_BAD_INS	(1L<<2)	bnx2.h
25112	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<3)	bnx2.h
25113	BNX2_MCP_CPU_EVENT_MASK_PAGE_0_	(1L<<4)	bnx2.h
25114	BNX2_MCP_CPU_EVENT_MASK_BAD_DAT	(1L<<5)	bnx2.h
25115	BNX2_MCP_CPU_EVENT_MASK_BAD_PC_	(1L<<6)	bnx2.h
25116	BNX2_MCP_CPU_EVENT_MASK_ALIGN_H	(1L<<7)	bnx2.h
25117	BNX2_MCP_CPU_EVENT_MASK_FIO_ABO	(1L<<8)	bnx2.h
25118	BNX2_MCP_CPU_EVENT_MASK_SOFT_HA	(1L<<10)	bnx2.h
25119	BNX2_MCP_CPU_EVENT_MASK_SPAD_UN	(1L<<11)	bnx2.h
25120	BNX2_MCP_CPU_EVENT_MASK_INTERRU	(1L<<12)	bnx2.h
25121	BNX2_MCP_CPU_PROGRAM_COUNTER	0x0014501c	bnx2.h
25122	BNX2_MCP_CPU_INSTRUCTION	0x00145020	bnx2.h
25123	BNX2_MCP_CPU_DATA_ACCESS	0x00145024	bnx2.h
25124	BNX2_MCP_CPU_INTERRUPT_ENABLE	0x00145028	bnx2.h
25125	BNX2_MCP_CPU_INTERRUPT_VECTOR	0x0014502c	bnx2.h
25126	BNX2_MCP_CPU_INTERRUPT_SAVED_PC	0x00145030	bnx2.h
25127	BNX2_MCP_CPU_HW_BREAKPOINT	0x00145034	bnx2.h
25128	BNX2_MCP_CPU_HW_BREAKPOINT_DISA	(1L<<0)	bnx2.h
25129	BNX2_MCP_CPU_HW_BREAKPOINT_ADDR	(0x3fffffffL<<2)	bnx2.h
25130	BNX2_MCP_CPU_DEBUG_VECT_PEEK	0x00145038	bnx2.h
25131	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0x7ffL<<0)	bnx2.h
25132	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(1L<<11)	bnx2.h
25133	BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_	(0xfL<<12)	bnx2.h
25134	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0x7ffL<<16)	bnx2.h
25135	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(1L<<27)	bnx2.h
25136	BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_	(0xfL<<28)	bnx2.h
25137	BNX2_MCP_CPU_LAST_BRANCH_ADDR	0x00145048	bnx2.h
25138	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
25139	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(0L<<1)	bnx2.h
25140	BNX2_MCP_CPU_LAST_BRANCH_ADDR_T	(1L<<1)	bnx2.h
25141	BNX2_MCP_CPU_LAST_BRANCH_ADDR_L	(0x3fffffffL<<2)	bnx2.h
25142	BNX2_MCP_CPU_REG_FILE	0x00145200	bnx2.h
25143	BNX2_MCP_MCPQ_FTQ_DATA	0x001453c0	bnx2.h
25144	BNX2_MCP_MCPQ_FTQ_CMD	0x001453f8	bnx2.h
25145	BNX2_MCP_MCPQ_FTQ_CMD_OFFSET	(0x3ffL<<0)	bnx2.h
25146	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP	(1L<<10)	bnx2.h
25147	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0	(0L<<10)	bnx2.h
25148	BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1	(1L<<10)	bnx2.h
25149	BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET	(1L<<25)	bnx2.h
25150	BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA	(1L<<26)	bnx2.h
25151	BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTER	(1L<<27)	bnx2.h
25152	BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA	(1L<<28)	bnx2.h
25153	BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE	(1L<<29)	bnx2.h
25154	BNX2_MCP_MCPQ_FTQ_CMD_POP	(1L<<30)	bnx2.h
25155	BNX2_MCP_MCPQ_FTQ_CMD_BUSY	(1L<<31)	bnx2.h
25156	BNX2_MCP_MCPQ_FTQ_CTL	0x001453fc	bnx2.h
25157	BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE	(1L<<0)	bnx2.h
25158	BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW	(1L<<1)	bnx2.h
25159	BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INT	(1L<<2)	bnx2.h
25160	BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH	(0x3ffL<<12)	bnx2.h
25161	BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH	(0x3ffL<<22)	bnx2.h
25162	BNX2_MCP_ROM	0x00150000	bnx2.h
25163	BNX2_MCP_SCRATCH	0x00160000	bnx2.h
25164	BNX2_SHM_HDR_SIGNATURE	BNX2_MCP_SCRATCH	bnx2.h
25165	BNX2_SHM_HDR_SIGNATURE_SIG_MASK	0xffff0000	bnx2.h
25166	BNX2_SHM_HDR_SIGNATURE_SIG	0x53530000	bnx2.h
25167	BNX2_SHM_HDR_SIGNATURE_VER_MASK	0x000000ff	bnx2.h
25168	BNX2_SHM_HDR_SIGNATURE_VER_ONE	0x00000001	bnx2.h
25169	BNX2_SHM_HDR_ADDR_0	BNX2_MCP_SCRATCH + 4	bnx2.h
25170	BNX2_SHM_HDR_ADDR_1	BNX2_MCP_SCRATCH + 8	bnx2.h
25171	NUM_MC_HASH_REGISTERS	8	bnx2.h
25172	PHY_BCM5706_PHY_ID	0x00206160	bnx2.h
25173	BCM5708S_UP1	0xb	bnx2.h
25174	BCM5708S_UP1_2G5	0x1	bnx2.h
25175	BCM5708S_BLK_ADDR	0x1f	bnx2.h
25176	BCM5708S_BLK_ADDR_DIG	0x0000	bnx2.h
25177	BCM5708S_BLK_ADDR_DIG3	0x0002	bnx2.h
25178	BCM5708S_BLK_ADDR_TX_MISC	0x0005	bnx2.h
25179	BCM5708S_1000X_CTL1	0x10	bnx2.h
25180	BCM5708S_1000X_CTL1_FIBER_MODE	0x0001	bnx2.h
25181	BCM5708S_1000X_CTL1_AUTODET_EN	0x0010	bnx2.h
25182	BCM5708S_1000X_CTL2	0x11	bnx2.h
25183	BCM5708S_1000X_CTL2_PLLEL_DET_E	0x0001	bnx2.h
25184	BCM5708S_1000X_STAT1	0x14	bnx2.h
25185	BCM5708S_1000X_STAT1_SGMII	0x0001	bnx2.h
25186	BCM5708S_1000X_STAT1_LINK	0x0002	bnx2.h
25187	BCM5708S_1000X_STAT1_FD	0x0004	bnx2.h
25188	BCM5708S_1000X_STAT1_SPEED_MASK	0x0018	bnx2.h
25189	BCM5708S_1000X_STAT1_SPEED_10	0x0000	bnx2.h
25190	BCM5708S_1000X_STAT1_SPEED_100	0x0008	bnx2.h
25191	BCM5708S_1000X_STAT1_SPEED_1G	0x0010	bnx2.h
25192	BCM5708S_1000X_STAT1_SPEED_2G5	0x0018	bnx2.h
25193	BCM5708S_1000X_STAT1_TX_PAUSE	0x0020	bnx2.h
25194	BCM5708S_1000X_STAT1_RX_PAUSE	0x0040	bnx2.h
25195	BCM5708S_DIG_3_0	0x10	bnx2.h
25196	BCM5708S_DIG_3_0_USE_IEEE	0x0001	bnx2.h
25197	BCM5708S_TX_ACTL1	0x15	bnx2.h
25198	BCM5708S_TX_ACTL1_DRIVER_VCM	0x30	bnx2.h
25199	BCM5708S_TX_ACTL3	0x17	bnx2.h
25200	MIN_ETHERNET_PACKET_SIZE	60	bnx2.h
25201	MAX_ETHERNET_PACKET_SIZE	1514	bnx2.h
25202	MAX_ETHERNET_JUMBO_PACKET_SIZE	9014	bnx2.h
25203	RX_COPY_THRESH	92	bnx2.h
25204	DMA_READ_CHANS	5	bnx2.h
25205	DMA_WRITE_CHANS	3	bnx2.h
25206	BCM_PAGE_BITS	12	bnx2.h
25207	BCM_PAGE_SIZE	(1 << BCM_PAGE_BITS)	bnx2.h
25208	TX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct tx_bd))	bnx2.h
25209	MAX_TX_DESC_CNT	(TX_DESC_CNT - 1)	bnx2.h
25210	MAX_RX_RINGS	4	bnx2.h
25211	RX_DESC_CNT	(BCM_PAGE_SIZE / sizeof(struct rx_bd))	bnx2.h
25212	MAX_RX_DESC_CNT	(RX_DESC_CNT - 1)	bnx2.h
25213	MAX_TOTAL_RX_DESC_CNT	(MAX_RX_DESC_CNT * MAX_RX_RINGS)	bnx2.h
25214	CTX_SHIFT	7	bnx2.h
25215	CTX_SIZE	(1 << CTX_SHIFT)	bnx2.h
25216	CTX_MASK	(CTX_SIZE - 1)	bnx2.h
25217	PHY_CTX_SHIFT	6	bnx2.h
25218	PHY_CTX_SIZE	(1 << PHY_CTX_SHIFT)	bnx2.h
25219	PHY_CTX_MASK	(PHY_CTX_SIZE - 1)	bnx2.h
25220	MB_KERNEL_CTX_SHIFT	8	bnx2.h
25221	MB_KERNEL_CTX_SIZE	(1 << MB_KERNEL_CTX_SHIFT)	bnx2.h
25222	MB_KERNEL_CTX_MASK	(MB_KERNEL_CTX_SIZE - 1)	bnx2.h
25223	MAX_CID_CNT	0x4000	bnx2.h
25224	MAX_CID_ADDR	(GET_CID_ADDR(MAX_CID_CNT))	bnx2.h
25225	INVALID_CID_ADDR	0xffffffff	bnx2.h
25226	TX_CID	16	bnx2.h
25227	RX_CID	0	bnx2.h
25228	MB_TX_CID_ADDR	MB_GET_CID_ADDR(TX_CID)	bnx2.h
25229	MB_RX_CID_ADDR	MB_GET_CID_ADDR(RX_CID)	bnx2.h
25230	SEEPROM_PAGE_BITS	2	bnx2.h
25231	SEEPROM_PHY_PAGE_SIZE	(1 << SEEPROM_PAGE_BITS)	bnx2.h
25232	SEEPROM_BYTE_ADDR_MASK	(SEEPROM_PHY_PAGE_SIZE-1)	bnx2.h
25233	SEEPROM_PAGE_SIZE	4	bnx2.h
25234	SEEPROM_TOTAL_SIZE	65536	bnx2.h
25235	BUFFERED_FLASH_PAGE_BITS	9	bnx2.h
25236	BUFFERED_FLASH_PHY_PAGE_SIZE	(1 << BUFFERED_FLASH_PAGE_BITS)	bnx2.h
25237	BUFFERED_FLASH_BYTE_ADDR_MASK	(BUFFERED_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
25238	BUFFERED_FLASH_PAGE_SIZE	264	bnx2.h
25239	BUFFERED_FLASH_TOTAL_SIZE	0x21000	bnx2.h
25240	SAIFUN_FLASH_PAGE_BITS	8	bnx2.h
25241	SAIFUN_FLASH_PHY_PAGE_SIZE	(1 << SAIFUN_FLASH_PAGE_BITS)	bnx2.h
25242	SAIFUN_FLASH_BYTE_ADDR_MASK	(SAIFUN_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
25243	SAIFUN_FLASH_PAGE_SIZE	256	bnx2.h
25244	SAIFUN_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
25245	ST_MICRO_FLASH_PAGE_BITS	8	bnx2.h
25246	ST_MICRO_FLASH_PHY_PAGE_SIZE	(1 << ST_MICRO_FLASH_PAGE_BITS)	bnx2.h
25247	ST_MICRO_FLASH_BYTE_ADDR_MASK	(ST_MICRO_FLASH_PHY_PAGE_SIZE-1)	bnx2.h
25248	ST_MICRO_FLASH_PAGE_SIZE	256	bnx2.h
25249	ST_MICRO_FLASH_BASE_TOTAL_SIZE	65536	bnx2.h
25250	NVRAM_TIMEOUT_COUNT	30000	bnx2.h
25251	FLASH_STRAP_MASK	(BNX2_NVM_CFG1_FLASH_MODE \| \ BNX2_NVM_CFG1_BUFFER_MODE \| \ BNX2_NVM_CFG1_PROTECT_MODE \| \ BNX2_NVM_CFG1_FLASH_SIZE)	bnx2.h
25252	FLASH_BACKUP_STRAP_MASK	(0xf << 26)	bnx2.h
25253	RV2P_PROC1	0	bnx2.h
25254	RV2P_PROC2	1	bnx2.h
25255	DRV_PULSE_PERIOD_MS	250	bnx2.h
25256	FW_ACK_TIME_OUT_MS	100	bnx2.h
25257	BNX2_DRV_RESET_SIGNATURE	0x00000000	bnx2.h
25258	BNX2_DRV_RESET_SIGNATURE_MAGIC	0x4841564b	bnx2.h	HAVK
25259	BNX2_DRV_MB	0x00000004	bnx2.h
25260	BNX2_DRV_MSG_CODE	0xff000000	bnx2.h
25261	BNX2_DRV_MSG_CODE_RESET	0x01000000	bnx2.h
25262	BNX2_DRV_MSG_CODE_UNLOAD	0x02000000	bnx2.h
25263	BNX2_DRV_MSG_CODE_SHUTDOWN	0x03000000	bnx2.h
25264	BNX2_DRV_MSG_CODE_SUSPEND_WOL	0x04000000	bnx2.h
25265	BNX2_DRV_MSG_CODE_FW_TIMEOUT	0x05000000	bnx2.h
25266	BNX2_DRV_MSG_CODE_PULSE	0x06000000	bnx2.h
25267	BNX2_DRV_MSG_CODE_DIAG	0x07000000	bnx2.h
25268	BNX2_DRV_MSG_CODE_SUSPEND_NO_WO	0x09000000	bnx2.h
25269	BNX2_DRV_MSG_DATA	0x00ff0000	bnx2.h
25270	BNX2_DRV_MSG_DATA_WAIT0	0x00010000	bnx2.h
25271	BNX2_DRV_MSG_DATA_WAIT1	0x00020000	bnx2.h
25272	BNX2_DRV_MSG_DATA_WAIT2	0x00030000	bnx2.h
25273	BNX2_DRV_MSG_DATA_WAIT3	0x00040000	bnx2.h
25274	BNX2_DRV_MSG_SEQ	0x0000ffff	bnx2.h
25275	BNX2_FW_MB	0x00000008	bnx2.h
25276	BNX2_FW_MSG_ACK	0x0000ffff	bnx2.h
25277	BNX2_FW_MSG_STATUS_MASK	0x00ff0000	bnx2.h
25278	BNX2_FW_MSG_STATUS_OK	0x00000000	bnx2.h
25279	BNX2_FW_MSG_STATUS_FAILURE	0x00ff0000	bnx2.h
25280	BNX2_LINK_STATUS	0x0000000c	bnx2.h
25281	BNX2_LINK_STATUS_INIT_VALUE	0xffffffff	bnx2.h
25282	BNX2_LINK_STATUS_LINK_UP	0x1	bnx2.h
25283	BNX2_LINK_STATUS_LINK_DOWN	0x0	bnx2.h
25284	BNX2_LINK_STATUS_SPEED_MASK	0x1e	bnx2.h
25285	BNX2_LINK_STATUS_AN_INCOMPLETE	(0<<1)	bnx2.h
25286	BNX2_LINK_STATUS_10HALF	(1<<1)	bnx2.h
25287	BNX2_LINK_STATUS_10FULL	(2<<1)	bnx2.h
25288	BNX2_LINK_STATUS_100HALF	(3<<1)	bnx2.h
25289	BNX2_LINK_STATUS_100BASE_T4	(4<<1)	bnx2.h
25290	BNX2_LINK_STATUS_100FULL	(5<<1)	bnx2.h
25291	BNX2_LINK_STATUS_1000HALF	(6<<1)	bnx2.h
25292	BNX2_LINK_STATUS_1000FULL	(7<<1)	bnx2.h
25293	BNX2_LINK_STATUS_2500HALF	(8<<1)	bnx2.h
25294	BNX2_LINK_STATUS_2500FULL	(9<<1)	bnx2.h
25295	BNX2_LINK_STATUS_AN_ENABLED	(1<<5)	bnx2.h
25296	BNX2_LINK_STATUS_AN_COMPLETE	(1<<6)	bnx2.h
25297	BNX2_LINK_STATUS_PARALLEL_DET	(1<<7)	bnx2.h
25298	BNX2_LINK_STATUS_RESERVED	(1<<8)	bnx2.h
25299	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<9)	bnx2.h
25300	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<10)	bnx2.h
25301	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<11)	bnx2.h
25302	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<12)	bnx2.h
25303	BNX2_LINK_STATUS_PARTNER_AD_100	(1<<13)	bnx2.h
25304	BNX2_LINK_STATUS_PARTNER_AD_10F	(1<<14)	bnx2.h
25305	BNX2_LINK_STATUS_PARTNER_AD_10H	(1<<15)	bnx2.h
25306	BNX2_LINK_STATUS_TX_FC_ENABLED	(1<<16)	bnx2.h
25307	BNX2_LINK_STATUS_RX_FC_ENABLED	(1<<17)	bnx2.h
25308	BNX2_LINK_STATUS_PARTNER_SYM_PA	(1<<18)	bnx2.h
25309	BNX2_LINK_STATUS_PARTNER_ASYM_P	(1<<19)	bnx2.h
25310	BNX2_LINK_STATUS_SERDES_LINK	(1<<20)	bnx2.h
25311	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<21)	bnx2.h
25312	BNX2_LINK_STATUS_PARTNER_AD_250	(1<<22)	bnx2.h
25313	BNX2_DRV_PULSE_MB	0x00000010	bnx2.h
25314	BNX2_DRV_PULSE_SEQ_MASK	0x00007fff	bnx2.h
25315	BNX2_DRV_MSG_DATA_PULSE_CODE_AL	0x00080000	bnx2.h
25316	BNX2_DEV_INFO_SIGNATURE	0x00000020	bnx2.h
25317	BNX2_DEV_INFO_SIGNATURE_MAGIC	0x44564900	bnx2.h
25318	BNX2_DEV_INFO_SIGNATURE_MAGIC_M	0xffffff00	bnx2.h
25319	BNX2_DEV_INFO_FEATURE_CFG_VALID	0x01	bnx2.h
25320	BNX2_DEV_INFO_SECONDARY_PORT	0x80	bnx2.h
25321	BNX2_DEV_INFO_DRV_ALWAYS_ALIVE	0x40	bnx2.h
25322	BNX2_SHARED_HW_CFG_PART_NUM	0x00000024	bnx2.h
25323	BNX2_SHARED_HW_CFG_POWER_DISSIP	0x00000034	bnx2.h
25324	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff000000	bnx2.h
25325	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff0000	bnx2.h
25326	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff00	bnx2.h
25327	BNX2_SHARED_HW_CFG_POWER_STATE_	0xff	bnx2.h
25328	BNX2_SHARED_HW_CFG	POWER_CONSUMED 0x00000038	bnx2.h
25329	BNX2_SHARED_HW_CFG_CONFIG	0x0000003c	bnx2.h
25330	BNX2_SHARED_HW_CFG_DESIGN_NIC	0	bnx2.h
25331	BNX2_SHARED_HW_CFG_DESIGN_LOM	0x1	bnx2.h
25332	BNX2_SHARED_HW_CFG_PHY_COPPER	0	bnx2.h
25333	BNX2_SHARED_HW_CFG_PHY_FIBER	0x2	bnx2.h
25334	BNX2_SHARED_HW_CFG_PHY_2_5G	0x20	bnx2.h
25335	BNX2_SHARED_HW_CFG_PHY_BACKPLAN	0x40	bnx2.h
25336	BNX2_SHARED_HW_CFG_LED_MODE_SHI	8	bnx2.h
25337	BNX2_SHARED_HW_CFG_LED_MODE_MAS	0x300	bnx2.h
25338	BNX2_SHARED_HW_CFG_LED_MODE_MAC	0	bnx2.h
25339	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x100	bnx2.h
25340	BNX2_SHARED_HW_CFG_LED_MODE_GPH	0x200	bnx2.h
25341	BNX2_SHARED_HW_CFG_CONFIG2	0x00000040	bnx2.h
25342	BNX2_SHARED_HW_CFG2_NVM_SIZE_MA	0x00fff000	bnx2.h
25343	BNX2_DEV_INFO_BC_REV	0x0000004c	bnx2.h
25344	BNX2_PORT_HW_CFG_MAC_UPPER	0x00000050	bnx2.h
25345	BNX2_PORT_HW_CFG_UPPERMAC_MASK	0xffff	bnx2.h
25346	BNX2_PORT_HW_CFG_MAC_LOWER	0x00000054	bnx2.h
25347	BNX2_PORT_HW_CFG_CONFIG	0x00000058	bnx2.h
25348	BNX2_PORT_HW_CFG_CFG_TXCTL3_MAS	0x0000ffff	bnx2.h
25349	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x001f0000	bnx2.h
25350	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00000000	bnx2.h
25351	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00030000	bnx2.h
25352	BNX2_PORT_HW_CFG_CFG_DFLT_LINK_	0x00040000	bnx2.h
25353	BNX2_PORT_HW_CFG_IMD_MAC_A_UPPE	0x00000068	bnx2.h
25354	BNX2_PORT_HW_CFG_IMD_MAC_A_LOWE	0x0000006c	bnx2.h
25355	BNX2_PORT_HW_CFG_IMD_MAC_B_UPPE	0x00000070	bnx2.h
25356	BNX2_PORT_HW_CFG_IMD_MAC_B_LOWE	0x00000074	bnx2.h
25357	BNX2_PORT_HW_CFG_ISCSI_MAC_UPPE	0x00000078	bnx2.h
25358	BNX2_PORT_HW_CFG_ISCSI_MAC_LOWE	0x0000007c	bnx2.h
25359	BNX2_DEV_INFO_PER_PORT_HW_CONFI	0x000000b4	bnx2.h
25360	BNX2_DEV_INFO_FORMAT_REV	0x000000c4	bnx2.h
25361	BNX2_DEV_INFO_FORMAT_REV_MASK	0xff000000	bnx2.h
25362	BNX2_DEV_INFO_FORMAT_REV_ID	('A' << 24)	bnx2.h
25363	BNX2_SHARED_FEATURE	0x000000c8	bnx2.h
25364	BNX2_SHARED_FEATURE_MASK	0xffffffff	bnx2.h
25365	BNX2_PORT_FEATURE	0x000000d8	bnx2.h
25366	BNX2_PORT2_FEATURE	0x00000014c	bnx2.h
25367	BNX2_PORT_FEATURE_WOL_ENABLED	0x01000000	bnx2.h
25368	BNX2_PORT_FEATURE_MBA_ENABLED	0x02000000	bnx2.h
25369	BNX2_PORT_FEATURE_ASF_ENABLED	0x04000000	bnx2.h
25370	BNX2_PORT_FEATURE_IMD_ENABLED	0x08000000	bnx2.h
25371	BNX2_PORT_FEATURE_BAR1_SIZE_MAS	0xf	bnx2.h
25372	BNX2_PORT_FEATURE_BAR1_SIZE_DIS	0x0	bnx2.h
25373	BNX2_PORT_FEATURE_BAR1_SIZE_64K	0x1	bnx2.h
25374	BNX2_PORT_FEATURE_BAR1_SIZE_128	0x2	bnx2.h
25375	BNX2_PORT_FEATURE_BAR1_SIZE_256	0x3	bnx2.h
25376	BNX2_PORT_FEATURE_BAR1_SIZE_512	0x4	bnx2.h
25377	BNX2_PORT_FEATURE_BAR1_SIZE_1M	0x5	bnx2.h
25378	BNX2_PORT_FEATURE_BAR1_SIZE_2M	0x6	bnx2.h
25379	BNX2_PORT_FEATURE_BAR1_SIZE_4M	0x7	bnx2.h
25380	BNX2_PORT_FEATURE_BAR1_SIZE_8M	0x8	bnx2.h
25381	BNX2_PORT_FEATURE_BAR1_SIZE_16M	0x9	bnx2.h
25382	BNX2_PORT_FEATURE_BAR1_SIZE_32M	0xa	bnx2.h
25383	BNX2_PORT_FEATURE_BAR1_SIZE_64M	0xb	bnx2.h
25384	BNX2_PORT_FEATURE_BAR1_SIZE_128	0xc	bnx2.h
25385	BNX2_PORT_FEATURE_BAR1_SIZE_256	0xd	bnx2.h
25386	BNX2_PORT_FEATURE_BAR1_SIZE_512	0xe	bnx2.h
25387	BNX2_PORT_FEATURE_BAR1_SIZE_1G	0xf	bnx2.h
25388	BNX2_PORT_FEATURE_WOL	0xdc	bnx2.h
25389	BNX2_PORT2_FEATURE_WOL	0x150	bnx2.h
25390	BNX2_PORT_FEATURE_WOL_DEFAULT_S	4	bnx2.h
25391	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
25392	BNX2_PORT_FEATURE_WOL_DEFAULT_D	0	bnx2.h
25393	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x10	bnx2.h
25394	BNX2_PORT_FEATURE_WOL_DEFAULT_A	0x20	bnx2.h
25395	BNX2_PORT_FEATURE_WOL_DEFAULT_M	0x30	bnx2.h
25396	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0xf	bnx2.h
25397	BNX2_PORT_FEATURE_WOL_LINK_SPEE	0	bnx2.h
25398	BNX2_PORT_FEATURE_WOL_LINK_SPEE	1	bnx2.h
25399	BNX2_PORT_FEATURE_WOL_LINK_SPEE	2	bnx2.h
25400	BNX2_PORT_FEATURE_WOL_LINK_SPEE	3	bnx2.h
25401	BNX2_PORT_FEATURE_WOL_LINK_SPEE	4	bnx2.h
25402	BNX2_PORT_FEATURE_WOL_LINK_SPEE	5	bnx2.h
25403	BNX2_PORT_FEATURE_WOL_LINK_SPEE	6	bnx2.h
25404	BNX2_PORT_FEATURE_WOL_AUTONEG_A	0x40	bnx2.h
25405	BNX2_PORT_FEATURE_WOL_RESERVED_	0x400	bnx2.h
25406	BNX2_PORT_FEATURE_WOL_RESERVED_	0x800	bnx2.h
25407	BNX2_PORT_FEATURE_MBA	0xe0	bnx2.h
25408	BNX2_PORT2_FEATURE_MBA	0x154	bnx2.h
25409	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
25410	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0x3	bnx2.h
25411	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	0	bnx2.h
25412	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	1	bnx2.h
25413	BNX2_PORT_FEATURE_MBA_BOOT_AGEN	2	bnx2.h
25414	BNX2_PORT_FEATURE_MBA_LINK_SPEE	2	bnx2.h
25415	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x3c	bnx2.h
25416	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0	bnx2.h
25417	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x4	bnx2.h
25418	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x8	bnx2.h
25419	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0xc	bnx2.h
25420	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x10	bnx2.h
25421	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x14	bnx2.h
25422	BNX2_PORT_FEATURE_MBA_LINK_SPEE	0x18	bnx2.h
25423	BNX2_PORT_FEATURE_MBA_SETUP_PRO	0x40	bnx2.h
25424	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0	bnx2.h
25425	BNX2_PORT_FEATURE_MBA_HOTKEY_CT	0x80	bnx2.h
25426	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	8	bnx2.h
25427	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xff00	bnx2.h
25428	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0	bnx2.h
25429	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x100	bnx2.h
25430	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x200	bnx2.h
25431	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x300	bnx2.h
25432	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x400	bnx2.h
25433	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x500	bnx2.h
25434	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x600	bnx2.h
25435	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x700	bnx2.h
25436	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x800	bnx2.h
25437	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0x900	bnx2.h
25438	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xa00	bnx2.h
25439	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xb00	bnx2.h
25440	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xc00	bnx2.h
25441	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xd00	bnx2.h
25442	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xe00	bnx2.h
25443	BNX2_PORT_FEATURE_MBA_EXP_ROM_S	0xf00	bnx2.h
25444	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	16	bnx2.h
25445	BNX2_PORT_FEATURE_MBA_MSG_TIMEO	0xf0000	bnx2.h
25446	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	20	bnx2.h
25447	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
25448	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0	bnx2.h
25449	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x100000	bnx2.h
25450	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x200000	bnx2.h
25451	BNX2_PORT_FEATURE_MBA_BIOS_BOOT	0x300000	bnx2.h
25452	BNX2_PORT_FEATURE_IMD	0xe4	bnx2.h
25453	BNX2_PORT2_FEATURE_IMD	0x158	bnx2.h
25454	BNX2_PORT_FEATURE_IMD_LINK_OVER	0	bnx2.h
25455	BNX2_PORT_FEATURE_IMD_LINK_OVER	1	bnx2.h
25456	BNX2_PORT_FEATURE_VLAN	0xe8	bnx2.h
25457	BNX2_PORT2_FEATURE_VLAN	0x15c	bnx2.h
25458	BNX2_PORT_FEATURE_MBA_VLAN_TAG_	0xffff	bnx2.h
25459	BNX2_PORT_FEATURE_MBA_VLAN_ENAB	0x10000	bnx2.h
25460	BNX2_BC_STATE_RESET_TYPE	0x000001c0	bnx2.h
25461	BNX2_BC_STATE_RESET_TYPE_SIG	0x00005254	bnx2.h
25462	BNX2_BC_STATE_RESET_TYPE_SIG_MA	0x0000ffff	bnx2.h
25463	BNX2_BC_STATE_RESET_TYPE_NONE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00010000)	bnx2.h
25464	BNX2_BC_STATE_RESET_TYPE_PCI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00020000)	bnx2.h
25465	BNX2_BC_STATE_RESET_TYPE_VAUX	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ 0x00030000)	bnx2.h
25466	BNX2_BC_STATE_RESET_TYPE_DRV_MA	DRV_MSG_CODE	bnx2.h
25467	BNX2_BC_STATE_RESET_TYPE_DRV_RE	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_RESET)	bnx2.h
25468	BNX2_BC_STATE_RESET_TYPE_DRV_UN	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_UNLOAD)	bnx2.h
25469	BNX2_BC_STATE_RESET_TYPE_DRV_SH	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_SHUTDOWN)	bnx2.h
25470	BNX2_BC_STATE_RESET_TYPE_DRV_WO	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_WOL)	bnx2.h
25471	BNX2_BC_STATE_RESET_TYPE_DRV_DI	(BNX2_BC_STATE_RESET_TYPE_SIG \| \ DRV_MSG_CODE_DIAG)	bnx2.h
25472	BNX2_BC_STATE	0x000001c4	bnx2.h
25473	BNX2_BC_STATE_ERR_MASK	0x0000ff00	bnx2.h
25474	BNX2_BC_STATE_SIGN	0x42530000	bnx2.h
25475	BNX2_BC_STATE_SIGN_MASK	0xffff0000	bnx2.h
25476	BNX2_BC_STATE_BC1_START	(BNX2_BC_STATE_SIGN \| 0x1)	bnx2.h
25477	BNX2_BC_STATE_GET_NVM_CFG1	(BNX2_BC_STATE_SIGN \| 0x2)	bnx2.h
25478	BNX2_BC_STATE_PROG_BAR	(BNX2_BC_STATE_SIGN \| 0x3)	bnx2.h
25479	BNX2_BC_STATE_INIT_VID	(BNX2_BC_STATE_SIGN \| 0x4)	bnx2.h
25480	BNX2_BC_STATE_GET_NVM_CFG2	(BNX2_BC_STATE_SIGN \| 0x5)	bnx2.h
25481	BNX2_BC_STATE_APPLY_WKARND	(BNX2_BC_STATE_SIGN \| 0x6)	bnx2.h
25482	BNX2_BC_STATE_LOAD_BC2	(BNX2_BC_STATE_SIGN \| 0x7)	bnx2.h
25483	BNX2_BC_STATE_GOING_BC2	(BNX2_BC_STATE_SIGN \| 0x8)	bnx2.h
25484	BNX2_BC_STATE_GOING_DIAG	(BNX2_BC_STATE_SIGN \| 0x9)	bnx2.h
25485	BNX2_BC_STATE_RT_FINAL_INIT	(BNX2_BC_STATE_SIGN \| 0x81)	bnx2.h
25486	BNX2_BC_STATE_RT_WKARND	(BNX2_BC_STATE_SIGN \| 0x82)	bnx2.h
25487	BNX2_BC_STATE_RT_DRV_PULSE	(BNX2_BC_STATE_SIGN \| 0x83)	bnx2.h
25488	BNX2_BC_STATE_RT_FIOEVTS	(BNX2_BC_STATE_SIGN \| 0x84)	bnx2.h
25489	BNX2_BC_STATE_RT_DRV_CMD	(BNX2_BC_STATE_SIGN \| 0x85)	bnx2.h
25490	BNX2_BC_STATE_RT_LOW_POWER	(BNX2_BC_STATE_SIGN \| 0x86)	bnx2.h
25491	BNX2_BC_STATE_RT_SET_WOL	(BNX2_BC_STATE_SIGN \| 0x87)	bnx2.h
25492	BNX2_BC_STATE_RT_OTHER_FW	(BNX2_BC_STATE_SIGN \| 0x88)	bnx2.h
25493	BNX2_BC_STATE_RT_GOING_D3	(BNX2_BC_STATE_SIGN \| 0x89)	bnx2.h
25494	BNX2_BC_STATE_ERR_BAD_VERSION	(BNX2_BC_STATE_SIGN \| 0x0100)	bnx2.h
25495	BNX2_BC_STATE_ERR_BAD_BC2_CRC	(BNX2_BC_STATE_SIGN \| 0x0200)	bnx2.h
25496	BNX2_BC_STATE_ERR_BC1_LOOP	(BNX2_BC_STATE_SIGN \| 0x0300)	bnx2.h
25497	BNX2_BC_STATE_ERR_UNKNOWN_CMD	(BNX2_BC_STATE_SIGN \| 0x0400)	bnx2.h
25498	BNX2_BC_STATE_ERR_DRV_DEAD	(BNX2_BC_STATE_SIGN \| 0x0500)	bnx2.h
25499	BNX2_BC_STATE_ERR_NO_RXP	(BNX2_BC_STATE_SIGN \| 0x0600)	bnx2.h
25500	BNX2_BC_STATE_ERR_TOO_MANY_RBUF	(BNX2_BC_STATE_SIGN \| 0x0700)	bnx2.h
25501	BNX2_BC_STATE_DEBUG_CMD	0x1dc	bnx2.h
25502	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0x42440000	bnx2.h
25503	BNX2_BC_STATE_BC_DBG_CMD_SIGNAT	0xffff0000	bnx2.h
25504	BNX2_BC_STATE_BC_DBG_CMD_LOOP_C	0xffff	bnx2.h
25505	BNX2_BC_STATE_BC_DBG_CMD_LOOP_I	0xffff	bnx2.h
25506	HOST_VIEW_SHMEM_BASE	0x167c00	bnx2.h
25507	AUTONEG_DISABLE	0x00	bnx2.h
25508	AUTONEG_ENABLE	0x01	bnx2.h
25509	RX_OFFSET	(sizeof(struct l2_fhdr) + 2)	bnx2.h
25510	RX_BUF_CNT	20	bnx2.h
25511	RX_BUF_USE_SIZE	(ETH_MAX_MTU + ETH_HLEN + RX_OFFSET + 8)	bnx2.h
25512	RX_BUF_SIZE	(L1_CACHE_ALIGN(RX_BUF_USE_SIZE + 8))	bnx2.h
25513	PP_ChipID	0x0000	cs89x0.h	offset 0h -> Corp -ID
25514	PP_ISAIOB	0x0020	cs89x0.h	IO base address
25515	PP_CS8900_ISAINT	0x0022	cs89x0.h	ISA interrupt select
25516	PP_CS8920_ISAINT	0x0370	cs89x0.h	ISA interrupt select
25517	PP_CS8900_ISADMA	0x0024	cs89x0.h	ISA Rec DMA channel
25518	PP_CS8920_ISADMA	0x0374	cs89x0.h	ISA Rec DMA channel
25519	PP_ISASOF	0x0026	cs89x0.h	ISA DMA offset
25520	PP_DmaFrameCnt	0x0028	cs89x0.h	ISA DMA Frame count
25521	PP_DmaByteCnt	0x002A	cs89x0.h	ISA DMA Byte count
25522	PP_CS8900_ISAMemB	0x002C	cs89x0.h	Memory base
25523	PP_CS8920_ISAMemB	0x0348	cs89x0.h
25524	PP_ISABootBase	0x0030	cs89x0.h	Boot Prom base
25525	PP_ISABootMask	0x0034	cs89x0.h	Boot Prom Mask
25526	PP_EECMD	0x0040	cs89x0.h	NVR Interface Command register
25527	PP_EEData	0x0042	cs89x0.h	NVR Interface Data Register
25528	PP_DebugReg	0x0044	cs89x0.h	Debug Register
25529	PP_RxCFG	0x0102	cs89x0.h	Rx Bus config
25530	PP_RxCTL	0x0104	cs89x0.h	Receive Control Register
25531	PP_TxCFG	0x0106	cs89x0.h	Transmit Config Register
25532	PP_TxCMD	0x0108	cs89x0.h	Transmit Command Register
25533	PP_BufCFG	0x010A	cs89x0.h	Bus configuration Register
25534	PP_LineCTL	0x0112	cs89x0.h	Line Config Register
25535	PP_SelfCTL	0x0114	cs89x0.h	Self Command Register
25536	PP_BusCTL	0x0116	cs89x0.h	ISA bus control Register
25537	PP_TestCTL	0x0118	cs89x0.h	Test Register
25538	PP_AutoNegCTL	0x011C	cs89x0.h	Auto Negotiation Ctrl
25539	PP_ISQ	0x0120	cs89x0.h	Interrupt Status
25540	PP_RxEvent	0x0124	cs89x0.h	Rx Event Register
25541	PP_TxEvent	0x0128	cs89x0.h	Tx Event Register
25542	PP_BufEvent	0x012C	cs89x0.h	Bus Event Register
25543	PP_RxMiss	0x0130	cs89x0.h	Receive Miss Count
25544	PP_TxCol	0x0132	cs89x0.h	Transmit Collision Count
25545	PP_LineST	0x0134	cs89x0.h	Line State Register
25546	PP_SelfST	0x0136	cs89x0.h	Self State register
25547	PP_BusST	0x0138	cs89x0.h	Bus Status
25548	PP_TDR	0x013C	cs89x0.h	Time Domain Reflectometry
25549	PP_AutoNegST	0x013E	cs89x0.h	Auto Neg Status
25550	PP_TxCommand	0x0144	cs89x0.h	Tx Command
25551	PP_TxLength	0x0146	cs89x0.h	Tx Length
25552	PP_LAF	0x0150	cs89x0.h	Hash Table
25553	PP_IA	0x0158	cs89x0.h	Physical Address Register
25554	PP_RxStatus	0x0400	cs89x0.h	Receive start of frame
25555	PP_RxLength	0x0402	cs89x0.h	Receive Length of frame
25556	PP_RxFrame	0x0404	cs89x0.h	Receive frame pointer
25557	PP_TxFrame	0x0A00	cs89x0.h	Transmit frame pointer
25558	DEFAULTIOBASE	0x0300	cs89x0.h
25559	FIRST_IO	0x020C	cs89x0.h	First I/O port to check
25560	LAST_IO	0x037C	cs89x0.h	Last I/O port to check (+10h)
25561	ADD_MASK	0x3000	cs89x0.h	Mask it use of the ADD_PORT register
25562	ADD_SIG	0x3000	cs89x0.h	Expected ID signature
25563	CHIP_EISA_ID_SIG	0x630E	cs89x0.h	Product ID Code for Crystal Chip (CS8900 spec 4.3)
25564	EISA_ID_SIG	0x4D24	cs89x0.h	IBM
25565	PART_NO_SIG	0x1010	cs89x0.h	IBM
25566	MONGOOSE_BIT	0x0000	cs89x0.h	IBM
25567	EISA_ID_SIG	0x630E	cs89x0.h	PnP Vendor ID (same as chip id for Crystal board)
25568	PART_NO_SIG	0x4000	cs89x0.h	ID code CS8920 board (PnP Vendor Product code)
25569	MONGOOSE_BIT	0x2000	cs89x0.h	PART_NO_SIG + MONGOOSE_BUT => ID of mongoose
25570	PRODUCT_ID_ADD	0x0002	cs89x0.h	Address of product ID
25571	REG_TYPE_MASK	0x001F	cs89x0.h
25572	ERSE_WR_ENBL	0x00F0	cs89x0.h
25573	ERSE_WR_DISABLE	0x0000	cs89x0.h
25574	RX_BUF_CFG	0x0003	cs89x0.h
25575	RX_CONTROL	0x0005	cs89x0.h
25576	TX_CFG	0x0007	cs89x0.h
25577	TX_COMMAND	0x0009	cs89x0.h
25578	BUF_CFG	0x000B	cs89x0.h
25579	LINE_CONTROL	0x0013	cs89x0.h
25580	SELF_CONTROL	0x0015	cs89x0.h
25581	BUS_CONTROL	0x0017	cs89x0.h
25582	TEST_CONTROL	0x0019	cs89x0.h
25583	RX_EVENT	0x0004	cs89x0.h
25584	TX_EVENT	0x0008	cs89x0.h
25585	BUF_EVENT	0x000C	cs89x0.h
25586	RX_MISS_COUNT	0x0010	cs89x0.h
25587	TX_COL_COUNT	0x0012	cs89x0.h
25588	LINE_STATUS	0x0014	cs89x0.h
25589	SELF_STATUS	0x0016	cs89x0.h
25590	BUS_STATUS	0x0018	cs89x0.h
25591	TDR	0x001C	cs89x0.h
25592	SKIP_1	0x0040	cs89x0.h
25593	RX_STREAM_ENBL	0x0080	cs89x0.h
25594	RX_OK_ENBL	0x0100	cs89x0.h
25595	RX_DMA_ONLY	0x0200	cs89x0.h
25596	AUTO_RX_DMA	0x0400	cs89x0.h
25597	BUFFER_CRC	0x0800	cs89x0.h
25598	RX_CRC_ERROR_ENBL	0x1000	cs89x0.h
25599	RX_RUNT_ENBL	0x2000	cs89x0.h
25600	RX_EXTRA_DATA_ENBL	0x4000	cs89x0.h
25601	RX_IA_HASH_ACCEPT	0x0040	cs89x0.h
25602	RX_PROM_ACCEPT	0x0080	cs89x0.h
25603	RX_OK_ACCEPT	0x0100	cs89x0.h
25604	RX_MULTCAST_ACCEPT	0x0200	cs89x0.h
25605	RX_IA_ACCEPT	0x0400	cs89x0.h
25606	RX_BROADCAST_ACCEPT	0x0800	cs89x0.h
25607	RX_BAD_CRC_ACCEPT	0x1000	cs89x0.h
25608	RX_RUNT_ACCEPT	0x2000	cs89x0.h
25609	RX_EXTRA_DATA_ACCEPT	0x4000	cs89x0.h
25610	RX_ALL_ACCEPT	(RX_PROM_ACCEPT\|RX_BAD_CRC_ACCEPT\|RX_RUNT_ACCEPT\|RX_EXTRA_DATA_ACCEPT)	cs89x0.h
25611	DEF_RX_ACCEPT	(RX_IA_ACCEPT \| RX_BROADCAST_ACCEPT \| RX_OK_ACCEPT)	cs89x0.h
25612	TX_LOST_CRS_ENBL	0x0040	cs89x0.h
25613	TX_SQE_ERROR_ENBL	0x0080	cs89x0.h
25614	TX_OK_ENBL	0x0100	cs89x0.h
25615	TX_LATE_COL_ENBL	0x0200	cs89x0.h
25616	TX_JBR_ENBL	0x0400	cs89x0.h
25617	TX_ANY_COL_ENBL	0x0800	cs89x0.h
25618	TX_16_COL_ENBL	0x8000	cs89x0.h
25619	TX_START_4_BYTES	0x0000	cs89x0.h
25620	TX_START_64_BYTES	0x0040	cs89x0.h
25621	TX_START_128_BYTES	0x0080	cs89x0.h
25622	TX_START_ALL_BYTES	0x00C0	cs89x0.h
25623	TX_FORCE	0x0100	cs89x0.h
25624	TX_ONE_COL	0x0200	cs89x0.h
25625	TX_TWO_PART_DEFF_DISABLE	0x0400	cs89x0.h
25626	TX_NO_CRC	0x1000	cs89x0.h
25627	TX_RUNT	0x2000	cs89x0.h
25628	GENERATE_SW_INTERRUPT	0x0040	cs89x0.h
25629	RX_DMA_ENBL	0x0080	cs89x0.h
25630	READY_FOR_TX_ENBL	0x0100	cs89x0.h
25631	TX_UNDERRUN_ENBL	0x0200	cs89x0.h
25632	RX_MISS_ENBL	0x0400	cs89x0.h
25633	RX_128_BYTE_ENBL	0x0800	cs89x0.h
25634	TX_COL_COUNT_OVRFLOW_ENBL	0x1000	cs89x0.h
25635	RX_MISS_COUNT_OVRFLOW_ENBL	0x2000	cs89x0.h
25636	RX_DEST_MATCH_ENBL	0x8000	cs89x0.h
25637	SERIAL_RX_ON	0x0040	cs89x0.h
25638	SERIAL_TX_ON	0x0080	cs89x0.h
25639	AUI_ONLY	0x0100	cs89x0.h
25640	AUTO_AUI_10BASET	0x0200	cs89x0.h
25641	MODIFIED_BACKOFF	0x0800	cs89x0.h
25642	NO_AUTO_POLARITY	0x1000	cs89x0.h
25643	TWO_PART_DEFDIS	0x2000	cs89x0.h
25644	LOW_RX_SQUELCH	0x4000	cs89x0.h
25645	POWER_ON_RESET	0x0040	cs89x0.h
25646	SW_STOP	0x0100	cs89x0.h
25647	SLEEP_ON	0x0200	cs89x0.h
25648	AUTO_WAKEUP	0x0400	cs89x0.h
25649	HCB0_ENBL	0x1000	cs89x0.h
25650	HCB1_ENBL	0x2000	cs89x0.h
25651	HCB0	0x4000	cs89x0.h
25652	HCB1	0x8000	cs89x0.h
25653	RESET_RX_DMA	0x0040	cs89x0.h
25654	MEMORY_ON	0x0400	cs89x0.h
25655	DMA_BURST_MODE	0x0800	cs89x0.h
25656	IO_CHANNEL_READY_ON	0x1000	cs89x0.h
25657	RX_DMA_SIZE_64K	0x2000	cs89x0.h
25658	ENABLE_IRQ	0x8000	cs89x0.h
25659	LINK_OFF	0x0080	cs89x0.h
25660	ENDEC_LOOPBACK	0x0200	cs89x0.h
25661	AUI_LOOPBACK	0x0400	cs89x0.h
25662	BACKOFF_OFF	0x0800	cs89x0.h
25663	FAST_TEST	0x8000	cs89x0.h
25664	RX_IA_HASHED	0x0040	cs89x0.h
25665	RX_DRIBBLE	0x0080	cs89x0.h
25666	RX_OK	0x0100	cs89x0.h
25667	RX_HASHED	0x0200	cs89x0.h
25668	RX_IA	0x0400	cs89x0.h
25669	RX_BROADCAST	0x0800	cs89x0.h
25670	RX_CRC_ERROR	0x1000	cs89x0.h
25671	RX_RUNT	0x2000	cs89x0.h
25672	RX_EXTRA_DATA	0x4000	cs89x0.h
25673	HASH_INDEX_MASK	0x0FC00	cs89x0.h
25674	TX_LOST_CRS	0x0040	cs89x0.h
25675	TX_SQE_ERROR	0x0080	cs89x0.h
25676	TX_OK	0x0100	cs89x0.h
25677	TX_LATE_COL	0x0200	cs89x0.h
25678	TX_JBR	0x0400	cs89x0.h
25679	TX_16_COL	0x8000	cs89x0.h
25680	TX_SEND_OK_BITS	(TX_OK\|TX_LOST_CRS)	cs89x0.h
25681	TX_COL_COUNT_MASK	0x7800	cs89x0.h
25682	SW_INTERRUPT	0x0040	cs89x0.h
25683	RX_DMA	0x0080	cs89x0.h
25684	READY_FOR_TX	0x0100	cs89x0.h
25685	TX_UNDERRUN	0x0200	cs89x0.h
25686	RX_MISS	0x0400	cs89x0.h
25687	RX_128_BYTE	0x0800	cs89x0.h
25688	TX_COL_OVRFLW	0x1000	cs89x0.h
25689	RX_MISS_OVRFLW	0x2000	cs89x0.h
25690	RX_DEST_MATCH	0x8000	cs89x0.h
25691	LINK_OK	0x0080	cs89x0.h
25692	AUI_ON	0x0100	cs89x0.h
25693	TENBASET_ON	0x0200	cs89x0.h
25694	POLARITY_OK	0x1000	cs89x0.h
25695	CRS_OK	0x4000	cs89x0.h
25696	ACTIVE_33V	0x0040	cs89x0.h
25697	INIT_DONE	0x0080	cs89x0.h
25698	SI_BUSY	0x0100	cs89x0.h
25699	EEPROM_PRESENT	0x0200	cs89x0.h
25700	EEPROM_OK	0x0400	cs89x0.h
25701	EL_PRESENT	0x0800	cs89x0.h
25702	EE_SIZE_64	0x1000	cs89x0.h
25703	TX_BID_ERROR	0x0080	cs89x0.h
25704	READY_FOR_TX_NOW	0x0100	cs89x0.h
25705	RE_NEG_NOW	0x0040	cs89x0.h
25706	ALLOW_FDX	0x0080	cs89x0.h
25707	AUTO_NEG_ENABLE	0x0100	cs89x0.h
25708	NLP_ENABLE	0x0200	cs89x0.h
25709	FORCE_FDX	0x8000	cs89x0.h
25710	AUTO_NEG_BITS	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE)	cs89x0.h
25711	AUTO_NEG_MASK	(FORCE_FDX\|NLP_ENABLE\|AUTO_NEG_ENABLE\|ALLOW_FDX\|RE_NEG_NOW)	cs89x0.h
25712	AUTO_NEG_BUSY	0x0080	cs89x0.h
25713	FLP_LINK	0x0100	cs89x0.h
25714	FLP_LINK_GOOD	0x0800	cs89x0.h
25715	LINK_FAULT	0x1000	cs89x0.h
25716	HDX_ACTIVE	0x4000	cs89x0.h
25717	FDX_ACTIVE	0x8000	cs89x0.h
25718	ISQ_RECEIVER_EVENT	0x04	cs89x0.h
25719	ISQ_TRANSMITTER_EVENT	0x08	cs89x0.h
25720	ISQ_BUFFER_EVENT	0x0c	cs89x0.h
25721	ISQ_RX_MISS_EVENT	0x10	cs89x0.h
25722	ISQ_TX_COL_EVENT	0x12	cs89x0.h
25723	ISQ_EVENT_MASK	0x003F	cs89x0.h	ISQ mask to find out type of event
25724	ISQ_HIST	16	cs89x0.h	small history buffer
25725	AUTOINCREMENT	0x8000	cs89x0.h	Bit mask to set bit-15 for autoincrement
25726	TXRXBUFSIZE	0x0600	cs89x0.h
25727	RXDMABUFSIZE	0x8000	cs89x0.h
25728	RXDMASIZE	0x4000	cs89x0.h
25729	TXRX_LENGTH_MASK	0x07FF	cs89x0.h
25730	RCV_WITH_RXON	1	cs89x0.h	Set SerRx ON
25731	RCV_COUNTS	2	cs89x0.h	Use Framecnt1
25732	RCV_PONG	4	cs89x0.h	Pong respondent
25733	RCV_DONG	8	cs89x0.h	Dong operation
25734	RCV_POLLING	0x10	cs89x0.h	Poll RxEvent
25735	RCV_ISQ	0x20	cs89x0.h	Use ISQ, int
25736	RCV_AUTO_DMA	0x100	cs89x0.h	Set AutoRxDMAE
25737	RCV_DMA	0x200	cs89x0.h	Set RxDMA only
25738	RCV_DMA_ALL	0x400	cs89x0.h	Copy all DMA'ed
25739	RCV_FIXED_DATA	0x800	cs89x0.h	Every frame same
25740	RCV_IO	0x1000	cs89x0.h	Use ISA IO only
25741	RCV_MEMORY	0x2000	cs89x0.h	Use ISA Memory
25742	RAM_SIZE	0x1000	cs89x0.h	The card has 4k bytes or RAM
25743	PKT_START	PP_TxFrame	cs89x0.h	Start of packet RAM
25744	RX_FRAME_PORT	0x0000	cs89x0.h
25745	TX_FRAME_PORT	RX_FRAME_PORT	cs89x0.h
25746	TX_CMD_PORT	0x0004	cs89x0.h
25747	TX_NOW	0x0000	cs89x0.h	Tx packet after 5 bytes copied
25748	TX_AFTER_381	0x0020	cs89x0.h	Tx packet after 381 bytes copied
25749	TX_AFTER_ALL	0x00C0	cs89x0.h	Tx packet after all bytes copied
25750	TX_LEN_PORT	0x0006	cs89x0.h
25751	ISQ_PORT	0x0008	cs89x0.h
25752	ADD_PORT	0x000A	cs89x0.h
25753	DATA_PORT	0x000C	cs89x0.h
25754	EEPROM_WRITE_EN	0x00F0	cs89x0.h
25755	EEPROM_WRITE_DIS	0x0000	cs89x0.h
25756	EEPROM_WRITE_CMD	0x0100	cs89x0.h
25757	EEPROM_READ_CMD	0x0200	cs89x0.h
25758	RBUF_EVENT_LOW	0	cs89x0.h	Low byte of RxEvent - status of received frame
25759	RBUF_EVENT_HIGH	1	cs89x0.h	High byte of RxEvent - status of received frame
25760	RBUF_LEN_LOW	2	cs89x0.h	Length of received data - low byte
25761	RBUF_LEN_HI	3	cs89x0.h	Length of received data - high byte
25762	RBUF_HEAD_LEN	4	cs89x0.h	Length of this header
25763	CHIP_READ	0x1	cs89x0.h	Used to mark state of the repins code (chip or dma)
25764	DMA_READ	0x2	cs89x0.h	Used to mark state of the repins code (chip or dma)
25765	BIOS_START_SEG	0x00000	cs89x0.h
25766	BIOS_OFFSET_INC	0x0010	cs89x0.h
25767	BIOS_START_SEG	0x0c000	cs89x0.h
25768	BIOS_OFFSET_INC	0x0200	cs89x0.h
25769	BIOS_LAST_OFFSET	0x0fc00	cs89x0.h
25770	ISA_CNF_OFFSET	0x6	cs89x0.h
25771	TX_CTL_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8900 eeprom
25772	AUTO_NEG_CNF_OFFSET	(ISA_CNF_OFFSET + 8)	cs89x0.h	8920 eeprom
25773	EE_FORCE_FDX	0x8000	cs89x0.h
25774	EE_NLP_ENABLE	0x0200	cs89x0.h
25775	EE_AUTO_NEG_ENABLE	0x0100	cs89x0.h
25776	EE_ALLOW_FDX	0x0080	cs89x0.h
25777	EE_AUTO_NEG_CNF_MASK	(EE_FORCE_FDX\|EE_NLP_ENABLE\|EE_AUTO_NEG_ENABLE\|EE_ALLOW_FDX)	cs89x0.h
25778	IMM_BIT	0x0040	cs89x0.h	ignore missing media
25779	ADAPTER_CNF_OFFSET	(AUTO_NEG_CNF_OFFSET + 2)	cs89x0.h
25780	A_CNF_10B_T	0x0001	cs89x0.h
25781	A_CNF_AUI	0x0002	cs89x0.h
25782	A_CNF_10B_2	0x0004	cs89x0.h
25783	A_CNF_MEDIA_TYPE	0x0060	cs89x0.h
25784	A_CNF_MEDIA_AUTO	0x0000	cs89x0.h
25785	A_CNF_MEDIA_10B_T	0x0020	cs89x0.h
25786	A_CNF_MEDIA_AUI	0x0040	cs89x0.h
25787	A_CNF_MEDIA_10B_2	0x0060	cs89x0.h
25788	A_CNF_DC_DC_POLARITY	0x0080	cs89x0.h
25789	A_CNF_NO_AUTO_POLARITY	0x2000	cs89x0.h
25790	A_CNF_LOW_RX_SQUELCH	0x4000	cs89x0.h
25791	A_CNF_EXTND_10B_2	0x8000	cs89x0.h
25792	PACKET_PAGE_OFFSET	0x8	cs89x0.h
25793	INT_NO_MASK	0x000F	cs89x0.h
25794	DMA_NO_MASK	0x0070	cs89x0.h
25795	ISA_DMA_SIZE	0x0200	cs89x0.h
25796	ISA_AUTO_RxDMA	0x0400	cs89x0.h
25797	ISA_RxDMA	0x0800	cs89x0.h
25798	DMA_BURST	0x1000	cs89x0.h
25799	STREAM_TRANSFER	0x2000	cs89x0.h
25800	ANY_ISA_DMA	(ISA_AUTO_RxDMA \| ISA_RxDMA)	cs89x0.h
25801	DMA_BASE	0x00	cs89x0.h	DMA controller base
25802	DMA_BASE_2	0x0C0	cs89x0.h	DMA controller base
25803	DMA_STAT	0x0D0	cs89x0.h	DMA controller status register
25804	DMA_MASK	0x0D4	cs89x0.h	DMA controller mask register
25805	DMA_MODE	0x0D6	cs89x0.h	DMA controller mode register
25806	DMA_RESETFF	0x0D8	cs89x0.h	DMA controller first/last flip flop
25807	DMA_DISABLE	0x04	cs89x0.h	Disable channel n
25808	DMA_ENABLE	0x00	cs89x0.h	Enable channel n
25809	DMA_RX_MODE	0x14	cs89x0.h
25810	DMA_TX_MODE	0x18	cs89x0.h
25811	DMA_SIZE	(16*1024)	cs89x0.h	Size of dma buffer - 16k
25812	CS8900	0x0000	cs89x0.h
25813	CS8920	0x4000	cs89x0.h
25814	CS8920M	0x6000	cs89x0.h
25815	REVISON_BITS	0x1F00	cs89x0.h
25816	EEVER_NUMBER	0x12	cs89x0.h
25817	CHKSUM_LEN	0x14	cs89x0.h
25818	CHKSUM_VAL	0x0000	cs89x0.h
25819	START_EEPROM_DATA	0x001c	cs89x0.h	Offset into eeprom for start of data
25820	IRQ_MAP_EEPROM_DATA	0x0046	cs89x0.h	Offset into eeprom for the IRQ map
25821	IRQ_MAP_LEN	0x0004	cs89x0.h	No of bytes to read for the IRQ map
25822	PNP_IRQ_FRMT	0x0022	cs89x0.h	PNP small item IRQ format
25823	CS8900_IRQ_MAP	0x1c20	cs89x0.h	This IRQ map is fixed
25824	CS8920_NO_INTS	0x0F	cs89x0.h	Max CS8920 interrupt select #
25825	PNP_ADD_PORT	0x0279	cs89x0.h
25826	PNP_WRITE_PORT	0x0A79	cs89x0.h
25827	GET_PNP_ISA_STRUCT	0x40	cs89x0.h
25828	PNP_ISA_STRUCT_LEN	0x06	cs89x0.h
25829	PNP_CSN_CNT_OFF	0x01	cs89x0.h
25830	PNP_RD_PORT_OFF	0x02	cs89x0.h
25831	PNP_FUNCTION_OK	0x00	cs89x0.h
25832	PNP_WAKE	0x03	cs89x0.h
25833	PNP_RSRC_DATA	0x04	cs89x0.h
25834	PNP_RSRC_READY	0x01	cs89x0.h
25835	PNP_STATUS	0x05	cs89x0.h
25836	PNP_ACTIVATE	0x30	cs89x0.h
25837	PNP_CNF_IO_H	0x60	cs89x0.h
25838	PNP_CNF_IO_L	0x61	cs89x0.h
25839	PNP_CNF_INT	0x70	cs89x0.h
25840	PNP_CNF_DMA	0x74	cs89x0.h
25841	PNP_CNF_MEM	0x48	cs89x0.h
25842	BIT0	1	cs89x0.h
25843	BIT15	0x8000	cs89x0.h
25844	PCI_VENDOR_SMC	0x10B8	epic100.h
25845	PCI_DEVICE_SMC_EPIC100	0x0005	epic100.h
25846	PCI_DEVICE_ID_NONE	0xFFFF	epic100.h
25847	CR_STOP_RX	(0x00000001)	epic100.h
25848	CR_START_RX	(0x00000002)	epic100.h
25849	CR_QUEUE_TX	(0x00000004)	epic100.h
25850	CR_QUEUE_RX	(0x00000008)	epic100.h
25851	CR_NEXTFRAME	(0x00000010)	epic100.h
25852	CR_STOP_TX_DMA	(0x00000020)	epic100.h
25853	CR_STOP_RX_DMA	(0x00000040)	epic100.h
25854	CR_TX_UGO	(0x00000080)	epic100.h
25855	INTR_RX_THR_STA	(0x00400000)	epic100.h	rx copy threshold status NI
25856	INTR_RX_BUFF_EMPTY	(0x00200000)	epic100.h	rx buffers empty. NI
25857	INTR_TX_IN_PROG	(0x00100000)	epic100.h	tx copy in progess. NI
25858	INTR_RX_IN_PROG	(0x00080000)	epic100.h	rx copy in progress. NI
25859	INTR_TXIDLE	(0x00040000)	epic100.h	tx idle. NI
25860	INTR_RXIDLE	(0x00020000)	epic100.h	rx idle. NI
25861	INTR_INTR_ACTIVE	(0x00010000)	epic100.h	Interrupt active. NI
25862	INTR_RX_STATUS_OK	(0x00008000)	epic100.h	rx status valid. NI
25863	INTR_PCI_TGT_ABT	(0x00004000)	epic100.h	PCI Target abort
25864	INTR_PCI_MASTER_ABT	(0x00002000)	epic100.h	PCI Master abort
25865	INTR_PCI_PARITY_ERR	(0x00001000)	epic100.h	PCI adress parity error
25866	INTR_PCI_DATA_ERR	(0x00000800)	epic100.h	PCI data parity error
25867	INTR_RX_THR_CROSSED	(0x00000400)	epic100.h	rx copy threshold crossed
25868	INTR_CNTFULL	(0x00000200)	epic100.h	Counter overflow
25869	INTR_TXUNDERRUN	(0x00000100)	epic100.h	tx underrun.
25870	INTR_TXEMPTY	(0x00000080)	epic100.h	tx queue empty
25871	INTR_TX_CH_COMPLETE	(0x00000040)	epic100.h	tx chain complete
25872	INTR_TXDONE	(0x00000020)	epic100.h	tx complete (w or w/o err)
25873	INTR_RXERROR	(0x00000010)	epic100.h	rx error (CRC)
25874	INTR_RXOVERFLOW	(0x00000008)	epic100.h	rx buffer overflow
25875	INTR_RX_QUEUE_EMPTY	(0x00000004)	epic100.h	rx queue empty.
25876	INTR_RXHEADER	(0x00000002)	epic100.h	header copy complete
25877	INTR_RXDONE	(0x00000001)	epic100.h	Receive copy complete
25878	INTR_CLEARINTR	(0x00007FFF)	epic100.h
25879	INTR_VALIDBITS	(0x007FFFFF)	epic100.h
25880	INTR_DISABLE	(0x00000000)	epic100.h
25881	INTR_CLEARERRS	(0x00007F18)	epic100.h
25882	INTR_ABNINTR	(INTR_CNTFULL \| INTR_TXUNDERRUN \| INTR_RXOVERFLOW)	epic100.h
25883	GC_SOFT_RESET	(0x00000001)	epic100.h
25884	GC_INTR_ENABLE	(0x00000002)	epic100.h
25885	GC_SOFT_INTR	(0x00000004)	epic100.h
25886	GC_POWER_DOWN	(0x00000008)	epic100.h
25887	GC_ONE_COPY	(0x00000010)	epic100.h
25888	GC_BIG_ENDIAN	(0x00000020)	epic100.h
25889	GC_RX_PREEMPT_TX	(0x00000040)	epic100.h
25890	GC_TX_PREEMPT_RX	(0x00000080)	epic100.h
25891	GC_RX_FIFO_THR_32	(0x00000000)	epic100.h
25892	GC_RX_FIFO_THR_64	(0x00000100)	epic100.h
25893	GC_RX_FIFO_THR_96	(0x00000200)	epic100.h
25894	GC_RX_FIFO_THR_128	(0x00000300)	epic100.h
25895	GC_MRC_MEM_READ	(0x00000000)	epic100.h
25896	GC_MRC_READ_MULT	(0x00000400)	epic100.h
25897	GC_MRC_READ_LINE	(0x00000800)	epic100.h
25898	GC_SOFTBIT0	(0x00001000)	epic100.h
25899	GC_SOFTBIT1	(0x00002000)	epic100.h
25900	GC_RESET_PHY	(0x00004000)	epic100.h
25901	RC_SAVE_ERRORED_PKT	(0x00000001)	epic100.h
25902	RC_SAVE_RUNT_FRAMES	(0x00000002)	epic100.h
25903	RC_RCV_BROADCAST	(0x00000004)	epic100.h
25904	RC_RCV_MULTICAST	(0x00000008)	epic100.h
25905	RC_RCV_INVERSE_PKT	(0x00000010)	epic100.h
25906	RC_PROMISCUOUS_MODE	(0x00000020)	epic100.h
25907	RC_MONITOR_MODE	(0x00000040)	epic100.h
25908	RC_EARLY_RCV_ENABLE	(0x00000080)	epic100.h
25909	RD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
25910	RD_LLFORM	(0x0002)	epic100.h	Frag list format
25911	RD_HDR_CPY	(0x0004)	epic100.h	Desc used for header copy
25912	TC_EARLY_TX_ENABLE	(0x00000001)	epic100.h
25913	TC_LM_NORMAL	(0x00000000)	epic100.h
25914	TC_LM_INTERNAL	(0x00000002)	epic100.h
25915	TC_LM_EXTERNAL	(0x00000004)	epic100.h
25916	TC_LM_FULL_DPX	(0x00000006)	epic100.h
25917	TX_SLOT_TIME	(0x00000078)	epic100.h
25918	TX_FIFO_THRESH	128	epic100.h	Rounded down to 4 byte units.
25919	RRING_PKT_INTACT	(0x0001)	epic100.h
25920	RRING_ALIGN_ERR	(0x0002)	epic100.h
25921	RRING_CRC_ERR	(0x0004)	epic100.h
25922	RRING_MISSED_PKT	(0x0008)	epic100.h
25923	RRING_MULTICAST	(0x0010)	epic100.h
25924	RRING_BROADCAST	(0x0020)	epic100.h
25925	RRING_RECEIVER_DISABLE	(0x0040)	epic100.h
25926	RRING_STATUS_VALID	(0x1000)	epic100.h
25927	RRING_FRAGLIST_ERR	(0x2000)	epic100.h
25928	RRING_HDR_COPIED	(0x4000)	epic100.h
25929	RRING_OWN	(0x8000)	epic100.h
25930	RRING_ERROR	(RRING_ALIGN_ERR\|RRING_CRC_ERR)	epic100.h
25931	TRING_PKT_INTACT	(0x0001)	epic100.h	pkt transmitted.
25932	TRING_PKT_NONDEFER	(0x0002)	epic100.h	pkt xmitted w/o deferring
25933	TRING_COLL	(0x0004)	epic100.h	pkt xmitted w collisions
25934	TRING_CARR	(0x0008)	epic100.h	carrier sense lost
25935	TRING_UNDERRUN	(0x0010)	epic100.h	DMA underrun
25936	TRING_HB_COLL	(0x0020)	epic100.h	Collision detect Heartbeat
25937	TRING_WIN_COLL	(0x0040)	epic100.h	out of window collision
25938	TRING_DEFERRED	(0x0080)	epic100.h	Deferring
25939	TRING_COLL_COUNT	(0x0F00)	epic100.h	collision counter (mask)
25940	TRING_COLL_EXCESS	(0x1000)	epic100.h	tx aborted: excessive colls
25941	TRING_OWN	(0x8000)	epic100.h	desc ownership bit
25942	TRING_ABORT	(TRING_COLL_EXCESS\|TRING_WIN_COLL\|TRING_UNDERRUN)	epic100.h
25943	TRING_ERROR	(TRING_DEFERRED\|TRING_WIN_COLL\|TRING_UNDERRUN\|TRING_CARR )	epic100.h	\|TRING_COLL
25944	TD_FRAGLIST	(0x0001)	epic100.h	Desc points to a fragment list
25945	TD_LLFORM	(0x0002)	epic100.h	Frag list format
25946	TD_IAF	(0x0004)	epic100.h	Generate Interrupt after tx
25947	TD_NOCRC	(0x0008)	epic100.h	No CRC generated
25948	TD_LASTDESC	(0x0010)	epic100.h	Last desc for this frame
25949	EFAB_DUMMY_FIELD_LBN	0	etherfabric.h
25950	EFAB_DUMMY_FIELD_WIDTH	0	etherfabric.h
25951	EFAB_DWORD_0_LBN	0	etherfabric.h
25952	EFAB_DWORD_0_WIDTH	32	etherfabric.h
25953	EFAB_DWORD_1_LBN	32	etherfabric.h
25954	EFAB_DWORD_1_WIDTH	32	etherfabric.h
25955	EFAB_DWORD_2_LBN	64	etherfabric.h
25956	EFAB_DWORD_2_WIDTH	32	etherfabric.h
25957	EFAB_DWORD_3_LBN	96	etherfabric.h
25958	EFAB_DWORD_3_WIDTH	32	etherfabric.h
25959	EFAB_DWORD_FMT	"%08x"	etherfabric.h
25960	EFAB_QWORD_FMT	"%08x:%08x"	etherfabric.h
25961	EFAB_OWORD_FMT	"%08x:%08x:%08x:%08x"	etherfabric.h
25962	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD64	etherfabric.h
25963	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD64	etherfabric.h
25964	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO64	etherfabric.h
25965	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO64	etherfabric.h
25966	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES64	etherfabric.h
25967	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES64	etherfabric.h
25968	EFAB_OWORD_FIELD	EFAB_OWORD_FIELD32	etherfabric.h
25969	EFAB_QWORD_FIELD	EFAB_QWORD_FIELD32	etherfabric.h
25970	EFAB_OWORD_IS_ZERO	EFAB_OWORD_IS_ZERO32	etherfabric.h
25971	EFAB_QWORD_IS_ZERO	EFAB_QWORD_IS_ZERO32	etherfabric.h
25972	EFAB_OWORD_IS_ALL_ONES	EFAB_OWORD_IS_ALL_ONES32	etherfabric.h
25973	EFAB_QWORD_IS_ALL_ONES	EFAB_QWORD_IS_ALL_ONES32	etherfabric.h
25974	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD64	etherfabric.h
25975	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD64	etherfabric.h
25976	EFAB_POPULATE_OWORD	EFAB_POPULATE_OWORD32	etherfabric.h
25977	EFAB_POPULATE_QWORD	EFAB_POPULATE_QWORD32	etherfabric.h
25978	EFAB_POPULATE_OWORD_10	EFAB_POPULATE_OWORD	etherfabric.h
25979	EFAB_POPULATE_QWORD_10	EFAB_POPULATE_QWORD	etherfabric.h
25980	EFAB_POPULATE_DWORD_10	EFAB_POPULATE_DWORD	etherfabric.h
25981	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD64	etherfabric.h
25982	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD64	etherfabric.h
25983	EFAB_SET_OWORD_FIELD	EFAB_SET_OWORD_FIELD32	etherfabric.h
25984	EFAB_SET_QWORD_FIELD	EFAB_SET_QWORD_FIELD32	etherfabric.h
25985	DMA_ADDR_T_WIDTH	( 8 * sizeof ( dma_addr_t ) )	etherfabric.h
25986	EFAB_DMA_MAX_MASK	( ( DMA_ADDR_T_WIDTH == 64 ) ? \ ~( ( uint64_t ) 0 ) : ~( ( uint32_t ) 0 ) )	etherfabric.h
25987	HFA384x_CMD_ALLOC_LEN_MIN	((UINT16)4)	hfa384x.h
25988	HFA384x_CMD_ALLOC_LEN_MAX	((UINT16)2400)	hfa384x.h
25989	HFA384x_BAP_DATALEN_MAX	((UINT16)4096)	hfa384x.h
25990	HFA384x_BAP_OFFSET_MAX	((UINT16)4096)	hfa384x.h
25991	HFA384x_PORTID_MAX	((UINT16)7)	hfa384x.h
25992	HFA384x_NUMPORTS_MAX	((UINT16)(HFA384x_PORTID_MAX+1))	hfa384x.h
25993	HFA384x_PDR_LEN_MAX	((UINT16)512)	hfa384x.h	in bytes, from EK
25994	HFA384x_PDA_RECS_MAX	((UINT16)200)	hfa384x.h	a guess
25995	HFA384x_PDA_LEN_MAX	((UINT16)1024)	hfa384x.h	in bytes, from EK
25996	HFA384x_SCANRESULT_MAX	((UINT16)31)	hfa384x.h
25997	HFA384x_HSCANRESULT_MAX	((UINT16)31)	hfa384x.h
25998	HFA384x_CHINFORESULT_MAX	((UINT16)16)	hfa384x.h
25999	HFA384x_DRVR_FIDSTACKLEN_MAX	(10)	hfa384x.h
26000	HFA384x_DRVR_TXBUF_MAX	(sizeof(hfa384x_tx_frame_t) + \ WLAN_DATA_MAXLEN - \ WLAN_WEP_IV_LEN - \ WLAN_WEP_ICV_LEN + 2)	hfa384x.h
26001	HFA384x_DRVR_MAGIC	(0x4a2d)	hfa384x.h
26002	HFA384x_INFODATA_MAXLEN	(sizeof(hfa384x_infodata_t))	hfa384x.h
26003	HFA384x_INFOFRM_MAXLEN	(sizeof(hfa384x_InfFrame_t))	hfa384x.h
26004	HFA384x_RID_GUESSING_MAXLEN	2048	hfa384x.h	I'm not really sure
26005	HFA384x_RIDDATA_MAXLEN	HFA384x_RID_GUESSING_MAXLEN	hfa384x.h
26006	HFA384x_USB_RWMEM_MAXLEN	2048	hfa384x.h
26007	HFA384x_BAP_PROC	((UINT16)0)	hfa384x.h
26008	HFA384x_BAP_INT	((UINT16)1)	hfa384x.h
26009	HFA384x_PORTTYPE_IBSS	((UINT16)0)	hfa384x.h
26010	HFA384x_PORTTYPE_BSS	((UINT16)1)	hfa384x.h
26011	HFA384x_PORTTYPE_WDS	((UINT16)2)	hfa384x.h
26012	HFA384x_PORTTYPE_PSUEDOIBSS	((UINT16)3)	hfa384x.h
26013	HFA384x_PORTTYPE_HOSTAP	((UINT16)6)	hfa384x.h
26014	HFA384x_WEPFLAGS_PRIVINVOKED	((UINT16)BIT0)	hfa384x.h
26015	HFA384x_WEPFLAGS_EXCLUDE	((UINT16)BIT1)	hfa384x.h
26016	HFA384x_WEPFLAGS_DISABLE_TXCRYP	((UINT16)BIT4)	hfa384x.h
26017	HFA384x_WEPFLAGS_DISABLE_RXCRYP	((UINT16)BIT7)	hfa384x.h
26018	HFA384x_WEPFLAGS_DISALLOW_MIXED	((UINT16)BIT11)	hfa384x.h
26019	HFA384x_WEPFLAGS_IV_INTERVAL1	((UINT16)0)	hfa384x.h
26020	HFA384x_WEPFLAGS_IV_INTERVAL10	((UINT16)BIT5)	hfa384x.h
26021	HFA384x_WEPFLAGS_IV_INTERVAL50	((UINT16)BIT6)	hfa384x.h
26022	HFA384x_WEPFLAGS_IV_INTERVAL100	((UINT16)(BIT5 \| BIT6))	hfa384x.h
26023	HFA384x_WEPFLAGS_FIRMWARE_WPA	((UINT16)BIT8)	hfa384x.h
26024	HFA384x_WEPFLAGS_HOST_MIC	((UINT16)BIT9)	hfa384x.h
26025	HFA384x_ROAMMODE_FWSCAN_FWROAM	((UINT16)1)	hfa384x.h
26026	HFA384x_ROAMMODE_FWSCAN_HOSTROA	((UINT16)2)	hfa384x.h
26027	HFA384x_ROAMMODE_HOSTSCAN_HOSTR	((UINT16)3)	hfa384x.h
26028	HFA384x_PORTSTATUS_DISABLED	((UINT16)1)	hfa384x.h
26029	HFA384x_PORTSTATUS_INITSRCH	((UINT16)2)	hfa384x.h
26030	HFA384x_PORTSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
26031	HFA384x_PORTSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
26032	HFA384x_PORTSTATUS_OOR_ESS	((UINT16)5)	hfa384x.h
26033	HFA384x_PORTSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
26034	HFA384x_PORTSTATUS_HOSTAP	((UINT16)8)	hfa384x.h
26035	HFA384x_RATEBIT_1	((UINT16)1)	hfa384x.h
26036	HFA384x_RATEBIT_2	((UINT16)2)	hfa384x.h
26037	HFA384x_RATEBIT_5dot5	((UINT16)4)	hfa384x.h
26038	HFA384x_RATEBIT_11	((UINT16)8)	hfa384x.h
26039	HFA384x_TXCMD_NORECL	((UINT16)0)	hfa384x.h
26040	HFA384x_TXCMD_RECL	((UINT16)1)	hfa384x.h
26041	HFA384x_ADDR_AUX_OFF_MAX	((UINT16)0x007f)	hfa384x.h
26042	HFA384x_ADDR_FLAT_AUX_PAGE_MASK	(0x007fff80)	hfa384x.h
26043	HFA384x_ADDR_FLAT_AUX_OFF_MASK	(0x0000007f)	hfa384x.h
26044	HFA384x_ADDR_FLAT_CMD_PAGE_MASK	(0xffff0000)	hfa384x.h
26045	HFA384x_ADDR_FLAT_CMD_OFF_MASK	(0x0000ffff)	hfa384x.h
26046	HFA384x_ADDR_AUX_PAGE_MASK	(0xffff)	hfa384x.h
26047	HFA384x_ADDR_AUX_OFF_MASK	(0x007f)	hfa384x.h
26048	HFA384x_ADDR_CMD_PAGE_MASK	(0x007f)	hfa384x.h
26049	HFA384x_ADDR_CMD_OFF_MASK	(0xffff)	hfa384x.h
26050	HFA384x_AUX_CTL_EXTDS	(0x00)	hfa384x.h
26051	HFA384x_AUX_CTL_NV	(0x01)	hfa384x.h
26052	HFA384x_AUX_CTL_PHY	(0x02)	hfa384x.h
26053	HFA384x_AUX_CTL_ICSRAM	(0x03)	hfa384x.h
26054	HFA3842_PDA_BASE	(0x007f0000UL)	hfa384x.h
26055	HFA3841_PDA_BASE	(0x003f0000UL)	hfa384x.h
26056	HFA3841_PDA_BOGUS_BASE	(0x00390000UL)	hfa384x.h
26057	HFA384x_DLSTATE_DISABLED	0	hfa384x.h
26058	HFA384x_DLSTATE_RAMENABLED	1	hfa384x.h
26059	HFA384x_DLSTATE_FLASHENABLED	2	hfa384x.h
26060	HFA384x_DLSTATE_FLASHWRITTEN	3	hfa384x.h
26061	HFA384x_DLSTATE_FLASHWRITEPENDI	4	hfa384x.h
26062	HFA384x_DLSTATE_GENESIS	5	hfa384x.h
26063	HFA384x_CMD_OFF	(0x00)	hfa384x.h
26064	HFA384x_PARAM0_OFF	(0x02)	hfa384x.h
26065	HFA384x_PARAM1_OFF	(0x04)	hfa384x.h
26066	HFA384x_PARAM2_OFF	(0x06)	hfa384x.h
26067	HFA384x_STATUS_OFF	(0x08)	hfa384x.h
26068	HFA384x_RESP0_OFF	(0x0A)	hfa384x.h
26069	HFA384x_RESP1_OFF	(0x0C)	hfa384x.h
26070	HFA384x_RESP2_OFF	(0x0E)	hfa384x.h
26071	HFA384x_INFOFID_OFF	(0x10)	hfa384x.h
26072	HFA384x_RXFID_OFF	(0x20)	hfa384x.h
26073	HFA384x_ALLOCFID_OFF	(0x22)	hfa384x.h
26074	HFA384x_TXCOMPLFID_OFF	(0x24)	hfa384x.h
26075	HFA384x_SELECT0_OFF	(0x18)	hfa384x.h
26076	HFA384x_OFFSET0_OFF	(0x1C)	hfa384x.h
26077	HFA384x_DATA0_OFF	(0x36)	hfa384x.h
26078	HFA384x_SELECT1_OFF	(0x1A)	hfa384x.h
26079	HFA384x_OFFSET1_OFF	(0x1E)	hfa384x.h
26080	HFA384x_DATA1_OFF	(0x38)	hfa384x.h
26081	HFA384x_EVSTAT_OFF	(0x30)	hfa384x.h
26082	HFA384x_INTEN_OFF	(0x32)	hfa384x.h
26083	HFA384x_EVACK_OFF	(0x34)	hfa384x.h
26084	HFA384x_CONTROL_OFF	(0x14)	hfa384x.h
26085	HFA384x_SWSUPPORT0_OFF	(0x28)	hfa384x.h
26086	HFA384x_SWSUPPORT1_OFF	(0x2A)	hfa384x.h
26087	HFA384x_SWSUPPORT2_OFF	(0x2C)	hfa384x.h
26088	HFA384x_AUXPAGE_OFF	(0x3A)	hfa384x.h
26089	HFA384x_AUXOFFSET_OFF	(0x3C)	hfa384x.h
26090	HFA384x_AUXDATA_OFF	(0x3E)	hfa384x.h
26091	HFA384x_CMD_OFF	(0x00)	hfa384x.h
26092	HFA384x_PARAM0_OFF	(0x04)	hfa384x.h
26093	HFA384x_PARAM1_OFF	(0x08)	hfa384x.h
26094	HFA384x_PARAM2_OFF	(0x0c)	hfa384x.h
26095	HFA384x_STATUS_OFF	(0x10)	hfa384x.h
26096	HFA384x_RESP0_OFF	(0x14)	hfa384x.h
26097	HFA384x_RESP1_OFF	(0x18)	hfa384x.h
26098	HFA384x_RESP2_OFF	(0x1c)	hfa384x.h
26099	HFA384x_INFOFID_OFF	(0x20)	hfa384x.h
26100	HFA384x_RXFID_OFF	(0x40)	hfa384x.h
26101	HFA384x_ALLOCFID_OFF	(0x44)	hfa384x.h
26102	HFA384x_TXCOMPLFID_OFF	(0x48)	hfa384x.h
26103	HFA384x_SELECT0_OFF	(0x30)	hfa384x.h
26104	HFA384x_OFFSET0_OFF	(0x38)	hfa384x.h
26105	HFA384x_DATA0_OFF	(0x6c)	hfa384x.h
26106	HFA384x_SELECT1_OFF	(0x34)	hfa384x.h
26107	HFA384x_OFFSET1_OFF	(0x3c)	hfa384x.h
26108	HFA384x_DATA1_OFF	(0x70)	hfa384x.h
26109	HFA384x_EVSTAT_OFF	(0x60)	hfa384x.h
26110	HFA384x_INTEN_OFF	(0x64)	hfa384x.h
26111	HFA384x_EVACK_OFF	(0x68)	hfa384x.h
26112	HFA384x_CONTROL_OFF	(0x28)	hfa384x.h
26113	HFA384x_SWSUPPORT0_OFF	(0x50)	hfa384x.h
26114	HFA384x_SWSUPPORT1_OFF	(0x54)	hfa384x.h
26115	HFA384x_SWSUPPORT2_OFF	(0x58)	hfa384x.h
26116	HFA384x_AUXPAGE_OFF	(0x74)	hfa384x.h
26117	HFA384x_AUXOFFSET_OFF	(0x78)	hfa384x.h
26118	HFA384x_AUXDATA_OFF	(0x7c)	hfa384x.h
26119	HFA384x_PCICOR_OFF	(0x4c)	hfa384x.h
26120	HFA384x_PCIHCR_OFF	(0x5c)	hfa384x.h
26121	HFA384x_PCI_M0_ADDRH_OFF	(0x80)	hfa384x.h
26122	HFA384x_PCI_M0_ADDRL_OFF	(0x84)	hfa384x.h
26123	HFA384x_PCI_M0_LEN_OFF	(0x88)	hfa384x.h
26124	HFA384x_PCI_M0_CTL_OFF	(0x8c)	hfa384x.h
26125	HFA384x_PCI_STATUS_OFF	(0x98)	hfa384x.h
26126	HFA384x_PCI_M1_ADDRH_OFF	(0xa0)	hfa384x.h
26127	HFA384x_PCI_M1_ADDRL_OFF	(0xa4)	hfa384x.h
26128	HFA384x_PCI_M1_LEN_OFF	(0xa8)	hfa384x.h
26129	HFA384x_PCI_M1_CTL_OFF	(0xac)	hfa384x.h
26130	HFA384x_CMD_BUSY	((UINT16)BIT15)	hfa384x.h
26131	HFA384x_CMD_AINFO	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
26132	HFA384x_CMD_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
26133	HFA384x_CMD_RECL	((UINT16)BIT8)	hfa384x.h
26134	HFA384x_CMD_WRITE	((UINT16)BIT8)	hfa384x.h
26135	HFA384x_CMD_PROGMODE	((UINT16)(BIT9 \| BIT8))	hfa384x.h
26136	HFA384x_CMD_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
26137	HFA384x_STATUS_RESULT	((UINT16)(BIT14 \| BIT13 \| BIT12 \| BIT11 \| BIT10 \| BIT9 \| BIT8))	hfa384x.h
26138	HFA384x_STATUS_CMDCODE	((UINT16)(BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1 \| BIT0))	hfa384x.h
26139	HFA384x_OFFSET_BUSY	((UINT16)BIT15)	hfa384x.h
26140	HFA384x_OFFSET_ERR	((UINT16)BIT14)	hfa384x.h
26141	HFA384x_OFFSET_DATAOFF	((UINT16)(BIT11 \| BIT10 \| BIT9 \| BIT8 \| BIT7 \| BIT6 \| BIT5 \| BIT4 \| BIT3 \| BIT2 \| BIT1))	hfa384x.h
26142	HFA384x_EVSTAT_TICK	((UINT16)BIT15)	hfa384x.h
26143	HFA384x_EVSTAT_WTERR	((UINT16)BIT14)	hfa384x.h
26144	HFA384x_EVSTAT_INFDROP	((UINT16)BIT13)	hfa384x.h
26145	HFA384x_EVSTAT_INFO	((UINT16)BIT7)	hfa384x.h
26146	HFA384x_EVSTAT_DTIM	((UINT16)BIT5)	hfa384x.h
26147	HFA384x_EVSTAT_CMD	((UINT16)BIT4)	hfa384x.h
26148	HFA384x_EVSTAT_ALLOC	((UINT16)BIT3)	hfa384x.h
26149	HFA384x_EVSTAT_TXEXC	((UINT16)BIT2)	hfa384x.h
26150	HFA384x_EVSTAT_TX	((UINT16)BIT1)	hfa384x.h
26151	HFA384x_EVSTAT_RX	((UINT16)BIT0)	hfa384x.h
26152	HFA384x_INT_BAP_OP	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC)	hfa384x.h
26153	HFA384x_INT_NORMAL	(HFA384x_EVSTAT_INFO\|HFA384x_EVSTAT_RX\|HFA384x_EVSTAT_TX\|HFA384x_EVSTAT_TXEXC\|HFA384x_EVSTAT_INFDROP\|HFA384x_EVSTAT_ALLOC\|HFA38	hfa384x.h
26154	HFA384x_INTEN_TICK	((UINT16)BIT15)	hfa384x.h
26155	HFA384x_INTEN_WTERR	((UINT16)BIT14)	hfa384x.h
26156	HFA384x_INTEN_INFDROP	((UINT16)BIT13)	hfa384x.h
26157	HFA384x_INTEN_INFO	((UINT16)BIT7)	hfa384x.h
26158	HFA384x_INTEN_DTIM	((UINT16)BIT5)	hfa384x.h
26159	HFA384x_INTEN_CMD	((UINT16)BIT4)	hfa384x.h
26160	HFA384x_INTEN_ALLOC	((UINT16)BIT3)	hfa384x.h
26161	HFA384x_INTEN_TXEXC	((UINT16)BIT2)	hfa384x.h
26162	HFA384x_INTEN_TX	((UINT16)BIT1)	hfa384x.h
26163	HFA384x_INTEN_RX	((UINT16)BIT0)	hfa384x.h
26164	HFA384x_EVACK_TICK	((UINT16)BIT15)	hfa384x.h
26165	HFA384x_EVACK_WTERR	((UINT16)BIT14)	hfa384x.h
26166	HFA384x_EVACK_INFDROP	((UINT16)BIT13)	hfa384x.h
26167	HFA384x_EVACK_INFO	((UINT16)BIT7)	hfa384x.h
26168	HFA384x_EVACK_DTIM	((UINT16)BIT5)	hfa384x.h
26169	HFA384x_EVACK_CMD	((UINT16)BIT4)	hfa384x.h
26170	HFA384x_EVACK_ALLOC	((UINT16)BIT3)	hfa384x.h
26171	HFA384x_EVACK_TXEXC	((UINT16)BIT2)	hfa384x.h
26172	HFA384x_EVACK_TX	((UINT16)BIT1)	hfa384x.h
26173	HFA384x_EVACK_RX	((UINT16)BIT0)	hfa384x.h
26174	HFA384x_CONTROL_AUXEN	((UINT16)(BIT15 \| BIT14))	hfa384x.h
26175	HFA384x_CMDCODE_INIT	((UINT16)0x00)	hfa384x.h
26176	HFA384x_CMDCODE_ENABLE	((UINT16)0x01)	hfa384x.h
26177	HFA384x_CMDCODE_DISABLE	((UINT16)0x02)	hfa384x.h
26178	HFA384x_CMDCODE_DIAG	((UINT16)0x03)	hfa384x.h
26179	HFA384x_CMDCODE_ALLOC	((UINT16)0x0A)	hfa384x.h
26180	HFA384x_CMDCODE_TX	((UINT16)0x0B)	hfa384x.h
26181	HFA384x_CMDCODE_CLRPRST	((UINT16)0x12)	hfa384x.h
26182	HFA384x_CMDCODE_NOTIFY	((UINT16)0x10)	hfa384x.h
26183	HFA384x_CMDCODE_INQ	((UINT16)0x11)	hfa384x.h
26184	HFA384x_CMDCODE_ACCESS	((UINT16)0x21)	hfa384x.h
26185	HFA384x_CMDCODE_DOWNLD	((UINT16)0x22)	hfa384x.h
26186	HFA384x_CMDCODE_MONITOR	((UINT16)(0x38))	hfa384x.h
26187	HFA384x_MONITOR_ENABLE	((UINT16)(0x0b))	hfa384x.h
26188	HFA384x_MONITOR_DISABLE	((UINT16)(0x0f))	hfa384x.h
26189	HFA384x_SUCCESS	((UINT16)(0x00))	hfa384x.h
26190	HFA384x_CARD_FAIL	((UINT16)(0x01))	hfa384x.h
26191	HFA384x_NO_BUFF	((UINT16)(0x05))	hfa384x.h
26192	HFA384x_CMD_ERR	((UINT16)(0x7F))	hfa384x.h
26193	HFA384x_PROGMODE_DISABLE	((UINT16)0x00)	hfa384x.h
26194	HFA384x_PROGMODE_RAM	((UINT16)0x01)	hfa384x.h
26195	HFA384x_PROGMODE_NV	((UINT16)0x02)	hfa384x.h
26196	HFA384x_PROGMODE_NVWRITE	((UINT16)0x03)	hfa384x.h
26197	HFA384x_AUXPW0	((UINT16)0xfe01)	hfa384x.h
26198	HFA384x_AUXPW1	((UINT16)0xdc23)	hfa384x.h
26199	HFA384x_AUXPW2	((UINT16)0xba45)	hfa384x.h
26200	HFA384x_CONTROL_AUX_ISDISABLED	((UINT16)0x0000)	hfa384x.h
26201	HFA384x_CONTROL_AUX_ISENABLED	((UINT16)0xc000)	hfa384x.h
26202	HFA384x_CONTROL_AUX_DOENABLE	((UINT16)0x8000)	hfa384x.h
26203	HFA384x_CONTROL_AUX_DODISABLE	((UINT16)0x4000)	hfa384x.h
26204	HFA384x_RID_CNFPORTTYPE	((UINT16)0xFC00)	hfa384x.h
26205	HFA384x_RID_CNFOWNMACADDR	((UINT16)0xFC01)	hfa384x.h
26206	HFA384x_RID_CNFDESIREDSSID	((UINT16)0xFC02)	hfa384x.h
26207	HFA384x_RID_CNFOWNCHANNEL	((UINT16)0xFC03)	hfa384x.h
26208	HFA384x_RID_CNFOWNSSID	((UINT16)0xFC04)	hfa384x.h
26209	HFA384x_RID_CNFOWNATIMWIN	((UINT16)0xFC05)	hfa384x.h
26210	HFA384x_RID_CNFSYSSCALE	((UINT16)0xFC06)	hfa384x.h
26211	HFA384x_RID_CNFMAXDATALEN	((UINT16)0xFC07)	hfa384x.h
26212	HFA384x_RID_CNFWDSADDR	((UINT16)0xFC08)	hfa384x.h
26213	HFA384x_RID_CNFPMENABLED	((UINT16)0xFC09)	hfa384x.h
26214	HFA384x_RID_CNFPMEPS	((UINT16)0xFC0A)	hfa384x.h
26215	HFA384x_RID_CNFMULTICASTRX	((UINT16)0xFC0B)	hfa384x.h
26216	HFA384x_RID_CNFMAXSLEEPDUR	((UINT16)0xFC0C)	hfa384x.h
26217	HFA384x_RID_CNFPMHOLDDUR	((UINT16)0xFC0D)	hfa384x.h
26218	HFA384x_RID_CNFOWNNAME	((UINT16)0xFC0E)	hfa384x.h
26219	HFA384x_RID_CNFOWNDTIMPER	((UINT16)0xFC10)	hfa384x.h
26220	HFA384x_RID_CNFWDSADDR1	((UINT16)0xFC11)	hfa384x.h
26221	HFA384x_RID_CNFWDSADDR2	((UINT16)0xFC12)	hfa384x.h
26222	HFA384x_RID_CNFWDSADDR3	((UINT16)0xFC13)	hfa384x.h
26223	HFA384x_RID_CNFWDSADDR4	((UINT16)0xFC14)	hfa384x.h
26224	HFA384x_RID_CNFWDSADDR5	((UINT16)0xFC15)	hfa384x.h
26225	HFA384x_RID_CNFWDSADDR6	((UINT16)0xFC16)	hfa384x.h
26226	HFA384x_RID_CNFMCASTPMBUFF	((UINT16)0xFC17)	hfa384x.h
26227	HFA384x_RID_CNFPORTTYPE_LEN	((UINT16)2)	hfa384x.h
26228	HFA384x_RID_CNFOWNMACADDR_LEN	((UINT16)6)	hfa384x.h
26229	HFA384x_RID_CNFDESIREDSSID_LEN	((UINT16)34)	hfa384x.h
26230	HFA384x_RID_CNFOWNCHANNEL_LEN	((UINT16)2)	hfa384x.h
26231	HFA384x_RID_CNFOWNSSID_LEN	((UINT16)34)	hfa384x.h
26232	HFA384x_RID_CNFOWNATIMWIN_LEN	((UINT16)2)	hfa384x.h
26233	HFA384x_RID_CNFSYSSCALE_LEN	((UINT16)0)	hfa384x.h
26234	HFA384x_RID_CNFMAXDATALEN_LEN	((UINT16)0)	hfa384x.h
26235	HFA384x_RID_CNFWDSADDR_LEN	((UINT16)6)	hfa384x.h
26236	HFA384x_RID_CNFPMENABLED_LEN	((UINT16)0)	hfa384x.h
26237	HFA384x_RID_CNFPMEPS_LEN	((UINT16)0)	hfa384x.h
26238	HFA384x_RID_CNFMULTICASTRX_LEN	((UINT16)0)	hfa384x.h
26239	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
26240	HFA384x_RID_CNFPMHOLDDUR_LEN	((UINT16)0)	hfa384x.h
26241	HFA384x_RID_CNFOWNNAME_LEN	((UINT16)34)	hfa384x.h
26242	HFA384x_RID_CNFOWNDTIMPER_LEN	((UINT16)0)	hfa384x.h
26243	HFA384x_RID_CNFWDSADDR1_LEN	((UINT16)6)	hfa384x.h
26244	HFA384x_RID_CNFWDSADDR2_LEN	((UINT16)6)	hfa384x.h
26245	HFA384x_RID_CNFWDSADDR3_LEN	((UINT16)6)	hfa384x.h
26246	HFA384x_RID_CNFWDSADDR4_LEN	((UINT16)6)	hfa384x.h
26247	HFA384x_RID_CNFWDSADDR5_LEN	((UINT16)6)	hfa384x.h
26248	HFA384x_RID_CNFWDSADDR6_LEN	((UINT16)6)	hfa384x.h
26249	HFA384x_RID_CNFMCASTPMBUFF_LEN	((UINT16)0)	hfa384x.h
26250	HFA384x_RID_CNFAUTHENTICATION_L	((UINT16)sizeof(UINT16))	hfa384x.h
26251	HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)	hfa384x.h
26252	HFA384x_RID_GROUPADDR	((UINT16)0xFC80)	hfa384x.h
26253	HFA384x_RID_CREATEIBSS	((UINT16)0xFC81)	hfa384x.h
26254	HFA384x_RID_FRAGTHRESH	((UINT16)0xFC82)	hfa384x.h
26255	HFA384x_RID_RTSTHRESH	((UINT16)0xFC83)	hfa384x.h
26256	HFA384x_RID_TXRATECNTL	((UINT16)0xFC84)	hfa384x.h
26257	HFA384x_RID_PROMISCMODE	((UINT16)0xFC85)	hfa384x.h
26258	HFA384x_RID_FRAGTHRESH0	((UINT16)0xFC90)	hfa384x.h
26259	HFA384x_RID_FRAGTHRESH1	((UINT16)0xFC91)	hfa384x.h
26260	HFA384x_RID_FRAGTHRESH2	((UINT16)0xFC92)	hfa384x.h
26261	HFA384x_RID_FRAGTHRESH3	((UINT16)0xFC93)	hfa384x.h
26262	HFA384x_RID_FRAGTHRESH4	((UINT16)0xFC94)	hfa384x.h
26263	HFA384x_RID_FRAGTHRESH5	((UINT16)0xFC95)	hfa384x.h
26264	HFA384x_RID_FRAGTHRESH6	((UINT16)0xFC96)	hfa384x.h
26265	HFA384x_RID_RTSTHRESH0	((UINT16)0xFC97)	hfa384x.h
26266	HFA384x_RID_RTSTHRESH1	((UINT16)0xFC98)	hfa384x.h
26267	HFA384x_RID_RTSTHRESH2	((UINT16)0xFC99)	hfa384x.h
26268	HFA384x_RID_RTSTHRESH3	((UINT16)0xFC9A)	hfa384x.h
26269	HFA384x_RID_RTSTHRESH4	((UINT16)0xFC9B)	hfa384x.h
26270	HFA384x_RID_RTSTHRESH5	((UINT16)0xFC9C)	hfa384x.h
26271	HFA384x_RID_RTSTHRESH6	((UINT16)0xFC9D)	hfa384x.h
26272	HFA384x_RID_TXRATECNTL0	((UINT16)0xFC9E)	hfa384x.h
26273	HFA384x_RID_TXRATECNTL1	((UINT16)0xFC9F)	hfa384x.h
26274	HFA384x_RID_TXRATECNTL2	((UINT16)0xFCA0)	hfa384x.h
26275	HFA384x_RID_TXRATECNTL3	((UINT16)0xFCA1)	hfa384x.h
26276	HFA384x_RID_TXRATECNTL4	((UINT16)0xFCA2)	hfa384x.h
26277	HFA384x_RID_TXRATECNTL5	((UINT16)0xFCA3)	hfa384x.h
26278	HFA384x_RID_TXRATECNTL6	((UINT16)0xFCA4)	hfa384x.h
26279	HFA384x_RID_GROUPADDR_LEN	((UINT16)16 * WLAN_ADDR_LEN)	hfa384x.h
26280	HFA384x_RID_CREATEIBSS_LEN	((UINT16)0)	hfa384x.h
26281	HFA384x_RID_FRAGTHRESH_LEN	((UINT16)0)	hfa384x.h
26282	HFA384x_RID_RTSTHRESH_LEN	((UINT16)0)	hfa384x.h
26283	HFA384x_RID_TXRATECNTL_LEN	((UINT16)4)	hfa384x.h
26284	HFA384x_RID_PROMISCMODE_LEN	((UINT16)2)	hfa384x.h
26285	HFA384x_RID_FRAGTHRESH0_LEN	((UINT16)0)	hfa384x.h
26286	HFA384x_RID_FRAGTHRESH1_LEN	((UINT16)0)	hfa384x.h
26287	HFA384x_RID_FRAGTHRESH2_LEN	((UINT16)0)	hfa384x.h
26288	HFA384x_RID_FRAGTHRESH3_LEN	((UINT16)0)	hfa384x.h
26289	HFA384x_RID_FRAGTHRESH4_LEN	((UINT16)0)	hfa384x.h
26290	HFA384x_RID_FRAGTHRESH5_LEN	((UINT16)0)	hfa384x.h
26291	HFA384x_RID_FRAGTHRESH6_LEN	((UINT16)0)	hfa384x.h
26292	HFA384x_RID_RTSTHRESH0_LEN	((UINT16)0)	hfa384x.h
26293	HFA384x_RID_RTSTHRESH1_LEN	((UINT16)0)	hfa384x.h
26294	HFA384x_RID_RTSTHRESH2_LEN	((UINT16)0)	hfa384x.h
26295	HFA384x_RID_RTSTHRESH3_LEN	((UINT16)0)	hfa384x.h
26296	HFA384x_RID_RTSTHRESH4_LEN	((UINT16)0)	hfa384x.h
26297	HFA384x_RID_RTSTHRESH5_LEN	((UINT16)0)	hfa384x.h
26298	HFA384x_RID_RTSTHRESH6_LEN	((UINT16)0)	hfa384x.h
26299	HFA384x_RID_TXRATECNTL0_LEN	((UINT16)0)	hfa384x.h
26300	HFA384x_RID_TXRATECNTL1_LEN	((UINT16)0)	hfa384x.h
26301	HFA384x_RID_TXRATECNTL2_LEN	((UINT16)0)	hfa384x.h
26302	HFA384x_RID_TXRATECNTL3_LEN	((UINT16)0)	hfa384x.h
26303	HFA384x_RID_TXRATECNTL4_LEN	((UINT16)0)	hfa384x.h
26304	HFA384x_RID_TXRATECNTL5_LEN	((UINT16)0)	hfa384x.h
26305	HFA384x_RID_TXRATECNTL6_LEN	((UINT16)0)	hfa384x.h
26306	HFA384x_RID_ITICKTIME	((UINT16)0xFCE0)	hfa384x.h
26307	HFA384x_RID_ITICKTIME_LEN	((UINT16)2)	hfa384x.h
26308	HFA384x_RID_MAXLOADTIME	((UINT16)0xFD00)	hfa384x.h
26309	HFA384x_RID_DOWNLOADBUFFER	((UINT16)0xFD01)	hfa384x.h
26310	HFA384x_RID_PRIIDENTITY	((UINT16)0xFD02)	hfa384x.h
26311	HFA384x_RID_PRISUPRANGE	((UINT16)0xFD03)	hfa384x.h
26312	HFA384x_RID_PRI_CFIACTRANGES	((UINT16)0xFD04)	hfa384x.h
26313	HFA384x_RID_NICSERIALNUMBER	((UINT16)0xFD0A)	hfa384x.h
26314	HFA384x_RID_NICIDENTITY	((UINT16)0xFD0B)	hfa384x.h
26315	HFA384x_RID_MFISUPRANGE	((UINT16)0xFD0C)	hfa384x.h
26316	HFA384x_RID_CFISUPRANGE	((UINT16)0xFD0D)	hfa384x.h
26317	HFA384x_RID_CHANNELLIST	((UINT16)0xFD10)	hfa384x.h
26318	HFA384x_RID_REGULATORYDOMAINS	((UINT16)0xFD11)	hfa384x.h
26319	HFA384x_RID_TEMPTYPE	((UINT16)0xFD12)	hfa384x.h
26320	HFA384x_RID_CIS	((UINT16)0xFD13)	hfa384x.h
26321	HFA384x_RID_STAIDENTITY	((UINT16)0xFD20)	hfa384x.h
26322	HFA384x_RID_STASUPRANGE	((UINT16)0xFD21)	hfa384x.h
26323	HFA384x_RID_STA_MFIACTRANGES	((UINT16)0xFD22)	hfa384x.h
26324	HFA384x_RID_STA_CFIACTRANGES	((UINT16)0xFD23)	hfa384x.h
26325	HFA384x_RID_BUILDSEQ	((UINT16)0xFFFE)	hfa384x.h
26326	HFA384x_RID_FWID	((UINT16)0xFFFF)	hfa384x.h
26327	HFA384x_RID_MAXLOADTIME_LEN	((UINT16)0)	hfa384x.h
26328	HFA384x_RID_DOWNLOADBUFFER_LEN	((UINT16)sizeof(hfa384x_downloadbuffer_t))	hfa384x.h
26329	HFA384x_RID_PRIIDENTITY_LEN	((UINT16)8)	hfa384x.h
26330	HFA384x_RID_PRISUPRANGE_LEN	((UINT16)10)	hfa384x.h
26331	HFA384x_RID_CFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
26332	HFA384x_RID_NICSERIALNUMBER_LEN	((UINT16)12)	hfa384x.h
26333	HFA384x_RID_NICIDENTITY_LEN	((UINT16)8)	hfa384x.h
26334	HFA384x_RID_MFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
26335	HFA384x_RID_CFISUPRANGE_LEN	((UINT16)10)	hfa384x.h
26336	HFA384x_RID_CHANNELLIST_LEN	((UINT16)0)	hfa384x.h
26337	HFA384x_RID_REGULATORYDOMAINS_L	((UINT16)12)	hfa384x.h
26338	HFA384x_RID_TEMPTYPE_LEN	((UINT16)0)	hfa384x.h
26339	HFA384x_RID_CIS_LEN	((UINT16)480)	hfa384x.h
26340	HFA384x_RID_STAIDENTITY_LEN	((UINT16)8)	hfa384x.h
26341	HFA384x_RID_STASUPRANGE_LEN	((UINT16)10)	hfa384x.h
26342	HFA384x_RID_MFIACTRANGES_LEN	((UINT16)10)	hfa384x.h
26343	HFA384x_RID_CFIACTRANGES2_LEN	((UINT16)10)	hfa384x.h
26344	HFA384x_RID_BUILDSEQ_LEN	((UINT16)sizeof(hfa384x_BuildSeq_t))	hfa384x.h
26345	HFA384x_RID_FWID_LEN	((UINT16)sizeof(hfa384x_FWID_t))	hfa384x.h
26346	HFA384x_RID_PORTSTATUS	((UINT16)0xFD40)	hfa384x.h
26347	HFA384x_RID_CURRENTSSID	((UINT16)0xFD41)	hfa384x.h
26348	HFA384x_RID_CURRENTBSSID	((UINT16)0xFD42)	hfa384x.h
26349	HFA384x_RID_COMMSQUALITY	((UINT16)0xFD43)	hfa384x.h
26350	HFA384x_RID_CURRENTTXRATE	((UINT16)0xFD44)	hfa384x.h
26351	HFA384x_RID_CURRENTBCNINT	((UINT16)0xFD45)	hfa384x.h
26352	HFA384x_RID_CURRENTSCALETHRESH	((UINT16)0xFD46)	hfa384x.h
26353	HFA384x_RID_PROTOCOLRSPTIME	((UINT16)0xFD47)	hfa384x.h
26354	HFA384x_RID_SHORTRETRYLIMIT	((UINT16)0xFD48)	hfa384x.h
26355	HFA384x_RID_LONGRETRYLIMIT	((UINT16)0xFD49)	hfa384x.h
26356	HFA384x_RID_MAXTXLIFETIME	((UINT16)0xFD4A)	hfa384x.h
26357	HFA384x_RID_MAXRXLIFETIME	((UINT16)0xFD4B)	hfa384x.h
26358	HFA384x_RID_CFPOLLABLE	((UINT16)0xFD4C)	hfa384x.h
26359	HFA384x_RID_AUTHALGORITHMS	((UINT16)0xFD4D)	hfa384x.h
26360	HFA384x_RID_PRIVACYOPTIMP	((UINT16)0xFD4F)	hfa384x.h
26361	HFA384x_RID_DBMCOMMSQUALITY	((UINT16)0xFD51)	hfa384x.h
26362	HFA384x_RID_CURRENTTXRATE1	((UINT16)0xFD80)	hfa384x.h
26363	HFA384x_RID_CURRENTTXRATE2	((UINT16)0xFD81)	hfa384x.h
26364	HFA384x_RID_CURRENTTXRATE3	((UINT16)0xFD82)	hfa384x.h
26365	HFA384x_RID_CURRENTTXRATE4	((UINT16)0xFD83)	hfa384x.h
26366	HFA384x_RID_CURRENTTXRATE5	((UINT16)0xFD84)	hfa384x.h
26367	HFA384x_RID_CURRENTTXRATE6	((UINT16)0xFD85)	hfa384x.h
26368	HFA384x_RID_OWNMACADDRESS	((UINT16)0xFD86)	hfa384x.h
26369	HFA384x_RID_SCANRESULTS	((UINT16)0xFD88)	hfa384x.h	NEW
26370	HFA384x_RID_HOSTSCANRESULTS	((UINT16)0xFD89)	hfa384x.h	NEW
26371	HFA384x_RID_AUTHENTICATIONUSED	((UINT16)0xFD8A)	hfa384x.h	NEW
26372	HFA384x_RID_ASSOCIATEFAILURE	((UINT16)0xFD8D)	hfa384x.h	1.8.0
26373	HFA384x_RID_PORTSTATUS_LEN	((UINT16)0)	hfa384x.h
26374	HFA384x_RID_CURRENTSSID_LEN	((UINT16)34)	hfa384x.h
26375	HFA384x_RID_CURRENTBSSID_LEN	((UINT16)WLAN_BSSID_LEN)	hfa384x.h
26376	HFA384x_RID_COMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_commsquality_t))	hfa384x.h
26377	HFA384x_RID_DBMCOMMSQUALITY_LEN	((UINT16)sizeof(hfa384x_dbmcommsquality_t))	hfa384x.h
26378	HFA384x_RID_CURRENTTXRATE_LEN	((UINT16)0)	hfa384x.h
26379	HFA384x_RID_CURRENTBCNINT_LEN	((UINT16)0)	hfa384x.h
26380	HFA384x_RID_STACURSCALETHRESH_L	((UINT16)12)	hfa384x.h
26381	HFA384x_RID_APCURSCALETHRESH_LE	((UINT16)6)	hfa384x.h
26382	HFA384x_RID_PROTOCOLRSPTIME_LEN	((UINT16)0)	hfa384x.h
26383	HFA384x_RID_SHORTRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
26384	HFA384x_RID_LONGRETRYLIMIT_LEN	((UINT16)0)	hfa384x.h
26385	HFA384x_RID_MAXTXLIFETIME_LEN	((UINT16)0)	hfa384x.h
26386	HFA384x_RID_MAXRXLIFETIME_LEN	((UINT16)0)	hfa384x.h
26387	HFA384x_RID_CFPOLLABLE_LEN	((UINT16)0)	hfa384x.h
26388	HFA384x_RID_AUTHALGORITHMS_LEN	((UINT16)4)	hfa384x.h
26389	HFA384x_RID_PRIVACYOPTIMP_LEN	((UINT16)0)	hfa384x.h
26390	HFA384x_RID_CURRENTTXRATE1_LEN	((UINT16)0)	hfa384x.h
26391	HFA384x_RID_CURRENTTXRATE2_LEN	((UINT16)0)	hfa384x.h
26392	HFA384x_RID_CURRENTTXRATE3_LEN	((UINT16)0)	hfa384x.h
26393	HFA384x_RID_CURRENTTXRATE4_LEN	((UINT16)0)	hfa384x.h
26394	HFA384x_RID_CURRENTTXRATE5_LEN	((UINT16)0)	hfa384x.h
26395	HFA384x_RID_CURRENTTXRATE6_LEN	((UINT16)0)	hfa384x.h
26396	HFA384x_RID_OWNMACADDRESS_LEN	((UINT16)6)	hfa384x.h
26397	HFA384x_RID_PCFINFO_LEN	((UINT16)6)	hfa384x.h
26398	HFA384x_RID_CNFAPPCFINFO_LEN	((UINT16)sizeof(hfa384x_PCFInfo_data_t))	hfa384x.h
26399	HFA384x_RID_SCANREQUEST_LEN	((UINT16)sizeof(hfa384x_ScanRequest_data_t))	hfa384x.h
26400	HFA384x_RID_JOINREQUEST_LEN	((UINT16)sizeof(hfa384x_JoinRequest_data_t))	hfa384x.h
26401	HFA384x_RID_AUTHENTICATESTA_LEN	((UINT16)sizeof(hfa384x_authenticateStation_data_t))	hfa384x.h
26402	HFA384x_RID_CHANNELINFOREQUEST_	((UINT16)sizeof(hfa384x_ChannelInfoRequest_data_t))	hfa384x.h
26403	HFA384x_RID_PHYTYPE	((UINT16)0xFDC0)	hfa384x.h
26404	HFA384x_RID_CURRENTCHANNEL	((UINT16)0xFDC1)	hfa384x.h
26405	HFA384x_RID_CURRENTPOWERSTATE	((UINT16)0xFDC2)	hfa384x.h
26406	HFA384x_RID_CCAMODE	((UINT16)0xFDC3)	hfa384x.h
26407	HFA384x_RID_SUPPORTEDDATARATES	((UINT16)0xFDC6)	hfa384x.h
26408	HFA384x_RID_LFOSTATUS	((UINT16)0xFDC7)	hfa384x.h	1.7.1
26409	HFA384x_RID_PHYTYPE_LEN	((UINT16)0)	hfa384x.h
26410	HFA384x_RID_CURRENTCHANNEL_LEN	((UINT16)0)	hfa384x.h
26411	HFA384x_RID_CURRENTPOWERSTATE_L	((UINT16)0)	hfa384x.h
26412	HFA384x_RID_CCAMODE_LEN	((UINT16)0)	hfa384x.h
26413	HFA384x_RID_SUPPORTEDDATARATES_	((UINT16)10)	hfa384x.h
26414	HFA384x_RID_CNFWEPDEFAULTKEYID	((UINT16)0xFC23)	hfa384x.h
26415	HFA384x_RID_CNFWEPDEFAULTKEY0	((UINT16)0xFC24)	hfa384x.h
26416	HFA384x_RID_CNFWEPDEFAULTKEY1	((UINT16)0xFC25)	hfa384x.h
26417	HFA384x_RID_CNFWEPDEFAULTKEY2	((UINT16)0xFC26)	hfa384x.h
26418	HFA384x_RID_CNFWEPDEFAULTKEY3	((UINT16)0xFC27)	hfa384x.h
26419	HFA384x_RID_CNFWEPFLAGS	((UINT16)0xFC28)	hfa384x.h
26420	HFA384x_RID_CNFWEPKEYMAPTABLE	((UINT16)0xFC29)	hfa384x.h
26421	HFA384x_RID_CNFAUTHENTICATION	((UINT16)0xFC2A)	hfa384x.h
26422	HFA384x_RID_CNFMAXASSOCSTATIONS	((UINT16)0xFC2B)	hfa384x.h
26423	HFA384x_RID_CNFTXCONTROL	((UINT16)0xFC2C)	hfa384x.h
26424	HFA384x_RID_CNFROAMINGMODE	((UINT16)0xFC2D)	hfa384x.h
26425	HFA384x_RID_CNFHOSTAUTHASSOC	((UINT16)0xFC2E)	hfa384x.h
26426	HFA384x_RID_CNFRCVCRCERROR	((UINT16)0xFC30)	hfa384x.h
26427	HFA384x_RID_CNFALTRETRYCNT	((UINT16)0xFC32)	hfa384x.h
26428	HFA384x_RID_CNFAPBCNINT	((UINT16)0xFC33)	hfa384x.h
26429	HFA384x_RID_CNFAPPCFINFO	((UINT16)0xFC34)	hfa384x.h
26430	HFA384x_RID_CNFSTAPCFINFO	((UINT16)0xFC35)	hfa384x.h
26431	HFA384x_RID_CNFPRIORITYQUSAGE	((UINT16)0xFC37)	hfa384x.h
26432	HFA384x_RID_CNFTIMCTRL	((UINT16)0xFC40)	hfa384x.h
26433	HFA384x_RID_CNFTHIRTY2TALLY	((UINT16)0xFC42)	hfa384x.h
26434	HFA384x_RID_CNFENHSECURITY	((UINT16)0xFC43)	hfa384x.h
26435	HFA384x_RID_CNFDBMADJUST	((UINT16)0xFC46)	hfa384x.h	NEW
26436	HFA384x_RID_CNFWPADATA	((UINT16)0xFC48)	hfa384x.h	1.7.0
26437	HFA384x_RID_CNFPROPOGATIONDELAY	((UINT16)0xFC49)	hfa384x.h	1.7.6
26438	HFA384x_RID_CNFSHORTPREAMBLE	((UINT16)0xFCB0)	hfa384x.h
26439	HFA384x_RID_CNFEXCLONGPREAMBLE	((UINT16)0xFCB1)	hfa384x.h
26440	HFA384x_RID_CNFAUTHRSPTIMEOUT	((UINT16)0xFCB2)	hfa384x.h
26441	HFA384x_RID_CNFBASICRATES	((UINT16)0xFCB3)	hfa384x.h
26442	HFA384x_RID_CNFSUPPRATES	((UINT16)0xFCB4)	hfa384x.h
26443	HFA384x_RID_CNFFALLBACKCTRL	((UINT16)0xFCB5)	hfa384x.h	NEW
26444	HFA384x_RID_WEPKEYSTATUS	((UINT16)0xFCB6)	hfa384x.h	NEW
26445	HFA384x_RID_WEPKEYMAPINDEX	((UINT16)0xFCB7)	hfa384x.h	NEW
26446	HFA384x_RID_BROADCASTKEYID	((UINT16)0xFCB8)	hfa384x.h	NEW
26447	HFA384x_RID_ENTSECFLAGEYID	((UINT16)0xFCB9)	hfa384x.h	NEW
26448	HFA384x_RID_CNFPASSIVESCANCTRL	((UINT16)0xFCBA)	hfa384x.h	NEW STA
26449	HFA384x_RID_CNFWPAHANDLING	((UINT16)0xFCBB)	hfa384x.h	1.7.0
26450	HFA384x_RID_MDCCONTROL	((UINT16)0xFCBC)	hfa384x.h	1.7.0/1.4.0
26451	HFA384x_RID_MDCCOUNTRY	((UINT16)0xFCBD)	hfa384x.h	1.7.0/1.4.0
26452	HFA384x_RID_TXPOWERMAX	((UINT16)0xFCBE)	hfa384x.h	1.7.0/1.4.0
26453	HFA384x_RID_CNFLFOENBLED	((UINT16)0xFCBF)	hfa384x.h	1.6.3
26454	HFA384x_RID_CAPINFO	((UINT16)0xFCC0)	hfa384x.h	1.7.0/1.3.7
26455	HFA384x_RID_LISTENINTERVAL	((UINT16)0xFCC1)	hfa384x.h	1.7.0/1.3.7
26456	HFA384x_RID_DIVERSITYENABLED	((UINT16)0xFCC2)	hfa384x.h	1.7.0/1.3.7
26457	HFA384x_RID_LED_CONTROL	((UINT16)0xFCC4)	hfa384x.h	1.7.6
26458	HFA384x_RID_HFO_DELAY	((UINT16)0xFCC5)	hfa384x.h	1.7.6
26459	HFA384x_RID_DISSALOWEDBSSID	((UINT16)0xFCC6)	hfa384x.h	1.8.0
26460	HFA384x_RID_SCANREQUEST	((UINT16)0xFCE1)	hfa384x.h
26461	HFA384x_RID_JOINREQUEST	((UINT16)0xFCE2)	hfa384x.h
26462	HFA384x_RID_AUTHENTICATESTA	((UINT16)0xFCE3)	hfa384x.h
26463	HFA384x_RID_CHANNELINFOREQUEST	((UINT16)0xFCE4)	hfa384x.h
26464	HFA384x_RID_HOSTSCAN	((UINT16)0xFCE5)	hfa384x.h	NEW STA
26465	HFA384x_RID_ASSOCIATESTA	((UINT16)0xFCE6)	hfa384x.h
26466	HFA384x_RID_CNFWEPDEFAULTKEY_LE	((UINT16)6)	hfa384x.h
26467	HFA384x_RID_CNFWEP128DEFAULTKEY	((UINT16)14)	hfa384x.h
26468	HFA384x_RID_CNFPRIOQUSAGE_LEN	((UINT16)4)	hfa384x.h
26469	HFA384x_PDR_PCB_PARTNUM	((UINT16)0x0001)	hfa384x.h
26470	HFA384x_PDR_PDAVER	((UINT16)0x0002)	hfa384x.h
26471	HFA384x_PDR_NIC_SERIAL	((UINT16)0x0003)	hfa384x.h
26472	HFA384x_PDR_MKK_MEASUREMENTS	((UINT16)0x0004)	hfa384x.h
26473	HFA384x_PDR_NIC_RAMSIZE	((UINT16)0x0005)	hfa384x.h
26474	HFA384x_PDR_MFISUPRANGE	((UINT16)0x0006)	hfa384x.h
26475	HFA384x_PDR_CFISUPRANGE	((UINT16)0x0007)	hfa384x.h
26476	HFA384x_PDR_NICID	((UINT16)0x0008)	hfa384x.h
26477	HFA384x_PDR_MAC_ADDRESS	((UINT16)0x0101)	hfa384x.h
26478	HFA384x_PDR_REGDOMAIN	((UINT16)0x0103)	hfa384x.h
26479	HFA384x_PDR_ALLOWED_CHANNEL	((UINT16)0x0104)	hfa384x.h
26480	HFA384x_PDR_DEFAULT_CHANNEL	((UINT16)0x0105)	hfa384x.h
26481	HFA384x_PDR_TEMPTYPE	((UINT16)0x0107)	hfa384x.h
26482	HFA384x_PDR_IFR_SETTING	((UINT16)0x0200)	hfa384x.h
26483	HFA384x_PDR_RFR_SETTING	((UINT16)0x0201)	hfa384x.h
26484	HFA384x_PDR_HFA3861_BASELINE	((UINT16)0x0202)	hfa384x.h
26485	HFA384x_PDR_HFA3861_SHADOW	((UINT16)0x0203)	hfa384x.h
26486	HFA384x_PDR_HFA3861_IFRF	((UINT16)0x0204)	hfa384x.h
26487	HFA384x_PDR_HFA3861_CHCALSP	((UINT16)0x0300)	hfa384x.h
26488	HFA384x_PDR_HFA3861_CHCALI	((UINT16)0x0301)	hfa384x.h
26489	HFA384x_PDR_MAX_TX_POWER	((UINT16)0x0302)	hfa384x.h
26490	HFA384x_PDR_MASTER_CHAN_LIST	((UINT16)0x0303)	hfa384x.h
26491	HFA384x_PDR_3842_NIC_CONFIG	((UINT16)0x0400)	hfa384x.h
26492	HFA384x_PDR_USB_ID	((UINT16)0x0401)	hfa384x.h
26493	HFA384x_PDR_PCI_ID	((UINT16)0x0402)	hfa384x.h
26494	HFA384x_PDR_PCI_IFCONF	((UINT16)0x0403)	hfa384x.h
26495	HFA384x_PDR_PCI_PMCONF	((UINT16)0x0404)	hfa384x.h
26496	HFA384x_PDR_RFENRGY	((UINT16)0x0406)	hfa384x.h
26497	HFA384x_PDR_USB_POWER_TYPE	((UINT16)0x0407)	hfa384x.h
26498	HFA384x_PDR_USB_MAX_POWER	((UINT16)0x0409)	hfa384x.h
26499	HFA384x_PDR_USB_MANUFACTURER	((UINT16)0x0410)	hfa384x.h
26500	HFA384x_PDR_USB_PRODUCT	((UINT16)0x0411)	hfa384x.h
26501	HFA384x_PDR_ANT_DIVERSITY	((UINT16)0x0412)	hfa384x.h
26502	HFA384x_PDR_HFO_DELAY	((UINT16)0x0413)	hfa384x.h
26503	HFA384x_PDR_SCALE_THRESH	((UINT16)0x0414)	hfa384x.h
26504	HFA384x_PDR_HFA3861_MANF_TESTSP	((UINT16)0x0900)	hfa384x.h
26505	HFA384x_PDR_HFA3861_MANF_TESTI	((UINT16)0x0901)	hfa384x.h
26506	HFA384x_PDR_END_OF_PDA	((UINT16)0x0000)	hfa384x.h
26507	HFA384x_CMD	HFA384x_CMD_OFF	hfa384x.h
26508	HFA384x_PARAM0	HFA384x_PARAM0_OFF	hfa384x.h
26509	HFA384x_PARAM1	HFA384x_PARAM1_OFF	hfa384x.h
26510	HFA384x_PARAM2	HFA384x_PARAM2_OFF	hfa384x.h
26511	HFA384x_STATUS	HFA384x_STATUS_OFF	hfa384x.h
26512	HFA384x_RESP0	HFA384x_RESP0_OFF	hfa384x.h
26513	HFA384x_RESP1	HFA384x_RESP1_OFF	hfa384x.h
26514	HFA384x_RESP2	HFA384x_RESP2_OFF	hfa384x.h
26515	HFA384x_INFOFID	HFA384x_INFOFID_OFF	hfa384x.h
26516	HFA384x_RXFID	HFA384x_RXFID_OFF	hfa384x.h
26517	HFA384x_ALLOCFID	HFA384x_ALLOCFID_OFF	hfa384x.h
26518	HFA384x_TXCOMPLFID	HFA384x_TXCOMPLFID_OFF	hfa384x.h
26519	HFA384x_SELECT0	HFA384x_SELECT0_OFF	hfa384x.h
26520	HFA384x_OFFSET0	HFA384x_OFFSET0_OFF	hfa384x.h
26521	HFA384x_DATA0	HFA384x_DATA0_OFF	hfa384x.h
26522	HFA384x_SELECT1	HFA384x_SELECT1_OFF	hfa384x.h
26523	HFA384x_OFFSET1	HFA384x_OFFSET1_OFF	hfa384x.h
26524	HFA384x_DATA1	HFA384x_DATA1_OFF	hfa384x.h
26525	HFA384x_EVSTAT	HFA384x_EVSTAT_OFF	hfa384x.h
26526	HFA384x_INTEN	HFA384x_INTEN_OFF	hfa384x.h
26527	HFA384x_EVACK	HFA384x_EVACK_OFF	hfa384x.h
26528	HFA384x_CONTROL	HFA384x_CONTROL_OFF	hfa384x.h
26529	HFA384x_SWSUPPORT0	HFA384x_SWSUPPORT0_OFF	hfa384x.h
26530	HFA384x_SWSUPPORT1	HFA384x_SWSUPPORT1_OFF	hfa384x.h
26531	HFA384x_SWSUPPORT2	HFA384x_SWSUPPORT2_OFF	hfa384x.h
26532	HFA384x_AUXPAGE	HFA384x_AUXPAGE_OFF	hfa384x.h
26533	HFA384x_AUXOFFSET	HFA384x_AUXOFFSET_OFF	hfa384x.h
26534	HFA384x_AUXDATA	HFA384x_AUXDATA_OFF	hfa384x.h
26535	HFA384x_PCICOR	HFA384x_PCICOR_OFF	hfa384x.h
26536	HFA384x_PCIHCR	HFA384x_PCIHCR_OFF	hfa384x.h
26537	HFA384x_STATE_PREINIT	0	hfa384x.h
26538	HFA384x_STATE_INIT	1	hfa384x.h
26539	HFA384x_STATE_RUNNING	2	hfa384x.h
26540	HFA384x_HOSTAUTHASSOC_HOSTAUTH	BIT0	hfa384x.h
26541	HFA384x_HOSTAUTHASSOC_HOSTASSOC	BIT1	hfa384x.h
26542	HFA384x_WHAHANDLING_DISABLED	0	hfa384x.h
26543	HFA384x_WHAHANDLING_PASSTHROUGH	BIT1	hfa384x.h
26544	HFA384x_CNFAUTHENTICATION_OPENS	0x0001	hfa384x.h
26545	HFA384x_CNFAUTHENTICATION_SHARE	0x0002	hfa384x.h
26546	HFA384x_CNFAUTHENTICATION_LEAP	0x0004	hfa384x.h
26547	HFA384x_CREATEIBSS_JOINCREATEIB	0	hfa384x.h
26548	HFA384x_CREATEIBSS_JOINESS_JOIN	1	hfa384x.h
26549	HFA384x_CREATEIBSS_JOINIBSS	2	hfa384x.h
26550	HFA384x_CREATEIBSS_JOINESS_JOIN	3	hfa384x.h
26551	HFA384x_FWID_LEN	14	hfa384x.h
26552	HFA384x_PSTATUS_DISABLED	((UINT16)1)	hfa384x.h
26553	HFA384x_PSTATUS_SEARCHING	((UINT16)2)	hfa384x.h
26554	HFA384x_PSTATUS_CONN_IBSS	((UINT16)3)	hfa384x.h
26555	HFA384x_PSTATUS_CONN_ESS	((UINT16)4)	hfa384x.h
26556	HFA384x_PSTATUS_OUTOFRANGE	((UINT16)5)	hfa384x.h
26557	HFA384x_PSTATUS_CONN_WDS	((UINT16)6)	hfa384x.h
26558	HFA384x_TESTRESULT_ALLPASSED	BIT0	hfa384x.h
26559	HFA384x_TESTRESULT_LFO_FAIL	BIT1	hfa384x.h
26560	HFA384x_TESTRESULT_VR_HF0_FAIL	BIT2	hfa384x.h
26561	HFA384x_HOST_FIRM_COORDINATE	BIT7	hfa384x.h
26562	HFA384x_TESTRESULT_COORDINATE	BIT15	hfa384x.h
26563	HFA384x_FD_STATUS_OFF	((UINT16)0x44)	hfa384x.h
26564	HFA384x_FD_TIME_OFF	((UINT16)0x46)	hfa384x.h
26565	HFA384x_FD_SWSUPPORT_OFF	((UINT16)0x4A)	hfa384x.h
26566	HFA384x_FD_SILENCE_OFF	((UINT16)0x4A)	hfa384x.h
26567	HFA384x_FD_SIGNAL_OFF	((UINT16)0x4B)	hfa384x.h
26568	HFA384x_FD_RATE_OFF	((UINT16)0x4C)	hfa384x.h
26569	HFA384x_FD_RXFLOW_OFF	((UINT16)0x4D)	hfa384x.h
26570	HFA384x_FD_RESERVED_OFF	((UINT16)0x4E)	hfa384x.h
26571	HFA384x_FD_TXCONTROL_OFF	((UINT16)0x50)	hfa384x.h
26572	HFA384x_FD_FRAMECONTROL_OFF	((UINT16)0x52)	hfa384x.h
26573	HFA384x_FD_DURATIONID_OFF	((UINT16)0x54)	hfa384x.h
26574	HFA384x_FD_ADDRESS1_OFF	((UINT16)0x56)	hfa384x.h
26575	HFA384x_FD_ADDRESS2_OFF	((UINT16)0x5C)	hfa384x.h
26576	HFA384x_FD_ADDRESS3_OFF	((UINT16)0x62)	hfa384x.h
26577	HFA384x_FD_SEQCONTROL_OFF	((UINT16)0x68)	hfa384x.h
26578	HFA384x_FD_ADDRESS4_OFF	((UINT16)0x6A)	hfa384x.h
26579	HFA384x_FD_DATALEN_OFF	((UINT16)0x70)	hfa384x.h
26580	HFA384x_FD_DESTADDRESS_OFF	((UINT16)0x72)	hfa384x.h
26581	HFA384x_FD_SRCADDRESS_OFF	((UINT16)0x78)	hfa384x.h
26582	HFA384x_FD_DATALENGTH_OFF	((UINT16)0x7E)	hfa384x.h
26583	HFA384x_TXSTATUS_ACKERR	((UINT16)BIT5)	hfa384x.h
26584	HFA384x_TXSTATUS_FORMERR	((UINT16)BIT3)	hfa384x.h
26585	HFA384x_TXSTATUS_DISCON	((UINT16)BIT2)	hfa384x.h
26586	HFA384x_TXSTATUS_AGEDERR	((UINT16)BIT1)	hfa384x.h
26587	HFA384x_TXSTATUS_RETRYERR	((UINT16)BIT0)	hfa384x.h
26588	HFA384x_TX_CFPOLL	((UINT16)BIT12)	hfa384x.h
26589	HFA384x_TX_PRST	((UINT16)BIT11)	hfa384x.h
26590	HFA384x_TX_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
26591	HFA384x_TX_NOENCRYPT	((UINT16)BIT7)	hfa384x.h
26592	HFA384x_TX_RETRYSTRAT	((UINT16)(BIT6 \| BIT5))	hfa384x.h
26593	HFA384x_TX_STRUCTYPE	((UINT16)(BIT4 \| BIT3))	hfa384x.h
26594	HFA384x_TX_TXEX	((UINT16)BIT2)	hfa384x.h
26595	HFA384x_TX_TXOK	((UINT16)BIT1)	hfa384x.h
26596	HFA384x_RX_DATA_LEN_OFF	((UINT16)44)	hfa384x.h
26597	HFA384x_RX_80211HDR_OFF	((UINT16)14)	hfa384x.h
26598	HFA384x_RX_DATA_OFF	((UINT16)60)	hfa384x.h
26599	HFA384x_RXSTATUS_MSGTYPE	((UINT16)(BIT15 \| BIT14 \| BIT13))	hfa384x.h
26600	HFA384x_RXSTATUS_MACPORT	((UINT16)(BIT10 \| BIT9 \| BIT8))	hfa384x.h
26601	HFA384x_RXSTATUS_UNDECR	((UINT16)BIT1)	hfa384x.h
26602	HFA384x_RXSTATUS_FCSERR	((UINT16)BIT0)	hfa384x.h
26603	HFA384x_IT_HANDOVERADDR	((UINT16)0xF000UL)	hfa384x.h
26604	HFA384x_IT_HANDOVERDEAUTHADDRES	((UINT16)0xF001UL)	hfa384x.h	AP 1.3.7
26605	HFA384x_IT_COMMTALLIES	((UINT16)0xF100UL)	hfa384x.h
26606	HFA384x_IT_SCANRESULTS	((UINT16)0xF101UL)	hfa384x.h
26607	HFA384x_IT_CHINFORESULTS	((UINT16)0xF102UL)	hfa384x.h
26608	HFA384x_IT_HOSTSCANRESULTS	((UINT16)0xF103UL)	hfa384x.h
26609	HFA384x_IT_LINKSTATUS	((UINT16)0xF200UL)	hfa384x.h
26610	HFA384x_IT_ASSOCSTATUS	((UINT16)0xF201UL)	hfa384x.h
26611	HFA384x_IT_AUTHREQ	((UINT16)0xF202UL)	hfa384x.h
26612	HFA384x_IT_PSUSERCNT	((UINT16)0xF203UL)	hfa384x.h
26613	HFA384x_IT_KEYIDCHANGED	((UINT16)0xF204UL)	hfa384x.h
26614	HFA384x_IT_ASSOCREQ	((UINT16)0xF205UL)	hfa384x.h
26615	HFA384x_IT_MICFAILURE	((UINT16)0xF206UL)	hfa384x.h
26616	HFA384x_CHINFORESULT_BSSACTIVE	BIT0	hfa384x.h
26617	HFA384x_CHINFORESULT_PCFACTIVE	BIT1	hfa384x.h
26618	HFA384x_LINK_NOTCONNECTED	((UINT16)0)	hfa384x.h
26619	HFA384x_LINK_CONNECTED	((UINT16)1)	hfa384x.h
26620	HFA384x_LINK_DISCONNECTED	((UINT16)2)	hfa384x.h
26621	HFA384x_LINK_AP_CHANGE	((UINT16)3)	hfa384x.h
26622	HFA384x_LINK_AP_OUTOFRANGE	((UINT16)4)	hfa384x.h
26623	HFA384x_LINK_AP_INRANGE	((UINT16)5)	hfa384x.h
26624	HFA384x_LINK_ASSOCFAIL	((UINT16)6)	hfa384x.h
26625	HFA384x_ASSOCSTATUS_STAASSOC	((UINT16)1)	hfa384x.h
26626	HFA384x_ASSOCSTATUS_REASSOC	((UINT16)2)	hfa384x.h
26627	HFA384x_ASSOCSTATUS_DISASSOC	((UINT16)3)	hfa384x.h
26628	HFA384x_ASSOCSTATUS_ASSOCFAIL	((UINT16)4)	hfa384x.h
26629	HFA384x_ASSOCSTATUS_AUTHFAIL	((UINT16)5)	hfa384x.h
26630	HFA384x_ASSOCREQ_TYPE_ASSOC	0	hfa384x.h
26631	HFA384x_ASSOCREQ_TYPE_REASSOC	1	hfa384x.h
26632	HFA384x_USB_ENBULKIN	6	hfa384x.h
26633	HFA384x_USB_TXFRM	0	hfa384x.h
26634	HFA384x_USB_CMDREQ	1	hfa384x.h
26635	HFA384x_USB_WRIDREQ	2	hfa384x.h
26636	HFA384x_USB_RRIDREQ	3	hfa384x.h
26637	HFA384x_USB_WMEMREQ	4	hfa384x.h
26638	HFA384x_USB_RMEMREQ	5	hfa384x.h
26639	HFA384x_USB_INFOFRM	0x8000	hfa384x.h
26640	HFA384x_USB_CMDRESP	0x8001	hfa384x.h
26641	HFA384x_USB_WRIDRESP	0x8002	hfa384x.h
26642	HFA384x_USB_RRIDRESP	0x8003	hfa384x.h
26643	HFA384x_USB_WMEMRESP	0x8004	hfa384x.h
26644	HFA384x_USB_RMEMRESP	0x8005	hfa384x.h
26645	HFA384x_USB_BUFAVAIL	0x8006	hfa384x.h
26646	HFA384x_USB_ERROR	0x8007	hfa384x.h
26647	MAX_PRISM2_GRP_ADDR	16	hfa384x.h
26648	MAX_GRP_ADDR	32	hfa384x.h
26649	WLAN_COMMENT_MAX	80	hfa384x.h	Max. length of user comment string.
26650	MM_SAT_PCF	(BIT14)	hfa384x.h
26651	MM_GCSD_PCF	(BIT15)	hfa384x.h
26652	MM_GCSD_PCF_EB	(BIT14 \| BIT15)	hfa384x.h
26653	WLAN_STATE_STOPPED	0	hfa384x.h	Network is not active.
26654	WLAN_STATE_STARTED	1	hfa384x.h	Network has been started.
26655	WLAN_AUTH_MAX	60	hfa384x.h	Max. # of authenticated stations.
26656	WLAN_ACCESS_MAX	60	hfa384x.h	Max. # of stations in an access list.
26657	WLAN_ACCESS_NONE	0	hfa384x.h	No stations may be authenticated.
26658	WLAN_ACCESS_ALL	1	hfa384x.h	All stations may be authenticated.
26659	WLAN_ACCESS_ALLOW	2	hfa384x.h	Authenticate only "allowed" stations.
26660	WLAN_ACCESS_DENY	3	hfa384x.h	Do not authenticate "denied" stations.
26661	hfa384x_getreg	__hfa384x_getreg_noswap	hfa384x.h
26662	hfa384x_setreg	__hfa384x_setreg_noswap	hfa384x.h
26663	hfa384x_getreg_noswap	__hfa384x_getreg	hfa384x.h
26664	hfa384x_setreg_noswap	__hfa384x_setreg	hfa384x.h
26665	hfa384x_getreg	__hfa384x_getreg	hfa384x.h
26666	hfa384x_setreg	__hfa384x_setreg	hfa384x.h
26667	hfa384x_getreg_noswap	__hfa384x_getreg_noswap	hfa384x.h
26668	hfa384x_setreg_noswap	__hfa384x_setreg_noswap	hfa384x.h
26669	MTNIC_MAX_PORTS	2	mtnic.h
26670	NUM_TX_RINGS	1	mtnic.h
26671	NUM_RX_RINGS	1	mtnic.h
26672	NUM_CQS	(NUM_RX_RINGS + NUM_TX_RINGS)	mtnic.h
26673	GO_BIT_TIMEOUT	6000	mtnic.h
26674	TBIT_RETRIES	100	mtnic.h
26675	UNITS_BUFFER_SIZE	8	mtnic.h	can be configured to 4/8/16
26676	MAX_GAP_PROD_CONS	(UNITS_BUFFER_SIZE/4)	mtnic.h
26677	DEF_MTU	1600	mtnic.h
26678	DEF_IOBUF_SIZE	1600	mtnic.h
26679	MAC_ADDRESS_SIZE	6	mtnic.h
26680	NUM_EQES	16	mtnic.h
26681	ROUND_TO_CHECK	0x400	mtnic.h
26682	dma_addr_t	unsigned long	mtnic.h
26683	PAGE_SIZE	4096	mtnic.h
26684	PAGE_MASK	(PAGE_SIZE - 1)	mtnic.h
26685	MTNIC_MAILBOX_SIZE	PAGE_SIZE	mtnic.h
26686	MELLANOX_VENDOR_ID	0x15b3	mtnic.h
26687	MTNIC_DEVICE_ID	0x00a00190	mtnic.h
26688	MTNIC_RESET_OFFSET	0xF0010	mtnic.h
26689	MTNIC_DEVICE_ID_OFFSET	0xF0014	mtnic.h
26690	NATSEMI_HW_TIMEOUT	400	natsemi.h
26691	TX_RING_SIZE	4	natsemi.h
26692	NUM_RX_DESC	4	natsemi.h
26693	RX_BUF_SIZE	1536	natsemi.h
26694	OWN	0x80000000	natsemi.h
26695	DSIZE	0x00000FFF	natsemi.h
26696	CRC_SIZE	4	natsemi.h
26697	PHYID_AM79C874	0x0022561b	natsemi.h
26698	SRR_DP83815_C	0x0302	natsemi.h
26699	SRR_DP83815_D	0x0403	natsemi.h
26700	SRR_DP83816_A4	0x0504	natsemi.h
26701	SRR_DP83816_A5	0x0505	natsemi.h
26702	PMDCSR_VAL	0x189c	natsemi.h	enable preferred adaptation circuitry
26703	TSTDAT_VAL	0x0	natsemi.h
26704	DSPCFG_VAL	0x5040	natsemi.h
26705	SDCFG_VAL	0x008c	natsemi.h	set voltage thresholds for Signal Detect
26706	DSPCFG_LOCK	0x20	natsemi.h	coefficient lock bit in DSPCFG
26707	DSPCFG_COEF	0x1000	natsemi.h	see coefficient (in TSTDAT) bit in DSPCFG
26708	TSTDAT_FIXED	0xe8	natsemi.h	magic number for bad coefficients
26709	CFG_RESET_SAVE	0xfde000	natsemi.h
26710	WCSR_RESET_SAVE	0x61f	natsemi.h
26711	RFCR_RESET_SAVE	0xf8500000;	natsemi.h
26712	EE_Write0	(EE_ChipSelect)	natsemi.h
26713	EE_Write1	(EE_ChipSelect \| EE_DataIn)	natsemi.h
26714	EE_CS	0x08	natsemi.h	EEPROM chip select
26715	EE_SK	0x04	natsemi.h	EEPROM shift clock
26716	EE_DI	0x01	natsemi.h	Data in
26717	EE_DO	0x02	natsemi.h	Data out
26718	EE_MAC	7	natsemi.h
26719	EE_REG	EECtrl	natsemi.h
26720	VENDOR_NONE	0	ns8390.h
26721	VENDOR_WD	1	ns8390.h
26722	VENDOR_NOVELL	2	ns8390.h
26723	VENDOR_3COM	3	ns8390.h
26724	FLAG_PIO	0x01	ns8390.h
26725	FLAG_16BIT	0x02	ns8390.h
26726	FLAG_790	0x04	ns8390.h
26727	MEM_8192	32	ns8390.h
26728	MEM_16384	64	ns8390.h
26729	MEM_32768	128	ns8390.h
26730	ISA_MAX_ADDR	0x400	ns8390.h
26731	WD_LOW_BASE	0x200	ns8390.h
26732	WD_HIGH_BASE	0x3e0	ns8390.h
26733	WD_DEFAULT_MEM	0xD0000	ns8390.h
26734	WD_NIC_ADDR	0x10	ns8390.h
26735	WD_MSR	0x00	ns8390.h
26736	WD_ICR	0x01	ns8390.h
26737	WD_IAR	0x02	ns8390.h
26738	WD_BIO	0x03	ns8390.h
26739	WD_IRR	0x04	ns8390.h
26740	WD_LAAR	0x05	ns8390.h
26741	WD_IJR	0x06	ns8390.h
26742	WD_GP2	0x07	ns8390.h
26743	WD_LAR	0x08	ns8390.h
26744	WD_BID	0x0E	ns8390.h
26745	WD_ICR_16BIT	0x01	ns8390.h
26746	WD_MSR_MENB	0x40	ns8390.h
26747	WD_LAAR_L16EN	0x40	ns8390.h
26748	WD_LAAR_M16EN	0x80	ns8390.h
26749	WD_SOFTCONFIG	0x20	ns8390.h
26750	TYPE_WD8003S	0x02	ns8390.h
26751	TYPE_WD8003E	0x03	ns8390.h
26752	TYPE_WD8013EBT	0x05	ns8390.h
26753	TYPE_WD8003W	0x24	ns8390.h
26754	TYPE_WD8003EB	0x25	ns8390.h
26755	TYPE_WD8013W	0x26	ns8390.h
26756	TYPE_WD8013EP	0x27	ns8390.h
26757	TYPE_WD8013WC	0x28	ns8390.h
26758	TYPE_WD8013EPC	0x29	ns8390.h
26759	TYPE_SMC8216T	0x2a	ns8390.h
26760	TYPE_SMC8216C	0x2b	ns8390.h
26761	TYPE_SMC8416T	0x00	ns8390.h	Bogus entries: the 8416 generates the
26762	TYPE_SMC8416C	0x00	ns8390.h	the same codes as the 8216.
26763	TYPE_SMC8013EBP	0x2c	ns8390.h
26764	_3COM_BASE	0x300	ns8390.h
26765	_3COM_TX_PAGE_OFFSET_8BIT	0x20	ns8390.h
26766	_3COM_TX_PAGE_OFFSET_16BIT	0x0	ns8390.h
26767	_3COM_RX_PAGE_OFFSET_16BIT	0x20	ns8390.h
26768	_3COM_ASIC_OFFSET	0x400	ns8390.h
26769	_3COM_NIC_OFFSET	0x0	ns8390.h
26770	_3COM_PSTR	0	ns8390.h
26771	_3COM_PSPR	1	ns8390.h
26772	_3COM_BCFR	3	ns8390.h
26773	_3COM_BCFR_2E0	0x01	ns8390.h
26774	_3COM_BCFR_2A0	0x02	ns8390.h
26775	_3COM_BCFR_280	0x04	ns8390.h
26776	_3COM_BCFR_250	0x08	ns8390.h
26777	_3COM_BCFR_350	0x10	ns8390.h
26778	_3COM_BCFR_330	0x20	ns8390.h
26779	_3COM_BCFR_310	0x40	ns8390.h
26780	_3COM_BCFR_300	0x80	ns8390.h
26781	_3COM_PCFR	4	ns8390.h
26782	_3COM_PCFR_PIO	0	ns8390.h
26783	_3COM_PCFR_C8000	0x10	ns8390.h
26784	_3COM_PCFR_CC000	0x20	ns8390.h
26785	_3COM_PCFR_D8000	0x40	ns8390.h
26786	_3COM_PCFR_DC000	0x80	ns8390.h
26787	_3COM_CR	6	ns8390.h
26788	_3COM_CR_RST	0x01	ns8390.h	Reset GA and NIC
26789	_3COM_CR_XSEL	0x02	ns8390.h	Transceiver select. BNC=1(def) AUI=0
26790	_3COM_CR_EALO	0x04	ns8390.h	window EA PROM 0-15 to I/O base
26791	_3COM_CR_EAHI	0x08	ns8390.h	window EA PROM 16-31 to I/O base
26792	_3COM_CR_SHARE	0x10	ns8390.h	select interrupt sharing option
26793	_3COM_CR_DBSEL	0x20	ns8390.h	Double buffer select
26794	_3COM_CR_DDIR	0x40	ns8390.h	DMA direction select
26795	_3COM_CR_START	0x80	ns8390.h	Start DMA controller
26796	_3COM_GACFR	5	ns8390.h
26797	_3COM_GACFR_MBS0	0x01	ns8390.h
26798	_3COM_GACFR_MBS1	0x02	ns8390.h
26799	_3COM_GACFR_MBS2	0x04	ns8390.h
26800	_3COM_GACFR_RSEL	0x08	ns8390.h	enable shared memory
26801	_3COM_GACFR_TEST	0x10	ns8390.h	for GA testing
26802	_3COM_GACFR_OWS	0x20	ns8390.h	select 0WS access to GA
26803	_3COM_GACFR_TCM	0x40	ns8390.h	Mask DMA interrupts
26804	_3COM_GACFR_NIM	0x80	ns8390.h	Mask NIC interrupts
26805	_3COM_STREG	7	ns8390.h
26806	_3COM_STREG_REV	0x07	ns8390.h	GA revision
26807	_3COM_STREG_DIP	0x08	ns8390.h	DMA in progress
26808	_3COM_STREG_DTC	0x10	ns8390.h	DMA terminal count
26809	_3COM_STREG_OFLW	0x20	ns8390.h	Overflow
26810	_3COM_STREG_UFLW	0x40	ns8390.h	Underflow
26811	_3COM_STREG_DPRDY	0x80	ns8390.h	Data port ready
26812	_3COM_IDCFR	8	ns8390.h
26813	_3COM_IDCFR_DRQ0	0x01	ns8390.h	DMA request 1 select
26814	_3COM_IDCFR_DRQ1	0x02	ns8390.h	DMA request 2 select
26815	_3COM_IDCFR_DRQ2	0x04	ns8390.h	DMA request 3 select
26816	_3COM_IDCFR_UNUSED	0x08	ns8390.h	not used
26817	_3COM_IDCFR_IRQ2	0x10	ns8390.h	Interrupt request 2 select
26818	_3COM_IDCFR_IRQ3	0x20	ns8390.h	Interrupt request 3 select
26819	_3COM_IDCFR_IRQ4	0x40	ns8390.h	Interrupt request 4 select
26820	_3COM_IDCFR_IRQ5	0x80	ns8390.h	Interrupt request 5 select
26821	_3COM_IRQ2	2	ns8390.h
26822	_3COM_IRQ3	3	ns8390.h
26823	_3COM_IRQ4	4	ns8390.h
26824	_3COM_IRQ5	5	ns8390.h
26825	_3COM_DAMSB	9	ns8390.h
26826	_3COM_DALSB	0x0a	ns8390.h
26827	_3COM_VPTR2	0x0b	ns8390.h
26828	_3COM_VPTR1	0x0c	ns8390.h
26829	_3COM_VPTR0	0x0d	ns8390.h
26830	_3COM_RFMSB	0x0e	ns8390.h
26831	_3COM_RFLSB	0x0f	ns8390.h
26832	NE_ASIC_OFFSET	0x10	ns8390.h
26833	NE_RESET	0x0F	ns8390.h	Used to reset card
26834	NE_DATA	0x00	ns8390.h	Used to read/write NIC mem
26835	COMPEX_RL2000_TRIES	200	ns8390.h
26836	D8390_P0_COMMAND	0x00	ns8390.h
26837	D8390_P0_PSTART	0x01	ns8390.h
26838	D8390_P0_PSTOP	0x02	ns8390.h
26839	D8390_P0_BOUND	0x03	ns8390.h
26840	D8390_P0_TSR	0x04	ns8390.h
26841	D8390_P0_TPSR	0x04	ns8390.h
26842	D8390_P0_TBCR0	0x05	ns8390.h
26843	D8390_P0_TBCR1	0x06	ns8390.h
26844	D8390_P0_ISR	0x07	ns8390.h
26845	D8390_P0_RSAR0	0x08	ns8390.h
26846	D8390_P0_RSAR1	0x09	ns8390.h
26847	D8390_P0_RBCR0	0x0A	ns8390.h
26848	D8390_P0_RBCR1	0x0B	ns8390.h
26849	D8390_P0_RSR	0x0C	ns8390.h
26850	D8390_P0_RCR	0x0C	ns8390.h
26851	D8390_P0_TCR	0x0D	ns8390.h
26852	D8390_P0_DCR	0x0E	ns8390.h
26853	D8390_P0_IMR	0x0F	ns8390.h
26854	D8390_P1_COMMAND	0x00	ns8390.h
26855	D8390_P1_PAR0	0x01	ns8390.h
26856	D8390_P1_PAR1	0x02	ns8390.h
26857	D8390_P1_PAR2	0x03	ns8390.h
26858	D8390_P1_PAR3	0x04	ns8390.h
26859	D8390_P1_PAR4	0x05	ns8390.h
26860	D8390_P1_PAR5	0x06	ns8390.h
26861	D8390_P1_CURR	0x07	ns8390.h
26862	D8390_P1_MAR0	0x08	ns8390.h
26863	D8390_COMMAND_PS0	0x0	ns8390.h	Page 0 select
26864	D8390_COMMAND_PS1	0x40	ns8390.h	Page 1 select
26865	D8390_COMMAND_PS2	0x80	ns8390.h	Page 2 select
26866	D8390_COMMAND_RD2	0x20	ns8390.h	Remote DMA control
26867	D8390_COMMAND_RD1	0x10	ns8390.h
26868	D8390_COMMAND_RD0	0x08	ns8390.h
26869	D8390_COMMAND_TXP	0x04	ns8390.h	transmit packet
26870	D8390_COMMAND_STA	0x02	ns8390.h	start
26871	D8390_COMMAND_STP	0x01	ns8390.h	stop
26872	D8390_RCR_MON	0x20	ns8390.h	monitor mode
26873	D8390_DCR_FT1	0x40	ns8390.h
26874	D8390_DCR_LS	0x08	ns8390.h	Loopback select
26875	D8390_DCR_WTS	0x01	ns8390.h	Word transfer select
26876	D8390_ISR_PRX	0x01	ns8390.h	successful recv
26877	D8390_ISR_PTX	0x02	ns8390.h	successful xmit
26878	D8390_ISR_RXE	0x04	ns8390.h	receive error
26879	D8390_ISR_TXE	0x08	ns8390.h	transmit error
26880	D8390_ISR_OVW	0x10	ns8390.h	Overflow
26881	D8390_ISR_CNT	0x20	ns8390.h	Counter overflow
26882	D8390_ISR_RDC	0x40	ns8390.h	Remote DMA complete
26883	D8390_ISR_RST	0x80	ns8390.h	reset
26884	D8390_RSTAT_PRX	0x01	ns8390.h	successful recv
26885	D8390_RSTAT_CRC	0x02	ns8390.h	CRC error
26886	D8390_RSTAT_FAE	0x04	ns8390.h	Frame alignment error
26887	D8390_RSTAT_OVER	0x08	ns8390.h	FIFO overrun
26888	D8390_TXBUF_SIZE	6	ns8390.h
26889	D8390_RXBUF_END	32	ns8390.h
26890	D8390_PAGE_SIZE	256	ns8390.h
26891	WLAN_ADDR_LEN	6	p80211hdr.h
26892	WLAN_CRC_LEN	4	p80211hdr.h
26893	WLAN_BSSID_LEN	6	p80211hdr.h
26894	WLAN_BSS_TS_LEN	8	p80211hdr.h
26895	WLAN_HDR_A3_LEN	24	p80211hdr.h
26896	WLAN_HDR_A4_LEN	30	p80211hdr.h
26897	WLAN_SSID_MAXLEN	32	p80211hdr.h
26898	WLAN_DATA_MAXLEN	2312	p80211hdr.h
26899	WLAN_A3FR_MAXLEN	(WLAN_HDR_A3_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
26900	WLAN_A4FR_MAXLEN	(WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)	p80211hdr.h
26901	WLAN_BEACON_FR_MAXLEN	(WLAN_HDR_A3_LEN + 334)	p80211hdr.h
26902	WLAN_ATIM_FR_MAXLEN	(WLAN_HDR_A3_LEN + 0)	p80211hdr.h
26903	WLAN_DISASSOC_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
26904	WLAN_ASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 48)	p80211hdr.h
26905	WLAN_ASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
26906	WLAN_REASSOCREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 54)	p80211hdr.h
26907	WLAN_REASSOCRESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 16)	p80211hdr.h
26908	WLAN_PROBEREQ_FR_MAXLEN	(WLAN_HDR_A3_LEN + 44)	p80211hdr.h
26909	WLAN_PROBERESP_FR_MAXLEN	(WLAN_HDR_A3_LEN + 78)	p80211hdr.h
26910	WLAN_AUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 261)	p80211hdr.h
26911	WLAN_DEAUTHEN_FR_MAXLEN	(WLAN_HDR_A3_LEN + 2)	p80211hdr.h
26912	WLAN_WEP_NKEYS	4	p80211hdr.h
26913	WLAN_WEP_MAXKEYLEN	13	p80211hdr.h
26914	WLAN_CHALLENGE_IE_LEN	130	p80211hdr.h
26915	WLAN_CHALLENGE_LEN	128	p80211hdr.h
26916	WLAN_WEP_IV_LEN	4	p80211hdr.h
26917	WLAN_WEP_ICV_LEN	4	p80211hdr.h
26918	WLAN_FTYPE_MGMT	0x00	p80211hdr.h
26919	WLAN_FTYPE_CTL	0x01	p80211hdr.h
26920	WLAN_FTYPE_DATA	0x02	p80211hdr.h
26921	WLAN_FSTYPE_ASSOCREQ	0x00	p80211hdr.h
26922	WLAN_FSTYPE_ASSOCRESP	0x01	p80211hdr.h
26923	WLAN_FSTYPE_REASSOCREQ	0x02	p80211hdr.h
26924	WLAN_FSTYPE_REASSOCRESP	0x03	p80211hdr.h
26925	WLAN_FSTYPE_PROBEREQ	0x04	p80211hdr.h
26926	WLAN_FSTYPE_PROBERESP	0x05	p80211hdr.h
26927	WLAN_FSTYPE_BEACON	0x08	p80211hdr.h
26928	WLAN_FSTYPE_ATIM	0x09	p80211hdr.h
26929	WLAN_FSTYPE_DISASSOC	0x0a	p80211hdr.h
26930	WLAN_FSTYPE_AUTHEN	0x0b	p80211hdr.h
26931	WLAN_FSTYPE_DEAUTHEN	0x0c	p80211hdr.h
26932	WLAN_FSTYPE_BLOCKACKREQ	0x8	p80211hdr.h
26933	WLAN_FSTYPE_BLOCKACK	0x9	p80211hdr.h
26934	WLAN_FSTYPE_PSPOLL	0x0a	p80211hdr.h
26935	WLAN_FSTYPE_RTS	0x0b	p80211hdr.h
26936	WLAN_FSTYPE_CTS	0x0c	p80211hdr.h
26937	WLAN_FSTYPE_ACK	0x0d	p80211hdr.h
26938	WLAN_FSTYPE_CFEND	0x0e	p80211hdr.h
26939	WLAN_FSTYPE_CFENDCFACK	0x0f	p80211hdr.h
26940	WLAN_FSTYPE_DATAONLY	0x00	p80211hdr.h
26941	WLAN_FSTYPE_DATA_CFACK	0x01	p80211hdr.h
26942	WLAN_FSTYPE_DATA_CFPOLL	0x02	p80211hdr.h
26943	WLAN_FSTYPE_DATA_CFACK_CFPOLL	0x03	p80211hdr.h
26944	WLAN_FSTYPE_NULL	0x04	p80211hdr.h
26945	WLAN_FSTYPE_CFACK	0x05	p80211hdr.h
26946	WLAN_FSTYPE_CFPOLL	0x06	p80211hdr.h
26947	WLAN_FSTYPE_CFACK_CFPOLL	0x07	p80211hdr.h
26948	WLAN_FCS_LEN	4	p80211hdr.h
26949	PNIC_PCI_VENDOR	0xfefe	pnic_api.h	Hopefully these won't clash with
26950	PNIC_PCI_DEVICE	0xefef	pnic_api.h	any real PCI device IDs.
26951	PNIC_REG_CMD	0x00	pnic_api.h	Command register, 2 bytes, write only
26952	PNIC_REG_STAT	0x00	pnic_api.h	Status register, 2 bytes, read only
26953	PNIC_REG_LEN	0x02	pnic_api.h	Length register, 2 bytes, read-write
26954	PNIC_REG_DATA	0x04	pnic_api.h	Data port, 1 byte, read-write
26955	PNIC_MAX_REG	0x04	pnic_api.h
26956	PNIC_CMD_NOOP	0x0000	pnic_api.h
26957	PNIC_CMD_API_VER	0x0001	pnic_api.h
26958	PNIC_CMD_READ_MAC	0x0002	pnic_api.h
26959	PNIC_CMD_RESET	0x0003	pnic_api.h
26960	PNIC_CMD_XMIT	0x0004	pnic_api.h
26961	PNIC_CMD_RECV	0x0005	pnic_api.h
26962	PNIC_CMD_RECV_QLEN	0x0006	pnic_api.h
26963	PNIC_CMD_MASK_IRQ	0x0007	pnic_api.h
26964	PNIC_CMD_FORCE_IRQ	0x0008	pnic_api.h
26965	PNIC_STATUS_OK	0x4f4b	pnic_api.h	'OK'
26966	PNIC_STATUS_UNKNOWN_CMD	0x3f3f	pnic_api.h	'??'
26967	PNIC_API_VERSION	0x0101	pnic_api.h	1.1
26968	SIS900_TOTAL_SIZE	0x100	sis900.h
26969	MAX_DMA_RANGE	7	sis900.h	actually 0 means MAXIMUM !!
26970	TxMXDMA_shift	20	sis900.h
26971	RxMXDMA_shift	20	sis900.h
26972	TX_DMA_BURST	0	sis900.h
26973	RX_DMA_BURST	0	sis900.h
26974	TX_FILL_THRESH	16	sis900.h	1/4 FIFO size
26975	TxFILLT_shift	8	sis900.h
26976	TxDRNT_shift	0	sis900.h
26977	TxDRNT_100	48	sis900.h	3/4 FIFO size
26978	TxDRNT_10	16	sis900.h	1/2 FIFO size
26979	RxDRNT_shift	1	sis900.h
26980	RxDRNT_100	16	sis900.h	1/2 FIFO size
26981	RxDRNT_10	24	sis900.h	3/4 FIFO size
26982	RFAA_shift	28	sis900.h
26983	RFADDR_shift	16	sis900.h
26984	MIIread	0x6000	sis900.h
26985	MIIwrite	0x5002	sis900.h
26986	MIIpmdShift	7	sis900.h
26987	MIIregShift	2	sis900.h
26988	MIIcmdLen	16	sis900.h
26989	MIIcmdShift	16	sis900.h
26990	MII_ID1_OUI_LO	0xFC00	sis900.h	low bits of OUI mask
26991	MII_ID1_MODEL	0x03F0	sis900.h	model number
26992	MII_ID1_REV	0x000F	sis900.h	model number
26993	FDX_CAPABLE_DUPLEX_UNKNOWN	0	sis900.h
26994	FDX_CAPABLE_HALF_SELECTED	1	sis900.h
26995	FDX_CAPABLE_FULL_SELECTED	2	sis900.h
26996	HW_SPEED_UNCONFIG	0	sis900.h
26997	HW_SPEED_HOME	1	sis900.h
26998	HW_SPEED_10_MBPS	10	sis900.h
26999	HW_SPEED_100_MBPS	100	sis900.h
27000	HW_SPEED_DEFAULT	(HW_SPEED_100_MBPS)	sis900.h
27001	CRC_SIZE	4	sis900.h
27002	MAC_HEADER_SIZE	14	sis900.h
27003	TX_BUF_SIZE	1536	sis900.h
27004	RX_BUF_SIZE	1536	sis900.h
27005	NUM_RX_DESC	4	sis900.h	Number of Rx descriptor registers.
27006	TX_TIMEOUT	(4*TICKS_PER_SEC)	sis900.h
27007	BANK_SELECT	14	smc9000.h
27008	TCR	0	smc9000.h	transmit control register
27009	TCR_ENABLE	0x0001	smc9000.h	if this is 1, we can transmit
27010	TCR_FDUPLX	0x0800	smc9000.h	receive packets sent out
27011	TCR_STP_SQET	0x1000	smc9000.h	stop transmitting if Signal quality error
27012	TCR_MON_CNS	0x0400	smc9000.h	monitors the carrier status
27013	TCR_PAD_ENABLE	0x0080	smc9000.h	pads short packets to 64 bytes
27014	TCR_CLEAR	0	smc9000.h	do NOTHING
27015	TCR_NORMAL	(TCR_ENABLE \| TCR_PAD_ENABLE)	smc9000.h
27016	EPH_STATUS	2	smc9000.h
27017	ES_LINK_OK	0x4000	smc9000.h	is the link integrity ok ?
27018	RCR	4	smc9000.h
27019	RCR_SOFTRESET	0x8000	smc9000.h	resets the chip
27020	RCR_STRIP_CRC	0x200	smc9000.h	strips CRC
27021	RCR_ENABLE	0x100	smc9000.h	IFF this is set, we can receive packets
27022	RCR_ALMUL	0x4	smc9000.h	receive all multicast packets
27023	RCR_PROMISC	0x2	smc9000.h	enable promiscuous mode
27024	RCR_NORMAL	(RCR_STRIP_CRC \| RCR_ENABLE)	smc9000.h
27025	RCR_CLEAR	0x0	smc9000.h	set it to a base state
27026	COUNTER	6	smc9000.h
27027	MIR	8	smc9000.h
27028	MCR	10	smc9000.h
27029	RPC_REG	0x000A	smc9000.h
27030	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
27031	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
27032	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
27033	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
27034	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
27035	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
27036	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
27037	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
27038	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
27039	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
27040	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
27041	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
27042	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
27043	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
27044	RPC_REG	0x000A	smc9000.h
27045	RPC_SPEED	0x2000	smc9000.h	When 1 PHY is in 100Mbps mode.
27046	RPC_DPLX	0x1000	smc9000.h	When 1 PHY is in Full-Duplex Mode
27047	RPC_ANEG	0x0800	smc9000.h	When 1 PHY is in Auto-Negotiate Mode
27048	RPC_LSXA_SHFT	5	smc9000.h	Bits to shift LS2A,LS1A,LS0A to lsb
27049	RPC_LSXB_SHFT	2	smc9000.h	Bits to get LS2B,LS1B,LS0B to lsb
27050	RPC_LED_100_10	(0x00)	smc9000.h	LED = 100Mbps OR's with 10Mbps link detect
27051	RPC_LED_RES	(0x01)	smc9000.h	LED = Reserved
27052	RPC_LED_10	(0x02)	smc9000.h	LED = 10Mbps link detect
27053	RPC_LED_FD	(0x03)	smc9000.h	LED = Full Duplex Mode
27054	RPC_LED_TX_RX	(0x04)	smc9000.h	LED = TX or RX packet occurred
27055	RPC_LED_100	(0x05)	smc9000.h	LED = 100Mbps link dectect
27056	RPC_LED_TX	(0x06)	smc9000.h	LED = TX packet occurred
27057	RPC_LED_RX	(0x07)	smc9000.h	LED = RX packet occurred
27058	RPC_DEFAULT	(RPC_ANEG \| (RPC_LED_100 << RPC_LSXA_SHFT) \| (RPC_LED_FD << RPC_LSXB_SHFT) \| RPC_SPEED \| RPC_DPLX)	smc9000.h
27059	CONFIG	0	smc9000.h
27060	CFG_AUI_SELECT	0x100	smc9000.h
27061	BASE	2	smc9000.h
27062	ADDR0	4	smc9000.h
27063	ADDR1	6	smc9000.h
27064	ADDR2	8	smc9000.h
27065	GENERAL	10	smc9000.h
27066	CONTROL	12	smc9000.h
27067	CTL_POWERDOWN	0x2000	smc9000.h
27068	CTL_LE_ENABLE	0x80	smc9000.h
27069	CTL_CR_ENABLE	0x40	smc9000.h
27070	CTL_TE_ENABLE	0x0020	smc9000.h
27071	CTL_AUTO_RELEASE	0x0800	smc9000.h
27072	CTL_EPROM_ACCESS	0x0003	smc9000.h	high if Eprom is being read
27073	MMU_CMD	0	smc9000.h
27074	MC_BUSY	1	smc9000.h	only readable bit in the register
27075	MC_NOP	0	smc9000.h
27076	MC_ALLOC	0x20	smc9000.h	or with number of 256 byte packets
27077	MC_RESET	0x40	smc9000.h
27078	MC_REMOVE	0x60	smc9000.h	remove the current rx packet
27079	MC_RELEASE	0x80	smc9000.h	remove and release the current rx packet
27080	MC_FREEPKT	0xA0	smc9000.h	Release packet in PNR register
27081	MC_ENQUEUE	0xC0	smc9000.h	Enqueue the packet for transmit
27082	PNR_ARR	2	smc9000.h
27083	FIFO_PORTS	4	smc9000.h
27084	FP_RXEMPTY	0x8000	smc9000.h
27085	FP_TXEMPTY	0x80	smc9000.h
27086	POINTER	6	smc9000.h
27087	PTR_READ	0x2000	smc9000.h
27088	PTR_RCV	0x8000	smc9000.h
27089	PTR_AUTOINC	0x4000	smc9000.h
27090	PTR_AUTO_INC	0x0040	smc9000.h
27091	DATA_1	8	smc9000.h
27092	DATA_2	10	smc9000.h
27093	INTERRUPT	12	smc9000.h
27094	INT_MASK	13	smc9000.h
27095	IM_RCV_INT	0x1	smc9000.h
27096	IM_TX_INT	0x2	smc9000.h
27097	IM_TX_EMPTY_INT	0x4	smc9000.h
27098	IM_ALLOC_INT	0x8	smc9000.h
27099	IM_RX_OVRN_INT	0x10	smc9000.h
27100	IM_EPH_INT	0x20	smc9000.h
27101	IM_ERCV_INT	0x40	smc9000.h	not on SMC9192
27102	MULTICAST1	0	smc9000.h
27103	MULTICAST2	2	smc9000.h
27104	MULTICAST3	4	smc9000.h
27105	MULTICAST4	6	smc9000.h
27106	MGMT	8	smc9000.h
27107	REVISION	10	smc9000.h	( hi: chip id low: rev # )
27108	MII_REG	0x0008	smc9000.h
27109	MII_MSK_CRS100	0x4000	smc9000.h	Disables CRS100 detection during tx half dup
27110	MII_MDOE	0x0008	smc9000.h	MII Output Enable
27111	MII_MCLK	0x0004	smc9000.h	MII Clock, pin MDCLK
27112	MII_MDI	0x0002	smc9000.h	MII Input, pin MDI
27113	MII_MDO	0x0001	smc9000.h	MII Output, pin MDO
27114	ERCV	12	smc9000.h
27115	CHIP_9190	3	smc9000.h
27116	CHIP_9194	4	smc9000.h
27117	CHIP_9195	5	smc9000.h
27118	CHIP_9196	4	smc9000.h
27119	CHIP_91100	7	smc9000.h
27120	CHIP_91100FD	8	smc9000.h
27121	REV_9196	6	smc9000.h
27122	TS_SUCCESS	0x0001	smc9000.h
27123	TS_LOSTCAR	0x0400	smc9000.h
27124	TS_LATCOL	0x0200	smc9000.h
27125	TS_16COL	0x0010	smc9000.h
27126	RS_ALGNERR	0x8000	smc9000.h
27127	RS_BADCRC	0x2000	smc9000.h
27128	RS_ODDFRAME	0x1000	smc9000.h
27129	RS_TOOLONG	0x0800	smc9000.h
27130	RS_TOOSHORT	0x0400	smc9000.h
27131	RS_MULTICAST	0x0001	smc9000.h
27132	RS_ERRORS	(RS_ALGNERR \| RS_BADCRC \| RS_TOOLONG \| RS_TOOSHORT)	smc9000.h
27133	MII_REG	0x0008	smc9000.h
27134	MII_MSK_CRS100	0x4000	smc9000.h	Disables CRS100 detection during tx half dup
27135	MII_MDOE	0x0008	smc9000.h	MII Output Enable
27136	MII_MCLK	0x0004	smc9000.h	MII Clock, pin MDCLK
27137	MII_MDI	0x0002	smc9000.h	MII Input, pin MDI
27138	MII_MDO	0x0001	smc9000.h	MII Output, pin MDO
27139	PHY_CNTL_REG	0x00	smc9000.h
27140	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
27141	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
27142	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
27143	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
27144	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
27145	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
27146	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
27147	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
27148	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
27149	PHY_STAT_REG	0x01	smc9000.h
27150	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
27151	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
27152	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
27153	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
27154	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
27155	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
27156	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
27157	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
27158	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
27159	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
27160	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
27161	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
27162	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
27163	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
27164	PHY_AD_REG	0x04	smc9000.h
27165	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
27166	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
27167	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
27168	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
27169	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
27170	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
27171	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
27172	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
27173	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
27174	PHY_RMT_REG	0x05	smc9000.h
27175	PHY_CFG1_REG	0x10	smc9000.h
27176	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
27177	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
27178	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
27179	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
27180	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
27181	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
27182	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
27183	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
27184	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
27185	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
27186	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
27187	PHY_CFG2_REG	0x11	smc9000.h
27188	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
27189	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
27190	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
27191	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
27192	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
27193	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
27194	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
27195	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
27196	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
27197	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
27198	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
27199	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
27200	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
27201	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
27202	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
27203	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
27204	PHY_CNTL_REG	0x00	smc9000.h
27205	PHY_CNTL_RST	0x8000	smc9000.h	1=PHY Reset
27206	PHY_CNTL_LPBK	0x4000	smc9000.h	1=PHY Loopback
27207	PHY_CNTL_SPEED	0x2000	smc9000.h	1=100Mbps, 0=10Mpbs
27208	PHY_CNTL_ANEG_EN	0x1000	smc9000.h	1=Enable Auto negotiation
27209	PHY_CNTL_PDN	0x0800	smc9000.h	1=PHY Power Down mode
27210	PHY_CNTL_MII_DIS	0x0400	smc9000.h	1=MII 4 bit interface disabled
27211	PHY_CNTL_ANEG_RST	0x0200	smc9000.h	1=Reset Auto negotiate
27212	PHY_CNTL_DPLX	0x0100	smc9000.h	1=Full Duplex, 0=Half Duplex
27213	PHY_CNTL_COLTST	0x0080	smc9000.h	1= MII Colision Test
27214	PHY_STAT_REG	0x01	smc9000.h
27215	PHY_STAT_CAP_T4	0x8000	smc9000.h	1=100Base-T4 capable
27216	PHY_STAT_CAP_TXF	0x4000	smc9000.h	1=100Base-X full duplex capable
27217	PHY_STAT_CAP_TXH	0x2000	smc9000.h	1=100Base-X half duplex capable
27218	PHY_STAT_CAP_TF	0x1000	smc9000.h	1=10Mbps full duplex capable
27219	PHY_STAT_CAP_TH	0x0800	smc9000.h	1=10Mbps half duplex capable
27220	PHY_STAT_CAP_SUPR	0x0040	smc9000.h	1=recv mgmt frames with not preamble
27221	PHY_STAT_ANEG_ACK	0x0020	smc9000.h	1=ANEG has completed
27222	PHY_STAT_REM_FLT	0x0010	smc9000.h	1=Remote Fault detected
27223	PHY_STAT_CAP_ANEG	0x0008	smc9000.h	1=Auto negotiate capable
27224	PHY_STAT_LINK	0x0004	smc9000.h	1=valid link
27225	PHY_STAT_JAB	0x0002	smc9000.h	1=10Mbps jabber condition
27226	PHY_STAT_EXREG	0x0001	smc9000.h	1=extended registers implemented
27227	PHY_ID1_REG	0x02	smc9000.h	PHY Identifier 1
27228	PHY_ID2_REG	0x03	smc9000.h	PHY Identifier 2
27229	PHY_AD_REG	0x04	smc9000.h
27230	PHY_AD_NP	0x8000	smc9000.h	1=PHY requests exchange of Next Page
27231	PHY_AD_ACK	0x4000	smc9000.h	1=got link code word from remote
27232	PHY_AD_RF	0x2000	smc9000.h	1=advertise remote fault
27233	PHY_AD_T4	0x0200	smc9000.h	1=PHY is capable of 100Base-T4
27234	PHY_AD_TX_FDX	0x0100	smc9000.h	1=PHY is capable of 100Base-TX FDPLX
27235	PHY_AD_TX_HDX	0x0080	smc9000.h	1=PHY is capable of 100Base-TX HDPLX
27236	PHY_AD_10_FDX	0x0040	smc9000.h	1=PHY is capable of 10Base-T FDPLX
27237	PHY_AD_10_HDX	0x0020	smc9000.h	1=PHY is capable of 10Base-T HDPLX
27238	PHY_AD_CSMA	0x0001	smc9000.h	1=PHY is capable of 802.3 CMSA
27239	PHY_RMT_REG	0x05	smc9000.h
27240	PHY_CFG1_REG	0x10	smc9000.h
27241	PHY_CFG1_LNKDIS	0x8000	smc9000.h	1=Rx Link Detect Function disabled
27242	PHY_CFG1_XMTDIS	0x4000	smc9000.h	1=TP Transmitter Disabled
27243	PHY_CFG1_XMTPDN	0x2000	smc9000.h	1=TP Transmitter Powered Down
27244	PHY_CFG1_BYPSCR	0x0400	smc9000.h	1=Bypass scrambler/descrambler
27245	PHY_CFG1_UNSCDS	0x0200	smc9000.h	1=Unscramble Idle Reception Disable
27246	PHY_CFG1_EQLZR	0x0100	smc9000.h	1=Rx Equalizer Disabled
27247	PHY_CFG1_CABLE	0x0080	smc9000.h	1=STP(150ohm), 0=UTP(100ohm)
27248	PHY_CFG1_RLVL0	0x0040	smc9000.h	1=Rx Squelch level reduced by 4.5db
27249	PHY_CFG1_TLVL_SHIFT	2	smc9000.h	Transmit Output Level Adjust
27250	PHY_CFG1_TLVL_MASK	0x003C	smc9000.h
27251	PHY_CFG1_TRF_MASK	0x0003	smc9000.h	Transmitter Rise/Fall time
27252	PHY_CFG2_REG	0x11	smc9000.h
27253	PHY_CFG2_APOLDIS	0x0020	smc9000.h	1=Auto Polarity Correction disabled
27254	PHY_CFG2_JABDIS	0x0010	smc9000.h	1=Jabber disabled
27255	PHY_CFG2_MREG	0x0008	smc9000.h	1=Multiple register access (MII mgt)
27256	PHY_CFG2_INTMDIO	0x0004	smc9000.h	1=Interrupt signaled with MDIO pulseo
27257	PHY_INT_REG	0x12	smc9000.h	Status Output (Interrupt Status)
27258	PHY_INT_INT	0x8000	smc9000.h	1=bits have changed since last read
27259	PHY_INT_LNKFAIL	0x4000	smc9000.h	1=Link Not detected
27260	PHY_INT_LOSSSYNC	0x2000	smc9000.h	1=Descrambler has lost sync
27261	PHY_INT_CWRD	0x1000	smc9000.h	1=Invalid 4B5B code detected on rx
27262	PHY_INT_SSD	0x0800	smc9000.h	1=No Start Of Stream detected on rx
27263	PHY_INT_ESD	0x0400	smc9000.h	1=No End Of Stream detected on rx
27264	PHY_INT_RPOL	0x0200	smc9000.h	1=Reverse Polarity detected
27265	PHY_INT_JAB	0x0100	smc9000.h	1=Jabber detected
27266	PHY_INT_SPDDET	0x0080	smc9000.h	1=100Base-TX mode, 0=10Base-T mode
27267	PHY_INT_DPLXDET	0x0040	smc9000.h	1=Device in Full Duplex
27268	PHY_MASK_REG	0x13	smc9000.h	Interrupt Mask
27269	ADVERTISED_10baseT_Half	(1 << 0)	tg3.h
27270	ADVERTISED_10baseT_Full	(1 << 1)	tg3.h
27271	ADVERTISED_100baseT_Half	(1 << 2)	tg3.h
27272	ADVERTISED_100baseT_Full	(1 << 3)	tg3.h
27273	ADVERTISED_1000baseT_Half	(1 << 4)	tg3.h
27274	ADVERTISED_1000baseT_Full	(1 << 5)	tg3.h
27275	ADVERTISED_Autoneg	(1 << 6)	tg3.h
27276	ADVERTISED_TP	(1 << 7)	tg3.h
27277	ADVERTISED_AUI	(1 << 8)	tg3.h
27278	ADVERTISED_MII	(1 << 9)	tg3.h
27279	ADVERTISED_FIBRE	(1 << 10)	tg3.h
27280	ADVERTISED_BNC	(1 << 11)	tg3.h
27281	SPEED_10	0	tg3.h
27282	SPEED_100	1	tg3.h
27283	SPEED_1000	2	tg3.h
27284	SPEED_INVALID	3	tg3.h
27285	DUPLEX_HALF	0x00	tg3.h
27286	DUPLEX_FULL	0x01	tg3.h
27287	DUPLEX_INVALID	0x02	tg3.h
27288	PORT_TP	0x00	tg3.h
27289	PORT_AUI	0x01	tg3.h
27290	PORT_MII	0x02	tg3.h
27291	PORT_FIBRE	0x03	tg3.h
27292	PORT_BNC	0x04	tg3.h
27293	XCVR_INTERNAL	0x00	tg3.h
27294	XCVR_EXTERNAL	0x01	tg3.h
27295	XCVR_DUMMY1	0x02	tg3.h
27296	XCVR_DUMMY2	0x03	tg3.h
27297	XCVR_DUMMY3	0x04	tg3.h
27298	AUTONEG_DISABLE	0x00	tg3.h
27299	AUTONEG_ENABLE	0x01	tg3.h
27300	WAKE_PHY	(1 << 0)	tg3.h
27301	WAKE_UCAST	(1 << 1)	tg3.h
27302	WAKE_MCAST	(1 << 2)	tg3.h
27303	WAKE_BCAST	(1 << 3)	tg3.h
27304	WAKE_ARP	(1 << 4)	tg3.h
27305	WAKE_MAGIC	(1 << 5)	tg3.h
27306	WAKE_MAGICSECURE	(1 << 6)	tg3.h	only meaningful if WAKE_MAGIC
27307	MII_BMCR	0x00	tg3.h	Basic mode control register
27308	MII_BMSR	0x01	tg3.h	Basic mode status register
27309	MII_PHYSID1	0x02	tg3.h	PHYS ID 1
27310	MII_PHYSID2	0x03	tg3.h	PHYS ID 2
27311	MII_ADVERTISE	0x04	tg3.h	Advertisement control reg
27312	MII_LPA	0x05	tg3.h	Link partner ability reg
27313	MII_EXPANSION	0x06	tg3.h	Expansion register
27314	MII_DCOUNTER	0x12	tg3.h	Disconnect counter
27315	MII_FCSCOUNTER	0x13	tg3.h	False carrier counter
27316	MII_NWAYTEST	0x14	tg3.h	N-way auto-neg test reg
27317	MII_RERRCOUNTER	0x15	tg3.h	Receive error counter
27318	MII_SREVISION	0x16	tg3.h	Silicon revision
27319	MII_RESV1	0x17	tg3.h	Reserved...
27320	MII_LBRERROR	0x18	tg3.h	Lpback, rx, bypass error
27321	MII_PHYADDR	0x19	tg3.h	PHY address
27322	MII_RESV2	0x1a	tg3.h	Reserved...
27323	MII_TPISTATUS	0x1b	tg3.h	TPI status for 10mbps
27324	MII_NCONFIG	0x1c	tg3.h	Network interface config
27325	BMCR_RESV	0x007f	tg3.h	Unused...
27326	BMCR_CTST	0x0080	tg3.h	Collision test
27327	BMCR_FULLDPLX	0x0100	tg3.h	Full duplex
27328	BMCR_ANRESTART	0x0200	tg3.h	Auto negotiation restart
27329	BMCR_ISOLATE	0x0400	tg3.h	Disconnect DP83840 from MII
27330	BMCR_PDOWN	0x0800	tg3.h	Powerdown the DP83840
27331	BMCR_ANENABLE	0x1000	tg3.h	Enable auto negotiation
27332	BMCR_SPEED100	0x2000	tg3.h	Select 100Mbps
27333	BMCR_LOOPBACK	0x4000	tg3.h	TXD loopback bits
27334	BMCR_RESET	0x8000	tg3.h	Reset the DP83840
27335	BMSR_ERCAP	0x0001	tg3.h	Ext-reg capability
27336	BMSR_JCD	0x0002	tg3.h	Jabber detected
27337	BMSR_LSTATUS	0x0004	tg3.h	Link status
27338	BMSR_ANEGCAPABLE	0x0008	tg3.h	Able to do auto-negotiation
27339	BMSR_RFAULT	0x0010	tg3.h	Remote fault detected
27340	BMSR_ANEGCOMPLETE	0x0020	tg3.h	Auto-negotiation complete
27341	BMSR_RESV	0x07c0	tg3.h	Unused...
27342	BMSR_10HALF	0x0800	tg3.h	Can do 10mbps, half-duplex
27343	BMSR_10FULL	0x1000	tg3.h	Can do 10mbps, full-duplex
27344	BMSR_100HALF	0x2000	tg3.h	Can do 100mbps, half-duplex
27345	BMSR_100FULL	0x4000	tg3.h	Can do 100mbps, full-duplex
27346	BMSR_100BASE4	0x8000	tg3.h	Can do 100mbps, 4k packets
27347	ADVERTISE_SLCT	0x001f	tg3.h	Selector bits
27348	ADVERTISE_CSMA	0x0001	tg3.h	Only selector supported
27349	ADVERTISE_10HALF	0x0020	tg3.h	Try for 10mbps half-duplex
27350	ADVERTISE_10FULL	0x0040	tg3.h	Try for 10mbps full-duplex
27351	ADVERTISE_100HALF	0x0080	tg3.h	Try for 100mbps half-duplex
27352	ADVERTISE_100FULL	0x0100	tg3.h	Try for 100mbps full-duplex
27353	ADVERTISE_100BASE4	0x0200	tg3.h	Try for 100mbps 4k packets
27354	ADVERTISE_RESV	0x1c00	tg3.h	Unused...
27355	ADVERTISE_RFAULT	0x2000	tg3.h	Say we can detect faults
27356	ADVERTISE_LPACK	0x4000	tg3.h	Ack link partners response
27357	ADVERTISE_NPAGE	0x8000	tg3.h	Next page bit
27358	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	tg3.h
27359	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	tg3.h
27360	LPA_SLCT	0x001f	tg3.h	Same as advertise selector
27361	LPA_10HALF	0x0020	tg3.h	Can do 10mbps half-duplex
27362	LPA_10FULL	0x0040	tg3.h	Can do 10mbps full-duplex
27363	LPA_100HALF	0x0080	tg3.h	Can do 100mbps half-duplex
27364	LPA_100FULL	0x0100	tg3.h	Can do 100mbps full-duplex
27365	LPA_100BASE4	0x0200	tg3.h	Can do 100mbps 4k packets
27366	LPA_RESV	0x1c00	tg3.h	Unused...
27367	LPA_RFAULT	0x2000	tg3.h	Link partner faulted
27368	LPA_LPACK	0x4000	tg3.h	Link partner acked us
27369	LPA_NPAGE	0x8000	tg3.h	Next page bit
27370	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	tg3.h
27371	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	tg3.h
27372	EXPANSION_NWAY	0x0001	tg3.h	Can do N-way auto-nego
27373	EXPANSION_LCWP	0x0002	tg3.h	Got new RX page code word
27374	EXPANSION_ENABLENPAGE	0x0004	tg3.h	This enables npage words
27375	EXPANSION_NPCAPABLE	0x0008	tg3.h	Link partner supports npage
27376	EXPANSION_MFAULTS	0x0010	tg3.h	Multiple faults detected
27377	EXPANSION_RESV	0xffe0	tg3.h	Unused...
27378	NWAYTEST_RESV1	0x00ff	tg3.h	Unused...
27379	NWAYTEST_LOOPBACK	0x0100	tg3.h	Enable loopback for N-way
27380	NWAYTEST_RESV2	0xfe00	tg3.h	Unused...
27381	TG3_64BIT_REG_HIGH	0x00UL	tg3.h
27382	TG3_64BIT_REG_LOW	0x04UL	tg3.h
27383	TG3_BDINFO_HOST_ADDR	0x0UL	tg3.h	64-bit
27384	TG3_BDINFO_MAXLEN_FLAGS	0x8UL	tg3.h	32-bit
27385	BDINFO_FLAGS_USE_EXT_RECV	0x00000001	tg3.h	ext rx_buffer_desc
27386	BDINFO_FLAGS_DISABLED	0x00000002	tg3.h
27387	BDINFO_FLAGS_MAXLEN_MASK	0xffff0000	tg3.h
27388	BDINFO_FLAGS_MAXLEN_SHIFT	16	tg3.h
27389	TG3_BDINFO_NIC_ADDR	0xcUL	tg3.h	32-bit
27390	TG3_BDINFO_SIZE	0x10UL	tg3.h
27391	RX_COPY_THRESHOLD	256	tg3.h
27392	RX_STD_MAX_SIZE	1536	tg3.h
27393	RX_STD_MAX_SIZE_5705	512	tg3.h
27394	RX_JUMBO_MAX_SIZE	0xdeadbeef	tg3.h	XXX
27395	TG3PCI_VENDOR	0x00000000	tg3.h
27396	TG3PCI_VENDOR_BROADCOM	0x14e4	tg3.h
27397	TG3PCI_DEVICE	0x00000002	tg3.h
27398	TG3PCI_DEVICE_TIGON3_1	0x1644	tg3.h	BCM5700
27399	TG3PCI_DEVICE_TIGON3_2	0x1645	tg3.h	BCM5701
27400	TG3PCI_DEVICE_TIGON3_3	0x1646	tg3.h	BCM5702
27401	TG3PCI_DEVICE_TIGON3_4	0x1647	tg3.h	BCM5703
27402	TG3PCI_COMMAND	0x00000004	tg3.h
27403	TG3PCI_STATUS	0x00000006	tg3.h
27404	TG3PCI_CCREVID	0x00000008	tg3.h
27405	TG3PCI_CACHELINESZ	0x0000000c	tg3.h
27406	TG3PCI_LATTIMER	0x0000000d	tg3.h
27407	TG3PCI_HEADERTYPE	0x0000000e	tg3.h
27408	TG3PCI_BIST	0x0000000f	tg3.h
27409	TG3PCI_BASE0_LOW	0x00000010	tg3.h
27410	TG3PCI_BASE0_HIGH	0x00000014	tg3.h
27411	TG3PCI_SUBSYSVENID	0x0000002c	tg3.h
27412	TG3PCI_SUBSYSID	0x0000002e	tg3.h
27413	TG3PCI_ROMADDR	0x00000030	tg3.h
27414	TG3PCI_CAPLIST	0x00000034	tg3.h
27415	TG3PCI_IRQ_LINE	0x0000003c	tg3.h
27416	TG3PCI_IRQ_PIN	0x0000003d	tg3.h
27417	TG3PCI_MIN_GNT	0x0000003e	tg3.h
27418	TG3PCI_MAX_LAT	0x0000003f	tg3.h
27419	TG3PCI_X_CAPS	0x00000040	tg3.h
27420	PCIX_CAPS_RELAXED_ORDERING	0x00020000	tg3.h
27421	PCIX_CAPS_SPLIT_MASK	0x00700000	tg3.h
27422	PCIX_CAPS_SPLIT_SHIFT	20	tg3.h
27423	PCIX_CAPS_BURST_MASK	0x000c0000	tg3.h
27424	PCIX_CAPS_BURST_SHIFT	18	tg3.h
27425	PCIX_CAPS_MAX_BURST_CPIOB	2	tg3.h
27426	TG3PCI_PM_CAP_PTR	0x00000041	tg3.h
27427	TG3PCI_X_COMMAND	0x00000042	tg3.h
27428	TG3PCI_X_STATUS	0x00000044	tg3.h
27429	TG3PCI_PM_CAP_ID	0x00000048	tg3.h
27430	TG3PCI_VPD_CAP_PTR	0x00000049	tg3.h
27431	TG3PCI_PM_CAPS	0x0000004a	tg3.h
27432	TG3PCI_PM_CTRL_STAT	0x0000004c	tg3.h
27433	TG3PCI_BR_SUPP_EXT	0x0000004e	tg3.h
27434	TG3PCI_PM_DATA	0x0000004f	tg3.h
27435	TG3PCI_VPD_CAP_ID	0x00000050	tg3.h
27436	TG3PCI_MSI_CAP_PTR	0x00000051	tg3.h
27437	TG3PCI_VPD_ADDR_FLAG	0x00000052	tg3.h
27438	VPD_ADDR_FLAG_WRITE	0x00008000	tg3.h
27439	TG3PCI_VPD_DATA	0x00000054	tg3.h
27440	TG3PCI_MSI_CAP_ID	0x00000058	tg3.h
27441	TG3PCI_NXT_CAP_PTR	0x00000059	tg3.h
27442	TG3PCI_MSI_CTRL	0x0000005a	tg3.h
27443	TG3PCI_MSI_ADDR_LOW	0x0000005c	tg3.h
27444	TG3PCI_MSI_ADDR_HIGH	0x00000060	tg3.h
27445	TG3PCI_MSI_DATA	0x00000064	tg3.h
27446	TG3PCI_MISC_HOST_CTRL	0x00000068	tg3.h
27447	MISC_HOST_CTRL_CLEAR_INT	0x00000001	tg3.h
27448	MISC_HOST_CTRL_MASK_PCI_INT	0x00000002	tg3.h
27449	MISC_HOST_CTRL_BYTE_SWAP	0x00000004	tg3.h
27450	MISC_HOST_CTRL_WORD_SWAP	0x00000008	tg3.h
27451	MISC_HOST_CTRL_PCISTATE_RW	0x00000010	tg3.h
27452	MISC_HOST_CTRL_CLKREG_RW	0x00000020	tg3.h
27453	MISC_HOST_CTRL_REGWORD_SWAP	0x00000040	tg3.h
27454	MISC_HOST_CTRL_INDIR_ACCESS	0x00000080	tg3.h
27455	MISC_HOST_CTRL_IRQ_MASK_MODE	0x00000100	tg3.h
27456	MISC_HOST_CTRL_TAGGED_STATUS	0x00000200	tg3.h
27457	MISC_HOST_CTRL_CHIPREV	0xffff0000	tg3.h
27458	MISC_HOST_CTRL_CHIPREV_SHIFT	16	tg3.h
27459	CHIPREV_ID_5700_A0	0x7000	tg3.h
27460	CHIPREV_ID_5700_A1	0x7001	tg3.h
27461	CHIPREV_ID_5700_B0	0x7100	tg3.h
27462	CHIPREV_ID_5700_B1	0x7101	tg3.h
27463	CHIPREV_ID_5700_B3	0x7102	tg3.h
27464	CHIPREV_ID_5700_ALTIMA	0x7104	tg3.h
27465	CHIPREV_ID_5700_C0	0x7200	tg3.h
27466	CHIPREV_ID_5701_A0	0x0000	tg3.h
27467	CHIPREV_ID_5701_B0	0x0100	tg3.h
27468	CHIPREV_ID_5701_B2	0x0102	tg3.h
27469	CHIPREV_ID_5701_B5	0x0105	tg3.h
27470	CHIPREV_ID_5703_A0	0x1000	tg3.h
27471	CHIPREV_ID_5703_A1	0x1001	tg3.h
27472	CHIPREV_ID_5703_A2	0x1002	tg3.h
27473	CHIPREV_ID_5703_A3	0x1003	tg3.h
27474	CHIPREV_ID_5704_A0	0x2000	tg3.h
27475	CHIPREV_ID_5704_A1	0x2001	tg3.h
27476	CHIPREV_ID_5704_A2	0x2002	tg3.h
27477	CHIPREV_ID_5705_A0	0x3000	tg3.h
27478	CHIPREV_ID_5705_A1	0x3001	tg3.h
27479	CHIPREV_ID_5705_A2	0x3002	tg3.h
27480	CHIPREV_ID_5705_A3	0x3003	tg3.h
27481	CHIPREV_ID_5721	0x4101	tg3.h
27482	CHIPREV_ID_5750_A0	0x4000	tg3.h
27483	CHIPREV_ID_5750_A1	0x4001	tg3.h
27484	CHIPREV_ID_5750_A3	0x4003	tg3.h
27485	ASIC_REV_5700	0x07	tg3.h
27486	ASIC_REV_5701	0x00	tg3.h
27487	ASIC_REV_5703	0x01	tg3.h
27488	ASIC_REV_5704	0x02	tg3.h
27489	ASIC_REV_5705	0x03	tg3.h
27490	ASIC_REV_5750	0x04	tg3.h
27491	ASIC_REV_5787	0x0b	tg3.h
27492	CHIPREV_5700_AX	0x70	tg3.h
27493	CHIPREV_5700_BX	0x71	tg3.h
27494	CHIPREV_5700_CX	0x72	tg3.h
27495	CHIPREV_5701_AX	0x00	tg3.h
27496	METAL_REV_A0	0x00	tg3.h
27497	METAL_REV_A1	0x01	tg3.h
27498	METAL_REV_B0	0x00	tg3.h
27499	METAL_REV_B1	0x01	tg3.h
27500	METAL_REV_B2	0x02	tg3.h
27501	TG3PCI_DMA_RW_CTRL	0x0000006c	tg3.h
27502	DMA_RWCTRL_MIN_DMA	0x000000ff	tg3.h
27503	DMA_RWCTRL_MIN_DMA_SHIFT	0	tg3.h
27504	DMA_RWCTRL_READ_BNDRY_MASK	0x00000700	tg3.h
27505	DMA_RWCTRL_READ_BNDRY_DISAB	0x00000000	tg3.h
27506	DMA_RWCTRL_READ_BNDRY_16	0x00000100	tg3.h
27507	DMA_RWCTRL_READ_BNDRY_32	0x00000200	tg3.h
27508	DMA_RWCTRL_READ_BNDRY_64	0x00000300	tg3.h
27509	DMA_RWCTRL_READ_BNDRY_128	0x00000400	tg3.h
27510	DMA_RWCTRL_READ_BNDRY_256	0x00000500	tg3.h
27511	DMA_RWCTRL_READ_BNDRY_512	0x00000600	tg3.h
27512	DMA_RWCTRL_READ_BNDRY_1024	0x00000700	tg3.h
27513	DMA_RWCTRL_WRITE_BNDRY_MASK	0x00003800	tg3.h
27514	DMA_RWCTRL_WRITE_BNDRY_DISAB	0x00000000	tg3.h
27515	DMA_RWCTRL_WRITE_BNDRY_16	0x00000800	tg3.h
27516	DMA_RWCTRL_WRITE_BNDRY_32	0x00001000	tg3.h
27517	DMA_RWCTRL_WRITE_BNDRY_64	0x00001800	tg3.h
27518	DMA_RWCTRL_WRITE_BNDRY_128	0x00002000	tg3.h
27519	DMA_RWCTRL_WRITE_BNDRY_256	0x00002800	tg3.h
27520	DMA_RWCTRL_WRITE_BNDRY_512	0x00003000	tg3.h
27521	DMA_RWCTRL_WRITE_BNDRY_1024	0x00003800	tg3.h
27522	DMA_RWCTRL_ONE_DMA	0x00004000	tg3.h
27523	DMA_RWCTRL_READ_WATER	0x00070000	tg3.h
27524	DMA_RWCTRL_READ_WATER_SHIFT	16	tg3.h
27525	DMA_RWCTRL_WRITE_WATER	0x00380000	tg3.h
27526	DMA_RWCTRL_WRITE_WATER_SHIFT	19	tg3.h
27527	DMA_RWCTRL_USE_MEM_READ_MULT	0x00400000	tg3.h
27528	DMA_RWCTRL_ASSERT_ALL_BE	0x00800000	tg3.h
27529	DMA_RWCTRL_PCI_READ_CMD	0x0f000000	tg3.h
27530	DMA_RWCTRL_PCI_READ_CMD_SHIFT	24	tg3.h
27531	DMA_RWCTRL_PCI_WRITE_CMD	0xf0000000	tg3.h
27532	DMA_RWCTRL_PCI_WRITE_CMD_SHIFT	28	tg3.h
27533	TG3PCI_PCISTATE	0x00000070	tg3.h
27534	PCISTATE_FORCE_RESET	0x00000001	tg3.h
27535	PCISTATE_INT_NOT_ACTIVE	0x00000002	tg3.h
27536	PCISTATE_CONV_PCI_MODE	0x00000004	tg3.h
27537	PCISTATE_BUS_SPEED_HIGH	0x00000008	tg3.h
27538	PCISTATE_BUS_32BIT	0x00000010	tg3.h
27539	PCISTATE_ROM_ENABLE	0x00000020	tg3.h
27540	PCISTATE_ROM_RETRY_ENABLE	0x00000040	tg3.h
27541	PCISTATE_FLAT_VIEW	0x00000100	tg3.h
27542	PCISTATE_RETRY_SAME_DMA	0x00002000	tg3.h
27543	TG3PCI_CLOCK_CTRL	0x00000074	tg3.h
27544	CLOCK_CTRL_CORECLK_DISABLE	0x00000200	tg3.h
27545	CLOCK_CTRL_RXCLK_DISABLE	0x00000400	tg3.h
27546	CLOCK_CTRL_TXCLK_DISABLE	0x00000800	tg3.h
27547	CLOCK_CTRL_ALTCLK	0x00001000	tg3.h
27548	CLOCK_CTRL_PWRDOWN_PLL133	0x00008000	tg3.h
27549	CLOCK_CTRL_44MHZ_CORE	0x00040000	tg3.h
27550	CLOCK_CTRL_625_CORE	0x00100000	tg3.h
27551	CLOCK_CTRL_FORCE_CLKRUN	0x00200000	tg3.h
27552	CLOCK_CTRL_CLKRUN_OENABLE	0x00400000	tg3.h
27553	CLOCK_CTRL_DELAY_PCI_GRANT	0x80000000	tg3.h
27554	TG3PCI_REG_BASE_ADDR	0x00000078	tg3.h
27555	TG3PCI_MEM_WIN_BASE_ADDR	0x0000007c	tg3.h
27556	TG3PCI_REG_DATA	0x00000080	tg3.h
27557	TG3PCI_MEM_WIN_DATA	0x00000084	tg3.h
27558	TG3PCI_MODE_CTRL	0x00000088	tg3.h
27559	TG3PCI_MISC_CFG	0x0000008c	tg3.h
27560	TG3PCI_MISC_LOCAL_CTRL	0x00000090	tg3.h
27561	TG3PCI_STD_RING_PROD_IDX	0x00000098	tg3.h	64-bit
27562	TG3PCI_RCV_RET_RING_CON_IDX	0x000000a0	tg3.h	64-bit
27563	TG3PCI_SND_PROD_IDX	0x000000a8	tg3.h	64-bit
27564	MAILBOX_INTERRUPT_0	0x00000200	tg3.h	64-bit
27565	MAILBOX_INTERRUPT_1	0x00000208	tg3.h	64-bit
27566	MAILBOX_INTERRUPT_2	0x00000210	tg3.h	64-bit
27567	MAILBOX_INTERRUPT_3	0x00000218	tg3.h	64-bit
27568	MAILBOX_GENERAL_0	0x00000220	tg3.h	64-bit
27569	MAILBOX_GENERAL_1	0x00000228	tg3.h	64-bit
27570	MAILBOX_GENERAL_2	0x00000230	tg3.h	64-bit
27571	MAILBOX_GENERAL_3	0x00000238	tg3.h	64-bit
27572	MAILBOX_GENERAL_4	0x00000240	tg3.h	64-bit
27573	MAILBOX_GENERAL_5	0x00000248	tg3.h	64-bit
27574	MAILBOX_GENERAL_6	0x00000250	tg3.h	64-bit
27575	MAILBOX_GENERAL_7	0x00000258	tg3.h	64-bit
27576	MAILBOX_RELOAD_STAT	0x00000260	tg3.h	64-bit
27577	MAILBOX_RCV_STD_PROD_IDX	0x00000268	tg3.h	64-bit
27578	MAILBOX_RCV_JUMBO_PROD_IDX	0x00000270	tg3.h	64-bit
27579	MAILBOX_RCV_MINI_PROD_IDX	0x00000278	tg3.h	64-bit
27580	MAILBOX_RCVRET_CON_IDX_0	0x00000280	tg3.h	64-bit
27581	MAILBOX_RCVRET_CON_IDX_1	0x00000288	tg3.h	64-bit
27582	MAILBOX_RCVRET_CON_IDX_2	0x00000290	tg3.h	64-bit
27583	MAILBOX_RCVRET_CON_IDX_3	0x00000298	tg3.h	64-bit
27584	MAILBOX_RCVRET_CON_IDX_4	0x000002a0	tg3.h	64-bit
27585	MAILBOX_RCVRET_CON_IDX_5	0x000002a8	tg3.h	64-bit
27586	MAILBOX_RCVRET_CON_IDX_6	0x000002b0	tg3.h	64-bit
27587	MAILBOX_RCVRET_CON_IDX_7	0x000002b8	tg3.h	64-bit
27588	MAILBOX_RCVRET_CON_IDX_8	0x000002c0	tg3.h	64-bit
27589	MAILBOX_RCVRET_CON_IDX_9	0x000002c8	tg3.h	64-bit
27590	MAILBOX_RCVRET_CON_IDX_10	0x000002d0	tg3.h	64-bit
27591	MAILBOX_RCVRET_CON_IDX_11	0x000002d8	tg3.h	64-bit
27592	MAILBOX_RCVRET_CON_IDX_12	0x000002e0	tg3.h	64-bit
27593	MAILBOX_RCVRET_CON_IDX_13	0x000002e8	tg3.h	64-bit
27594	MAILBOX_RCVRET_CON_IDX_14	0x000002f0	tg3.h	64-bit
27595	MAILBOX_RCVRET_CON_IDX_15	0x000002f8	tg3.h	64-bit
27596	MAILBOX_SNDHOST_PROD_IDX_0	0x00000300	tg3.h	64-bit
27597	MAILBOX_SNDHOST_PROD_IDX_1	0x00000308	tg3.h	64-bit
27598	MAILBOX_SNDHOST_PROD_IDX_2	0x00000310	tg3.h	64-bit
27599	MAILBOX_SNDHOST_PROD_IDX_3	0x00000318	tg3.h	64-bit
27600	MAILBOX_SNDHOST_PROD_IDX_4	0x00000320	tg3.h	64-bit
27601	MAILBOX_SNDHOST_PROD_IDX_5	0x00000328	tg3.h	64-bit
27602	MAILBOX_SNDHOST_PROD_IDX_6	0x00000330	tg3.h	64-bit
27603	MAILBOX_SNDHOST_PROD_IDX_7	0x00000338	tg3.h	64-bit
27604	MAILBOX_SNDHOST_PROD_IDX_8	0x00000340	tg3.h	64-bit
27605	MAILBOX_SNDHOST_PROD_IDX_9	0x00000348	tg3.h	64-bit
27606	MAILBOX_SNDHOST_PROD_IDX_10	0x00000350	tg3.h	64-bit
27607	MAILBOX_SNDHOST_PROD_IDX_11	0x00000358	tg3.h	64-bit
27608	MAILBOX_SNDHOST_PROD_IDX_12	0x00000360	tg3.h	64-bit
27609	MAILBOX_SNDHOST_PROD_IDX_13	0x00000368	tg3.h	64-bit
27610	MAILBOX_SNDHOST_PROD_IDX_14	0x00000370	tg3.h	64-bit
27611	MAILBOX_SNDHOST_PROD_IDX_15	0x00000378	tg3.h	64-bit
27612	MAILBOX_SNDNIC_PROD_IDX_0	0x00000380	tg3.h	64-bit
27613	MAILBOX_SNDNIC_PROD_IDX_1	0x00000388	tg3.h	64-bit
27614	MAILBOX_SNDNIC_PROD_IDX_2	0x00000390	tg3.h	64-bit
27615	MAILBOX_SNDNIC_PROD_IDX_3	0x00000398	tg3.h	64-bit
27616	MAILBOX_SNDNIC_PROD_IDX_4	0x000003a0	tg3.h	64-bit
27617	MAILBOX_SNDNIC_PROD_IDX_5	0x000003a8	tg3.h	64-bit
27618	MAILBOX_SNDNIC_PROD_IDX_6	0x000003b0	tg3.h	64-bit
27619	MAILBOX_SNDNIC_PROD_IDX_7	0x000003b8	tg3.h	64-bit
27620	MAILBOX_SNDNIC_PROD_IDX_8	0x000003c0	tg3.h	64-bit
27621	MAILBOX_SNDNIC_PROD_IDX_9	0x000003c8	tg3.h	64-bit
27622	MAILBOX_SNDNIC_PROD_IDX_10	0x000003d0	tg3.h	64-bit
27623	MAILBOX_SNDNIC_PROD_IDX_11	0x000003d8	tg3.h	64-bit
27624	MAILBOX_SNDNIC_PROD_IDX_12	0x000003e0	tg3.h	64-bit
27625	MAILBOX_SNDNIC_PROD_IDX_13	0x000003e8	tg3.h	64-bit
27626	MAILBOX_SNDNIC_PROD_IDX_14	0x000003f0	tg3.h	64-bit
27627	MAILBOX_SNDNIC_PROD_IDX_15	0x000003f8	tg3.h	64-bit
27628	MAC_MODE	0x00000400	tg3.h
27629	MAC_MODE_RESET	0x00000001	tg3.h
27630	MAC_MODE_HALF_DUPLEX	0x00000002	tg3.h
27631	MAC_MODE_PORT_MODE_MASK	0x0000000c	tg3.h
27632	MAC_MODE_PORT_MODE_TBI	0x0000000c	tg3.h
27633	MAC_MODE_PORT_MODE_GMII	0x00000008	tg3.h
27634	MAC_MODE_PORT_MODE_MII	0x00000004	tg3.h
27635	MAC_MODE_PORT_MODE_NONE	0x00000000	tg3.h
27636	MAC_MODE_PORT_INT_LPBACK	0x00000010	tg3.h
27637	MAC_MODE_TAGGED_MAC_CTRL	0x00000080	tg3.h
27638	MAC_MODE_TX_BURSTING	0x00000100	tg3.h
27639	MAC_MODE_MAX_DEFER	0x00000200	tg3.h
27640	MAC_MODE_LINK_POLARITY	0x00000400	tg3.h
27641	MAC_MODE_RXSTAT_ENABLE	0x00000800	tg3.h
27642	MAC_MODE_RXSTAT_CLEAR	0x00001000	tg3.h
27643	MAC_MODE_RXSTAT_FLUSH	0x00002000	tg3.h
27644	MAC_MODE_TXSTAT_ENABLE	0x00004000	tg3.h
27645	MAC_MODE_TXSTAT_CLEAR	0x00008000	tg3.h
27646	MAC_MODE_TXSTAT_FLUSH	0x00010000	tg3.h
27647	MAC_MODE_SEND_CONFIGS	0x00020000	tg3.h
27648	MAC_MODE_MAGIC_PKT_ENABLE	0x00040000	tg3.h
27649	MAC_MODE_ACPI_ENABLE	0x00080000	tg3.h
27650	MAC_MODE_MIP_ENABLE	0x00100000	tg3.h
27651	MAC_MODE_TDE_ENABLE	0x00200000	tg3.h
27652	MAC_MODE_RDE_ENABLE	0x00400000	tg3.h
27653	MAC_MODE_FHDE_ENABLE	0x00800000	tg3.h
27654	MAC_STATUS	0x00000404	tg3.h
27655	MAC_STATUS_PCS_SYNCED	0x00000001	tg3.h
27656	MAC_STATUS_SIGNAL_DET	0x00000002	tg3.h
27657	MAC_STATUS_RCVD_CFG	0x00000004	tg3.h
27658	MAC_STATUS_CFG_CHANGED	0x00000008	tg3.h
27659	MAC_STATUS_SYNC_CHANGED	0x00000010	tg3.h
27660	MAC_STATUS_PORT_DEC_ERR	0x00000400	tg3.h
27661	MAC_STATUS_LNKSTATE_CHANGED	0x00001000	tg3.h
27662	MAC_STATUS_MI_COMPLETION	0x00400000	tg3.h
27663	MAC_STATUS_MI_INTERRUPT	0x00800000	tg3.h
27664	MAC_STATUS_AP_ERROR	0x01000000	tg3.h
27665	MAC_STATUS_ODI_ERROR	0x02000000	tg3.h
27666	MAC_STATUS_RXSTAT_OVERRUN	0x04000000	tg3.h
27667	MAC_STATUS_TXSTAT_OVERRUN	0x08000000	tg3.h
27668	MAC_EVENT	0x00000408	tg3.h
27669	MAC_EVENT_PORT_DECODE_ERR	0x00000400	tg3.h
27670	MAC_EVENT_LNKSTATE_CHANGED	0x00001000	tg3.h
27671	MAC_EVENT_MI_COMPLETION	0x00400000	tg3.h
27672	MAC_EVENT_MI_INTERRUPT	0x00800000	tg3.h
27673	MAC_EVENT_AP_ERROR	0x01000000	tg3.h
27674	MAC_EVENT_ODI_ERROR	0x02000000	tg3.h
27675	MAC_EVENT_RXSTAT_OVERRUN	0x04000000	tg3.h
27676	MAC_EVENT_TXSTAT_OVERRUN	0x08000000	tg3.h
27677	MAC_LED_CTRL	0x0000040c	tg3.h
27678	LED_CTRL_LNKLED_OVERRIDE	0x00000001	tg3.h
27679	LED_CTRL_1000MBPS_ON	0x00000002	tg3.h
27680	LED_CTRL_100MBPS_ON	0x00000004	tg3.h
27681	LED_CTRL_10MBPS_ON	0x00000008	tg3.h
27682	LED_CTRL_TRAFFIC_OVERRIDE	0x00000010	tg3.h
27683	LED_CTRL_TRAFFIC_BLINK	0x00000020	tg3.h
27684	LED_CTRL_TRAFFIC_LED	0x00000040	tg3.h
27685	LED_CTRL_1000MBPS_STATUS	0x00000080	tg3.h
27686	LED_CTRL_100MBPS_STATUS	0x00000100	tg3.h
27687	LED_CTRL_10MBPS_STATUS	0x00000200	tg3.h
27688	LED_CTRL_TRAFFIC_STATUS	0x00000400	tg3.h
27689	LED_CTRL_MAC_MODE	0x00000000	tg3.h
27690	LED_CTRL_PHY_MODE_1	0x00000800	tg3.h
27691	LED_CTRL_PHY_MODE_2	0x00001000	tg3.h
27692	LED_CTRL_BLINK_RATE_MASK	0x7ff80000	tg3.h
27693	LED_CTRL_BLINK_RATE_SHIFT	19	tg3.h
27694	LED_CTRL_BLINK_PER_OVERRIDE	0x00080000	tg3.h
27695	LED_CTRL_BLINK_RATE_OVERRIDE	0x80000000	tg3.h
27696	MAC_ADDR_0_HIGH	0x00000410	tg3.h	upper 2 bytes
27697	MAC_ADDR_0_LOW	0x00000414	tg3.h	lower 4 bytes
27698	MAC_ADDR_1_HIGH	0x00000418	tg3.h	upper 2 bytes
27699	MAC_ADDR_1_LOW	0x0000041c	tg3.h	lower 4 bytes
27700	MAC_ADDR_2_HIGH	0x00000420	tg3.h	upper 2 bytes
27701	MAC_ADDR_2_LOW	0x00000424	tg3.h	lower 4 bytes
27702	MAC_ADDR_3_HIGH	0x00000428	tg3.h	upper 2 bytes
27703	MAC_ADDR_3_LOW	0x0000042c	tg3.h	lower 4 bytes
27704	MAC_ACPI_MBUF_PTR	0x00000430	tg3.h
27705	MAC_ACPI_LEN_OFFSET	0x00000434	tg3.h
27706	ACPI_LENOFF_LEN_MASK	0x0000ffff	tg3.h
27707	ACPI_LENOFF_LEN_SHIFT	0	tg3.h
27708	ACPI_LENOFF_OFF_MASK	0x0fff0000	tg3.h
27709	ACPI_LENOFF_OFF_SHIFT	16	tg3.h
27710	MAC_TX_BACKOFF_SEED	0x00000438	tg3.h
27711	TX_BACKOFF_SEED_MASK	0x000003ff	tg3.h
27712	MAC_RX_MTU_SIZE	0x0000043c	tg3.h
27713	RX_MTU_SIZE_MASK	0x0000ffff	tg3.h
27714	MAC_PCS_TEST	0x00000440	tg3.h
27715	PCS_TEST_PATTERN_MASK	0x000fffff	tg3.h
27716	PCS_TEST_PATTERN_SHIFT	0	tg3.h
27717	PCS_TEST_ENABLE	0x00100000	tg3.h
27718	MAC_TX_AUTO_NEG	0x00000444	tg3.h
27719	TX_AUTO_NEG_MASK	0x0000ffff	tg3.h
27720	TX_AUTO_NEG_SHIFT	0	tg3.h
27721	MAC_RX_AUTO_NEG	0x00000448	tg3.h
27722	RX_AUTO_NEG_MASK	0x0000ffff	tg3.h
27723	RX_AUTO_NEG_SHIFT	0	tg3.h
27724	MAC_MI_COM	0x0000044c	tg3.h
27725	MI_COM_CMD_MASK	0x0c000000	tg3.h
27726	MI_COM_CMD_WRITE	0x04000000	tg3.h
27727	MI_COM_CMD_READ	0x08000000	tg3.h
27728	MI_COM_READ_FAILED	0x10000000	tg3.h
27729	MI_COM_START	0x20000000	tg3.h
27730	MI_COM_BUSY	0x20000000	tg3.h
27731	MI_COM_PHY_ADDR_MASK	0x03e00000	tg3.h
27732	MI_COM_PHY_ADDR_SHIFT	21	tg3.h
27733	MI_COM_REG_ADDR_MASK	0x001f0000	tg3.h
27734	MI_COM_REG_ADDR_SHIFT	16	tg3.h
27735	MI_COM_DATA_MASK	0x0000ffff	tg3.h
27736	MAC_MI_STAT	0x00000450	tg3.h
27737	MAC_MI_STAT_LNKSTAT_ATTN_ENAB	0x00000001	tg3.h
27738	MAC_MI_MODE	0x00000454	tg3.h
27739	MAC_MI_MODE_CLK_10MHZ	0x00000001	tg3.h
27740	MAC_MI_MODE_SHORT_PREAMBLE	0x00000002	tg3.h
27741	MAC_MI_MODE_AUTO_POLL	0x00000010	tg3.h
27742	MAC_MI_MODE_CORE_CLK_62MHZ	0x00008000	tg3.h
27743	MAC_MI_MODE_BASE	0x000c0000	tg3.h	XXX magic values XXX
27744	MAC_AUTO_POLL_STATUS	0x00000458	tg3.h
27745	MAC_AUTO_POLL_ERROR	0x00000001	tg3.h
27746	MAC_TX_MODE	0x0000045c	tg3.h
27747	TX_MODE_RESET	0x00000001	tg3.h
27748	TX_MODE_ENABLE	0x00000002	tg3.h
27749	TX_MODE_FLOW_CTRL_ENABLE	0x00000010	tg3.h
27750	TX_MODE_BIG_BCKOFF_ENABLE	0x00000020	tg3.h
27751	TX_MODE_LONG_PAUSE_ENABLE	0x00000040	tg3.h
27752	MAC_TX_STATUS	0x00000460	tg3.h
27753	TX_STATUS_XOFFED	0x00000001	tg3.h
27754	TX_STATUS_SENT_XOFF	0x00000002	tg3.h
27755	TX_STATUS_SENT_XON	0x00000004	tg3.h
27756	TX_STATUS_LINK_UP	0x00000008	tg3.h
27757	TX_STATUS_ODI_UNDERRUN	0x00000010	tg3.h
27758	TX_STATUS_ODI_OVERRUN	0x00000020	tg3.h
27759	MAC_TX_LENGTHS	0x00000464	tg3.h
27760	TX_LENGTHS_SLOT_TIME_MASK	0x000000ff	tg3.h
27761	TX_LENGTHS_SLOT_TIME_SHIFT	0	tg3.h
27762	TX_LENGTHS_IPG_MASK	0x00000f00	tg3.h
27763	TX_LENGTHS_IPG_SHIFT	8	tg3.h
27764	TX_LENGTHS_IPG_CRS_MASK	0x00003000	tg3.h
27765	TX_LENGTHS_IPG_CRS_SHIFT	12	tg3.h
27766	MAC_RX_MODE	0x00000468	tg3.h
27767	RX_MODE_RESET	0x00000001	tg3.h
27768	RX_MODE_ENABLE	0x00000002	tg3.h
27769	RX_MODE_FLOW_CTRL_ENABLE	0x00000004	tg3.h
27770	RX_MODE_KEEP_MAC_CTRL	0x00000008	tg3.h
27771	RX_MODE_KEEP_PAUSE	0x00000010	tg3.h
27772	RX_MODE_ACCEPT_OVERSIZED	0x00000020	tg3.h
27773	RX_MODE_ACCEPT_RUNTS	0x00000040	tg3.h
27774	RX_MODE_LEN_CHECK	0x00000080	tg3.h
27775	RX_MODE_PROMISC	0x00000100	tg3.h
27776	RX_MODE_NO_CRC_CHECK	0x00000200	tg3.h
27777	RX_MODE_KEEP_VLAN_TAG	0x00000400	tg3.h
27778	MAC_RX_STATUS	0x0000046c	tg3.h
27779	RX_STATUS_REMOTE_TX_XOFFED	0x00000001	tg3.h
27780	RX_STATUS_XOFF_RCVD	0x00000002	tg3.h
27781	RX_STATUS_XON_RCVD	0x00000004	tg3.h
27782	MAC_HASH_REG_0	0x00000470	tg3.h
27783	MAC_HASH_REG_1	0x00000474	tg3.h
27784	MAC_HASH_REG_2	0x00000478	tg3.h
27785	MAC_HASH_REG_3	0x0000047c	tg3.h
27786	MAC_RCV_RULE_0	0x00000480	tg3.h
27787	MAC_RCV_VALUE_0	0x00000484	tg3.h
27788	MAC_RCV_RULE_1	0x00000488	tg3.h
27789	MAC_RCV_VALUE_1	0x0000048c	tg3.h
27790	MAC_RCV_RULE_2	0x00000490	tg3.h
27791	MAC_RCV_VALUE_2	0x00000494	tg3.h
27792	MAC_RCV_RULE_3	0x00000498	tg3.h
27793	MAC_RCV_VALUE_3	0x0000049c	tg3.h
27794	MAC_RCV_RULE_4	0x000004a0	tg3.h
27795	MAC_RCV_VALUE_4	0x000004a4	tg3.h
27796	MAC_RCV_RULE_5	0x000004a8	tg3.h
27797	MAC_RCV_VALUE_5	0x000004ac	tg3.h
27798	MAC_RCV_RULE_6	0x000004b0	tg3.h
27799	MAC_RCV_VALUE_6	0x000004b4	tg3.h
27800	MAC_RCV_RULE_7	0x000004b8	tg3.h
27801	MAC_RCV_VALUE_7	0x000004bc	tg3.h
27802	MAC_RCV_RULE_8	0x000004c0	tg3.h
27803	MAC_RCV_VALUE_8	0x000004c4	tg3.h
27804	MAC_RCV_RULE_9	0x000004c8	tg3.h
27805	MAC_RCV_VALUE_9	0x000004cc	tg3.h
27806	MAC_RCV_RULE_10	0x000004d0	tg3.h
27807	MAC_RCV_VALUE_10	0x000004d4	tg3.h
27808	MAC_RCV_RULE_11	0x000004d8	tg3.h
27809	MAC_RCV_VALUE_11	0x000004dc	tg3.h
27810	MAC_RCV_RULE_12	0x000004e0	tg3.h
27811	MAC_RCV_VALUE_12	0x000004e4	tg3.h
27812	MAC_RCV_RULE_13	0x000004e8	tg3.h
27813	MAC_RCV_VALUE_13	0x000004ec	tg3.h
27814	MAC_RCV_RULE_14	0x000004f0	tg3.h
27815	MAC_RCV_VALUE_14	0x000004f4	tg3.h
27816	MAC_RCV_RULE_15	0x000004f8	tg3.h
27817	MAC_RCV_VALUE_15	0x000004fc	tg3.h
27818	RCV_RULE_DISABLE_MASK	0x7fffffff	tg3.h
27819	MAC_RCV_RULE_CFG	0x00000500	tg3.h
27820	RCV_RULE_CFG_DEFAULT_CLASS	0x00000008	tg3.h
27821	MAC_LOW_WMARK_MAX_RX_FRAME	0x00000504	tg3.h
27822	MAC_HASHREGU_0	0x00000520	tg3.h
27823	MAC_HASHREGU_1	0x00000524	tg3.h
27824	MAC_HASHREGU_2	0x00000528	tg3.h
27825	MAC_HASHREGU_3	0x0000052c	tg3.h
27826	MAC_EXTADDR_0_HIGH	0x00000530	tg3.h
27827	MAC_EXTADDR_0_LOW	0x00000534	tg3.h
27828	MAC_EXTADDR_1_HIGH	0x00000538	tg3.h
27829	MAC_EXTADDR_1_LOW	0x0000053c	tg3.h
27830	MAC_EXTADDR_2_HIGH	0x00000540	tg3.h
27831	MAC_EXTADDR_2_LOW	0x00000544	tg3.h
27832	MAC_EXTADDR_3_HIGH	0x00000548	tg3.h
27833	MAC_EXTADDR_3_LOW	0x0000054c	tg3.h
27834	MAC_EXTADDR_4_HIGH	0x00000550	tg3.h
27835	MAC_EXTADDR_4_LOW	0x00000554	tg3.h
27836	MAC_EXTADDR_5_HIGH	0x00000558	tg3.h
27837	MAC_EXTADDR_5_LOW	0x0000055c	tg3.h
27838	MAC_EXTADDR_6_HIGH	0x00000560	tg3.h
27839	MAC_EXTADDR_6_LOW	0x00000564	tg3.h
27840	MAC_EXTADDR_7_HIGH	0x00000568	tg3.h
27841	MAC_EXTADDR_7_LOW	0x0000056c	tg3.h
27842	MAC_EXTADDR_8_HIGH	0x00000570	tg3.h
27843	MAC_EXTADDR_8_LOW	0x00000574	tg3.h
27844	MAC_EXTADDR_9_HIGH	0x00000578	tg3.h
27845	MAC_EXTADDR_9_LOW	0x0000057c	tg3.h
27846	MAC_EXTADDR_10_HIGH	0x00000580	tg3.h
27847	MAC_EXTADDR_10_LOW	0x00000584	tg3.h
27848	MAC_EXTADDR_11_HIGH	0x00000588	tg3.h
27849	MAC_EXTADDR_11_LOW	0x0000058c	tg3.h
27850	MAC_SERDES_CFG	0x00000590	tg3.h
27851	MAC_SERDES_STAT	0x00000594	tg3.h
27852	MAC_TX_MAC_STATE_BASE	0x00000600	tg3.h	16 bytes
27853	MAC_RX_MAC_STATE_BASE	0x00000610	tg3.h	20 bytes
27854	MAC_TX_STATS_OCTETS	0x00000800	tg3.h
27855	MAC_TX_STATS_RESV1	0x00000804	tg3.h
27856	MAC_TX_STATS_COLLISIONS	0x00000808	tg3.h
27857	MAC_TX_STATS_XON_SENT	0x0000080c	tg3.h
27858	MAC_TX_STATS_XOFF_SENT	0x00000810	tg3.h
27859	MAC_TX_STATS_RESV2	0x00000814	tg3.h
27860	MAC_TX_STATS_MAC_ERRORS	0x00000818	tg3.h
27861	MAC_TX_STATS_SINGLE_COLLISIONS	0x0000081c	tg3.h
27862	MAC_TX_STATS_MULT_COLLISIONS	0x00000820	tg3.h
27863	MAC_TX_STATS_DEFERRED	0x00000824	tg3.h
27864	MAC_TX_STATS_RESV3	0x00000828	tg3.h
27865	MAC_TX_STATS_EXCESSIVE_COL	0x0000082c	tg3.h
27866	MAC_TX_STATS_LATE_COL	0x00000830	tg3.h
27867	MAC_TX_STATS_RESV4_1	0x00000834	tg3.h
27868	MAC_TX_STATS_RESV4_2	0x00000838	tg3.h
27869	MAC_TX_STATS_RESV4_3	0x0000083c	tg3.h
27870	MAC_TX_STATS_RESV4_4	0x00000840	tg3.h
27871	MAC_TX_STATS_RESV4_5	0x00000844	tg3.h
27872	MAC_TX_STATS_RESV4_6	0x00000848	tg3.h
27873	MAC_TX_STATS_RESV4_7	0x0000084c	tg3.h
27874	MAC_TX_STATS_RESV4_8	0x00000850	tg3.h
27875	MAC_TX_STATS_RESV4_9	0x00000854	tg3.h
27876	MAC_TX_STATS_RESV4_10	0x00000858	tg3.h
27877	MAC_TX_STATS_RESV4_11	0x0000085c	tg3.h
27878	MAC_TX_STATS_RESV4_12	0x00000860	tg3.h
27879	MAC_TX_STATS_RESV4_13	0x00000864	tg3.h
27880	MAC_TX_STATS_RESV4_14	0x00000868	tg3.h
27881	MAC_TX_STATS_UCAST	0x0000086c	tg3.h
27882	MAC_TX_STATS_MCAST	0x00000870	tg3.h
27883	MAC_TX_STATS_BCAST	0x00000874	tg3.h
27884	MAC_TX_STATS_RESV5_1	0x00000878	tg3.h
27885	MAC_TX_STATS_RESV5_2	0x0000087c	tg3.h
27886	MAC_RX_STATS_OCTETS	0x00000880	tg3.h
27887	MAC_RX_STATS_RESV1	0x00000884	tg3.h
27888	MAC_RX_STATS_FRAGMENTS	0x00000888	tg3.h
27889	MAC_RX_STATS_UCAST	0x0000088c	tg3.h
27890	MAC_RX_STATS_MCAST	0x00000890	tg3.h
27891	MAC_RX_STATS_BCAST	0x00000894	tg3.h
27892	MAC_RX_STATS_FCS_ERRORS	0x00000898	tg3.h
27893	MAC_RX_STATS_ALIGN_ERRORS	0x0000089c	tg3.h
27894	MAC_RX_STATS_XON_PAUSE_RECVD	0x000008a0	tg3.h
27895	MAC_RX_STATS_XOFF_PAUSE_RECVD	0x000008a4	tg3.h
27896	MAC_RX_STATS_MAC_CTRL_RECVD	0x000008a8	tg3.h
27897	MAC_RX_STATS_XOFF_ENTERED	0x000008ac	tg3.h
27898	MAC_RX_STATS_FRAME_TOO_LONG	0x000008b0	tg3.h
27899	MAC_RX_STATS_JABBERS	0x000008b4	tg3.h
27900	MAC_RX_STATS_UNDERSIZE	0x000008b8	tg3.h
27901	SNDDATAI_MODE	0x00000c00	tg3.h
27902	SNDDATAI_MODE_RESET	0x00000001	tg3.h
27903	SNDDATAI_MODE_ENABLE	0x00000002	tg3.h
27904	SNDDATAI_MODE_STAT_OFLOW_ENAB	0x00000004	tg3.h
27905	SNDDATAI_STATUS	0x00000c04	tg3.h
27906	SNDDATAI_STATUS_STAT_OFLOW	0x00000004	tg3.h
27907	SNDDATAI_STATSCTRL	0x00000c08	tg3.h
27908	SNDDATAI_SCTRL_ENABLE	0x00000001	tg3.h
27909	SNDDATAI_SCTRL_FASTUPD	0x00000002	tg3.h
27910	SNDDATAI_SCTRL_CLEAR	0x00000004	tg3.h
27911	SNDDATAI_SCTRL_FLUSH	0x00000008	tg3.h
27912	SNDDATAI_SCTRL_FORCE_ZERO	0x00000010	tg3.h
27913	SNDDATAI_STATSENAB	0x00000c0c	tg3.h
27914	SNDDATAI_STATSINCMASK	0x00000c10	tg3.h
27915	SNDDATAI_COS_CNT_0	0x00000c80	tg3.h
27916	SNDDATAI_COS_CNT_1	0x00000c84	tg3.h
27917	SNDDATAI_COS_CNT_2	0x00000c88	tg3.h
27918	SNDDATAI_COS_CNT_3	0x00000c8c	tg3.h
27919	SNDDATAI_COS_CNT_4	0x00000c90	tg3.h
27920	SNDDATAI_COS_CNT_5	0x00000c94	tg3.h
27921	SNDDATAI_COS_CNT_6	0x00000c98	tg3.h
27922	SNDDATAI_COS_CNT_7	0x00000c9c	tg3.h
27923	SNDDATAI_COS_CNT_8	0x00000ca0	tg3.h
27924	SNDDATAI_COS_CNT_9	0x00000ca4	tg3.h
27925	SNDDATAI_COS_CNT_10	0x00000ca8	tg3.h
27926	SNDDATAI_COS_CNT_11	0x00000cac	tg3.h
27927	SNDDATAI_COS_CNT_12	0x00000cb0	tg3.h
27928	SNDDATAI_COS_CNT_13	0x00000cb4	tg3.h
27929	SNDDATAI_COS_CNT_14	0x00000cb8	tg3.h
27930	SNDDATAI_COS_CNT_15	0x00000cbc	tg3.h
27931	SNDDATAI_DMA_RDQ_FULL_CNT	0x00000cc0	tg3.h
27932	SNDDATAI_DMA_PRIO_RDQ_FULL_CNT	0x00000cc4	tg3.h
27933	SNDDATAI_SDCQ_FULL_CNT	0x00000cc8	tg3.h
27934	SNDDATAI_NICRNG_SSND_PIDX_CNT	0x00000ccc	tg3.h
27935	SNDDATAI_STATS_UPDATED_CNT	0x00000cd0	tg3.h
27936	SNDDATAI_INTERRUPTS_CNT	0x00000cd4	tg3.h
27937	SNDDATAI_AVOID_INTERRUPTS_CNT	0x00000cd8	tg3.h
27938	SNDDATAI_SND_THRESH_HIT_CNT	0x00000cdc	tg3.h
27939	SNDDATAC_MODE	0x00001000	tg3.h
27940	SNDDATAC_MODE_RESET	0x00000001	tg3.h
27941	SNDDATAC_MODE_ENABLE	0x00000002	tg3.h
27942	SNDBDS_MODE	0x00001400	tg3.h
27943	SNDBDS_MODE_RESET	0x00000001	tg3.h
27944	SNDBDS_MODE_ENABLE	0x00000002	tg3.h
27945	SNDBDS_MODE_ATTN_ENABLE	0x00000004	tg3.h
27946	SNDBDS_STATUS	0x00001404	tg3.h
27947	SNDBDS_STATUS_ERROR_ATTN	0x00000004	tg3.h
27948	SNDBDS_HWDIAG	0x00001408	tg3.h
27949	SNDBDS_SEL_CON_IDX_0	0x00001440	tg3.h
27950	SNDBDS_SEL_CON_IDX_1	0x00001444	tg3.h
27951	SNDBDS_SEL_CON_IDX_2	0x00001448	tg3.h
27952	SNDBDS_SEL_CON_IDX_3	0x0000144c	tg3.h
27953	SNDBDS_SEL_CON_IDX_4	0x00001450	tg3.h
27954	SNDBDS_SEL_CON_IDX_5	0x00001454	tg3.h
27955	SNDBDS_SEL_CON_IDX_6	0x00001458	tg3.h
27956	SNDBDS_SEL_CON_IDX_7	0x0000145c	tg3.h
27957	SNDBDS_SEL_CON_IDX_8	0x00001460	tg3.h
27958	SNDBDS_SEL_CON_IDX_9	0x00001464	tg3.h
27959	SNDBDS_SEL_CON_IDX_10	0x00001468	tg3.h
27960	SNDBDS_SEL_CON_IDX_11	0x0000146c	tg3.h
27961	SNDBDS_SEL_CON_IDX_12	0x00001470	tg3.h
27962	SNDBDS_SEL_CON_IDX_13	0x00001474	tg3.h
27963	SNDBDS_SEL_CON_IDX_14	0x00001478	tg3.h
27964	SNDBDS_SEL_CON_IDX_15	0x0000147c	tg3.h
27965	SNDBDI_MODE	0x00001800	tg3.h
27966	SNDBDI_MODE_RESET	0x00000001	tg3.h
27967	SNDBDI_MODE_ENABLE	0x00000002	tg3.h
27968	SNDBDI_MODE_ATTN_ENABLE	0x00000004	tg3.h
27969	SNDBDI_STATUS	0x00001804	tg3.h
27970	SNDBDI_STATUS_ERROR_ATTN	0x00000004	tg3.h
27971	SNDBDI_IN_PROD_IDX_0	0x00001808	tg3.h
27972	SNDBDI_IN_PROD_IDX_1	0x0000180c	tg3.h
27973	SNDBDI_IN_PROD_IDX_2	0x00001810	tg3.h
27974	SNDBDI_IN_PROD_IDX_3	0x00001814	tg3.h
27975	SNDBDI_IN_PROD_IDX_4	0x00001818	tg3.h
27976	SNDBDI_IN_PROD_IDX_5	0x0000181c	tg3.h
27977	SNDBDI_IN_PROD_IDX_6	0x00001820	tg3.h
27978	SNDBDI_IN_PROD_IDX_7	0x00001824	tg3.h
27979	SNDBDI_IN_PROD_IDX_8	0x00001828	tg3.h
27980	SNDBDI_IN_PROD_IDX_9	0x0000182c	tg3.h
27981	SNDBDI_IN_PROD_IDX_10	0x00001830	tg3.h
27982	SNDBDI_IN_PROD_IDX_11	0x00001834	tg3.h
27983	SNDBDI_IN_PROD_IDX_12	0x00001838	tg3.h
27984	SNDBDI_IN_PROD_IDX_13	0x0000183c	tg3.h
27985	SNDBDI_IN_PROD_IDX_14	0x00001840	tg3.h
27986	SNDBDI_IN_PROD_IDX_15	0x00001844	tg3.h
27987	SNDBDC_MODE	0x00001c00	tg3.h
27988	SNDBDC_MODE_RESET	0x00000001	tg3.h
27989	SNDBDC_MODE_ENABLE	0x00000002	tg3.h
27990	SNDBDC_MODE_ATTN_ENABLE	0x00000004	tg3.h
27991	RCVLPC_MODE	0x00002000	tg3.h
27992	RCVLPC_MODE_RESET	0x00000001	tg3.h
27993	RCVLPC_MODE_ENABLE	0x00000002	tg3.h
27994	RCVLPC_MODE_CLASS0_ATTN_ENAB	0x00000004	tg3.h
27995	RCVLPC_MODE_MAPOOR_AATTN_ENAB	0x00000008	tg3.h
27996	RCVLPC_MODE_STAT_OFLOW_ENAB	0x00000010	tg3.h
27997	RCVLPC_STATUS	0x00002004	tg3.h
27998	RCVLPC_STATUS_CLASS0	0x00000004	tg3.h
27999	RCVLPC_STATUS_MAPOOR	0x00000008	tg3.h
28000	RCVLPC_STATUS_STAT_OFLOW	0x00000010	tg3.h
28001	RCVLPC_LOCK	0x00002008	tg3.h
28002	RCVLPC_LOCK_REQ_MASK	0x0000ffff	tg3.h
28003	RCVLPC_LOCK_REQ_SHIFT	0	tg3.h
28004	RCVLPC_LOCK_GRANT_MASK	0xffff0000	tg3.h
28005	RCVLPC_LOCK_GRANT_SHIFT	16	tg3.h
28006	RCVLPC_NON_EMPTY_BITS	0x0000200c	tg3.h
28007	RCVLPC_NON_EMPTY_BITS_MASK	0x0000ffff	tg3.h
28008	RCVLPC_CONFIG	0x00002010	tg3.h
28009	RCVLPC_STATSCTRL	0x00002014	tg3.h
28010	RCVLPC_STATSCTRL_ENABLE	0x00000001	tg3.h
28011	RCVLPC_STATSCTRL_FASTUPD	0x00000002	tg3.h
28012	RCVLPC_STATS_ENABLE	0x00002018	tg3.h
28013	RCVLPC_STATSENAB_LNGBRST_RFIX	0x00400000	tg3.h
28014	RCVLPC_STATS_INCMASK	0x0000201c	tg3.h
28015	RCVLPC_SELLST_BASE	0x00002100	tg3.h	16 16-byte entries
28016	SELLST_TAIL	0x00000004	tg3.h
28017	SELLST_CONT	0x00000008	tg3.h
28018	SELLST_UNUSED	0x0000000c	tg3.h
28019	RCVLPC_COS_CNTL_BASE	0x00002200	tg3.h	16 4-byte entries
28020	RCVLPC_DROP_FILTER_CNT	0x00002240	tg3.h
28021	RCVLPC_DMA_WQ_FULL_CNT	0x00002244	tg3.h
28022	RCVLPC_DMA_HIPRIO_WQ_FULL_CNT	0x00002248	tg3.h
28023	RCVLPC_NO_RCV_BD_CNT	0x0000224c	tg3.h
28024	RCVLPC_IN_DISCARDS_CNT	0x00002250	tg3.h
28025	RCVLPC_IN_ERRORS_CNT	0x00002254	tg3.h
28026	RCVLPC_RCV_THRESH_HIT_CNT	0x00002258	tg3.h
28027	RCVDBDI_MODE	0x00002400	tg3.h
28028	RCVDBDI_MODE_RESET	0x00000001	tg3.h
28029	RCVDBDI_MODE_ENABLE	0x00000002	tg3.h
28030	RCVDBDI_MODE_JUMBOBD_NEEDED	0x00000004	tg3.h
28031	RCVDBDI_MODE_FRM_TOO_BIG	0x00000008	tg3.h
28032	RCVDBDI_MODE_INV_RING_SZ	0x00000010	tg3.h
28033	RCVDBDI_STATUS	0x00002404	tg3.h
28034	RCVDBDI_STATUS_JUMBOBD_NEEDED	0x00000004	tg3.h
28035	RCVDBDI_STATUS_FRM_TOO_BIG	0x00000008	tg3.h
28036	RCVDBDI_STATUS_INV_RING_SZ	0x00000010	tg3.h
28037	RCVDBDI_SPLIT_FRAME_MINSZ	0x00002408	tg3.h
28038	RCVDBDI_JUMBO_BD	0x00002440	tg3.h	TG3_BDINFO_...
28039	RCVDBDI_STD_BD	0x00002450	tg3.h	TG3_BDINFO_...
28040	RCVDBDI_MINI_BD	0x00002460	tg3.h	TG3_BDINFO_...
28041	RCVDBDI_JUMBO_CON_IDX	0x00002470	tg3.h
28042	RCVDBDI_STD_CON_IDX	0x00002474	tg3.h
28043	RCVDBDI_MINI_CON_IDX	0x00002478	tg3.h
28044	RCVDBDI_BD_PROD_IDX_0	0x00002480	tg3.h
28045	RCVDBDI_BD_PROD_IDX_1	0x00002484	tg3.h
28046	RCVDBDI_BD_PROD_IDX_2	0x00002488	tg3.h
28047	RCVDBDI_BD_PROD_IDX_3	0x0000248c	tg3.h
28048	RCVDBDI_BD_PROD_IDX_4	0x00002490	tg3.h
28049	RCVDBDI_BD_PROD_IDX_5	0x00002494	tg3.h
28050	RCVDBDI_BD_PROD_IDX_6	0x00002498	tg3.h
28051	RCVDBDI_BD_PROD_IDX_7	0x0000249c	tg3.h
28052	RCVDBDI_BD_PROD_IDX_8	0x000024a0	tg3.h
28053	RCVDBDI_BD_PROD_IDX_9	0x000024a4	tg3.h
28054	RCVDBDI_BD_PROD_IDX_10	0x000024a8	tg3.h
28055	RCVDBDI_BD_PROD_IDX_11	0x000024ac	tg3.h
28056	RCVDBDI_BD_PROD_IDX_12	0x000024b0	tg3.h
28057	RCVDBDI_BD_PROD_IDX_13	0x000024b4	tg3.h
28058	RCVDBDI_BD_PROD_IDX_14	0x000024b8	tg3.h
28059	RCVDBDI_BD_PROD_IDX_15	0x000024bc	tg3.h
28060	RCVDBDI_HWDIAG	0x000024c0	tg3.h
28061	RCVDCC_MODE	0x00002800	tg3.h
28062	RCVDCC_MODE_RESET	0x00000001	tg3.h
28063	RCVDCC_MODE_ENABLE	0x00000002	tg3.h
28064	RCVDCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
28065	RCVBDI_MODE	0x00002c00	tg3.h
28066	RCVBDI_MODE_RESET	0x00000001	tg3.h
28067	RCVBDI_MODE_ENABLE	0x00000002	tg3.h
28068	RCVBDI_MODE_RCB_ATTN_ENAB	0x00000004	tg3.h
28069	RCVBDI_STATUS	0x00002c04	tg3.h
28070	RCVBDI_STATUS_RCB_ATTN	0x00000004	tg3.h
28071	RCVBDI_JUMBO_PROD_IDX	0x00002c08	tg3.h
28072	RCVBDI_STD_PROD_IDX	0x00002c0c	tg3.h
28073	RCVBDI_MINI_PROD_IDX	0x00002c10	tg3.h
28074	RCVBDI_MINI_THRESH	0x00002c14	tg3.h
28075	RCVBDI_STD_THRESH	0x00002c18	tg3.h
28076	RCVBDI_JUMBO_THRESH	0x00002c1c	tg3.h
28077	RCVCC_MODE	0x00003000	tg3.h
28078	RCVCC_MODE_RESET	0x00000001	tg3.h
28079	RCVCC_MODE_ENABLE	0x00000002	tg3.h
28080	RCVCC_MODE_ATTN_ENABLE	0x00000004	tg3.h
28081	RCVCC_STATUS	0x00003004	tg3.h
28082	RCVCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
28083	RCVCC_JUMP_PROD_IDX	0x00003008	tg3.h
28084	RCVCC_STD_PROD_IDX	0x0000300c	tg3.h
28085	RCVCC_MINI_PROD_IDX	0x00003010	tg3.h
28086	RCVLSC_MODE	0x00003400	tg3.h
28087	RCVLSC_MODE_RESET	0x00000001	tg3.h
28088	RCVLSC_MODE_ENABLE	0x00000002	tg3.h
28089	RCVLSC_MODE_ATTN_ENABLE	0x00000004	tg3.h
28090	RCVLSC_STATUS	0x00003404	tg3.h
28091	RCVLSC_STATUS_ERROR_ATTN	0x00000004	tg3.h
28092	MBFREE_MODE	0x00003800	tg3.h
28093	MBFREE_MODE_RESET	0x00000001	tg3.h
28094	MBFREE_MODE_ENABLE	0x00000002	tg3.h
28095	MBFREE_STATUS	0x00003804	tg3.h
28096	HOSTCC_MODE	0x00003c00	tg3.h
28097	HOSTCC_MODE_RESET	0x00000001	tg3.h
28098	HOSTCC_MODE_ENABLE	0x00000002	tg3.h
28099	HOSTCC_MODE_ATTN	0x00000004	tg3.h
28100	HOSTCC_MODE_NOW	0x00000008	tg3.h
28101	HOSTCC_MODE_FULL_STATUS	0x00000000	tg3.h
28102	HOSTCC_MODE_64BYTE	0x00000080	tg3.h
28103	HOSTCC_MODE_32BYTE	0x00000100	tg3.h
28104	HOSTCC_MODE_CLRTICK_RXBD	0x00000200	tg3.h
28105	HOSTCC_MODE_CLRTICK_TXBD	0x00000400	tg3.h
28106	HOSTCC_MODE_NOINT_ON_NOW	0x00000800	tg3.h
28107	HOSTCC_MODE_NOINT_ON_FORCE	0x00001000	tg3.h
28108	HOSTCC_STATUS	0x00003c04	tg3.h
28109	HOSTCC_STATUS_ERROR_ATTN	0x00000004	tg3.h
28110	HOSTCC_RXCOL_TICKS	0x00003c08	tg3.h
28111	LOW_RXCOL_TICKS	0x00000032	tg3.h
28112	DEFAULT_RXCOL_TICKS	0x00000048	tg3.h
28113	HIGH_RXCOL_TICKS	0x00000096	tg3.h
28114	HOSTCC_TXCOL_TICKS	0x00003c0c	tg3.h
28115	LOW_TXCOL_TICKS	0x00000096	tg3.h
28116	DEFAULT_TXCOL_TICKS	0x0000012c	tg3.h
28117	HIGH_TXCOL_TICKS	0x00000145	tg3.h
28118	HOSTCC_RXMAX_FRAMES	0x00003c10	tg3.h
28119	LOW_RXMAX_FRAMES	0x00000005	tg3.h
28120	DEFAULT_RXMAX_FRAMES	0x00000008	tg3.h
28121	HIGH_RXMAX_FRAMES	0x00000012	tg3.h
28122	HOSTCC_TXMAX_FRAMES	0x00003c14	tg3.h
28123	LOW_TXMAX_FRAMES	0x00000035	tg3.h
28124	DEFAULT_TXMAX_FRAMES	0x0000004b	tg3.h
28125	HIGH_TXMAX_FRAMES	0x00000052	tg3.h
28126	HOSTCC_RXCOAL_TICK_INT	0x00003c18	tg3.h
28127	DEFAULT_RXCOAL_TICK_INT	0x00000019	tg3.h
28128	HOSTCC_TXCOAL_TICK_INT	0x00003c1c	tg3.h
28129	DEFAULT_TXCOAL_TICK_INT	0x00000019	tg3.h
28130	HOSTCC_RXCOAL_MAXF_INT	0x00003c20	tg3.h
28131	DEFAULT_RXCOAL_MAXF_INT	0x00000005	tg3.h
28132	HOSTCC_TXCOAL_MAXF_INT	0x00003c24	tg3.h
28133	DEFAULT_TXCOAL_MAXF_INT	0x00000005	tg3.h
28134	HOSTCC_STAT_COAL_TICKS	0x00003c28	tg3.h
28135	DEFAULT_STAT_COAL_TICKS	0x000f4240	tg3.h
28136	HOSTCC_STATS_BLK_HOST_ADDR	0x00003c30	tg3.h	64-bit
28137	HOSTCC_STATUS_BLK_HOST_ADDR	0x00003c38	tg3.h	64-bit
28138	HOSTCC_STATS_BLK_NIC_ADDR	0x00003c40	tg3.h
28139	HOSTCC_STATUS_BLK_NIC_ADDR	0x00003c44	tg3.h
28140	HOSTCC_FLOW_ATTN	0x00003c48	tg3.h
28141	HOSTCC_JUMBO_CON_IDX	0x00003c50	tg3.h
28142	HOSTCC_STD_CON_IDX	0x00003c54	tg3.h
28143	HOSTCC_MINI_CON_IDX	0x00003c58	tg3.h
28144	HOSTCC_RET_PROD_IDX_0	0x00003c80	tg3.h
28145	HOSTCC_RET_PROD_IDX_1	0x00003c84	tg3.h
28146	HOSTCC_RET_PROD_IDX_2	0x00003c88	tg3.h
28147	HOSTCC_RET_PROD_IDX_3	0x00003c8c	tg3.h
28148	HOSTCC_RET_PROD_IDX_4	0x00003c90	tg3.h
28149	HOSTCC_RET_PROD_IDX_5	0x00003c94	tg3.h
28150	HOSTCC_RET_PROD_IDX_6	0x00003c98	tg3.h
28151	HOSTCC_RET_PROD_IDX_7	0x00003c9c	tg3.h
28152	HOSTCC_RET_PROD_IDX_8	0x00003ca0	tg3.h
28153	HOSTCC_RET_PROD_IDX_9	0x00003ca4	tg3.h
28154	HOSTCC_RET_PROD_IDX_10	0x00003ca8	tg3.h
28155	HOSTCC_RET_PROD_IDX_11	0x00003cac	tg3.h
28156	HOSTCC_RET_PROD_IDX_12	0x00003cb0	tg3.h
28157	HOSTCC_RET_PROD_IDX_13	0x00003cb4	tg3.h
28158	HOSTCC_RET_PROD_IDX_14	0x00003cb8	tg3.h
28159	HOSTCC_RET_PROD_IDX_15	0x00003cbc	tg3.h
28160	HOSTCC_SND_CON_IDX_0	0x00003cc0	tg3.h
28161	HOSTCC_SND_CON_IDX_1	0x00003cc4	tg3.h
28162	HOSTCC_SND_CON_IDX_2	0x00003cc8	tg3.h
28163	HOSTCC_SND_CON_IDX_3	0x00003ccc	tg3.h
28164	HOSTCC_SND_CON_IDX_4	0x00003cd0	tg3.h
28165	HOSTCC_SND_CON_IDX_5	0x00003cd4	tg3.h
28166	HOSTCC_SND_CON_IDX_6	0x00003cd8	tg3.h
28167	HOSTCC_SND_CON_IDX_7	0x00003cdc	tg3.h
28168	HOSTCC_SND_CON_IDX_8	0x00003ce0	tg3.h
28169	HOSTCC_SND_CON_IDX_9	0x00003ce4	tg3.h
28170	HOSTCC_SND_CON_IDX_10	0x00003ce8	tg3.h
28171	HOSTCC_SND_CON_IDX_11	0x00003cec	tg3.h
28172	HOSTCC_SND_CON_IDX_12	0x00003cf0	tg3.h
28173	HOSTCC_SND_CON_IDX_13	0x00003cf4	tg3.h
28174	HOSTCC_SND_CON_IDX_14	0x00003cf8	tg3.h
28175	HOSTCC_SND_CON_IDX_15	0x00003cfc	tg3.h
28176	MEMARB_MODE	0x00004000	tg3.h
28177	MEMARB_MODE_RESET	0x00000001	tg3.h
28178	MEMARB_MODE_ENABLE	0x00000002	tg3.h
28179	MEMARB_STATUS	0x00004004	tg3.h
28180	MEMARB_TRAP_ADDR_LOW	0x00004008	tg3.h
28181	MEMARB_TRAP_ADDR_HIGH	0x0000400c	tg3.h
28182	BUFMGR_MODE	0x00004400	tg3.h
28183	BUFMGR_MODE_RESET	0x00000001	tg3.h
28184	BUFMGR_MODE_ENABLE	0x00000002	tg3.h
28185	BUFMGR_MODE_ATTN_ENABLE	0x00000004	tg3.h
28186	BUFMGR_MODE_BM_TEST	0x00000008	tg3.h
28187	BUFMGR_MODE_MBLOW_ATTN_ENAB	0x00000010	tg3.h
28188	BUFMGR_STATUS	0x00004404	tg3.h
28189	BUFMGR_STATUS_ERROR	0x00000004	tg3.h
28190	BUFMGR_STATUS_MBLOW	0x00000010	tg3.h
28191	BUFMGR_MB_POOL_ADDR	0x00004408	tg3.h
28192	BUFMGR_MB_POOL_SIZE	0x0000440c	tg3.h
28193	BUFMGR_MB_RDMA_LOW_WATER	0x00004410	tg3.h
28194	DEFAULT_MB_RDMA_LOW_WATER	0x00000050	tg3.h
28195	DEFAULT_MB_RDMA_LOW_WATER_5705	0x00000000	tg3.h
28196	DEFAULT_MB_RDMA_LOW_WATER_JUMBO	0x00000130	tg3.h
28197	BUFMGR_MB_MACRX_LOW_WATER	0x00004414	tg3.h
28198	DEFAULT_MB_MACRX_LOW_WATER	0x00000020	tg3.h
28199	DEFAULT_MB_MACRX_LOW_WATER_5705	0x00000010	tg3.h
28200	DEFAULT_MB_MACRX_LOW_WATER_JUMB	0x00000098	tg3.h
28201	BUFMGR_MB_HIGH_WATER	0x00004418	tg3.h
28202	DEFAULT_MB_HIGH_WATER	0x00000060	tg3.h
28203	DEFAULT_MB_HIGH_WATER_5705	0x00000060	tg3.h
28204	DEFAULT_MB_HIGH_WATER_JUMBO	0x0000017c	tg3.h
28205	BUFMGR_RX_MB_ALLOC_REQ	0x0000441c	tg3.h
28206	BUFMGR_MB_ALLOC_BIT	0x10000000	tg3.h
28207	BUFMGR_RX_MB_ALLOC_RESP	0x00004420	tg3.h
28208	BUFMGR_TX_MB_ALLOC_REQ	0x00004424	tg3.h
28209	BUFMGR_TX_MB_ALLOC_RESP	0x00004428	tg3.h
28210	BUFMGR_DMA_DESC_POOL_ADDR	0x0000442c	tg3.h
28211	BUFMGR_DMA_DESC_POOL_SIZE	0x00004430	tg3.h
28212	BUFMGR_DMA_LOW_WATER	0x00004434	tg3.h
28213	DEFAULT_DMA_LOW_WATER	0x00000005	tg3.h
28214	BUFMGR_DMA_HIGH_WATER	0x00004438	tg3.h
28215	DEFAULT_DMA_HIGH_WATER	0x0000000a	tg3.h
28216	BUFMGR_RX_DMA_ALLOC_REQ	0x0000443c	tg3.h
28217	BUFMGR_RX_DMA_ALLOC_RESP	0x00004440	tg3.h
28218	BUFMGR_TX_DMA_ALLOC_REQ	0x00004444	tg3.h
28219	BUFMGR_TX_DMA_ALLOC_RESP	0x00004448	tg3.h
28220	BUFMGR_HWDIAG_0	0x0000444c	tg3.h
28221	BUFMGR_HWDIAG_1	0x00004450	tg3.h
28222	BUFMGR_HWDIAG_2	0x00004454	tg3.h
28223	RDMAC_MODE	0x00004800	tg3.h
28224	RDMAC_MODE_RESET	0x00000001	tg3.h
28225	RDMAC_MODE_ENABLE	0x00000002	tg3.h
28226	RDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
28227	RDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
28228	RDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
28229	RDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
28230	RDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
28231	RDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
28232	RDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
28233	RDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
28234	RDMAC_MODE_SPLIT_ENABLE	0x00000800	tg3.h
28235	RDMAC_MODE_SPLIT_RESET	0x00001000	tg3.h
28236	RDMAC_MODE_FIFO_SIZE_128	0x00020000	tg3.h
28237	RDMAC_MODE_FIFO_LONG_BURST	0x00030000	tg3.h
28238	RDMAC_STATUS	0x00004804	tg3.h
28239	RDMAC_STATUS_TGTABORT	0x00000004	tg3.h
28240	RDMAC_STATUS_MSTABORT	0x00000008	tg3.h
28241	RDMAC_STATUS_PARITYERR	0x00000010	tg3.h
28242	RDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
28243	RDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
28244	RDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
28245	RDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
28246	RDMAC_STATUS_LNGREAD	0x00000200	tg3.h
28247	WDMAC_MODE	0x00004c00	tg3.h
28248	WDMAC_MODE_RESET	0x00000001	tg3.h
28249	WDMAC_MODE_ENABLE	0x00000002	tg3.h
28250	WDMAC_MODE_TGTABORT_ENAB	0x00000004	tg3.h
28251	WDMAC_MODE_MSTABORT_ENAB	0x00000008	tg3.h
28252	WDMAC_MODE_PARITYERR_ENAB	0x00000010	tg3.h
28253	WDMAC_MODE_ADDROFLOW_ENAB	0x00000020	tg3.h
28254	WDMAC_MODE_FIFOOFLOW_ENAB	0x00000040	tg3.h
28255	WDMAC_MODE_FIFOURUN_ENAB	0x00000080	tg3.h
28256	WDMAC_MODE_FIFOOREAD_ENAB	0x00000100	tg3.h
28257	WDMAC_MODE_LNGREAD_ENAB	0x00000200	tg3.h
28258	WDMAC_MODE_RX_ACCEL	0x00000400	tg3.h
28259	WDMAC_STATUS	0x00004c04	tg3.h
28260	WDMAC_STATUS_TGTABORT	0x00000004	tg3.h
28261	WDMAC_STATUS_MSTABORT	0x00000008	tg3.h
28262	WDMAC_STATUS_PARITYERR	0x00000010	tg3.h
28263	WDMAC_STATUS_ADDROFLOW	0x00000020	tg3.h
28264	WDMAC_STATUS_FIFOOFLOW	0x00000040	tg3.h
28265	WDMAC_STATUS_FIFOURUN	0x00000080	tg3.h
28266	WDMAC_STATUS_FIFOOREAD	0x00000100	tg3.h
28267	WDMAC_STATUS_LNGREAD	0x00000200	tg3.h
28268	CPU_MODE	0x00000000	tg3.h
28269	CPU_MODE_RESET	0x00000001	tg3.h
28270	CPU_MODE_HALT	0x00000400	tg3.h
28271	CPU_STATE	0x00000004	tg3.h
28272	CPU_EVTMASK	0x00000008	tg3.h
28273	CPU_PC	0x0000001c	tg3.h
28274	CPU_INSN	0x00000020	tg3.h
28275	CPU_SPAD_UFLOW	0x00000024	tg3.h
28276	CPU_WDOG_CLEAR	0x00000028	tg3.h
28277	CPU_WDOG_VECTOR	0x0000002c	tg3.h
28278	CPU_WDOG_PC	0x00000030	tg3.h
28279	CPU_HW_BP	0x00000034	tg3.h
28280	CPU_WDOG_SAVED_STATE	0x00000044	tg3.h
28281	CPU_LAST_BRANCH_ADDR	0x00000048	tg3.h
28282	CPU_SPAD_UFLOW_SET	0x0000004c	tg3.h
28283	CPU_R0	0x00000200	tg3.h
28284	CPU_R1	0x00000204	tg3.h
28285	CPU_R2	0x00000208	tg3.h
28286	CPU_R3	0x0000020c	tg3.h
28287	CPU_R4	0x00000210	tg3.h
28288	CPU_R5	0x00000214	tg3.h
28289	CPU_R6	0x00000218	tg3.h
28290	CPU_R7	0x0000021c	tg3.h
28291	CPU_R8	0x00000220	tg3.h
28292	CPU_R9	0x00000224	tg3.h
28293	CPU_R10	0x00000228	tg3.h
28294	CPU_R11	0x0000022c	tg3.h
28295	CPU_R12	0x00000230	tg3.h
28296	CPU_R13	0x00000234	tg3.h
28297	CPU_R14	0x00000238	tg3.h
28298	CPU_R15	0x0000023c	tg3.h
28299	CPU_R16	0x00000240	tg3.h
28300	CPU_R17	0x00000244	tg3.h
28301	CPU_R18	0x00000248	tg3.h
28302	CPU_R19	0x0000024c	tg3.h
28303	CPU_R20	0x00000250	tg3.h
28304	CPU_R21	0x00000254	tg3.h
28305	CPU_R22	0x00000258	tg3.h
28306	CPU_R23	0x0000025c	tg3.h
28307	CPU_R24	0x00000260	tg3.h
28308	CPU_R25	0x00000264	tg3.h
28309	CPU_R26	0x00000268	tg3.h
28310	CPU_R27	0x0000026c	tg3.h
28311	CPU_R28	0x00000270	tg3.h
28312	CPU_R29	0x00000274	tg3.h
28313	CPU_R30	0x00000278	tg3.h
28314	CPU_R31	0x0000027c	tg3.h
28315	RX_CPU_BASE	0x00005000	tg3.h
28316	TX_CPU_BASE	0x00005400	tg3.h
28317	GRCMBOX_INTERRUPT_0	0x00005800	tg3.h	64-bit
28318	GRCMBOX_INTERRUPT_1	0x00005808	tg3.h	64-bit
28319	GRCMBOX_INTERRUPT_2	0x00005810	tg3.h	64-bit
28320	GRCMBOX_INTERRUPT_3	0x00005818	tg3.h	64-bit
28321	GRCMBOX_GENERAL_0	0x00005820	tg3.h	64-bit
28322	GRCMBOX_GENERAL_1	0x00005828	tg3.h	64-bit
28323	GRCMBOX_GENERAL_2	0x00005830	tg3.h	64-bit
28324	GRCMBOX_GENERAL_3	0x00005838	tg3.h	64-bit
28325	GRCMBOX_GENERAL_4	0x00005840	tg3.h	64-bit
28326	GRCMBOX_GENERAL_5	0x00005848	tg3.h	64-bit
28327	GRCMBOX_GENERAL_6	0x00005850	tg3.h	64-bit
28328	GRCMBOX_GENERAL_7	0x00005858	tg3.h	64-bit
28329	GRCMBOX_RELOAD_STAT	0x00005860	tg3.h	64-bit
28330	GRCMBOX_RCVSTD_PROD_IDX	0x00005868	tg3.h	64-bit
28331	GRCMBOX_RCVJUMBO_PROD_IDX	0x00005870	tg3.h	64-bit
28332	GRCMBOX_RCVMINI_PROD_IDX	0x00005878	tg3.h	64-bit
28333	GRCMBOX_RCVRET_CON_IDX_0	0x00005880	tg3.h	64-bit
28334	GRCMBOX_RCVRET_CON_IDX_1	0x00005888	tg3.h	64-bit
28335	GRCMBOX_RCVRET_CON_IDX_2	0x00005890	tg3.h	64-bit
28336	GRCMBOX_RCVRET_CON_IDX_3	0x00005898	tg3.h	64-bit
28337	GRCMBOX_RCVRET_CON_IDX_4	0x000058a0	tg3.h	64-bit
28338	GRCMBOX_RCVRET_CON_IDX_5	0x000058a8	tg3.h	64-bit
28339	GRCMBOX_RCVRET_CON_IDX_6	0x000058b0	tg3.h	64-bit
28340	GRCMBOX_RCVRET_CON_IDX_7	0x000058b8	tg3.h	64-bit
28341	GRCMBOX_RCVRET_CON_IDX_8	0x000058c0	tg3.h	64-bit
28342	GRCMBOX_RCVRET_CON_IDX_9	0x000058c8	tg3.h	64-bit
28343	GRCMBOX_RCVRET_CON_IDX_10	0x000058d0	tg3.h	64-bit
28344	GRCMBOX_RCVRET_CON_IDX_11	0x000058d8	tg3.h	64-bit
28345	GRCMBOX_RCVRET_CON_IDX_12	0x000058e0	tg3.h	64-bit
28346	GRCMBOX_RCVRET_CON_IDX_13	0x000058e8	tg3.h	64-bit
28347	GRCMBOX_RCVRET_CON_IDX_14	0x000058f0	tg3.h	64-bit
28348	GRCMBOX_RCVRET_CON_IDX_15	0x000058f8	tg3.h	64-bit
28349	GRCMBOX_SNDHOST_PROD_IDX_0	0x00005900	tg3.h	64-bit
28350	GRCMBOX_SNDHOST_PROD_IDX_1	0x00005908	tg3.h	64-bit
28351	GRCMBOX_SNDHOST_PROD_IDX_2	0x00005910	tg3.h	64-bit
28352	GRCMBOX_SNDHOST_PROD_IDX_3	0x00005918	tg3.h	64-bit
28353	GRCMBOX_SNDHOST_PROD_IDX_4	0x00005920	tg3.h	64-bit
28354	GRCMBOX_SNDHOST_PROD_IDX_5	0x00005928	tg3.h	64-bit
28355	GRCMBOX_SNDHOST_PROD_IDX_6	0x00005930	tg3.h	64-bit
28356	GRCMBOX_SNDHOST_PROD_IDX_7	0x00005938	tg3.h	64-bit
28357	GRCMBOX_SNDHOST_PROD_IDX_8	0x00005940	tg3.h	64-bit
28358	GRCMBOX_SNDHOST_PROD_IDX_9	0x00005948	tg3.h	64-bit
28359	GRCMBOX_SNDHOST_PROD_IDX_10	0x00005950	tg3.h	64-bit
28360	GRCMBOX_SNDHOST_PROD_IDX_11	0x00005958	tg3.h	64-bit
28361	GRCMBOX_SNDHOST_PROD_IDX_12	0x00005960	tg3.h	64-bit
28362	GRCMBOX_SNDHOST_PROD_IDX_13	0x00005968	tg3.h	64-bit
28363	GRCMBOX_SNDHOST_PROD_IDX_14	0x00005970	tg3.h	64-bit
28364	GRCMBOX_SNDHOST_PROD_IDX_15	0x00005978	tg3.h	64-bit
28365	GRCMBOX_SNDNIC_PROD_IDX_0	0x00005980	tg3.h	64-bit
28366	GRCMBOX_SNDNIC_PROD_IDX_1	0x00005988	tg3.h	64-bit
28367	GRCMBOX_SNDNIC_PROD_IDX_2	0x00005990	tg3.h	64-bit
28368	GRCMBOX_SNDNIC_PROD_IDX_3	0x00005998	tg3.h	64-bit
28369	GRCMBOX_SNDNIC_PROD_IDX_4	0x000059a0	tg3.h	64-bit
28370	GRCMBOX_SNDNIC_PROD_IDX_5	0x000059a8	tg3.h	64-bit
28371	GRCMBOX_SNDNIC_PROD_IDX_6	0x000059b0	tg3.h	64-bit
28372	GRCMBOX_SNDNIC_PROD_IDX_7	0x000059b8	tg3.h	64-bit
28373	GRCMBOX_SNDNIC_PROD_IDX_8	0x000059c0	tg3.h	64-bit
28374	GRCMBOX_SNDNIC_PROD_IDX_9	0x000059c8	tg3.h	64-bit
28375	GRCMBOX_SNDNIC_PROD_IDX_10	0x000059d0	tg3.h	64-bit
28376	GRCMBOX_SNDNIC_PROD_IDX_11	0x000059d8	tg3.h	64-bit
28377	GRCMBOX_SNDNIC_PROD_IDX_12	0x000059e0	tg3.h	64-bit
28378	GRCMBOX_SNDNIC_PROD_IDX_13	0x000059e8	tg3.h	64-bit
28379	GRCMBOX_SNDNIC_PROD_IDX_14	0x000059f0	tg3.h	64-bit
28380	GRCMBOX_SNDNIC_PROD_IDX_15	0x000059f8	tg3.h	64-bit
28381	GRCMBOX_HIGH_PRIO_EV_VECTOR	0x00005a00	tg3.h
28382	GRCMBOX_HIGH_PRIO_EV_MASK	0x00005a04	tg3.h
28383	GRCMBOX_LOW_PRIO_EV_VEC	0x00005a08	tg3.h
28384	GRCMBOX_LOW_PRIO_EV_MASK	0x00005a0c	tg3.h
28385	FTQ_RESET	0x00005c00	tg3.h
28386	FTQ_RESET_DMA_READ_QUEUE	(1 << 1)	tg3.h
28387	FTQ_RESET_DMA_HIGH_PRI_READ	(1 << 2)	tg3.h
28388	FTQ_RESET_SEND_BD_COMPLETION	(1 << 4)	tg3.h
28389	FTQ_RESET_DMA_WRITE	(1 << 6)	tg3.h
28390	FTQ_RESET_DMA_HIGH_PRI_WRITE	(1 << 7)	tg3.h
28391	FTQ_RESET_SEND_DATA_COMPLETION	(1 << 9)	tg3.h
28392	FTQ_RESET_HOST_COALESCING	(1 << 10)	tg3.h
28393	FTQ_RESET_MAC_TX	(1 << 11)	tg3.h
28394	FTQ_RESET_RX_BD_COMPLETE	(1 << 13)	tg3.h
28395	FTQ_RESET_RX_LIST_PLCMT	(1 << 14)	tg3.h
28396	FTQ_RESET_RX_DATA_COMPLETION	(1 << 16)	tg3.h
28397	FTQ_DMA_NORM_READ_CTL	0x00005c10	tg3.h
28398	FTQ_DMA_NORM_READ_FULL_CNT	0x00005c14	tg3.h
28399	FTQ_DMA_NORM_READ_FIFO_ENQDEQ	0x00005c18	tg3.h
28400	FTQ_DMA_NORM_READ_WRITE_PEEK	0x00005c1c	tg3.h
28401	FTQ_DMA_HIGH_READ_CTL	0x00005c20	tg3.h
28402	FTQ_DMA_HIGH_READ_FULL_CNT	0x00005c24	tg3.h
28403	FTQ_DMA_HIGH_READ_FIFO_ENQDEQ	0x00005c28	tg3.h
28404	FTQ_DMA_HIGH_READ_WRITE_PEEK	0x00005c2c	tg3.h
28405	FTQ_DMA_COMP_DISC_CTL	0x00005c30	tg3.h
28406	FTQ_DMA_COMP_DISC_FULL_CNT	0x00005c34	tg3.h
28407	FTQ_DMA_COMP_DISC_FIFO_ENQDEQ	0x00005c38	tg3.h
28408	FTQ_DMA_COMP_DISC_WRITE_PEEK	0x00005c3c	tg3.h
28409	FTQ_SEND_BD_COMP_CTL	0x00005c40	tg3.h
28410	FTQ_SEND_BD_COMP_FULL_CNT	0x00005c44	tg3.h
28411	FTQ_SEND_BD_COMP_FIFO_ENQDEQ	0x00005c48	tg3.h
28412	FTQ_SEND_BD_COMP_WRITE_PEEK	0x00005c4c	tg3.h
28413	FTQ_SEND_DATA_INIT_CTL	0x00005c50	tg3.h
28414	FTQ_SEND_DATA_INIT_FULL_CNT	0x00005c54	tg3.h
28415	FTQ_SEND_DATA_INIT_FIFO_ENQDEQ	0x00005c58	tg3.h
28416	FTQ_SEND_DATA_INIT_WRITE_PEEK	0x00005c5c	tg3.h
28417	FTQ_DMA_NORM_WRITE_CTL	0x00005c60	tg3.h
28418	FTQ_DMA_NORM_WRITE_FULL_CNT	0x00005c64	tg3.h
28419	FTQ_DMA_NORM_WRITE_FIFO_ENQDEQ	0x00005c68	tg3.h
28420	FTQ_DMA_NORM_WRITE_WRITE_PEEK	0x00005c6c	tg3.h
28421	FTQ_DMA_HIGH_WRITE_CTL	0x00005c70	tg3.h
28422	FTQ_DMA_HIGH_WRITE_FULL_CNT	0x00005c74	tg3.h
28423	FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ	0x00005c78	tg3.h
28424	FTQ_DMA_HIGH_WRITE_WRITE_PEEK	0x00005c7c	tg3.h
28425	FTQ_SWTYPE1_CTL	0x00005c80	tg3.h
28426	FTQ_SWTYPE1_FULL_CNT	0x00005c84	tg3.h
28427	FTQ_SWTYPE1_FIFO_ENQDEQ	0x00005c88	tg3.h
28428	FTQ_SWTYPE1_WRITE_PEEK	0x00005c8c	tg3.h
28429	FTQ_SEND_DATA_COMP_CTL	0x00005c90	tg3.h
28430	FTQ_SEND_DATA_COMP_FULL_CNT	0x00005c94	tg3.h
28431	FTQ_SEND_DATA_COMP_FIFO_ENQDEQ	0x00005c98	tg3.h
28432	FTQ_SEND_DATA_COMP_WRITE_PEEK	0x00005c9c	tg3.h
28433	FTQ_HOST_COAL_CTL	0x00005ca0	tg3.h
28434	FTQ_HOST_COAL_FULL_CNT	0x00005ca4	tg3.h
28435	FTQ_HOST_COAL_FIFO_ENQDEQ	0x00005ca8	tg3.h
28436	FTQ_HOST_COAL_WRITE_PEEK	0x00005cac	tg3.h
28437	FTQ_MAC_TX_CTL	0x00005cb0	tg3.h
28438	FTQ_MAC_TX_FULL_CNT	0x00005cb4	tg3.h
28439	FTQ_MAC_TX_FIFO_ENQDEQ	0x00005cb8	tg3.h
28440	FTQ_MAC_TX_WRITE_PEEK	0x00005cbc	tg3.h
28441	FTQ_MB_FREE_CTL	0x00005cc0	tg3.h
28442	FTQ_MB_FREE_FULL_CNT	0x00005cc4	tg3.h
28443	FTQ_MB_FREE_FIFO_ENQDEQ	0x00005cc8	tg3.h
28444	FTQ_MB_FREE_WRITE_PEEK	0x00005ccc	tg3.h
28445	FTQ_RCVBD_COMP_CTL	0x00005cd0	tg3.h
28446	FTQ_RCVBD_COMP_FULL_CNT	0x00005cd4	tg3.h
28447	FTQ_RCVBD_COMP_FIFO_ENQDEQ	0x00005cd8	tg3.h
28448	FTQ_RCVBD_COMP_WRITE_PEEK	0x00005cdc	tg3.h
28449	FTQ_RCVLST_PLMT_CTL	0x00005ce0	tg3.h
28450	FTQ_RCVLST_PLMT_FULL_CNT	0x00005ce4	tg3.h
28451	FTQ_RCVLST_PLMT_FIFO_ENQDEQ	0x00005ce8	tg3.h
28452	FTQ_RCVLST_PLMT_WRITE_PEEK	0x00005cec	tg3.h
28453	FTQ_RCVDATA_INI_CTL	0x00005cf0	tg3.h
28454	FTQ_RCVDATA_INI_FULL_CNT	0x00005cf4	tg3.h
28455	FTQ_RCVDATA_INI_FIFO_ENQDEQ	0x00005cf8	tg3.h
28456	FTQ_RCVDATA_INI_WRITE_PEEK	0x00005cfc	tg3.h
28457	FTQ_RCVDATA_COMP_CTL	0x00005d00	tg3.h
28458	FTQ_RCVDATA_COMP_FULL_CNT	0x00005d04	tg3.h
28459	FTQ_RCVDATA_COMP_FIFO_ENQDEQ	0x00005d08	tg3.h
28460	FTQ_RCVDATA_COMP_WRITE_PEEK	0x00005d0c	tg3.h
28461	FTQ_SWTYPE2_CTL	0x00005d10	tg3.h
28462	FTQ_SWTYPE2_FULL_CNT	0x00005d14	tg3.h
28463	FTQ_SWTYPE2_FIFO_ENQDEQ	0x00005d18	tg3.h
28464	FTQ_SWTYPE2_WRITE_PEEK	0x00005d1c	tg3.h
28465	MSGINT_MODE	0x00006000	tg3.h
28466	MSGINT_MODE_RESET	0x00000001	tg3.h
28467	MSGINT_MODE_ENABLE	0x00000002	tg3.h
28468	MSGINT_STATUS	0x00006004	tg3.h
28469	MSGINT_FIFO	0x00006008	tg3.h
28470	DMAC_MODE	0x00006400	tg3.h
28471	DMAC_MODE_RESET	0x00000001	tg3.h
28472	DMAC_MODE_ENABLE	0x00000002	tg3.h
28473	GRC_MODE	0x00006800	tg3.h
28474	GRC_MODE_UPD_ON_COAL	0x00000001	tg3.h
28475	GRC_MODE_BSWAP_NONFRM_DATA	0x00000002	tg3.h
28476	GRC_MODE_WSWAP_NONFRM_DATA	0x00000004	tg3.h
28477	GRC_MODE_BSWAP_DATA	0x00000010	tg3.h
28478	GRC_MODE_WSWAP_DATA	0x00000020	tg3.h
28479	GRC_MODE_SPLITHDR	0x00000100	tg3.h
28480	GRC_MODE_NOFRM_CRACKING	0x00000200	tg3.h
28481	GRC_MODE_INCL_CRC	0x00000400	tg3.h
28482	GRC_MODE_ALLOW_BAD_FRMS	0x00000800	tg3.h
28483	GRC_MODE_NOIRQ_ON_SENDS	0x00002000	tg3.h
28484	GRC_MODE_NOIRQ_ON_RCV	0x00004000	tg3.h
28485	GRC_MODE_FORCE_PCI32BIT	0x00008000	tg3.h
28486	GRC_MODE_HOST_STACKUP	0x00010000	tg3.h
28487	GRC_MODE_HOST_SENDBDS	0x00020000	tg3.h
28488	GRC_MODE_NO_TX_PHDR_CSUM	0x00100000	tg3.h
28489	GRC_MODE_NO_RX_PHDR_CSUM	0x00800000	tg3.h
28490	GRC_MODE_IRQ_ON_TX_CPU_ATTN	0x01000000	tg3.h
28491	GRC_MODE_IRQ_ON_RX_CPU_ATTN	0x02000000	tg3.h
28492	GRC_MODE_IRQ_ON_MAC_ATTN	0x04000000	tg3.h
28493	GRC_MODE_IRQ_ON_DMA_ATTN	0x08000000	tg3.h
28494	GRC_MODE_IRQ_ON_FLOW_ATTN	0x10000000	tg3.h
28495	GRC_MODE_4X_NIC_SEND_RINGS	0x20000000	tg3.h
28496	GRC_MODE_MCAST_FRM_ENABLE	0x40000000	tg3.h
28497	GRC_MISC_CFG	0x00006804	tg3.h
28498	GRC_MISC_CFG_CORECLK_RESET	0x00000001	tg3.h
28499	GRC_MISC_CFG_PRESCALAR_MASK	0x000000fe	tg3.h
28500	GRC_MISC_CFG_PRESCALAR_SHIFT	1	tg3.h
28501	GRC_MISC_CFG_BOARD_ID_MASK	0x0001e000	tg3.h
28502	GRC_MISC_CFG_BOARD_ID_5700	0x0001e000	tg3.h
28503	GRC_MISC_CFG_BOARD_ID_5701	0x00000000	tg3.h
28504	GRC_MISC_CFG_BOARD_ID_5702FE	0x00004000	tg3.h
28505	GRC_MISC_CFG_BOARD_ID_5703	0x00000000	tg3.h
28506	GRC_MISC_CFG_BOARD_ID_5703S	0x00002000	tg3.h
28507	GRC_MISC_CFG_BOARD_ID_5704	0x00000000	tg3.h
28508	GRC_MISC_CFG_BOARD_ID_5704CIOBE	0x00004000	tg3.h
28509	GRC_MISC_CFG_BOARD_ID_5704_A2	0x00008000	tg3.h
28510	GRC_MISC_CFG_BOARD_ID_5788	0x00010000	tg3.h
28511	GRC_MISC_CFG_BOARD_ID_5788M	0x00018000	tg3.h
28512	GRC_MISC_CFG_BOARD_ID_AC91002A1	0x00018000	tg3.h
28513	GRC_MISC_CFG_KEEP_GPHY_POWER	0x04000000	tg3.h
28514	GRC_LOCAL_CTRL	0x00006808	tg3.h
28515	GRC_LCLCTRL_INT_ACTIVE	0x00000001	tg3.h
28516	GRC_LCLCTRL_CLEARINT	0x00000002	tg3.h
28517	GRC_LCLCTRL_SETINT	0x00000004	tg3.h
28518	GRC_LCLCTRL_INT_ON_ATTN	0x00000008	tg3.h
28519	GRC_LCLCTRL_GPIO_INPUT0	0x00000100	tg3.h
28520	GRC_LCLCTRL_GPIO_INPUT1	0x00000200	tg3.h
28521	GRC_LCLCTRL_GPIO_INPUT2	0x00000400	tg3.h
28522	GRC_LCLCTRL_GPIO_OE0	0x00000800	tg3.h
28523	GRC_LCLCTRL_GPIO_OE1	0x00001000	tg3.h
28524	GRC_LCLCTRL_GPIO_OE2	0x00002000	tg3.h
28525	GRC_LCLCTRL_GPIO_OUTPUT0	0x00004000	tg3.h
28526	GRC_LCLCTRL_GPIO_OUTPUT1	0x00008000	tg3.h
28527	GRC_LCLCTRL_GPIO_OUTPUT2	0x00010000	tg3.h
28528	GRC_LCLCTRL_EXTMEM_ENABLE	0x00020000	tg3.h
28529	GRC_LCLCTRL_MEMSZ_MASK	0x001c0000	tg3.h
28530	GRC_LCLCTRL_MEMSZ_256K	0x00000000	tg3.h
28531	GRC_LCLCTRL_MEMSZ_512K	0x00040000	tg3.h
28532	GRC_LCLCTRL_MEMSZ_1M	0x00080000	tg3.h
28533	GRC_LCLCTRL_MEMSZ_2M	0x000c0000	tg3.h
28534	GRC_LCLCTRL_MEMSZ_4M	0x00100000	tg3.h
28535	GRC_LCLCTRL_MEMSZ_8M	0x00140000	tg3.h
28536	GRC_LCLCTRL_MEMSZ_16M	0x00180000	tg3.h
28537	GRC_LCLCTRL_BANK_SELECT	0x00200000	tg3.h
28538	GRC_LCLCTRL_SSRAM_TYPE	0x00400000	tg3.h
28539	GRC_LCLCTRL_AUTO_SEEPROM	0x01000000	tg3.h
28540	GRC_TIMER	0x0000680c	tg3.h
28541	GRC_RX_CPU_EVENT	0x00006810	tg3.h
28542	GRC_RX_TIMER_REF	0x00006814	tg3.h
28543	GRC_RX_CPU_SEM	0x00006818	tg3.h
28544	GRC_REMOTE_RX_CPU_ATTN	0x0000681c	tg3.h
28545	GRC_TX_CPU_EVENT	0x00006820	tg3.h
28546	GRC_TX_TIMER_REF	0x00006824	tg3.h
28547	GRC_TX_CPU_SEM	0x00006828	tg3.h
28548	GRC_REMOTE_TX_CPU_ATTN	0x0000682c	tg3.h
28549	GRC_MEM_POWER_UP	0x00006830	tg3.h	64-bit
28550	GRC_EEPROM_ADDR	0x00006838	tg3.h
28551	EEPROM_ADDR_WRITE	0x00000000	tg3.h
28552	EEPROM_ADDR_READ	0x80000000	tg3.h
28553	EEPROM_ADDR_COMPLETE	0x40000000	tg3.h
28554	EEPROM_ADDR_FSM_RESET	0x20000000	tg3.h
28555	EEPROM_ADDR_DEVID_MASK	0x1c000000	tg3.h
28556	EEPROM_ADDR_DEVID_SHIFT	26	tg3.h
28557	EEPROM_ADDR_START	0x02000000	tg3.h
28558	EEPROM_ADDR_CLKPERD_SHIFT	16	tg3.h
28559	EEPROM_ADDR_ADDR_MASK	0x0000ffff	tg3.h
28560	EEPROM_ADDR_ADDR_SHIFT	0	tg3.h
28561	EEPROM_DEFAULT_CLOCK_PERIOD	0x60	tg3.h
28562	EEPROM_CHIP_SIZE	(64 * 1024)	tg3.h
28563	GRC_EEPROM_DATA	0x0000683c	tg3.h
28564	GRC_EEPROM_CTRL	0x00006840	tg3.h
28565	GRC_MDI_CTRL	0x00006844	tg3.h
28566	GRC_SEEPROM_DELAY	0x00006848	tg3.h
28567	NVRAM_CMD	0x00007000	tg3.h
28568	NVRAM_CMD_RESET	0x00000001	tg3.h
28569	NVRAM_CMD_DONE	0x00000008	tg3.h
28570	NVRAM_CMD_GO	0x00000010	tg3.h
28571	NVRAM_CMD_WR	0x00000020	tg3.h
28572	NVRAM_CMD_RD	0x00000000	tg3.h
28573	NVRAM_CMD_ERASE	0x00000040	tg3.h
28574	NVRAM_CMD_FIRST	0x00000080	tg3.h
28575	NVRAM_CMD_LAST	0x00000100	tg3.h
28576	NVRAM_STAT	0x00007004	tg3.h
28577	NVRAM_WRDATA	0x00007008	tg3.h
28578	NVRAM_ADDR	0x0000700c	tg3.h
28579	NVRAM_ADDR_MSK	0x00ffffff	tg3.h
28580	NVRAM_RDDATA	0x00007010	tg3.h
28581	NVRAM_CFG1	0x00007014	tg3.h
28582	NVRAM_CFG1_FLASHIF_ENAB	0x00000001	tg3.h
28583	NVRAM_CFG1_BUFFERED_MODE	0x00000002	tg3.h
28584	NVRAM_CFG1_PASS_THRU	0x00000004	tg3.h
28585	NVRAM_CFG1_BIT_BANG	0x00000008	tg3.h
28586	NVRAM_CFG1_COMPAT_BYPASS	0x80000000	tg3.h
28587	NVRAM_CFG2	0x00007018	tg3.h
28588	NVRAM_CFG3	0x0000701c	tg3.h
28589	NVRAM_SWARB	0x00007020	tg3.h
28590	SWARB_REQ_SET0	0x00000001	tg3.h
28591	SWARB_REQ_SET1	0x00000002	tg3.h
28592	SWARB_REQ_SET2	0x00000004	tg3.h
28593	SWARB_REQ_SET3	0x00000008	tg3.h
28594	SWARB_REQ_CLR0	0x00000010	tg3.h
28595	SWARB_REQ_CLR1	0x00000020	tg3.h
28596	SWARB_REQ_CLR2	0x00000040	tg3.h
28597	SWARB_REQ_CLR3	0x00000080	tg3.h
28598	SWARB_GNT0	0x00000100	tg3.h
28599	SWARB_GNT1	0x00000200	tg3.h
28600	SWARB_GNT2	0x00000400	tg3.h
28601	SWARB_GNT3	0x00000800	tg3.h
28602	SWARB_REQ0	0x00001000	tg3.h
28603	SWARB_REQ1	0x00002000	tg3.h
28604	SWARB_REQ2	0x00004000	tg3.h
28605	SWARB_REQ3	0x00008000	tg3.h
28606	NVRAM_BUFFERED_PAGE_SIZE	264	tg3.h
28607	NVRAM_BUFFERED_PAGE_POS	9	tg3.h
28608	NIC_SRAM_WIN_BASE	0x00008000	tg3.h
28609	NIC_SRAM_PAGE_ZERO	0x00000000	tg3.h
28610	NIC_SRAM_SEND_RCB	0x00000100	tg3.h	16 * TG3_BDINFO_...
28611	NIC_SRAM_RCV_RET_RCB	0x00000200	tg3.h	16 * TG3_BDINFO_...
28612	NIC_SRAM_STATS_BLK	0x00000300	tg3.h
28613	NIC_SRAM_STATUS_BLK	0x00000b00	tg3.h
28614	NIC_SRAM_FIRMWARE_MBOX	0x00000b50	tg3.h
28615	NIC_SRAM_FIRMWARE_MBOX_MAGIC1	0x4B657654	tg3.h
28616	NIC_SRAM_FIRMWARE_MBOX_MAGIC2	0x4861764b	tg3.h	!dma on linkchg
28617	NIC_SRAM_DATA_SIG	0x00000b54	tg3.h
28618	NIC_SRAM_DATA_SIG_MAGIC	0x4b657654	tg3.h	ascii for 'KevT'
28619	NIC_SRAM_DATA_CFG	0x00000b58	tg3.h
28620	NIC_SRAM_DATA_CFG_LED_MODE_MASK	0x0000000c	tg3.h
28621	NIC_SRAM_DATA_CFG_LED_MODE_UNKN	0x00000000	tg3.h
28622	NIC_SRAM_DATA_CFG_LED_TRIPLE_SP	0x00000004	tg3.h
28623	NIC_SRAM_DATA_CFG_LED_OPEN_DRAI	0x00000004	tg3.h
28624	NIC_SRAM_DATA_CFG_LED_LINK_SPD	0x00000008	tg3.h
28625	NIC_SRAM_DATA_CFG_LED_OUTPUT	0x00000008	tg3.h
28626	NIC_SRAM_DATA_CFG_PHY_TYPE_MASK	0x00000030	tg3.h
28627	NIC_SRAM_DATA_CFG_PHY_TYPE_UNKN	0x00000000	tg3.h
28628	NIC_SRAM_DATA_CFG_PHY_TYPE_COPP	0x00000010	tg3.h
28629	NIC_SRAM_DATA_CFG_PHY_TYPE_FIBE	0x00000020	tg3.h
28630	NIC_SRAM_DATA_CFG_WOL_ENABLE	0x00000040	tg3.h
28631	NIC_SRAM_DATA_CFG_ASF_ENABLE	0x00000080	tg3.h
28632	NIC_SRAM_DATA_CFG_EEPROM_WP	0x00000100	tg3.h
28633	NIC_SRAM_DATA_CFG_MINI_PCI	0x00001000	tg3.h
28634	NIC_SRAM_DATA_CFG_FIBER_WOL	0x00004000	tg3.h
28635	NIC_SRAM_DATA_PHY_ID	0x00000b74	tg3.h
28636	NIC_SRAM_DATA_PHY_ID1_MASK	0xffff0000	tg3.h
28637	NIC_SRAM_DATA_PHY_ID2_MASK	0x0000ffff	tg3.h
28638	NIC_SRAM_FW_CMD_MBOX	0x00000b78	tg3.h
28639	FWCMD_NICDRV_ALIVE	0x00000001	tg3.h
28640	FWCMD_NICDRV_PAUSE_FW	0x00000002	tg3.h
28641	FWCMD_NICDRV_IPV4ADDR_CHG	0x00000003	tg3.h
28642	FWCMD_NICDRV_IPV6ADDR_CHG	0x00000004	tg3.h
28643	FWCMD_NICDRV_FIX_DMAR	0x00000005	tg3.h
28644	FWCMD_NICDRV_FIX_DMAW	0x00000006	tg3.h
28645	NIC_SRAM_FW_CMD_LEN_MBOX	0x00000b7c	tg3.h
28646	NIC_SRAM_FW_CMD_DATA_MBOX	0x00000b80	tg3.h
28647	NIC_SRAM_FW_ASF_STATUS_MBOX	0x00000c00	tg3.h
28648	NIC_SRAM_FW_DRV_STATE_MBOX	0x00000c04	tg3.h
28649	DRV_STATE_START	0x00000001	tg3.h
28650	DRV_STATE_UNLOAD	0x00000002	tg3.h
28651	DRV_STATE_WOL	0x00000003	tg3.h
28652	DRV_STATE_SUSPEND	0x00000004	tg3.h
28653	NIC_SRAM_FW_RESET_TYPE_MBOX	0x00000c08	tg3.h
28654	NIC_SRAM_MAC_ADDR_HIGH_MBOX	0x00000c14	tg3.h
28655	NIC_SRAM_MAC_ADDR_LOW_MBOX	0x00000c18	tg3.h
28656	NIC_SRAM_RX_MINI_BUFFER_DESC	0x00001000	tg3.h
28657	NIC_SRAM_DMA_DESC_POOL_BASE	0x00002000	tg3.h
28658	NIC_SRAM_DMA_DESC_POOL_SIZE	0x00002000	tg3.h
28659	NIC_SRAM_TX_BUFFER_DESC	0x00004000	tg3.h	512 entries
28660	NIC_SRAM_RX_BUFFER_DESC	0x00006000	tg3.h	256 entries
28661	NIC_SRAM_RX_JUMBO_BUFFER_DESC	0x00007000	tg3.h	256 entries
28662	NIC_SRAM_MBUF_POOL_BASE	0x00008000	tg3.h
28663	NIC_SRAM_MBUF_POOL_SIZE96	0x00018000	tg3.h
28664	NIC_SRAM_MBUF_POOL_SIZE64	0x00010000	tg3.h
28665	NIC_SRAM_MBUF_POOL_BASE5705	0x00010000	tg3.h
28666	NIC_SRAM_MBUF_POOL_SIZE5705	0x0000e000	tg3.h
28667	PHY_ADDR	0x01	tg3.h
28668	TG3_BMCR_SPEED1000	0x0040	tg3.h
28669	MII_TG3_CTRL	0x09	tg3.h	1000-baseT control register
28670	MII_TG3_CTRL_ADV_1000_HALF	0x0100	tg3.h
28671	MII_TG3_CTRL_ADV_1000_FULL	0x0200	tg3.h
28672	MII_TG3_CTRL_AS_MASTER	0x0800	tg3.h
28673	MII_TG3_CTRL_ENABLE_AS_MASTER	0x1000	tg3.h
28674	MII_TG3_EXT_CTRL	0x10	tg3.h	Extended control register
28675	MII_TG3_EXT_CTRL_LNK3_LED_MODE	0x0002	tg3.h
28676	MII_TG3_EXT_CTRL_TBI	0x8000	tg3.h
28677	MII_TG3_EXT_STAT	0x11	tg3.h	Extended status register
28678	MII_TG3_EXT_STAT_LPASS	0x0100	tg3.h
28679	MII_TG3_DSP_RW_PORT	0x15	tg3.h	DSP coefficient read/write port
28680	MII_TG3_DSP_ADDRESS	0x17	tg3.h	DSP address register
28681	MII_TG3_AUX_CTRL	0x18	tg3.h	auxilliary control register
28682	MII_TG3_AUX_STAT	0x19	tg3.h	auxilliary status register
28683	MII_TG3_AUX_STAT_LPASS	0x0004	tg3.h
28684	MII_TG3_AUX_STAT_SPDMASK	0x0700	tg3.h
28685	MII_TG3_AUX_STAT_10HALF	0x0100	tg3.h
28686	MII_TG3_AUX_STAT_10FULL	0x0200	tg3.h
28687	MII_TG3_AUX_STAT_100HALF	0x0300	tg3.h
28688	MII_TG3_AUX_STAT_100_4	0x0400	tg3.h
28689	MII_TG3_AUX_STAT_100FULL	0x0500	tg3.h
28690	MII_TG3_AUX_STAT_1000HALF	0x0600	tg3.h
28691	MII_TG3_AUX_STAT_1000FULL	0x0700	tg3.h
28692	MII_TG3_ISTAT	0x1a	tg3.h	IRQ status register
28693	MII_TG3_IMASK	0x1b	tg3.h	IRQ mask register
28694	MII_TG3_INT_LINKCHG	0x0002	tg3.h
28695	MII_TG3_INT_SPEEDCHG	0x0004	tg3.h
28696	MII_TG3_INT_DUPLEXCHG	0x0008	tg3.h
28697	MII_TG3_INT_ANEG_PAGE_RX	0x0400	tg3.h
28698	ADVERTISE_PAUSE_CAP	0x0400	tg3.h
28699	ADVERTISE_PAUSE_ASYM	0x0800	tg3.h
28700	LPA_PAUSE_CAP	0x0400	tg3.h
28701	LPA_PAUSE_ASYM	0x0800	tg3.h
28702	TXD_ADDR	0x00UL	tg3.h	64-bit
28703	TXD_LEN_FLAGS	0x08UL	tg3.h	32-bit (upper 16-bits are len)
28704	TXD_VLAN_TAG	0x0cUL	tg3.h	32-bit (upper 16-bits are tag)
28705	TXD_SIZE	0x10UL	tg3.h
28706	TG3_HW_STATUS_SIZE	0x50	tg3.h
28707	FALSE	0	tlan.h
28708	TRUE	1	tlan.h
28709	TLAN_MIN_FRAME_SIZE	64	tlan.h
28710	TLAN_MAX_FRAME_SIZE	1600	tlan.h
28711	TLAN_NUM_RX_LISTS	4	tlan.h
28712	TLAN_NUM_TX_LISTS	2	tlan.h
28713	TLAN_IGNORE	0	tlan.h
28714	TLAN_RECORD	1	tlan.h
28715	TLAN_DEBUG_GNRL	0x0001	tlan.h
28716	TLAN_DEBUG_TX	0x0002	tlan.h
28717	TLAN_DEBUG_RX	0x0004	tlan.h
28718	TLAN_DEBUG_LIST	0x0008	tlan.h
28719	TLAN_DEBUG_PROBE	0x0010	tlan.h
28720	TX_TIMEOUT	(10*HZ)	tlan.h	We need time for auto-neg
28721	MAX_TLAN_BOARDS	8	tlan.h	Max number of boards installed at a time
28722	PCI_DEVICE_ID_NETELLIGENT_10_T2	0xB012	tlan.h
28723	PCI_DEVICE_ID_NETELLIGENT_10_10	0xB030	tlan.h
28724	PCI_DEVICE_ID_OLICOM_OC2183	0x0013	tlan.h
28725	PCI_DEVICE_ID_OLICOM_OC2325	0x0012	tlan.h
28726	PCI_DEVICE_ID_OLICOM_OC2326	0x0014	tlan.h
28727	TLAN_ADAPTER_NONE	0x00000000	tlan.h
28728	TLAN_ADAPTER_UNMANAGED_PHY	0x00000001	tlan.h
28729	TLAN_ADAPTER_BIT_RATE_PHY	0x00000002	tlan.h
28730	TLAN_ADAPTER_USE_INTERN_10	0x00000004	tlan.h
28731	TLAN_ADAPTER_ACTIVITY_LED	0x00000008	tlan.h
28732	TLAN_SPEED_DEFAULT	0	tlan.h
28733	TLAN_SPEED_10	10	tlan.h
28734	TLAN_SPEED_100	100	tlan.h
28735	TLAN_DUPLEX_DEFAULT	0	tlan.h
28736	TLAN_DUPLEX_HALF	1	tlan.h
28737	TLAN_DUPLEX_FULL	2	tlan.h
28738	EISA_ID	0xc80	tlan.h	EISA ID Registers
28739	EISA_ID0	0xc80	tlan.h	EISA ID Register 0
28740	EISA_ID1	0xc81	tlan.h	EISA ID Register 1
28741	EISA_ID2	0xc82	tlan.h	EISA ID Register 2
28742	EISA_ID3	0xc83	tlan.h	EISA ID Register 3
28743	EISA_CR	0xc84	tlan.h	EISA Control Register
28744	EISA_REG0	0xc88	tlan.h	EISA Configuration Register 0
28745	EISA_REG1	0xc89	tlan.h	EISA Configuration Register 1
28746	EISA_REG2	0xc8a	tlan.h	EISA Configuration Register 2
28747	EISA_REG3	0xc8f	tlan.h	EISA Configuration Register 3
28748	EISA_APROM	0xc90	tlan.h	Ethernet Address PROM
28749	TLAN_BUFFERS_PER_LIST	10	tlan.h
28750	TLAN_LAST_BUFFER	0x80000000	tlan.h
28751	TLAN_CSTAT_UNUSED	0x8000	tlan.h
28752	TLAN_CSTAT_FRM_CMP	0x4000	tlan.h
28753	TLAN_CSTAT_READY	0x3000	tlan.h
28754	TLAN_CSTAT_EOC	0x0800	tlan.h
28755	TLAN_CSTAT_RX_ERROR	0x0400	tlan.h
28756	TLAN_CSTAT_PASS_CRC	0x0200	tlan.h
28757	TLAN_CSTAT_DP_PR	0x0100	tlan.h
28758	TLAN_PHY_MAX_ADDR	0x1F	tlan.h
28759	TLAN_PHY_NONE	0x20	tlan.h
28760	TLAN_TIMER_LINK_BEAT	1	tlan.h
28761	TLAN_TIMER_ACTIVITY	2	tlan.h
28762	TLAN_TIMER_PHY_PDOWN	3	tlan.h
28763	TLAN_TIMER_PHY_PUP	4	tlan.h
28764	TLAN_TIMER_PHY_RESET	5	tlan.h
28765	TLAN_TIMER_PHY_START_LINK	6	tlan.h
28766	TLAN_TIMER_PHY_FINISH_AN	7	tlan.h
28767	TLAN_TIMER_FINISH_RESET	8	tlan.h
28768	TLAN_TIMER_ACT_DELAY	(HZ/10)	tlan.h
28769	TLAN_EEPROM_ACK	0	tlan.h
28770	TLAN_EEPROM_STOP	1	tlan.h
28771	TLAN_HOST_CMD	0x00	tlan.h
28772	TLAN_HC_GO	0x80000000	tlan.h
28773	TLAN_HC_STOP	0x40000000	tlan.h
28774	TLAN_HC_ACK	0x20000000	tlan.h
28775	TLAN_HC_CS_MASK	0x1FE00000	tlan.h
28776	TLAN_HC_EOC	0x00100000	tlan.h
28777	TLAN_HC_RT	0x00080000	tlan.h
28778	TLAN_HC_NES	0x00040000	tlan.h
28779	TLAN_HC_AD_RST	0x00008000	tlan.h
28780	TLAN_HC_LD_TMR	0x00004000	tlan.h
28781	TLAN_HC_LD_THR	0x00002000	tlan.h
28782	TLAN_HC_REQ_INT	0x00001000	tlan.h
28783	TLAN_HC_INT_OFF	0x00000800	tlan.h
28784	TLAN_HC_INT_ON	0x00000400	tlan.h
28785	TLAN_HC_AC_MASK	0x000000FF	tlan.h
28786	TLAN_CH_PARM	0x04	tlan.h
28787	TLAN_DIO_ADR	0x08	tlan.h
28788	TLAN_DA_ADR_INC	0x8000	tlan.h
28789	TLAN_DA_RAM_ADR	0x4000	tlan.h
28790	TLAN_HOST_INT	0x0A	tlan.h
28791	TLAN_HI_IV_MASK	0x1FE0	tlan.h
28792	TLAN_HI_IT_MASK	0x001C	tlan.h
28793	TLAN_DIO_DATA	0x0C	tlan.h
28794	TLAN_NET_CMD	0x00	tlan.h
28795	TLAN_NET_CMD_NRESET	0x80	tlan.h
28796	TLAN_NET_CMD_NWRAP	0x40	tlan.h
28797	TLAN_NET_CMD_CSF	0x20	tlan.h
28798	TLAN_NET_CMD_CAF	0x10	tlan.h
28799	TLAN_NET_CMD_NOBRX	0x08	tlan.h
28800	TLAN_NET_CMD_DUPLEX	0x04	tlan.h
28801	TLAN_NET_CMD_TRFRAM	0x02	tlan.h
28802	TLAN_NET_CMD_TXPACE	0x01	tlan.h
28803	TLAN_NET_SIO	0x01	tlan.h
28804	TLAN_NET_SIO_MINTEN	0x80	tlan.h
28805	TLAN_NET_SIO_ECLOK	0x40	tlan.h
28806	TLAN_NET_SIO_ETXEN	0x20	tlan.h
28807	TLAN_NET_SIO_EDATA	0x10	tlan.h
28808	TLAN_NET_SIO_NMRST	0x08	tlan.h
28809	TLAN_NET_SIO_MCLK	0x04	tlan.h
28810	TLAN_NET_SIO_MTXEN	0x02	tlan.h
28811	TLAN_NET_SIO_MDATA	0x01	tlan.h
28812	TLAN_NET_STS	0x02	tlan.h
28813	TLAN_NET_STS_MIRQ	0x80	tlan.h
28814	TLAN_NET_STS_HBEAT	0x40	tlan.h
28815	TLAN_NET_STS_TXSTOP	0x20	tlan.h
28816	TLAN_NET_STS_RXSTOP	0x10	tlan.h
28817	TLAN_NET_STS_RSRVD	0x0F	tlan.h
28818	TLAN_NET_MASK	0x03	tlan.h
28819	TLAN_NET_MASK_MASK7	0x80	tlan.h
28820	TLAN_NET_MASK_MASK6	0x40	tlan.h
28821	TLAN_NET_MASK_MASK5	0x20	tlan.h
28822	TLAN_NET_MASK_MASK4	0x10	tlan.h
28823	TLAN_NET_MASK_RSRVD	0x0F	tlan.h
28824	TLAN_NET_CONFIG	0x04	tlan.h
28825	TLAN_NET_CFG_RCLK	0x8000	tlan.h
28826	TLAN_NET_CFG_TCLK	0x4000	tlan.h
28827	TLAN_NET_CFG_BIT	0x2000	tlan.h
28828	TLAN_NET_CFG_RXCRC	0x1000	tlan.h
28829	TLAN_NET_CFG_PEF	0x0800	tlan.h
28830	TLAN_NET_CFG_1FRAG	0x0400	tlan.h
28831	TLAN_NET_CFG_1CHAN	0x0200	tlan.h
28832	TLAN_NET_CFG_MTEST	0x0100	tlan.h
28833	TLAN_NET_CFG_PHY_EN	0x0080	tlan.h
28834	TLAN_NET_CFG_MSMASK	0x007F	tlan.h
28835	TLAN_MAN_TEST	0x06	tlan.h
28836	TLAN_DEF_VENDOR_ID	0x08	tlan.h
28837	TLAN_DEF_DEVICE_ID	0x0A	tlan.h
28838	TLAN_DEF_REVISION	0x0C	tlan.h
28839	TLAN_DEF_SUBCLASS	0x0D	tlan.h
28840	TLAN_DEF_MIN_LAT	0x0E	tlan.h
28841	TLAN_DEF_MAX_LAT	0x0F	tlan.h
28842	TLAN_AREG_0	0x10	tlan.h
28843	TLAN_AREG_1	0x16	tlan.h
28844	TLAN_AREG_2	0x1C	tlan.h
28845	TLAN_AREG_3	0x22	tlan.h
28846	TLAN_HASH_1	0x28	tlan.h
28847	TLAN_HASH_2	0x2C	tlan.h
28848	TLAN_GOOD_TX_FRMS	0x30	tlan.h
28849	TLAN_TX_UNDERUNS	0x33	tlan.h
28850	TLAN_GOOD_RX_FRMS	0x34	tlan.h
28851	TLAN_RX_OVERRUNS	0x37	tlan.h
28852	TLAN_DEFERRED_TX	0x38	tlan.h
28853	TLAN_CRC_ERRORS	0x3A	tlan.h
28854	TLAN_CODE_ERRORS	0x3B	tlan.h
28855	TLAN_MULTICOL_FRMS	0x3C	tlan.h
28856	TLAN_SINGLECOL_FRMS	0x3E	tlan.h
28857	TLAN_EXCESSCOL_FRMS	0x40	tlan.h
28858	TLAN_LATE_COLS	0x41	tlan.h
28859	TLAN_CARRIER_LOSS	0x42	tlan.h
28860	TLAN_ACOMMIT	0x43	tlan.h
28861	TLAN_LED_REG	0x44	tlan.h
28862	TLAN_LED_ACT	0x10	tlan.h
28863	TLAN_LED_LINK	0x01	tlan.h
28864	TLAN_BSIZE_REG	0x45	tlan.h
28865	TLAN_MAX_RX	0x46	tlan.h
28866	TLAN_INT_DIS	0x48	tlan.h
28867	TLAN_ID_TX_EOC	0x04	tlan.h
28868	TLAN_ID_RX_EOF	0x02	tlan.h
28869	TLAN_ID_RX_EOC	0x01	tlan.h
28870	TLAN_INT_NUMBER_OF_INTS	8	tlan.h
28871	TLAN_INT_NONE	0x0000	tlan.h
28872	TLAN_INT_TX_EOF	0x0001	tlan.h
28873	TLAN_INT_STAT_OVERFLOW	0x0002	tlan.h
28874	TLAN_INT_RX_EOF	0x0003	tlan.h
28875	TLAN_INT_DUMMY	0x0004	tlan.h
28876	TLAN_INT_TX_EOC	0x0005	tlan.h
28877	TLAN_INT_STATUS_CHECK	0x0006	tlan.h
28878	TLAN_INT_RX_EOC	0x0007	tlan.h
28879	MII_GEN_CTL	0x00	tlan.h
28880	MII_GC_RESET	0x8000	tlan.h
28881	MII_GC_LOOPBK	0x4000	tlan.h
28882	MII_GC_SPEEDSEL	0x2000	tlan.h
28883	MII_GC_AUTOENB	0x1000	tlan.h
28884	MII_GC_PDOWN	0x0800	tlan.h
28885	MII_GC_ISOLATE	0x0400	tlan.h
28886	MII_GC_AUTORSRT	0x0200	tlan.h
28887	MII_GC_DUPLEX	0x0100	tlan.h
28888	MII_GC_COLTEST	0x0080	tlan.h
28889	MII_GC_RESERVED	0x007F	tlan.h
28890	MII_GEN_STS	0x01	tlan.h
28891	MII_GS_100BT4	0x8000	tlan.h
28892	MII_GS_100BTXFD	0x4000	tlan.h
28893	MII_GS_100BTXHD	0x2000	tlan.h
28894	MII_GS_10BTFD	0x1000	tlan.h
28895	MII_GS_10BTHD	0x0800	tlan.h
28896	MII_GS_RESERVED	0x07C0	tlan.h
28897	MII_GS_AUTOCMPLT	0x0020	tlan.h
28898	MII_GS_RFLT	0x0010	tlan.h
28899	MII_GS_AUTONEG	0x0008	tlan.h
28900	MII_GS_LINK	0x0004	tlan.h
28901	MII_GS_JABBER	0x0002	tlan.h
28902	MII_GS_EXTCAP	0x0001	tlan.h
28903	MII_GEN_ID_HI	0x02	tlan.h
28904	MII_GEN_ID_LO	0x03	tlan.h
28905	MII_GIL_OUI	0xFC00	tlan.h
28906	MII_GIL_MODEL	0x03F0	tlan.h
28907	MII_GIL_REVISION	0x000F	tlan.h
28908	MII_AN_ADV	0x04	tlan.h
28909	MII_AN_LPA	0x05	tlan.h
28910	MII_AN_EXP	0x06	tlan.h
28911	TLAN_TLPHY_ID	0x10	tlan.h
28912	TLAN_TLPHY_CTL	0x11	tlan.h
28913	TLAN_TC_IGLINK	0x8000	tlan.h
28914	TLAN_TC_SWAPOL	0x4000	tlan.h
28915	TLAN_TC_AUISEL	0x2000	tlan.h
28916	TLAN_TC_SQEEN	0x1000	tlan.h
28917	TLAN_TC_MTEST	0x0800	tlan.h
28918	TLAN_TC_RESERVED	0x07F8	tlan.h
28919	TLAN_TC_NFEW	0x0004	tlan.h
28920	TLAN_TC_INTEN	0x0002	tlan.h
28921	TLAN_TC_TINT	0x0001	tlan.h
28922	TLAN_TLPHY_STS	0x12	tlan.h
28923	TLAN_TS_MINT	0x8000	tlan.h
28924	TLAN_TS_PHOK	0x4000	tlan.h
28925	TLAN_TS_POLOK	0x2000	tlan.h
28926	TLAN_TS_TPENERGY	0x1000	tlan.h
28927	TLAN_TS_RESERVED	0x0FFF	tlan.h
28928	TLAN_TLPHY_PAR	0x19	tlan.h
28929	TLAN_PHY_CIM_STAT	0x0020	tlan.h
28930	TLAN_PHY_SPEED_100	0x0040	tlan.h
28931	TLAN_PHY_DUPLEX_FULL	0x0080	tlan.h
28932	TLAN_PHY_AN_EN_STAT	0x0400	tlan.h
28933	NAT_SEM_ID1	0x2000	tlan.h
28934	NAT_SEM_ID2	0x5C01	tlan.h
28935	LEVEL1_ID1	0x7810	tlan.h
28936	LEVEL1_ID2	0x0000	tlan.h
28937	VELOCITY_NAME	"via-velocity"	via-velocity.h
28938	VELOCITY_FULL_DRV_NAM	"VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"	via-velocity.h
28939	VELOCITY_VERSION	"1.13"	via-velocity.h
28940	PKT_BUF_SZ	1564	via-velocity.h
28941	MAX_UNITS	8	via-velocity.h
28942	OPTION_DEFAULT	{ [0 ... MAX_UNITS-1] = -1}	via-velocity.h
28943	REV_ID_VT6110	(0)	via-velocity.h
28944	B_OWNED_BY_CHIP	1	via-velocity.h
28945	B_OWNED_BY_HOST	0	via-velocity.h
28946	RSR_DETAG	0x0080	via-velocity.h
28947	RSR_SNTAG	0x0040	via-velocity.h
28948	RSR_RXER	0x0020	via-velocity.h
28949	RSR_RL	0x0010	via-velocity.h
28950	RSR_CE	0x0008	via-velocity.h
28951	RSR_FAE	0x0004	via-velocity.h
28952	RSR_CRC	0x0002	via-velocity.h
28953	RSR_VIDM	0x0001	via-velocity.h
28954	RSR_RXOK	0x8000	via-velocity.h	rx OK
28955	RSR_PFT	0x4000	via-velocity.h	Perfect filtering address match
28956	RSR_MAR	0x2000	via-velocity.h	MAC accept multicast address packet
28957	RSR_BAR	0x1000	via-velocity.h	MAC accept broadcast address packet
28958	RSR_PHY	0x0800	via-velocity.h	MAC accept physical address packet
28959	RSR_VTAG	0x0400	via-velocity.h	802.1p/1q tagging packet indicator
28960	RSR_STP	0x0200	via-velocity.h	start of packet
28961	RSR_EDP	0x0100	via-velocity.h	end of packet
28962	RSR1_RXOK	0x80	via-velocity.h	rx OK
28963	RSR1_PFT	0x40	via-velocity.h	Perfect filtering address match
28964	RSR1_MAR	0x20	via-velocity.h	MAC accept multicast address packet
28965	RSR1_BAR	0x10	via-velocity.h	MAC accept broadcast address packet
28966	RSR1_PHY	0x08	via-velocity.h	MAC accept physical address packet
28967	RSR1_VTAG	0x04	via-velocity.h	802.1p/1q tagging packet indicator
28968	RSR1_STP	0x02	via-velocity.h	start of packet
28969	RSR1_EDP	0x01	via-velocity.h	end of packet
28970	CSM_IPOK	0x40	via-velocity.h	IP Checkusm validatiaon ok
28971	CSM_TUPOK	0x20	via-velocity.h	TCP/UDP Checkusm validatiaon ok
28972	CSM_FRAG	0x10	via-velocity.h	Fragment IP datagram
28973	CSM_IPKT	0x04	via-velocity.h	Received an IP packet
28974	CSM_TCPKT	0x02	via-velocity.h	Received a TCP packet
28975	CSM_UDPKT	0x01	via-velocity.h	Received a UDP packet
28976	TSR0_ABT	0x0080	via-velocity.h	Tx abort because of excessive collision
28977	TSR0_OWT	0x0040	via-velocity.h	Jumbo frame Tx abort
28978	TSR0_OWC	0x0020	via-velocity.h	Out of window collision
28979	TSR0_COLS	0x0010	via-velocity.h	experience collision in this transmit event
28980	TSR0_NCR3	0x0008	via-velocity.h	collision retry counter[3]
28981	TSR0_NCR2	0x0004	via-velocity.h	collision retry counter[2]
28982	TSR0_NCR1	0x0002	via-velocity.h	collision retry counter[1]
28983	TSR0_NCR0	0x0001	via-velocity.h	collision retry counter[0]
28984	TSR0_TERR	0x8000	via-velocity.h
28985	TSR0_FDX	0x4000	via-velocity.h	current transaction is serviced by full duplex mode
28986	TSR0_GMII	0x2000	via-velocity.h	current transaction is serviced by GMII mode
28987	TSR0_LNKFL	0x1000	via-velocity.h	packet serviced during link down
28988	TSR0_SHDN	0x0400	via-velocity.h	shutdown case
28989	TSR0_CRS	0x0200	via-velocity.h	carrier sense lost
28990	TSR0_CDH	0x0100	via-velocity.h	AQE test fail (CD heartbeat)
28991	TSR1_TERR	0x80	via-velocity.h
28992	TSR1_FDX	0x40	via-velocity.h	current transaction is serviced by full duplex mode
28993	TSR1_GMII	0x20	via-velocity.h	current transaction is serviced by GMII mode
28994	TSR1_LNKFL	0x10	via-velocity.h	packet serviced during link down
28995	TSR1_SHDN	0x04	via-velocity.h	shutdown case
28996	TSR1_CRS	0x02	via-velocity.h	carrier sense lost
28997	TSR1_CDH	0x01	via-velocity.h	AQE test fail (CD heartbeat)
28998	TCR0_TIC	0x80	via-velocity.h	assert interrupt immediately while descriptor has been send complete
28999	TCR0_PIC	0x40	via-velocity.h	priority interrupt request, INA# is issued over adaptive interrupt scheme
29000	TCR0_VETAG	0x20	via-velocity.h	enable VLAN tag
29001	TCR0_IPCK	0x10	via-velocity.h	request IP checksum calculation.
29002	TCR0_UDPCK	0x08	via-velocity.h	request UDP checksum calculation.
29003	TCR0_TCPCK	0x04	via-velocity.h	request TCP checksum calculation.
29004	TCR0_JMBO	0x02	via-velocity.h	indicate a jumbo packet in GMAC side
29005	TCR0_CRC	0x01	via-velocity.h	disable CRC generation
29006	TCPLS_NORMAL	3	via-velocity.h
29007	TCPLS_START	2	via-velocity.h
29008	TCPLS_END	1	via-velocity.h
29009	TCPLS_MED	0	via-velocity.h
29010	CB_RX_BUF_SIZE	2048UL	via-velocity.h	max buffer size
29011	CB_MAX_RD_NUM	512	via-velocity.h	MAX # of RD
29012	CB_MAX_TD_NUM	256	via-velocity.h	MAX # of TD
29013	CB_INIT_RD_NUM_3119	128	via-velocity.h	init # of RD, for setup VT3119
29014	CB_INIT_TD_NUM_3119	64	via-velocity.h	init # of TD, for setup VT3119
29015	CB_INIT_RD_NUM	128	via-velocity.h	init # of RD, for setup default
29016	CB_INIT_TD_NUM	64	via-velocity.h	init # of TD, for setup default
29017	CB_TD_RING_NUM	4	via-velocity.h	# of TD rings.
29018	CB_MAX_SEG_PER_PKT	7	via-velocity.h	max data seg per packet (Tx)
29019	CB_MAX_TX_ABORT_RETRY	3	via-velocity.h
29020	MCAM_SIZE	64	via-velocity.h
29021	VCAM_SIZE	64	via-velocity.h
29022	TX_QUEUE_NO	4	via-velocity.h
29023	MAX_HW_MIB_COUNTER	32	via-velocity.h
29024	VELOCITY_MIN_MTU	(1514-14)	via-velocity.h
29025	VELOCITY_MAX_MTU	(9000)	via-velocity.h
29026	MAC_REG_PAR	0x00	via-velocity.h	physical address
29027	MAC_REG_RCR	0x06	via-velocity.h
29028	MAC_REG_TCR	0x07	via-velocity.h
29029	MAC_REG_CR0_SET	0x08	via-velocity.h
29030	MAC_REG_CR1_SET	0x09	via-velocity.h
29031	MAC_REG_CR2_SET	0x0A	via-velocity.h
29032	MAC_REG_CR3_SET	0x0B	via-velocity.h
29033	MAC_REG_CR0_CLR	0x0C	via-velocity.h
29034	MAC_REG_CR1_CLR	0x0D	via-velocity.h
29035	MAC_REG_CR2_CLR	0x0E	via-velocity.h
29036	MAC_REG_CR3_CLR	0x0F	via-velocity.h
29037	MAC_REG_MAR	0x10	via-velocity.h
29038	MAC_REG_CAM	0x10	via-velocity.h
29039	MAC_REG_DEC_BASE_HI	0x18	via-velocity.h
29040	MAC_REG_DBF_BASE_HI	0x1C	via-velocity.h
29041	MAC_REG_ISR_CTL	0x20	via-velocity.h
29042	MAC_REG_ISR_HOTMR	0x20	via-velocity.h
29043	MAC_REG_ISR_TSUPTHR	0x20	via-velocity.h
29044	MAC_REG_ISR_RSUPTHR	0x20	via-velocity.h
29045	MAC_REG_ISR_CTL1	0x21	via-velocity.h
29046	MAC_REG_TXE_SR	0x22	via-velocity.h
29047	MAC_REG_RXE_SR	0x23	via-velocity.h
29048	MAC_REG_ISR	0x24	via-velocity.h
29049	MAC_REG_ISR0	0x24	via-velocity.h
29050	MAC_REG_ISR1	0x25	via-velocity.h
29051	MAC_REG_ISR2	0x26	via-velocity.h
29052	MAC_REG_ISR3	0x27	via-velocity.h
29053	MAC_REG_IMR	0x28	via-velocity.h
29054	MAC_REG_IMR0	0x28	via-velocity.h
29055	MAC_REG_IMR1	0x29	via-velocity.h
29056	MAC_REG_IMR2	0x2A	via-velocity.h
29057	MAC_REG_IMR3	0x2B	via-velocity.h
29058	MAC_REG_TDCSR_SET	0x30	via-velocity.h
29059	MAC_REG_RDCSR_SET	0x32	via-velocity.h
29060	MAC_REG_TDCSR_CLR	0x34	via-velocity.h
29061	MAC_REG_RDCSR_CLR	0x36	via-velocity.h
29062	MAC_REG_RDBASE_LO	0x38	via-velocity.h
29063	MAC_REG_RDINDX	0x3C	via-velocity.h
29064	MAC_REG_TDBASE_LO	0x40	via-velocity.h
29065	MAC_REG_RDCSIZE	0x50	via-velocity.h
29066	MAC_REG_TDCSIZE	0x52	via-velocity.h
29067	MAC_REG_TDINDX	0x54	via-velocity.h
29068	MAC_REG_TDIDX0	0x54	via-velocity.h
29069	MAC_REG_TDIDX1	0x56	via-velocity.h
29070	MAC_REG_TDIDX2	0x58	via-velocity.h
29071	MAC_REG_TDIDX3	0x5A	via-velocity.h
29072	MAC_REG_PAUSE_TIMER	0x5C	via-velocity.h
29073	MAC_REG_RBRDU	0x5E	via-velocity.h
29074	MAC_REG_FIFO_TEST0	0x60	via-velocity.h
29075	MAC_REG_FIFO_TEST1	0x64	via-velocity.h
29076	MAC_REG_CAMADDR	0x68	via-velocity.h
29077	MAC_REG_CAMCR	0x69	via-velocity.h
29078	MAC_REG_GFTEST	0x6A	via-velocity.h
29079	MAC_REG_FTSTCMD	0x6B	via-velocity.h
29080	MAC_REG_MIICFG	0x6C	via-velocity.h
29081	MAC_REG_MIISR	0x6D	via-velocity.h
29082	MAC_REG_PHYSR0	0x6E	via-velocity.h
29083	MAC_REG_PHYSR1	0x6F	via-velocity.h
29084	MAC_REG_MIICR	0x70	via-velocity.h
29085	MAC_REG_MIIADR	0x71	via-velocity.h
29086	MAC_REG_MIIDATA	0x72	via-velocity.h
29087	MAC_REG_SOFT_TIMER0	0x74	via-velocity.h
29088	MAC_REG_SOFT_TIMER1	0x76	via-velocity.h
29089	MAC_REG_CFGA	0x78	via-velocity.h
29090	MAC_REG_CFGB	0x79	via-velocity.h
29091	MAC_REG_CFGC	0x7A	via-velocity.h
29092	MAC_REG_CFGD	0x7B	via-velocity.h
29093	MAC_REG_DCFG0	0x7C	via-velocity.h
29094	MAC_REG_DCFG1	0x7D	via-velocity.h
29095	MAC_REG_MCFG0	0x7E	via-velocity.h
29096	MAC_REG_MCFG1	0x7F	via-velocity.h
29097	MAC_REG_TBIST	0x80	via-velocity.h
29098	MAC_REG_RBIST	0x81	via-velocity.h
29099	MAC_REG_PMCC	0x82	via-velocity.h
29100	MAC_REG_STICKHW	0x83	via-velocity.h
29101	MAC_REG_MIBCR	0x84	via-velocity.h
29102	MAC_REG_EERSV	0x85	via-velocity.h
29103	MAC_REG_REVID	0x86	via-velocity.h
29104	MAC_REG_MIBREAD	0x88	via-velocity.h
29105	MAC_REG_BPMA	0x8C	via-velocity.h
29106	MAC_REG_EEWR_DATA	0x8C	via-velocity.h
29107	MAC_REG_BPMD_WR	0x8F	via-velocity.h
29108	MAC_REG_BPCMD	0x90	via-velocity.h
29109	MAC_REG_BPMD_RD	0x91	via-velocity.h
29110	MAC_REG_EECHKSUM	0x92	via-velocity.h
29111	MAC_REG_EECSR	0x93	via-velocity.h
29112	MAC_REG_EERD_DATA	0x94	via-velocity.h
29113	MAC_REG_EADDR	0x96	via-velocity.h
29114	MAC_REG_EMBCMD	0x97	via-velocity.h
29115	MAC_REG_JMPSR0	0x98	via-velocity.h
29116	MAC_REG_JMPSR1	0x99	via-velocity.h
29117	MAC_REG_JMPSR2	0x9A	via-velocity.h
29118	MAC_REG_JMPSR3	0x9B	via-velocity.h
29119	MAC_REG_CHIPGSR	0x9C	via-velocity.h
29120	MAC_REG_TESTCFG	0x9D	via-velocity.h
29121	MAC_REG_DEBUG	0x9E	via-velocity.h
29122	MAC_REG_CHIPGCR	0x9F	via-velocity.h
29123	MAC_REG_WOLCR0_SET	0xA0	via-velocity.h
29124	MAC_REG_WOLCR1_SET	0xA1	via-velocity.h
29125	MAC_REG_PWCFG_SET	0xA2	via-velocity.h
29126	MAC_REG_WOLCFG_SET	0xA3	via-velocity.h
29127	MAC_REG_WOLCR0_CLR	0xA4	via-velocity.h
29128	MAC_REG_WOLCR1_CLR	0xA5	via-velocity.h
29129	MAC_REG_PWCFG_CLR	0xA6	via-velocity.h
29130	MAC_REG_WOLCFG_CLR	0xA7	via-velocity.h
29131	MAC_REG_WOLSR0_SET	0xA8	via-velocity.h
29132	MAC_REG_WOLSR1_SET	0xA9	via-velocity.h
29133	MAC_REG_WOLSR0_CLR	0xAC	via-velocity.h
29134	MAC_REG_WOLSR1_CLR	0xAD	via-velocity.h
29135	MAC_REG_PATRN_CRC0	0xB0	via-velocity.h
29136	MAC_REG_PATRN_CRC1	0xB2	via-velocity.h
29137	MAC_REG_PATRN_CRC2	0xB4	via-velocity.h
29138	MAC_REG_PATRN_CRC3	0xB6	via-velocity.h
29139	MAC_REG_PATRN_CRC4	0xB8	via-velocity.h
29140	MAC_REG_PATRN_CRC5	0xBA	via-velocity.h
29141	MAC_REG_PATRN_CRC6	0xBC	via-velocity.h
29142	MAC_REG_PATRN_CRC7	0xBE	via-velocity.h
29143	MAC_REG_BYTEMSK0_0	0xC0	via-velocity.h
29144	MAC_REG_BYTEMSK0_1	0xC4	via-velocity.h
29145	MAC_REG_BYTEMSK0_2	0xC8	via-velocity.h
29146	MAC_REG_BYTEMSK0_3	0xCC	via-velocity.h
29147	MAC_REG_BYTEMSK1_0	0xD0	via-velocity.h
29148	MAC_REG_BYTEMSK1_1	0xD4	via-velocity.h
29149	MAC_REG_BYTEMSK1_2	0xD8	via-velocity.h
29150	MAC_REG_BYTEMSK1_3	0xDC	via-velocity.h
29151	MAC_REG_BYTEMSK2_0	0xE0	via-velocity.h
29152	MAC_REG_BYTEMSK2_1	0xE4	via-velocity.h
29153	MAC_REG_BYTEMSK2_2	0xE8	via-velocity.h
29154	MAC_REG_BYTEMSK2_3	0xEC	via-velocity.h
29155	MAC_REG_BYTEMSK3_0	0xF0	via-velocity.h
29156	MAC_REG_BYTEMSK3_1	0xF4	via-velocity.h
29157	MAC_REG_BYTEMSK3_2	0xF8	via-velocity.h
29158	MAC_REG_BYTEMSK3_3	0xFC	via-velocity.h
29159	RCR_AS	0x80	via-velocity.h
29160	RCR_AP	0x40	via-velocity.h
29161	RCR_AL	0x20	via-velocity.h
29162	RCR_PROM	0x10	via-velocity.h
29163	RCR_AB	0x08	via-velocity.h
29164	RCR_AM	0x04	via-velocity.h
29165	RCR_AR	0x02	via-velocity.h
29166	RCR_SEP	0x01	via-velocity.h
29167	TCR_TB2BDIS	0x80	via-velocity.h
29168	TCR_COLTMC1	0x08	via-velocity.h
29169	TCR_COLTMC0	0x04	via-velocity.h
29170	TCR_LB1	0x02	via-velocity.h	loopback[1]
29171	TCR_LB0	0x01	via-velocity.h	loopback[0]
29172	CR0_TXON	0x00000008UL	via-velocity.h
29173	CR0_RXON	0x00000004UL	via-velocity.h
29174	CR0_STOP	0x00000002UL	via-velocity.h	stop MAC, default = 1
29175	CR0_STRT	0x00000001UL	via-velocity.h	start MAC
29176	CR0_SFRST	0x00008000UL	via-velocity.h	software reset
29177	CR0_TM1EN	0x00004000UL	via-velocity.h
29178	CR0_TM0EN	0x00002000UL	via-velocity.h
29179	CR0_DPOLL	0x00000800UL	via-velocity.h	disable rx/tx auto polling
29180	CR0_DISAU	0x00000100UL	via-velocity.h
29181	CR0_XONEN	0x00800000UL	via-velocity.h
29182	CR0_FDXTFCEN	0x00400000UL	via-velocity.h	full-duplex TX flow control enable
29183	CR0_FDXRFCEN	0x00200000UL	via-velocity.h	full-duplex RX flow control enable
29184	CR0_HDXFCEN	0x00100000UL	via-velocity.h	half-duplex flow control enable
29185	CR0_XHITH1	0x00080000UL	via-velocity.h	TX XON high threshold 1
29186	CR0_XHITH0	0x00040000UL	via-velocity.h	TX XON high threshold 0
29187	CR0_XLTH1	0x00020000UL	via-velocity.h	TX pause frame low threshold 1
29188	CR0_XLTH0	0x00010000UL	via-velocity.h	TX pause frame low threshold 0
29189	CR0_GSPRST	0x80000000UL	via-velocity.h
29190	CR0_FORSRST	0x40000000UL	via-velocity.h
29191	CR0_FPHYRST	0x20000000UL	via-velocity.h
29192	CR0_DIAG	0x10000000UL	via-velocity.h
29193	CR0_INTPCTL	0x04000000UL	via-velocity.h
29194	CR0_GINTMSK1	0x02000000UL	via-velocity.h
29195	CR0_GINTMSK0	0x01000000UL	via-velocity.h
29196	CR1_SFRST	0x80	via-velocity.h	software reset
29197	CR1_TM1EN	0x40	via-velocity.h
29198	CR1_TM0EN	0x20	via-velocity.h
29199	CR1_DPOLL	0x08	via-velocity.h	disable rx/tx auto polling
29200	CR1_DISAU	0x01	via-velocity.h
29201	CR2_XONEN	0x80	via-velocity.h
29202	CR2_FDXTFCEN	0x40	via-velocity.h	full-duplex TX flow control enable
29203	CR2_FDXRFCEN	0x20	via-velocity.h	full-duplex RX flow control enable
29204	CR2_HDXFCEN	0x10	via-velocity.h	half-duplex flow control enable
29205	CR2_XHITH1	0x08	via-velocity.h	TX XON high threshold 1
29206	CR2_XHITH0	0x04	via-velocity.h	TX XON high threshold 0
29207	CR2_XLTH1	0x02	via-velocity.h	TX pause frame low threshold 1
29208	CR2_XLTH0	0x01	via-velocity.h	TX pause frame low threshold 0
29209	CR3_GSPRST	0x80	via-velocity.h
29210	CR3_FORSRST	0x40	via-velocity.h
29211	CR3_FPHYRST	0x20	via-velocity.h
29212	CR3_DIAG	0x10	via-velocity.h
29213	CR3_INTPCTL	0x04	via-velocity.h
29214	CR3_GINTMSK1	0x02	via-velocity.h
29215	CR3_GINTMSK0	0x01	via-velocity.h
29216	ISRCTL_UDPINT	0x8000	via-velocity.h
29217	ISRCTL_TSUPDIS	0x4000	via-velocity.h
29218	ISRCTL_RSUPDIS	0x2000	via-velocity.h
29219	ISRCTL_PMSK1	0x1000	via-velocity.h
29220	ISRCTL_PMSK0	0x0800	via-velocity.h
29221	ISRCTL_INTPD	0x0400	via-velocity.h
29222	ISRCTL_HCRLD	0x0200	via-velocity.h
29223	ISRCTL_SCRLD	0x0100	via-velocity.h
29224	ISRCTL1_UDPINT	0x80	via-velocity.h
29225	ISRCTL1_TSUPDIS	0x40	via-velocity.h
29226	ISRCTL1_RSUPDIS	0x20	via-velocity.h
29227	ISRCTL1_PMSK1	0x10	via-velocity.h
29228	ISRCTL1_PMSK0	0x08	via-velocity.h
29229	ISRCTL1_INTPD	0x04	via-velocity.h
29230	ISRCTL1_HCRLD	0x02	via-velocity.h
29231	ISRCTL1_SCRLD	0x01	via-velocity.h
29232	TXESR_TFDBS	0x08	via-velocity.h
29233	TXESR_TDWBS	0x04	via-velocity.h
29234	TXESR_TDRBS	0x02	via-velocity.h
29235	TXESR_TDSTR	0x01	via-velocity.h
29236	RXESR_RFDBS	0x08	via-velocity.h
29237	RXESR_RDWBS	0x04	via-velocity.h
29238	RXESR_RDRBS	0x02	via-velocity.h
29239	RXESR_RDSTR	0x01	via-velocity.h
29240	ISR_ISR3	0x80000000UL	via-velocity.h
29241	ISR_ISR2	0x40000000UL	via-velocity.h
29242	ISR_ISR1	0x20000000UL	via-velocity.h
29243	ISR_ISR0	0x10000000UL	via-velocity.h
29244	ISR_TXSTLI	0x02000000UL	via-velocity.h
29245	ISR_RXSTLI	0x01000000UL	via-velocity.h
29246	ISR_HFLD	0x00800000UL	via-velocity.h
29247	ISR_UDPI	0x00400000UL	via-velocity.h
29248	ISR_MIBFI	0x00200000UL	via-velocity.h
29249	ISR_SHDNI	0x00100000UL	via-velocity.h
29250	ISR_PHYI	0x00080000UL	via-velocity.h
29251	ISR_PWEI	0x00040000UL	via-velocity.h
29252	ISR_TMR1I	0x00020000UL	via-velocity.h
29253	ISR_TMR0I	0x00010000UL	via-velocity.h
29254	ISR_SRCI	0x00008000UL	via-velocity.h
29255	ISR_LSTPEI	0x00004000UL	via-velocity.h
29256	ISR_LSTEI	0x00002000UL	via-velocity.h
29257	ISR_OVFI	0x00001000UL	via-velocity.h
29258	ISR_FLONI	0x00000800UL	via-velocity.h
29259	ISR_RACEI	0x00000400UL	via-velocity.h
29260	ISR_TXWB1I	0x00000200UL	via-velocity.h
29261	ISR_TXWB0I	0x00000100UL	via-velocity.h
29262	ISR_PTX3I	0x00000080UL	via-velocity.h
29263	ISR_PTX2I	0x00000040UL	via-velocity.h
29264	ISR_PTX1I	0x00000020UL	via-velocity.h
29265	ISR_PTX0I	0x00000010UL	via-velocity.h
29266	ISR_PTXI	0x00000008UL	via-velocity.h
29267	ISR_PRXI	0x00000004UL	via-velocity.h
29268	ISR_PPTXI	0x00000002UL	via-velocity.h
29269	ISR_PPRXI	0x00000001UL	via-velocity.h
29270	IMR_TXSTLM	0x02000000UL	via-velocity.h
29271	IMR_UDPIM	0x00400000UL	via-velocity.h
29272	IMR_MIBFIM	0x00200000UL	via-velocity.h
29273	IMR_SHDNIM	0x00100000UL	via-velocity.h
29274	IMR_PHYIM	0x00080000UL	via-velocity.h
29275	IMR_PWEIM	0x00040000UL	via-velocity.h
29276	IMR_TMR1IM	0x00020000UL	via-velocity.h
29277	IMR_TMR0IM	0x00010000UL	via-velocity.h
29278	IMR_SRCIM	0x00008000UL	via-velocity.h
29279	IMR_LSTPEIM	0x00004000UL	via-velocity.h
29280	IMR_LSTEIM	0x00002000UL	via-velocity.h
29281	IMR_OVFIM	0x00001000UL	via-velocity.h
29282	IMR_FLONIM	0x00000800UL	via-velocity.h
29283	IMR_RACEIM	0x00000400UL	via-velocity.h
29284	IMR_TXWB1IM	0x00000200UL	via-velocity.h
29285	IMR_TXWB0IM	0x00000100UL	via-velocity.h
29286	IMR_PTX3IM	0x00000080UL	via-velocity.h
29287	IMR_PTX2IM	0x00000040UL	via-velocity.h
29288	IMR_PTX1IM	0x00000020UL	via-velocity.h
29289	IMR_PTX0IM	0x00000010UL	via-velocity.h
29290	IMR_PTXIM	0x00000008UL	via-velocity.h
29291	IMR_PRXIM	0x00000004UL	via-velocity.h
29292	IMR_PPTXIM	0x00000002UL	via-velocity.h
29293	IMR_PPRXIM	0x00000001UL	via-velocity.h
29294	INT_MASK_DEF	( IMR_PPTXIM\|IMR_PPRXIM\| IMR_PTXIM\|IMR_PRXIM \| \ IMR_PWEIM\|IMR_TXWB0IM\|IMR_TXWB1IM\|IMR_FLONIM\| \ IMR_OVFIM\|IMR_LSTEIM\|IMR_LSTP	via-velocity.h
29295	TRDCSR_DEAD	0x0008	via-velocity.h
29296	TRDCSR_WAK	0x0004	via-velocity.h
29297	TRDCSR_ACT	0x0002	via-velocity.h
29298	TRDCSR_RUN	0x0001	via-velocity.h
29299	CAMADDR_CAMEN	0x80	via-velocity.h
29300	CAMADDR_VCAMSL	0x40	via-velocity.h
29301	CAMCR_PS1	0x80	via-velocity.h
29302	CAMCR_PS0	0x40	via-velocity.h
29303	CAMCR_AITRPKT	0x20	via-velocity.h
29304	CAMCR_AITR16	0x10	via-velocity.h
29305	CAMCR_CAMRD	0x08	via-velocity.h
29306	CAMCR_CAMWR	0x04	via-velocity.h
29307	CAMCR_PS_CAM_MASK	0x40	via-velocity.h
29308	CAMCR_PS_CAM_DATA	0x80	via-velocity.h
29309	CAMCR_PS_MAR	0x00	via-velocity.h
29310	MIICFG_MPO1	0x80	via-velocity.h
29311	MIICFG_MPO0	0x40	via-velocity.h
29312	MIICFG_MFDC	0x20	via-velocity.h
29313	MIISR_MIDLE	0x80	via-velocity.h
29314	PHYSR0_PHYRST	0x80	via-velocity.h
29315	PHYSR0_LINKGD	0x40	via-velocity.h
29316	PHYSR0_FDPX	0x10	via-velocity.h
29317	PHYSR0_SPDG	0x08	via-velocity.h
29318	PHYSR0_SPD10	0x04	via-velocity.h
29319	PHYSR0_RXFLC	0x02	via-velocity.h
29320	PHYSR0_TXFLC	0x01	via-velocity.h
29321	PHYSR1_PHYTBI	0x01	via-velocity.h
29322	MIICR_MAUTO	0x80	via-velocity.h
29323	MIICR_RCMD	0x40	via-velocity.h
29324	MIICR_WCMD	0x20	via-velocity.h
29325	MIICR_MDPM	0x10	via-velocity.h
29326	MIICR_MOUT	0x08	via-velocity.h
29327	MIICR_MDO	0x04	via-velocity.h
29328	MIICR_MDI	0x02	via-velocity.h
29329	MIICR_MDC	0x01	via-velocity.h
29330	MIIADR_SWMPL	0x80	via-velocity.h
29331	CFGA_PMHCTG	0x08	via-velocity.h
29332	CFGA_GPIO1PD	0x04	via-velocity.h
29333	CFGA_ABSHDN	0x02	via-velocity.h
29334	CFGA_PACPI	0x01	via-velocity.h
29335	CFGB_GTCKOPT	0x80	via-velocity.h
29336	CFGB_MIIOPT	0x40	via-velocity.h
29337	CFGB_CRSEOPT	0x20	via-velocity.h
29338	CFGB_OFSET	0x10	via-velocity.h
29339	CFGB_CRANDOM	0x08	via-velocity.h
29340	CFGB_CAP	0x04	via-velocity.h
29341	CFGB_MBA	0x02	via-velocity.h
29342	CFGB_BAKOPT	0x01	via-velocity.h
29343	CFGC_EELOAD	0x80	via-velocity.h
29344	CFGC_BROPT	0x40	via-velocity.h
29345	CFGC_DLYEN	0x20	via-velocity.h
29346	CFGC_DTSEL	0x10	via-velocity.h
29347	CFGC_BTSEL	0x08	via-velocity.h
29348	CFGC_BPS2	0x04	via-velocity.h	bootrom select[2]
29349	CFGC_BPS1	0x02	via-velocity.h	bootrom select[1]
29350	CFGC_BPS0	0x01	via-velocity.h	bootrom select[0]
29351	CFGD_IODIS	0x80	via-velocity.h
29352	CFGD_MSLVDACEN	0x40	via-velocity.h
29353	CFGD_CFGDACEN	0x20	via-velocity.h
29354	CFGD_PCI64EN	0x10	via-velocity.h
29355	CFGD_HTMRL4	0x08	via-velocity.h
29356	DCFG_XMWI	0x8000	via-velocity.h
29357	DCFG_XMRM	0x4000	via-velocity.h
29358	DCFG_XMRL	0x2000	via-velocity.h
29359	DCFG_PERDIS	0x1000	via-velocity.h
29360	DCFG_MRWAIT	0x0400	via-velocity.h
29361	DCFG_MWWAIT	0x0200	via-velocity.h
29362	DCFG_LATMEN	0x0100	via-velocity.h
29363	MCFG_RXARB	0x0080	via-velocity.h
29364	MCFG_RFT1	0x0020	via-velocity.h
29365	MCFG_RFT0	0x0010	via-velocity.h
29366	MCFG_LOWTHOPT	0x0008	via-velocity.h
29367	MCFG_PQEN	0x0004	via-velocity.h
29368	MCFG_RTGOPT	0x0002	via-velocity.h
29369	MCFG_VIDFR	0x0001	via-velocity.h
29370	MCFG_TXARB	0x8000	via-velocity.h
29371	MCFG_TXQBK1	0x0800	via-velocity.h
29372	MCFG_TXQBK0	0x0400	via-velocity.h
29373	MCFG_TXQNOBK	0x0200	via-velocity.h
29374	MCFG_SNAPOPT	0x0100	via-velocity.h
29375	PMCC_DSI	0x80	via-velocity.h
29376	PMCC_D2_DIS	0x40	via-velocity.h
29377	PMCC_D1_DIS	0x20	via-velocity.h
29378	PMCC_D3C_EN	0x10	via-velocity.h
29379	PMCC_D3H_EN	0x08	via-velocity.h
29380	PMCC_D2_EN	0x04	via-velocity.h
29381	PMCC_D1_EN	0x02	via-velocity.h
29382	PMCC_D0_EN	0x01	via-velocity.h
29383	STICKHW_SWPTAG	0x10	via-velocity.h
29384	STICKHW_WOLSR	0x08	via-velocity.h
29385	STICKHW_WOLEN	0x04	via-velocity.h
29386	STICKHW_DS1	0x02	via-velocity.h	R/W by software/cfg cycle
29387	STICKHW_DS0	0x01	via-velocity.h	suspend well DS write port
29388	MIBCR_MIBISTOK	0x80	via-velocity.h
29389	MIBCR_MIBISTGO	0x40	via-velocity.h
29390	MIBCR_MIBINC	0x20	via-velocity.h
29391	MIBCR_MIBHI	0x10	via-velocity.h
29392	MIBCR_MIBFRZ	0x08	via-velocity.h
29393	MIBCR_MIBFLSH	0x04	via-velocity.h
29394	MIBCR_MPTRINI	0x02	via-velocity.h
29395	MIBCR_MIBCLR	0x01	via-velocity.h
29396	EERSV_BOOT_RPL	((u8) 0x01)	via-velocity.h	Boot method selection for VT6110
29397	EERSV_BOOT_MASK	((u8) 0x06)	via-velocity.h
29398	EERSV_BOOT_INT19	((u8) 0x00)	via-velocity.h
29399	EERSV_BOOT_INT18	((u8) 0x02)	via-velocity.h
29400	EERSV_BOOT_LOCAL	((u8) 0x04)	via-velocity.h
29401	EERSV_BOOT_BEV	((u8) 0x06)	via-velocity.h
29402	BPCMD_BPDNE	0x80	via-velocity.h
29403	BPCMD_EBPWR	0x02	via-velocity.h
29404	BPCMD_EBPRD	0x01	via-velocity.h
29405	EECSR_EMBP	0x40	via-velocity.h	eeprom embeded programming
29406	EECSR_RELOAD	0x20	via-velocity.h	eeprom content reload
29407	EECSR_DPM	0x10	via-velocity.h	eeprom direct programming
29408	EECSR_ECS	0x08	via-velocity.h	eeprom CS pin
29409	EECSR_ECK	0x04	via-velocity.h	eeprom CK pin
29410	EECSR_EDI	0x02	via-velocity.h	eeprom DI pin
29411	EECSR_EDO	0x01	via-velocity.h	eeprom DO pin
29412	EMBCMD_EDONE	0x80	via-velocity.h
29413	EMBCMD_EWDIS	0x08	via-velocity.h
29414	EMBCMD_EWEN	0x04	via-velocity.h
29415	EMBCMD_EWR	0x02	via-velocity.h
29416	EMBCMD_ERD	0x01	via-velocity.h
29417	TESTCFG_HBDIS	0x80	via-velocity.h
29418	CHIPGCR_FCGMII	0x80	via-velocity.h
29419	CHIPGCR_FCFDX	0x40	via-velocity.h
29420	CHIPGCR_FCRESV	0x20	via-velocity.h
29421	CHIPGCR_FCMODE	0x10	via-velocity.h
29422	CHIPGCR_LPSOPT	0x08	via-velocity.h
29423	CHIPGCR_TM1US	0x04	via-velocity.h
29424	CHIPGCR_TM0US	0x02	via-velocity.h
29425	CHIPGCR_PHYINTEN	0x01	via-velocity.h
29426	WOLCR_MSWOLEN7	0x0080	via-velocity.h	enable pattern match filtering
29427	WOLCR_MSWOLEN6	0x0040	via-velocity.h
29428	WOLCR_MSWOLEN5	0x0020	via-velocity.h
29429	WOLCR_MSWOLEN4	0x0010	via-velocity.h
29430	WOLCR_MSWOLEN3	0x0008	via-velocity.h
29431	WOLCR_MSWOLEN2	0x0004	via-velocity.h
29432	WOLCR_MSWOLEN1	0x0002	via-velocity.h
29433	WOLCR_MSWOLEN0	0x0001	via-velocity.h
29434	WOLCR_ARP_EN	0x0001	via-velocity.h
29435	WOLCR_LINKOFF_EN	0x0800	via-velocity.h	link off detected enable
29436	WOLCR_LINKON_EN	0x0400	via-velocity.h	link on detected enable
29437	WOLCR_MAGIC_EN	0x0200	via-velocity.h	magic packet filter enable
29438	WOLCR_UNICAST_EN	0x0100	via-velocity.h	unicast filter enable
29439	PWCFG_PHYPWOPT	0x80	via-velocity.h	internal MII I/F timing
29440	PWCFG_PCISTICK	0x40	via-velocity.h	PCI sticky R/W enable
29441	PWCFG_WOLTYPE	0x20	via-velocity.h	pulse(1) or button (0)
29442	PWCFG_LEGCY_WOL	0x10	via-velocity.h
29443	PWCFG_PMCSR_PME_SR	0x08	via-velocity.h
29444	PWCFG_PMCSR_PME_EN	0x04	via-velocity.h	control by PCISTICK
29445	PWCFG_LEGACY_WOLSR	0x02	via-velocity.h	Legacy WOL_SR shadow
29446	PWCFG_LEGACY_WOLEN	0x01	via-velocity.h	Legacy WOL_EN shadow
29447	WOLCFG_PMEOVR	0x80	via-velocity.h	for legacy use, force PMEEN always
29448	WOLCFG_SAM	0x20	via-velocity.h	accept multicast case reset, default=0
29449	WOLCFG_SAB	0x10	via-velocity.h	accept broadcast case reset, default=0
29450	WOLCFG_SMIIACC	0x08	via-velocity.h	??
29451	WOLCFG_SGENWH	0x02	via-velocity.h
29452	WOLCFG_PHYINTEN	0x01	via-velocity.h	0:PHYINT trigger enable, 1:use internal MII
29453	WOLSR_LINKOFF_INT	0x0800	via-velocity.h
29454	WOLSR_LINKON_INT	0x0400	via-velocity.h
29455	WOLSR_MAGIC_INT	0x0200	via-velocity.h
29456	WOLSR_UNICAST_INT	0x0100	via-velocity.h
29457	PKT_TYPE_NONE	0x0000	via-velocity.h	Turn off receiver
29458	PKT_TYPE_DIRECTED	0x0001	via-velocity.h	obselete, directed address is always accepted
29459	PKT_TYPE_MULTICAST	0x0002	via-velocity.h
29460	PKT_TYPE_ALL_MULTICAST	0x0004	via-velocity.h
29461	PKT_TYPE_BROADCAST	0x0008	via-velocity.h
29462	PKT_TYPE_PROMISCUOUS	0x0020	via-velocity.h
29463	PKT_TYPE_LONG	0x2000	via-velocity.h	NOTE.... the definition of LONG is >2048 bytes in our chip
29464	PKT_TYPE_RUNT	0x4000	via-velocity.h
29465	PKT_TYPE_ERROR	0x8000	via-velocity.h	Accept error packets, e.g. CRC error
29466	MAC_LB_NONE	0x00	via-velocity.h
29467	MAC_LB_INTERNAL	0x01	via-velocity.h
29468	MAC_LB_EXTERNAL	0x02	via-velocity.h
29469	IMR_MASK_VALUE	0x0033FF0FUL	via-velocity.h	initial value of IMR
29470	IMR_MASK_VALUE	0x0013FB0FUL	via-velocity.h	initial value of IMR
29471	REV_ID_VT3119_A0	0x00	via-velocity.h
29472	REV_ID_VT3119_A1	0x01	via-velocity.h
29473	REV_ID_VT3216_A0	0x10	via-velocity.h
29474	W_MAX_TIMEOUT	0x0FFFU	via-velocity.h
29475	MII_REG_BMCR	0x00	via-velocity.h	physical address
29476	MII_REG_BMSR	0x01	via-velocity.h
29477	MII_REG_PHYID1	0x02	via-velocity.h	OUI
29478	MII_REG_PHYID2	0x03	via-velocity.h	OUI + Module ID + REV ID
29479	MII_REG_ANAR	0x04	via-velocity.h
29480	MII_REG_ANLPAR	0x05	via-velocity.h
29481	MII_REG_G1000CR	0x09	via-velocity.h
29482	MII_REG_G1000SR	0x0A	via-velocity.h
29483	MII_REG_MODCFG	0x10	via-velocity.h
29484	MII_REG_TCSR	0x16	via-velocity.h
29485	MII_REG_PLED	0x1B	via-velocity.h
29486	MII_REG_PCR	0x17	via-velocity.h
29487	MII_REG_PCSR	0x17	via-velocity.h
29488	MII_REG_AUXCR	0x1C	via-velocity.h
29489	MII_REG_PSCR	0x10	via-velocity.h	PHY specific control register
29490	BMCR_RESET	0x8000	via-velocity.h
29491	BMCR_LBK	0x4000	via-velocity.h
29492	BMCR_SPEED100	0x2000	via-velocity.h
29493	BMCR_AUTO	0x1000	via-velocity.h
29494	BMCR_PD	0x0800	via-velocity.h
29495	BMCR_ISO	0x0400	via-velocity.h
29496	BMCR_REAUTO	0x0200	via-velocity.h
29497	BMCR_FDX	0x0100	via-velocity.h
29498	BMCR_SPEED1G	0x0040	via-velocity.h
29499	BMSR_AUTOCM	0x0020	via-velocity.h
29500	BMSR_LNK	0x0004	via-velocity.h
29501	ANAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
29502	ANAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
29503	ANAR_T4	0x0200	via-velocity.h
29504	ANAR_TXFD	0x0100	via-velocity.h
29505	ANAR_TX	0x0080	via-velocity.h
29506	ANAR_10FD	0x0040	via-velocity.h
29507	ANAR_10	0x0020	via-velocity.h
29508	ANLPAR_ASMDIR	0x0800	via-velocity.h	Asymmetric PAUSE support
29509	ANLPAR_PAUSE	0x0400	via-velocity.h	Symmetric PAUSE Support
29510	ANLPAR_T4	0x0200	via-velocity.h
29511	ANLPAR_TXFD	0x0100	via-velocity.h
29512	ANLPAR_TX	0x0080	via-velocity.h
29513	ANLPAR_10FD	0x0040	via-velocity.h
29514	ANLPAR_10	0x0020	via-velocity.h
29515	G1000CR_1000FD	0x0200	via-velocity.h	PHY is 1000-T Full-duplex capable
29516	G1000CR_1000	0x0100	via-velocity.h	PHY is 1000-T Half-duplex capable
29517	G1000SR_1000FD	0x0800	via-velocity.h	LP PHY is 1000-T Full-duplex capable
29518	G1000SR_1000	0x0400	via-velocity.h	LP PHY is 1000-T Half-duplex capable
29519	TCSR_ECHODIS	0x2000	via-velocity.h
29520	AUXCR_MDPPS	0x0004	via-velocity.h
29521	PLED_LALBE	0x0004	via-velocity.h
29522	PSCR_ACRSTX	0x0800	via-velocity.h	Assert CRS on Transmit
29523	PHYID_CICADA_CS8201	0x000FC410UL	via-velocity.h
29524	PHYID_VT3216_32BIT	0x000FC610UL	via-velocity.h
29525	PHYID_VT3216_64BIT	0x000FC600UL	via-velocity.h
29526	PHYID_MARVELL_1000	0x01410C50UL	via-velocity.h
29527	PHYID_MARVELL_1000S	0x01410C40UL	via-velocity.h
29528	PHYID_REV_ID_MASK	0x0000000FUL	via-velocity.h
29529	VELOCITY_WOL_MAGIC	0x00000000UL	via-velocity.h
29530	VELOCITY_WOL_PHY	0x00000001UL	via-velocity.h
29531	VELOCITY_WOL_ARP	0x00000002UL	via-velocity.h
29532	VELOCITY_WOL_UCAST	0x00000004UL	via-velocity.h
29533	VELOCITY_WOL_BCAST	0x00000010UL	via-velocity.h
29534	VELOCITY_WOL_MCAST	0x00000020UL	via-velocity.h
29535	VELOCITY_WOL_MAGIC_SEC	0x00000040UL	via-velocity.h
29536	VELOCITY_FLAGS_TAGGING	0x00000001UL	via-velocity.h
29537	VELOCITY_FLAGS_TX_CSUM	0x00000002UL	via-velocity.h
29538	VELOCITY_FLAGS_RX_CSUM	0x00000004UL	via-velocity.h
29539	VELOCITY_FLAGS_IP_ALIGN	0x00000008UL	via-velocity.h
29540	VELOCITY_FLAGS_VAL_PKT_LEN	0x00000010UL	via-velocity.h
29541	VELOCITY_FLAGS_FLOW_CTRL	0x01000000UL	via-velocity.h
29542	VELOCITY_FLAGS_OPENED	0x00010000UL	via-velocity.h
29543	VELOCITY_FLAGS_VMNS_CONNECTED	0x00020000UL	via-velocity.h
29544	VELOCITY_FLAGS_VMNS_COMMITTED	0x00040000UL	via-velocity.h
29545	VELOCITY_FLAGS_WOL_ENABLED	0x00080000UL	via-velocity.h
29546	VELOCITY_LINK_FAIL	0x00000001UL	via-velocity.h
29547	VELOCITY_SPEED_10	0x00000002UL	via-velocity.h
29548	VELOCITY_SPEED_100	0x00000004UL	via-velocity.h
29549	VELOCITY_SPEED_1000	0x00000008UL	via-velocity.h
29550	VELOCITY_DUPLEX_FULL	0x00000010UL	via-velocity.h
29551	VELOCITY_AUTONEG_ENABLE	0x00000020UL	via-velocity.h
29552	VELOCITY_FORCED_BY_EEPROM	0x00000040UL	via-velocity.h
29553	VELOCITY_LINK_CHANGE	0x00000001UL	via-velocity.h
29554	RX_DESC_MIN	4	via-velocity.h
29555	RX_DESC_MAX	255	via-velocity.h
29556	RX_DESC_DEF	RX_DESC_MIN	via-velocity.h
29557	TX_DESC_MIN	1	via-velocity.h
29558	TX_DESC_MAX	256	via-velocity.h
29559	TX_DESC_DEF	TX_DESC_MIN	via-velocity.h
29560	VIRTIO_NET_F_CSUM	0	virtio-net.h	Host handles pkts w/ partial csum
29561	VIRTIO_NET_F_GUEST_CSUM	1	virtio-net.h	Guest handles pkts w/ partial csum
29562	VIRTIO_NET_F_MAC	5	virtio-net.h	Host has given MAC address.
29563	VIRTIO_NET_F_GSO	6	virtio-net.h	Host handles pkts w/ any GSO type
29564	VIRTIO_NET_F_GUEST_TSO4	7	virtio-net.h	Guest can handle TSOv4 in.
29565	VIRTIO_NET_F_GUEST_TSO6	8	virtio-net.h	Guest can handle TSOv6 in.
29566	VIRTIO_NET_F_GUEST_ECN	9	virtio-net.h	Guest can handle TSO[6] w/ ECN in.
29567	VIRTIO_NET_F_GUEST_UFO	10	virtio-net.h	Guest can handle UFO in.
29568	VIRTIO_NET_F_HOST_TSO4	11	virtio-net.h	Host can handle TSOv4 in.
29569	VIRTIO_NET_F_HOST_TSO6	12	virtio-net.h	Host can handle TSOv6 in.
29570	VIRTIO_NET_F_HOST_ECN	13	virtio-net.h	Host can handle TSO[6] w/ ECN in.
29571	VIRTIO_NET_F_HOST_UFO	14	virtio-net.h	Host can handle UFO in.
29572	VIRTIO_PCI_HOST_FEATURES	0	virtio-pci.h
29573	VIRTIO_PCI_GUEST_FEATURES	4	virtio-pci.h
29574	VIRTIO_PCI_QUEUE_PFN	8	virtio-pci.h
29575	VIRTIO_PCI_QUEUE_NUM	12	virtio-pci.h
29576	VIRTIO_PCI_QUEUE_SEL	14	virtio-pci.h
29577	VIRTIO_PCI_QUEUE_NOTIFY	16	virtio-pci.h
29578	VIRTIO_PCI_STATUS	18	virtio-pci.h
29579	VIRTIO_PCI_ISR	19	virtio-pci.h
29580	VIRTIO_PCI_ISR_CONFIG	0x2	virtio-pci.h
29581	VIRTIO_PCI_CONFIG	20	virtio-pci.h
29582	VIRTIO_PCI_ABI_VERSION	0	virtio-pci.h
29583	PAGE_SHIFT	(12)	virtio-ring.h
29584	PAGE_SIZE	(1<<PAGE_SHIFT)	virtio-ring.h
29585	PAGE_MASK	(PAGE_SIZE-1)	virtio-ring.h
29586	VIRTIO_CONFIG_S_ACKNOWLEDGE	1	virtio-ring.h
29587	VIRTIO_CONFIG_S_DRIVER	2	virtio-ring.h
29588	VIRTIO_CONFIG_S_DRIVER_OK	4	virtio-ring.h
29589	VIRTIO_CONFIG_S_FAILED	0x80	virtio-ring.h
29590	MAX_QUEUE_NUM	(512)	virtio-ring.h
29591	VRING_DESC_F_NEXT	1	virtio-ring.h
29592	VRING_DESC_F_WRITE	2	virtio-ring.h
29593	VRING_AVAIL_F_NO_INTERRUPT	1	virtio-ring.h
29594	VRING_USED_F_NO_NOTIFY	1	virtio-ring.h
29595	WLAN_Ix86	1	wlan_compat.h
29596	WLAN_PPC	2	wlan_compat.h
29597	WLAN_Ix96	3	wlan_compat.h
29598	WLAN_ARM	4	wlan_compat.h
29599	WLAN_ALPHA	5	wlan_compat.h
29600	WLAN_MIPS	6	wlan_compat.h
29601	WLAN_HPPA	7	wlan_compat.h
29602	WLAN_I386CORE	1	wlan_compat.h
29603	WLAN_PPCCORE	2	wlan_compat.h
29604	WLAN_I296	3	wlan_compat.h
29605	WLAN_ARMCORE	4	wlan_compat.h
29606	WLAN_ALPHACORE	5	wlan_compat.h
29607	WLAN_MIPSCORE	6	wlan_compat.h
29608	WLAN_HPPACORE	7	wlan_compat.h
29609	WLAN_I386PART	1	wlan_compat.h
29610	WLAN_MPC860	2	wlan_compat.h
29611	WLAN_MPC823	3	wlan_compat.h
29612	WLAN_I296SA	4	wlan_compat.h
29613	WLAN_PPCPART	5	wlan_compat.h
29614	WLAN_ARMPART	6	wlan_compat.h
29615	WLAN_ALPHAPART	7	wlan_compat.h
29616	WLAN_MIPSPART	8	wlan_compat.h
29617	WLAN_HPPAPART	9	wlan_compat.h
29618	WLAN_PCAT	1	wlan_compat.h
29619	WLAN_MBX	2	wlan_compat.h
29620	WLAN_RPX	3	wlan_compat.h
29621	WLAN_LWARCH	4	wlan_compat.h
29622	WLAN_PMAC	5	wlan_compat.h
29623	WLAN_SKIFF	6	wlan_compat.h
29624	WLAN_BITSY	7	wlan_compat.h
29625	WLAN_ALPHAARCH	7	wlan_compat.h
29626	WLAN_MIPSARCH	9	wlan_compat.h
29627	WLAN_HPPAARCH	10	wlan_compat.h
29628	WLAN_LINUX_KERNEL	1	wlan_compat.h
29629	WLAN_LINUX_USER	2	wlan_compat.h
29630	WLAN_PCMCIA	1	wlan_compat.h
29631	WLAN_ISA	2	wlan_compat.h
29632	WLAN_PCI	3	wlan_compat.h
29633	WLAN_USB	4	wlan_compat.h
29634	WLAN_PLX	5	wlan_compat.h
29635	WLAN_OS	WLAN_LINUX_KERNEL	wlan_compat.h
29636	WLAN_OS	WLAN_LINUX_USER	wlan_compat.h
29637	WLAN_CPU_FAMILY	WLAN_Ix86	wlan_compat.h
29638	WLAN_CPU_CORE	WLAN_I386CORE	wlan_compat.h
29639	WLAN_CPU_PART	WLAN_I386PART	wlan_compat.h
29640	WLAN_SYSARCH	WLAN_PCAT	wlan_compat.h
29641	WLAN_CPU_FAMILY	WLAN_PPC	wlan_compat.h
29642	WLAN_CPU_CORE	WLAN_PPCCORE	wlan_compat.h
29643	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
29644	WLAN_SYSARCH	WLAN_MBX	wlan_compat.h
29645	WLAN_CPU_PART	WLAN_MPC823	wlan_compat.h
29646	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
29647	WLAN_CPU_PART	WLAN_MPC860	wlan_compat.h
29648	WLAN_SYSARCH	WLAN_RPX	wlan_compat.h
29649	WLAN_CPU_PART	WLAN_PPCPART	wlan_compat.h
29650	WLAN_SYSARCH	WLAN_PMAC	wlan_compat.h
29651	WLAN_CPU_FAMILY	WLAN_ARM	wlan_compat.h
29652	WLAN_CPU_CORE	WLAN_ARMCORE	wlan_compat.h
29653	WLAN_CPU_PART	WLAN_ARM_PART	wlan_compat.h
29654	WLAN_SYSARCH	WLAN_SKIFF	wlan_compat.h
29655	WLAN_CPU_FAMILY	WLAN_ALPHA	wlan_compat.h
29656	WLAN_CPU_CORE	WLAN_ALPHACORE	wlan_compat.h
29657	WLAN_CPU_PART	WLAN_ALPHAPART	wlan_compat.h
29658	WLAN_SYSARCH	WLAN_ALPHAARCH	wlan_compat.h
29659	WLAN_CPU_FAMILY	WLAN_MIPS	wlan_compat.h
29660	WLAN_CPU_CORE	WLAN_MIPSCORE	wlan_compat.h
29661	WLAN_CPU_PART	WLAN_MIPSPART	wlan_compat.h
29662	WLAN_SYSARCH	WLAN_MIPSARCH	wlan_compat.h
29663	WLAN_CPU_FAMILY	WLAN_HPPA	wlan_compat.h
29664	WLAN_CPU_CORE	WLAN_HPPACORE	wlan_compat.h
29665	WLAN_CPU_PART	WLAN_HPPAPART	wlan_compat.h
29666	WLAN_SYSARCH	WLAN_HPPAARCH	wlan_compat.h
29667	BIT0	0x00000001	wlan_compat.h
29668	BIT1	0x00000002	wlan_compat.h
29669	BIT2	0x00000004	wlan_compat.h
29670	BIT3	0x00000008	wlan_compat.h
29671	BIT4	0x00000010	wlan_compat.h
29672	BIT5	0x00000020	wlan_compat.h
29673	BIT6	0x00000040	wlan_compat.h
29674	BIT7	0x00000080	wlan_compat.h
29675	BIT8	0x00000100	wlan_compat.h
29676	BIT9	0x00000200	wlan_compat.h
29677	BIT10	0x00000400	wlan_compat.h
29678	BIT11	0x00000800	wlan_compat.h
29679	BIT12	0x00001000	wlan_compat.h
29680	BIT13	0x00002000	wlan_compat.h
29681	BIT14	0x00004000	wlan_compat.h
29682	BIT15	0x00008000	wlan_compat.h
29683	BIT16	0x00010000	wlan_compat.h
29684	BIT17	0x00020000	wlan_compat.h
29685	BIT18	0x00040000	wlan_compat.h
29686	BIT19	0x00080000	wlan_compat.h
29687	BIT20	0x00100000	wlan_compat.h
29688	BIT21	0x00200000	wlan_compat.h
29689	BIT22	0x00400000	wlan_compat.h
29690	BIT23	0x00800000	wlan_compat.h
29691	BIT24	0x01000000	wlan_compat.h
29692	BIT25	0x02000000	wlan_compat.h
29693	BIT26	0x04000000	wlan_compat.h
29694	BIT27	0x08000000	wlan_compat.h
29695	BIT28	0x10000000	wlan_compat.h
29696	BIT29	0x20000000	wlan_compat.h
29697	BIT30	0x40000000	wlan_compat.h
29698	BIT31	0x80000000	wlan_compat.h
29699	UINT8_MAX	(0xffUL)	wlan_compat.h
29700	UINT16_MAX	(0xffffUL)	wlan_compat.h
29701	UINT32_MAX	(0xffffffffUL)	wlan_compat.h
29702	INT8_MAX	(0x7fL)	wlan_compat.h
29703	INT16_MAX	(0x7fffL)	wlan_compat.h
29704	INT32_MAX	(0x7fffffffL)	wlan_compat.h
29705	__WLAN_ATTRIB_PACK__	__attribute__ ((packed))	wlan_compat.h
29706	__WLAN_INLINE__	inline	wlan_compat.h
29707	WLAN_MIN_ARRAY	0	wlan_compat.h
29708	WLAN_DBVAR	wlan_debug	wlan_compat.h
29709	DBFENTER	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Enter\n"); } }	wlan_compat.h
29710	DBFEXIT	{ if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Exit\n"); } }	wlan_compat.h
29711	wlan_ms_per_tick	(1000UL / (wlan_ticks_per_sec))	wlan_compat.h
29712	MODVERSIONS	1	wlan_compat.h
29713	__SMP__	1	wlan_compat.h
29714	CONFIG_NETLINK	1	wlan_compat.h
29715	BAR_0	0	e1000.h
29716	BAR_1	1	e1000.h
29717	BAR_5	5	e1000.h
29718	E1000_RXBUFFER_128	128	e1000.h	Used for packet split
29719	E1000_RXBUFFER_256	256	e1000.h	Used for packet split
29720	E1000_RXBUFFER_512	512	e1000.h
29721	E1000_RXBUFFER_1024	1024	e1000.h
29722	E1000_RXBUFFER_2048	2048	e1000.h
29723	E1000_RXBUFFER_4096	4096	e1000.h
29724	E1000_RXBUFFER_8192	8192	e1000.h
29725	E1000_RXBUFFER_16384	16384	e1000.h
29726	E1000_SMARTSPEED_DOWNSHIFT	3	e1000.h
29727	E1000_SMARTSPEED_MAX	15	e1000.h
29728	E1000_PBA_BYTES_SHIFT	0xA	e1000.h
29729	E1000_TX_HEAD_ADDR_SHIFT	7	e1000.h
29730	E1000_PBA_TX_MASK	0xFFFF0000	e1000.h
29731	E1000_FC_HIGH_DIFF	0x1638	e1000.h	High: 5688 bytes below Rx FIFO size
29732	E1000_FC_LOW_DIFF	0x1640	e1000.h	Low: 5696 bytes below Rx FIFO size
29733	E1000_FC_PAUSE_TIME	0x0680	e1000.h	858 usec
29734	MAXIMUM_ETHERNET_VLAN_SIZE	1522	e1000.h
29735	E1000_TX_QUEUE_WAKE	16	e1000.h
29736	E1000_RX_BUFFER_WRITE	16	e1000.h	Must be power of 2
29737	AUTO_ALL_MODES	0	e1000.h
29738	E1000_EEPROM_82544_APM	0x0004	e1000.h
29739	E1000_EEPROM_ICH8_APME	0x0004	e1000.h
29740	E1000_EEPROM_APME	0x0400	e1000.h
29741	E1000_MASTER_SLAVE	e1000_ms_hw_default	e1000.h
29742	E1000_MNG2HOST_PORT_623	(1 << 5)	e1000.h
29743	E1000_MNG2HOST_PORT_664	(1 << 6)	e1000.h
29744	E1000_ERT_2048	0x100	e1000.h
29745	IORESOURCE_IO	0x00000100	e1000.h
29746	IORESOURCE_MEM	0x00000200	e1000.h
29747	IORESOURCE_PREFETCH	0x00001000	e1000.h
29748	E1000_HOST_IF_MAX_SIZE	2048	e1000_hw.h
29749	E1000_SUCCESS	0	e1000_hw.h
29750	E1000_ERR_EEPROM	1	e1000_hw.h
29751	E1000_ERR_PHY	2	e1000_hw.h
29752	E1000_ERR_CONFIG	3	e1000_hw.h
29753	E1000_ERR_PARAM	4	e1000_hw.h
29754	E1000_ERR_MAC_TYPE	5	e1000_hw.h
29755	E1000_ERR_PHY_TYPE	6	e1000_hw.h
29756	E1000_ERR_RESET	9	e1000_hw.h
29757	E1000_ERR_MASTER_REQUESTS_PENDI	10	e1000_hw.h
29758	E1000_ERR_HOST_INTERFACE_COMMAN	11	e1000_hw.h
29759	E1000_BLK_PHY_RESET	12	e1000_hw.h
29760	E1000_ERR_SWFW_SYNC	13	e1000_hw.h
29761	E1000_MNG_DHCP_TX_PAYLOAD_CMD	64	e1000_hw.h
29762	E1000_HI_MAX_MNG_DATA_LENGTH	0x6F8	e1000_hw.h	Host Interface data length
29763	E1000_MNG_DHCP_COMMAND_TIMEOUT	10	e1000_hw.h	Time in ms to process MNG command
29764	E1000_MNG_DHCP_COOKIE_OFFSET	0x6F0	e1000_hw.h	Cookie offset
29765	E1000_MNG_DHCP_COOKIE_LENGTH	0x10	e1000_hw.h	Cookie length
29766	E1000_MNG_IAMT_MODE	0x3	e1000_hw.h
29767	E1000_MNG_ICH_IAMT_MODE	0x2	e1000_hw.h
29768	E1000_IAMT_SIGNATURE	0x544D4149	e1000_hw.h	Intel(R) Active Management Technology signature
29769	E1000_MNG_DHCP_COOKIE_STATUS_PA	0x1	e1000_hw.h	DHCP parsing enabled
29770	E1000_MNG_DHCP_COOKIE_STATUS_VL	0x2	e1000_hw.h	DHCP parsing enabled
29771	E1000_VFTA_ENTRY_SHIFT	0x5	e1000_hw.h
29772	E1000_VFTA_ENTRY_MASK	0x7F	e1000_hw.h
29773	E1000_VFTA_ENTRY_BIT_SHIFT_MASK	0x1F	e1000_hw.h
29774	E1000_DEV_ID_82542	0x1000	e1000_hw.h
29775	E1000_DEV_ID_82543GC_FIBER	0x1001	e1000_hw.h
29776	E1000_DEV_ID_82543GC_COPPER	0x1004	e1000_hw.h
29777	E1000_DEV_ID_82544EI_COPPER	0x1008	e1000_hw.h
29778	E1000_DEV_ID_82544EI_FIBER	0x1009	e1000_hw.h
29779	E1000_DEV_ID_82544GC_COPPER	0x100C	e1000_hw.h
29780	E1000_DEV_ID_82544GC_LOM	0x100D	e1000_hw.h
29781	E1000_DEV_ID_82540EM	0x100E	e1000_hw.h
29782	E1000_DEV_ID_82540EM_LOM	0x1015	e1000_hw.h
29783	E1000_DEV_ID_82540EP_LOM	0x1016	e1000_hw.h
29784	E1000_DEV_ID_82540EP	0x1017	e1000_hw.h
29785	E1000_DEV_ID_82540EP_LP	0x101E	e1000_hw.h
29786	E1000_DEV_ID_82545EM_COPPER	0x100F	e1000_hw.h
29787	E1000_DEV_ID_82545EM_FIBER	0x1011	e1000_hw.h
29788	E1000_DEV_ID_82545GM_COPPER	0x1026	e1000_hw.h
29789	E1000_DEV_ID_82545GM_FIBER	0x1027	e1000_hw.h
29790	E1000_DEV_ID_82545GM_SERDES	0x1028	e1000_hw.h
29791	E1000_DEV_ID_82546EB_COPPER	0x1010	e1000_hw.h
29792	E1000_DEV_ID_82546EB_FIBER	0x1012	e1000_hw.h
29793	E1000_DEV_ID_82546EB_QUAD_COPPE	0x101D	e1000_hw.h
29794	E1000_DEV_ID_82541EI	0x1013	e1000_hw.h
29795	E1000_DEV_ID_82541EI_MOBILE	0x1018	e1000_hw.h
29796	E1000_DEV_ID_82541ER_LOM	0x1014	e1000_hw.h
29797	E1000_DEV_ID_82541ER	0x1078	e1000_hw.h
29798	E1000_DEV_ID_82547GI	0x1075	e1000_hw.h
29799	E1000_DEV_ID_82541GI	0x1076	e1000_hw.h
29800	E1000_DEV_ID_82541GI_MOBILE	0x1077	e1000_hw.h
29801	E1000_DEV_ID_82541GI_LF	0x107C	e1000_hw.h
29802	E1000_DEV_ID_82546GB_COPPER	0x1079	e1000_hw.h
29803	E1000_DEV_ID_82546GB_FIBER	0x107A	e1000_hw.h
29804	E1000_DEV_ID_82546GB_SERDES	0x107B	e1000_hw.h
29805	E1000_DEV_ID_82546GB_PCIE	0x108A	e1000_hw.h
29806	E1000_DEV_ID_82546GB_QUAD_COPPE	0x1099	e1000_hw.h
29807	E1000_DEV_ID_82547EI	0x1019	e1000_hw.h
29808	E1000_DEV_ID_82547EI_MOBILE	0x101A	e1000_hw.h
29809	E1000_DEV_ID_82571EB_COPPER	0x105E	e1000_hw.h
29810	E1000_DEV_ID_82571EB_FIBER	0x105F	e1000_hw.h
29811	E1000_DEV_ID_82571EB_SERDES	0x1060	e1000_hw.h
29812	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10A4	e1000_hw.h
29813	E1000_DEV_ID_82571EB_QUAD_FIBER	0x10A5	e1000_hw.h
29814	E1000_DEV_ID_82571EB_QUAD_COPPE	0x10BC	e1000_hw.h
29815	E1000_DEV_ID_82571EB_SERDES_DUA	0x10D9	e1000_hw.h
29816	E1000_DEV_ID_82571EB_SERDES_QUA	0x10DA	e1000_hw.h
29817	E1000_DEV_ID_82572EI_COPPER	0x107D	e1000_hw.h
29818	E1000_DEV_ID_82572EI_FIBER	0x107E	e1000_hw.h
29819	E1000_DEV_ID_82572EI_SERDES	0x107F	e1000_hw.h
29820	E1000_DEV_ID_82572EI	0x10B9	e1000_hw.h
29821	E1000_DEV_ID_82573E	0x108B	e1000_hw.h
29822	E1000_DEV_ID_82573E_IAMT	0x108C	e1000_hw.h
29823	E1000_DEV_ID_82573L	0x109A	e1000_hw.h
29824	E1000_DEV_ID_82546GB_QUAD_COPPE	0x10B5	e1000_hw.h
29825	E1000_DEV_ID_80003ES2LAN_COPPER	0x1096	e1000_hw.h
29826	E1000_DEV_ID_80003ES2LAN_SERDES	0x1098	e1000_hw.h
29827	E1000_DEV_ID_80003ES2LAN_COPPER	0x10BA	e1000_hw.h
29828	E1000_DEV_ID_80003ES2LAN_SERDES	0x10BB	e1000_hw.h
29829	E1000_DEV_ID_ICH8_IGP_M_AMT	0x1049	e1000_hw.h
29830	E1000_DEV_ID_ICH8_IGP_AMT	0x104A	e1000_hw.h
29831	E1000_DEV_ID_ICH8_IGP_C	0x104B	e1000_hw.h
29832	E1000_DEV_ID_ICH8_IFE	0x104C	e1000_hw.h
29833	E1000_DEV_ID_ICH8_IFE_GT	0x10C4	e1000_hw.h
29834	E1000_DEV_ID_ICH8_IFE_G	0x10C5	e1000_hw.h
29835	E1000_DEV_ID_ICH8_IGP_M	0x104D	e1000_hw.h
29836	NODE_ADDRESS_SIZE	6	e1000_hw.h
29837	ETH_LENGTH_OF_ADDRESS	6	e1000_hw.h
29838	MAC_DECODE_SIZE	(128 * 1024)	e1000_hw.h
29839	E1000_82542_2_0_REV_ID	2	e1000_hw.h
29840	E1000_82542_2_1_REV_ID	3	e1000_hw.h
29841	E1000_REVISION_0	0	e1000_hw.h
29842	E1000_REVISION_1	1	e1000_hw.h
29843	E1000_REVISION_2	2	e1000_hw.h
29844	E1000_REVISION_3	3	e1000_hw.h
29845	SPEED_10	10	e1000_hw.h
29846	SPEED_100	100	e1000_hw.h
29847	SPEED_1000	1000	e1000_hw.h
29848	HALF_DUPLEX	1	e1000_hw.h
29849	FULL_DUPLEX	2	e1000_hw.h
29850	ENET_HEADER_SIZE	14	e1000_hw.h
29851	MAXIMUM_ETHERNET_FRAME_SIZE	1518	e1000_hw.h	With FCS
29852	MINIMUM_ETHERNET_FRAME_SIZE	64	e1000_hw.h	With FCS
29853	ETHERNET_FCS_SIZE	4	e1000_hw.h
29854	MAXIMUM_ETHERNET_PACKET_SIZE	(MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
29855	MINIMUM_ETHERNET_PACKET_SIZE	(MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)	e1000_hw.h
29856	CRC_LENGTH	ETHERNET_FCS_SIZE	e1000_hw.h
29857	MAX_JUMBO_FRAME_SIZE	0x3F00	e1000_hw.h
29858	VLAN_TAG_SIZE	4	e1000_hw.h	802.3ac tag (not DMAed)
29859	ETHERNET_IEEE_VLAN_TYPE	0x8100	e1000_hw.h	802.3ac packet
29860	ETHERNET_IP_TYPE	0x0800	e1000_hw.h	IP packets
29861	ETHERNET_ARP_TYPE	0x0806	e1000_hw.h	Address Resolution Protocol (ARP)
29862	IP_PROTOCOL_TCP	6	e1000_hw.h
29863	IP_PROTOCOL_UDP	0x11	e1000_hw.h
29864	POLL_IMS_ENABLE_MASK	( \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ)	e1000_hw.h
29865	IMS_ENABLE_MASK	( \ E1000_IMS_RXT0 \| \ E1000_IMS_TXDW \| \ E1000_IMS_RXDMT0 \| \ E1000_IMS_RXSEQ \| \ E1000_IMS_LSC)	e1000_hw.h
29866	IMS_ICH8LAN_ENABLE_MASK	(\ E1000_IMS_DSW \| \ E1000_IMS_PHYINT \| \ E1000_IMS_EPRST)	e1000_hw.h
29867	E1000_RAR_ENTRIES	15	e1000_hw.h
29868	E1000_RAR_ENTRIES_ICH8LAN	6	e1000_hw.h
29869	MIN_NUMBER_OF_DESCRIPTORS	8	e1000_hw.h
29870	MAX_NUMBER_OF_DESCRIPTORS	0xFFF8	e1000_hw.h
29871	MAX_PS_BUFFERS	4	e1000_hw.h
29872	E1000_RXD_STAT_DD	0x01	e1000_hw.h	Descriptor Done
29873	E1000_RXD_STAT_EOP	0x02	e1000_hw.h	End of Packet
29874	E1000_RXD_STAT_IXSM	0x04	e1000_hw.h	Ignore checksum
29875	E1000_RXD_STAT_VP	0x08	e1000_hw.h	IEEE VLAN Packet
29876	E1000_RXD_STAT_UDPCS	0x10	e1000_hw.h	UDP xsum caculated
29877	E1000_RXD_STAT_TCPCS	0x20	e1000_hw.h	TCP xsum calculated
29878	E1000_RXD_STAT_IPCS	0x40	e1000_hw.h	IP xsum calculated
29879	E1000_RXD_STAT_PIF	0x80	e1000_hw.h	passed in-exact filter
29880	E1000_RXD_STAT_IPIDV	0x200	e1000_hw.h	IP identification valid
29881	E1000_RXD_STAT_UDPV	0x400	e1000_hw.h	Valid UDP checksum
29882	E1000_RXD_STAT_ACK	0x8000	e1000_hw.h	ACK Packet indication
29883	E1000_RXD_ERR_CE	0x01	e1000_hw.h	CRC Error
29884	E1000_RXD_ERR_SE	0x02	e1000_hw.h	Symbol Error
29885	E1000_RXD_ERR_SEQ	0x04	e1000_hw.h	Sequence Error
29886	E1000_RXD_ERR_CXE	0x10	e1000_hw.h	Carrier Extension Error
29887	E1000_RXD_ERR_TCPE	0x20	e1000_hw.h	TCP/UDP Checksum Error
29888	E1000_RXD_ERR_IPE	0x40	e1000_hw.h	IP Checksum Error
29889	E1000_RXD_ERR_RXE	0x80	e1000_hw.h	Rx Data Error
29890	E1000_RXD_SPC_VLAN_MASK	0x0FFF	e1000_hw.h	VLAN ID is in lower 12 bits
29891	E1000_RXD_SPC_PRI_MASK	0xE000	e1000_hw.h	Priority is in upper 3 bits
29892	E1000_RXD_SPC_PRI_SHIFT	13	e1000_hw.h
29893	E1000_RXD_SPC_CFI_MASK	0x1000	e1000_hw.h	CFI is bit 12
29894	E1000_RXD_SPC_CFI_SHIFT	12	e1000_hw.h
29895	E1000_RXDEXT_STATERR_CE	0x01000000	e1000_hw.h
29896	E1000_RXDEXT_STATERR_SE	0x02000000	e1000_hw.h
29897	E1000_RXDEXT_STATERR_SEQ	0x04000000	e1000_hw.h
29898	E1000_RXDEXT_STATERR_CXE	0x10000000	e1000_hw.h
29899	E1000_RXDEXT_STATERR_TCPE	0x20000000	e1000_hw.h
29900	E1000_RXDEXT_STATERR_IPE	0x40000000	e1000_hw.h
29901	E1000_RXDEXT_STATERR_RXE	0x80000000	e1000_hw.h
29902	E1000_RXDPS_HDRSTAT_HDRSP	0x00008000	e1000_hw.h
29903	E1000_RXDPS_HDRSTAT_HDRLEN_MASK	0x000003FF	e1000_hw.h
29904	E1000_RXD_ERR_FRAME_ERR_MASK	( \ E1000_RXD_ERR_CE \| \ E1000_RXD_ERR_SE \| \ E1000_RXD_ERR_SEQ \| \ E1000_RXD_ER	e1000_hw.h
29905	E1000_RXDEXT_ERR_FRAME_ERR_MASK	( \ E1000_RXDEXT_STATERR_CE \| \ E1000_RXDEXT_STATERR_SE \| \ E1000_RXDEXT_STATERR_SEQ \| \ E10	e1000_hw.h
29906	E1000_TXD_DTYP_D	0x00100000	e1000_hw.h	Data Descriptor
29907	E1000_TXD_DTYP_C	0x00000000	e1000_hw.h	Context Descriptor
29908	E1000_TXD_POPTS_IXSM	0x01	e1000_hw.h	Insert IP checksum
29909	E1000_TXD_POPTS_TXSM	0x02	e1000_hw.h	Insert TCP/UDP checksum
29910	E1000_TXD_CMD_EOP	0x01000000	e1000_hw.h	End of Packet
29911	E1000_TXD_CMD_IFCS	0x02000000	e1000_hw.h	Insert FCS (Ethernet CRC)
29912	E1000_TXD_CMD_IC	0x04000000	e1000_hw.h	Insert Checksum
29913	E1000_TXD_CMD_RS	0x08000000	e1000_hw.h	Report Status
29914	E1000_TXD_CMD_RPS	0x10000000	e1000_hw.h	Report Packet Sent
29915	E1000_TXD_CMD_DEXT	0x20000000	e1000_hw.h	Descriptor extension (0 = legacy)
29916	E1000_TXD_CMD_VLE	0x40000000	e1000_hw.h	Add VLAN tag
29917	E1000_TXD_CMD_IDE	0x80000000	e1000_hw.h	Enable Tidv register
29918	E1000_TXD_STAT_DD	0x00000001	e1000_hw.h	Descriptor Done
29919	E1000_TXD_STAT_EC	0x00000002	e1000_hw.h	Excess Collisions
29920	E1000_TXD_STAT_LC	0x00000004	e1000_hw.h	Late Collisions
29921	E1000_TXD_STAT_TU	0x00000008	e1000_hw.h	Transmit underrun
29922	E1000_TXD_CMD_TCP	0x01000000	e1000_hw.h	TCP packet
29923	E1000_TXD_CMD_IP	0x02000000	e1000_hw.h	IP packet
29924	E1000_TXD_CMD_TSE	0x04000000	e1000_hw.h	TCP Seg enable
29925	E1000_TXD_STAT_TC	0x00000004	e1000_hw.h	Tx Underrun
29926	E1000_NUM_UNICAST	16	e1000_hw.h	Unicast filter entries
29927	E1000_MC_TBL_SIZE	128	e1000_hw.h	Multicast Filter Table (4096 bits)
29928	E1000_VLAN_FILTER_TBL_SIZE	128	e1000_hw.h	VLAN Filter Table (4096 bits)
29929	E1000_NUM_UNICAST_ICH8LAN	7	e1000_hw.h
29930	E1000_MC_TBL_SIZE_ICH8LAN	32	e1000_hw.h
29931	E1000_NUM_MTA_REGISTERS	128	e1000_hw.h
29932	E1000_NUM_MTA_REGISTERS_ICH8LAN	32	e1000_hw.h
29933	E1000_WAKEUP_IP_ADDRESS_COUNT_M	4	e1000_hw.h
29934	E1000_IP4AT_SIZE	E1000_WAKEUP_IP_ADDRESS_COUNT_MAX	e1000_hw.h
29935	E1000_IP4AT_SIZE_ICH8LAN	3	e1000_hw.h
29936	E1000_IP6AT_SIZE	1	e1000_hw.h
29937	E1000_FLEXIBLE_FILTER_COUNT_MAX	4	e1000_hw.h
29938	E1000_FLEXIBLE_FILTER_SIZE_MAX	128	e1000_hw.h
29939	E1000_FFLT_SIZE	E1000_FLEXIBLE_FILTER_COUNT_MAX	e1000_hw.h
29940	E1000_FFMT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
29941	E1000_FFVT_SIZE	E1000_FLEXIBLE_FILTER_SIZE_MAX	e1000_hw.h
29942	E1000_DISABLE_SERDES_LOOPBACK	0x0400	e1000_hw.h
29943	E1000_CTRL	0x00000	e1000_hw.h	Device Control - RW
29944	E1000_CTRL_DUP	0x00004	e1000_hw.h	Device Control Duplicate (Shadow) - RW
29945	E1000_STATUS	0x00008	e1000_hw.h	Device Status - RO
29946	E1000_EECD	0x00010	e1000_hw.h	EEPROM/Flash Control - RW
29947	E1000_EERD	0x00014	e1000_hw.h	EEPROM Read - RW
29948	E1000_CTRL_EXT	0x00018	e1000_hw.h	Extended Device Control - RW
29949	E1000_FLA	0x0001C	e1000_hw.h	Flash Access - RW
29950	E1000_MDIC	0x00020	e1000_hw.h	MDI Control - RW
29951	E1000_SCTL	0x00024	e1000_hw.h	SerDes Control - RW
29952	E1000_FEXTNVM	0x00028	e1000_hw.h	Future Extended NVM register
29953	E1000_FCAL	0x00028	e1000_hw.h	Flow Control Address Low - RW
29954	E1000_FCAH	0x0002C	e1000_hw.h	Flow Control Address High -RW
29955	E1000_FCT	0x00030	e1000_hw.h	Flow Control Type - RW
29956	E1000_VET	0x00038	e1000_hw.h	VLAN Ether Type - RW
29957	E1000_ICR	0x000C0	e1000_hw.h	Interrupt Cause Read - R/clr
29958	E1000_ITR	0x000C4	e1000_hw.h	Interrupt Throttling Rate - RW
29959	E1000_ICS	0x000C8	e1000_hw.h	Interrupt Cause Set - WO
29960	E1000_IMS	0x000D0	e1000_hw.h	Interrupt Mask Set - RW
29961	E1000_IMC	0x000D8	e1000_hw.h	Interrupt Mask Clear - WO
29962	E1000_IAM	0x000E0	e1000_hw.h	Interrupt Acknowledge Auto Mask
29963	E1000_RCTL	0x00100	e1000_hw.h	RX Control - RW
29964	E1000_RDTR1	0x02820	e1000_hw.h	RX Delay Timer (1) - RW
29965	E1000_RDBAL1	0x02900	e1000_hw.h	RX Descriptor Base Address Low (1) - RW
29966	E1000_RDBAH1	0x02904	e1000_hw.h	RX Descriptor Base Address High (1) - RW
29967	E1000_RDLEN1	0x02908	e1000_hw.h	RX Descriptor Length (1) - RW
29968	E1000_RDH1	0x02910	e1000_hw.h	RX Descriptor Head (1) - RW
29969	E1000_RDT1	0x02918	e1000_hw.h	RX Descriptor Tail (1) - RW
29970	E1000_FCTTV	0x00170	e1000_hw.h	Flow Control Transmit Timer Value - RW
29971	E1000_TXCW	0x00178	e1000_hw.h	TX Configuration Word - RW
29972	E1000_RXCW	0x00180	e1000_hw.h	RX Configuration Word - RO
29973	E1000_TCTL	0x00400	e1000_hw.h	TX Control - RW
29974	E1000_TCTL_EXT	0x00404	e1000_hw.h	Extended TX Control - RW
29975	E1000_TIPG	0x00410	e1000_hw.h	TX Inter-packet gap -RW
29976	E1000_TBT	0x00448	e1000_hw.h	TX Burst Timer - RW
29977	E1000_AIT	0x00458	e1000_hw.h	Adaptive Interframe Spacing Throttle - RW
29978	E1000_LEDCTL	0x00E00	e1000_hw.h	LED Control - RW
29979	E1000_EXTCNF_CTRL	0x00F00	e1000_hw.h	Extended Configuration Control
29980	E1000_EXTCNF_SIZE	0x00F08	e1000_hw.h	Extended Configuration Size
29981	E1000_PHY_CTRL	0x00F10	e1000_hw.h	PHY Control Register in CSR
29982	FEXTNVM_SW_CONFIG	0x0001	e1000_hw.h
29983	E1000_PBA	0x01000	e1000_hw.h	Packet Buffer Allocation - RW
29984	E1000_PBS	0x01008	e1000_hw.h	Packet Buffer Size
29985	E1000_EEMNGCTL	0x01010	e1000_hw.h	MNG EEprom Control
29986	E1000_FLASH_UPDATES	1000	e1000_hw.h
29987	E1000_EEARBC	0x01024	e1000_hw.h	EEPROM Auto Read Bus Control
29988	E1000_FLASHT	0x01028	e1000_hw.h	FLASH Timer Register
29989	E1000_EEWR	0x0102C	e1000_hw.h	EEPROM Write Register - RW
29990	E1000_FLSWCTL	0x01030	e1000_hw.h	FLASH control register
29991	E1000_FLSWDATA	0x01034	e1000_hw.h	FLASH data register
29992	E1000_FLSWCNT	0x01038	e1000_hw.h	FLASH Access Counter
29993	E1000_FLOP	0x0103C	e1000_hw.h	FLASH Opcode Register
29994	E1000_ERT	0x02008	e1000_hw.h	Early Rx Threshold - RW
29995	E1000_FCRTL	0x02160	e1000_hw.h	Flow Control Receive Threshold Low - RW
29996	E1000_FCRTH	0x02168	e1000_hw.h	Flow Control Receive Threshold High - RW
29997	E1000_PSRCTL	0x02170	e1000_hw.h	Packet Split Receive Control - RW
29998	E1000_RDBAL	0x02800	e1000_hw.h	RX Descriptor Base Address Low - RW
29999	E1000_RDBAH	0x02804	e1000_hw.h	RX Descriptor Base Address High - RW
30000	E1000_RDLEN	0x02808	e1000_hw.h	RX Descriptor Length - RW
30001	E1000_RDH	0x02810	e1000_hw.h	RX Descriptor Head - RW
30002	E1000_RDT	0x02818	e1000_hw.h	RX Descriptor Tail - RW
30003	E1000_RDTR	0x02820	e1000_hw.h	RX Delay Timer - RW
30004	E1000_RDBAL0	E1000_RDBAL	e1000_hw.h	RX Desc Base Address Low (0) - RW
30005	E1000_RDBAH0	E1000_RDBAH	e1000_hw.h	RX Desc Base Address High (0) - RW
30006	E1000_RDLEN0	E1000_RDLEN	e1000_hw.h	RX Desc Length (0) - RW
30007	E1000_RDH0	E1000_RDH	e1000_hw.h	RX Desc Head (0) - RW
30008	E1000_RDT0	E1000_RDT	e1000_hw.h	RX Desc Tail (0) - RW
30009	E1000_RDTR0	E1000_RDTR	e1000_hw.h	RX Delay Timer (0) - RW
30010	E1000_RXDCTL	0x02828	e1000_hw.h	RX Descriptor Control queue 0 - RW
30011	E1000_RXDCTL1	0x02928	e1000_hw.h	RX Descriptor Control queue 1 - RW
30012	E1000_RADV	0x0282C	e1000_hw.h	RX Interrupt Absolute Delay Timer - RW
30013	E1000_RSRPD	0x02C00	e1000_hw.h	RX Small Packet Detect - RW
30014	E1000_RAID	0x02C08	e1000_hw.h	Receive Ack Interrupt Delay - RW
30015	E1000_TXDMAC	0x03000	e1000_hw.h	TX DMA Control - RW
30016	E1000_KABGTXD	0x03004	e1000_hw.h	AFE Band Gap Transmit Ref Data
30017	E1000_TDFH	0x03410	e1000_hw.h	TX Data FIFO Head - RW
30018	E1000_TDFT	0x03418	e1000_hw.h	TX Data FIFO Tail - RW
30019	E1000_TDFHS	0x03420	e1000_hw.h	TX Data FIFO Head Saved - RW
30020	E1000_TDFTS	0x03428	e1000_hw.h	TX Data FIFO Tail Saved - RW
30021	E1000_TDFPC	0x03430	e1000_hw.h	TX Data FIFO Packet Count - RW
30022	E1000_TDBAL	0x03800	e1000_hw.h	TX Descriptor Base Address Low - RW
30023	E1000_TDBAH	0x03804	e1000_hw.h	TX Descriptor Base Address High - RW
30024	E1000_TDLEN	0x03808	e1000_hw.h	TX Descriptor Length - RW
30025	E1000_TDH	0x03810	e1000_hw.h	TX Descriptor Head - RW
30026	E1000_TDT	0x03818	e1000_hw.h	TX Descripotr Tail - RW
30027	E1000_TIDV	0x03820	e1000_hw.h	TX Interrupt Delay Value - RW
30028	E1000_TXDCTL	0x03828	e1000_hw.h	TX Descriptor Control - RW
30029	E1000_TADV	0x0382C	e1000_hw.h	TX Interrupt Absolute Delay Val - RW
30030	E1000_TSPMT	0x03830	e1000_hw.h	TCP Segmentation PAD & Min Threshold - RW
30031	E1000_TARC0	0x03840	e1000_hw.h	TX Arbitration Count (0)
30032	E1000_TDBAL1	0x03900	e1000_hw.h	TX Desc Base Address Low (1) - RW
30033	E1000_TDBAH1	0x03904	e1000_hw.h	TX Desc Base Address High (1) - RW
30034	E1000_TDLEN1	0x03908	e1000_hw.h	TX Desc Length (1) - RW
30035	E1000_TDH1	0x03910	e1000_hw.h	TX Desc Head (1) - RW
30036	E1000_TDT1	0x03918	e1000_hw.h	TX Desc Tail (1) - RW
30037	E1000_TXDCTL1	0x03928	e1000_hw.h	TX Descriptor Control (1) - RW
30038	E1000_TARC1	0x03940	e1000_hw.h	TX Arbitration Count (1)
30039	E1000_CRCERRS	0x04000	e1000_hw.h	CRC Error Count - R/clr
30040	E1000_ALGNERRC	0x04004	e1000_hw.h	Alignment Error Count - R/clr
30041	E1000_SYMERRS	0x04008	e1000_hw.h	Symbol Error Count - R/clr
30042	E1000_RXERRC	0x0400C	e1000_hw.h	Receive Error Count - R/clr
30043	E1000_MPC	0x04010	e1000_hw.h	Missed Packet Count - R/clr
30044	E1000_SCC	0x04014	e1000_hw.h	Single Collision Count - R/clr
30045	E1000_ECOL	0x04018	e1000_hw.h	Excessive Collision Count - R/clr
30046	E1000_MCC	0x0401C	e1000_hw.h	Multiple Collision Count - R/clr
30047	E1000_LATECOL	0x04020	e1000_hw.h	Late Collision Count - R/clr
30048	E1000_COLC	0x04028	e1000_hw.h	Collision Count - R/clr
30049	E1000_DC	0x04030	e1000_hw.h	Defer Count - R/clr
30050	E1000_TNCRS	0x04034	e1000_hw.h	TX-No CRS - R/clr
30051	E1000_SEC	0x04038	e1000_hw.h	Sequence Error Count - R/clr
30052	E1000_CEXTERR	0x0403C	e1000_hw.h	Carrier Extension Error Count - R/clr
30053	E1000_RLEC	0x04040	e1000_hw.h	Receive Length Error Count - R/clr
30054	E1000_XONRXC	0x04048	e1000_hw.h	XON RX Count - R/clr
30055	E1000_XONTXC	0x0404C	e1000_hw.h	XON TX Count - R/clr
30056	E1000_XOFFRXC	0x04050	e1000_hw.h	XOFF RX Count - R/clr
30057	E1000_XOFFTXC	0x04054	e1000_hw.h	XOFF TX Count - R/clr
30058	E1000_FCRUC	0x04058	e1000_hw.h	Flow Control RX Unsupported Count- R/clr
30059	E1000_PRC64	0x0405C	e1000_hw.h	Packets RX (64 bytes) - R/clr
30060	E1000_PRC127	0x04060	e1000_hw.h	Packets RX (65-127 bytes) - R/clr
30061	E1000_PRC255	0x04064	e1000_hw.h	Packets RX (128-255 bytes) - R/clr
30062	E1000_PRC511	0x04068	e1000_hw.h	Packets RX (255-511 bytes) - R/clr
30063	E1000_PRC1023	0x0406C	e1000_hw.h	Packets RX (512-1023 bytes) - R/clr
30064	E1000_PRC1522	0x04070	e1000_hw.h	Packets RX (1024-1522 bytes) - R/clr
30065	E1000_GPRC	0x04074	e1000_hw.h	Good Packets RX Count - R/clr
30066	E1000_BPRC	0x04078	e1000_hw.h	Broadcast Packets RX Count - R/clr
30067	E1000_MPRC	0x0407C	e1000_hw.h	Multicast Packets RX Count - R/clr
30068	E1000_GPTC	0x04080	e1000_hw.h	Good Packets TX Count - R/clr
30069	E1000_GORCL	0x04088	e1000_hw.h	Good Octets RX Count Low - R/clr
30070	E1000_GORCH	0x0408C	e1000_hw.h	Good Octets RX Count High - R/clr
30071	E1000_GOTCL	0x04090	e1000_hw.h	Good Octets TX Count Low - R/clr
30072	E1000_GOTCH	0x04094	e1000_hw.h	Good Octets TX Count High - R/clr
30073	E1000_RNBC	0x040A0	e1000_hw.h	RX No Buffers Count - R/clr
30074	E1000_RUC	0x040A4	e1000_hw.h	RX Undersize Count - R/clr
30075	E1000_RFC	0x040A8	e1000_hw.h	RX Fragment Count - R/clr
30076	E1000_ROC	0x040AC	e1000_hw.h	RX Oversize Count - R/clr
30077	E1000_RJC	0x040B0	e1000_hw.h	RX Jabber Count - R/clr
30078	E1000_MGTPRC	0x040B4	e1000_hw.h	Management Packets RX Count - R/clr
30079	E1000_MGTPDC	0x040B8	e1000_hw.h	Management Packets Dropped Count - R/clr
30080	E1000_MGTPTC	0x040BC	e1000_hw.h	Management Packets TX Count - R/clr
30081	E1000_TORL	0x040C0	e1000_hw.h	Total Octets RX Low - R/clr
30082	E1000_TORH	0x040C4	e1000_hw.h	Total Octets RX High - R/clr
30083	E1000_TOTL	0x040C8	e1000_hw.h	Total Octets TX Low - R/clr
30084	E1000_TOTH	0x040CC	e1000_hw.h	Total Octets TX High - R/clr
30085	E1000_TPR	0x040D0	e1000_hw.h	Total Packets RX - R/clr
30086	E1000_TPT	0x040D4	e1000_hw.h	Total Packets TX - R/clr
30087	E1000_PTC64	0x040D8	e1000_hw.h	Packets TX (64 bytes) - R/clr
30088	E1000_PTC127	0x040DC	e1000_hw.h	Packets TX (65-127 bytes) - R/clr
30089	E1000_PTC255	0x040E0	e1000_hw.h	Packets TX (128-255 bytes) - R/clr
30090	E1000_PTC511	0x040E4	e1000_hw.h	Packets TX (256-511 bytes) - R/clr
30091	E1000_PTC1023	0x040E8	e1000_hw.h	Packets TX (512-1023 bytes) - R/clr
30092	E1000_PTC1522	0x040EC	e1000_hw.h	Packets TX (1024-1522 Bytes) - R/clr
30093	E1000_MPTC	0x040F0	e1000_hw.h	Multicast Packets TX Count - R/clr
30094	E1000_BPTC	0x040F4	e1000_hw.h	Broadcast Packets TX Count - R/clr
30095	E1000_TSCTC	0x040F8	e1000_hw.h	TCP Segmentation Context TX - R/clr
30096	E1000_TSCTFC	0x040FC	e1000_hw.h	TCP Segmentation Context TX Fail - R/clr
30097	E1000_IAC	0x04100	e1000_hw.h	Interrupt Assertion Count
30098	E1000_ICRXPTC	0x04104	e1000_hw.h	Interrupt Cause Rx Packet Timer Expire Count
30099	E1000_ICRXATC	0x04108	e1000_hw.h	Interrupt Cause Rx Absolute Timer Expire Count
30100	E1000_ICTXPTC	0x0410C	e1000_hw.h	Interrupt Cause Tx Packet Timer Expire Count
30101	E1000_ICTXATC	0x04110	e1000_hw.h	Interrupt Cause Tx Absolute Timer Expire Count
30102	E1000_ICTXQEC	0x04118	e1000_hw.h	Interrupt Cause Tx Queue Empty Count
30103	E1000_ICTXQMTC	0x0411C	e1000_hw.h	Interrupt Cause Tx Queue Minimum Threshold Count
30104	E1000_ICRXDMTC	0x04120	e1000_hw.h	Interrupt Cause Rx Descriptor Minimum Threshold Count
30105	E1000_ICRXOC	0x04124	e1000_hw.h	Interrupt Cause Receiver Overrun Count
30106	E1000_RXCSUM	0x05000	e1000_hw.h	RX Checksum Control - RW
30107	E1000_RFCTL	0x05008	e1000_hw.h	Receive Filter Control
30108	E1000_MTA	0x05200	e1000_hw.h	Multicast Table Array - RW Array
30109	E1000_RA	0x05400	e1000_hw.h	Receive Address - RW Array
30110	E1000_VFTA	0x05600	e1000_hw.h	VLAN Filter Table Array - RW Array
30111	E1000_WUC	0x05800	e1000_hw.h	Wakeup Control - RW
30112	E1000_WUFC	0x05808	e1000_hw.h	Wakeup Filter Control - RW
30113	E1000_WUS	0x05810	e1000_hw.h	Wakeup Status - RO
30114	E1000_MANC	0x05820	e1000_hw.h	Management Control - RW
30115	E1000_IPAV	0x05838	e1000_hw.h	IP Address Valid - RW
30116	E1000_IP4AT	0x05840	e1000_hw.h	IPv4 Address Table - RW Array
30117	E1000_IP6AT	0x05880	e1000_hw.h	IPv6 Address Table - RW Array
30118	E1000_WUPL	0x05900	e1000_hw.h	Wakeup Packet Length - RW
30119	E1000_WUPM	0x05A00	e1000_hw.h	Wakeup Packet Memory - RO A
30120	E1000_FFLT	0x05F00	e1000_hw.h	Flexible Filter Length Table - RW Array
30121	E1000_HOST_IF	0x08800	e1000_hw.h	Host Interface
30122	E1000_FFMT	0x09000	e1000_hw.h	Flexible Filter Mask Table - RW Array
30123	E1000_FFVT	0x09800	e1000_hw.h	Flexible Filter Value Table - RW Array
30124	E1000_KUMCTRLSTA	0x00034	e1000_hw.h	MAC-PHY interface - RW
30125	E1000_MDPHYA	0x0003C	e1000_hw.h	PHY address - RW
30126	E1000_MANC2H	0x05860	e1000_hw.h	Managment Control To Host - RW
30127	E1000_SW_FW_SYNC	0x05B5C	e1000_hw.h	Software-Firmware Synchronization - RW
30128	E1000_GCR	0x05B00	e1000_hw.h	PCI-Ex Control
30129	E1000_GSCL_1	0x05B10	e1000_hw.h	PCI-Ex Statistic Control #1
30130	E1000_GSCL_2	0x05B14	e1000_hw.h	PCI-Ex Statistic Control #2
30131	E1000_GSCL_3	0x05B18	e1000_hw.h	PCI-Ex Statistic Control #3
30132	E1000_GSCL_4	0x05B1C	e1000_hw.h	PCI-Ex Statistic Control #4
30133	E1000_FACTPS	0x05B30	e1000_hw.h	Function Active and Power State to MNG
30134	E1000_SWSM	0x05B50	e1000_hw.h	SW Semaphore
30135	E1000_FWSM	0x05B54	e1000_hw.h	FW Semaphore
30136	E1000_FFLT_DBG	0x05F04	e1000_hw.h	Debug Register
30137	E1000_HICR	0x08F00	e1000_hw.h	Host Inteface Control
30138	E1000_CPUVEC	0x02C10	e1000_hw.h	CPU Vector Register - RW
30139	E1000_MRQC	0x05818	e1000_hw.h	Multiple Receive Control - RW
30140	E1000_RETA	0x05C00	e1000_hw.h	Redirection Table - RW Array
30141	E1000_RSSRK	0x05C80	e1000_hw.h	RSS Random Key - RW Array
30142	E1000_RSSIM	0x05864	e1000_hw.h	RSS Interrupt Mask
30143	E1000_RSSIR	0x05868	e1000_hw.h	RSS Interrupt Request
30144	E1000_82542_CTRL	E1000_CTRL	e1000_hw.h
30145	E1000_82542_CTRL_DUP	E1000_CTRL_DUP	e1000_hw.h
30146	E1000_82542_STATUS	E1000_STATUS	e1000_hw.h
30147	E1000_82542_EECD	E1000_EECD	e1000_hw.h
30148	E1000_82542_EERD	E1000_EERD	e1000_hw.h
30149	E1000_82542_CTRL_EXT	E1000_CTRL_EXT	e1000_hw.h
30150	E1000_82542_FLA	E1000_FLA	e1000_hw.h
30151	E1000_82542_MDIC	E1000_MDIC	e1000_hw.h
30152	E1000_82542_SCTL	E1000_SCTL	e1000_hw.h
30153	E1000_82542_FEXTNVM	E1000_FEXTNVM	e1000_hw.h
30154	E1000_82542_FCAL	E1000_FCAL	e1000_hw.h
30155	E1000_82542_FCAH	E1000_FCAH	e1000_hw.h
30156	E1000_82542_FCT	E1000_FCT	e1000_hw.h
30157	E1000_82542_VET	E1000_VET	e1000_hw.h
30158	E1000_82542_RA	0x00040	e1000_hw.h
30159	E1000_82542_ICR	E1000_ICR	e1000_hw.h
30160	E1000_82542_ITR	E1000_ITR	e1000_hw.h
30161	E1000_82542_ICS	E1000_ICS	e1000_hw.h
30162	E1000_82542_IMS	E1000_IMS	e1000_hw.h
30163	E1000_82542_IMC	E1000_IMC	e1000_hw.h
30164	E1000_82542_RCTL	E1000_RCTL	e1000_hw.h
30165	E1000_82542_RDTR	0x00108	e1000_hw.h
30166	E1000_82542_RDBAL	0x00110	e1000_hw.h
30167	E1000_82542_RDBAH	0x00114	e1000_hw.h
30168	E1000_82542_RDLEN	0x00118	e1000_hw.h
30169	E1000_82542_RDH	0x00120	e1000_hw.h
30170	E1000_82542_RDT	0x00128	e1000_hw.h
30171	E1000_82542_RDTR0	E1000_82542_RDTR	e1000_hw.h
30172	E1000_82542_RDBAL0	E1000_82542_RDBAL	e1000_hw.h
30173	E1000_82542_RDBAH0	E1000_82542_RDBAH	e1000_hw.h
30174	E1000_82542_RDLEN0	E1000_82542_RDLEN	e1000_hw.h
30175	E1000_82542_RDH0	E1000_82542_RDH	e1000_hw.h
30176	E1000_82542_RDT0	E1000_82542_RDT	e1000_hw.h
30177	E1000_82542_RDBAH3	0x02B04	e1000_hw.h	RX Desc Base High Queue 3 - RW
30178	E1000_82542_RDBAL3	0x02B00	e1000_hw.h	RX Desc Low Queue 3 - RW
30179	E1000_82542_RDLEN3	0x02B08	e1000_hw.h	RX Desc Length Queue 3 - RW
30180	E1000_82542_RDH3	0x02B10	e1000_hw.h	RX Desc Head Queue 3 - RW
30181	E1000_82542_RDT3	0x02B18	e1000_hw.h	RX Desc Tail Queue 3 - RW
30182	E1000_82542_RDBAL2	0x02A00	e1000_hw.h	RX Desc Base Low Queue 2 - RW
30183	E1000_82542_RDBAH2	0x02A04	e1000_hw.h	RX Desc Base High Queue 2 - RW
30184	E1000_82542_RDLEN2	0x02A08	e1000_hw.h	RX Desc Length Queue 2 - RW
30185	E1000_82542_RDH2	0x02A10	e1000_hw.h	RX Desc Head Queue 2 - RW
30186	E1000_82542_RDT2	0x02A18	e1000_hw.h	RX Desc Tail Queue 2 - RW
30187	E1000_82542_RDTR1	0x00130	e1000_hw.h
30188	E1000_82542_RDBAL1	0x00138	e1000_hw.h
30189	E1000_82542_RDBAH1	0x0013C	e1000_hw.h
30190	E1000_82542_RDLEN1	0x00140	e1000_hw.h
30191	E1000_82542_RDH1	0x00148	e1000_hw.h
30192	E1000_82542_RDT1	0x00150	e1000_hw.h
30193	E1000_82542_FCRTH	0x00160	e1000_hw.h
30194	E1000_82542_FCRTL	0x00168	e1000_hw.h
30195	E1000_82542_FCTTV	E1000_FCTTV	e1000_hw.h
30196	E1000_82542_TXCW	E1000_TXCW	e1000_hw.h
30197	E1000_82542_RXCW	E1000_RXCW	e1000_hw.h
30198	E1000_82542_MTA	0x00200	e1000_hw.h
30199	E1000_82542_TCTL	E1000_TCTL	e1000_hw.h
30200	E1000_82542_TCTL_EXT	E1000_TCTL_EXT	e1000_hw.h
30201	E1000_82542_TIPG	E1000_TIPG	e1000_hw.h
30202	E1000_82542_TDBAL	0x00420	e1000_hw.h
30203	E1000_82542_TDBAH	0x00424	e1000_hw.h
30204	E1000_82542_TDLEN	0x00428	e1000_hw.h
30205	E1000_82542_TDH	0x00430	e1000_hw.h
30206	E1000_82542_TDT	0x00438	e1000_hw.h
30207	E1000_82542_TIDV	0x00440	e1000_hw.h
30208	E1000_82542_TBT	E1000_TBT	e1000_hw.h
30209	E1000_82542_AIT	E1000_AIT	e1000_hw.h
30210	E1000_82542_VFTA	0x00600	e1000_hw.h
30211	E1000_82542_LEDCTL	E1000_LEDCTL	e1000_hw.h
30212	E1000_82542_PBA	E1000_PBA	e1000_hw.h
30213	E1000_82542_PBS	E1000_PBS	e1000_hw.h
30214	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
30215	E1000_82542_EEARBC	E1000_EEARBC	e1000_hw.h
30216	E1000_82542_FLASHT	E1000_FLASHT	e1000_hw.h
30217	E1000_82542_EEWR	E1000_EEWR	e1000_hw.h
30218	E1000_82542_FLSWCTL	E1000_FLSWCTL	e1000_hw.h
30219	E1000_82542_FLSWDATA	E1000_FLSWDATA	e1000_hw.h
30220	E1000_82542_FLSWCNT	E1000_FLSWCNT	e1000_hw.h
30221	E1000_82542_FLOP	E1000_FLOP	e1000_hw.h
30222	E1000_82542_EXTCNF_CTRL	E1000_EXTCNF_CTRL	e1000_hw.h
30223	E1000_82542_EXTCNF_SIZE	E1000_EXTCNF_SIZE	e1000_hw.h
30224	E1000_82542_PHY_CTRL	E1000_PHY_CTRL	e1000_hw.h
30225	E1000_82542_ERT	E1000_ERT	e1000_hw.h
30226	E1000_82542_RXDCTL	E1000_RXDCTL	e1000_hw.h
30227	E1000_82542_RXDCTL1	E1000_RXDCTL1	e1000_hw.h
30228	E1000_82542_RADV	E1000_RADV	e1000_hw.h
30229	E1000_82542_RSRPD	E1000_RSRPD	e1000_hw.h
30230	E1000_82542_TXDMAC	E1000_TXDMAC	e1000_hw.h
30231	E1000_82542_KABGTXD	E1000_KABGTXD	e1000_hw.h
30232	E1000_82542_TDFHS	E1000_TDFHS	e1000_hw.h
30233	E1000_82542_TDFTS	E1000_TDFTS	e1000_hw.h
30234	E1000_82542_TDFPC	E1000_TDFPC	e1000_hw.h
30235	E1000_82542_TXDCTL	E1000_TXDCTL	e1000_hw.h
30236	E1000_82542_TADV	E1000_TADV	e1000_hw.h
30237	E1000_82542_TSPMT	E1000_TSPMT	e1000_hw.h
30238	E1000_82542_CRCERRS	E1000_CRCERRS	e1000_hw.h
30239	E1000_82542_ALGNERRC	E1000_ALGNERRC	e1000_hw.h
30240	E1000_82542_SYMERRS	E1000_SYMERRS	e1000_hw.h
30241	E1000_82542_RXERRC	E1000_RXERRC	e1000_hw.h
30242	E1000_82542_MPC	E1000_MPC	e1000_hw.h
30243	E1000_82542_SCC	E1000_SCC	e1000_hw.h
30244	E1000_82542_ECOL	E1000_ECOL	e1000_hw.h
30245	E1000_82542_MCC	E1000_MCC	e1000_hw.h
30246	E1000_82542_LATECOL	E1000_LATECOL	e1000_hw.h
30247	E1000_82542_COLC	E1000_COLC	e1000_hw.h
30248	E1000_82542_DC	E1000_DC	e1000_hw.h
30249	E1000_82542_TNCRS	E1000_TNCRS	e1000_hw.h
30250	E1000_82542_SEC	E1000_SEC	e1000_hw.h
30251	E1000_82542_CEXTERR	E1000_CEXTERR	e1000_hw.h
30252	E1000_82542_RLEC	E1000_RLEC	e1000_hw.h
30253	E1000_82542_XONRXC	E1000_XONRXC	e1000_hw.h
30254	E1000_82542_XONTXC	E1000_XONTXC	e1000_hw.h
30255	E1000_82542_XOFFRXC	E1000_XOFFRXC	e1000_hw.h
30256	E1000_82542_XOFFTXC	E1000_XOFFTXC	e1000_hw.h
30257	E1000_82542_FCRUC	E1000_FCRUC	e1000_hw.h
30258	E1000_82542_PRC64	E1000_PRC64	e1000_hw.h
30259	E1000_82542_PRC127	E1000_PRC127	e1000_hw.h
30260	E1000_82542_PRC255	E1000_PRC255	e1000_hw.h
30261	E1000_82542_PRC511	E1000_PRC511	e1000_hw.h
30262	E1000_82542_PRC1023	E1000_PRC1023	e1000_hw.h
30263	E1000_82542_PRC1522	E1000_PRC1522	e1000_hw.h
30264	E1000_82542_GPRC	E1000_GPRC	e1000_hw.h
30265	E1000_82542_BPRC	E1000_BPRC	e1000_hw.h
30266	E1000_82542_MPRC	E1000_MPRC	e1000_hw.h
30267	E1000_82542_GPTC	E1000_GPTC	e1000_hw.h
30268	E1000_82542_GORCL	E1000_GORCL	e1000_hw.h
30269	E1000_82542_GORCH	E1000_GORCH	e1000_hw.h
30270	E1000_82542_GOTCL	E1000_GOTCL	e1000_hw.h
30271	E1000_82542_GOTCH	E1000_GOTCH	e1000_hw.h
30272	E1000_82542_RNBC	E1000_RNBC	e1000_hw.h
30273	E1000_82542_RUC	E1000_RUC	e1000_hw.h
30274	E1000_82542_RFC	E1000_RFC	e1000_hw.h
30275	E1000_82542_ROC	E1000_ROC	e1000_hw.h
30276	E1000_82542_RJC	E1000_RJC	e1000_hw.h
30277	E1000_82542_MGTPRC	E1000_MGTPRC	e1000_hw.h
30278	E1000_82542_MGTPDC	E1000_MGTPDC	e1000_hw.h
30279	E1000_82542_MGTPTC	E1000_MGTPTC	e1000_hw.h
30280	E1000_82542_TORL	E1000_TORL	e1000_hw.h
30281	E1000_82542_TORH	E1000_TORH	e1000_hw.h
30282	E1000_82542_TOTL	E1000_TOTL	e1000_hw.h
30283	E1000_82542_TOTH	E1000_TOTH	e1000_hw.h
30284	E1000_82542_TPR	E1000_TPR	e1000_hw.h
30285	E1000_82542_TPT	E1000_TPT	e1000_hw.h
30286	E1000_82542_PTC64	E1000_PTC64	e1000_hw.h
30287	E1000_82542_PTC127	E1000_PTC127	e1000_hw.h
30288	E1000_82542_PTC255	E1000_PTC255	e1000_hw.h
30289	E1000_82542_PTC511	E1000_PTC511	e1000_hw.h
30290	E1000_82542_PTC1023	E1000_PTC1023	e1000_hw.h
30291	E1000_82542_PTC1522	E1000_PTC1522	e1000_hw.h
30292	E1000_82542_MPTC	E1000_MPTC	e1000_hw.h
30293	E1000_82542_BPTC	E1000_BPTC	e1000_hw.h
30294	E1000_82542_TSCTC	E1000_TSCTC	e1000_hw.h
30295	E1000_82542_TSCTFC	E1000_TSCTFC	e1000_hw.h
30296	E1000_82542_RXCSUM	E1000_RXCSUM	e1000_hw.h
30297	E1000_82542_WUC	E1000_WUC	e1000_hw.h
30298	E1000_82542_WUFC	E1000_WUFC	e1000_hw.h
30299	E1000_82542_WUS	E1000_WUS	e1000_hw.h
30300	E1000_82542_MANC	E1000_MANC	e1000_hw.h
30301	E1000_82542_IPAV	E1000_IPAV	e1000_hw.h
30302	E1000_82542_IP4AT	E1000_IP4AT	e1000_hw.h
30303	E1000_82542_IP6AT	E1000_IP6AT	e1000_hw.h
30304	E1000_82542_WUPL	E1000_WUPL	e1000_hw.h
30305	E1000_82542_WUPM	E1000_WUPM	e1000_hw.h
30306	E1000_82542_FFLT	E1000_FFLT	e1000_hw.h
30307	E1000_82542_TDFH	0x08010	e1000_hw.h
30308	E1000_82542_TDFT	0x08018	e1000_hw.h
30309	E1000_82542_FFMT	E1000_FFMT	e1000_hw.h
30310	E1000_82542_FFVT	E1000_FFVT	e1000_hw.h
30311	E1000_82542_HOST_IF	E1000_HOST_IF	e1000_hw.h
30312	E1000_82542_IAM	E1000_IAM	e1000_hw.h
30313	E1000_82542_EEMNGCTL	E1000_EEMNGCTL	e1000_hw.h
30314	E1000_82542_PSRCTL	E1000_PSRCTL	e1000_hw.h
30315	E1000_82542_RAID	E1000_RAID	e1000_hw.h
30316	E1000_82542_TARC0	E1000_TARC0	e1000_hw.h
30317	E1000_82542_TDBAL1	E1000_TDBAL1	e1000_hw.h
30318	E1000_82542_TDBAH1	E1000_TDBAH1	e1000_hw.h
30319	E1000_82542_TDLEN1	E1000_TDLEN1	e1000_hw.h
30320	E1000_82542_TDH1	E1000_TDH1	e1000_hw.h
30321	E1000_82542_TDT1	E1000_TDT1	e1000_hw.h
30322	E1000_82542_TXDCTL1	E1000_TXDCTL1	e1000_hw.h
30323	E1000_82542_TARC1	E1000_TARC1	e1000_hw.h
30324	E1000_82542_RFCTL	E1000_RFCTL	e1000_hw.h
30325	E1000_82542_GCR	E1000_GCR	e1000_hw.h
30326	E1000_82542_GSCL_1	E1000_GSCL_1	e1000_hw.h
30327	E1000_82542_GSCL_2	E1000_GSCL_2	e1000_hw.h
30328	E1000_82542_GSCL_3	E1000_GSCL_3	e1000_hw.h
30329	E1000_82542_GSCL_4	E1000_GSCL_4	e1000_hw.h
30330	E1000_82542_FACTPS	E1000_FACTPS	e1000_hw.h
30331	E1000_82542_SWSM	E1000_SWSM	e1000_hw.h
30332	E1000_82542_FWSM	E1000_FWSM	e1000_hw.h
30333	E1000_82542_FFLT_DBG	E1000_FFLT_DBG	e1000_hw.h
30334	E1000_82542_IAC	E1000_IAC	e1000_hw.h
30335	E1000_82542_ICRXPTC	E1000_ICRXPTC	e1000_hw.h
30336	E1000_82542_ICRXATC	E1000_ICRXATC	e1000_hw.h
30337	E1000_82542_ICTXPTC	E1000_ICTXPTC	e1000_hw.h
30338	E1000_82542_ICTXATC	E1000_ICTXATC	e1000_hw.h
30339	E1000_82542_ICTXQEC	E1000_ICTXQEC	e1000_hw.h
30340	E1000_82542_ICTXQMTC	E1000_ICTXQMTC	e1000_hw.h
30341	E1000_82542_ICRXDMTC	E1000_ICRXDMTC	e1000_hw.h
30342	E1000_82542_ICRXOC	E1000_ICRXOC	e1000_hw.h
30343	E1000_82542_HICR	E1000_HICR	e1000_hw.h
30344	E1000_82542_CPUVEC	E1000_CPUVEC	e1000_hw.h
30345	E1000_82542_MRQC	E1000_MRQC	e1000_hw.h
30346	E1000_82542_RETA	E1000_RETA	e1000_hw.h
30347	E1000_82542_RSSRK	E1000_RSSRK	e1000_hw.h
30348	E1000_82542_RSSIM	E1000_RSSIM	e1000_hw.h
30349	E1000_82542_RSSIR	E1000_RSSIR	e1000_hw.h
30350	E1000_82542_KUMCTRLSTA	E1000_KUMCTRLSTA	e1000_hw.h
30351	E1000_82542_SW_FW_SYNC	E1000_SW_FW_SYNC	e1000_hw.h
30352	E1000_82542_MANC2H	E1000_MANC2H	e1000_hw.h
30353	E1000_EEPROM_SWDPIN0	0x0001	e1000_hw.h	SWDPIN 0 EEPROM Value
30354	E1000_EEPROM_LED_LOGIC	0x0020	e1000_hw.h	Led Logic Word
30355	E1000_EEPROM_RW_REG_DATA	16	e1000_hw.h	Offset to data in EEPROM read/write registers
30356	E1000_EEPROM_RW_REG_DONE	2	e1000_hw.h	Offset to READ/WRITE done bit
30357	E1000_EEPROM_RW_REG_START	1	e1000_hw.h	First bit for telling part to start operation
30358	E1000_EEPROM_RW_ADDR_SHIFT	2	e1000_hw.h	Shift to the address bits
30359	E1000_EEPROM_POLL_WRITE	1	e1000_hw.h	Flag for polling for write complete
30360	E1000_EEPROM_POLL_READ	0	e1000_hw.h	Flag for polling for read complete
30361	E1000_CTRL_FD	0x00000001	e1000_hw.h	Full duplex.0=half; 1=full
30362	E1000_CTRL_BEM	0x00000002	e1000_hw.h	Endian Mode.0=little,1=big
30363	E1000_CTRL_PRIOR	0x00000004	e1000_hw.h	Priority on PCI. 0=rx,1=fair
30364	E1000_CTRL_GIO_MASTER_DISABLE	0x00000004	e1000_hw.h	Blocks new Master requests
30365	E1000_CTRL_LRST	0x00000008	e1000_hw.h	Link reset. 0=normal,1=reset
30366	E1000_CTRL_TME	0x00000010	e1000_hw.h	Test mode. 0=normal,1=test
30367	E1000_CTRL_SLE	0x00000020	e1000_hw.h	Serial Link on 0=dis,1=en
30368	E1000_CTRL_ASDE	0x00000020	e1000_hw.h	Auto-speed detect enable
30369	E1000_CTRL_SLU	0x00000040	e1000_hw.h	Set link up (Force Link)
30370	E1000_CTRL_ILOS	0x00000080	e1000_hw.h	Invert Loss-Of Signal
30371	E1000_CTRL_SPD_SEL	0x00000300	e1000_hw.h	Speed Select Mask
30372	E1000_CTRL_SPD_10	0x00000000	e1000_hw.h	Force 10Mb
30373	E1000_CTRL_SPD_100	0x00000100	e1000_hw.h	Force 100Mb
30374	E1000_CTRL_SPD_1000	0x00000200	e1000_hw.h	Force 1Gb
30375	E1000_CTRL_BEM32	0x00000400	e1000_hw.h	Big Endian 32 mode
30376	E1000_CTRL_FRCSPD	0x00000800	e1000_hw.h	Force Speed
30377	E1000_CTRL_FRCDPX	0x00001000	e1000_hw.h	Force Duplex
30378	E1000_CTRL_D_UD_EN	0x00002000	e1000_hw.h	Dock/Undock enable
30379	E1000_CTRL_D_UD_POLARITY	0x00004000	e1000_hw.h	Defined polarity of Dock/Undock indication in SDP[0]
30380	E1000_CTRL_FORCE_PHY_RESET	0x00008000	e1000_hw.h	Reset both PHY ports, through PHYRST_N pin
30381	E1000_CTRL_EXT_LINK_EN	0x00010000	e1000_hw.h	enable link status from external LINK_0 and LINK_1 pins
30382	E1000_CTRL_SWDPIN0	0x00040000	e1000_hw.h	SWDPIN 0 value
30383	E1000_CTRL_SWDPIN1	0x00080000	e1000_hw.h	SWDPIN 1 value
30384	E1000_CTRL_SWDPIN2	0x00100000	e1000_hw.h	SWDPIN 2 value
30385	E1000_CTRL_SWDPIN3	0x00200000	e1000_hw.h	SWDPIN 3 value
30386	E1000_CTRL_SWDPIO0	0x00400000	e1000_hw.h	SWDPIN 0 Input or output
30387	E1000_CTRL_SWDPIO1	0x00800000	e1000_hw.h	SWDPIN 1 input or output
30388	E1000_CTRL_SWDPIO2	0x01000000	e1000_hw.h	SWDPIN 2 input or output
30389	E1000_CTRL_SWDPIO3	0x02000000	e1000_hw.h	SWDPIN 3 input or output
30390	E1000_CTRL_RST	0x04000000	e1000_hw.h	Global reset
30391	E1000_CTRL_RFCE	0x08000000	e1000_hw.h	Receive Flow Control enable
30392	E1000_CTRL_TFCE	0x10000000	e1000_hw.h	Transmit flow control enable
30393	E1000_CTRL_RTE	0x20000000	e1000_hw.h	Routing tag enable
30394	E1000_CTRL_VME	0x40000000	e1000_hw.h	IEEE VLAN mode enable
30395	E1000_CTRL_PHY_RST	0x80000000	e1000_hw.h	PHY Reset
30396	E1000_CTRL_SW2FW_INT	0x02000000	e1000_hw.h	Initiate an interrupt to manageability engine
30397	E1000_STATUS_FD	0x00000001	e1000_hw.h	Full duplex.0=half,1=full
30398	E1000_STATUS_LU	0x00000002	e1000_hw.h	Link up.0=no,1=link
30399	E1000_STATUS_FUNC_MASK	0x0000000C	e1000_hw.h	PCI Function Mask
30400	E1000_STATUS_FUNC_SHIFT	2	e1000_hw.h
30401	E1000_STATUS_FUNC_0	0x00000000	e1000_hw.h	Function 0
30402	E1000_STATUS_FUNC_1	0x00000004	e1000_hw.h	Function 1
30403	E1000_STATUS_TXOFF	0x00000010	e1000_hw.h	transmission paused
30404	E1000_STATUS_TBIMODE	0x00000020	e1000_hw.h	TBI mode
30405	E1000_STATUS_SPEED_MASK	0x000000C0	e1000_hw.h
30406	E1000_STATUS_SPEED_10	0x00000000	e1000_hw.h	Speed 10Mb/s
30407	E1000_STATUS_SPEED_100	0x00000040	e1000_hw.h	Speed 100Mb/s
30408	E1000_STATUS_SPEED_1000	0x00000080	e1000_hw.h	Speed 1000Mb/s
30409	E1000_STATUS_LAN_INIT_DONE	0x00000200	e1000_hw.h	Lan Init Completion
30410	E1000_STATUS_ASDV	0x00000300	e1000_hw.h	Auto speed detect value
30411	E1000_STATUS_DOCK_CI	0x00000800	e1000_hw.h	Change in Dock/Undock state. Clear on write '0'.
30412	E1000_STATUS_GIO_MASTER_ENABLE	0x00080000	e1000_hw.h	Status of Master requests.
30413	E1000_STATUS_MTXCKOK	0x00000400	e1000_hw.h	MTX clock running OK
30414	E1000_STATUS_PCI66	0x00000800	e1000_hw.h	In 66Mhz slot
30415	E1000_STATUS_BUS64	0x00001000	e1000_hw.h	In 64 bit slot
30416	E1000_STATUS_PCIX_MODE	0x00002000	e1000_hw.h	PCI-X mode
30417	E1000_STATUS_PCIX_SPEED	0x0000C000	e1000_hw.h	PCI-X bus speed
30418	E1000_STATUS_BMC_SKU_0	0x00100000	e1000_hw.h	BMC USB redirect disabled
30419	E1000_STATUS_BMC_SKU_1	0x00200000	e1000_hw.h	BMC SRAM disabled
30420	E1000_STATUS_BMC_SKU_2	0x00400000	e1000_hw.h	BMC SDRAM disabled
30421	E1000_STATUS_BMC_CRYPTO	0x00800000	e1000_hw.h	BMC crypto disabled
30422	E1000_STATUS_BMC_LITE	0x01000000	e1000_hw.h	BMC external code execution disabled
30423	E1000_STATUS_RGMII_ENABLE	0x02000000	e1000_hw.h	RGMII disabled
30424	E1000_STATUS_FUSE_8	0x04000000	e1000_hw.h
30425	E1000_STATUS_FUSE_9	0x08000000	e1000_hw.h
30426	E1000_STATUS_SERDES0_DIS	0x10000000	e1000_hw.h	SERDES disabled on port 0
30427	E1000_STATUS_SERDES1_DIS	0x20000000	e1000_hw.h	SERDES disabled on port 1
30428	E1000_STATUS_PCIX_SPEED_66	0x00000000	e1000_hw.h	PCI-X bus speed 50-66 MHz
30429	E1000_STATUS_PCIX_SPEED_100	0x00004000	e1000_hw.h	PCI-X bus speed 66-100 MHz
30430	E1000_STATUS_PCIX_SPEED_133	0x00008000	e1000_hw.h	PCI-X bus speed 100-133 MHz
30431	E1000_EECD_SK	0x00000001	e1000_hw.h	EEPROM Clock
30432	E1000_EECD_CS	0x00000002	e1000_hw.h	EEPROM Chip Select
30433	E1000_EECD_DI	0x00000004	e1000_hw.h	EEPROM Data In
30434	E1000_EECD_DO	0x00000008	e1000_hw.h	EEPROM Data Out
30435	E1000_EECD_FWE_MASK	0x00000030	e1000_hw.h
30436	E1000_EECD_FWE_DIS	0x00000010	e1000_hw.h	Disable FLASH writes
30437	E1000_EECD_FWE_EN	0x00000020	e1000_hw.h	Enable FLASH writes
30438	E1000_EECD_FWE_SHIFT	4	e1000_hw.h
30439	E1000_EECD_REQ	0x00000040	e1000_hw.h	EEPROM Access Request
30440	E1000_EECD_GNT	0x00000080	e1000_hw.h	EEPROM Access Grant
30441	E1000_EECD_PRES	0x00000100	e1000_hw.h	EEPROM Present
30442	E1000_EECD_SIZE	0x00000200	e1000_hw.h	EEPROM Size (0=64 word 1=256 word)
30443	E1000_EECD_ADDR_BITS	0x00000400	e1000_hw.h	EEPROM Addressing bits based on type
30444	E1000_EECD_TYPE	0x00002000	e1000_hw.h	EEPROM Type (1-SPI, 0-Microwire)
30445	E1000_EEPROM_GRANT_ATTEMPTS	1000	e1000_hw.h	EEPROM # attempts to gain grant
30446	E1000_EECD_AUTO_RD	0x00000200	e1000_hw.h	EEPROM Auto Read done
30447	E1000_EECD_SIZE_EX_MASK	0x00007800	e1000_hw.h	EEprom Size
30448	E1000_EECD_SIZE_EX_SHIFT	11	e1000_hw.h
30449	E1000_EECD_NVADDS	0x00018000	e1000_hw.h	NVM Address Size
30450	E1000_EECD_SELSHAD	0x00020000	e1000_hw.h	Select Shadow RAM
30451	E1000_EECD_INITSRAM	0x00040000	e1000_hw.h	Initialize Shadow RAM
30452	E1000_EECD_FLUPD	0x00080000	e1000_hw.h	Update FLASH
30453	E1000_EECD_AUPDEN	0x00100000	e1000_hw.h	Enable Autonomous FLASH update
30454	E1000_EECD_SHADV	0x00200000	e1000_hw.h	Shadow RAM Data Valid
30455	E1000_EECD_SEC1VAL	0x00400000	e1000_hw.h	Sector One Valid
30456	E1000_EECD_SECVAL_SHIFT	22	e1000_hw.h
30457	E1000_STM_OPCODE	0xDB00	e1000_hw.h
30458	E1000_HICR_FW_RESET	0xC0	e1000_hw.h
30459	E1000_SHADOW_RAM_WORDS	2048	e1000_hw.h
30460	E1000_ICH_NVM_SIG_WORD	0x13	e1000_hw.h
30461	E1000_ICH_NVM_SIG_MASK	0xC0	e1000_hw.h
30462	E1000_EERD_START	0x00000001	e1000_hw.h	Start Read
30463	E1000_EERD_DONE	0x00000010	e1000_hw.h	Read Done
30464	E1000_EERD_ADDR_SHIFT	8	e1000_hw.h
30465	E1000_EERD_ADDR_MASK	0x0000FF00	e1000_hw.h	Read Address
30466	E1000_EERD_DATA_SHIFT	16	e1000_hw.h
30467	E1000_EERD_DATA_MASK	0xFFFF0000	e1000_hw.h	Read Data
30468	EEPROM_STATUS_RDY_SPI	0x01	e1000_hw.h
30469	EEPROM_STATUS_WEN_SPI	0x02	e1000_hw.h
30470	EEPROM_STATUS_BP0_SPI	0x04	e1000_hw.h
30471	EEPROM_STATUS_BP1_SPI	0x08	e1000_hw.h
30472	EEPROM_STATUS_WPEN_SPI	0x80	e1000_hw.h
30473	E1000_CTRL_EXT_GPI0_EN	0x00000001	e1000_hw.h	Maps SDP4 to GPI0
30474	E1000_CTRL_EXT_GPI1_EN	0x00000002	e1000_hw.h	Maps SDP5 to GPI1
30475	E1000_CTRL_EXT_PHYINT_EN	E1000_CTRL_EXT_GPI1_EN	e1000_hw.h
30476	E1000_CTRL_EXT_GPI2_EN	0x00000004	e1000_hw.h	Maps SDP6 to GPI2
30477	E1000_CTRL_EXT_GPI3_EN	0x00000008	e1000_hw.h	Maps SDP7 to GPI3
30478	E1000_CTRL_EXT_SDP4_DATA	0x00000010	e1000_hw.h	Value of SW Defineable Pin 4
30479	E1000_CTRL_EXT_SDP5_DATA	0x00000020	e1000_hw.h	Value of SW Defineable Pin 5
30480	E1000_CTRL_EXT_PHY_INT	E1000_CTRL_EXT_SDP5_DATA	e1000_hw.h
30481	E1000_CTRL_EXT_SDP6_DATA	0x00000040	e1000_hw.h	Value of SW Defineable Pin 6
30482	E1000_CTRL_EXT_SDP7_DATA	0x00000080	e1000_hw.h	Value of SW Defineable Pin 7
30483	E1000_CTRL_EXT_SDP4_DIR	0x00000100	e1000_hw.h	Direction of SDP4 0=in 1=out
30484	E1000_CTRL_EXT_SDP5_DIR	0x00000200	e1000_hw.h	Direction of SDP5 0=in 1=out
30485	E1000_CTRL_EXT_SDP6_DIR	0x00000400	e1000_hw.h	Direction of SDP6 0=in 1=out
30486	E1000_CTRL_EXT_SDP7_DIR	0x00000800	e1000_hw.h	Direction of SDP7 0=in 1=out
30487	E1000_CTRL_EXT_ASDCHK	0x00001000	e1000_hw.h	Initiate an ASD sequence
30488	E1000_CTRL_EXT_EE_RST	0x00002000	e1000_hw.h	Reinitialize from EEPROM
30489	E1000_CTRL_EXT_IPS	0x00004000	e1000_hw.h	Invert Power State
30490	E1000_CTRL_EXT_SPD_BYPS	0x00008000	e1000_hw.h	Speed Select Bypass
30491	E1000_CTRL_EXT_RO_DIS	0x00020000	e1000_hw.h	Relaxed Ordering disable
30492	E1000_CTRL_EXT_LINK_MODE_MASK	0x00C00000	e1000_hw.h
30493	E1000_CTRL_EXT_LINK_MODE_GMII	0x00000000	e1000_hw.h
30494	E1000_CTRL_EXT_LINK_MODE_TBI	0x00C00000	e1000_hw.h
30495	E1000_CTRL_EXT_LINK_MODE_KMRN	0x00000000	e1000_hw.h
30496	E1000_CTRL_EXT_LINK_MODE_SERDES	0x00C00000	e1000_hw.h
30497	E1000_CTRL_EXT_LINK_MODE_SGMII	0x00800000	e1000_hw.h
30498	E1000_CTRL_EXT_WR_WMARK_MASK	0x03000000	e1000_hw.h
30499	E1000_CTRL_EXT_WR_WMARK_256	0x00000000	e1000_hw.h
30500	E1000_CTRL_EXT_WR_WMARK_320	0x01000000	e1000_hw.h
30501	E1000_CTRL_EXT_WR_WMARK_384	0x02000000	e1000_hw.h
30502	E1000_CTRL_EXT_WR_WMARK_448	0x03000000	e1000_hw.h
30503	E1000_CTRL_EXT_DRV_LOAD	0x10000000	e1000_hw.h	Driver loaded bit for FW
30504	E1000_CTRL_EXT_IAME	0x08000000	e1000_hw.h	Interrupt acknowledge Auto-mask
30505	E1000_CTRL_EXT_INT_TIMER_CLR	0x20000000	e1000_hw.h	Clear Interrupt timers after IMS clear
30506	E1000_CRTL_EXT_PB_PAREN	0x01000000	e1000_hw.h	packet buffer parity error detection enabled
30507	E1000_CTRL_EXT_DF_PAREN	0x02000000	e1000_hw.h	descriptor FIFO parity error detection enable
30508	E1000_CTRL_EXT_GHOST_PAREN	0x40000000	e1000_hw.h
30509	E1000_MDIC_DATA_MASK	0x0000FFFF	e1000_hw.h
30510	E1000_MDIC_REG_MASK	0x001F0000	e1000_hw.h
30511	E1000_MDIC_REG_SHIFT	16	e1000_hw.h
30512	E1000_MDIC_PHY_MASK	0x03E00000	e1000_hw.h
30513	E1000_MDIC_PHY_SHIFT	21	e1000_hw.h
30514	E1000_MDIC_OP_WRITE	0x04000000	e1000_hw.h
30515	E1000_MDIC_OP_READ	0x08000000	e1000_hw.h
30516	E1000_MDIC_READY	0x10000000	e1000_hw.h
30517	E1000_MDIC_INT_EN	0x20000000	e1000_hw.h
30518	E1000_MDIC_ERROR	0x40000000	e1000_hw.h
30519	E1000_KUMCTRLSTA_MASK	0x0000FFFF	e1000_hw.h
30520	E1000_KUMCTRLSTA_OFFSET	0x001F0000	e1000_hw.h
30521	E1000_KUMCTRLSTA_OFFSET_SHIFT	16	e1000_hw.h
30522	E1000_KUMCTRLSTA_REN	0x00200000	e1000_hw.h
30523	E1000_KUMCTRLSTA_OFFSET_FIFO_CT	0x00000000	e1000_hw.h
30524	E1000_KUMCTRLSTA_OFFSET_CTRL	0x00000001	e1000_hw.h
30525	E1000_KUMCTRLSTA_OFFSET_INB_CTR	0x00000002	e1000_hw.h
30526	E1000_KUMCTRLSTA_OFFSET_DIAG	0x00000003	e1000_hw.h
30527	E1000_KUMCTRLSTA_OFFSET_TIMEOUT	0x00000004	e1000_hw.h
30528	E1000_KUMCTRLSTA_OFFSET_INB_PAR	0x00000009	e1000_hw.h
30529	E1000_KUMCTRLSTA_OFFSET_HD_CTRL	0x00000010	e1000_hw.h
30530	E1000_KUMCTRLSTA_OFFSET_M2P_SER	0x0000001E	e1000_hw.h
30531	E1000_KUMCTRLSTA_OFFSET_M2P_MOD	0x0000001F	e1000_hw.h
30532	E1000_KUMCTRLSTA_FIFO_CTRL_RX_B	0x00000008	e1000_hw.h
30533	E1000_KUMCTRLSTA_FIFO_CTRL_TX_B	0x00000800	e1000_hw.h
30534	E1000_KUMCTRLSTA_INB_CTRL_LINK_	0x00000500	e1000_hw.h
30535	E1000_KUMCTRLSTA_INB_CTRL_DIS_P	0x00000010	e1000_hw.h
30536	E1000_KUMCTRLSTA_HD_CTRL_10_100	0x00000004	e1000_hw.h
30537	E1000_KUMCTRLSTA_HD_CTRL_1000_D	0x00000000	e1000_hw.h
30538	E1000_KUMCTRLSTA_OFFSET_K0S_CTR	0x0000001E	e1000_hw.h
30539	E1000_KUMCTRLSTA_DIAG_FELPBK	0x2000	e1000_hw.h
30540	E1000_KUMCTRLSTA_DIAG_NELPBK	0x1000	e1000_hw.h
30541	E1000_KUMCTRLSTA_K0S_100_EN	0x2000	e1000_hw.h
30542	E1000_KUMCTRLSTA_K0S_GBE_EN	0x1000	e1000_hw.h
30543	E1000_KUMCTRLSTA_K0S_ENTRY_LATE	0x0003	e1000_hw.h
30544	E1000_KABGTXD_BGSQLBIAS	0x00050000	e1000_hw.h
30545	E1000_PHY_CTRL_SPD_EN	0x00000001	e1000_hw.h
30546	E1000_PHY_CTRL_D0A_LPLU	0x00000002	e1000_hw.h
30547	E1000_PHY_CTRL_NOND0A_LPLU	0x00000004	e1000_hw.h
30548	E1000_PHY_CTRL_NOND0A_GBE_DISAB	0x00000008	e1000_hw.h
30549	E1000_PHY_CTRL_GBE_DISABLE	0x00000040	e1000_hw.h
30550	E1000_PHY_CTRL_B2B_EN	0x00000080	e1000_hw.h
30551	E1000_LEDCTL_LED0_MODE_MASK	0x0000000F	e1000_hw.h
30552	E1000_LEDCTL_LED0_MODE_SHIFT	0	e1000_hw.h
30553	E1000_LEDCTL_LED0_BLINK_RATE	0x0000020	e1000_hw.h
30554	E1000_LEDCTL_LED0_IVRT	0x00000040	e1000_hw.h
30555	E1000_LEDCTL_LED0_BLINK	0x00000080	e1000_hw.h
30556	E1000_LEDCTL_LED1_MODE_MASK	0x00000F00	e1000_hw.h
30557	E1000_LEDCTL_LED1_MODE_SHIFT	8	e1000_hw.h
30558	E1000_LEDCTL_LED1_BLINK_RATE	0x0002000	e1000_hw.h
30559	E1000_LEDCTL_LED1_IVRT	0x00004000	e1000_hw.h
30560	E1000_LEDCTL_LED1_BLINK	0x00008000	e1000_hw.h
30561	E1000_LEDCTL_LED2_MODE_MASK	0x000F0000	e1000_hw.h
30562	E1000_LEDCTL_LED2_MODE_SHIFT	16	e1000_hw.h
30563	E1000_LEDCTL_LED2_BLINK_RATE	0x00200000	e1000_hw.h
30564	E1000_LEDCTL_LED2_IVRT	0x00400000	e1000_hw.h
30565	E1000_LEDCTL_LED2_BLINK	0x00800000	e1000_hw.h
30566	E1000_LEDCTL_LED3_MODE_MASK	0x0F000000	e1000_hw.h
30567	E1000_LEDCTL_LED3_MODE_SHIFT	24	e1000_hw.h
30568	E1000_LEDCTL_LED3_BLINK_RATE	0x20000000	e1000_hw.h
30569	E1000_LEDCTL_LED3_IVRT	0x40000000	e1000_hw.h
30570	E1000_LEDCTL_LED3_BLINK	0x80000000	e1000_hw.h
30571	E1000_LEDCTL_MODE_LINK_10_1000	0x0	e1000_hw.h
30572	E1000_LEDCTL_MODE_LINK_100_1000	0x1	e1000_hw.h
30573	E1000_LEDCTL_MODE_LINK_UP	0x2	e1000_hw.h
30574	E1000_LEDCTL_MODE_ACTIVITY	0x3	e1000_hw.h
30575	E1000_LEDCTL_MODE_LINK_ACTIVITY	0x4	e1000_hw.h
30576	E1000_LEDCTL_MODE_LINK_10	0x5	e1000_hw.h
30577	E1000_LEDCTL_MODE_LINK_100	0x6	e1000_hw.h
30578	E1000_LEDCTL_MODE_LINK_1000	0x7	e1000_hw.h
30579	E1000_LEDCTL_MODE_PCIX_MODE	0x8	e1000_hw.h
30580	E1000_LEDCTL_MODE_FULL_DUPLEX	0x9	e1000_hw.h
30581	E1000_LEDCTL_MODE_COLLISION	0xA	e1000_hw.h
30582	E1000_LEDCTL_MODE_BUS_SPEED	0xB	e1000_hw.h
30583	E1000_LEDCTL_MODE_BUS_SIZE	0xC	e1000_hw.h
30584	E1000_LEDCTL_MODE_PAUSED	0xD	e1000_hw.h
30585	E1000_LEDCTL_MODE_LED_ON	0xE	e1000_hw.h
30586	E1000_LEDCTL_MODE_LED_OFF	0xF	e1000_hw.h
30587	E1000_RAH_AV	0x80000000	e1000_hw.h	Receive descriptor valid
30588	E1000_ICR_TXDW	0x00000001	e1000_hw.h	Transmit desc written back
30589	E1000_ICR_TXQE	0x00000002	e1000_hw.h	Transmit Queue empty
30590	E1000_ICR_LSC	0x00000004	e1000_hw.h	Link Status Change
30591	E1000_ICR_RXSEQ	0x00000008	e1000_hw.h	rx sequence error
30592	E1000_ICR_RXDMT0	0x00000010	e1000_hw.h	rx desc min. threshold (0)
30593	E1000_ICR_RXO	0x00000040	e1000_hw.h	rx overrun
30594	E1000_ICR_RXT0	0x00000080	e1000_hw.h	rx timer intr (ring 0)
30595	E1000_ICR_MDAC	0x00000200	e1000_hw.h	MDIO access complete
30596	E1000_ICR_RXCFG	0x00000400	e1000_hw.h	RX /c/ ordered set
30597	E1000_ICR_GPI_EN0	0x00000800	e1000_hw.h	GP Int 0
30598	E1000_ICR_GPI_EN1	0x00001000	e1000_hw.h	GP Int 1
30599	E1000_ICR_GPI_EN2	0x00002000	e1000_hw.h	GP Int 2
30600	E1000_ICR_GPI_EN3	0x00004000	e1000_hw.h	GP Int 3
30601	E1000_ICR_TXD_LOW	0x00008000	e1000_hw.h
30602	E1000_ICR_SRPD	0x00010000	e1000_hw.h
30603	E1000_ICR_ACK	0x00020000	e1000_hw.h	Receive Ack frame
30604	E1000_ICR_MNG	0x00040000	e1000_hw.h	Manageability event
30605	E1000_ICR_DOCK	0x00080000	e1000_hw.h	Dock/Undock
30606	E1000_ICR_INT_ASSERTED	0x80000000	e1000_hw.h	If this bit asserted, the driver should claim the interrupt
30607	E1000_ICR_RXD_FIFO_PAR0	0x00100000	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
30608	E1000_ICR_TXD_FIFO_PAR0	0x00200000	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
30609	E1000_ICR_HOST_ARB_PAR	0x00400000	e1000_hw.h	host arb read buffer parity error
30610	E1000_ICR_PB_PAR	0x00800000	e1000_hw.h	packet buffer parity error
30611	E1000_ICR_RXD_FIFO_PAR1	0x01000000	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
30612	E1000_ICR_TXD_FIFO_PAR1	0x02000000	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
30613	E1000_ICR_ALL_PARITY	0x03F00000	e1000_hw.h	all parity error bits
30614	E1000_ICR_DSW	0x00000020	e1000_hw.h	FW changed the status of DISSW bit in the FWSM
30615	E1000_ICR_PHYINT	0x00001000	e1000_hw.h	LAN connected device generates an interrupt
30616	E1000_ICR_EPRST	0x00100000	e1000_hw.h	ME handware reset occurs
30617	E1000_ICS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
30618	E1000_ICS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
30619	E1000_ICS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
30620	E1000_ICS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
30621	E1000_ICS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
30622	E1000_ICS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
30623	E1000_ICS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
30624	E1000_ICS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
30625	E1000_ICS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
30626	E1000_ICS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
30627	E1000_ICS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
30628	E1000_ICS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
30629	E1000_ICS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
30630	E1000_ICS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
30631	E1000_ICS_SRPD	E1000_ICR_SRPD	e1000_hw.h
30632	E1000_ICS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
30633	E1000_ICS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
30634	E1000_ICS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
30635	E1000_ICS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
30636	E1000_ICS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
30637	E1000_ICS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
30638	E1000_ICS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
30639	E1000_ICS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
30640	E1000_ICS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
30641	E1000_ICS_DSW	E1000_ICR_DSW	e1000_hw.h
30642	E1000_ICS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
30643	E1000_ICS_EPRST	E1000_ICR_EPRST	e1000_hw.h
30644	E1000_IMS_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
30645	E1000_IMS_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
30646	E1000_IMS_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
30647	E1000_IMS_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
30648	E1000_IMS_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
30649	E1000_IMS_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
30650	E1000_IMS_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
30651	E1000_IMS_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
30652	E1000_IMS_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
30653	E1000_IMS_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
30654	E1000_IMS_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
30655	E1000_IMS_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
30656	E1000_IMS_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
30657	E1000_IMS_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
30658	E1000_IMS_SRPD	E1000_ICR_SRPD	e1000_hw.h
30659	E1000_IMS_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
30660	E1000_IMS_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
30661	E1000_IMS_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
30662	E1000_IMS_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
30663	E1000_IMS_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
30664	E1000_IMS_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
30665	E1000_IMS_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
30666	E1000_IMS_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
30667	E1000_IMS_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
30668	E1000_IMS_DSW	E1000_ICR_DSW	e1000_hw.h
30669	E1000_IMS_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
30670	E1000_IMS_EPRST	E1000_ICR_EPRST	e1000_hw.h
30671	E1000_IMC_TXDW	E1000_ICR_TXDW	e1000_hw.h	Transmit desc written back
30672	E1000_IMC_TXQE	E1000_ICR_TXQE	e1000_hw.h	Transmit Queue empty
30673	E1000_IMC_LSC	E1000_ICR_LSC	e1000_hw.h	Link Status Change
30674	E1000_IMC_RXSEQ	E1000_ICR_RXSEQ	e1000_hw.h	rx sequence error
30675	E1000_IMC_RXDMT0	E1000_ICR_RXDMT0	e1000_hw.h	rx desc min. threshold
30676	E1000_IMC_RXO	E1000_ICR_RXO	e1000_hw.h	rx overrun
30677	E1000_IMC_RXT0	E1000_ICR_RXT0	e1000_hw.h	rx timer intr
30678	E1000_IMC_MDAC	E1000_ICR_MDAC	e1000_hw.h	MDIO access complete
30679	E1000_IMC_RXCFG	E1000_ICR_RXCFG	e1000_hw.h	RX /c/ ordered set
30680	E1000_IMC_GPI_EN0	E1000_ICR_GPI_EN0	e1000_hw.h	GP Int 0
30681	E1000_IMC_GPI_EN1	E1000_ICR_GPI_EN1	e1000_hw.h	GP Int 1
30682	E1000_IMC_GPI_EN2	E1000_ICR_GPI_EN2	e1000_hw.h	GP Int 2
30683	E1000_IMC_GPI_EN3	E1000_ICR_GPI_EN3	e1000_hw.h	GP Int 3
30684	E1000_IMC_TXD_LOW	E1000_ICR_TXD_LOW	e1000_hw.h
30685	E1000_IMC_SRPD	E1000_ICR_SRPD	e1000_hw.h
30686	E1000_IMC_ACK	E1000_ICR_ACK	e1000_hw.h	Receive Ack frame
30687	E1000_IMC_MNG	E1000_ICR_MNG	e1000_hw.h	Manageability event
30688	E1000_IMC_DOCK	E1000_ICR_DOCK	e1000_hw.h	Dock/Undock
30689	E1000_IMC_RXD_FIFO_PAR0	E1000_ICR_RXD_FIFO_PAR0	e1000_hw.h	queue 0 Rx descriptor FIFO parity error
30690	E1000_IMC_TXD_FIFO_PAR0	E1000_ICR_TXD_FIFO_PAR0	e1000_hw.h	queue 0 Tx descriptor FIFO parity error
30691	E1000_IMC_HOST_ARB_PAR	E1000_ICR_HOST_ARB_PAR	e1000_hw.h	host arb read buffer parity error
30692	E1000_IMC_PB_PAR	E1000_ICR_PB_PAR	e1000_hw.h	packet buffer parity error
30693	E1000_IMC_RXD_FIFO_PAR1	E1000_ICR_RXD_FIFO_PAR1	e1000_hw.h	queue 1 Rx descriptor FIFO parity error
30694	E1000_IMC_TXD_FIFO_PAR1	E1000_ICR_TXD_FIFO_PAR1	e1000_hw.h	queue 1 Tx descriptor FIFO parity error
30695	E1000_IMC_DSW	E1000_ICR_DSW	e1000_hw.h
30696	E1000_IMC_PHYINT	E1000_ICR_PHYINT	e1000_hw.h
30697	E1000_IMC_EPRST	E1000_ICR_EPRST	e1000_hw.h
30698	E1000_RCTL_RST	0x00000001	e1000_hw.h	Software reset
30699	E1000_RCTL_EN	0x00000002	e1000_hw.h	enable
30700	E1000_RCTL_SBP	0x00000004	e1000_hw.h	store bad packet
30701	E1000_RCTL_UPE	0x00000008	e1000_hw.h	unicast promiscuous enable
30702	E1000_RCTL_MPE	0x00000010	e1000_hw.h	multicast promiscuous enab
30703	E1000_RCTL_LPE	0x00000020	e1000_hw.h	long packet enable
30704	E1000_RCTL_LBM_NO	0x00000000	e1000_hw.h	no loopback mode
30705	E1000_RCTL_LBM_MAC	0x00000040	e1000_hw.h	MAC loopback mode
30706	E1000_RCTL_LBM_SLP	0x00000080	e1000_hw.h	serial link loopback mode
30707	E1000_RCTL_LBM_TCVR	0x000000C0	e1000_hw.h	tcvr loopback mode
30708	E1000_RCTL_DTYP_MASK	0x00000C00	e1000_hw.h	Descriptor type mask
30709	E1000_RCTL_DTYP_PS	0x00000400	e1000_hw.h	Packet Split descriptor
30710	E1000_RCTL_RDMTS_HALF	0x00000000	e1000_hw.h	rx desc min threshold size
30711	E1000_RCTL_RDMTS_QUAT	0x00000100	e1000_hw.h	rx desc min threshold size
30712	E1000_RCTL_RDMTS_EIGTH	0x00000200	e1000_hw.h	rx desc min threshold size
30713	E1000_RCTL_MO_SHIFT	12	e1000_hw.h	multicast offset shift
30714	E1000_RCTL_MO_0	0x00000000	e1000_hw.h	multicast offset 11:0
30715	E1000_RCTL_MO_1	0x00001000	e1000_hw.h	multicast offset 12:1
30716	E1000_RCTL_MO_2	0x00002000	e1000_hw.h	multicast offset 13:2
30717	E1000_RCTL_MO_3	0x00003000	e1000_hw.h	multicast offset 15:4
30718	E1000_RCTL_MDR	0x00004000	e1000_hw.h	multicast desc ring 0
30719	E1000_RCTL_BAM	0x00008000	e1000_hw.h	broadcast enable
30720	E1000_RCTL_SZ_2048	0x00000000	e1000_hw.h	rx buffer size 2048
30721	E1000_RCTL_SZ_1024	0x00010000	e1000_hw.h	rx buffer size 1024
30722	E1000_RCTL_SZ_512	0x00020000	e1000_hw.h	rx buffer size 512
30723	E1000_RCTL_SZ_256	0x00030000	e1000_hw.h	rx buffer size 256
30724	E1000_RCTL_SZ_16384	0x00010000	e1000_hw.h	rx buffer size 16384
30725	E1000_RCTL_SZ_8192	0x00020000	e1000_hw.h	rx buffer size 8192
30726	E1000_RCTL_SZ_4096	0x00030000	e1000_hw.h	rx buffer size 4096
30727	E1000_RCTL_VFE	0x00040000	e1000_hw.h	vlan filter enable
30728	E1000_RCTL_CFIEN	0x00080000	e1000_hw.h	canonical form enable
30729	E1000_RCTL_CFI	0x00100000	e1000_hw.h	canonical form indicator
30730	E1000_RCTL_DPF	0x00400000	e1000_hw.h	discard pause frames
30731	E1000_RCTL_PMCF	0x00800000	e1000_hw.h	pass MAC control frames
30732	E1000_RCTL_BSEX	0x02000000	e1000_hw.h	Buffer size extension
30733	E1000_RCTL_SECRC	0x04000000	e1000_hw.h	Strip Ethernet CRC
30734	E1000_RCTL_FLXBUF_MASK	0x78000000	e1000_hw.h	Flexible buffer size
30735	E1000_RCTL_FLXBUF_SHIFT	27	e1000_hw.h	Flexible buffer shift
30736	E1000_PSRCTL_BSIZE0_MASK	0x0000007F	e1000_hw.h
30737	E1000_PSRCTL_BSIZE1_MASK	0x00003F00	e1000_hw.h
30738	E1000_PSRCTL_BSIZE2_MASK	0x003F0000	e1000_hw.h
30739	E1000_PSRCTL_BSIZE3_MASK	0x3F000000	e1000_hw.h
30740	E1000_PSRCTL_BSIZE0_SHIFT	7	e1000_hw.h	Shift _right_ 7
30741	E1000_PSRCTL_BSIZE1_SHIFT	2	e1000_hw.h	Shift _right_ 2
30742	E1000_PSRCTL_BSIZE2_SHIFT	6	e1000_hw.h	Shift _left_ 6
30743	E1000_PSRCTL_BSIZE3_SHIFT	14	e1000_hw.h	Shift _left_ 14
30744	E1000_SWFW_EEP_SM	0x0001	e1000_hw.h
30745	E1000_SWFW_PHY0_SM	0x0002	e1000_hw.h
30746	E1000_SWFW_PHY1_SM	0x0004	e1000_hw.h
30747	E1000_SWFW_MAC_CSR_SM	0x0008	e1000_hw.h
30748	E1000_RDT_DELAY	0x0000ffff	e1000_hw.h	Delay timer (1=1024us)
30749	E1000_RDT_FPDB	0x80000000	e1000_hw.h	Flush descriptor block
30750	E1000_RDLEN_LEN	0x0007ff80	e1000_hw.h	descriptor length
30751	E1000_RDH_RDH	0x0000ffff	e1000_hw.h	receive descriptor head
30752	E1000_RDT_RDT	0x0000ffff	e1000_hw.h	receive descriptor tail
30753	E1000_FCRTH_RTH	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTH
30754	E1000_FCRTH_XFCE	0x80000000	e1000_hw.h	External Flow Control Enable
30755	E1000_FCRTL_RTL	0x0000FFF8	e1000_hw.h	Mask Bits[15:3] for RTL
30756	E1000_FCRTL_XONE	0x80000000	e1000_hw.h	Enable XON frame transmission
30757	E1000_RFCTL_ISCSI_DIS	0x00000001	e1000_hw.h
30758	E1000_RFCTL_ISCSI_DWC_MASK	0x0000003E	e1000_hw.h
30759	E1000_RFCTL_ISCSI_DWC_SHIFT	1	e1000_hw.h
30760	E1000_RFCTL_NFSW_DIS	0x00000040	e1000_hw.h
30761	E1000_RFCTL_NFSR_DIS	0x00000080	e1000_hw.h
30762	E1000_RFCTL_NFS_VER_MASK	0x00000300	e1000_hw.h
30763	E1000_RFCTL_NFS_VER_SHIFT	8	e1000_hw.h
30764	E1000_RFCTL_IPV6_DIS	0x00000400	e1000_hw.h
30765	E1000_RFCTL_IPV6_XSUM_DIS	0x00000800	e1000_hw.h
30766	E1000_RFCTL_ACK_DIS	0x00001000	e1000_hw.h
30767	E1000_RFCTL_ACKD_DIS	0x00002000	e1000_hw.h
30768	E1000_RFCTL_IPFRSP_DIS	0x00004000	e1000_hw.h
30769	E1000_RFCTL_EXTEN	0x00008000	e1000_hw.h
30770	E1000_RFCTL_IPV6_EX_DIS	0x00010000	e1000_hw.h
30771	E1000_RFCTL_NEW_IPV6_EXT_DIS	0x00020000	e1000_hw.h
30772	E1000_RXDCTL_PTHRESH	0x0000003F	e1000_hw.h	RXDCTL Prefetch Threshold
30773	E1000_RXDCTL_HTHRESH	0x00003F00	e1000_hw.h	RXDCTL Host Threshold
30774	E1000_RXDCTL_WTHRESH	0x003F0000	e1000_hw.h	RXDCTL Writeback Threshold
30775	E1000_RXDCTL_GRAN	0x01000000	e1000_hw.h	RXDCTL Granularity
30776	E1000_TXDCTL_PTHRESH	0x0000003F	e1000_hw.h	TXDCTL Prefetch Threshold
30777	E1000_TXDCTL_HTHRESH	0x00003F00	e1000_hw.h	TXDCTL Host Threshold
30778	E1000_TXDCTL_WTHRESH	0x003F0000	e1000_hw.h	TXDCTL Writeback Threshold
30779	E1000_TXDCTL_GRAN	0x01000000	e1000_hw.h	TXDCTL Granularity
30780	E1000_TXDCTL_LWTHRESH	0xFE000000	e1000_hw.h	TXDCTL Low Threshold
30781	E1000_TXDCTL_FULL_TX_DESC_WB	0x01010000	e1000_hw.h	GRAN=1, WTHRESH=1
30782	E1000_TXDCTL_COUNT_DESC	0x00400000	e1000_hw.h	Enable the counting of desc.
30783	E1000_TXCW_FD	0x00000020	e1000_hw.h	TXCW full duplex
30784	E1000_TXCW_HD	0x00000040	e1000_hw.h	TXCW half duplex
30785	E1000_TXCW_PAUSE	0x00000080	e1000_hw.h	TXCW sym pause request
30786	E1000_TXCW_ASM_DIR	0x00000100	e1000_hw.h	TXCW astm pause direction
30787	E1000_TXCW_PAUSE_MASK	0x00000180	e1000_hw.h	TXCW pause request mask
30788	E1000_TXCW_RF	0x00003000	e1000_hw.h	TXCW remote fault
30789	E1000_TXCW_NP	0x00008000	e1000_hw.h	TXCW next page
30790	E1000_TXCW_CW	0x0000ffff	e1000_hw.h	TxConfigWord mask
30791	E1000_TXCW_TXC	0x40000000	e1000_hw.h	Transmit Config control
30792	E1000_TXCW_ANE	0x80000000	e1000_hw.h	Auto-neg enable
30793	E1000_RXCW_CW	0x0000ffff	e1000_hw.h	RxConfigWord mask
30794	E1000_RXCW_NC	0x04000000	e1000_hw.h	Receive config no carrier
30795	E1000_RXCW_IV	0x08000000	e1000_hw.h	Receive config invalid
30796	E1000_RXCW_CC	0x10000000	e1000_hw.h	Receive config change
30797	E1000_RXCW_C	0x20000000	e1000_hw.h	Receive config
30798	E1000_RXCW_SYNCH	0x40000000	e1000_hw.h	Receive config synch
30799	E1000_RXCW_ANC	0x80000000	e1000_hw.h	Auto-neg complete
30800	E1000_TCTL_RST	0x00000001	e1000_hw.h	software reset
30801	E1000_TCTL_EN	0x00000002	e1000_hw.h	enable tx
30802	E1000_TCTL_BCE	0x00000004	e1000_hw.h	busy check enable
30803	E1000_TCTL_PSP	0x00000008	e1000_hw.h	pad short packets
30804	E1000_TCTL_CT	0x00000ff0	e1000_hw.h	collision threshold
30805	E1000_TCTL_COLD	0x003ff000	e1000_hw.h	collision distance
30806	E1000_TCTL_SWXOFF	0x00400000	e1000_hw.h	SW Xoff transmission
30807	E1000_TCTL_PBE	0x00800000	e1000_hw.h	Packet Burst Enable
30808	E1000_TCTL_RTLC	0x01000000	e1000_hw.h	Re-transmit on late collision
30809	E1000_TCTL_NRTU	0x02000000	e1000_hw.h	No Re-transmit on underrun
30810	E1000_TCTL_MULR	0x10000000	e1000_hw.h	Multiple request support
30811	E1000_TCTL_EXT_BST_MASK	0x000003FF	e1000_hw.h	Backoff Slot Time
30812	E1000_TCTL_EXT_GCEX_MASK	0x000FFC00	e1000_hw.h	Gigabit Carry Extend Padding
30813	DEFAULT_80003ES2LAN_TCTL_EXT_GC	0x00010000	e1000_hw.h
30814	E1000_RXCSUM_PCSS_MASK	0x000000FF	e1000_hw.h	Packet Checksum Start
30815	E1000_RXCSUM_IPOFL	0x00000100	e1000_hw.h	IPv4 checksum offload
30816	E1000_RXCSUM_TUOFL	0x00000200	e1000_hw.h	TCP / UDP checksum offload
30817	E1000_RXCSUM_IPV6OFL	0x00000400	e1000_hw.h	IPv6 checksum offload
30818	E1000_RXCSUM_IPPCSE	0x00001000	e1000_hw.h	IP payload checksum enable
30819	E1000_RXCSUM_PCSD	0x00002000	e1000_hw.h	packet checksum disabled
30820	E1000_MRQC_ENABLE_MASK	0x00000003	e1000_hw.h
30821	E1000_MRQC_ENABLE_RSS_2Q	0x00000001	e1000_hw.h
30822	E1000_MRQC_ENABLE_RSS_INT	0x00000004	e1000_hw.h
30823	E1000_MRQC_RSS_FIELD_MASK	0xFFFF0000	e1000_hw.h
30824	E1000_MRQC_RSS_FIELD_IPV4_TCP	0x00010000	e1000_hw.h
30825	E1000_MRQC_RSS_FIELD_IPV4	0x00020000	e1000_hw.h
30826	E1000_MRQC_RSS_FIELD_IPV6_TCP_E	0x00040000	e1000_hw.h
30827	E1000_MRQC_RSS_FIELD_IPV6_EX	0x00080000	e1000_hw.h
30828	E1000_MRQC_RSS_FIELD_IPV6	0x00100000	e1000_hw.h
30829	E1000_MRQC_RSS_FIELD_IPV6_TCP	0x00200000	e1000_hw.h
30830	E1000_WUC_APME	0x00000001	e1000_hw.h	APM Enable
30831	E1000_WUC_PME_EN	0x00000002	e1000_hw.h	PME Enable
30832	E1000_WUC_PME_STATUS	0x00000004	e1000_hw.h	PME Status
30833	E1000_WUC_APMPME	0x00000008	e1000_hw.h	Assert PME on APM Wakeup
30834	E1000_WUC_SPM	0x80000000	e1000_hw.h	Enable SPM
30835	E1000_WUFC_LNKC	0x00000001	e1000_hw.h	Link Status Change Wakeup Enable
30836	E1000_WUFC_MAG	0x00000002	e1000_hw.h	Magic Packet Wakeup Enable
30837	E1000_WUFC_EX	0x00000004	e1000_hw.h	Directed Exact Wakeup Enable
30838	E1000_WUFC_MC	0x00000008	e1000_hw.h	Directed Multicast Wakeup Enable
30839	E1000_WUFC_BC	0x00000010	e1000_hw.h	Broadcast Wakeup Enable
30840	E1000_WUFC_ARP	0x00000020	e1000_hw.h	ARP Request Packet Wakeup Enable
30841	E1000_WUFC_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Enable
30842	E1000_WUFC_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Enable
30843	E1000_WUFC_IGNORE_TCO	0x00008000	e1000_hw.h	Ignore WakeOn TCO packets
30844	E1000_WUFC_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Enable
30845	E1000_WUFC_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Enable
30846	E1000_WUFC_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Enable
30847	E1000_WUFC_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Enable
30848	E1000_WUFC_ALL_FILTERS	0x000F00FF	e1000_hw.h	Mask for all wakeup filters
30849	E1000_WUFC_FLX_OFFSET	16	e1000_hw.h	Offset to the Flexible Filters bits
30850	E1000_WUFC_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
30851	E1000_WUS_LNKC	0x00000001	e1000_hw.h	Link Status Changed
30852	E1000_WUS_MAG	0x00000002	e1000_hw.h	Magic Packet Received
30853	E1000_WUS_EX	0x00000004	e1000_hw.h	Directed Exact Received
30854	E1000_WUS_MC	0x00000008	e1000_hw.h	Directed Multicast Received
30855	E1000_WUS_BC	0x00000010	e1000_hw.h	Broadcast Received
30856	E1000_WUS_ARP	0x00000020	e1000_hw.h	ARP Request Packet Received
30857	E1000_WUS_IPV4	0x00000040	e1000_hw.h	Directed IPv4 Packet Wakeup Received
30858	E1000_WUS_IPV6	0x00000080	e1000_hw.h	Directed IPv6 Packet Wakeup Received
30859	E1000_WUS_FLX0	0x00010000	e1000_hw.h	Flexible Filter 0 Match
30860	E1000_WUS_FLX1	0x00020000	e1000_hw.h	Flexible Filter 1 Match
30861	E1000_WUS_FLX2	0x00040000	e1000_hw.h	Flexible Filter 2 Match
30862	E1000_WUS_FLX3	0x00080000	e1000_hw.h	Flexible Filter 3 Match
30863	E1000_WUS_FLX_FILTERS	0x000F0000	e1000_hw.h	Mask for the 4 flexible filters
30864	E1000_MANC_SMBUS_EN	0x00000001	e1000_hw.h	SMBus Enabled - RO
30865	E1000_MANC_ASF_EN	0x00000002	e1000_hw.h	ASF Enabled - RO
30866	E1000_MANC_R_ON_FORCE	0x00000004	e1000_hw.h	Reset on Force TCO - RO
30867	E1000_MANC_RMCP_EN	0x00000100	e1000_hw.h	Enable RCMP 026Fh Filtering
30868	E1000_MANC_0298_EN	0x00000200	e1000_hw.h	Enable RCMP 0298h Filtering
30869	E1000_MANC_IPV4_EN	0x00000400	e1000_hw.h	Enable IPv4
30870	E1000_MANC_IPV6_EN	0x00000800	e1000_hw.h	Enable IPv6
30871	E1000_MANC_SNAP_EN	0x00001000	e1000_hw.h	Accept LLC/SNAP
30872	E1000_MANC_ARP_EN	0x00002000	e1000_hw.h	Enable ARP Request Filtering
30873	E1000_MANC_NEIGHBOR_EN	0x00004000	e1000_hw.h	Enable Neighbor Discovery
30874	E1000_MANC_ARP_RES_EN	0x00008000	e1000_hw.h	Enable ARP response Filtering
30875	E1000_MANC_TCO_RESET	0x00010000	e1000_hw.h	TCO Reset Occurred
30876	E1000_MANC_RCV_TCO_EN	0x00020000	e1000_hw.h	Receive TCO Packets Enabled
30877	E1000_MANC_REPORT_STATUS	0x00040000	e1000_hw.h	Status Reporting Enabled
30878	E1000_MANC_RCV_ALL	0x00080000	e1000_hw.h	Receive All Enabled
30879	E1000_MANC_BLK_PHY_RST_ON_IDE	0x00040000	e1000_hw.h	Block phy resets
30880	E1000_MANC_EN_MAC_ADDR_FILTER	0x00100000	e1000_hw.h	Enable MAC address
30881	E1000_MANC_EN_MNG2HOST	0x00200000	e1000_hw.h	Enable MNG packets to host
30882	E1000_MANC_EN_IP_ADDR_FILTER	0x00400000	e1000_hw.h	Enable IP address
30883	E1000_MANC_EN_XSUM_FILTER	0x00800000	e1000_hw.h	Enable checksum filtering
30884	E1000_MANC_BR_EN	0x01000000	e1000_hw.h	Enable broadcast filtering
30885	E1000_MANC_SMB_REQ	0x01000000	e1000_hw.h	SMBus Request
30886	E1000_MANC_SMB_GNT	0x02000000	e1000_hw.h	SMBus Grant
30887	E1000_MANC_SMB_CLK_IN	0x04000000	e1000_hw.h	SMBus Clock In
30888	E1000_MANC_SMB_DATA_IN	0x08000000	e1000_hw.h	SMBus Data In
30889	E1000_MANC_SMB_DATA_OUT	0x10000000	e1000_hw.h	SMBus Data Out
30890	E1000_MANC_SMB_CLK_OUT	0x20000000	e1000_hw.h	SMBus Clock Out
30891	E1000_MANC_SMB_DATA_OUT_SHIFT	28	e1000_hw.h	SMBus Data Out Shift
30892	E1000_MANC_SMB_CLK_OUT_SHIFT	29	e1000_hw.h	SMBus Clock Out Shift
30893	E1000_SWSM_SMBI	0x00000001	e1000_hw.h	Driver Semaphore bit
30894	E1000_SWSM_SWESMBI	0x00000002	e1000_hw.h	FW Semaphore bit
30895	E1000_SWSM_WMNG	0x00000004	e1000_hw.h	Wake MNG Clock
30896	E1000_SWSM_DRV_LOAD	0x00000008	e1000_hw.h	Driver Loaded Bit
30897	E1000_FWSM_MODE_MASK	0x0000000E	e1000_hw.h	FW mode
30898	E1000_FWSM_MODE_SHIFT	1	e1000_hw.h
30899	E1000_FWSM_FW_VALID	0x00008000	e1000_hw.h	FW established a valid mode
30900	E1000_FWSM_RSPCIPHY	0x00000040	e1000_hw.h	Reset PHY on PCI reset
30901	E1000_FWSM_DISSW	0x10000000	e1000_hw.h	FW disable SW Write Access
30902	E1000_FWSM_SKUSEL_MASK	0x60000000	e1000_hw.h	LAN SKU select
30903	E1000_FWSM_SKUEL_SHIFT	29	e1000_hw.h
30904	E1000_FWSM_SKUSEL_EMB	0x0	e1000_hw.h	Embedded SKU
30905	E1000_FWSM_SKUSEL_CONS	0x1	e1000_hw.h	Consumer SKU
30906	E1000_FWSM_SKUSEL_PERF_100	0x2	e1000_hw.h	Perf & Corp 10/100 SKU
30907	E1000_FWSM_SKUSEL_PERF_GBE	0x3	e1000_hw.h	Perf & Copr GbE SKU
30908	E1000_FFLT_DBG_INVC	0x00100000	e1000_hw.h	Invalid /C/ code handling
30909	E1000_HICR_EN	0x00000001	e1000_hw.h	Enable Bit - RO
30910	E1000_HICR_C	0x00000002	e1000_hw.h	Driver sets this bit when done
30911	E1000_HICR_SV	0x00000004	e1000_hw.h	Status Validity
30912	E1000_HICR_FWR	0x00000080	e1000_hw.h	FW reset. Set by the Host
30913	E1000_HI_MAX_DATA_LENGTH	252	e1000_hw.h	Host Interface data length
30914	E1000_HI_MAX_BLOCK_BYTE_LENGTH	1792	e1000_hw.h	Number of bytes in range
30915	E1000_HI_MAX_BLOCK_DWORD_LENGTH	448	e1000_hw.h	Number of dwords in range
30916	E1000_HI_COMMAND_TIMEOUT	500	e1000_hw.h	Time in ms to process HI command
30917	E1000_HSMC0R_CLKIN	0x00000001	e1000_hw.h	SMB Clock in
30918	E1000_HSMC0R_DATAIN	0x00000002	e1000_hw.h	SMB Data in
30919	E1000_HSMC0R_DATAOUT	0x00000004	e1000_hw.h	SMB Data out
30920	E1000_HSMC0R_CLKOUT	0x00000008	e1000_hw.h	SMB Clock out
30921	E1000_HSMC1R_CLKIN	E1000_HSMC0R_CLKIN	e1000_hw.h
30922	E1000_HSMC1R_DATAIN	E1000_HSMC0R_DATAIN	e1000_hw.h
30923	E1000_HSMC1R_DATAOUT	E1000_HSMC0R_DATAOUT	e1000_hw.h
30924	E1000_HSMC1R_CLKOUT	E1000_HSMC0R_CLKOUT	e1000_hw.h
30925	E1000_FWSTS_FWS_MASK	0x000000FF	e1000_hw.h	FW Status
30926	E1000_WUPL_LENGTH_MASK	0x0FFF	e1000_hw.h	Only the lower 12 bits are valid
30927	E1000_MDALIGN	4096	e1000_hw.h
30928	E1000_GCR_RXD_NO_SNOOP	0x00000001	e1000_hw.h
30929	E1000_GCR_RXDSCW_NO_SNOOP	0x00000002	e1000_hw.h
30930	E1000_GCR_RXDSCR_NO_SNOOP	0x00000004	e1000_hw.h
30931	E1000_GCR_TXD_NO_SNOOP	0x00000008	e1000_hw.h
30932	E1000_GCR_TXDSCW_NO_SNOOP	0x00000010	e1000_hw.h
30933	E1000_GCR_TXDSCR_NO_SNOOP	0x00000020	e1000_hw.h
30934	PCI_EX_NO_SNOOP_ALL	(E1000_GCR_RXD_NO_SNOOP \| \ E1000_GCR_RXDSCW_NO_SNOOP \| \ E1000_GCR_RXDSCR_NO_SNOOP \| \ E1000_GCR_TXD_NO_SNOO	e1000_hw.h
30935	PCI_EX_82566_SNOOP_ALL	PCI_EX_NO_SNOOP_ALL	e1000_hw.h
30936	E1000_GCR_L1_ACT_WITHOUT_L0S_RX	0x08000000	e1000_hw.h
30937	E1000_FACTPS_FUNC0_POWER_STATE_	0x00000003	e1000_hw.h
30938	E1000_FACTPS_LAN0_VALID	0x00000004	e1000_hw.h
30939	E1000_FACTPS_FUNC0_AUX_EN	0x00000008	e1000_hw.h
30940	E1000_FACTPS_FUNC1_POWER_STATE_	0x000000C0	e1000_hw.h
30941	E1000_FACTPS_FUNC1_POWER_STATE_	6	e1000_hw.h
30942	E1000_FACTPS_LAN1_VALID	0x00000100	e1000_hw.h
30943	E1000_FACTPS_FUNC1_AUX_EN	0x00000200	e1000_hw.h
30944	E1000_FACTPS_FUNC2_POWER_STATE_	0x00003000	e1000_hw.h
30945	E1000_FACTPS_FUNC2_POWER_STATE_	12	e1000_hw.h
30946	E1000_FACTPS_IDE_ENABLE	0x00004000	e1000_hw.h
30947	E1000_FACTPS_FUNC2_AUX_EN	0x00008000	e1000_hw.h
30948	E1000_FACTPS_FUNC3_POWER_STATE_	0x000C0000	e1000_hw.h
30949	E1000_FACTPS_FUNC3_POWER_STATE_	18	e1000_hw.h
30950	E1000_FACTPS_SP_ENABLE	0x00100000	e1000_hw.h
30951	E1000_FACTPS_FUNC3_AUX_EN	0x00200000	e1000_hw.h
30952	E1000_FACTPS_FUNC4_POWER_STATE_	0x03000000	e1000_hw.h
30953	E1000_FACTPS_FUNC4_POWER_STATE_	24	e1000_hw.h
30954	E1000_FACTPS_IPMI_ENABLE	0x04000000	e1000_hw.h
30955	E1000_FACTPS_FUNC4_AUX_EN	0x08000000	e1000_hw.h
30956	E1000_FACTPS_MNGCG	0x20000000	e1000_hw.h
30957	E1000_FACTPS_LAN_FUNC_SEL	0x40000000	e1000_hw.h
30958	E1000_FACTPS_PM_STATE_CHANGED	0x80000000	e1000_hw.h
30959	PCI_EX_LINK_STATUS	0x12	e1000_hw.h
30960	PCI_EX_LINK_WIDTH_MASK	0x3F0	e1000_hw.h
30961	PCI_EX_LINK_WIDTH_SHIFT	4	e1000_hw.h
30962	EEPROM_READ_OPCODE_MICROWIRE	0x6	e1000_hw.h	EEPROM read opcode
30963	EEPROM_WRITE_OPCODE_MICROWIRE	0x5	e1000_hw.h	EEPROM write opcode
30964	EEPROM_ERASE_OPCODE_MICROWIRE	0x7	e1000_hw.h	EEPROM erase opcode
30965	EEPROM_EWEN_OPCODE_MICROWIRE	0x13	e1000_hw.h	EEPROM erase/write enable
30966	EEPROM_EWDS_OPCODE_MICROWIRE	0x10	e1000_hw.h	EEPROM erast/write disable
30967	EEPROM_MAX_RETRY_SPI	5000	e1000_hw.h	Max wait of 5ms, for RDY signal
30968	EEPROM_READ_OPCODE_SPI	0x03	e1000_hw.h	EEPROM read opcode
30969	EEPROM_WRITE_OPCODE_SPI	0x02	e1000_hw.h	EEPROM write opcode
30970	EEPROM_A8_OPCODE_SPI	0x08	e1000_hw.h	opcode bit-3 = address bit-8
30971	EEPROM_WREN_OPCODE_SPI	0x06	e1000_hw.h	EEPROM set Write Enable latch
30972	EEPROM_WRDI_OPCODE_SPI	0x04	e1000_hw.h	EEPROM reset Write Enable latch
30973	EEPROM_RDSR_OPCODE_SPI	0x05	e1000_hw.h	EEPROM read Status register
30974	EEPROM_WRSR_OPCODE_SPI	0x01	e1000_hw.h	EEPROM write Status register
30975	EEPROM_ERASE4K_OPCODE_SPI	0x20	e1000_hw.h	EEPROM ERASE 4KB
30976	EEPROM_ERASE64K_OPCODE_SPI	0xD8	e1000_hw.h	EEPROM ERASE 64KB
30977	EEPROM_ERASE256_OPCODE_SPI	0xDB	e1000_hw.h	EEPROM ERASE 256B
30978	EEPROM_WORD_SIZE_SHIFT	6	e1000_hw.h
30979	EEPROM_SIZE_SHIFT	10	e1000_hw.h
30980	EEPROM_SIZE_MASK	0x1C00	e1000_hw.h
30981	EEPROM_COMPAT	0x0003	e1000_hw.h
30982	EEPROM_ID_LED_SETTINGS	0x0004	e1000_hw.h
30983	EEPROM_VERSION	0x0005	e1000_hw.h
30984	EEPROM_SERDES_AMPLITUDE	0x0006	e1000_hw.h	For SERDES output amplitude adjustment.
30985	EEPROM_PHY_CLASS_WORD	0x0007	e1000_hw.h
30986	EEPROM_INIT_CONTROL1_REG	0x000A	e1000_hw.h
30987	EEPROM_INIT_CONTROL2_REG	0x000F	e1000_hw.h
30988	EEPROM_SWDEF_PINS_CTRL_PORT_1	0x0010	e1000_hw.h
30989	EEPROM_INIT_CONTROL3_PORT_B	0x0014	e1000_hw.h
30990	EEPROM_INIT_3GIO_3	0x001A	e1000_hw.h
30991	EEPROM_SWDEF_PINS_CTRL_PORT_0	0x0020	e1000_hw.h
30992	EEPROM_INIT_CONTROL3_PORT_A	0x0024	e1000_hw.h
30993	EEPROM_CFG	0x0012	e1000_hw.h
30994	EEPROM_FLASH_VERSION	0x0032	e1000_hw.h
30995	EEPROM_CHECKSUM_REG	0x003F	e1000_hw.h
30996	E1000_EEPROM_CFG_DONE	0x00040000	e1000_hw.h	MNG config cycle done
30997	E1000_EEPROM_CFG_DONE_PORT_1	0x00080000	e1000_hw.h	...for second port
30998	ID_LED_RESERVED_0000	0x0000	e1000_hw.h
30999	ID_LED_RESERVED_FFFF	0xFFFF	e1000_hw.h
31000	ID_LED_RESERVED_82573	0xF746	e1000_hw.h
31001	ID_LED_DEFAULT_82573	0x1811	e1000_hw.h
31002	ID_LED_DEFAULT	((ID_LED_OFF1_ON2 << 12) \| \ (ID_LED_OFF1_OFF2 << 8) \| \ (ID_LED_DEF1_DEF2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
31003	ID_LED_DEFAULT_ICH8LAN	((ID_LED_DEF1_DEF2 << 12) \| \ (ID_LED_DEF1_OFF2 << 8) \| \ (ID_LED_DEF1_ON2 << 4) \| \ (ID_LED_DEF1_DEF2))	e1000_hw.h
31004	ID_LED_DEF1_DEF2	0x1	e1000_hw.h
31005	ID_LED_DEF1_ON2	0x2	e1000_hw.h
31006	ID_LED_DEF1_OFF2	0x3	e1000_hw.h
31007	ID_LED_ON1_DEF2	0x4	e1000_hw.h
31008	ID_LED_ON1_ON2	0x5	e1000_hw.h
31009	ID_LED_ON1_OFF2	0x6	e1000_hw.h
31010	ID_LED_OFF1_DEF2	0x7	e1000_hw.h
31011	ID_LED_OFF1_ON2	0x8	e1000_hw.h
31012	ID_LED_OFF1_OFF2	0x9	e1000_hw.h
31013	IGP_ACTIVITY_LED_MASK	0xFFFFF0FF	e1000_hw.h
31014	IGP_ACTIVITY_LED_ENABLE	0x0300	e1000_hw.h
31015	IGP_LED3_MODE	0x07000000	e1000_hw.h
31016	EEPROM_SERDES_AMPLITUDE_MASK	0x000F	e1000_hw.h
31017	EEPROM_PHY_CLASS_A	0x8000	e1000_hw.h
31018	EEPROM_WORD0A_ILOS	0x0010	e1000_hw.h
31019	EEPROM_WORD0A_SWDPIO	0x01E0	e1000_hw.h
31020	EEPROM_WORD0A_LRST	0x0200	e1000_hw.h
31021	EEPROM_WORD0A_FD	0x0400	e1000_hw.h
31022	EEPROM_WORD0A_66MHZ	0x0800	e1000_hw.h
31023	EEPROM_WORD0F_PAUSE_MASK	0x3000	e1000_hw.h
31024	EEPROM_WORD0F_PAUSE	0x1000	e1000_hw.h
31025	EEPROM_WORD0F_ASM_DIR	0x2000	e1000_hw.h
31026	EEPROM_WORD0F_ANE	0x0800	e1000_hw.h
31027	EEPROM_WORD0F_SWPDIO_EXT	0x00F0	e1000_hw.h
31028	EEPROM_WORD0F_LPLU	0x0001	e1000_hw.h
31029	EEPROM_WORD1020_GIGA_DISABLE	0x0010	e1000_hw.h
31030	EEPROM_WORD1020_GIGA_DISABLE_NO	0x0008	e1000_hw.h
31031	EEPROM_WORD1A_ASPM_MASK	0x000C	e1000_hw.h
31032	EEPROM_SUM	0xBABA	e1000_hw.h
31033	EEPROM_NODE_ADDRESS_BYTE_0	0	e1000_hw.h
31034	EEPROM_PBA_BYTE_1	8	e1000_hw.h
31035	EEPROM_RESERVED_WORD	0xFFFF	e1000_hw.h
31036	PBA_SIZE	4	e1000_hw.h
31037	E1000_COLLISION_THRESHOLD	15	e1000_hw.h
31038	E1000_CT_SHIFT	4	e1000_hw.h
31039	E1000_COLLISION_DISTANCE	63	e1000_hw.h
31040	E1000_COLLISION_DISTANCE_82542	64	e1000_hw.h
31041	E1000_FDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
31042	E1000_HDX_COLLISION_DISTANCE	E1000_COLLISION_DISTANCE	e1000_hw.h
31043	E1000_COLD_SHIFT	12	e1000_hw.h
31044	REQ_TX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
31045	REQ_RX_DESCRIPTOR_MULTIPLE	8	e1000_hw.h
31046	DEFAULT_82542_TIPG_IPGT	10	e1000_hw.h
31047	DEFAULT_82543_TIPG_IPGT_FIBER	9	e1000_hw.h
31048	DEFAULT_82543_TIPG_IPGT_COPPER	8	e1000_hw.h
31049	E1000_TIPG_IPGT_MASK	0x000003FF	e1000_hw.h
31050	E1000_TIPG_IPGR1_MASK	0x000FFC00	e1000_hw.h
31051	E1000_TIPG_IPGR2_MASK	0x3FF00000	e1000_hw.h
31052	DEFAULT_82542_TIPG_IPGR1	2	e1000_hw.h
31053	DEFAULT_82543_TIPG_IPGR1	8	e1000_hw.h
31054	E1000_TIPG_IPGR1_SHIFT	10	e1000_hw.h
31055	DEFAULT_82542_TIPG_IPGR2	10	e1000_hw.h
31056	DEFAULT_82543_TIPG_IPGR2	6	e1000_hw.h
31057	DEFAULT_80003ES2LAN_TIPG_IPGR2	7	e1000_hw.h
31058	E1000_TIPG_IPGR2_SHIFT	20	e1000_hw.h
31059	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000009	e1000_hw.h
31060	DEFAULT_80003ES2LAN_TIPG_IPGT_1	0x00000008	e1000_hw.h
31061	E1000_TXDMAC_DPP	0x00000001	e1000_hw.h
31062	TX_THRESHOLD_START	8	e1000_hw.h
31063	TX_THRESHOLD_INCREMENT	10	e1000_hw.h
31064	TX_THRESHOLD_DECREMENT	1	e1000_hw.h
31065	TX_THRESHOLD_STOP	190	e1000_hw.h
31066	TX_THRESHOLD_DISABLE	0	e1000_hw.h
31067	TX_THRESHOLD_TIMER_MS	10000	e1000_hw.h
31068	MIN_NUM_XMITS	1000	e1000_hw.h
31069	IFS_MAX	80	e1000_hw.h
31070	IFS_STEP	10	e1000_hw.h
31071	IFS_MIN	40	e1000_hw.h
31072	IFS_RATIO	4	e1000_hw.h
31073	E1000_EXTCNF_CTRL_PCIE_WRITE_EN	0x00000001	e1000_hw.h
31074	E1000_EXTCNF_CTRL_PHY_WRITE_ENA	0x00000002	e1000_hw.h
31075	E1000_EXTCNF_CTRL_D_UD_ENABLE	0x00000004	e1000_hw.h
31076	E1000_EXTCNF_CTRL_D_UD_LATENCY	0x00000008	e1000_hw.h
31077	E1000_EXTCNF_CTRL_D_UD_OWNER	0x00000010	e1000_hw.h
31078	E1000_EXTCNF_CTRL_MDIO_SW_OWNER	0x00000020	e1000_hw.h
31079	E1000_EXTCNF_CTRL_MDIO_HW_OWNER	0x00000040	e1000_hw.h
31080	E1000_EXTCNF_CTRL_EXT_CNF_POINT	0x0FFF0000	e1000_hw.h
31081	E1000_EXTCNF_SIZE_EXT_PHY_LENGT	0x000000FF	e1000_hw.h
31082	E1000_EXTCNF_SIZE_EXT_DOCK_LENG	0x0000FF00	e1000_hw.h
31083	E1000_EXTCNF_SIZE_EXT_PCIE_LENG	0x00FF0000	e1000_hw.h
31084	E1000_EXTCNF_CTRL_LCD_WRITE_ENA	0x00000001	e1000_hw.h
31085	E1000_EXTCNF_CTRL_SWFLAG	0x00000020	e1000_hw.h
31086	E1000_PBA_8K	0x0008	e1000_hw.h	8KB, default Rx allocation
31087	E1000_PBA_12K	0x000C	e1000_hw.h	12KB, default Rx allocation
31088	E1000_PBA_16K	0x0010	e1000_hw.h	16KB, default TX allocation
31089	E1000_PBA_20K	0x0014	e1000_hw.h
31090	E1000_PBA_22K	0x0016	e1000_hw.h
31091	E1000_PBA_24K	0x0018	e1000_hw.h
31092	E1000_PBA_30K	0x001E	e1000_hw.h
31093	E1000_PBA_32K	0x0020	e1000_hw.h
31094	E1000_PBA_34K	0x0022	e1000_hw.h
31095	E1000_PBA_38K	0x0026	e1000_hw.h
31096	E1000_PBA_40K	0x0028	e1000_hw.h
31097	E1000_PBA_48K	0x0030	e1000_hw.h	48KB, default RX allocation
31098	E1000_PBS_16K	E1000_PBA_16K	e1000_hw.h
31099	FLOW_CONTROL_ADDRESS_LOW	0x00C28001	e1000_hw.h
31100	FLOW_CONTROL_ADDRESS_HIGH	0x00000100	e1000_hw.h
31101	FLOW_CONTROL_TYPE	0x8808	e1000_hw.h
31102	FC_DEFAULT_HI_THRESH	(0x8000)	e1000_hw.h	32KB
31103	FC_DEFAULT_LO_THRESH	(0x4000)	e1000_hw.h	16KB
31104	FC_DEFAULT_TX_TIMER	(0x100)	e1000_hw.h	~130 us
31105	PCIX_COMMAND_REGISTER	0xE6	e1000_hw.h
31106	PCIX_STATUS_REGISTER_LO	0xE8	e1000_hw.h
31107	PCIX_STATUS_REGISTER_HI	0xEA	e1000_hw.h
31108	PCIX_COMMAND_MMRBC_MASK	0x000C	e1000_hw.h
31109	PCIX_COMMAND_MMRBC_SHIFT	0x2	e1000_hw.h
31110	PCIX_STATUS_HI_MMRBC_MASK	0x0060	e1000_hw.h
31111	PCIX_STATUS_HI_MMRBC_SHIFT	0x5	e1000_hw.h
31112	PCIX_STATUS_HI_MMRBC_4K	0x3	e1000_hw.h
31113	PCIX_STATUS_HI_MMRBC_2K	0x2	e1000_hw.h
31114	PAUSE_SHIFT	5	e1000_hw.h
31115	SWDPIO_SHIFT	17	e1000_hw.h
31116	SWDPIO__EXT_SHIFT	4	e1000_hw.h
31117	ILOS_SHIFT	3	e1000_hw.h
31118	RECEIVE_BUFFER_ALIGN_SIZE	(256)	e1000_hw.h
31119	LINK_UP_TIMEOUT	500	e1000_hw.h
31120	MASTER_DISABLE_TIMEOUT	800	e1000_hw.h
31121	AUTO_READ_DONE_TIMEOUT	10	e1000_hw.h
31122	PHY_CFG_TIMEOUT	100	e1000_hw.h
31123	E1000_TX_BUFFER_SIZE	((uint32_t)1514)	e1000_hw.h
31124	CARRIER_EXTENSION	0x0F	e1000_hw.h
31125	E1000_CTRL_PHY_RESET_DIR	E1000_CTRL_SWDPIO0	e1000_hw.h
31126	E1000_CTRL_PHY_RESET	E1000_CTRL_SWDPIN0	e1000_hw.h
31127	E1000_CTRL_MDIO_DIR	E1000_CTRL_SWDPIO2	e1000_hw.h
31128	E1000_CTRL_MDIO	E1000_CTRL_SWDPIN2	e1000_hw.h
31129	E1000_CTRL_MDC_DIR	E1000_CTRL_SWDPIO3	e1000_hw.h
31130	E1000_CTRL_MDC	E1000_CTRL_SWDPIN3	e1000_hw.h
31131	E1000_CTRL_PHY_RESET_DIR4	E1000_CTRL_EXT_SDP4_DIR	e1000_hw.h
31132	E1000_CTRL_PHY_RESET4	E1000_CTRL_EXT_SDP4_DATA	e1000_hw.h
31133	PHY_CTRL	0x00	e1000_hw.h	Control Register
31134	PHY_STATUS	0x01	e1000_hw.h	Status Regiser
31135	PHY_ID1	0x02	e1000_hw.h	Phy Id Reg (word 1)
31136	PHY_ID2	0x03	e1000_hw.h	Phy Id Reg (word 2)
31137	PHY_AUTONEG_ADV	0x04	e1000_hw.h	Autoneg Advertisement
31138	PHY_LP_ABILITY	0x05	e1000_hw.h	Link Partner Ability (Base Page)
31139	PHY_AUTONEG_EXP	0x06	e1000_hw.h	Autoneg Expansion Reg
31140	PHY_NEXT_PAGE_TX	0x07	e1000_hw.h	Next Page TX
31141	PHY_LP_NEXT_PAGE	0x08	e1000_hw.h	Link Partner Next Page
31142	PHY_1000T_CTRL	0x09	e1000_hw.h	1000Base-T Control Reg
31143	PHY_1000T_STATUS	0x0A	e1000_hw.h	1000Base-T Status Reg
31144	PHY_EXT_STATUS	0x0F	e1000_hw.h	Extended Status Reg
31145	MAX_PHY_REG_ADDRESS	0x1F	e1000_hw.h	5 bit address bus (0-0x1F)
31146	MAX_PHY_MULTI_PAGE_REG	0xF	e1000_hw.h	Registers equal on all pages
31147	M88E1000_PHY_SPEC_CTRL	0x10	e1000_hw.h	PHY Specific Control Register
31148	M88E1000_PHY_SPEC_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
31149	M88E1000_INT_ENABLE	0x12	e1000_hw.h	Interrupt Enable Register
31150	M88E1000_INT_STATUS	0x13	e1000_hw.h	Interrupt Status Register
31151	M88E1000_EXT_PHY_SPEC_CTRL	0x14	e1000_hw.h	Extended PHY Specific Control
31152	M88E1000_RX_ERR_CNTR	0x15	e1000_hw.h	Receive Error Counter
31153	M88E1000_PHY_EXT_CTRL	0x1A	e1000_hw.h	PHY extend control register
31154	M88E1000_PHY_PAGE_SELECT	0x1D	e1000_hw.h	Reg 29 for page number setting
31155	M88E1000_PHY_GEN_CONTROL	0x1E	e1000_hw.h	Its meaning depends on reg 29
31156	M88E1000_PHY_VCO_REG_BIT8	0x100	e1000_hw.h	Bits 8 & 11 are adjusted for
31157	M88E1000_PHY_VCO_REG_BIT11	0x800	e1000_hw.h	improved BER performance
31158	IGP01E1000_IEEE_REGS_PAGE	0x0000	e1000_hw.h
31159	IGP01E1000_IEEE_RESTART_AUTONEG	0x3300	e1000_hw.h
31160	IGP01E1000_IEEE_FORCE_GIGA	0x0140	e1000_hw.h
31161	IGP01E1000_PHY_PORT_CONFIG	0x10	e1000_hw.h	PHY Specific Port Config Register
31162	IGP01E1000_PHY_PORT_STATUS	0x11	e1000_hw.h	PHY Specific Status Register
31163	IGP01E1000_PHY_PORT_CTRL	0x12	e1000_hw.h	PHY Specific Control Register
31164	IGP01E1000_PHY_LINK_HEALTH	0x13	e1000_hw.h	PHY Link Health Register
31165	IGP01E1000_GMII_FIFO	0x14	e1000_hw.h	GMII FIFO Register
31166	IGP01E1000_PHY_CHANNEL_QUALITY	0x15	e1000_hw.h	PHY Channel Quality Register
31167	IGP02E1000_PHY_POWER_MGMT	0x19	e1000_hw.h
31168	IGP01E1000_PHY_PAGE_SELECT	0x1F	e1000_hw.h	PHY Page Select Core Register
31169	IGP01E1000_PHY_AGC_A	0x1172	e1000_hw.h
31170	IGP01E1000_PHY_AGC_B	0x1272	e1000_hw.h
31171	IGP01E1000_PHY_AGC_C	0x1472	e1000_hw.h
31172	IGP01E1000_PHY_AGC_D	0x1872	e1000_hw.h
31173	IGP02E1000_PHY_AGC_A	0x11B1	e1000_hw.h
31174	IGP02E1000_PHY_AGC_B	0x12B1	e1000_hw.h
31175	IGP02E1000_PHY_AGC_C	0x14B1	e1000_hw.h
31176	IGP02E1000_PHY_AGC_D	0x18B1	e1000_hw.h
31177	IGP01E1000_PHY_DSP_RESET	0x1F33	e1000_hw.h
31178	IGP01E1000_PHY_DSP_SET	0x1F71	e1000_hw.h
31179	IGP01E1000_PHY_DSP_FFE	0x1F35	e1000_hw.h
31180	IGP01E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
31181	IGP02E1000_PHY_CHANNEL_NUM	4	e1000_hw.h
31182	IGP01E1000_PHY_AGC_PARAM_A	0x1171	e1000_hw.h
31183	IGP01E1000_PHY_AGC_PARAM_B	0x1271	e1000_hw.h
31184	IGP01E1000_PHY_AGC_PARAM_C	0x1471	e1000_hw.h
31185	IGP01E1000_PHY_AGC_PARAM_D	0x1871	e1000_hw.h
31186	IGP01E1000_PHY_EDAC_MU_INDEX	0xC000	e1000_hw.h
31187	IGP01E1000_PHY_EDAC_SIGN_EXT_9_	0x8000	e1000_hw.h
31188	IGP01E1000_PHY_ANALOG_TX_STATE	0x2890	e1000_hw.h
31189	IGP01E1000_PHY_ANALOG_CLASS_A	0x2000	e1000_hw.h
31190	IGP01E1000_PHY_FORCE_ANALOG_ENA	0x0004	e1000_hw.h
31191	IGP01E1000_PHY_DSP_FFE_CM_CP	0x0069	e1000_hw.h
31192	IGP01E1000_PHY_DSP_FFE_DEFAULT	0x002A	e1000_hw.h
31193	IGP01E1000_PHY_PCS_INIT_REG	0x00B4	e1000_hw.h
31194	IGP01E1000_PHY_PCS_CTRL_REG	0x00B5	e1000_hw.h
31195	IGP01E1000_ANALOG_REGS_PAGE	0x20C0	e1000_hw.h
31196	GG82563_PAGE_SHIFT	5	e1000_hw.h
31197	GG82563_MIN_ALT_REG	30	e1000_hw.h
31198	GG82563_PHY_SPEC_CTRL	GG82563_REG(0, 16)	e1000_hw.h	PHY Specific Control
31199	GG82563_PHY_SPEC_STATUS	GG82563_REG(0, 17)	e1000_hw.h	PHY Specific Status
31200	GG82563_PHY_INT_ENABLE	GG82563_REG(0, 18)	e1000_hw.h	Interrupt Enable
31201	GG82563_PHY_SPEC_STATUS_2	GG82563_REG(0, 19)	e1000_hw.h	PHY Specific Status 2
31202	GG82563_PHY_RX_ERR_CNTR	GG82563_REG(0, 21)	e1000_hw.h	Receive Error Counter
31203	GG82563_PHY_PAGE_SELECT	GG82563_REG(0, 22)	e1000_hw.h	Page Select
31204	GG82563_PHY_SPEC_CTRL_2	GG82563_REG(0, 26)	e1000_hw.h	PHY Specific Control 2
31205	GG82563_PHY_PAGE_SELECT_ALT	GG82563_REG(0, 29)	e1000_hw.h	Alternate Page Select
31206	GG82563_PHY_TEST_CLK_CTRL	GG82563_REG(0, 30)	e1000_hw.h	Test Clock Control (use reg. 29 to select)
31207	GG82563_PHY_MAC_SPEC_CTRL	GG82563_REG(2, 21)	e1000_hw.h	MAC Specific Control Register
31208	GG82563_PHY_MAC_SPEC_CTRL_2	GG82563_REG(2, 26)	e1000_hw.h	MAC Specific Control 2
31209	GG82563_PHY_DSP_DISTANCE	GG82563_REG(5, 26)	e1000_hw.h	DSP Distance
31210	GG82563_PHY_KMRN_MODE_CTRL	GG82563_REG(193, 16)	e1000_hw.h	Kumeran Mode Control
31211	GG82563_PHY_PORT_RESET	GG82563_REG(193, 17)	e1000_hw.h	Port Reset
31212	GG82563_PHY_REVISION_ID	GG82563_REG(193, 18)	e1000_hw.h	Revision ID
31213	GG82563_PHY_DEVICE_ID	GG82563_REG(193, 19)	e1000_hw.h	Device ID
31214	GG82563_PHY_PWR_MGMT_CTRL	GG82563_REG(193, 20)	e1000_hw.h	Power Management Control
31215	GG82563_PHY_RATE_ADAPT_CTRL	GG82563_REG(193, 25)	e1000_hw.h	Rate Adaptation Control
31216	GG82563_PHY_KMRN_FIFO_CTRL_STAT	GG82563_REG(194, 16)	e1000_hw.h	FIFO's Control/Status
31217	GG82563_PHY_KMRN_CTRL	GG82563_REG(194, 17)	e1000_hw.h	Control
31218	GG82563_PHY_INBAND_CTRL	GG82563_REG(194, 18)	e1000_hw.h	Inband Control
31219	GG82563_PHY_KMRN_DIAGNOSTIC	GG82563_REG(194, 19)	e1000_hw.h	Diagnostic
31220	GG82563_PHY_ACK_TIMEOUTS	GG82563_REG(194, 20)	e1000_hw.h	Acknowledge Timeouts
31221	GG82563_PHY_ADV_ABILITY	GG82563_REG(194, 21)	e1000_hw.h	Advertised Ability
31222	GG82563_PHY_LINK_PARTNER_ADV_AB	GG82563_REG(194, 23)	e1000_hw.h	Link Partner Advertised Ability
31223	GG82563_PHY_ADV_NEXT_PAGE	GG82563_REG(194, 24)	e1000_hw.h	Advertised Next Page
31224	GG82563_PHY_LINK_PARTNER_ADV_NE	GG82563_REG(194, 25)	e1000_hw.h	Link Partner Advertised Next page
31225	GG82563_PHY_KMRN_MISC	GG82563_REG(194, 26)	e1000_hw.h	Misc.
31226	MII_CR_SPEED_SELECT_MSB	0x0040	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
31227	MII_CR_COLL_TEST_ENABLE	0x0080	e1000_hw.h	Collision test enable
31228	MII_CR_FULL_DUPLEX	0x0100	e1000_hw.h	FDX =1, half duplex =0
31229	MII_CR_RESTART_AUTO_NEG	0x0200	e1000_hw.h	Restart auto negotiation
31230	MII_CR_ISOLATE	0x0400	e1000_hw.h	Isolate PHY from MII
31231	MII_CR_POWER_DOWN	0x0800	e1000_hw.h	Power down
31232	MII_CR_AUTO_NEG_EN	0x1000	e1000_hw.h	Auto Neg Enable
31233	MII_CR_SPEED_SELECT_LSB	0x2000	e1000_hw.h	bits 6,13: 10=1000, 01=100, 00=10
31234	MII_CR_LOOPBACK	0x4000	e1000_hw.h	0 = normal, 1 = loopback
31235	MII_CR_RESET	0x8000	e1000_hw.h	0 = normal, 1 = PHY reset
31236	MII_SR_EXTENDED_CAPS	0x0001	e1000_hw.h	Extended register capabilities
31237	MII_SR_JABBER_DETECT	0x0002	e1000_hw.h	Jabber Detected
31238	MII_SR_LINK_STATUS	0x0004	e1000_hw.h	Link Status 1 = link
31239	MII_SR_AUTONEG_CAPS	0x0008	e1000_hw.h	Auto Neg Capable
31240	MII_SR_REMOTE_FAULT	0x0010	e1000_hw.h	Remote Fault Detect
31241	MII_SR_AUTONEG_COMPLETE	0x0020	e1000_hw.h	Auto Neg Complete
31242	MII_SR_PREAMBLE_SUPPRESS	0x0040	e1000_hw.h	Preamble may be suppressed
31243	MII_SR_EXTENDED_STATUS	0x0100	e1000_hw.h	Ext. status info in Reg 0x0F
31244	MII_SR_100T2_HD_CAPS	0x0200	e1000_hw.h	100T2 Half Duplex Capable
31245	MII_SR_100T2_FD_CAPS	0x0400	e1000_hw.h	100T2 Full Duplex Capable
31246	MII_SR_10T_HD_CAPS	0x0800	e1000_hw.h	10T Half Duplex Capable
31247	MII_SR_10T_FD_CAPS	0x1000	e1000_hw.h	10T Full Duplex Capable
31248	MII_SR_100X_HD_CAPS	0x2000	e1000_hw.h	100X Half Duplex Capable
31249	MII_SR_100X_FD_CAPS	0x4000	e1000_hw.h	100X Full Duplex Capable
31250	MII_SR_100T4_CAPS	0x8000	e1000_hw.h	100T4 Capable
31251	NWAY_AR_SELECTOR_FIELD	0x0001	e1000_hw.h	indicates IEEE 802.3 CSMA/CD
31252	NWAY_AR_10T_HD_CAPS	0x0020	e1000_hw.h	10T Half Duplex Capable
31253	NWAY_AR_10T_FD_CAPS	0x0040	e1000_hw.h	10T Full Duplex Capable
31254	NWAY_AR_100TX_HD_CAPS	0x0080	e1000_hw.h	100TX Half Duplex Capable
31255	NWAY_AR_100TX_FD_CAPS	0x0100	e1000_hw.h	100TX Full Duplex Capable
31256	NWAY_AR_100T4_CAPS	0x0200	e1000_hw.h	100T4 Capable
31257	NWAY_AR_PAUSE	0x0400	e1000_hw.h	Pause operation desired
31258	NWAY_AR_ASM_DIR	0x0800	e1000_hw.h	Asymmetric Pause Direction bit
31259	NWAY_AR_REMOTE_FAULT	0x2000	e1000_hw.h	Remote Fault detected
31260	NWAY_AR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
31261	NWAY_LPAR_SELECTOR_FIELD	0x0000	e1000_hw.h	LP protocol selector field
31262	NWAY_LPAR_10T_HD_CAPS	0x0020	e1000_hw.h	LP is 10T Half Duplex Capable
31263	NWAY_LPAR_10T_FD_CAPS	0x0040	e1000_hw.h	LP is 10T Full Duplex Capable
31264	NWAY_LPAR_100TX_HD_CAPS	0x0080	e1000_hw.h	LP is 100TX Half Duplex Capable
31265	NWAY_LPAR_100TX_FD_CAPS	0x0100	e1000_hw.h	LP is 100TX Full Duplex Capable
31266	NWAY_LPAR_100T4_CAPS	0x0200	e1000_hw.h	LP is 100T4 Capable
31267	NWAY_LPAR_PAUSE	0x0400	e1000_hw.h	LP Pause operation desired
31268	NWAY_LPAR_ASM_DIR	0x0800	e1000_hw.h	LP Asymmetric Pause Direction bit
31269	NWAY_LPAR_REMOTE_FAULT	0x2000	e1000_hw.h	LP has detected Remote Fault
31270	NWAY_LPAR_ACKNOWLEDGE	0x4000	e1000_hw.h	LP has rx'd link code word
31271	NWAY_LPAR_NEXT_PAGE	0x8000	e1000_hw.h	Next Page ability supported
31272	NWAY_ER_LP_NWAY_CAPS	0x0001	e1000_hw.h	LP has Auto Neg Capability
31273	NWAY_ER_PAGE_RXD	0x0002	e1000_hw.h	LP is 10T Half Duplex Capable
31274	NWAY_ER_NEXT_PAGE_CAPS	0x0004	e1000_hw.h	LP is 10T Full Duplex Capable
31275	NWAY_ER_LP_NEXT_PAGE_CAPS	0x0008	e1000_hw.h	LP is 100TX Half Duplex Capable
31276	NWAY_ER_PAR_DETECT_FAULT	0x0010	e1000_hw.h	LP is 100TX Full Duplex Capable
31277	NPTX_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
31278	NPTX_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
31279	NPTX_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
31280	NPTX_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
31281	NPTX_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
31282	LP_RNPR_MSG_CODE_FIELD	0x0001	e1000_hw.h	NP msg code or unformatted data
31283	LP_RNPR_TOGGLE	0x0800	e1000_hw.h	Toggles between exchanges
31284	LP_RNPR_ACKNOWLDGE2	0x1000	e1000_hw.h	1 = will comply with msg
31285	LP_RNPR_MSG_PAGE	0x2000	e1000_hw.h	formatted(1)/unformatted(0) pg
31286	LP_RNPR_ACKNOWLDGE	0x4000	e1000_hw.h	1 = ACK / 0 = NO ACK
31287	LP_RNPR_NEXT_PAGE	0x8000	e1000_hw.h	1 = addition NP will follow
31288	CR_1000T_ASYM_PAUSE	0x0080	e1000_hw.h	Advertise asymmetric pause bit
31289	CR_1000T_HD_CAPS	0x0100	e1000_hw.h	Advertise 1000T HD capability
31290	CR_1000T_FD_CAPS	0x0200	e1000_hw.h	Advertise 1000T FD capability
31291	CR_1000T_REPEATER_DTE	0x0400	e1000_hw.h	1=Repeater/switch device port
31292	CR_1000T_MS_VALUE	0x0800	e1000_hw.h	1=Configure PHY as Master
31293	CR_1000T_MS_ENABLE	0x1000	e1000_hw.h	1=Master/Slave manual config value
31294	CR_1000T_TEST_MODE_NORMAL	0x0000	e1000_hw.h	Normal Operation
31295	CR_1000T_TEST_MODE_1	0x2000	e1000_hw.h	Transmit Waveform test
31296	CR_1000T_TEST_MODE_2	0x4000	e1000_hw.h	Master Transmit Jitter test
31297	CR_1000T_TEST_MODE_3	0x6000	e1000_hw.h	Slave Transmit Jitter test
31298	CR_1000T_TEST_MODE_4	0x8000	e1000_hw.h	Transmitter Distortion test
31299	SR_1000T_IDLE_ERROR_CNT	0x00FF	e1000_hw.h	Num idle errors since last read
31300	SR_1000T_ASYM_PAUSE_DIR	0x0100	e1000_hw.h	LP asymmetric pause direction bit
31301	SR_1000T_LP_HD_CAPS	0x0400	e1000_hw.h	LP is 1000T HD capable
31302	SR_1000T_LP_FD_CAPS	0x0800	e1000_hw.h	LP is 1000T FD capable
31303	SR_1000T_REMOTE_RX_STATUS	0x1000	e1000_hw.h	Remote receiver OK
31304	SR_1000T_LOCAL_RX_STATUS	0x2000	e1000_hw.h	Local receiver OK
31305	SR_1000T_MS_CONFIG_RES	0x4000	e1000_hw.h	1=Local TX is Master, 0=Slave
31306	SR_1000T_MS_CONFIG_FAULT	0x8000	e1000_hw.h	Master/Slave config fault
31307	SR_1000T_REMOTE_RX_STATUS_SHIFT	12	e1000_hw.h
31308	SR_1000T_LOCAL_RX_STATUS_SHIFT	13	e1000_hw.h
31309	SR_1000T_PHY_EXCESSIVE_IDLE_ERR	5	e1000_hw.h
31310	FFE_IDLE_ERR_COUNT_TIMEOUT_20	20	e1000_hw.h
31311	FFE_IDLE_ERR_COUNT_TIMEOUT_100	100	e1000_hw.h
31312	IEEE_ESR_1000T_HD_CAPS	0x1000	e1000_hw.h	1000T HD capable
31313	IEEE_ESR_1000T_FD_CAPS	0x2000	e1000_hw.h	1000T FD capable
31314	IEEE_ESR_1000X_HD_CAPS	0x4000	e1000_hw.h	1000X HD capable
31315	IEEE_ESR_1000X_FD_CAPS	0x8000	e1000_hw.h	1000X FD capable
31316	PHY_TX_POLARITY_MASK	0x0100	e1000_hw.h	register 10h bit 8 (polarity bit)
31317	PHY_TX_NORMAL_POLARITY	0	e1000_hw.h	register 10h bit 8 (normal polarity)
31318	AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	register 11h bit 4
31319	M88E1000_PSCR_JABBER_DISABLE	0x0001	e1000_hw.h	1=Jabber Function disabled
31320	M88E1000_PSCR_POLARITY_REVERSAL	0x0002	e1000_hw.h	1=Polarity Reversal enabled
31321	M88E1000_PSCR_SQE_TEST	0x0004	e1000_hw.h	1=SQE Test enabled
31322	M88E1000_PSCR_CLK125_DISABLE	0x0010	e1000_hw.h	1=CLK125 low,
31323	M88E1000_PSCR_MDI_MANUAL_MODE	0x0000	e1000_hw.h	MDI Crossover Mode bits 6:5
31324	M88E1000_PSCR_MDIX_MANUAL_MODE	0x0020	e1000_hw.h	Manual MDIX configuration
31325	M88E1000_PSCR_AUTO_X_1000T	0x0040	e1000_hw.h	1000BASE-T: Auto crossover,
31326	M88E1000_PSCR_AUTO_X_MODE	0x0060	e1000_hw.h	Auto crossover enabled
31327	M88E1000_PSCR_10BT_EXT_DIST_ENA	0x0080	e1000_hw.h
31328	M88E1000_PSCR_MII_5BIT_ENABLE	0x0100	e1000_hw.h
31329	M88E1000_PSCR_SCRAMBLER_DISABLE	0x0200	e1000_hw.h	1=Scrambler disable
31330	M88E1000_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force link good
31331	M88E1000_PSCR_ASSERT_CRS_ON_TX	0x0800	e1000_hw.h	1=Assert CRS on Transmit
31332	M88E1000_PSCR_POLARITY_REVERSAL	1	e1000_hw.h
31333	M88E1000_PSCR_AUTO_X_MODE_SHIFT	5	e1000_hw.h
31334	M88E1000_PSCR_10BT_EXT_DIST_ENA	7	e1000_hw.h
31335	M88E1000_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
31336	M88E1000_PSSR_REV_POLARITY	0x0002	e1000_hw.h	1=Polarity reversed
31337	M88E1000_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshifted
31338	M88E1000_PSSR_MDIX	0x0040	e1000_hw.h	1=MDIX; 0=MDI
31339	M88E1000_PSSR_CABLE_LENGTH	0x0380	e1000_hw.h	0=<50M;1=50-80M;2=80-110M;
31340	M88E1000_PSSR_LINK	0x0400	e1000_hw.h	1=Link up, 0=Link down
31341	M88E1000_PSSR_SPD_DPLX_RESOLVED	0x0800	e1000_hw.h	1=Speed & Duplex resolved
31342	M88E1000_PSSR_PAGE_RCVD	0x1000	e1000_hw.h	1=Page received
31343	M88E1000_PSSR_DPLX	0x2000	e1000_hw.h	1=Duplex 0=Half Duplex
31344	M88E1000_PSSR_SPEED	0xC000	e1000_hw.h	Speed, bits 14:15
31345	M88E1000_PSSR_10MBS	0x0000	e1000_hw.h	00=10Mbs
31346	M88E1000_PSSR_100MBS	0x4000	e1000_hw.h	01=100Mbs
31347	M88E1000_PSSR_1000MBS	0x8000	e1000_hw.h	10=1000Mbs
31348	M88E1000_PSSR_REV_POLARITY_SHIF	1	e1000_hw.h
31349	M88E1000_PSSR_DOWNSHIFT_SHIFT	5	e1000_hw.h
31350	M88E1000_PSSR_MDIX_SHIFT	6	e1000_hw.h
31351	M88E1000_PSSR_CABLE_LENGTH_SHIF	7	e1000_hw.h
31352	M88E1000_EPSCR_FIBER_LOOPBACK	0x4000	e1000_hw.h	1=Fiber loopback
31353	M88E1000_EPSCR_DOWN_NO_IDLE	0x8000	e1000_hw.h	1=Lost lock detect enabled.
31354	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
31355	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0000	e1000_hw.h
31356	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0400	e1000_hw.h
31357	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0800	e1000_hw.h
31358	M88E1000_EPSCR_MASTER_DOWNSHIFT	0x0C00	e1000_hw.h
31359	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
31360	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0000	e1000_hw.h
31361	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0100	e1000_hw.h
31362	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0200	e1000_hw.h
31363	M88E1000_EPSCR_SLAVE_DOWNSHIFT_	0x0300	e1000_hw.h
31364	M88E1000_EPSCR_TX_CLK_2_5	0x0060	e1000_hw.h	2.5 MHz TX_CLK
31365	M88E1000_EPSCR_TX_CLK_25	0x0070	e1000_hw.h	25 MHz TX_CLK
31366	M88E1000_EPSCR_TX_CLK_0	0x0000	e1000_hw.h	NO TX_CLK
31367	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
31368	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0000	e1000_hw.h
31369	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0200	e1000_hw.h
31370	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0400	e1000_hw.h
31371	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0600	e1000_hw.h
31372	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0800	e1000_hw.h
31373	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0A00	e1000_hw.h
31374	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0C00	e1000_hw.h
31375	M88EC018_EPSCR_DOWNSHIFT_COUNTE	0x0E00	e1000_hw.h
31376	IGP01E1000_PSCFR_AUTO_MDIX_PAR_	0x0010	e1000_hw.h
31377	IGP01E1000_PSCFR_PRE_EN	0x0020	e1000_hw.h
31378	IGP01E1000_PSCFR_SMART_SPEED	0x0080	e1000_hw.h
31379	IGP01E1000_PSCFR_DISABLE_TPLOOP	0x0100	e1000_hw.h
31380	IGP01E1000_PSCFR_DISABLE_JABBER	0x0400	e1000_hw.h
31381	IGP01E1000_PSCFR_DISABLE_TRANSM	0x2000	e1000_hw.h
31382	IGP01E1000_PSSR_AUTONEG_FAILED	0x0001	e1000_hw.h	RO LH SC
31383	IGP01E1000_PSSR_POLARITY_REVERS	0x0002	e1000_hw.h
31384	IGP01E1000_PSSR_CABLE_LENGTH	0x007C	e1000_hw.h
31385	IGP01E1000_PSSR_FULL_DUPLEX	0x0200	e1000_hw.h
31386	IGP01E1000_PSSR_LINK_UP	0x0400	e1000_hw.h
31387	IGP01E1000_PSSR_MDIX	0x0800	e1000_hw.h
31388	IGP01E1000_PSSR_SPEED_MASK	0xC000	e1000_hw.h	speed bits mask
31389	IGP01E1000_PSSR_SPEED_10MBPS	0x4000	e1000_hw.h
31390	IGP01E1000_PSSR_SPEED_100MBPS	0x8000	e1000_hw.h
31391	IGP01E1000_PSSR_SPEED_1000MBPS	0xC000	e1000_hw.h
31392	IGP01E1000_PSSR_CABLE_LENGTH_SH	0x0002	e1000_hw.h	shift right 2
31393	IGP01E1000_PSSR_MDIX_SHIFT	0x000B	e1000_hw.h	shift right 11
31394	IGP01E1000_PSCR_TP_LOOPBACK	0x0010	e1000_hw.h
31395	IGP01E1000_PSCR_CORRECT_NC_SCMB	0x0200	e1000_hw.h
31396	IGP01E1000_PSCR_TEN_CRS_SELECT	0x0400	e1000_hw.h
31397	IGP01E1000_PSCR_FLIP_CHIP	0x0800	e1000_hw.h
31398	IGP01E1000_PSCR_AUTO_MDIX	0x1000	e1000_hw.h
31399	IGP01E1000_PSCR_FORCE_MDI_MDIX	0x2000	e1000_hw.h	0-MDI, 1-MDIX
31400	IGP01E1000_PLHR_SS_DOWNGRADE	0x8000	e1000_hw.h
31401	IGP01E1000_PLHR_GIG_SCRAMBLER_E	0x4000	e1000_hw.h
31402	IGP01E1000_PLHR_MASTER_FAULT	0x2000	e1000_hw.h
31403	IGP01E1000_PLHR_MASTER_RESOLUTI	0x1000	e1000_hw.h
31404	IGP01E1000_PLHR_GIG_REM_RCVR_NO	0x0800	e1000_hw.h	LH
31405	IGP01E1000_PLHR_IDLE_ERROR_CNT_	0x0400	e1000_hw.h	LH
31406	IGP01E1000_PLHR_DATA_ERR_1	0x0200	e1000_hw.h	LH
31407	IGP01E1000_PLHR_DATA_ERR_0	0x0100	e1000_hw.h
31408	IGP01E1000_PLHR_AUTONEG_FAULT	0x0040	e1000_hw.h
31409	IGP01E1000_PLHR_AUTONEG_ACTIVE	0x0010	e1000_hw.h
31410	IGP01E1000_PLHR_VALID_CHANNEL_D	0x0008	e1000_hw.h
31411	IGP01E1000_PLHR_VALID_CHANNEL_C	0x0004	e1000_hw.h
31412	IGP01E1000_PLHR_VALID_CHANNEL_B	0x0002	e1000_hw.h
31413	IGP01E1000_PLHR_VALID_CHANNEL_A	0x0001	e1000_hw.h
31414	IGP01E1000_MSE_CHANNEL_D	0x000F	e1000_hw.h
31415	IGP01E1000_MSE_CHANNEL_C	0x00F0	e1000_hw.h
31416	IGP01E1000_MSE_CHANNEL_B	0x0F00	e1000_hw.h
31417	IGP01E1000_MSE_CHANNEL_A	0xF000	e1000_hw.h
31418	IGP02E1000_PM_SPD	0x0001	e1000_hw.h	Smart Power Down
31419	IGP02E1000_PM_D3_LPLU	0x0004	e1000_hw.h	Enable LPLU in non-D0a modes
31420	IGP02E1000_PM_D0_LPLU	0x0002	e1000_hw.h	Enable LPLU in D0a mode
31421	DSP_RESET_ENABLE	0x0	e1000_hw.h
31422	DSP_RESET_DISABLE	0x2	e1000_hw.h
31423	E1000_MAX_DSP_RESETS	10	e1000_hw.h
31424	IGP01E1000_AGC_LENGTH_SHIFT	7	e1000_hw.h	Coarse - 13:11, Fine - 10:7
31425	IGP02E1000_AGC_LENGTH_SHIFT	9	e1000_hw.h	Coarse - 15:13, Fine - 12:9
31426	IGP02E1000_AGC_LENGTH_MASK	0x7F	e1000_hw.h
31427	IGP01E1000_AGC_LENGTH_TABLE_SIZ	128	e1000_hw.h
31428	IGP02E1000_AGC_LENGTH_TABLE_SIZ	113	e1000_hw.h
31429	IGP01E1000_AGC_RANGE	10	e1000_hw.h
31430	IGP02E1000_AGC_RANGE	15	e1000_hw.h
31431	IGP01E1000_PHY_POLARITY_MASK	0x0078	e1000_hw.h
31432	IGP01E1000_GMII_FLEX_SPD	0x10	e1000_hw.h	Enable flexible speed
31433	IGP01E1000_GMII_SPD	0x20	e1000_hw.h	Enable SPD
31434	IGP01E1000_ANALOG_SPARE_FUSE_ST	0x20D1	e1000_hw.h
31435	IGP01E1000_ANALOG_FUSE_STATUS	0x20D0	e1000_hw.h
31436	IGP01E1000_ANALOG_FUSE_CONTROL	0x20DC	e1000_hw.h
31437	IGP01E1000_ANALOG_FUSE_BYPASS	0x20DE	e1000_hw.h
31438	IGP01E1000_ANALOG_FUSE_POLY_MAS	0xF000	e1000_hw.h
31439	IGP01E1000_ANALOG_FUSE_FINE_MAS	0x0F80	e1000_hw.h
31440	IGP01E1000_ANALOG_FUSE_COARSE_M	0x0070	e1000_hw.h
31441	IGP01E1000_ANALOG_SPARE_FUSE_EN	0x0100	e1000_hw.h
31442	IGP01E1000_ANALOG_FUSE_ENABLE_S	0x0002	e1000_hw.h
31443	IGP01E1000_ANALOG_FUSE_COARSE_T	0x0040	e1000_hw.h
31444	IGP01E1000_ANALOG_FUSE_COARSE_1	0x0010	e1000_hw.h
31445	IGP01E1000_ANALOG_FUSE_FINE_1	0x0080	e1000_hw.h
31446	IGP01E1000_ANALOG_FUSE_FINE_10	0x0500	e1000_hw.h
31447	GG82563_PSCR_DISABLE_JABBER	0x0001	e1000_hw.h	1=Disable Jabber
31448	GG82563_PSCR_POLARITY_REVERSAL_	0x0002	e1000_hw.h	1=Polarity Reversal Disabled
31449	GG82563_PSCR_POWER_DOWN	0x0004	e1000_hw.h	1=Power Down
31450	GG82563_PSCR_COPPER_TRANSMITER_	0x0008	e1000_hw.h	1=Transmitter Disabled
31451	GG82563_PSCR_CROSSOVER_MODE_MAS	0x0060	e1000_hw.h
31452	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0000	e1000_hw.h	00=Manual MDI configuration
31453	GG82563_PSCR_CROSSOVER_MODE_MDI	0x0020	e1000_hw.h	01=Manual MDIX configuration
31454	GG82563_PSCR_CROSSOVER_MODE_AUT	0x0060	e1000_hw.h	11=Automatic crossover
31455	GG82563_PSCR_ENALBE_EXTENDED_DI	0x0080	e1000_hw.h	1=Enable Extended Distance
31456	GG82563_PSCR_ENERGY_DETECT_MASK	0x0300	e1000_hw.h
31457	GG82563_PSCR_ENERGY_DETECT_OFF	0x0000	e1000_hw.h	00,01=Off
31458	GG82563_PSCR_ENERGY_DETECT_RX	0x0200	e1000_hw.h	10=Sense on Rx only (Energy Detect)
31459	GG82563_PSCR_ENERGY_DETECT_RX_T	0x0300	e1000_hw.h	11=Sense and Tx NLP
31460	GG82563_PSCR_FORCE_LINK_GOOD	0x0400	e1000_hw.h	1=Force Link Good
31461	GG82563_PSCR_DOWNSHIFT_ENABLE	0x0800	e1000_hw.h	1=Enable Downshift
31462	GG82563_PSCR_DOWNSHIFT_COUNTER_	0x7000	e1000_hw.h
31463	GG82563_PSCR_DOWNSHIFT_COUNTER_	12	e1000_hw.h
31464	GG82563_PSSR_JABBER	0x0001	e1000_hw.h	1=Jabber
31465	GG82563_PSSR_POLARITY	0x0002	e1000_hw.h	1=Polarity Reversed
31466	GG82563_PSSR_LINK	0x0008	e1000_hw.h	1=Link is Up
31467	GG82563_PSSR_ENERGY_DETECT	0x0010	e1000_hw.h	1=Sleep, 0=Active
31468	GG82563_PSSR_DOWNSHIFT	0x0020	e1000_hw.h	1=Downshift
31469	GG82563_PSSR_CROSSOVER_STATUS	0x0040	e1000_hw.h	1=MDIX, 0=MDI
31470	GG82563_PSSR_RX_PAUSE_ENABLED	0x0100	e1000_hw.h	1=Receive Pause Enabled
31471	GG82563_PSSR_TX_PAUSE_ENABLED	0x0200	e1000_hw.h	1=Transmit Pause Enabled
31472	GG82563_PSSR_LINK_UP	0x0400	e1000_hw.h	1=Link Up
31473	GG82563_PSSR_SPEED_DUPLEX_RESOL	0x0800	e1000_hw.h	1=Resolved
31474	GG82563_PSSR_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
31475	GG82563_PSSR_DUPLEX	0x2000	e1000_hw.h	1-Full-Duplex
31476	GG82563_PSSR_SPEED_MASK	0xC000	e1000_hw.h
31477	GG82563_PSSR_SPEED_10MBPS	0x0000	e1000_hw.h	00=10Mbps
31478	GG82563_PSSR_SPEED_100MBPS	0x4000	e1000_hw.h	01=100Mbps
31479	GG82563_PSSR_SPEED_1000MBPS	0x8000	e1000_hw.h	10=1000Mbps
31480	GG82563_PSSR2_JABBER	0x0001	e1000_hw.h	1=Jabber
31481	GG82563_PSSR2_POLARITY_CHANGED	0x0002	e1000_hw.h	1=Polarity Changed
31482	GG82563_PSSR2_ENERGY_DETECT_CHA	0x0010	e1000_hw.h	1=Energy Detect Changed
31483	GG82563_PSSR2_DOWNSHIFT_INTERRU	0x0020	e1000_hw.h	1=Downshift Detected
31484	GG82563_PSSR2_MDI_CROSSOVER_CHA	0x0040	e1000_hw.h	1=Crossover Changed
31485	GG82563_PSSR2_FALSE_CARRIER	0x0100	e1000_hw.h	1=False Carrier
31486	GG82563_PSSR2_SYMBOL_ERROR	0x0200	e1000_hw.h	1=Symbol Error
31487	GG82563_PSSR2_LINK_STATUS_CHANG	0x0400	e1000_hw.h	1=Link Status Changed
31488	GG82563_PSSR2_AUTO_NEG_COMPLETE	0x0800	e1000_hw.h	1=Auto-Neg Completed
31489	GG82563_PSSR2_PAGE_RECEIVED	0x1000	e1000_hw.h	1=Page Received
31490	GG82563_PSSR2_DUPLEX_CHANGED	0x2000	e1000_hw.h	1=Duplex Changed
31491	GG82563_PSSR2_SPEED_CHANGED	0x4000	e1000_hw.h	1=Speed Changed
31492	GG82563_PSSR2_AUTO_NEG_ERROR	0x8000	e1000_hw.h	1=Auto-Neg Error
31493	GG82563_PSCR2_10BT_POLARITY_FOR	0x0002	e1000_hw.h	1=Force Negative Polarity
31494	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h
31495	GG82563_PSCR2_1000MB_TEST_SELEC	0x0000	e1000_hw.h	00,01=Normal Operation
31496	GG82563_PSCR2_1000MB_TEST_SELEC	0x0008	e1000_hw.h	10=Select 112ns Sequence
31497	GG82563_PSCR2_1000MB_TEST_SELEC	0x000C	e1000_hw.h	11=Select 16ns Sequence
31498	GG82563_PSCR2_REVERSE_AUTO_NEG	0x2000	e1000_hw.h	1=Reverse Auto-Negotiation
31499	GG82563_PSCR2_1000BT_DISABLE	0x4000	e1000_hw.h	1=Disable 1000BASE-T
31500	GG82563_PSCR2_TRANSMITER_TYPE_M	0x8000	e1000_hw.h
31501	GG82563_PSCR2_TRANSMITTER_TYPE_	0x0000	e1000_hw.h	0=Class B
31502	GG82563_PSCR2_TRANSMITTER_TYPE_	0x8000	e1000_hw.h	1=Class A
31503	GG82563_MSCR_TX_CLK_MASK	0x0007	e1000_hw.h
31504	GG82563_MSCR_TX_CLK_10MBPS_2_5M	0x0004	e1000_hw.h
31505	GG82563_MSCR_TX_CLK_100MBPS_25M	0x0005	e1000_hw.h
31506	GG82563_MSCR_TX_CLK_1000MBPS_2_	0x0006	e1000_hw.h
31507	GG82563_MSCR_TX_CLK_1000MBPS_25	0x0007	e1000_hw.h
31508	GG82563_MSCR_ASSERT_CRS_ON_TX	0x0010	e1000_hw.h	1=Assert
31509	GG82563_DSPD_CABLE_LENGTH	0x0007	e1000_hw.h	0 = <50M;
31510	GG82563_KMCR_PHY_LEDS_EN	0x0020	e1000_hw.h	1=PHY LEDs, 0=Kumeran Inband LEDs
31511	GG82563_KMCR_FORCE_LINK_UP	0x0040	e1000_hw.h	1=Force Link Up
31512	GG82563_KMCR_SUPPRESS_SGMII_EPD	0x0080	e1000_hw.h
31513	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h
31514	GG82563_KMCR_MDIO_BUS_SPEED_SEL	0x0400	e1000_hw.h	1=6.25MHz, 0=0.8MHz
31515	GG82563_KMCR_PASS_FALSE_CARRIER	0x0800	e1000_hw.h
31516	GG82563_PMCR_ENABLE_ELECTRICAL_	0x0001	e1000_hw.h	1=Enalbe SERDES Electrical Idle
31517	GG82563_PMCR_DISABLE_PORT	0x0002	e1000_hw.h	1=Disable Port
31518	GG82563_PMCR_DISABLE_SERDES	0x0004	e1000_hw.h	1=Disable SERDES
31519	GG82563_PMCR_REVERSE_AUTO_NEG	0x0008	e1000_hw.h	1=Enable Reverse Auto-Negotiation
31520	GG82563_PMCR_DISABLE_1000_NON_D	0x0010	e1000_hw.h	1=Disable 1000Mbps Auto-Neg in non D0
31521	GG82563_PMCR_DISABLE_1000	0x0020	e1000_hw.h	1=Disable 1000Mbps Auto-Neg Always
31522	GG82563_PMCR_REVERSE_AUTO_NEG_D	0x0040	e1000_hw.h	1=Enable D0a Reverse Auto-Negotiation
31523	GG82563_PMCR_FORCE_POWER_STATE	0x0080	e1000_hw.h	1=Force Power State
31524	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h
31525	GG82563_PMCR_PROGRAMMED_POWER_S	0x0000	e1000_hw.h	00=Dr
31526	GG82563_PMCR_PROGRAMMED_POWER_S	0x0100	e1000_hw.h	01=D0u
31527	GG82563_PMCR_PROGRAMMED_POWER_S	0x0200	e1000_hw.h	10=D0a
31528	GG82563_PMCR_PROGRAMMED_POWER_S	0x0300	e1000_hw.h	11=D3
31529	GG82563_ICR_DIS_PADDING	0x0010	e1000_hw.h	Disable Padding Use
31530	M88_VENDOR	0x0141	e1000_hw.h
31531	M88E1000_E_PHY_ID	0x01410C50	e1000_hw.h
31532	M88E1000_I_PHY_ID	0x01410C30	e1000_hw.h
31533	M88E1011_I_PHY_ID	0x01410C20	e1000_hw.h
31534	IGP01E1000_I_PHY_ID	0x02A80380	e1000_hw.h
31535	M88E1000_12_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
31536	M88E1000_14_PHY_ID	M88E1000_E_PHY_ID	e1000_hw.h
31537	M88E1011_I_REV_4	0x04	e1000_hw.h
31538	M88E1111_I_PHY_ID	0x01410CC0	e1000_hw.h
31539	L1LXT971A_PHY_ID	0x001378E0	e1000_hw.h
31540	GG82563_E_PHY_ID	0x01410CA0	e1000_hw.h
31541	PHY_PAGE_SHIFT	5	e1000_hw.h
31542	IGP3_PHY_PORT_CTRL	PHY_REG(769, 17)	e1000_hw.h	Port General Configuration
31543	IGP3_PHY_RATE_ADAPT_CTRL	PHY_REG(769, 25)	e1000_hw.h	Rate Adapter Control Register
31544	IGP3_KMRN_FIFO_CTRL_STATS	PHY_REG(770, 16)	e1000_hw.h	KMRN FIFO's control/status register
31545	IGP3_KMRN_POWER_MNG_CTRL	PHY_REG(770, 17)	e1000_hw.h	KMRN Power Management Control Register
31546	IGP3_KMRN_INBAND_CTRL	PHY_REG(770, 18)	e1000_hw.h	KMRN Inband Control Register
31547	IGP3_KMRN_DIAG	PHY_REG(770, 19)	e1000_hw.h	KMRN Diagnostic register
31548	IGP3_KMRN_DIAG_PCS_LOCK_LOSS	0x0002	e1000_hw.h	RX PCS is not synced
31549	IGP3_KMRN_ACK_TIMEOUT	PHY_REG(770, 20)	e1000_hw.h	KMRN Acknowledge Timeouts register
31550	IGP3_VR_CTRL	PHY_REG(776, 18)	e1000_hw.h	Voltage regulator control register
31551	IGP3_VR_CTRL_MODE_SHUT	0x0200	e1000_hw.h	Enter powerdown, shutdown VRs
31552	IGP3_VR_CTRL_MODE_MASK	0x0300	e1000_hw.h	Shutdown VR Mask
31553	IGP3_CAPABILITY	PHY_REG(776, 19)	e1000_hw.h	IGP3 Capability Register
31554	IGP3_CAP_INITIATE_TEAM	0x0001	e1000_hw.h	Able to initiate a team
31555	IGP3_CAP_WFM	0x0002	e1000_hw.h	Support WoL and PXE
31556	IGP3_CAP_ASF	0x0004	e1000_hw.h	Support ASF
31557	IGP3_CAP_LPLU	0x0008	e1000_hw.h	Support Low Power Link Up
31558	IGP3_CAP_DC_AUTO_SPEED	0x0010	e1000_hw.h	Support AC/DC Auto Link Speed
31559	IGP3_CAP_SPD	0x0020	e1000_hw.h	Support Smart Power Down
31560	IGP3_CAP_MULT_QUEUE	0x0040	e1000_hw.h	Support 2 tx & 2 rx queues
31561	IGP3_CAP_RSS	0x0080	e1000_hw.h	Support RSS
31562	IGP3_CAP_8021PQ	0x0100	e1000_hw.h	Support 802.1Q & 802.1p
31563	IGP3_CAP_AMT_CB	0x0200	e1000_hw.h	Support active manageability and circuit breaker
31564	IGP3_PPC_JORDAN_EN	0x0001	e1000_hw.h
31565	IGP3_PPC_JORDAN_GIGA_SPEED	0x0002	e1000_hw.h
31566	IGP3_KMRN_PMC_EE_IDLE_LINK_DIS	0x0001	e1000_hw.h
31567	IGP3_KMRN_PMC_K0S_ENTRY_LATENCY	0x001E	e1000_hw.h
31568	IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA	0x0020	e1000_hw.h
31569	IGP3_KMRN_PMC_K0S_MODE1_EN_100	0x0040	e1000_hw.h
31570	IGP3E1000_PHY_MISC_CTRL	0x1B	e1000_hw.h	Misc. Ctrl register
31571	IGP3_PHY_MISC_DUPLEX_MANUAL_SET	0x1000	e1000_hw.h	Duplex Manual Set
31572	IGP3_KMRN_EXT_CTRL	PHY_REG(770, 18)	e1000_hw.h
31573	IGP3_KMRN_EC_DIS_INBAND	0x0080	e1000_hw.h
31574	IGP03E1000_E_PHY_ID	0x02A80390	e1000_hw.h
31575	IFE_E_PHY_ID	0x02A80330	e1000_hw.h	10/100 PHY
31576	IFE_PLUS_E_PHY_ID	0x02A80320	e1000_hw.h
31577	IFE_C_E_PHY_ID	0x02A80310	e1000_hw.h
31578	IFE_PHY_EXTENDED_STATUS_CONTROL	0x10	e1000_hw.h	100BaseTx Extended Status, Control and Address
31579	IFE_PHY_SPECIAL_CONTROL	0x11	e1000_hw.h	100BaseTx PHY special control register
31580	IFE_PHY_RCV_FALSE_CARRIER	0x13	e1000_hw.h	100BaseTx Receive False Carrier Counter
31581	IFE_PHY_RCV_DISCONNECT	0x14	e1000_hw.h	100BaseTx Receive Disconnet Counter
31582	IFE_PHY_RCV_ERROT_FRAME	0x15	e1000_hw.h	100BaseTx Receive Error Frame Counter
31583	IFE_PHY_RCV_SYMBOL_ERR	0x16	e1000_hw.h	Receive Symbol Error Counter
31584	IFE_PHY_PREM_EOF_ERR	0x17	e1000_hw.h	100BaseTx Receive Premature End Of Frame Error Counter
31585	IFE_PHY_RCV_EOF_ERR	0x18	e1000_hw.h	10BaseT Receive End Of Frame Error Counter
31586	IFE_PHY_TX_JABBER_DETECT	0x19	e1000_hw.h	10BaseT Transmit Jabber Detect Counter
31587	IFE_PHY_EQUALIZER	0x1A	e1000_hw.h	PHY Equalizer Control and Status
31588	IFE_PHY_SPECIAL_CONTROL_LED	0x1B	e1000_hw.h	PHY special control and LED configuration
31589	IFE_PHY_MDIX_CONTROL	0x1C	e1000_hw.h	MDI/MDI-X Control register
31590	IFE_PHY_HWI_CONTROL	0x1D	e1000_hw.h	Hardware Integrity Control (HWI)
31591	IFE_PESC_REDUCED_POWER_DOWN_DIS	0x2000	e1000_hw.h	Defaut 1 = Disable auto reduced power down
31592	IFE_PESC_100BTX_POWER_DOWN	0x0400	e1000_hw.h	Indicates the power state of 100BASE-TX
31593	IFE_PESC_10BTX_POWER_DOWN	0x0200	e1000_hw.h	Indicates the power state of 10BASE-T
31594	IFE_PESC_POLARITY_REVERSED	0x0100	e1000_hw.h	Indicates 10BASE-T polarity
31595	IFE_PESC_PHY_ADDR_MASK	0x007C	e1000_hw.h	Bit 6:2 for sampled PHY address
31596	IFE_PESC_SPEED	0x0002	e1000_hw.h	Auto-negotiation speed result 1=100Mbs, 0=10Mbs
31597	IFE_PESC_DUPLEX	0x0001	e1000_hw.h	Auto-negotiation duplex result 1=Full, 0=Half
31598	IFE_PESC_POLARITY_REVERSED_SHIF	8	e1000_hw.h
31599	IFE_PSC_DISABLE_DYNAMIC_POWER_D	0x0100	e1000_hw.h	1 = Dyanmic Power Down disabled
31600	IFE_PSC_FORCE_POLARITY	0x0020	e1000_hw.h	1=Reversed Polarity, 0=Normal
31601	IFE_PSC_AUTO_POLARITY_DISABLE	0x0010	e1000_hw.h	1=Auto Polarity Disabled, 0=Enabled
31602	IFE_PSC_JABBER_FUNC_DISABLE	0x0001	e1000_hw.h	1=Jabber Disabled, 0=Normal Jabber Operation
31603	IFE_PSC_FORCE_POLARITY_SHIFT	5	e1000_hw.h
31604	IFE_PSC_AUTO_POLARITY_DISABLE_S	4	e1000_hw.h
31605	IFE_PMC_AUTO_MDIX	0x0080	e1000_hw.h	1=enable MDI/MDI-X feature, default 0=disabled
31606	IFE_PMC_FORCE_MDIX	0x0040	e1000_hw.h	1=force MDIX-X, 0=force MDI
31607	IFE_PMC_MDIX_STATUS	0x0020	e1000_hw.h	1=MDI-X, 0=MDI
31608	IFE_PMC_AUTO_MDIX_COMPLETE	0x0010	e1000_hw.h	Resolution algorithm is completed
31609	IFE_PMC_MDIX_MODE_SHIFT	6	e1000_hw.h
31610	IFE_PHC_MDIX_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable auto MDI-X
31611	IFE_PHC_HWI_ENABLE	0x8000	e1000_hw.h	Enable the HWI feature
31612	IFE_PHC_ABILITY_CHECK	0x4000	e1000_hw.h	1= Test Passed, 0=failed
31613	IFE_PHC_TEST_EXEC	0x2000	e1000_hw.h	PHY launch test pulses on the wire
31614	IFE_PHC_HIGHZ	0x0200	e1000_hw.h	1 = Open Circuit
31615	IFE_PHC_LOWZ	0x0400	e1000_hw.h	1 = Short Circuit
31616	IFE_PHC_LOW_HIGH_Z_MASK	0x0600	e1000_hw.h	Mask for indication type of problem on the line
31617	IFE_PHC_DISTANCE_MASK	0x01FF	e1000_hw.h	Mask for distance to the cable problem, in 80cm granularity
31618	IFE_PHC_RESET_ALL_MASK	0x0000	e1000_hw.h	Disable HWI
31619	IFE_PSCL_PROBE_MODE	0x0020	e1000_hw.h	LED Probe mode
31620	IFE_PSCL_PROBE_LEDS_OFF	0x0006	e1000_hw.h	Force LEDs 0 and 2 off
31621	IFE_PSCL_PROBE_LEDS_ON	0x0007	e1000_hw.h	Force LEDs 0 and 2 on
31622	ICH_FLASH_COMMAND_TIMEOUT	5000	e1000_hw.h	5000 uSecs - adjusted
31623	ICH_FLASH_ERASE_TIMEOUT	3000000	e1000_hw.h	Up to 3 seconds - worst case
31624	ICH_FLASH_CYCLE_REPEAT_COUNT	10	e1000_hw.h	10 cycles
31625	ICH_FLASH_SEG_SIZE_256	256	e1000_hw.h
31626	ICH_FLASH_SEG_SIZE_4K	4096	e1000_hw.h
31627	ICH_FLASH_SEG_SIZE_64K	65536	e1000_hw.h
31628	ICH_CYCLE_READ	0x0	e1000_hw.h
31629	ICH_CYCLE_RESERVED	0x1	e1000_hw.h
31630	ICH_CYCLE_WRITE	0x2	e1000_hw.h
31631	ICH_CYCLE_ERASE	0x3	e1000_hw.h
31632	ICH_FLASH_GFPREG	0x0000	e1000_hw.h
31633	ICH_FLASH_HSFSTS	0x0004	e1000_hw.h
31634	ICH_FLASH_HSFCTL	0x0006	e1000_hw.h
31635	ICH_FLASH_FADDR	0x0008	e1000_hw.h
31636	ICH_FLASH_FDATA0	0x0010	e1000_hw.h
31637	ICH_FLASH_FRACC	0x0050	e1000_hw.h
31638	ICH_FLASH_FREG0	0x0054	e1000_hw.h
31639	ICH_FLASH_FREG1	0x0058	e1000_hw.h
31640	ICH_FLASH_FREG2	0x005C	e1000_hw.h
31641	ICH_FLASH_FREG3	0x0060	e1000_hw.h
31642	ICH_FLASH_FPR0	0x0074	e1000_hw.h
31643	ICH_FLASH_FPR1	0x0078	e1000_hw.h
31644	ICH_FLASH_SSFSTS	0x0090	e1000_hw.h
31645	ICH_FLASH_SSFCTL	0x0092	e1000_hw.h
31646	ICH_FLASH_PREOP	0x0094	e1000_hw.h
31647	ICH_FLASH_OPTYPE	0x0096	e1000_hw.h
31648	ICH_FLASH_OPMENU	0x0098	e1000_hw.h
31649	ICH_FLASH_REG_MAPSIZE	0x00A0	e1000_hw.h
31650	ICH_FLASH_SECTOR_SIZE	4096	e1000_hw.h
31651	ICH_GFPREG_BASE_MASK	0x1FFF	e1000_hw.h
31652	ICH_FLASH_LINEAR_ADDR_MASK	0x00FFFFFF	e1000_hw.h
31653	PHY_PREAMBLE	0xFFFFFFFF	e1000_hw.h
31654	PHY_SOF	0x01	e1000_hw.h
31655	PHY_OP_READ	0x02	e1000_hw.h
31656	PHY_OP_WRITE	0x01	e1000_hw.h
31657	PHY_TURNAROUND	0x02	e1000_hw.h
31658	PHY_PREAMBLE_SIZE	32	e1000_hw.h
31659	MII_CR_SPEED_1000	0x0040	e1000_hw.h
31660	MII_CR_SPEED_100	0x2000	e1000_hw.h
31661	MII_CR_SPEED_10	0x0000	e1000_hw.h
31662	E1000_PHY_ADDRESS	0x01	e1000_hw.h
31663	PHY_AUTO_NEG_TIME	45	e1000_hw.h	4.5 Seconds
31664	PHY_FORCE_TIME	20	e1000_hw.h	2.0 Seconds
31665	PHY_REVISION_MASK	0xFFFFFFF0	e1000_hw.h
31666	DEVICE_SPEED_MASK	0x00000300	e1000_hw.h	Device Ctrl Reg Speed Mask
31667	REG4_SPEED_MASK	0x01E0	e1000_hw.h
31668	REG9_SPEED_MASK	0x0300	e1000_hw.h
31669	ADVERTISE_10_HALF	0x0001	e1000_hw.h
31670	ADVERTISE_10_FULL	0x0002	e1000_hw.h
31671	ADVERTISE_100_HALF	0x0004	e1000_hw.h
31672	ADVERTISE_100_FULL	0x0008	e1000_hw.h
31673	ADVERTISE_1000_HALF	0x0010	e1000_hw.h
31674	ADVERTISE_1000_FULL	0x0020	e1000_hw.h
31675	AUTONEG_ADVERTISE_SPEED_DEFAULT	0x002F	e1000_hw.h	Everything but 1000-Half
31676	AUTONEG_ADVERTISE_10_100_ALL	0x000F	e1000_hw.h	All 10/100 speeds
31677	AUTONEG_ADVERTISE_10_ALL	0x0003	e1000_hw.h	10Mbps Full & Half speeds
31678	DEBUGOUT2	DEBUGOUT1	e1000_osdep.h
31679	DEBUGOUT3	DEBUGOUT1	e1000_osdep.h
31680	DEBUGOUT7	DEBUGOUT1	e1000_osdep.h
31681	E1000_READ_REG_ARRAY_DWORD	E1000_READ_REG_ARRAY	e1000_osdep.h
31682	E1000_WRITE_REG_ARRAY_DWORD	E1000_WRITE_REG_ARRAY	e1000_osdep.h
31683	TID_START	0x1234	ib_mad.c
31684	TID_INC	117	ib_mad.c
31685	STRUCT_ALIGN_SZ	4096	ib_mt23108.c
31686	SRC_BUF_SZ	(sizeof(struct device_buffers_st) + STRUCT_ALIGN_SZ - 1)	ib_mt23108.c
31687	breakpoint	{volatile __u32 p=(__u32 )0x1234;printf("breakpoint\n");do {} while((*p) != 0x1234);}	ib_mt25218.c
31688	STRUCT_ALIGN_SZ	4096	ib_mt25218.c
31689	SRC_BUF_SZ	(sizeof(struct device_buffers_st) + STRUCT_ALIGN_SZ - 1)	ib_mt25218.c
31690	NUM_MAC_ENTRIES	(NUM_AVS+2)	ipoib.c
31691	XDEV_CMD_INIT_HCA	0x7	cmdif_comm.h
31692	XDEV_CMD_CLOSE_HCA	0x8	cmdif_comm.h
31693	XDEV_CMD_INIT_IB	0x9	cmdif_comm.h
31694	XDEV_CMD_CLOSE_IB	0xa	cmdif_comm.h
31695	XDEV_CMD_SW2HW_MPT	0xd	cmdif_comm.h
31696	XDEV_CMD_HW2SW_MPT	0xf	cmdif_comm.h
31697	XDEV_CMD_MAP_EQ	0x12	cmdif_comm.h
31698	XDEV_CMD_SW2HW_EQ	0x13	cmdif_comm.h
31699	XDEV_CMD_HW2SW_EQ	0x14	cmdif_comm.h
31700	XDEV_CMD_SW2HW_CQ	0x16	cmdif_comm.h
31701	XDEV_CMD_HW2SW_CQ	0x17	cmdif_comm.h
31702	XDEV_CMD_RST2INIT_QPEE	0x19	cmdif_comm.h
31703	XDEV_CMD_INIT2RTR_QPEE	0x1a	cmdif_comm.h
31704	XDEV_CMD_RTR2RTS_QPEE	0x1b	cmdif_comm.h
31705	XDEV_CMD_2ERR_QPEE	0x1e	cmdif_comm.h
31706	XDEV_CMD_ERR2RST_QPEE	0x21	cmdif_comm.h
31707	XDEV_CMD_MAD_IFC	0x24	cmdif_comm.h
31708	XDEV_CMD_READ_MGM	0x25	cmdif_comm.h
31709	XDEV_CMD_MGID_HASH	0x27	cmdif_comm.h
31710	XDEV_CMD_POST_DOORBELL	0x41	cmdif_comm.h
31711	MELLANOX_VENDOR_ID	0x15b3	ib_driver.h
31712	GLOBAL_PD	0x123456	ib_driver.h
31713	GLOBAL_QKEY	0x80010000	ib_driver.h
31714	MAD_BUF_SZ	256	ib_driver.h
31715	IPOIB_RCV_BUF_SZ	2048	ib_driver.h
31716	IPOIB_SND_BUF_SZ	2048	ib_driver.h
31717	GRH_SIZE	40	ib_driver.h
31718	ARP_BUF_SZ	56	ib_driver.h
31719	FL_EOL	255	ib_driver.h	end of free list
31720	SEND_CQE_POLL_TOUT	38	ib_driver.h	2 sec
31721	SA_RESP_POLL_TOUT	91	ib_driver.h	5 seconds
31722	NUM_AVS	10	ib_driver.h
31723	PXE_IB_PORT	1	ib_driver.h
31724	SA_QPN	1	ib_driver.h
31725	BCAST_QPN	0xffffff	ib_driver.h
31726	QPN_BASE	0x550000	ib_driver.h
31727	HCR_BASE	0x80680	ib_driver.h
31728	HCR_OFFSET_GO	0x80698	ib_driver.h
31729	HCR_OFFSET_STATUS	0x80698	ib_driver.h
31730	HCR_OFFSET_OUTPRM_H	0x8068C	ib_driver.h
31731	HCR_OFFSET_OUTPRM_L	0x80690	ib_driver.h
31732	MKEY_PREFIX	0x77000000	ib_driver.h
31733	MKEY_IDX_MASK	0xffffff	ib_driver.h
31734	XDEV_EV_TYPE_CQ_COMP	0	ib_driver.h
31735	XDEV_EV_TYPE_CQ_ERR	0x04	ib_driver.h
31736	XDEV_EV_TYPE_LOCAL_WQ_CATAS_ERR	0x05	ib_driver.h
31737	XDEV_EV_TYPE_PORT_ERR	0x09	ib_driver.h
31738	XDEV_EV_TYPE_LOCAL_WQ_INVALID_R	0x10	ib_driver.h
31739	XDEV_EV_TYPE_LOCAL_WQ_ACCESS_VI	0x11	ib_driver.h
31740	XDEV_NOPCODE_SEND	10	ib_driver.h	Send
31741	IB_MGMT_BASE_VERSION	1	ib_mad.h
31742	IB_MGMT_CLASS_SUBN_LID_ROUTED	0x01	ib_mad.h
31743	IB_MGMT_CLASS_SUBN_DIRECTED_ROU	0x81	ib_mad.h
31744	IB_MGMT_CLASS_SUBN_ADM	0x03	ib_mad.h
31745	IB_MGMT_CLASS_PERF_MGMT	0x04	ib_mad.h
31746	IB_MGMT_CLASS_BM	0x05	ib_mad.h
31747	IB_MGMT_CLASS_DEVICE_MGMT	0x06	ib_mad.h
31748	IB_MGMT_CLASS_CM	0x07	ib_mad.h
31749	IB_MGMT_CLASS_SNMP	0x08	ib_mad.h
31750	IB_MGMT_CLASS_VENDOR_RANGE2_STA	0x30	ib_mad.h
31751	IB_MGMT_CLASS_VENDOR_RANGE2_END	0x4F	ib_mad.h
31752	IB_MGMT_METHOD_GET	0x01	ib_mad.h
31753	IB_MGMT_METHOD_SET	0x02	ib_mad.h
31754	IB_MGMT_METHOD_GET_RESP	0x81	ib_mad.h
31755	IB_MGMT_METHOD_SEND	0x03	ib_mad.h
31756	IB_MGMT_METHOD_TRAP	0x05	ib_mad.h
31757	IB_MGMT_METHOD_REPORT	0x06	ib_mad.h
31758	IB_MGMT_METHOD_REPORT_RESP	0x86	ib_mad.h
31759	IB_MGMT_METHOD_TRAP_REPRESS	0x07	ib_mad.h
31760	IB_MGMT_METHOD_DELETE	0x15	ib_mad.h
31761	IB_MGMT_METHOD_RESP	0x80	ib_mad.h
31762	IB_SMP_ATTR_NOTICE	0x0002	ib_mad.h
31763	IB_SMP_ATTR_NODE_DESC	0x0010	ib_mad.h
31764	IB_SMP_ATTR_NODE_INFO	0x0011	ib_mad.h
31765	IB_SMP_ATTR_SWITCH_INFO	0x0012	ib_mad.h
31766	IB_SMP_ATTR_GUID_INFO	0x0014	ib_mad.h
31767	IB_SMP_ATTR_PORT_INFO	0x0015	ib_mad.h
31768	IB_SMP_ATTR_PKEY_TABLE	0x0016	ib_mad.h
31769	IB_SMP_ATTR_SL_TO_VL_TABLE	0x0017	ib_mad.h
31770	IB_SMP_ATTR_VL_ARB_TABLE	0x0018	ib_mad.h
31771	IB_SMP_ATTR_LINEAR_FORWARD_TABL	0x0019	ib_mad.h
31772	IB_SMP_ATTR_RANDOM_FORWARD_TABL	0x001A	ib_mad.h
31773	IB_SMP_ATTR_MCAST_FORWARD_TABLE	0x001B	ib_mad.h
31774	IB_SMP_ATTR_SM_INFO	0x0020	ib_mad.h
31775	IB_SMP_ATTR_VENDOR_DIAG	0x0030	ib_mad.h
31776	IB_SMP_ATTR_LED_INFO	0x0031	ib_mad.h
31777	IB_SMP_ATTR_VENDOR_MASK	0xFF00	ib_mad.h
31778	ARP_PROT_TYPE	0x806	ipoib.h
31779	IPV4_PROT_TYPE	0x800	ipoib.h
31780	IPOIB_HW_TYPE	0x20	ipoib.h
31781	ETH_HW_TYPE	1	ipoib.h
31782	ARP_OP_REQUESET	1	ipoib.h
31783	ARP_OP_REPLY	2	ipoib.h
31784	MLX_ETH_3BYTE_PREFIX	0x2c9	ipoib.h	00,02,c9
31785	MLX_ETH_BYTE0	0	ipoib.h
31786	MLX_ETH_BYTE1	2	ipoib.h
31787	MLX_ETH_BYTE2	0xC9	ipoib.h
31788	IP_PROT_UDP	17	ipoib.h
31789	DHCP_TYPE_REQUEST	1	ipoib.h
31790	DHCP_TYPE_RESPONSE	2	ipoib.h
31791	DHCP_TYPE_ACK	5	ipoib.h
31792	IB_SA_ATTR_MC_MEMBER_REC	0x38	mad_attrib.h
31793	IB_SA_ATTR_PATH_REC	0x35	mad_attrib.h
31794	IB_SA_MCMEMBER_REC_MGID	(1<<0)	mad_attrib.h
31795	IB_SA_MCMEMBER_REC_PORT_GID	(1<<1)	mad_attrib.h
31796	IB_SA_MCMEMBER_REC_QKEY	(1<<2)	mad_attrib.h
31797	IB_SA_MCMEMBER_REC_MLID	(1<<3)	mad_attrib.h
31798	IB_SA_MCMEMBER_REC_MTU_SELECTOR	(1<<4)	mad_attrib.h
31799	IB_SA_MCMEMBER_REC_MTU	(1<<5)	mad_attrib.h
31800	IB_SA_MCMEMBER_REC_TRAFFIC_CLAS	(1<<6)	mad_attrib.h
31801	IB_SA_MCMEMBER_REC_PKEY	(1<<7)	mad_attrib.h
31802	IB_SA_MCMEMBER_REC_RATE_SELECTO	(1<<8)	mad_attrib.h
31803	IB_SA_MCMEMBER_REC_RATE	(1<<9)	mad_attrib.h
31804	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<10)	mad_attrib.h
31805	IB_SA_MCMEMBER_REC_PACKET_LIFE_	(1<<11)	mad_attrib.h
31806	IB_SA_MCMEMBER_REC_SL	(1<<12)	mad_attrib.h
31807	IB_SA_MCMEMBER_REC_FLOW_LABEL	(1<<13)	mad_attrib.h
31808	IB_SA_MCMEMBER_REC_HOP_LIMIT	(1<<14)	mad_attrib.h
31809	IB_SA_MCMEMBER_REC_SCOPE	(1<<15)	mad_attrib.h
31810	IB_SA_MCMEMBER_REC_JOIN_STATE	(1<<16)	mad_attrib.h
31811	IB_SA_MCMEMBER_REC_PROXY_JOIN	(1<<17)	mad_attrib.h
31812	IB_SA_PATH_REC_DGID	(1<<2)	mad_attrib.h
31813	IB_SA_PATH_REC_SGID	(1<<3)	mad_attrib.h
31814	TAVOR_DEVICE_ID	0x5a44	mt23108.h
31815	TAVOR_BRIDGE_DEVICE_ID	0x5a46	mt23108.h
31816	ARTAVOR_DEVICE_ID	0x6278	mt23108.h
31817	TAVOR_RESET_OFFSET	0xF0010	mt23108.h
31818	TAVOR_CMD_SYS_EN	0x1	mt23108.h
31819	TAVOR_CMD_SYS_DIS	0x2	mt23108.h
31820	TAVOR_CMD_WRITE_MGM	0x26	mt23108.h
31821	TAVOR_CMD_MOD_STAT_CFG	0x34	mt23108.h
31822	TAVOR_CMD_QUERY_DEV_LIM	0x003	mt23108.h
31823	TAVOR_CMD_QUERY_FW	0x004	mt23108.h
31824	TAVOR_IF_EV_TYPE_OVERRUN	0x0F	mt23108.h
31825	EQ_DBELL_CMD_INC_CONS_IDX	1	mt23108.h	increment Consumer_indx by one
31826	EQ_DBELL_CMD_ARM_EQ	2	mt23108.h	Request notifcation for next event (Arm EQ)
31827	EQ_DBELL_CMD_DISARM_CQ	3	mt23108.h	Disarm CQ (CQ number is specified in EQ_param)
31828	EQ_DBELL_CMD_SET_CONS_IDX	4	mt23108.h	set Consumer_indx to value of EQ_param
31829	EQ_DBELL_CMD_ALWAYS_ARM	5	mt23108.h	move EQ to Always Armed state
31830	CQ_DBELL_CMD_INC_CONS_IDX	1	mt23108.h
31831	CQ_DBELL_CMD_REQ_NOTIF_SOL_UNSO	2	mt23108.h
31832	CQ_DBELL_CMD_REQ_NOTIF_SOL	3	mt23108.h
31833	CQ_DBELL_CMD_SET_CONS_IDX	4	mt23108.h
31834	CQ_DBELL_CMD_REQ_NOTIF_MULT	5	mt23108.h
31835	INPRM_BUF_SZ	0x200	mt23108.h
31836	INPRM_BUF_ALIGN	16	mt23108.h
31837	OUTPRM_BUF_SZ	0x200	mt23108.h
31838	OUTPRM_BUF_ALIGN	16	mt23108.h
31839	SW2HW_MPT_IBUF_SZ	MT_STRUCT_SIZE(tavorprm_mpt_st)	mt23108.h
31840	SW2HW_EQ_IBUF_SZ	MT_STRUCT_SIZE(tavorprm_eqc_st)	mt23108.h
31841	INIT_IB_IBUF_SZ	0x100	mt23108.h
31842	SW2HW_CQ_IBUF_SZ	0x40	mt23108.h
31843	QPCTX_IBUF_SZ	0x200	mt23108.h
31844	EQN	0	mt23108.h
31845	UAR_IDX	1	mt23108.h
31846	QPC_OFFSET	0	mt23108.h
31847	CQC_OFFSET	(QPC_OFFSET + 0x100000)	mt23108.h
31848	EQPC_OFFSET	(CQC_OFFSET + 0x100000)	mt23108.h
31849	EQC_OFFSET	(EQPC_OFFSET + 0x100000)	mt23108.h
31850	MC_BASE_OFFSET	(EQC_OFFSET + 0x100000)	mt23108.h
31851	MPT_BASE_OFFSET	(MC_BASE_OFFSET + 0x100000)	mt23108.h
31852	MTT_BASE_OFFSET	(MPT_BASE_OFFSET + 0x100000)	mt23108.h
31853	LOG2_QPS	7	mt23108.h
31854	LOG2_CQS	8	mt23108.h
31855	LOG2_EQS	6	mt23108.h
31856	LOG2_MC_ENTRY	6	mt23108.h	8 QPs per group
31857	LOG2_MC_GROUPS	3	mt23108.h	8 groups
31858	LOG2_MPT_ENTRIES	5	mt23108.h
31859	LOG2_EQ_SZ	5	mt23108.h
31860	LOG2_CQ_SZ	5	mt23108.h
31861	NUM_PORTS	2	mt23108.h
31862	EQE_OWNER_SW	0	mt23108.h
31863	EQE_OWNER_HW	1	mt23108.h
31864	OWNER_HW	1	mt23108.h
31865	OWNER_SW	0	mt23108.h
31866	POST_RCV_OFFSET	0x18	mt23108.h
31867	POST_SND_OFFSET	0x10	mt23108.h
31868	CQ_DBELL_OFFSET	0x20	mt23108.h
31869	EQ_DBELL_OFFSET	0x28	mt23108.h
31870	CQE_ERROR_OPCODE	0xfe	mt23108.h
31871	MAX_GATHER	1	mt23108.h	max gather entries used in send
31872	MAX_SCATTER	2	mt23108.h
31873	LOG2_MADS_SND_CQ_SZ	LOG2_CQ_SZ	mt23108.h
31874	LOG2_MADS_RCV_CQ_SZ	LOG2_CQ_SZ	mt23108.h
31875	LOG2_IPOIB_SND_CQ_SZ	LOG2_CQ_SZ	mt23108.h
31876	LOG2_IPOIB_RCV_CQ_SZ	LOG2_CQ_SZ	mt23108.h
31877	NUM_MADS_SND_CQES	(1<<LOG2_MADS_SND_CQ_SZ)	mt23108.h
31878	NUM_MADS_RCV_CQES	(1<<LOG2_MADS_RCV_CQ_SZ)	mt23108.h
31879	NUM_IPOIB_SND_CQES	(1<<LOG2_IPOIB_SND_CQ_SZ)	mt23108.h
31880	NUM_IPOIB_RCV_CQES	(1<<LOG2_IPOIB_RCV_CQ_SZ)	mt23108.h
31881	NUM_MADS_RCV_WQES	3	mt23108.h
31882	NUM_IPOIB_RCV_WQES	8	mt23108.h
31883	MAX_RCV_WQES	NUM_MADS_RCV_WQES	mt23108.h
31884	MAX_RCV_WQES	NUM_IPOIB_RCV_WQES	mt23108.h
31885	NUM_MADS_SND_WQES	2	mt23108.h
31886	NUM_IPOIB_SND_WQES	2	mt23108.h
31887	MAX_SND_WQES	NUM_MADS_SND_WQES	mt23108.h
31888	MAX_SND_WQES	NUM_IPOIB_SND_WQES	mt23108.h
31889	RECV_WQE_U_ALIGN	64	mt23108.h
31890	UD_SEND_WQE_U_ALIGN	64	mt23108.h
31891	ADDRESS_VECTOR_ST_ALIGN	64	mt23108.h
31892	TAVOR_DEVICE_ID	0x5a44	mt25218.h
31893	TAVOR_BRIDGE_DEVICE_ID	0x5a46	mt25218.h
31894	ARTAVOR_DEVICE_ID	0x6278	mt25218.h
31895	MEMFREE_RESET_OFFSET	0xF0010	mt25218.h
31896	INVALID_WQE_LKEY	0x00000100	mt25218.h
31897	MEMFREE_CMD_QUERY_ADAPTER	0x006	mt25218.h
31898	MEMFREE_CMD_WRITE_MGM	0x026	mt25218.h
31899	MEMFREE_CMD_MOD_STAT_CFG	0x034	mt25218.h
31900	MEMFREE_CMD_QUERY_FW	0x004	mt25218.h
31901	MEMFREE_CMD_ENABLE_LAM	0xff8	mt25218.h
31902	MEMFREE_CMD_MAP_FA	0xfff	mt25218.h
31903	MEMFREE_CMD_UNMAP_FA	0xffe	mt25218.h
31904	MEMFREE_CMD_RUN_FW	0xff6	mt25218.h
31905	MEMFREE_CMD_SET_ICM_SIZE	0xffd	mt25218.h
31906	MEMFREE_CMD_MAP_ICM_AUX	0xffc	mt25218.h
31907	MEMFREE_CMD_MAP_ICM	0xffa	mt25218.h
31908	MEMFREE_CMD_QUERY_DEV_LIM	0x003	mt25218.h
31909	TAVOR_IF_EV_TYPE_OVERRUN	0x0F	mt25218.h
31910	EQ_DBELL_CMD_INC_CONS_IDX	1	mt25218.h	increment Consumer_indx by one
31911	EQ_DBELL_CMD_ARM_EQ	2	mt25218.h	Request notifcation for next event (Arm EQ)
31912	EQ_DBELL_CMD_DISARM_CQ	3	mt25218.h	Disarm CQ (CQ number is specified in EQ_param)
31913	EQ_DBELL_CMD_SET_CONS_IDX	4	mt25218.h	set Consumer_indx to value of EQ_param
31914	EQ_DBELL_CMD_ALWAYS_ARM	5	mt25218.h	move EQ to Always Armed state
31915	CQ_DBELL_CMD_INC_CONS_IDX	1	mt25218.h
31916	CQ_DBELL_CMD_REQ_NOTIF_SOL_UNSO	2	mt25218.h
31917	CQ_DBELL_CMD_REQ_NOTIF_SOL	3	mt25218.h
31918	CQ_DBELL_CMD_SET_CONS_IDX	4	mt25218.h
31919	CQ_DBELL_CMD_REQ_NOTIF_MULT	5	mt25218.h
31920	INPRM_BUF_SZ	4096	mt25218.h
31921	INPRM_BUF_ALIGN	4096	mt25218.h
31922	OUTPRM_BUF_SZ	4096	mt25218.h
31923	OUTPRM_BUF_ALIGN	4096	mt25218.h
31924	SW2HW_MPT_IBUF_SZ	MT_STRUCT_SIZE(arbelprm_mpt_st)	mt25218.h
31925	SW2HW_EQ_IBUF_SZ	MT_STRUCT_SIZE(arbelprm_eqc_st)	mt25218.h
31926	INIT_IB_IBUF_SZ	MT_STRUCT_SIZE(arbelprm_init_ib_st)	mt25218.h
31927	SW2HW_CQ_IBUF_SZ	MT_STRUCT_SIZE(arbelprm_completion_queue_context_st)	mt25218.h
31928	QPCTX_IBUF_SZ	MT_STRUCT_SIZE(arbelprm_queue_pair_ee_context_entry_st)	mt25218.h
31929	EQN	0	mt25218.h
31930	UAR_IDX	1	mt25218.h
31931	QPC_OFFSET	0	mt25218.h
31932	CQC_OFFSET	(QPC_OFFSET + 0x100000)	mt25218.h
31933	EQPC_OFFSET	(CQC_OFFSET + 0x100000)	mt25218.h
31934	EQC_OFFSET	(EQPC_OFFSET + 0x100000)	mt25218.h
31935	MC_BASE_OFFSET	(EQC_OFFSET + 0x100000)	mt25218.h
31936	MPT_BASE_OFFSET	(MC_BASE_OFFSET + 0x100000)	mt25218.h
31937	MTT_BASE_OFFSET	(MPT_BASE_OFFSET + 0x100000)	mt25218.h
31938	LOG2_QPS	7	mt25218.h
31939	LOG2_CQS	8	mt25218.h
31940	LOG2_EQS	6	mt25218.h
31941	LOG2_MC_ENTRY	6	mt25218.h	8 QPs per group
31942	LOG2_MC_GROUPS	3	mt25218.h	8 groups
31943	LOG2_MPT_ENTRIES	5	mt25218.h
31944	LOG2_EQ_SZ	5	mt25218.h
31945	LOG2_CQ_SZ	5	mt25218.h
31946	NUM_PORTS	2	mt25218.h
31947	EQE_OWNER_OFFSET	31	mt25218.h
31948	EQE_OWNER_VAL_HW	0x80	mt25218.h
31949	CQE_OWNER_OFFSET	31	mt25218.h
31950	CQE_OWNER_VAL_HW	0x80	mt25218.h
31951	POST_RCV_OFFSET	0x18	mt25218.h
31952	POST_SND_OFFSET	0x10	mt25218.h
31953	CQ_DBELL_OFFSET	0x20	mt25218.h
31954	EQ_DBELL_OFFSET	0x28	mt25218.h
31955	CQE_ERROR_OPCODE	0xfe	mt25218.h
31956	OWNER_HW	1	mt25218.h
31957	OWNER_SW	0	mt25218.h
31958	MAX_GATHER	1	mt25218.h	max gather entries used in send
31959	MAX_SCATTER	2	mt25218.h
31960	LOG2_MADS_SND_CQ_SZ	LOG2_CQ_SZ	mt25218.h
31961	LOG2_MADS_RCV_CQ_SZ	LOG2_CQ_SZ	mt25218.h
31962	LOG2_IPOIB_SND_CQ_SZ	LOG2_CQ_SZ	mt25218.h
31963	LOG2_IPOIB_RCV_CQ_SZ	LOG2_CQ_SZ	mt25218.h
31964	NUM_MADS_SND_CQES	(1<<LOG2_MADS_SND_CQ_SZ)	mt25218.h
31965	NUM_MADS_RCV_CQES	(1<<LOG2_MADS_RCV_CQ_SZ)	mt25218.h
31966	NUM_IPOIB_SND_CQES	(1<<LOG2_IPOIB_SND_CQ_SZ)	mt25218.h
31967	NUM_IPOIB_RCV_CQES	(1<<LOG2_IPOIB_RCV_CQ_SZ)	mt25218.h
31968	NUM_MADS_RCV_WQES	(1<<1)	mt25218.h
31969	NUM_IPOIB_RCV_WQES	(1<<1)	mt25218.h
31970	MAX_RCV_WQES	NUM_MADS_RCV_WQES	mt25218.h
31971	MAX_RCV_WQES	NUM_IPOIB_RCV_WQES	mt25218.h
31972	NUM_MADS_SND_WQES	(1<<1)	mt25218.h
31973	NUM_IPOIB_SND_WQES	(1<<1)	mt25218.h
31974	MAX_SND_WQES	NUM_MADS_SND_WQES	mt25218.h
31975	MAX_SND_WQES	NUM_IPOIB_SND_WQES	mt25218.h
31976	RECV_WQE_U_ALIGN	64	mt25218.h
31977	UD_SEND_WQE_U_ALIGN	128	mt25218.h
31978	MAX_VPM_PER_CALL	1	mt25218.h
31979	PHN_SPI_LOCK_TIMEOUT_MS	100	phantom.c
31980	PHN_SPI_CMD_TIMEOUT_MS	100	phantom.c
31981	PHN_CMDPEG_INIT_TIMEOUT_SEC	50	phantom.c
31982	PHN_RCVPEG_INIT_TIMEOUT_SEC	2	phantom.c
31983	PHN_ISSUE_CMD_TIMEOUT_MS	2000	phantom.c
31984	PHN_TEST_MEM_TIMEOUT_MS	100	phantom.c
31985	PHN_LINK_POLL_FREQUENCY	4096	phantom.c
31986	PHN_NUM_RDS	32	phantom.c
31987	PHN_RDS_MAX_FILL	16	phantom.c
31988	PHN_RX_BUFSIZE	( 32 + \ ETH_FRAME_LEN )	phantom.c
31989	PHN_NUM_SDS	32	phantom.c
31990	PHN_NUM_CDS	8	phantom.c
31991	NX_CDRP_CLEAR	0x00000000	nxhal_nic_interface.h
31992	NX_CDRP_CMD_BIT	0x80000000	nxhal_nic_interface.h
31993	NX_CDRP_RSP_OK	0x00000001	nxhal_nic_interface.h
31994	NX_CDRP_RSP_FAIL	0x00000002	nxhal_nic_interface.h
31995	NX_CDRP_RSP_TIMEOUT	0x00000003	nxhal_nic_interface.h
31996	NX_CDRP_CMD_SUBMIT_CAPABILITIES	0x00000001	nxhal_nic_interface.h
31997	NX_CDRP_CMD_READ_MAX_RDS_PER_CT	0x00000002	nxhal_nic_interface.h
31998	NX_CDRP_CMD_READ_MAX_SDS_PER_CT	0x00000003	nxhal_nic_interface.h
31999	NX_CDRP_CMD_READ_MAX_RULES_PER_	0x00000004	nxhal_nic_interface.h
32000	NX_CDRP_CMD_READ_MAX_RX_CTX	0x00000005	nxhal_nic_interface.h
32001	NX_CDRP_CMD_READ_MAX_TX_CTX	0x00000006	nxhal_nic_interface.h
32002	NX_CDRP_CMD_CREATE_RX_CTX	0x00000007	nxhal_nic_interface.h
32003	NX_CDRP_CMD_DESTROY_RX_CTX	0x00000008	nxhal_nic_interface.h
32004	NX_CDRP_CMD_CREATE_TX_CTX	0x00000009	nxhal_nic_interface.h
32005	NX_CDRP_CMD_DESTROY_TX_CTX	0x0000000a	nxhal_nic_interface.h
32006	NX_CDRP_CMD_SETUP_STATISTICS	0x0000000e	nxhal_nic_interface.h
32007	NX_CDRP_CMD_GET_STATISTICS	0x0000000f	nxhal_nic_interface.h
32008	NX_CDRP_CMD_DELETE_STATISTICS	0x00000010	nxhal_nic_interface.h
32009	NX_CDRP_CMD_MAX	0x00000011	nxhal_nic_interface.h
32010	NX_CAP0_LEGACY_CONTEXT	NX_CAP_BIT(0, 0)	nxhal_nic_interface.h
32011	NX_CAP0_MULTI_CONTEXT	NX_CAP_BIT(0, 1)	nxhal_nic_interface.h
32012	NX_CAP0_LEGACY_MN	NX_CAP_BIT(0, 2)	nxhal_nic_interface.h
32013	NX_CAP0_LEGACY_MS	NX_CAP_BIT(0, 3)	nxhal_nic_interface.h
32014	NX_CAP0_CUT_THROUGH	NX_CAP_BIT(0, 4)	nxhal_nic_interface.h
32015	NX_CAP0_LRO	NX_CAP_BIT(0, 5)	nxhal_nic_interface.h
32016	NX_CAP0_LSO	NX_CAP_BIT(0, 6)	nxhal_nic_interface.h
32017	NX_CAP1_NIC	NX_CAP_BIT(1, 0)	nxhal_nic_interface.h
32018	NX_CAP1_PXE	NX_CAP_BIT(1, 1)	nxhal_nic_interface.h
32019	NX_CAP1_CHIMNEY	NX_CAP_BIT(1, 2)	nxhal_nic_interface.h
32020	NX_CAP1_LSA	NX_CAP_BIT(1, 3)	nxhal_nic_interface.h
32021	NX_CAP1_RDMA	NX_CAP_BIT(1, 4)	nxhal_nic_interface.h
32022	NX_CAP1_ISCSI	NX_CAP_BIT(1, 5)	nxhal_nic_interface.h
32023	NX_CAP1_FCOE	NX_CAP_BIT(1, 6)	nxhal_nic_interface.h
32024	NX_RX_RULETYPE_DEFAULT	0	nxhal_nic_interface.h
32025	NX_RX_RULETYPE_MAC	1	nxhal_nic_interface.h
32026	NX_RX_RULETYPE_MAC_VLAN	2	nxhal_nic_interface.h
32027	NX_RX_RULETYPE_MAC_RSS	3	nxhal_nic_interface.h
32028	NX_RX_RULETYPE_MAC_VLAN_RSS	4	nxhal_nic_interface.h
32029	NX_RX_RULETYPE_MAX	5	nxhal_nic_interface.h
32030	NX_RX_RULECMD_ADD	0	nxhal_nic_interface.h
32031	NX_RX_RULECMD_REMOVE	1	nxhal_nic_interface.h
32032	NX_RX_RULECMD_MAX	2	nxhal_nic_interface.h
32033	NX_HOST_CTX_STATE_FREED	0	nxhal_nic_interface.h	Invalid state
32034	NX_HOST_CTX_STATE_ALLOCATED	1	nxhal_nic_interface.h	Not committed
32035	NX_HOST_CTX_STATE_ACTIVE	2	nxhal_nic_interface.h
32036	NX_HOST_CTX_STATE_DISABLED	3	nxhal_nic_interface.h
32037	NX_HOST_CTX_STATE_QUIESCED	4	nxhal_nic_interface.h
32038	NX_HOST_CTX_STATE_MAX	5	nxhal_nic_interface.h
32039	NX_HOST_INT_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h
32040	NX_HOST_INT_CRB_MODE_SHARED	1	nxhal_nic_interface.h	<= LEGACY
32041	NX_HOST_INT_CRB_MODE_NORX	2	nxhal_nic_interface.h
32042	NX_HOST_INT_CRB_MODE_NOTX	3	nxhal_nic_interface.h
32043	NX_HOST_INT_CRB_MODE_NORXTX	4	nxhal_nic_interface.h
32044	NX_DESTROY_CTX_RESET	0	nxhal_nic_interface.h
32045	NX_DESTROY_CTX_D3_RESET	1	nxhal_nic_interface.h
32046	NX_DESTROY_CTX_MAX	2	nxhal_nic_interface.h
32047	NX_HOST_RDS_CRB_MODE_UNIQUE	0	nxhal_nic_interface.h	<= LEGACY
32048	NX_HOST_RDS_CRB_MODE_SHARED	1	nxhal_nic_interface.h
32049	NX_HOST_RDS_CRB_MODE_CUSTOM	2	nxhal_nic_interface.h
32050	NX_HOST_RDS_CRB_MODE_MAX	3	nxhal_nic_interface.h
32051	NX_RDS_RING_TYPE_NORMAL	0	nxhal_nic_interface.h
32052	NX_RDS_RING_TYPE_JUMBO	1	nxhal_nic_interface.h
32053	NX_RDS_RING_TYPE_LRO	2	nxhal_nic_interface.h
32054	NX_RDS_RING_TYPE_MAX	3	nxhal_nic_interface.h
32055	NX_STATISTICS_MODE_INVALID	0	nxhal_nic_interface.h
32056	NX_STATISTICS_MODE_PULL	1	nxhal_nic_interface.h
32057	NX_STATISTICS_MODE_PUSH	2	nxhal_nic_interface.h
32058	NX_STATISTICS_MODE_SINGLE_SHOT	3	nxhal_nic_interface.h
32059	NX_STATISTICS_MODE_MAX	4	nxhal_nic_interface.h
32060	NX_STATISTICS_TYPE_INVALID	0	nxhal_nic_interface.h
32061	NX_STATISTICS_TYPE_NIC_RX_CORE	1	nxhal_nic_interface.h
32062	NX_STATISTICS_TYPE_NIC_TX_CORE	2	nxhal_nic_interface.h
32063	NX_STATISTICS_TYPE_NIC_RX_ALL	3	nxhal_nic_interface.h
32064	NX_STATISTICS_TYPE_NIC_TX_ALL	4	nxhal_nic_interface.h
32065	NX_STATISTICS_TYPE_MAX	5	nxhal_nic_interface.h
32066	NXHAL_VERSION	1	phantom.h
32067	UNM_SPI_BLKSIZE	4	phantom.h
32068	UNM_DMA_BUFFER_ALIGN	16	phantom.h
32069	__unm_dma_aligned	__attribute__ (( aligned ( UNM_DMA_BUFFER_ALIGN ) ))	phantom.h
32070	UNM_DUMMY_DMA_SIZE	1024	phantom.h
32071	UNM_128M_CRB_WINDOW	0x6110210UL	phantom.h
32072	UNM_32M_CRB_WINDOW	0x0110210UL	phantom.h
32073	UNM_2M_CRB_WINDOW	0x0130060UL	phantom.h
32074	UNM_CRB_PCIE	UNM_CRB_BASE ( UNM_CRB_BLK_PCIE )	phantom.h
32075	UNM_PCIE_SEM2_LOCK	( UNM_CRB_PCIE + 0x1c010 )	phantom.h
32076	UNM_PCIE_SEM2_UNLOCK	( UNM_CRB_PCIE + 0x1c014 )	phantom.h
32077	UNM_CRB_CAM	UNM_CRB_BASE ( UNM_CRB_BLK_CAM )	phantom.h
32078	UNM_CAM_RAM	( UNM_CRB_CAM + 0x02000 )	phantom.h
32079	UNM_CAM_RAM_PORT_MODE	( UNM_CAM_RAM + 0x00024 )	phantom.h
32080	UNM_CAM_RAM_PORT_MODE_AUTO_NEG	4	phantom.h
32081	UNM_CAM_RAM_PORT_MODE_AUTO_NEG_	5	phantom.h
32082	UNM_CAM_RAM_DMESG_SIG_MAGIC	0xcafebabeUL	phantom.h
32083	UNM_CAM_RAM_NUM_DMESG_BUFFERS	5	phantom.h
32084	UNM_CAM_RAM_WOL_PORT_MODE	( UNM_CAM_RAM + 0x00198 )	phantom.h
32085	UNM_CAM_RAM_MAC_ADDRS	( UNM_CAM_RAM + 0x001c0 )	phantom.h
32086	UNM_CAM_RAM_COLD_BOOT	( UNM_CAM_RAM + 0x001fc )	phantom.h
32087	UNM_CAM_RAM_COLD_BOOT_MAGIC	0x55555555UL	phantom.h
32088	UNM_NIC_REG	( UNM_CRB_CAM + 0x02200 )	phantom.h
32089	UNM_NIC_REG_NX_CDRP	( UNM_NIC_REG + 0x00018 )	phantom.h
32090	UNM_NIC_REG_NX_ARG1	( UNM_NIC_REG + 0x0001c )	phantom.h
32091	UNM_NIC_REG_NX_ARG2	( UNM_NIC_REG + 0x00020 )	phantom.h
32092	UNM_NIC_REG_NX_ARG3	( UNM_NIC_REG + 0x00024 )	phantom.h
32093	UNM_NIC_REG_NX_SIGN	( UNM_NIC_REG + 0x00028 )	phantom.h
32094	UNM_NIC_REG_DUMMY_BUF_ADDR_HI	( UNM_NIC_REG + 0x0003c )	phantom.h
32095	UNM_NIC_REG_DUMMY_BUF_ADDR_LO	( UNM_NIC_REG + 0x00040 )	phantom.h
32096	UNM_NIC_REG_CMDPEG_STATE	( UNM_NIC_REG + 0x00050 )	phantom.h
32097	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xff01	phantom.h
32098	UNM_NIC_REG_CMDPEG_STATE_INITIA	0xf00f	phantom.h
32099	UNM_NIC_REG_DUMMY_BUF	( UNM_NIC_REG + 0x000fc )	phantom.h
32100	UNM_NIC_REG_DUMMY_BUF_INIT	0	phantom.h
32101	UNM_NIC_REG_XG_STATE_P3	( UNM_NIC_REG + 0x00098 )	phantom.h
32102	UNM_NIC_REG_XG_STATE_P3_LINK_UP	0x01	phantom.h
32103	UNM_NIC_REG_XG_STATE_P3_LINK_DO	0x02	phantom.h
32104	UNM_NIC_REG_RCVPEG_STATE	( UNM_NIC_REG + 0x0013c )	phantom.h
32105	UNM_NIC_REG_RCVPEG_STATE_INITIA	0xff01	phantom.h
32106	UNM_NIC_REG_SW_INT_MASK_0	( UNM_NIC_REG + 0x001d8 )	phantom.h
32107	UNM_NIC_REG_SW_INT_MASK_1	( UNM_NIC_REG + 0x001e0 )	phantom.h
32108	UNM_NIC_REG_SW_INT_MASK_2	( UNM_NIC_REG + 0x001e4 )	phantom.h
32109	UNM_NIC_REG_SW_INT_MASK_3	( UNM_NIC_REG + 0x001e8 )	phantom.h
32110	UNM_CRB_ROMUSB	UNM_CRB_BASE ( UNM_CRB_BLK_ROMUSB )	phantom.h
32111	UNM_ROMUSB_GLB	( UNM_CRB_ROMUSB + 0x00000 )	phantom.h
32112	UNM_ROMUSB_GLB_STATUS	( UNM_ROMUSB_GLB + 0x00004 )	phantom.h
32113	UNM_ROMUSB_GLB_STATUS_ROM_DONE	( 1 << 1 )	phantom.h
32114	UNM_ROMUSB_GLB_SW_RESET	( UNM_ROMUSB_GLB + 0x00008 )	phantom.h
32115	UNM_ROMUSB_GLB_SW_RESET_MAGIC	0x0080000fUL	phantom.h
32116	UNM_ROMUSB_GLB_PEGTUNE_DONE	( UNM_ROMUSB_GLB + 0x0005c )	phantom.h
32117	UNM_ROMUSB_GLB_PEGTUNE_DONE_MAG	0x31	phantom.h
32118	UNM_ROMUSB_ROM	( UNM_CRB_ROMUSB + 0x10000 )	phantom.h
32119	UNM_ROMUSB_ROM_INSTR_OPCODE	( UNM_ROMUSB_ROM + 0x00004 )	phantom.h
32120	UNM_ROMUSB_ROM_ADDRESS	( UNM_ROMUSB_ROM + 0x00008 )	phantom.h
32121	UNM_ROMUSB_ROM_WDATA	( UNM_ROMUSB_ROM + 0x0000c )	phantom.h
32122	UNM_ROMUSB_ROM_ABYTE_CNT	( UNM_ROMUSB_ROM + 0x00010 )	phantom.h
32123	UNM_ROMUSB_ROM_DUMMY_BYTE_CNT	( UNM_ROMUSB_ROM + 0x00014 )	phantom.h
32124	UNM_ROMUSB_ROM_RDATA	( UNM_ROMUSB_ROM + 0x00018 )	phantom.h
32125	UNM_CRB_TEST	UNM_CRB_BASE ( UNM_CRB_BLK_TEST )	phantom.h
32126	UNM_TEST_CONTROL	( UNM_CRB_TEST + 0x00090 )	phantom.h
32127	UNM_TEST_CONTROL_START	0x01	phantom.h
32128	UNM_TEST_CONTROL_ENABLE	0x02	phantom.h
32129	UNM_TEST_CONTROL_BUSY	0x08	phantom.h
32130	UNM_TEST_ADDR_LO	( UNM_CRB_TEST + 0x00094 )	phantom.h
32131	UNM_TEST_ADDR_HI	( UNM_CRB_TEST + 0x00098 )	phantom.h
32132	UNM_TEST_RDDATA_LO	( UNM_CRB_TEST + 0x000a8 )	phantom.h
32133	UNM_TEST_RDDATA_HI	( UNM_CRB_TEST + 0x000ac )	phantom.h
32134	UNM_BRDCFG_START	0x4000	phantom.h
32135	UNM_BDINFO_VERSION	1	phantom.h
32136	UNM_BRDTYPE_P3_HMEZ	0x0022	phantom.h
32137	UNM_BRDTYPE_P3_10G_CX4_LP	0x0023	phantom.h
32138	UNM_BRDTYPE_P3_4_GB	0x0024	phantom.h
32139	UNM_BRDTYPE_P3_IMEZ	0x0025	phantom.h
32140	UNM_BRDTYPE_P3_10G_SFP_PLUS	0x0026	phantom.h
32141	UNM_BRDTYPE_P3_10000_BASE_T	0x0027	phantom.h
32142	UNM_BRDTYPE_P3_XG_LOM	0x0028	phantom.h
32143	UNM_BRDTYPE_P3_4_GB_MM	0x0029	phantom.h
32144	UNM_BRDTYPE_P3_10G_CX4	0x0031	phantom.h
32145	UNM_BRDTYPE_P3_10G_XFP	0x0032	phantom.h
32146	UNM_BDINFO_MAGIC	0x12345678	phantom.h
32147	UNM_USER_START	0x3e8000	phantom.h
32148	UNM_FLASH_NUM_PORTS	4	phantom.h
32149	UNM_FLASH_NUM_MAC_PER_PORT	32	phantom.h
32150	READLINE_MAX	256	readline.c
32151	ERRFILE	0	strerror.c
32152	INPUT_DELAY	200	kb.c	half-blocking delay timer resolution (ms)
32153	INPUT_DELAY_TIMEOUT	1000	kb.c	half-blocking delay timeout
32154	MIN_SPACE_SIZE	2	slk.c
32155	SLK_MAX_LABEL_LEN	8	slk.c
32156	SLK_MAX_NUM_LABELS	12	slk.c
32157	SLK_MAX_NUM_SPACES	2	slk.c
32158	WRAP	0	mucurses.h
32159	NOWRAP	1	mucurses.h
32160	EDITBOX_MIN_CHARS	3	editbox.c
32161	CPAIR_NORMAL	1	settings_ui.c
32162	CPAIR_SELECT	2	settings_ui.c
32163	CPAIR_EDIT	3	settings_ui.c
32164	CPAIR_ALERT	4	settings_ui.c
32165	TITLE_ROW	1	settings_ui.c
32166	SETTINGS_LIST_ROW	3	settings_ui.c
32167	SETTINGS_LIST_COL	1	settings_ui.c
32168	INFO_ROW	20	settings_ui.c
32169	ALERT_ROW	20	settings_ui.c
32170	INSTRUCTION_ROW	22	settings_ui.c
32171	INSTRUCTION_PAD	" "	settings_ui.c
32172	NUM_SETTINGS	( ( unsigned ) ( all_settings_end - all_settings ) )	settings_ui.c
32173	ASSERTING	0	assert.h
32174	ASSERTING	1	assert.h
32175	NON_STANDARD_BOOTP_SERVER	1067	bootp.h
32176	NON_STANDARD_BOOTP_CLIENT	1068	bootp.h
32177	BOOTP_SERVER	NON_STANDARD_BOOTP_SERVER	bootp.h
32178	BOOTP_SERVER	67	bootp.h
32179	BOOTP_CLIENT	NON_STANDARD_BOOTP_CLIENT	bootp.h
32180	BOOTP_CLIENT	68	bootp.h
32181	PROXYDHCP_SERVER	4011	bootp.h	For PXE
32182	BOOTP_REQUEST	1	bootp.h
32183	BOOTP_REPLY	2	bootp.h
32184	RFC1533_COOKIE	99, 130, 83, 99	bootp.h
32185	RFC1533_PAD	0	bootp.h
32186	RFC1533_NETMASK	1	bootp.h
32187	RFC1533_TIMEOFFSET	2	bootp.h
32188	RFC1533_GATEWAY	3	bootp.h
32189	RFC1533_TIMESERVER	4	bootp.h
32190	RFC1533_IEN116NS	5	bootp.h
32191	RFC1533_DNS	6	bootp.h
32192	RFC1533_LOGSERVER	7	bootp.h
32193	RFC1533_COOKIESERVER	8	bootp.h
32194	RFC1533_LPRSERVER	9	bootp.h
32195	RFC1533_IMPRESSSERVER	10	bootp.h
32196	RFC1533_RESOURCESERVER	11	bootp.h
32197	RFC1533_HOSTNAME	12	bootp.h
32198	RFC1533_BOOTFILESIZE	13	bootp.h
32199	RFC1533_MERITDUMPFILE	14	bootp.h
32200	RFC1533_DOMAINNAME	15	bootp.h
32201	RFC1533_SWAPSERVER	16	bootp.h
32202	RFC1533_ROOTPATH	17	bootp.h
32203	RFC1533_EXTENSIONPATH	18	bootp.h
32204	RFC1533_IPFORWARDING	19	bootp.h
32205	RFC1533_IPSOURCEROUTING	20	bootp.h
32206	RFC1533_IPPOLICYFILTER	21	bootp.h
32207	RFC1533_IPMAXREASSEMBLY	22	bootp.h
32208	RFC1533_IPTTL	23	bootp.h
32209	RFC1533_IPMTU	24	bootp.h
32210	RFC1533_IPMTUPLATEAU	25	bootp.h
32211	RFC1533_INTMTU	26	bootp.h
32212	RFC1533_INTLOCALSUBNETS	27	bootp.h
32213	RFC1533_INTBROADCAST	28	bootp.h
32214	RFC1533_INTICMPDISCOVER	29	bootp.h
32215	RFC1533_INTICMPRESPOND	30	bootp.h
32216	RFC1533_INTROUTEDISCOVER	31	bootp.h
32217	RFC1533_INTROUTESOLICIT	32	bootp.h
32218	RFC1533_INTSTATICROUTES	33	bootp.h
32219	RFC1533_LLTRAILERENCAP	34	bootp.h
32220	RFC1533_LLARPCACHETMO	35	bootp.h
32221	RFC1533_LLETHERNETENCAP	36	bootp.h
32222	RFC1533_TCPTTL	37	bootp.h
32223	RFC1533_TCPKEEPALIVETMO	38	bootp.h
32224	RFC1533_TCPKEEPALIVEGB	39	bootp.h
32225	RFC1533_NISDOMAIN	40	bootp.h
32226	RFC1533_NISSERVER	41	bootp.h
32227	RFC1533_NTPSERVER	42	bootp.h
32228	RFC1533_VENDOR	43	bootp.h
32229	RFC1533_NBNS	44	bootp.h
32230	RFC1533_NBDD	45	bootp.h
32231	RFC1533_NBNT	46	bootp.h
32232	RFC1533_NBSCOPE	47	bootp.h
32233	RFC1533_XFS	48	bootp.h
32234	RFC1533_XDM	49	bootp.h
32235	RFC2132_REQ_ADDR	50	bootp.h
32236	RFC2132_MSG_TYPE	53	bootp.h
32237	RFC2132_SRV_ID	54	bootp.h
32238	RFC2132_PARAM_LIST	55	bootp.h
32239	RFC2132_MAX_SIZE	57	bootp.h
32240	RFC2132_VENDOR_CLASS_ID	60	bootp.h
32241	RFC2132_CLIENT_ID	61	bootp.h
32242	RFC2132_TFTP_SERVER_NAME	66	bootp.h
32243	RFC2132_BOOTFILE_NAME	67	bootp.h
32244	RFC3004_USER_CLASS	77	bootp.h
32245	RFC3679_PXE_CLIENT_ARCH	93	bootp.h
32246	RFC3679_PXE_CLIENT_NDI	94	bootp.h
32247	RFC3679_PXE_CLIENT_UUID	97	bootp.h
32248	RFC3679_PXE_CLIENT_ARCH_LENGTH	2	bootp.h
32249	RFC3679_PXE_CLIENT_NDI_LENGTH	3	bootp.h
32250	RFC3679_PXE_CLIENT_UUID_LENGTH	17	bootp.h
32251	RFC3679_PXE_CLIENT_ARCH_IAX86PC	0,0	bootp.h
32252	RFC3679_PXE_CLIENT_ARCH_NECPC98	0,1	bootp.h
32253	RFC3679_PXE_CLIENT_ARCH_IA64PC	0,2	bootp.h
32254	RFC3679_PXE_CLIENT_ARCH_DECALPH	0,3	bootp.h
32255	RFC3679_PXE_CLIENT_ARCH_ARCX86	0,4	bootp.h
32256	RFC3679_PXE_CLIENT_ARCH_INTELLE	0,5	bootp.h
32257	RFC3679_PXE_CLIENT_NDI_21	1,2,1	bootp.h
32258	RFC3679_PXE_CLIENT_UUID_TYPE	0	bootp.h
32259	RFC3679_PXE_CLIENT_UUID_DEFAULT	RFC3679_PXE_CLIENT_UUID_TYPE, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF	bootp.h
32260	RFC2132_VENDOR_CLASS_ID_PXE_LEN	32	bootp.h
32261	RFC2132_VENDOR_CLASS_ID_PXE	'P','X','E','C','l','i','e','n','t',':', \ 'A','r','c','h',':','0','0','0','0','0',':', \ 'U','N','D','I',':','0','0','2','0'	bootp.h
32262	RFC1533_VENDOR_PXE_OPT128	128	bootp.h
32263	RFC1533_VENDOR_PXE_OPT129	129	bootp.h
32264	RFC1533_VENDOR_PXE_OPT130	130	bootp.h
32265	RFC1533_VENDOR_PXE_OPT131	131	bootp.h
32266	RFC1533_VENDOR_PXE_OPT132	132	bootp.h
32267	RFC1533_VENDOR_PXE_OPT133	133	bootp.h
32268	RFC1533_VENDOR_PXE_OPT134	134	bootp.h
32269	RFC1533_VENDOR_PXE_OPT135	135	bootp.h
32270	DHCPDISCOVER	1	bootp.h
32271	DHCPOFFER	2	bootp.h
32272	DHCPREQUEST	3	bootp.h
32273	DHCPACK	5	bootp.h
32274	RFC1533_VENDOR_MAJOR	0	bootp.h
32275	RFC1533_VENDOR_MINOR	0	bootp.h
32276	RFC1533_VENDOR_MAGIC	128	bootp.h
32277	RFC1533_VENDOR_ADDPARM	129	bootp.h
32278	RFC1533_VENDOR_ETHDEV	130	bootp.h
32279	RFC1533_VENDOR_ETHERBOOT_ENCAP	150	bootp.h
32280	RFC1533_VENDOR_HOWTO	132	bootp.h
32281	RFC1533_VENDOR_KERNEL_ENV	133	bootp.h
32282	RFC1533_VENDOR_NIC_DEV_ID	175	bootp.h
32283	RFC1533_VENDOR_ARCH	177	bootp.h
32284	RFC1533_END	255	bootp.h
32285	BOOTP_VENDOR_LEN	64	bootp.h
32286	DHCP_OPT_LEN	312	bootp.h
32287	u32	unsigned int	btext.h
32288	u16	unsigned short	btext.h
32289	u8	unsigned char	btext.h
32290	BOOTX_COLORTABLE_SIZE	(256UL3UL2UL)	btext.h
32291	CMDL_BUFFER_SIZE	256	cmdlinelib.h
32292	CMDL_PROMPT_SIZE	8	cmdlinelib.h
32293	CMDL_MAX_TAB_COMPLETE_RESULT	256	cmdlinelib.h
32294	NULL	((void *)0)	cmdlinelib.h
32295	F_RELFLG	0x0001	coff.h	If set, not reloc. info. Clear for executables
32296	F_EXEC	0x0002	coff.h	No unresolved symbols. Executable file !
32297	F_LNNO	0x0004	coff.h	If set, line information numbers removed
32298	F_LSYMS	0x0008	coff.h	If set, local symbols removed
32299	F_AR32WR	0x0100	coff.h	Indicates little endian file
32300	EM_E1	0x17a	coff.h	Magic number for Hyperstone. Big endian format
32301	O_MAGIC	0x017c	coff.h	Optional's header magic number for Hyperstone
32302	S_TYPE_TEXT	0x0020	coff.h	If set, the section contains only executable
32303	S_TYPE_DATA	0x0040	coff.h	If set, the section contains only initialized data
32304	S_TYPE_BSS	0x0080	coff.h	If set, the section is BSS no data stored
32305	OBJECT_SYMBOL	PREFIX_OBJECT(obj_)	compiler.h
32306	OBJECT_SYMBOL_STR	_XSTR ( OBJECT_SYMBOL )	compiler.h
32307	DEBUG_SYMBOL	PREFIX_OBJECT(debug_)	compiler.h
32308	DEBUG_SYMBOL_STR	_XSTR ( DEBUG_SYMBOL )	compiler.h
32309	DBGLVL	DEBUG_SYMBOL	compiler.h
32310	DBGLVL	0	compiler.h
32311	DBGLVL_LOG	1	compiler.h
32312	DBG_LOG	( DBGLVL & DBGLVL_LOG )	compiler.h
32313	DBGLVL_EXTRA	2	compiler.h
32314	DBG_EXTRA	( DBGLVL & DBGLVL_EXTRA )	compiler.h
32315	DBGLVL_PROFILE	4	compiler.h
32316	DBG_PROFILE	( DBGLVL & DBGLVL_PROFILE )	compiler.h
32317	DBGLVL_IO	8	compiler.h
32318	DBG_IO	( DBGLVL & DBGLVL_IO )	compiler.h
32319	ERRFILE	PREFIX_OBJECT ( ERRFILE_ )	compiler.h
32320	PACKED	__attribute__ (( packed ))	compiler.h
32321	__unused	__attribute__ (( unused ))	compiler.h
32322	__cdecl	__attribute__ (( cdecl , regparm(0) ))	compiler.h
32323	__pure	__attribute__ (( pure ))	compiler.h
32324	__const	__attribute__ (( const ))	compiler.h
32325	__nonnull	__attribute__ (( nonnull ))	compiler.h
32326	__malloc	__attribute__ (( malloc ))	compiler.h
32327	__used	__attribute__ (( used ))	compiler.h
32328	__aligned	__attribute__ (( aligned ( 16 ) ))	compiler.h
32329	__shared	__asm__ ( "_shared_bss" ) __aligned	compiler.h
32330	__console_driver	__table ( struct console_driver, console, 01 )	console.h
32331	ERR	(-1)	curses.h
32332	FALSE	(0)	curses.h
32333	OK	(0)	curses.h
32334	TRUE	(1)	curses.h
32335	stdscr	( &_stdscr )	curses.h
32336	COLS	_COLS	curses.h
32337	LINES	_LINES	curses.h
32338	CPAIR_SHIFT	8	curses.h
32339	ATTRS_SHIFT	16	curses.h
32340	WA_DEFAULT	( 0x0000 << ATTRS_SHIFT )	curses.h
32341	WA_ALTCHARSET	( 0x0001 << ATTRS_SHIFT )	curses.h
32342	WA_BLINK	( 0x0002 << ATTRS_SHIFT )	curses.h
32343	WA_BOLD	( 0x0004 << ATTRS_SHIFT )	curses.h
32344	WA_DIM	( 0x0008 << ATTRS_SHIFT )	curses.h
32345	WA_INVIS	( 0x0010 << ATTRS_SHIFT )	curses.h
32346	WA_PROTECT	( 0x0020 << ATTRS_SHIFT )	curses.h
32347	WA_REVERSE	( 0x0040 << ATTRS_SHIFT )	curses.h
32348	WA_STANDOUT	( 0x0080 << ATTRS_SHIFT )	curses.h
32349	WA_UNDERLINE	( 0x0100 << ATTRS_SHIFT )	curses.h
32350	WA_HORIZONTAL	( 0x0200 << ATTRS_SHIFT )	curses.h
32351	WA_VERTICAL	( 0x0400 << ATTRS_SHIFT )	curses.h
32352	WA_LEFT	( 0x0800 << ATTRS_SHIFT )	curses.h
32353	WA_RIGHT	( 0x1000 << ATTRS_SHIFT )	curses.h
32354	WA_LOW	( 0x2000 << ATTRS_SHIFT )	curses.h
32355	WA_TOP	( 0x4000 << ATTRS_SHIFT )	curses.h
32356	A_DEFAULT	WA_DEFAULT	curses.h
32357	A_ALTCHARSET	WA_ALTCHARSET	curses.h
32358	A_BLINK	WA_BLINK	curses.h
32359	A_BOLD	WA_BOLD	curses.h
32360	A_DIM	WA_DIM	curses.h
32361	A_INVIS	WA_INVIS	curses.h
32362	A_PROTECT	WA_PROTECT	curses.h
32363	A_REVERSE	WA_REVERSE	curses.h
32364	A_STANDOUT	WA_STANDOUT	curses.h
32365	A_UNDERLINE	WA_UNDERLINE	curses.h
32366	A_ATTRIBUTES	( 0xffff << ATTRS_SHIFT )	curses.h
32367	A_CHARTEXT	( 0xff )	curses.h
32368	A_COLOUR	( 0xff << CPAIR_SHIFT )	curses.h
32369	A_COLOR	A_COLOUR	curses.h
32370	COLOUR_PAIRS	8	curses.h	Arbitrary limit
32371	COLOR_PAIRS	COLOUR_PAIRS	curses.h
32372	ACS_ULCORNER	'+'	curses.h
32373	ACS_LLCORNER	'+'	curses.h
32374	ACS_URCORNER	'+'	curses.h
32375	ACS_LRCORNER	'+'	curses.h
32376	ACS_RTEE	'+'	curses.h
32377	ACS_LTEE	'+'	curses.h
32378	ACS_BTEE	'+'	curses.h
32379	ACS_TTEE	'+'	curses.h
32380	ACS_HLINE	'-'	curses.h
32381	ACS_VLINE	'\|'	curses.h
32382	ACS_PLUS	'+'	curses.h
32383	ACS_S1	'-'	curses.h
32384	ACS_S9	'_'	curses.h
32385	ACS_DIAMOND	'+'	curses.h
32386	ACS_CKBOARD	':'	curses.h
32387	ACS_DEGREE	'\''	curses.h
32388	ACS_PLMINUS	'#'	curses.h
32389	ACS_BULLET	'o'	curses.h
32390	ACS_LARROW	'<'	curses.h
32391	ACS_RARROW	'>'	curses.h
32392	ACS_DARROW	'v'	curses.h
32393	ACS_UARROW	'^'	curses.h
32394	ACS_BOARD	'#'	curses.h
32395	ACS_LANTERN	'#'	curses.h
32396	ACS_BLOCK	'#'	curses.h
32397	COLOUR_BLACK	0	curses.h
32398	COLOUR_RED	1	curses.h
32399	COLOUR_GREEN	2	curses.h
32400	COLOUR_YELLOW	3	curses.h
32401	COLOUR_BLUE	4	curses.h
32402	COLOUR_MAGENTA	5	curses.h
32403	COLOUR_CYAN	6	curses.h
32404	COLOUR_WHITE	7	curses.h
32405	COLOURS	7	curses.h
32406	COLOUR_FG	30	curses.h
32407	COLOUR_BG	40	curses.h
32408	COLOR_FG	COLOUR_FG	curses.h
32409	COLOR_BG	COLOUR_BG	curses.h
32410	COLOR_BLACK	COLOUR_BLACK	curses.h
32411	COLOR_BLUE	COLOUR_BLUE	curses.h
32412	COLOR_GREEN	COLOUR_GREEN	curses.h
32413	COLOR_CYAN	COLOUR_CYAN	curses.h
32414	COLOR_RED	COLOUR_RED	curses.h
32415	COLOR_MAGENTA	COLOUR_MAGENTA	curses.h
32416	COLOR_YELLOW	COLOUR_YELLOW	curses.h
32417	COLOR_WHITE	COLOUR_WHITE	curses.h
32418	COLORS	COLOURS	curses.h
32419	init_color	( c, r, g, b ) init_colour ( (c), (r), (g), (b) )	curses.h
32420	DEBUG	1	debug.h
32421	debug_hexdump	hexdump	debug.h
32422	debugx	debug	debug.h
32423	EI_NIDENT	16	elf.h	Size of e_ident array.
32424	ET_NONE	0	elf.h	No file type
32425	ET_REL	1	elf.h	Relocatable file
32426	ET_EXEC	2	elf.h	Executable file
32427	ET_DYN	3	elf.h	Shared object file
32428	ET_CORE	4	elf.h	Core file
32429	EM_NONE	0	elf.h	No machine
32430	EM_M32	1	elf.h	AT&T WE 32100
32431	EM_SPARC	2	elf.h	SUN SPARC
32432	EM_386	3	elf.h	Intel 80386+
32433	EM_68K	4	elf.h	Motorola m68k family
32434	EM_88K	5	elf.h	Motorola m88k family
32435	EM_486	6	elf.h	Perhaps disused
32436	EM_860	7	elf.h	Intel 80860
32437	EM_MIPS	8	elf.h	MIPS R3000 big-endian
32438	EM_S370	9	elf.h	IBM System/370
32439	EM_MIPS_RS3_LE	10	elf.h	MIPS R3000 little-endian
32440	EM_PARISC	15	elf.h	HPPA
32441	EM_VPP500	17	elf.h	Fujitsu VPP500
32442	EM_SPARC32PLUS	18	elf.h	Sun's "v8plus"
32443	EM_960	19	elf.h	Intel 80960
32444	EM_PPC	20	elf.h	PowerPC
32445	EM_PPC64	21	elf.h	PowerPC 64-bit
32446	EM_S390	22	elf.h	IBM S390
32447	EM_V800	36	elf.h	NEC V800 series
32448	EM_FR20	37	elf.h	Fujitsu FR20
32449	EM_RH32	38	elf.h	TRW RH-32
32450	EM_RCE	39	elf.h	Motorola RCE
32451	EM_ARM	40	elf.h	ARM
32452	EM_FAKE_ALPHA	41	elf.h	Digital Alpha
32453	EM_SH	42	elf.h	Hitachi SH
32454	EM_SPARCV9	43	elf.h	SPARC v9 64-bit
32455	EM_TRICORE	44	elf.h	Siemens Tricore
32456	EM_ARC	45	elf.h	Argonaut RISC Core
32457	EM_H8_300	46	elf.h	Hitachi H8/300
32458	EM_H8_300H	47	elf.h	Hitachi H8/300H
32459	EM_H8S	48	elf.h	Hitachi H8S
32460	EM_H8_500	49	elf.h	Hitachi H8/500
32461	EM_IA_64	50	elf.h	Intel Merced
32462	EM_MIPS_X	51	elf.h	Stanford MIPS-X
32463	EM_COLDFIRE	52	elf.h	Motorola Coldfire
32464	EM_68HC12	53	elf.h	Motorola M68HC12
32465	EM_MMA	54	elf.h	Fujitsu MMA Multimedia Accelerator
32466	EM_PCP	55	elf.h	Siemens PCP
32467	EM_NCPU	56	elf.h	Sony nCPU embeeded RISC
32468	EM_NDR1	57	elf.h	Denso NDR1 microprocessor
32469	EM_STARCORE	58	elf.h	Motorola Start*Core processor
32470	EM_ME16	59	elf.h	Toyota ME16 processor
32471	EM_ST100	60	elf.h	STMicroelectronic ST100 processor
32472	EM_TINYJ	61	elf.h	Advanced Logic Corp. Tinyj emb.fam
32473	EM_X86_64	62	elf.h	AMD x86-64 architecture
32474	EM_PDSP	63	elf.h	Sony DSP Processor
32475	EM_FX66	66	elf.h	Siemens FX66 microcontroller
32476	EM_ST9PLUS	67	elf.h	STMicroelectronics ST9+ 8/16 mc
32477	EM_ST7	68	elf.h	STmicroelectronics ST7 8 bit mc
32478	EM_68HC16	69	elf.h	Motorola MC68HC16 microcontroller
32479	EM_68HC11	70	elf.h	Motorola MC68HC11 microcontroller
32480	EM_68HC08	71	elf.h	Motorola MC68HC08 microcontroller
32481	EM_68HC05	72	elf.h	Motorola MC68HC05 microcontroller
32482	EM_SVX	73	elf.h	Silicon Graphics SVx
32483	EM_AT19	74	elf.h	STMicroelectronics ST19 8 bit mc
32484	EM_VAX	75	elf.h	Digital VAX
32485	EM_CRIS	76	elf.h	Axis Communications 32-bit embedded processor
32486	EM_JAVELIN	77	elf.h	Infineon Technologies 32-bit embedded processor
32487	EM_FIREPATH	78	elf.h	Element 14 64-bit DSP Processor
32488	EM_ZSP	79	elf.h	LSI Logic 16-bit DSP Processor
32489	EM_MMIX	80	elf.h	Donald Knuth's educational 64-bit processor
32490	EM_HUANY	81	elf.h	Harvard University machine-independent object files
32491	EM_PRISM	82	elf.h	SiTera Prism
32492	EM_AVR	83	elf.h	Atmel AVR 8-bit microcontroller
32493	EM_FR30	84	elf.h	Fujitsu FR30
32494	EM_D10V	85	elf.h	Mitsubishi D10V
32495	EM_D30V	86	elf.h	Mitsubishi D30V
32496	EM_V850	87	elf.h	NEC v850
32497	EM_M32R	88	elf.h	Mitsubishi M32R
32498	EM_MN10300	89	elf.h	Matsushita MN10300
32499	EM_MN10200	90	elf.h	Matsushita MN10200
32500	EM_PJ	91	elf.h	picoJava
32501	EM_OPENRISC	92	elf.h	OpenRISC 32-bit embedded processor
32502	EM_ARC_A5	93	elf.h	ARC Cores Tangent-A5
32503	EM_XTENSA	94	elf.h	Tensilica Xtensa Architecture
32504	EM_NUM	95	elf.h
32505	PT_NULL	0	elf.h	Unused entry.
32506	PT_LOAD	1	elf.h	Loadable segment.
32507	PT_DYNAMIC	2	elf.h	Dynamic linking information segment.
32508	PT_INTERP	3	elf.h	Pathname of interpreter.
32509	PT_NOTE	4	elf.h	Auxiliary information.
32510	PT_SHLIB	5	elf.h	Reserved (not used).
32511	PT_PHDR	6	elf.h	Location of program header itself.
32512	PF_X	0x1	elf.h	Executable.
32513	PF_W	0x2	elf.h	Writable.
32514	PF_R	0x4	elf.h	Readable.
32515	ELF_PROGRAM_RETURNS_BIT	0x8000000	elf.h	e_flags bit 31
32516	EI_MAG0	0	elf.h
32517	ELFMAG0	0x7f	elf.h
32518	EI_MAG1	1	elf.h
32519	ELFMAG1	'E'	elf.h
32520	EI_MAG2	2	elf.h
32521	ELFMAG2	'L'	elf.h
32522	EI_MAG3	3	elf.h
32523	ELFMAG3	'F'	elf.h
32524	ELFMAG	"\177ELF"	elf.h
32525	SELFMAG	4	elf.h
32526	EI_CLASS	4	elf.h	File class byte index
32527	ELFCLASSNONE	0	elf.h	Invalid class
32528	ELFCLASS32	1	elf.h	32-bit objects
32529	ELFCLASS64	2	elf.h	64-bit objects
32530	EI_DATA	5	elf.h	Data encodeing byte index
32531	ELFDATANONE	0	elf.h	Invalid data encoding
32532	ELFDATA2LSB	1	elf.h	2's complement little endian
32533	ELFDATA2MSB	2	elf.h	2's complement big endian
32534	EI_VERSION	6	elf.h	File version byte index
32535	EV_NONE	0	elf.h	Invalid ELF Version
32536	EV_CURRENT	1	elf.h	Current version
32537	ELF32_PHDR_SIZE	(8*4)	elf.h	Size of an elf program header
32538	__LITTLE_ENDIAN	1234	endian.h
32539	__BIG_ENDIAN	4321	endian.h
32540	__PDP_ENDIAN	3412	endian.h
32541	ERRFILE	( 0 * ( ( int ) missing_errfile_declaration ) )	errno.h
32542	PXENV_STATUS_SUCCESS	0x0000	errno.h
32543	PXENV_STATUS_FAILURE	0x0001	errno.h
32544	PXENV_STATUS_BAD_FUNC	0x0002	errno.h
32545	PXENV_STATUS_UNSUPPORTED	0x0003	errno.h
32546	PXENV_STATUS_KEEP_UNDI	0x0004	errno.h
32547	PXENV_STATUS_KEEP_ALL	0x0005	errno.h
32548	PXENV_STATUS_OUT_OF_RESOURCES	0x0006	errno.h
32549	PXENV_STATUS_ARP_TIMEOUT	0x0011	errno.h
32550	PXENV_STATUS_UDP_CLOSED	0x0018	errno.h
32551	PXENV_STATUS_UDP_OPEN	0x0019	errno.h
32552	PXENV_STATUS_TFTP_CLOSED	0x001a	errno.h
32553	PXENV_STATUS_TFTP_OPEN	0x001b	errno.h
32554	PXENV_STATUS_MCOPY_PROBLEM	0x0020	errno.h
32555	PXENV_STATUS_BIS_INTEGRITY_FAIL	0x0021	errno.h
32556	PXENV_STATUS_BIS_VALIDATE_FAILU	0x0022	errno.h
32557	PXENV_STATUS_BIS_INIT_FAILURE	0x0023	errno.h
32558	PXENV_STATUS_BIS_SHUTDOWN_FAILU	0x0024	errno.h
32559	PXENV_STATUS_BIS_GBOA_FAILURE	0x0025	errno.h
32560	PXENV_STATUS_BIS_FREE_FAILURE	0x0026	errno.h
32561	PXENV_STATUS_BIS_GSI_FAILURE	0x0027	errno.h
32562	PXENV_STATUS_BIS_BAD_CKSUM	0x0028	errno.h
32563	PXENV_STATUS_TFTP_CANNOT_ARP_AD	0x0030	errno.h
32564	PXENV_STATUS_TFTP_OPEN_TIMEOUT	0x0032	errno.h
32565	PXENV_STATUS_TFTP_UNKNOWN_OPCOD	0x0033	errno.h
32566	PXENV_STATUS_TFTP_READ_TIMEOUT	0x0035	errno.h
32567	PXENV_STATUS_TFTP_ERROR_OPCODE	0x0036	errno.h
32568	PXENV_STATUS_TFTP_CANNOT_OPEN_C	0x0038	errno.h
32569	PXENV_STATUS_TFTP_CANNOT_READ_F	0x0039	errno.h
32570	PXENV_STATUS_TFTP_TOO_MANY_PACK	0x003a	errno.h
32571	PXENV_STATUS_TFTP_FILE_NOT_FOUN	0x003b	errno.h
32572	PXENV_STATUS_TFTP_ACCESS_VIOLAT	0x003c	errno.h
32573	PXENV_STATUS_TFTP_NO_MCAST_ADDR	0x003d	errno.h
32574	PXENV_STATUS_TFTP_NO_FILESIZE	0x003e	errno.h
32575	PXENV_STATUS_TFTP_INVALID_PACKE	0x003f	errno.h
32576	PXENV_STATUS_DHCP_TIMEOUT	0x0051	errno.h
32577	PXENV_STATUS_DHCP_NO_IP_ADDRESS	0x0052	errno.h
32578	PXENV_STATUS_DHCP_NO_BOOTFILE_N	0x0053	errno.h
32579	PXENV_STATUS_DHCP_BAD_IP_ADDRES	0x0054	errno.h
32580	PXENV_STATUS_UNDI_INVALID_FUNCT	0x0060	errno.h
32581	PXENV_STATUS_UNDI_MEDIATEST_FAI	0x0061	errno.h
32582	PXENV_STATUS_UNDI_CANNOT_INIT_N	0x0062	errno.h
32583	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0063	errno.h
32584	PXENV_STATUS_UNDI_CANNOT_INITIA	0x0064	errno.h
32585	PXENV_STATUS_UNDI_CANNOT_READ_C	0x0065	errno.h
32586	PXENV_STATUS_UNDI_CANNOT_READ_I	0x0066	errno.h
32587	PXENV_STATUS_UNDI_BAD_MAC_ADDRE	0x0067	errno.h
32588	PXENV_STATUS_UNDI_BAD_EEPROM_CH	0x0068	errno.h
32589	PXENV_STATUS_UNDI_ERROR_SETTING	0x0069	errno.h
32590	PXENV_STATUS_UNDI_INVALID_STATE	0x006a	errno.h
32591	PXENV_STATUS_UNDI_TRANSMIT_ERRO	0x006b	errno.h
32592	PXENV_STATUS_UNDI_INVALID_PARAM	0x006c	errno.h
32593	PXENV_STATUS_BSTRAP_PROMPT_MENU	0x0074	errno.h
32594	PXENV_STATUS_BSTRAP_MCAST_ADDR	0x0076	errno.h
32595	PXENV_STATUS_BSTRAP_MISSING_LIS	0x0077	errno.h
32596	PXENV_STATUS_BSTRAP_NO_RESPONSE	0x0078	errno.h
32597	PXENV_STATUS_BSTRAP_FILE_TOO_BI	0x0079	errno.h
32598	PXENV_STATUS_BINL_CANCELED_BY_K	0x00a0	errno.h
32599	PXENV_STATUS_BINL_NO_PXE_SERVER	0x00a1	errno.h
32600	PXENV_STATUS_NOT_AVAILABLE_IN_P	0x00a2	errno.h
32601	PXENV_STATUS_NOT_AVAILABLE_IN_R	0x00a3	errno.h
32602	PXENV_STATUS_BUSD_DEVICE_NOT_SU	0x00b0	errno.h
32603	PXENV_STATUS_LOADER_NO_FREE_BAS	0x00c0	errno.h
32604	PXENV_STATUS_LOADER_NO_BC_ROMID	0x00c1	errno.h
32605	PXENV_STATUS_LOADER_BAD_BC_ROMI	0x00c2	errno.h
32606	PXENV_STATUS_LOADER_BAD_BC_RUNT	0x00c3	errno.h
32607	PXENV_STATUS_LOADER_NO_UNDI_ROM	0x00c4	errno.h
32608	PXENV_STATUS_LOADER_BAD_UNDI_RO	0x00c5	errno.h
32609	PXENV_STATUS_LOADER_BAD_UNDI_DR	0x00c6	errno.h
32610	PXENV_STATUS_LOADER_NO_PXE_STRU	0x00c8	errno.h
32611	PXENV_STATUS_LOADER_NO_PXENV_ST	0x00c9	errno.h
32612	PXENV_STATUS_LOADER_UNDI_START	0x00ca	errno.h
32613	PXENV_STATUS_LOADER_BC_START	0x00cb	errno.h
32614	ENOERR	( ERRFILE \| PXENV_STATUS_SUCCESS \| 0x00000000 )	errno.h
32615	E2BIG	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x01000000 )	errno.h
32616	EACCES	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x02000000 )	errno.h
32617	EADDRINUSE	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x03000000 )	errno.h
32618	EADDRNOTAVAIL	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x04000000 )	errno.h
32619	EAFNOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x05000000 )	errno.h
32620	EAGAIN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x06000000 )	errno.h
32621	EALREADY	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x07000000 )	errno.h
32622	EBADF	( ERRFILE \| PXENV_STATUS_TFTP_CLOSED \| 0x08000000 )	errno.h
32623	EBADMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x09000000 )	errno.h
32624	EBUSY	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x0a000000 )	errno.h
32625	ECANCELED	( ERRFILE \| PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE \| 0x0b000000 )	errno.h
32626	ECHILD	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x0c000000 )	errno.h
32627	ECONNABORTED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0d000000 )	errno.h
32628	ECONNREFUSED	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION \| 0x0e000000 )	errno.h
32629	ECONNRESET	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x0f000000 )	errno.h
32630	EDEADLK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x10000000 )	errno.h
32631	EDESTADDRREQ	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x11000000 )	errno.h
32632	EDOM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x12000000 )	errno.h
32633	EDQUOT	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x13000000 )	errno.h
32634	EEXIST	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x14000000 )	errno.h
32635	EFAULT	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x15000000 )	errno.h
32636	EFBIG	( ERRFILE \| PXENV_STATUS_MCOPY_PROBLEM \| 0x16000000 )	errno.h
32637	EHOSTUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x17000000 )	errno.h
32638	EIDRM	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x18000000 )	errno.h
32639	EILSEQ	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x19000000 )	errno.h
32640	EINPROGRESS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1a000000 )	errno.h
32641	EINTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1b000000 )	errno.h
32642	EINVAL	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x1c000000 )	errno.h
32643	EIO	( ERRFILE \| PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \| 0x1d000000 )	errno.h
32644	EISCONN	( ERRFILE \| PXENV_STATUS_UDP_OPEN \| 0x1e000000 )	errno.h
32645	EISDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x1f000000 )	errno.h
32646	ELOOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x20000000 )	errno.h
32647	EMFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x21000000 )	errno.h
32648	EMLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x22000000 )	errno.h
32649	EMSGSIZE	( ERRFILE \| PXENV_STATUS_BAD_FUNC \| 0x23000000 )	errno.h
32650	EMULTIHOP	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x24000000 )	errno.h
32651	ENAMETOOLONG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x25000000 )	errno.h
32652	ENETDOWN	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x26000000 )	errno.h
32653	ENETRESET	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x27000000 )	errno.h
32654	ENETUNREACH	( ERRFILE \| PXENV_STATUS_ARP_TIMEOUT \| 0x28000000 )	errno.h
32655	ENFILE	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x29000000 )	errno.h
32656	ENOBUFS	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x2a000000 )	errno.h
32657	ENODATA	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2b000000 )	errno.h
32658	ENODEV	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2c000000 )	errno.h
32659	ENOENT	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x2d000000 )	errno.h
32660	ENOEXEC	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2e000000 )	errno.h
32661	ENOLCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x2f000000 )	errno.h
32662	ENOLINK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x30000000 )	errno.h
32663	ENOMEM	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x31000000 )	errno.h
32664	ENOMSG	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x32000000 )	errno.h
32665	ENOPROTOOPT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x33000000 )	errno.h
32666	ENOSPC	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x34000000 )	errno.h
32667	ENOSR	( ERRFILE \| PXENV_STATUS_OUT_OF_RESOURCES \| 0x35000000 )	errno.h
32668	ENOSTR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x36000000 )	errno.h
32669	ENOSYS	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x37000000 )	errno.h
32670	ENOTCONN	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x38000000 )	errno.h
32671	ENOTDIR	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x39000000 )	errno.h
32672	ENOTEMPTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3a000000 )	errno.h
32673	ENOTSOCK	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3b000000 )	errno.h
32674	ENOTSUP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3c000000 )	errno.h
32675	ENOTTY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x3d000000 )	errno.h
32676	ENXIO	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x3e000000 )	errno.h
32677	EOPNOTSUPP	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x3f000000 )	errno.h
32678	EOVERFLOW	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x40000000 )	errno.h
32679	EPERM	( ERRFILE \| PXENV_STATUS_TFTP_ACCESS_VIOLATION \| 0x41000000 )	errno.h
32680	EPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x42000000 )	errno.h
32681	EPROTO	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x43000000 )	errno.h
32682	EPROTONOSUPPORT	( ERRFILE \| PXENV_STATUS_UNSUPPORTED \| 0x44000000 )	errno.h
32683	EPROTOTYPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x45000000 )	errno.h
32684	ERANGE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x46000000 )	errno.h
32685	EROFS	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x47000000 )	errno.h
32686	ESPIPE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x48000000 )	errno.h
32687	ESRCH	( ERRFILE \| PXENV_STATUS_TFTP_FILE_NOT_FOUND \| 0x49000000 )	errno.h
32688	ESTALE	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4a000000 )	errno.h
32689	ETIME	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4b000000 )	errno.h
32690	ETIMEDOUT	( ERRFILE \| PXENV_STATUS_TFTP_READ_TIMEOUT \| 0x4c000000 )	errno.h
32691	ETXTBSY	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4d000000 )	errno.h
32692	EWOULDBLOCK	( ERRFILE \| PXENV_STATUS_TFTP_OPEN \| 0x4e000000 )	errno.h
32693	EXDEV	( ERRFILE \| PXENV_STATUS_FAILURE \| 0x4f000000 )	errno.h
32694	EUNIQ_01	0x00000100	errno.h
32695	EUNIQ_02	0x00000200	errno.h
32696	EUNIQ_03	0x00000300	errno.h
32697	EUNIQ_04	0x00000400	errno.h
32698	EUNIQ_05	0x00000500	errno.h
32699	EUNIQ_06	0x00000600	errno.h
32700	EUNIQ_07	0x00000700	errno.h
32701	EUNIQ_08	0x00000800	errno.h
32702	EUNIQ_09	0x00000900	errno.h
32703	EUNIQ_0A	0x00000a00	errno.h
32704	EUNIQ_0B	0x00000b00	errno.h
32705	EUNIQ_0C	0x00000c00	errno.h
32706	EUNIQ_0D	0x00000d00	errno.h
32707	EUNIQ_0E	0x00000e00	errno.h
32708	EUNIQ_0F	0x00000f00	errno.h
32709	EUNIQ_10	0x00001000	errno.h
32710	EUNIQ_11	0x00001100	errno.h
32711	EUNIQ_12	0x00001200	errno.h
32712	EUNIQ_13	0x00001300	errno.h
32713	EUNIQ_14	0x00001400	errno.h
32714	EUNIQ_15	0x00001500	errno.h
32715	EUNIQ_16	0x00001600	errno.h
32716	EUNIQ_17	0x00001700	errno.h
32717	EUNIQ_18	0x00001800	errno.h
32718	EUNIQ_19	0x00001900	errno.h
32719	EUNIQ_1A	0x00001a00	errno.h
32720	EUNIQ_1B	0x00001b00	errno.h
32721	EUNIQ_1C	0x00001c00	errno.h
32722	EUNIQ_1D	0x00001d00	errno.h
32723	EUNIQ_1E	0x00001e00	errno.h
32724	EUNIQ_1F	0x00001f00	errno.h
32725	VALID_LINK_TIMEOUT	100	etherboot.h	10.0 seconds
32726	DISK_IDE	1	fs.h
32727	DISK_MEM	2	fs.h
32728	DISK_USB	3	fs.h
32729	PARTITION_UNKNOWN	0xbad6a7	fs.h
32730	I365_IDENT	0x00	i82365.h	Identification and revision
32731	I365_STATUS	0x01	i82365.h	Interface status
32732	I365_POWER	0x02	i82365.h	Power and RESETDRV control
32733	I365_INTCTL	0x03	i82365.h	Interrupt and general control
32734	I365_CSC	0x04	i82365.h	Card status change
32735	I365_CSCINT	0x05	i82365.h	Card status change interrupt control
32736	I365_ADDRWIN	0x06	i82365.h	Address window enable
32737	I365_IOCTL	0x07	i82365.h	I/O control
32738	I365_GENCTL	0x16	i82365.h	Card detect and general control
32739	I365_GBLCTL	0x1E	i82365.h	Global control register
32740	I365_W_START	0	i82365.h
32741	I365_W_STOP	2	i82365.h
32742	I365_W_OFF	4	i82365.h
32743	I365_CS_BVD1	0x01	i82365.h
32744	I365_CS_STSCHG	0x01	i82365.h
32745	I365_CS_BVD2	0x02	i82365.h
32746	I365_CS_SPKR	0x02	i82365.h
32747	I365_CS_DETECT	0x0C	i82365.h
32748	I365_CS_WRPROT	0x10	i82365.h
32749	I365_CS_READY	0x20	i82365.h	Inverted
32750	I365_CS_POWERON	0x40	i82365.h
32751	I365_CS_GPI	0x80	i82365.h
32752	I365_PWR_OFF	0x00	i82365.h	Turn off the socket
32753	I365_PWR_OUT	0x80	i82365.h	Output enable
32754	I365_PWR_NORESET	0x40	i82365.h	Disable RESETDRV on resume
32755	I365_PWR_AUTO	0x20	i82365.h	Auto pwr switch enable
32756	I365_VCC_MASK	0x18	i82365.h	Mask for turning off Vcc
32757	I365_VCC_5V	0x10	i82365.h	Vcc = 5.0v
32758	I365_VCC_3V	0x18	i82365.h	Vcc = 3.3v
32759	I365_VPP2_MASK	0x0c	i82365.h	Mask for turning off Vpp2
32760	I365_VPP2_5V	0x04	i82365.h	Vpp2 = 5.0v
32761	I365_VPP2_12V	0x08	i82365.h	Vpp2 = 12.0v
32762	I365_VPP1_MASK	0x03	i82365.h	Mask for turning off Vpp1
32763	I365_VPP1_5V	0x01	i82365.h	Vpp2 = 5.0v
32764	I365_VPP1_12V	0x02	i82365.h	Vpp2 = 12.0v
32765	I365_RING_ENA	0x80	i82365.h
32766	I365_PC_RESET	0x40	i82365.h
32767	I365_PC_IOCARD	0x20	i82365.h
32768	I365_INTR_ENA	0x10	i82365.h
32769	I365_IRQ_MASK	0x0F	i82365.h
32770	I365_CSC_BVD1	0x01	i82365.h
32771	I365_CSC_STSCHG	0x01	i82365.h
32772	I365_CSC_BVD2	0x02	i82365.h
32773	I365_CSC_READY	0x04	i82365.h
32774	I365_CSC_DETECT	0x08	i82365.h
32775	I365_CSC_ANY	0x0F	i82365.h
32776	I365_CSC_GPI	0x10	i82365.h
32777	I365_CTL_16DELAY	0x01	i82365.h
32778	I365_CTL_RESET	0x02	i82365.h
32779	I365_CTL_GPI_ENA	0x04	i82365.h
32780	I365_CTL_GPI_CTL	0x08	i82365.h
32781	I365_CTL_RESUME	0x10	i82365.h
32782	I365_CTL_SW_IRQ	0x20	i82365.h
32783	I365_GBL_PWRDOWN	0x01	i82365.h
32784	I365_GBL_CSC_LEV	0x02	i82365.h
32785	I365_GBL_WRBACK	0x04	i82365.h
32786	I365_GBL_IRQ_0_LEV	0x08	i82365.h
32787	I365_GBL_IRQ_1_LEV	0x10	i82365.h
32788	I365_MEM_16BIT	0x8000	i82365.h	In memory start high byte
32789	I365_MEM_0WS	0x4000	i82365.h
32790	I365_MEM_WS1	0x8000	i82365.h	In memory stop high byte
32791	I365_MEM_WS0	0x4000	i82365.h
32792	I365_MEM_WRPROT	0x8000	i82365.h	In offset high byte
32793	I365_MEM_REG	0x4000	i82365.h
32794	I365_IDENT_VADEM	0x08	i82365.h
32795	VG468_VPP2_MASK	0x0c	i82365.h
32796	VG468_VPP2_5V	0x04	i82365.h
32797	VG468_VPP2_12V	0x08	i82365.h
32798	VG469_VSENSE	0x1f	i82365.h	Card voltage sense
32799	VG469_VSELECT	0x2f	i82365.h	Card voltage select
32800	VG468_CTL	0x38	i82365.h	Control register
32801	VG468_TIMER	0x39	i82365.h	Timer control
32802	VG468_MISC	0x3a	i82365.h	Miscellaneous
32803	VG468_GPIO_CFG	0x3b	i82365.h	GPIO configuration
32804	VG469_EXT_MODE	0x3c	i82365.h	Extended mode register
32805	VG468_SELECT	0x3d	i82365.h	Programmable chip select
32806	VG468_SELECT_CFG	0x3e	i82365.h	Chip select configuration
32807	VG468_ATA	0x3f	i82365.h	ATA control
32808	VG469_VSENSE_A_VS1	0x01	i82365.h
32809	VG469_VSENSE_A_VS2	0x02	i82365.h
32810	VG469_VSENSE_B_VS1	0x04	i82365.h
32811	VG469_VSENSE_B_VS2	0x08	i82365.h
32812	VG469_VSEL_VCC	0x03	i82365.h
32813	VG469_VSEL_5V	0x00	i82365.h
32814	VG469_VSEL_3V	0x03	i82365.h
32815	VG469_VSEL_MAX	0x0c	i82365.h
32816	VG469_VSEL_EXT_STAT	0x10	i82365.h
32817	VG469_VSEL_EXT_BUS	0x20	i82365.h
32818	VG469_VSEL_MIXED	0x40	i82365.h
32819	VG469_VSEL_ISA	0x80	i82365.h
32820	VG468_CTL_SLOW	0x01	i82365.h	600ns memory timing
32821	VG468_CTL_ASYNC	0x02	i82365.h	Asynchronous bus clocking
32822	VG468_CTL_TSSI	0x08	i82365.h	Tri-state some outputs
32823	VG468_CTL_DELAY	0x10	i82365.h	Card detect debounce
32824	VG468_CTL_INPACK	0x20	i82365.h	Obey INPACK signal?
32825	VG468_CTL_POLARITY	0x40	i82365.h	VCCEN polarity
32826	VG468_CTL_COMPAT	0x80	i82365.h	Compatibility stuff
32827	VG469_CTL_WS_COMPAT	0x04	i82365.h	Wait state compatibility
32828	VG469_CTL_STRETCH	0x10	i82365.h	LED stretch
32829	VG468_TIMER_ZEROPWR	0x10	i82365.h	Zero power control
32830	VG468_TIMER_SIGEN	0x20	i82365.h	Power up
32831	VG468_TIMER_STATUS	0x40	i82365.h	Activity timer status
32832	VG468_TIMER_RES	0x80	i82365.h	Timer resolution
32833	VG468_TIMER_MASK	0x0f	i82365.h	Activity timer timeout
32834	VG468_MISC_GPIO	0x04	i82365.h	General-purpose IO
32835	VG468_MISC_DMAWSB	0x08	i82365.h	DMA wait state control
32836	VG469_MISC_LEDENA	0x10	i82365.h	LED enable
32837	VG468_MISC_VADEMREV	0x40	i82365.h	Vadem revision control
32838	VG468_MISC_UNLOCK	0x80	i82365.h	Unique register lock
32839	VG469_MODE_VPPST	0x03	i82365.h	Vpp steering control
32840	VG469_MODE_INT_SENSE	0x04	i82365.h	Internal voltage sense
32841	VG469_MODE_CABLE	0x08	i82365.h
32842	VG469_MODE_COMPAT	0x10	i82365.h	i82365sl B or DF step
32843	VG469_MODE_TEST	0x20	i82365.h
32844	VG469_MODE_RIO	0x40	i82365.h	Steer RIO to INTR?
32845	VG469_MODE_B_3V	0x01	i82365.h	3.3v for socket B
32846	RF5C_MODE_CTL	0x1f	i82365.h	Mode control
32847	RF5C_PWR_CTL	0x2f	i82365.h	Mixed voltage control
32848	RF5C_CHIP_ID	0x3a	i82365.h	Chip identification
32849	RF5C_MODE_CTL_3	0x3b	i82365.h	Mode control 3
32850	RF5C_MODE_ATA	0x01	i82365.h	ATA mode
32851	RF5C_MODE_LED_ENA	0x02	i82365.h	IRQ 12 is LED
32852	RF5C_MODE_CA21	0x04	i82365.h
32853	RF5C_MODE_CA22	0x08	i82365.h
32854	RF5C_MODE_CA23	0x10	i82365.h
32855	RF5C_MODE_CA24	0x20	i82365.h
32856	RF5C_MODE_CA25	0x40	i82365.h
32857	RF5C_MODE_3STATE_BIT7	0x80	i82365.h
32858	RF5C_PWR_VCC_3V	0x01	i82365.h
32859	RF5C_PWR_IREQ_HIGH	0x02	i82365.h
32860	RF5C_PWR_INPACK_ENA	0x04	i82365.h
32861	RF5C_PWR_5V_DET	0x08	i82365.h
32862	RF5C_PWR_TC_SEL	0x10	i82365.h	Terminal Count: irq 11 or 15
32863	RF5C_PWR_DREQ_LOW	0x20	i82365.h
32864	RF5C_PWR_DREQ_OFF	0x00	i82365.h	DREQ steering control
32865	RF5C_PWR_DREQ_INPACK	0x40	i82365.h
32866	RF5C_PWR_DREQ_SPKR	0x80	i82365.h
32867	RF5C_PWR_DREQ_IOIS16	0xc0	i82365.h
32868	RF5C_CHIP_RF5C296	0x32	i82365.h
32869	RF5C_CHIP_RF5C396	0xb2	i82365.h
32870	RF5C_MCTL3_DISABLE	0x01	i82365.h	Disable PCMCIA interface
32871	RF5C_MCTL3_DMA_ENA	0x02	i82365.h
32872	RL5C46X_BCR_3E0_ENA	0x0800	i82365.h
32873	RL5C46X_BCR_3E2_ENA	0x1000	i82365.h
32874	RL5C4XX_CONFIG	0x80	i82365.h	16 bit
32875	RL5C4XX_CONFIG_IO_1_MODE	0x0200	i82365.h
32876	RL5C4XX_CONFIG_IO_0_MODE	0x0100	i82365.h
32877	RL5C4XX_CONFIG_PREFETCH	0x0001	i82365.h
32878	RL5C4XX_MISC	0x0082	i82365.h	16 bit
32879	RL5C4XX_MISC_HW_SUSPEND_ENA	0x0002	i82365.h
32880	RL5C4XX_MISC_VCCEN_POL	0x0100	i82365.h
32881	RL5C4XX_MISC_VPPEN_POL	0x0200	i82365.h
32882	RL5C46X_MISC_SUSPEND	0x0001	i82365.h
32883	RL5C46X_MISC_PWR_SAVE_2	0x0004	i82365.h
32884	RL5C46X_MISC_IFACE_BUSY	0x0008	i82365.h
32885	RL5C46X_MISC_B_LOCK	0x0010	i82365.h
32886	RL5C46X_MISC_A_LOCK	0x0020	i82365.h
32887	RL5C46X_MISC_PCI_LOCK	0x0040	i82365.h
32888	RL5C47X_MISC_IFACE_BUSY	0x0004	i82365.h
32889	RL5C47X_MISC_PCI_INT_MASK	0x0018	i82365.h
32890	RL5C47X_MISC_PCI_INT_DIS	0x0020	i82365.h
32891	RL5C47X_MISC_SUBSYS_WR	0x0040	i82365.h
32892	RL5C47X_MISC_SRIRQ_ENA	0x0080	i82365.h
32893	RL5C47X_MISC_5V_DISABLE	0x0400	i82365.h
32894	RL5C47X_MISC_LED_POL	0x0800	i82365.h
32895	RL5C4XX_16BIT_CTL	0x0084	i82365.h	16 bit
32896	RL5C4XX_16CTL_IO_TIMING	0x0100	i82365.h
32897	RL5C4XX_16CTL_MEM_TIMING	0x0200	i82365.h
32898	RL5C46X_16CTL_LEVEL_1	0x0010	i82365.h
32899	RL5C46X_16CTL_LEVEL_2	0x0020	i82365.h
32900	RL5C4XX_16BIT_IO_0	0x0088	i82365.h	16 bit
32901	RL5C4XX_16BIT_MEM_0	0x0088	i82365.h	16 bit
32902	RL5C4XX_SETUP_MASK	0x0007	i82365.h
32903	RL5C4XX_SETUP_SHIFT	0	i82365.h
32904	RL5C4XX_CMD_MASK	0x01f0	i82365.h
32905	RL5C4XX_CMD_SHIFT	4	i82365.h
32906	RL5C4XX_HOLD_MASK	0x1c00	i82365.h
32907	RL5C4XX_HOLD_SHIFT	10	i82365.h
32908	RL5C4XX_MISC_CONTROL	0x2F	i82365.h	8 bit
32909	RL5C4XX_ZV_ENABLE	0x08	i82365.h
32910	PCI_VENDOR_ID_CIRRUS	0x1013	i82365.h
32911	PCI_DEVICE_ID_CIRRUS_6729	0x1100	i82365.h
32912	PCI_DEVICE_ID_CIRRUS_6832	0x1110	i82365.h
32913	PD67_MISC_CTL_1	0x16	i82365.h	Misc control 1
32914	PD67_FIFO_CTL	0x17	i82365.h	FIFO control
32915	PD67_MISC_CTL_2	0x1E	i82365.h	Misc control 2
32916	PD67_CHIP_INFO	0x1f	i82365.h	Chip information
32917	PD67_ATA_CTL	0x026	i82365.h	6730: ATA control
32918	PD67_EXT_INDEX	0x2e	i82365.h	Extension index
32919	PD67_EXT_DATA	0x2f	i82365.h	Extension data
32920	PD67_DATA_MASK0	0x01	i82365.h	Data mask 0
32921	PD67_DATA_MASK1	0x02	i82365.h	Data mask 1
32922	PD67_DMA_CTL	0x03	i82365.h	DMA control
32923	PD67_EXT_CTL_1	0x03	i82365.h	Extension control 1
32924	PD67_EXTERN_DATA	0x0a	i82365.h
32925	PD67_MISC_CTL_3	0x25	i82365.h
32926	PD67_SMB_PWR_CTL	0x26	i82365.h
32927	PD67_MC1_5V_DET	0x01	i82365.h	5v detect
32928	PD67_MC1_MEDIA_ENA	0x01	i82365.h	6730: Multimedia enable
32929	PD67_MC1_VCC_3V	0x02	i82365.h	3.3v Vcc
32930	PD67_MC1_PULSE_MGMT	0x04	i82365.h
32931	PD67_MC1_PULSE_IRQ	0x08	i82365.h
32932	PD67_MC1_SPKR_ENA	0x10	i82365.h
32933	PD67_MC1_INPACK_ENA	0x80	i82365.h
32934	PD67_FIFO_EMPTY	0x80	i82365.h
32935	PD67_MC2_FREQ_BYPASS	0x01	i82365.h
32936	PD67_MC2_DYNAMIC_MODE	0x02	i82365.h
32937	PD67_MC2_SUSPEND	0x04	i82365.h
32938	PD67_MC2_5V_CORE	0x08	i82365.h
32939	PD67_MC2_LED_ENA	0x10	i82365.h	IRQ 12 is LED enable
32940	PD67_MC2_FAST_PCI	0x10	i82365.h	6729: PCI bus > 25 MHz
32941	PD67_MC2_3STATE_BIT7	0x20	i82365.h	Floppy change bit
32942	PD67_MC2_DMA_MODE	0x40	i82365.h
32943	PD67_MC2_IRQ15_RI	0x80	i82365.h	IRQ 15 is ring enable
32944	PD67_INFO_SLOTS	0x20	i82365.h	0 = 1 slot, 1 = 2 slots
32945	PD67_INFO_CHIP_ID	0xc0	i82365.h
32946	PD67_INFO_REV	0x1c	i82365.h
32947	PD67_TIME_SCALE	0xc0	i82365.h
32948	PD67_TIME_SCALE_1	0x00	i82365.h
32949	PD67_TIME_SCALE_16	0x40	i82365.h
32950	PD67_TIME_SCALE_256	0x80	i82365.h
32951	PD67_TIME_SCALE_4096	0xc0	i82365.h
32952	PD67_TIME_MULT	0x3f	i82365.h
32953	PD67_DMA_MODE	0xc0	i82365.h
32954	PD67_DMA_OFF	0x00	i82365.h
32955	PD67_DMA_DREQ_INPACK	0x40	i82365.h
32956	PD67_DMA_DREQ_WP	0x80	i82365.h
32957	PD67_DMA_DREQ_BVD2	0xc0	i82365.h
32958	PD67_DMA_PULLUP	0x20	i82365.h	Disable socket pullups?
32959	PD67_EC1_VCC_PWR_LOCK	0x01	i82365.h
32960	PD67_EC1_AUTO_PWR_CLEAR	0x02	i82365.h
32961	PD67_EC1_LED_ENA	0x04	i82365.h
32962	PD67_EC1_INV_CARD_IRQ	0x08	i82365.h
32963	PD67_EC1_INV_MGMT_IRQ	0x10	i82365.h
32964	PD67_EC1_PULLUP_CTL	0x20	i82365.h
32965	PD67_MC3_IRQ_MASK	0x03	i82365.h
32966	PD67_MC3_IRQ_PCPCI	0x00	i82365.h
32967	PD67_MC3_IRQ_EXTERN	0x01	i82365.h
32968	PD67_MC3_IRQ_PCIWAY	0x02	i82365.h
32969	PD67_MC3_IRQ_PCI	0x03	i82365.h
32970	PD67_MC3_PWR_MASK	0x0c	i82365.h
32971	PD67_MC3_PWR_SERIAL	0x00	i82365.h
32972	PD67_MC3_PWR_TI2202	0x08	i82365.h
32973	PD67_MC3_PWR_SMB	0x0c	i82365.h
32974	PD68_EXT_CTL_2	0x0b	i82365.h
32975	PD68_PCI_SPACE	0x22	i82365.h
32976	PD68_PCCARD_SPACE	0x23	i82365.h
32977	PD68_WINDOW_TYPE	0x24	i82365.h
32978	PD68_EXT_CSC	0x2e	i82365.h
32979	PD68_MISC_CTL_4	0x2f	i82365.h
32980	PD68_MISC_CTL_5	0x30	i82365.h
32981	PD68_MISC_CTL_6	0x31	i82365.h
32982	PD68_MC3_HW_SUSP	0x10	i82365.h
32983	PD68_MC3_MM_EXPAND	0x40	i82365.h
32984	PD68_MC3_MM_ARM	0x80	i82365.h
32985	PD6832_BCR_MGMT_IRQ_ENA	0x0800	i82365.h
32986	PD6832_SOCKET_NUMBER	0x004c	i82365.h	8 bit
32987	IGMP_QUERY	0x11	igmp.h
32988	IGMPv1_REPORT	0x12	igmp.h
32989	IGMPv2_REPORT	0x16	igmp.h
32990	IGMP_LEAVE	0x17	igmp.h
32991	GROUP_ALL_HOSTS	0xe0000001	igmp.h	224.0.0.1 Host byte order
32992	MULTICAST_MASK	0xf0000000	igmp.h
32993	MULTICAST_NETWORK	0xe0000000	igmp.h
32994	LOADER_NOT_SUPPORT	0xbadf11e	lib.h
32995	MII_BMCR	0x00	mii.h	Basic mode control register
32996	MII_BMSR	0x01	mii.h	Basic mode status register
32997	MII_PHYSID1	0x02	mii.h	PHYS ID 1
32998	MII_PHYSID2	0x03	mii.h	PHYS ID 2
32999	MII_ADVERTISE	0x04	mii.h	Advertisement control reg
33000	MII_LPA	0x05	mii.h	Link partner ability reg
33001	MII_EXPANSION	0x06	mii.h	Expansion register
33002	MII_DCOUNTER	0x12	mii.h	Disconnect counter
33003	MII_FCSCOUNTER	0x13	mii.h	False carrier counter
33004	MII_NWAYTEST	0x14	mii.h	N-way auto-neg test reg
33005	MII_RERRCOUNTER	0x15	mii.h	Receive error counter
33006	MII_SREVISION	0x16	mii.h	Silicon revision
33007	MII_RESV1	0x17	mii.h	Reserved...
33008	MII_LBRERROR	0x18	mii.h	Lpback, rx, bypass error
33009	MII_PHYADDR	0x19	mii.h	PHY address
33010	MII_RESV2	0x1a	mii.h	Reserved...
33011	MII_TPISTATUS	0x1b	mii.h	TPI status for 10mbps
33012	MII_NCONFIG	0x1c	mii.h	Network interface config
33013	BMCR_RESV	0x007f	mii.h	Unused...
33014	BMCR_CTST	0x0080	mii.h	Collision test
33015	BMCR_FULLDPLX	0x0100	mii.h	Full duplex
33016	BMCR_ANRESTART	0x0200	mii.h	Auto negotiation restart
33017	BMCR_ISOLATE	0x0400	mii.h	Disconnect DP83840 from MII
33018	BMCR_PDOWN	0x0800	mii.h	Powerdown the DP83840
33019	BMCR_ANENABLE	0x1000	mii.h	Enable auto negotiation
33020	BMCR_SPEED100	0x2000	mii.h	Select 100Mbps
33021	BMCR_LOOPBACK	0x4000	mii.h	TXD loopback bits
33022	BMCR_RESET	0x8000	mii.h	Reset the DP83840
33023	BMSR_ERCAP	0x0001	mii.h	Ext-reg capability
33024	BMSR_JCD	0x0002	mii.h	Jabber detected
33025	BMSR_LSTATUS	0x0004	mii.h	Link status
33026	BMSR_ANEGCAPABLE	0x0008	mii.h	Able to do auto-negotiation
33027	BMSR_RFAULT	0x0010	mii.h	Remote fault detected
33028	BMSR_ANEGCOMPLETE	0x0020	mii.h	Auto-negotiation complete
33029	BMSR_RESV	0x07c0	mii.h	Unused...
33030	BMSR_10HALF	0x0800	mii.h	Can do 10mbps, half-duplex
33031	BMSR_10FULL	0x1000	mii.h	Can do 10mbps, full-duplex
33032	BMSR_100HALF	0x2000	mii.h	Can do 100mbps, half-duplex
33033	BMSR_100FULL	0x4000	mii.h	Can do 100mbps, full-duplex
33034	BMSR_100BASE4	0x8000	mii.h	Can do 100mbps, 4k packets
33035	ADVERTISE_SLCT	0x001f	mii.h	Selector bits
33036	ADVERTISE_CSMA	0x0001	mii.h	Only selector supported
33037	ADVERTISE_10HALF	0x0020	mii.h	Try for 10mbps half-duplex
33038	ADVERTISE_10FULL	0x0040	mii.h	Try for 10mbps full-duplex
33039	ADVERTISE_100HALF	0x0080	mii.h	Try for 100mbps half-duplex
33040	ADVERTISE_100FULL	0x0100	mii.h	Try for 100mbps full-duplex
33041	ADVERTISE_100BASE4	0x0200	mii.h	Try for 100mbps 4k packets
33042	ADVERTISE_RESV	0x1c00	mii.h	Unused...
33043	ADVERTISE_RFAULT	0x2000	mii.h	Say we can detect faults
33044	ADVERTISE_LPACK	0x4000	mii.h	Ack link partners response
33045	ADVERTISE_NPAGE	0x8000	mii.h	Next page bit
33046	ADVERTISE_FULL	(ADVERTISE_100FULL \| ADVERTISE_10FULL \| \ ADVERTISE_CSMA)	mii.h
33047	ADVERTISE_ALL	(ADVERTISE_10HALF \| ADVERTISE_10FULL \| \ ADVERTISE_100HALF \| ADVERTISE_100FULL)	mii.h
33048	LPA_SLCT	0x001f	mii.h	Same as advertise selector
33049	LPA_10HALF	0x0020	mii.h	Can do 10mbps half-duplex
33050	LPA_10FULL	0x0040	mii.h	Can do 10mbps full-duplex
33051	LPA_100HALF	0x0080	mii.h	Can do 100mbps half-duplex
33052	LPA_100FULL	0x0100	mii.h	Can do 100mbps full-duplex
33053	LPA_100BASE4	0x0200	mii.h	Can do 100mbps 4k packets
33054	LPA_RESV	0x1c00	mii.h	Unused...
33055	LPA_RFAULT	0x2000	mii.h	Link partner faulted
33056	LPA_LPACK	0x4000	mii.h	Link partner acked us
33057	LPA_NPAGE	0x8000	mii.h	Next page bit
33058	LPA_DUPLEX	(LPA_10FULL \| LPA_100FULL)	mii.h
33059	LPA_100	(LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)	mii.h
33060	EXPANSION_NWAY	0x0001	mii.h	Can do N-way auto-nego
33061	EXPANSION_LCWP	0x0002	mii.h	Got new RX page code word
33062	EXPANSION_ENABLENPAGE	0x0004	mii.h	This enables npage words
33063	EXPANSION_NPCAPABLE	0x0008	mii.h	Link partner supports npage
33064	EXPANSION_MFAULTS	0x0010	mii.h	Multiple faults detected
33065	EXPANSION_RESV	0xffe0	mii.h	Unused...
33066	NWAYTEST_RESV1	0x00ff	mii.h	Unused...
33067	NWAYTEST_LOOPBACK	0x0100	mii.h	Enable loopback for N-way
33068	NWAYTEST_RESV2	0xfe00	mii.h	Unused...
33069	SUNRPC_PORT	111	nfs.h
33070	PROG_PORTMAP	100000	nfs.h
33071	PROG_NFS	100003	nfs.h
33072	PROG_MOUNT	100005	nfs.h
33073	MSG_CALL	0	nfs.h
33074	MSG_REPLY	1	nfs.h
33075	PORTMAP_GETPORT	3	nfs.h
33076	MOUNT_ADDENTRY	1	nfs.h
33077	MOUNT_UMOUNTALL	4	nfs.h
33078	NFS_LOOKUP	4	nfs.h
33079	NFS_READLINK	5	nfs.h
33080	NFS_READ	6	nfs.h
33081	NFS_FHSIZE	32	nfs.h
33082	NFSERR_PERM	1	nfs.h
33083	NFSERR_NOENT	2	nfs.h
33084	NFSERR_ACCES	13	nfs.h
33085	NFSERR_ISDIR	21	nfs.h
33086	NFSERR_INVAL	22	nfs.h
33087	NFS_READ_SIZE	1024	nfs.h
33088	NFS_MAXLINKDEPTH	16	nfs.h
33089	DNS_TYPE_NB	0x20	nmb.h
33090	DNS_FLAG_BROADCAST	( 0x01 << 4 )	nmb.h
33091	NBNS_UDP_PORT	137	nmb.h
33092	TCP_INITIAL_TIMEOUT	(3*TICKS_PER_SEC)	old_tcp.h
33093	TCP_MAX_TIMEOUT	(60*TICKS_PER_SEC)	old_tcp.h
33094	TCP_MIN_TIMEOUT	(TICKS_PER_SEC)	old_tcp.h
33095	TCP_MAX_RETRY	10	old_tcp.h
33096	TCP_MAX_HEADER	((int)sizeof(struct iphdr)+64)	old_tcp.h
33097	TCP_MIN_WINDOW	(1500-TCP_MAX_HEADER)	old_tcp.h
33098	TCP_MAX_WINDOW	(65535-TCP_MAX_HEADER)	old_tcp.h
33099	FIN	1	old_tcp.h
33100	SYN	2	old_tcp.h
33101	RST	4	old_tcp.h
33102	PSH	8	old_tcp.h
33103	ACK	16	old_tcp.h
33104	URG	32	old_tcp.h
33105	_yes_	1	pcmcia-opts.h
33106	_no_	0	pcmcia-opts.h
33107	SUPPORT_I82365	(_yes_)	pcmcia-opts.h
33108	PCMCIA_SHUTDOWN	(_yes_)	pcmcia-opts.h
33109	MAP_ATTRMEM_TO	0xd0000	pcmcia-opts.h
33110	MAP_ATTRMEM_LEN	0x02000	pcmcia-opts.h
33111	PDEBUG	3	pcmcia-opts.h
33112	MAXPCCSOCKS	8	pcmcia.h
33113	MAXPCCCONFIGS	8	pcmcia.h
33114	EINVAL	22	pcmcia.h
33115	SS_WRPROT	0x0001	pcmcia.h
33116	SS_CARDLOCK	0x0002	pcmcia.h
33117	SS_EJECTION	0x0004	pcmcia.h
33118	SS_INSERTION	0x0008	pcmcia.h
33119	SS_BATDEAD	0x0010	pcmcia.h
33120	SS_BATWARN	0x0020	pcmcia.h
33121	SS_READY	0x0040	pcmcia.h
33122	SS_DETECT	0x0080	pcmcia.h
33123	SS_POWERON	0x0100	pcmcia.h
33124	SS_GPI	0x0200	pcmcia.h
33125	SS_STSCHG	0x0400	pcmcia.h
33126	SS_CARDBUS	0x0800	pcmcia.h
33127	SS_3VCARD	0x1000	pcmcia.h
33128	SS_XVCARD	0x2000	pcmcia.h
33129	SS_PENDING	0x4000	pcmcia.h
33130	SS_CAP_PAGE_REGS	0x0001	pcmcia.h
33131	SS_CAP_VIRTUAL_BUS	0x0002	pcmcia.h
33132	SS_CAP_MEM_ALIGN	0x0004	pcmcia.h
33133	SS_CAP_STATIC_MAP	0x0008	pcmcia.h
33134	SS_CAP_PCCARD	0x4000	pcmcia.h
33135	SS_CAP_CARDBUS	0x8000	pcmcia.h
33136	SS_PWR_AUTO	0x0010	pcmcia.h
33137	SS_IOCARD	0x0020	pcmcia.h
33138	SS_RESET	0x0040	pcmcia.h
33139	SS_DMA_MODE	0x0080	pcmcia.h
33140	SS_SPKR_ENA	0x0100	pcmcia.h
33141	SS_OUTPUT_ENA	0x0200	pcmcia.h
33142	SS_DEBOUNCED	0x0400	pcmcia.h	Tell driver that the debounce delay has ended
33143	SS_ZVCARD	0x0800	pcmcia.h
33144	MAP_ACTIVE	0x01	pcmcia.h
33145	MAP_16BIT	0x02	pcmcia.h
33146	MAP_AUTOSZ	0x04	pcmcia.h
33147	MAP_0WS	0x08	pcmcia.h
33148	MAP_WRPROT	0x10	pcmcia.h
33149	MAP_ATTRIB	0x20	pcmcia.h
33150	MAP_USE_WAIT	0x40	pcmcia.h
33151	MAP_PREFETCH	0x80	pcmcia.h
33152	MAP_IOSPACE	0x20	pcmcia.h
33153	ROM_SIGNATURE	0xaa55	pxe.h
33154	UNDI_ROM_ID_SIGNATURE	( ( 'U' << 0 ) + ( 'N' << 8 ) + ( 'D' << 16 ) + ( 'I' << 24 ) )	pxe.h
33155	PCIR_SIGNATURE	( ( 'P' << 0 ) + ( 'C' << 8 ) + ( 'I' << 16 ) + ( 'R' << 24 ) )	pxe.h
33156	PXENV_UNLOAD_STACK	0x0070	pxe_api.h
33157	PXENV_GET_CACHED_INFO	0x0071	pxe_api.h
33158	PXENV_PACKET_TYPE_DHCP_DISCOVER	1	pxe_api.h
33159	PXENV_PACKET_TYPE_DHCP_ACK	2	pxe_api.h
33160	PXENV_PACKET_TYPE_CACHED_REPLY	3	pxe_api.h
33161	BOOTP_REQ	1	pxe_api.h	*< A BOOTP request packet
33162	BOOTP_REP	2	pxe_api.h	*< A BOOTP reply packet
33163	BOOTP_BCAST	0x8000	pxe_api.h
33164	VM_RFC1048	0x63825363L	pxe_api.h	*< DHCP magic cookie
33165	BOOTP_DHCPVEND	1024	pxe_api.h
33166	PXENV_RESTART_TFTP	0x0073	pxe_api.h
33167	PXENV_START_UNDI	0x0000	pxe_api.h
33168	PXENV_STOP_UNDI	0x0015	pxe_api.h
33169	PXENV_START_BASE	0x0075	pxe_api.h
33170	PXENV_STOP_BASE	0x0076	pxe_api.h
33171	PXENV_TFTP_OPEN	0x0020	pxe_api.h
33172	PXENV_TFTP_CLOSE	0x0021	pxe_api.h
33173	PXENV_TFTP_READ	0x0022	pxe_api.h
33174	PXENV_TFTP_READ_FILE	0x0023	pxe_api.h
33175	PXENV_TFTP_GET_FSIZE	0x0025	pxe_api.h
33176	PXENV_UDP_OPEN	0x0030	pxe_api.h
33177	PXENV_UDP_CLOSE	0x0031	pxe_api.h
33178	PXENV_UDP_WRITE	0x0033	pxe_api.h
33179	PXENV_UDP_READ	0x0032	pxe_api.h
33180	PXENV_UNDI_STARTUP	0x0001	pxe_api.h
33181	PXENV_BUS_ISA	0	pxe_api.h	*< ISA bus type
33182	PXENV_BUS_EISA	1	pxe_api.h	*< EISA bus type
33183	PXENV_BUS_MCA	2	pxe_api.h	*< MCA bus type
33184	PXENV_BUS_PCI	3	pxe_api.h	*< PCI bus type
33185	PXENV_BUS_VESA	4	pxe_api.h	*< VESA bus type
33186	PXENV_BUS_PCMCIA	5	pxe_api.h	*< PCMCIA bus type
33187	PXENV_UNDI_CLEANUP	0x0002	pxe_api.h
33188	PXENV_UNDI_INITIALIZE	0x0003	pxe_api.h
33189	PXENV_UNDI_RESET_ADAPTER	0x0004	pxe_api.h
33190	MAXNUM_MCADDR	8	pxe_api.h
33191	PXENV_UNDI_SHUTDOWN	0x0005	pxe_api.h
33192	PXENV_UNDI_OPEN	0x0006	pxe_api.h
33193	FLTR_DIRECTED	0x0001	pxe_api.h
33194	FLTR_BRDCST	0x0002	pxe_api.h
33195	FLTR_PRMSCS	0x0004	pxe_api.h
33196	FLTR_SRC_RTG	0x0008	pxe_api.h
33197	PXENV_UNDI_CLOSE	0x0007	pxe_api.h
33198	PXENV_UNDI_TRANSMIT	0x0008	pxe_api.h
33199	P_UNKNOWN	0	pxe_api.h	*< Media header already filled in
33200	P_IP	1	pxe_api.h	*< IP protocol
33201	P_ARP	2	pxe_api.h	*< ARP protocol
33202	P_RARP	3	pxe_api.h	*< RARP protocol
33203	P_OTHER	4	pxe_api.h	*< Other protocol
33204	XMT_DESTADDR	0x0000	pxe_api.h	*< Unicast packet
33205	XMT_BROADCAST	0x0001	pxe_api.h	*< Broadcast packet
33206	MAX_DATA_BLKS	8	pxe_api.h
33207	PXENV_UNDI_SET_MCAST_ADDRESS	0x0009	pxe_api.h
33208	PXENV_UNDI_SET_STATION_ADDRESS	0x000a	pxe_api.h
33209	PXENV_UNDI_SET_PACKET_FILTER	0x000b	pxe_api.h
33210	PXENV_UNDI_GET_INFORMATION	0x000c	pxe_api.h
33211	ETHER_TYPE	1	pxe_api.h	*< Ethernet (10Mb)
33212	EXP_ETHER_TYPE	2	pxe_api.h	*< Experimental Ethernet (3Mb)
33213	AX25_TYPE	3	pxe_api.h	*< Amateur Radio AX.25
33214	TOKEN_RING_TYPE	4	pxe_api.h	*< Proteon ProNET Token Ring
33215	CHAOS_TYPE	5	pxe_api.h	*< Chaos
33216	IEEE_TYPE	6	pxe_api.h	*< IEEE 802 Networks
33217	ARCNET_TYPE	7	pxe_api.h	*< ARCNET
33218	PXENV_UNDI_GET_STATISTICS	0x000d	pxe_api.h
33219	PXENV_UNDI_CLEAR_STATISTICS	0x000e	pxe_api.h
33220	PXENV_UNDI_INITIATE_DIAGS	0x000f	pxe_api.h
33221	PXENV_UNDI_FORCE_INTERRUPT	0x0010	pxe_api.h
33222	PXENV_UNDI_GET_MCAST_ADDRESS	0x0011	pxe_api.h
33223	PXENV_UNDI_GET_NIC_TYPE	0x0012	pxe_api.h
33224	PCI_NIC	2	pxe_api.h	*< PCI network card
33225	PnP_NIC	3	pxe_api.h	*< ISAPnP network card
33226	CardBus_NIC	4	pxe_api.h	*< CardBus network card
33227	PXENV_UNDI_GET_IFACE_INFO	0x0013	pxe_api.h
33228	PXENV_UNDI_GET_STATE	0x0015	pxe_api.h
33229	PXE_UNDI_GET_STATE_STARTED	1	pxe_api.h
33230	PXE_UNDI_GET_STATE_INITIALIZED	2	pxe_api.h
33231	PXE_UNDI_GET_STATE_OPENED	3	pxe_api.h
33232	PXENV_UNDI_ISR	0x0014	pxe_api.h
33233	PXENV_UNDI_ISR_IN_START	1	pxe_api.h
33234	PXENV_UNDI_ISR_IN_PROCESS	2	pxe_api.h
33235	PXENV_UNDI_ISR_IN_GET_NEXT	3	pxe_api.h
33236	PXENV_UNDI_ISR_OUT_OURS	0	pxe_api.h
33237	PXENV_UNDI_ISR_OUT_NOT_OURS	1	pxe_api.h
33238	PXENV_UNDI_ISR_OUT_DONE	0	pxe_api.h
33239	PXENV_UNDI_ISR_OUT_TRANSMIT	2	pxe_api.h
33240	PXENV_UNDI_ISR_OUT_RECEIVE	3	pxe_api.h
33241	PXENV_UNDI_ISR_OUT_BUSY	4	pxe_api.h
33242	P_DIRECTED	0	pxe_api.h
33243	P_BROADCAST	1	pxe_api.h
33244	P_MULTICAST	2	pxe_api.h
33245	PXENV_FILE_OPEN	0x00e0	pxe_api.h
33246	PXENV_FILE_CLOSE	0x00e1	pxe_api.h
33247	PXENV_FILE_SELECT	0x00e2	pxe_api.h
33248	RDY_READ	0x0001	pxe_api.h
33249	PXENV_FILE_READ	0x00e3	pxe_api.h
33250	PXENV_GET_FILE_SIZE	0x00e4	pxe_api.h
33251	PXENV_FILE_EXEC	0x00e5	pxe_api.h
33252	PXENV_FILE_API_CHECK	0x00e6	pxe_api.h
33253	PXENV_EXIT_SUCCESS	0x0000	pxe_types.h	*< No error occurred
33254	PXENV_EXIT_FAILURE	0x0001	pxe_types.h	*< An error occurred
33255	MAC_ADDR_LEN	16	pxe_types.h
33256	NULL	((void *)0)	stddef.h
33257	ABFT_SIG	"aBFT"	abft.h
33258	ANSIESC_MAX_PARAMS	4	ansiesc.h
33259	ESC	0x1b	ansiesc.h
33260	CSI	"\033["	ansiesc.h
33261	ANSIESC_CUP	'H'	ansiesc.h
33262	ANSIESC_ED	'J'	ansiesc.h
33263	ANSIESC_ED_TO_END	0	ansiesc.h
33264	ANSIESC_ED_FROM_START	1	ansiesc.h
33265	ANSIESC_ED_ALL	2	ansiesc.h
33266	ANSIESC_SGR	'm'	ansiesc.h
33267	AOE_FL_EXTENDED	0x40	aoe.h	*< LBA48 extended addressing
33268	AOE_FL_DEV_HEAD	0x10	aoe.h	*< Device/head flag
33269	AOE_FL_ASYNC	0x02	aoe.h	*< Asynchronous write
33270	AOE_FL_WRITE	0x01	aoe.h	*< Write command
33271	AOE_VERSION	0x10	aoe.h	*< Version 1
33272	AOE_VERSION_MASK	0xf0	aoe.h	*< Version part of ver_flags field
33273	AOE_FL_RESPONSE	0x08	aoe.h	*< Message is a response
33274	AOE_FL_ERROR	0x04	aoe.h	*< Command generated an error
33275	AOE_MAJOR_BROADCAST	0xffff	aoe.h
33276	AOE_MINOR_BROADCAST	0xff	aoe.h
33277	AOE_CMD_ATA	0x00	aoe.h	*< Issue ATA command
33278	AOE_CMD_CONFIG	0x01	aoe.h	*< Query Config Information
33279	AOE_TAG_MAGIC	0xebeb0000	aoe.h
33280	AOE_ERR_BAD_COMMAND	1	aoe.h	*< Unrecognised command code
33281	AOE_ERR_BAD_PARAMETER	2	aoe.h	*< Bad argument parameter
33282	AOE_ERR_UNAVAILABLE	3	aoe.h	*< Device unavailable
33283	AOE_ERR_CONFIG_EXISTS	4	aoe.h	*< Config string present
33284	AOE_ERR_BAD_VERSION	5	aoe.h	*< Unsupported version
33285	AOE_STATUS_ERR_MASK	0x0f	aoe.h	*< Error portion of status code
33286	AOE_STATUS_PENDING	0x80	aoe.h	*< Command pending
33287	AOE_MAX_COUNT	2	aoe.h
33288	__arp_net_protocol	__table ( struct arp_net_protocol, arp_net_protocols, 01 )	arp.h
33289	ASN1_INTEGER	0x02	asn1.h
33290	ASN1_BIT_STRING	0x03	asn1.h
33291	ASN1_OCTET_STRING	0x04	asn1.h
33292	ASN1_NULL	0x05	asn1.h
33293	ASN1_OID	0x06	asn1.h
33294	ASN1_SEQUENCE	0x30	asn1.h
33295	ASN1_IP_ADDRESS	0x40	asn1.h
33296	ASN1_EXPLICIT_TAG	0xa0	asn1.h
33297	ATA_DEV_OBSOLETE	0xa0	ata.h
33298	ATA_DEV_LBA	0x40	ata.h
33299	ATA_DEV_SLAVE	0x10	ata.h
33300	ATA_DEV_MASTER	0x00	ata.h
33301	ATA_DEV_MASK	0xf0	ata.h
33302	ATA_CMD_READ	0x20	ata.h
33303	ATA_CMD_READ_EXT	0x24	ata.h
33304	ATA_CMD_WRITE	0x30	ata.h
33305	ATA_CMD_WRITE_EXT	0x34	ata.h
33306	ATA_CMD_IDENTIFY	0xec	ata.h
33307	ATA_SUPPORTS_LBA48	( 1 << 10 )	ata.h
33308	ATA_SECTOR_SIZE	512	ata.h
33309	BITMAP_BLKSIZE	( sizeof ( bitmap_block_t ) * 8 )	bitmap.h
33310	__command	__table ( struct command, commands, 01 )	command.h
33311	CPIO_MAGIC	"070701"	cpio.h
33312	BUS_TYPE_PCI	1	device.h
33313	BUS_TYPE_ISAPNP	2	device.h
33314	BUS_TYPE_EISA	3	device.h
33315	BUS_TYPE_MCA	4	device.h
33316	BUS_TYPE_ISA	5	device.h
33317	__root_device	__table ( struct root_device, root_devices, 01 )	device.h
33318	BOOTPS_PORT	67	dhcp.h
33319	BOOTPC_PORT	68	dhcp.h
33320	PROXYDHCP_PORT	4011	dhcp.h
33321	DHCP_PAD	0	dhcp.h
33322	DHCP_MIN_OPTION	1	dhcp.h
33323	DHCP_SUBNET_MASK	1	dhcp.h
33324	DHCP_ROUTERS	3	dhcp.h
33325	DHCP_DNS_SERVERS	6	dhcp.h
33326	DHCP_LOG_SERVERS	7	dhcp.h
33327	DHCP_HOST_NAME	12	dhcp.h
33328	DHCP_DOMAIN_NAME	15	dhcp.h
33329	DHCP_ROOT_PATH	17	dhcp.h
33330	DHCP_VENDOR_ENCAP	43	dhcp.h
33331	DHCP_REQUESTED_ADDRESS	50	dhcp.h
33332	DHCP_LEASE_TIME	51	dhcp.h
33333	DHCP_OPTION_OVERLOAD	52	dhcp.h
33334	DHCP_OPTION_OVERLOAD_FILE	1	dhcp.h
33335	DHCP_OPTION_OVERLOAD_SNAME	2	dhcp.h
33336	DHCP_MESSAGE_TYPE	53	dhcp.h
33337	DHCPNONE	0	dhcp.h
33338	DHCPDISCOVER	1	dhcp.h
33339	DHCPOFFER	2	dhcp.h
33340	DHCPREQUEST	3	dhcp.h
33341	DHCPDECLINE	4	dhcp.h
33342	DHCPACK	5	dhcp.h
33343	DHCPNAK	6	dhcp.h
33344	DHCPRELEASE	7	dhcp.h
33345	DHCPINFORM	8	dhcp.h
33346	DHCP_SERVER_IDENTIFIER	54	dhcp.h
33347	DHCP_PARAMETER_REQUEST_LIST	55	dhcp.h
33348	DHCP_MAX_MESSAGE_SIZE	57	dhcp.h
33349	DHCP_VENDOR_CLASS_ID	60	dhcp.h
33350	DHCP_CLIENT_ID	61	dhcp.h
33351	DHCP_TFTP_SERVER_NAME	66	dhcp.h
33352	DHCP_BOOTFILE_NAME	67	dhcp.h
33353	DHCP_CLIENT_ARCHITECTURE	93	dhcp.h
33354	DHCP_CLIENT_NDI	94	dhcp.h
33355	DHCP_CLIENT_UUID	97	dhcp.h
33356	DHCP_EB_ENCAP	175	dhcp.h
33357	DHCP_EB_PRIORITY	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x01 )	dhcp.h
33358	DHCP_EB_YIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x02 )	dhcp.h
33359	DHCP_EB_SIADDR	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x03 )	dhcp.h
33360	DHCP_EB_KEEP_SAN	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x08 )	dhcp.h
33361	DHCP_EB_NO_PROXYDHCP	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb0 )	dhcp.h
33362	DHCP_EB_BUS_ID	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb1 )	dhcp.h
33363	DHCP_EB_BIOS_DRIVE	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbd )	dhcp.h
33364	DHCP_EB_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbe )	dhcp.h
33365	DHCP_EB_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbf )	dhcp.h
33366	DHCP_EB_REVERSE_USERNAME	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc0 )	dhcp.h
33367	DHCP_EB_REVERSE_PASSWORD	DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc1 )	dhcp.h
33368	DHCP_ISCSI_PRIMARY_TARGET_IQN	201	dhcp.h
33369	DHCP_ISCSI_SECONDARY_TARGET_IQN	202	dhcp.h
33370	DHCP_ISCSI_INITIATOR_IQN	203	dhcp.h
33371	DHCP_MAX_OPTION	254	dhcp.h
33372	DHCP_END	255	dhcp.h
33373	DHCP_OPTION_HEADER_LEN	( offsetof ( struct dhcp_option, data ) )	dhcp.h
33374	DHCP_MAX_LEN	0xff	dhcp.h
33375	BOOTP_REQUEST	1	dhcp.h
33376	BOOTP_REPLY	2	dhcp.h
33377	BOOTP_FL_BROADCAST	0x8000	dhcp.h
33378	DHCP_MAGIC_COOKIE	0x63825363UL	dhcp.h
33379	DHCP_MIN_LEN	552	dhcp.h
33380	PROXYDHCP_WAIT_TIME	( TICKS_PER_SEC * 1 )	dhcp.h
33381	DHCP_MIN_TIMEOUT	( 1 * TICKS_PER_SEC )	dhcp.h
33382	DHCP_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	dhcp.h
33383	DHCP_SETTINGS_NAME	"dhcp"	dhcp.h
33384	PROXYDHCP_SETTINGS_NAME	"proxydhcp"	dhcp.h
33385	DNS_TYPE_A	1	dns.h
33386	DNS_TYPE_CNAME	5	dns.h
33387	DNS_TYPE_ANY	255	dns.h
33388	DNS_CLASS_IN	1	dns.h
33389	DNS_CLASS_CS	2	dns.h
33390	DNS_CLASS_CH	3	dns.h
33391	DNS_CLASS_HS	4	dns.h
33392	DNS_FLAG_QUERY	( 0x00 << 15 )	dns.h
33393	DNS_FLAG_RESPONSE	( 0x01 << 15 )	dns.h
33394	DNS_FLAG_OPCODE_QUERY	( 0x00 << 11 )	dns.h
33395	DNS_FLAG_OPCODE_IQUERY	( 0x01 << 11 )	dns.h
33396	DNS_FLAG_OPCODE_STATUS	( 0x02 << 11 )	dns.h
33397	DNS_FLAG_RD	( 0x01 << 8 )	dns.h
33398	DNS_FLAG_RA	( 0x01 << 7 )	dns.h
33399	DNS_FLAG_RCODE_OK	( 0x00 << 0 )	dns.h
33400	DNS_FLAG_RCODE_NX	( 0x03 << 0 )	dns.h
33401	DNS_PORT	53	dns.h
33402	DNS_MAX_RETRIES	3	dns.h
33403	DNS_MAX_CNAME_RECURSION	0x30	dns.h
33404	EISA_MIN_SLOT	(0x1)	eisa.h
33405	EISA_MAX_SLOT	(0xf)	eisa.h	Must be 2^n - 1
33406	EISA_VENDOR_ID	( 0xc80 )	eisa.h
33407	EISA_PROD_ID	( 0xc82 )	eisa.h
33408	EISA_GLOBAL_CONFIG	( 0xc84 )	eisa.h
33409	EISA_CMD_RESET	( 1 << 2 )	eisa.h
33410	EISA_CMD_ENABLE	( 1 << 0 )	eisa.h
33411	__eisa_driver	__table ( struct eisa_driver, eisa_drivers, 01 )	eisa.h
33412	ERRFILE_CORE	0x00002000	errfile.h	*< Core code
33413	ERRFILE_DRIVER	0x00004000	errfile.h	*< Driver code
33414	ERRFILE_NET	0x00006000	errfile.h	*< Networking code
33415	ERRFILE_IMAGE	0x00008000	errfile.h	*< Image code
33416	ERRFILE_OTHER	0x0000e000	errfile.h	*< Any other code
33417	ERRFILE_ARCH	0x00800000	errfile.h
33418	ERRFILE_asprintf	( ERRFILE_CORE \| 0x00000000 )	errfile.h
33419	ERRFILE_downloader	( ERRFILE_CORE \| 0x00010000 )	errfile.h
33420	ERRFILE_exec	( ERRFILE_CORE \| 0x00020000 )	errfile.h
33421	ERRFILE_hw	( ERRFILE_CORE \| 0x00030000 )	errfile.h
33422	ERRFILE_iobuf	( ERRFILE_CORE \| 0x00040000 )	errfile.h
33423	ERRFILE_job	( ERRFILE_CORE \| 0x00050000 )	errfile.h
33424	ERRFILE_linebuf	( ERRFILE_CORE \| 0x00060000 )	errfile.h
33425	ERRFILE_monojob	( ERRFILE_CORE \| 0x00070000 )	errfile.h
33426	ERRFILE_nvo	( ERRFILE_CORE \| 0x00080000 )	errfile.h
33427	ERRFILE_open	( ERRFILE_CORE \| 0x00090000 )	errfile.h
33428	ERRFILE_posix_io	( ERRFILE_CORE \| 0x000a0000 )	errfile.h
33429	ERRFILE_resolv	( ERRFILE_CORE \| 0x000b0000 )	errfile.h
33430	ERRFILE_settings	( ERRFILE_CORE \| 0x000c0000 )	errfile.h
33431	ERRFILE_vsprintf	( ERRFILE_CORE \| 0x000d0000 )	errfile.h
33432	ERRFILE_xfer	( ERRFILE_CORE \| 0x000e0000 )	errfile.h
33433	ERRFILE_bitmap	( ERRFILE_CORE \| 0x000f0000 )	errfile.h
33434	ERRFILE_eisa	( ERRFILE_DRIVER \| 0x00000000 )	errfile.h
33435	ERRFILE_isa	( ERRFILE_DRIVER \| 0x00010000 )	errfile.h
33436	ERRFILE_isapnp	( ERRFILE_DRIVER \| 0x00020000 )	errfile.h
33437	ERRFILE_mca	( ERRFILE_DRIVER \| 0x00030000 )	errfile.h
33438	ERRFILE_pci	( ERRFILE_DRIVER \| 0x00040000 )	errfile.h
33439	ERRFILE_nvs	( ERRFILE_DRIVER \| 0x00100000 )	errfile.h
33440	ERRFILE_spi	( ERRFILE_DRIVER \| 0x00110000 )	errfile.h
33441	ERRFILE_i2c_bit	( ERRFILE_DRIVER \| 0x00120000 )	errfile.h
33442	ERRFILE_spi_bit	( ERRFILE_DRIVER \| 0x00130000 )	errfile.h
33443	ERRFILE_3c509	( ERRFILE_DRIVER \| 0x00200000 )	errfile.h
33444	ERRFILE_bnx2	( ERRFILE_DRIVER \| 0x00210000 )	errfile.h
33445	ERRFILE_cs89x0	( ERRFILE_DRIVER \| 0x00220000 )	errfile.h
33446	ERRFILE_eepro	( ERRFILE_DRIVER \| 0x00230000 )	errfile.h
33447	ERRFILE_etherfabric	( ERRFILE_DRIVER \| 0x00240000 )	errfile.h
33448	ERRFILE_legacy	( ERRFILE_DRIVER \| 0x00250000 )	errfile.h
33449	ERRFILE_natsemi	( ERRFILE_DRIVER \| 0x00260000 )	errfile.h
33450	ERRFILE_pnic	( ERRFILE_DRIVER \| 0x00270000 )	errfile.h
33451	ERRFILE_prism2_pci	( ERRFILE_DRIVER \| 0x00280000 )	errfile.h
33452	ERRFILE_prism2_plx	( ERRFILE_DRIVER \| 0x00290000 )	errfile.h
33453	ERRFILE_rtl8139	( ERRFILE_DRIVER \| 0x002a0000 )	errfile.h
33454	ERRFILE_smc9000	( ERRFILE_DRIVER \| 0x002b0000 )	errfile.h
33455	ERRFILE_tg3	( ERRFILE_DRIVER \| 0x002c0000 )	errfile.h
33456	ERRFILE_3c509_eisa	( ERRFILE_DRIVER \| 0x002d0000 )	errfile.h
33457	ERRFILE_3c515	( ERRFILE_DRIVER \| 0x002e0000 )	errfile.h
33458	ERRFILE_3c529	( ERRFILE_DRIVER \| 0x002f0000 )	errfile.h
33459	ERRFILE_3c595	( ERRFILE_DRIVER \| 0x00300000 )	errfile.h
33460	ERRFILE_3c5x9	( ERRFILE_DRIVER \| 0x00310000 )	errfile.h
33461	ERRFILE_3c90x	( ERRFILE_DRIVER \| 0x00320000 )	errfile.h
33462	ERRFILE_amd8111e	( ERRFILE_DRIVER \| 0x00330000 )	errfile.h
33463	ERRFILE_davicom	( ERRFILE_DRIVER \| 0x00340000 )	errfile.h
33464	ERRFILE_depca	( ERRFILE_DRIVER \| 0x00350000 )	errfile.h
33465	ERRFILE_dmfe	( ERRFILE_DRIVER \| 0x00360000 )	errfile.h
33466	ERRFILE_eepro100	( ERRFILE_DRIVER \| 0x00380000 )	errfile.h
33467	ERRFILE_epic100	( ERRFILE_DRIVER \| 0x00390000 )	errfile.h
33468	ERRFILE_forcedeth	( ERRFILE_DRIVER \| 0x003a0000 )	errfile.h
33469	ERRFILE_mtd80x	( ERRFILE_DRIVER \| 0x003b0000 )	errfile.h
33470	ERRFILE_ns83820	( ERRFILE_DRIVER \| 0x003c0000 )	errfile.h
33471	ERRFILE_ns8390	( ERRFILE_DRIVER \| 0x003d0000 )	errfile.h
33472	ERRFILE_pcnet32	( ERRFILE_DRIVER \| 0x003e0000 )	errfile.h
33473	ERRFILE_r8169	( ERRFILE_DRIVER \| 0x003f0000 )	errfile.h
33474	ERRFILE_sis900	( ERRFILE_DRIVER \| 0x00400000 )	errfile.h
33475	ERRFILE_sundance	( ERRFILE_DRIVER \| 0x00410000 )	errfile.h
33476	ERRFILE_tlan	( ERRFILE_DRIVER \| 0x00420000 )	errfile.h
33477	ERRFILE_tulip	( ERRFILE_DRIVER \| 0x00430000 )	errfile.h
33478	ERRFILE_via_rhine	( ERRFILE_DRIVER \| 0x00440000 )	errfile.h
33479	ERRFILE_via_velocity	( ERRFILE_DRIVER \| 0x00450000 )	errfile.h
33480	ERRFILE_w89c840	( ERRFILE_DRIVER \| 0x00460000 )	errfile.h
33481	ERRFILE_ipoib	( ERRFILE_DRIVER \| 0x00470000 )	errfile.h
33482	ERRFILE_e1000	( ERRFILE_DRIVER \| 0x00480000 )	errfile.h
33483	ERRFILE_e1000_hw	( ERRFILE_DRIVER \| 0x00490000 )	errfile.h
33484	ERRFILE_mtnic	( ERRFILE_DRIVER \| 0x004a0000 )	errfile.h
33485	ERRFILE_phantom	( ERRFILE_DRIVER \| 0x004b0000 )	errfile.h
33486	ERRFILE_scsi	( ERRFILE_DRIVER \| 0x00700000 )	errfile.h
33487	ERRFILE_arbel	( ERRFILE_DRIVER \| 0x00710000 )	errfile.h
33488	ERRFILE_hermon	( ERRFILE_DRIVER \| 0x00720000 )	errfile.h
33489	ERRFILE_aoe	( ERRFILE_NET \| 0x00000000 )	errfile.h
33490	ERRFILE_arp	( ERRFILE_NET \| 0x00010000 )	errfile.h
33491	ERRFILE_dhcpopts	( ERRFILE_NET \| 0x00020000 )	errfile.h
33492	ERRFILE_ethernet	( ERRFILE_NET \| 0x00030000 )	errfile.h
33493	ERRFILE_icmpv6	( ERRFILE_NET \| 0x00040000 )	errfile.h
33494	ERRFILE_ipv4	( ERRFILE_NET \| 0x00050000 )	errfile.h
33495	ERRFILE_ipv6	( ERRFILE_NET \| 0x00060000 )	errfile.h
33496	ERRFILE_ndp	( ERRFILE_NET \| 0x00070000 )	errfile.h
33497	ERRFILE_netdevice	( ERRFILE_NET \| 0x00080000 )	errfile.h
33498	ERRFILE_nullnet	( ERRFILE_NET \| 0x00090000 )	errfile.h
33499	ERRFILE_tcp	( ERRFILE_NET \| 0x000a0000 )	errfile.h
33500	ERRFILE_ftp	( ERRFILE_NET \| 0x000b0000 )	errfile.h
33501	ERRFILE_http	( ERRFILE_NET \| 0x000c0000 )	errfile.h
33502	ERRFILE_iscsi	( ERRFILE_NET \| 0x000d0000 )	errfile.h
33503	ERRFILE_tcpip	( ERRFILE_NET \| 0x000e0000 )	errfile.h
33504	ERRFILE_udp	( ERRFILE_NET \| 0x000f0000 )	errfile.h
33505	ERRFILE_dhcp	( ERRFILE_NET \| 0x00100000 )	errfile.h
33506	ERRFILE_dns	( ERRFILE_NET \| 0x00110000 )	errfile.h
33507	ERRFILE_tftp	( ERRFILE_NET \| 0x00120000 )	errfile.h
33508	ERRFILE_infiniband	( ERRFILE_NET \| 0x00130000 )	errfile.h
33509	ERRFILE_netdev_settings	( ERRFILE_NET \| 0x00140000 )	errfile.h
33510	ERRFILE_dhcppkt	( ERRFILE_NET \| 0x00150000 )	errfile.h
33511	ERRFILE_slam	( ERRFILE_NET \| 0x00160000 )	errfile.h
33512	ERRFILE_image	( ERRFILE_IMAGE \| 0x00000000 )	errfile.h
33513	ERRFILE_elf	( ERRFILE_IMAGE \| 0x00010000 )	errfile.h
33514	ERRFILE_script	( ERRFILE_IMAGE \| 0x00020000 )	errfile.h
33515	ERRFILE_segment	( ERRFILE_IMAGE \| 0x00030000 )	errfile.h
33516	ERRFILE_asn1	( ERRFILE_OTHER \| 0x00000000 )	errfile.h
33517	ERRFILE_chap	( ERRFILE_OTHER \| 0x00010000 )	errfile.h
33518	ERRFILE_aoeboot	( ERRFILE_OTHER \| 0x00020000 )	errfile.h
33519	ERRFILE_autoboot	( ERRFILE_OTHER \| 0x00030000 )	errfile.h
33520	ERRFILE_dhcpmgmt	( ERRFILE_OTHER \| 0x00040000 )	errfile.h
33521	ERRFILE_imgmgmt	( ERRFILE_OTHER \| 0x00050000 )	errfile.h
33522	ERRFILE_pxe_tftp	( ERRFILE_OTHER \| 0x00060000 )	errfile.h
33523	ERRFILE_pxe_udp	( ERRFILE_OTHER \| 0x00070000 )	errfile.h
33524	ERRFILE_axtls_aes	( ERRFILE_OTHER \| 0x00080000 )	errfile.h
33525	ERRFILE_cipher	( ERRFILE_OTHER \| 0x00090000 )	errfile.h
33526	ERRFILE_image_cmd	( ERRFILE_OTHER \| 0x000a0000 )	errfile.h
33527	ERRFILE_uri_test	( ERRFILE_OTHER \| 0x000b0000 )	errfile.h
33528	ERRFILE_ibft	( ERRFILE_OTHER \| 0x000c0000 )	errfile.h
33529	ERRFILE_tls	( ERRFILE_OTHER \| 0x000d0000 )	errfile.h
33530	ERRFILE_ifmgmt	( ERRFILE_OTHER \| 0x000e0000 )	errfile.h
33531	ERRFILE_iscsiboot	( ERRFILE_OTHER \| 0x000f0000 )	errfile.h
33532	__errortab	__table ( struct errortab, errortab, 01 )	errortab.h
33533	FEATURE_PROTOCOL	01	features.h	*< Network protocols
33534	FEATURE_IMAGE	02	features.h	*< Image formats
33535	FEATURE_MISC	03	features.h	*< Miscellaneous
33536	DHCP_EB_FEATURE_PXE_EXT	0x10	features.h	*< PXE API extensions
33537	DHCP_EB_FEATURE_ISCSI	0x11	features.h	*< iSCSI protocol
33538	DHCP_EB_FEATURE_AOE	0x12	features.h	*< AoE protocol
33539	DHCP_EB_FEATURE_HTTP	0x13	features.h	*< HTTP protocol
33540	DHCP_EB_FEATURE_HTTPS	0x14	features.h	*< HTTPS protocol
33541	DHCP_EB_FEATURE_TFTP	0x15	features.h	*< TFTP protocol
33542	DHCP_EB_FEATURE_FTP	0x16	features.h	*< FTP protocol
33543	DHCP_EB_FEATURE_DNS	0x17	features.h	*< DNS protocol
33544	DHCP_EB_FEATURE_BZIMAGE	0x18	features.h	*< bzImage format
33545	DHCP_EB_FEATURE_MULTIBOOT	0x19	features.h	*< Multiboot format
33546	DHCP_EB_FEATURE_SLAM	0x1a	features.h	*< SLAM protocol
33547	DHCP_EB_FEATURE_NBI	0x20	features.h	*< NBI format
33548	DHCP_EB_FEATURE_PXE	0x21	features.h	*< PXE format
33549	DHCP_EB_FEATURE_ELF	0x22	features.h	*< ELF format
33550	DHCP_EB_FEATURE_COMBOOT	0x23	features.h	*< COMBOOT format
33551	FTP_PORT	21	ftp.h
33552	__gdb_transport	__table ( struct gdb_transport, gdb_transports, 01 )	gdbstub.h
33553	HTTP_PORT	80	http.h
33554	HTTPS_PORT	443	http.h
33555	I2C_TENBIT_ADDRESS	0x7800	i2c.h
33556	I2C_WRITE	0	i2c.h
33557	I2C_READ	1	i2c.h
33558	I2C_UDELAY	5	i2c.h
33559	IBFT_SIG	"iBFT"	ibft.h
33560	IBFT_STRUCTURE_ID_CONTROL	0x01	ibft.h
33561	IBFT_FL_CONTROL_SINGLE_LOGIN_ON	0x01	ibft.h
33562	IBFT_STRUCTURE_ID_INITIATOR	0x02	ibft.h
33563	IBFT_FL_INITIATOR_BLOCK_VALID	0x01	ibft.h
33564	IBFT_FL_INITIATOR_FIRMWARE_BOOT	0x02	ibft.h
33565	IBFT_STRUCTURE_ID_NIC	0x03	ibft.h
33566	IBFT_FL_NIC_BLOCK_VALID	0x01	ibft.h
33567	IBFT_FL_NIC_FIRMWARE_BOOT_SELEC	0x02	ibft.h
33568	IBFT_FL_NIC_GLOBAL	0x04	ibft.h
33569	IBFT_STRUCTURE_ID_TARGET	0x04	ibft.h
33570	IBFT_FL_TARGET_BLOCK_VALID	0x01	ibft.h
33571	IBFT_FL_TARGET_FIRMWARE_BOOT_SE	0x02	ibft.h
33572	IBFT_FL_TARGET_USE_CHAP	0x04	ibft.h
33573	IBFT_FL_TARGET_USE_RCHAP	0x08	ibft.h
33574	IBFT_CHAP_NONE	0	ibft.h	*< No CHAP authentication
33575	IBFT_CHAP_ONE_WAY	1	ibft.h	*< One-way CHAP
33576	IBFT_CHAP_MUTUAL	2	ibft.h	*< Mutual CHAP
33577	IBFT_STRINGS_SIZE	384	ibft.h
33578	ICMP6_NSOLICIT	135	icmp6.h
33579	ICMP6_NADVERT	136	icmp6.h
33580	ICMP6_FLAGS_ROUTER	0x80	icmp6.h
33581	ICMP6_FLAGS_SOLICITED	0x40	icmp6.h
33582	ICMP6_FLAGS_OVERRIDE	0x20	icmp6.h
33583	ARPHRD_NETROM	0	if_arp.h	*< from KA9Q: NET/ROM pseudo
33584	ARPHRD_ETHER	1	if_arp.h	*< Ethernet 10Mbps
33585	ARPHRD_EETHER	2	if_arp.h	*< Experimental Ethernet
33586	ARPHRD_AX25	3	if_arp.h	*< AX.25 Level 2
33587	ARPHRD_PRONET	4	if_arp.h	*< PROnet token ring
33588	ARPHRD_CHAOS	5	if_arp.h	*< Chaosnet
33589	ARPHRD_IEEE802	6	if_arp.h	*< IEEE 802.2 Ethernet/TR/TB
33590	ARPHRD_ARCNET	7	if_arp.h	*< ARCnet
33591	ARPHRD_APPLETLK	8	if_arp.h	*< APPLEtalk
33592	ARPHRD_DLCI	15	if_arp.h	*< Frame Relay DLCI
33593	ARPHRD_ATM	19	if_arp.h	*< ATM
33594	ARPHRD_METRICOM	23	if_arp.h	*< Metricom STRIP (new IANA id)
33595	ARPHRD_IEEE1394	24	if_arp.h	*< IEEE 1394 IPv4 - RFC 2734
33596	ARPHRD_EUI64	27	if_arp.h	*< EUI-64
33597	ARPHRD_INFINIBAND	32	if_arp.h	*< InfiniBand
33598	ARPOP_REQUEST	1	if_arp.h	*< ARP request
33599	ARPOP_REPLY	2	if_arp.h	*< ARP reply
33600	ARPOP_RREQUEST	3	if_arp.h	*< RARP request
33601	ARPOP_RREPLY	4	if_arp.h	*< RARP reply
33602	ARPOP_InREQUEST	8	if_arp.h	*< InARP request
33603	ARPOP_InREPLY	9	if_arp.h	*< InARP reply
33604	ARPOP_NAK	10	if_arp.h	*< (ATM)ARP NAK
33605	ETH_ALEN	6	if_ether.h	Size of Ethernet address
33606	ETH_HLEN	14	if_ether.h	Size of ethernet header
33607	ETH_ZLEN	60	if_ether.h	Minimum packet
33608	ETH_FRAME_LEN	1514	if_ether.h	Maximum packet
33609	ETH_DATA_ALIGN	2	if_ether.h	Amount needed to align the data after an ethernet header
33610	ETH_MAX_MTU	(ETH_FRAME_LEN-ETH_HLEN)	if_ether.h
33611	ETH_P_RAW	0x0000	if_ether.h	Raw packet
33612	ETH_P_IP	0x0800	if_ether.h	Internet Protocl Packet
33613	ETH_P_ARP	0x0806	if_ether.h	Address Resolution Protocol
33614	ETH_P_RARP	0x8035	if_ether.h	Reverse Address resolution Protocol
33615	ETH_P_IPV6	0x86DD	if_ether.h	IPv6 over blueblook
33616	ETH_P_SLOW	0x8809	if_ether.h	Ethernet slow protocols
33617	ETH_P_AOE	0x88A2	if_ether.h	ATA over Ethernet
33618	IMAGE_LOADED	0x0001	image.h
33619	PROBE_MULTIBOOT	01	image.h
33620	PROBE_NORMAL	02	image.h
33621	PROBE_PXE	03	image.h
33622	IP_ICMP	1	in.h
33623	IP_IGMP	2	in.h
33624	IP_TCP	6	in.h
33625	IP_UDP	17	in.h
33626	IP_ICMP6	58	in.h
33627	INADDR_NONE	0xffffffff	in.h
33628	INADDR_BROADCAST	0xffffffff	in.h
33629	IN_CLASSA_NET	0xff000000	in.h
33630	IN_CLASSB_NET	0xffff0000	in.h
33631	IN_CLASSC_NET	0xffffff00	in.h
33632	IB_SA_QPN	1	infiniband.h
33633	IB_BROADCAST_QPN	0xffffffUL	infiniband.h
33634	IB_GLOBAL_QKEY	0x80010000UL	infiniband.h
33635	INIT_EARLY	01	init.h	*< Early initialisation
33636	INIT_SERIAL	02	init.h	*< Serial driver initialisation
33637	INIT_CONSOLE	03	init.h	*< Console initialisation
33638	INIT_NORMAL	04	init.h	*< Normal initialisation
33639	STARTUP_EARLY	01	init.h	*< Early startup
33640	STARTUP_NORMAL	02	init.h	*< Normal startup
33641	IOB_ALIGN	2048	iobuf.h
33642	IOB_ZLEN	64	iobuf.h
33643	IP_VER	0x40U	ip.h
33644	IP_MASK_VER	0xf0U	ip.h
33645	IP_MASK_HLEN	0x0fU	ip.h
33646	IP_MASK_OFFSET	0x1fffU	ip.h
33647	IP_MASK_DONOTFRAG	0x4000U	ip.h
33648	IP_MASK_MOREFRAGS	0x2000U	ip.h
33649	IP_PSHLEN	12	ip.h
33650	IP_TOS	0	ip.h
33651	IP_TTL	64	ip.h
33652	IP_FRAG_IOB_SIZE	1500	ip.h
33653	IP_FRAG_TIMEOUT	50	ip.h
33654	IP6_VERSION	0x6	ip6.h
33655	IP6_HOP_LIMIT	255	ip6.h
33656	MAX_HDR_LEN	100	ip6.h
33657	MAX_IOB_LEN	1500	ip6.h
33658	MIN_IOB_LEN	MAX_HDR_LEN + 100	ip6.h	To account for padding by LL
33659	IP6_HOPBYHOP	0x00	ip6.h
33660	IP6_ROUTING	0x43	ip6.h
33661	IP6_FRAGMENT	0x44	ip6.h
33662	IP6_AUTHENTICATION	0x51	ip6.h
33663	IP6_DEST_OPTS	0x60	ip6.h
33664	IP6_ESP	0x50	ip6.h
33665	IP6_ICMP6	0x58	ip6.h
33666	IP6_NO_HEADER	0x59	ip6.h
33667	IPOIB_ALEN	20	ipoib.h
33668	IPOIB_HLEN	24	ipoib.h
33669	__isa_driver	__table ( struct isa_driver, isa_drivers, 01 )	isa.h
33670	ISAPNP_ADDRESS	0x279	isapnp.h
33671	ISAPNP_WRITE_DATA	0xa79	isapnp.h
33672	ISAPNP_READ_PORT_MIN	0x203	isapnp.h
33673	ISAPNP_READ_PORT_START	0x213	isapnp.h	ISAPnP spec says 0x203, but
33674	ISAPNP_READ_PORT_MAX	0x3ff	isapnp.h
33675	ISAPNP_READ_PORT_STEP	0x10	isapnp.h	Can be any multiple of 4
33676	ISAPNP_CSN_MIN	0x01	isapnp.h
33677	ISAPNP_CSN_MAX	0x0f	isapnp.h
33678	ISAPNP_READPORT	0x00	isapnp.h
33679	ISAPNP_SERIALISOLATION	0x01	isapnp.h
33680	ISAPNP_CONFIGCONTROL	0x02	isapnp.h
33681	ISAPNP_WAKE	0x03	isapnp.h
33682	ISAPNP_RESOURCEDATA	0x04	isapnp.h
33683	ISAPNP_STATUS	0x05	isapnp.h
33684	ISAPNP_CARDSELECTNUMBER	0x06	isapnp.h
33685	ISAPNP_LOGICALDEVICENUMBER	0x07	isapnp.h
33686	ISAPNP_ACTIVATE	0x30	isapnp.h
33687	ISAPNP_IORANGECHECK	0x31	isapnp.h
33688	ISAPNP_CONFIG_RESET	( 1 << 0 )	isapnp.h
33689	ISAPNP_CONFIG_WAIT_FOR_KEY	( 1 << 1 )	isapnp.h
33690	ISAPNP_CONFIG_RESET_CSN	( 1 << 2 )	isapnp.h
33691	ISAPNP_CONFIG_RESET_DRV	( ISAPNP_CONFIG_RESET \| \ ISAPNP_CONFIG_WAIT_FOR_KEY \| \ ISAPNP_CONFIG_RESET_CSN )	isapnp.h
33692	ISAPNP_LFSR_SEED	0x6a	isapnp.h
33693	ISAPNP_TAG_PNPVERNO	0x01	isapnp.h
33694	ISAPNP_TAG_LOGDEVID	0x02	isapnp.h
33695	ISAPNP_TAG_COMPATDEVID	0x03	isapnp.h
33696	ISAPNP_TAG_IRQ	0x04	isapnp.h
33697	ISAPNP_TAG_DMA	0x05	isapnp.h
33698	ISAPNP_TAG_STARTDEP	0x06	isapnp.h
33699	ISAPNP_TAG_ENDDEP	0x07	isapnp.h
33700	ISAPNP_TAG_IOPORT	0x08	isapnp.h
33701	ISAPNP_TAG_FIXEDIO	0x09	isapnp.h
33702	ISAPNP_TAG_RSVDSHORTA	0x0A	isapnp.h
33703	ISAPNP_TAG_RSVDSHORTB	0x0B	isapnp.h
33704	ISAPNP_TAG_RSVDSHORTC	0x0C	isapnp.h
33705	ISAPNP_TAG_RSVDSHORTD	0x0D	isapnp.h
33706	ISAPNP_TAG_VENDORSHORT	0x0E	isapnp.h
33707	ISAPNP_TAG_END	0x0F	isapnp.h
33708	ISAPNP_TAG_MEMRANGE	0x81	isapnp.h
33709	ISAPNP_TAG_ANSISTR	0x82	isapnp.h
33710	ISAPNP_TAG_UNICODESTR	0x83	isapnp.h
33711	ISAPNP_TAG_VENDORLONG	0x84	isapnp.h
33712	ISAPNP_TAG_MEM32RANGE	0x85	isapnp.h
33713	ISAPNP_TAG_FIXEDMEM32RANGE	0x86	isapnp.h
33714	ISAPNP_TAG_RSVDLONG0	0xF0	isapnp.h
33715	ISAPNP_TAG_RSVDLONG1	0xF1	isapnp.h
33716	ISAPNP_TAG_RSVDLONG2	0xF2	isapnp.h
33717	ISAPNP_TAG_RSVDLONG3	0xF3	isapnp.h
33718	ISAPNP_TAG_RSVDLONG4	0xF4	isapnp.h
33719	ISAPNP_TAG_RSVDLONG5	0xF5	isapnp.h
33720	ISAPNP_TAG_RSVDLONG6	0xF6	isapnp.h
33721	ISAPNP_TAG_RSVDLONG7	0xF7	isapnp.h
33722	ISAPNP_TAG_RSVDLONG8	0xF8	isapnp.h
33723	ISAPNP_TAG_RSVDLONG9	0xF9	isapnp.h
33724	ISAPNP_TAG_RSVDLONGA	0xFA	isapnp.h
33725	ISAPNP_TAG_RSVDLONGB	0xFB	isapnp.h
33726	ISAPNP_TAG_RSVDLONGC	0xFC	isapnp.h
33727	ISAPNP_TAG_RSVDLONGD	0xFD	isapnp.h
33728	ISAPNP_TAG_RSVDLONGE	0xFE	isapnp.h
33729	ISAPNP_TAG_RSVDLONGF	0xFF	isapnp.h
33730	ISAPNP_TAG_PSEUDO_NEWBOARD	0x100	isapnp.h
33731	__isapnp_driver	__table ( struct isapnp_driver, isapnp_drivers, 01 )	isapnp.h
33732	GENERIC_ISAPNP_VENDOR	ISAPNP_VENDOR ( 'P','N','P' )	isa_ids.h
33733	ISA_PROD_ID_MASK	( 0xf0ff )	isa_ids.h
33734	ISCSI_PORT	3260	iscsi.h
33735	ISCSI_OPCODE_MASK	0x3f	iscsi.h
33736	ISCSI_FLAG_IMMEDIATE	0x40	iscsi.h
33737	ISCSI_FLAG_FINAL	0x80	iscsi.h
33738	ISCSI_OPCODE_LOGIN_REQUEST	0x03	iscsi.h
33739	ISCSI_LOGIN_FLAG_TRANSITION	0x80	iscsi.h
33740	ISCSI_LOGIN_FLAG_CONTINUE	0x40	iscsi.h
33741	ISCSI_LOGIN_CSG_MASK	0x0c	iscsi.h
33742	ISCSI_LOGIN_CSG_SECURITY_NEGOTI	0x00	iscsi.h
33743	ISCSI_LOGIN_CSG_OPERATIONAL_NEG	0x04	iscsi.h
33744	ISCSI_LOGIN_CSG_FULL_FEATURE_PH	0x0c	iscsi.h
33745	ISCSI_LOGIN_NSG_MASK	0x03	iscsi.h
33746	ISCSI_LOGIN_NSG_SECURITY_NEGOTI	0x00	iscsi.h
33747	ISCSI_LOGIN_NSG_OPERATIONAL_NEG	0x01	iscsi.h
33748	ISCSI_LOGIN_NSG_FULL_FEATURE_PH	0x03	iscsi.h
33749	ISCSI_ISID_IANA	0x40000000	iscsi.h
33750	IANA_EN_FEN_SYSTEMS	10019	iscsi.h
33751	ISCSI_OPCODE_LOGIN_RESPONSE	0x23	iscsi.h
33752	ISCSI_STATUS_SUCCESS	0x00	iscsi.h
33753	ISCSI_STATUS_REDIRECT	0x01	iscsi.h
33754	ISCSI_STATUS_INITIATOR_ERROR	0x02	iscsi.h
33755	ISCSI_STATUS_INITIATOR_ERROR_AU	0x01	iscsi.h
33756	ISCSI_STATUS_INITIATOR_ERROR_AU	0x02	iscsi.h
33757	ISCSI_STATUS_INITIATOR_ERROR_NO	0x03	iscsi.h
33758	ISCSI_STATUS_INITIATOR_ERROR_RE	0x04	iscsi.h
33759	ISCSI_STATUS_TARGET_ERROR	0x03	iscsi.h
33760	ISCSI_OPCODE_SCSI_COMMAND	0x01	iscsi.h
33761	ISCSI_COMMAND_FLAG_READ	0x40	iscsi.h
33762	ISCSI_COMMAND_FLAG_WRITE	0x20	iscsi.h
33763	ISCSI_COMMAND_ATTR_UNTAGGED	0x00	iscsi.h
33764	ISCSI_COMMAND_ATTR_SIMPLE	0x01	iscsi.h
33765	ISCSI_COMMAND_ATTR_ORDERED	0x02	iscsi.h
33766	ISCSI_COMMAND_ATTR_HEAD_OF_QUEU	0x03	iscsi.h
33767	ISCSI_COMMAND_ATTR_ACA	0x04	iscsi.h
33768	ISCSI_OPCODE_SCSI_RESPONSE	0x21	iscsi.h
33769	ISCSI_RESPONSE_COMMAND_COMPLETE	0x00	iscsi.h
33770	ISCSI_RESPONSE_TARGET_FAILURE	0x01	iscsi.h
33771	ISCSI_SENSE_RESPONSE_CODE_OFFSE	2	iscsi.h
33772	ISCSI_OPCODE_DATA_IN	0x25	iscsi.h
33773	ISCSI_DATA_FLAG_ACKNOWLEDGE	0x40	iscsi.h
33774	ISCSI_DATA_FLAG_OVERFLOW	0x04	iscsi.h
33775	ISCSI_DATA_FLAG_UNDERFLOW	0x02	iscsi.h
33776	ISCSI_DATA_FLAG_STATUS	0x01	iscsi.h
33777	ISCSI_OPCODE_DATA_OUT	0x05	iscsi.h
33778	ISCSI_OPCODE_R2T	0x31	iscsi.h
33779	ISCSI_STATUS_SECURITY_NEGOTIATI	( ISCSI_LOGIN_CSG_SECURITY_NEGOTIATION \| \ ISCSI_LOGIN_NSG_OPERATIONAL_NEGOTIATION )	iscsi.h
33780	ISCSI_STATUS_OPERATIONAL_NEGOTI	( ISCSI_LOGIN_CSG_OPERATIONAL_NEGOTIATION \| \ ISCSI_LOGIN_NSG_FULL_FEATURE_PHASE )	iscsi.h
33781	ISCSI_STATUS_FULL_FEATURE_PHASE	ISCSI_LOGIN_CSG_FULL_FEATURE_PHASE	iscsi.h
33782	ISCSI_STATUS_PHASE_MASK	( ISCSI_LOGIN_CSG_MASK \| ISCSI_LOGIN_NSG_MASK )	iscsi.h
33783	ISCSI_STATUS_STRINGS_SECURITY	0x0100	iscsi.h
33784	ISCSI_STATUS_STRINGS_CHAP_ALGOR	0x0200	iscsi.h
33785	ISCSI_STATUS_STRINGS_CHAP_RESPO	0x0400	iscsi.h
33786	ISCSI_STATUS_STRINGS_CHAP_CHALL	0x0800	iscsi.h
33787	ISCSI_STATUS_STRINGS_OPERATIONA	0x1000	iscsi.h
33788	ISCSI_STATUS_STRINGS_MASK	0xff00	iscsi.h
33789	ISCSI_MAX_RETRIES	2	iscsi.h
33790	NUL	0x00	keys.h
33791	CTRL_A	0x01	keys.h
33792	CTRL_B	0x02	keys.h
33793	CTRL_C	0x03	keys.h
33794	CTRL_D	0x04	keys.h
33795	CTRL_E	0x05	keys.h
33796	CTRL_F	0x06	keys.h
33797	CTRL_G	0x07	keys.h
33798	CTRL_H	0x08	keys.h
33799	CTRL_I	0x09	keys.h
33800	CTRL_J	0x0a	keys.h
33801	CTRL_K	0x0b	keys.h
33802	CTRL_L	0x0c	keys.h
33803	CTRL_M	0x0d	keys.h
33804	CTRL_N	0x0e	keys.h
33805	CTRL_O	0x0f	keys.h
33806	CTRL_P	0x10	keys.h
33807	CTRL_Q	0x11	keys.h
33808	CTRL_R	0x12	keys.h
33809	CTRL_S	0x13	keys.h
33810	CTRL_T	0x14	keys.h
33811	CTRL_U	0x15	keys.h
33812	CTRL_V	0x16	keys.h
33813	CTRL_W	0x17	keys.h
33814	CTRL_X	0x18	keys.h
33815	CTRL_Y	0x19	keys.h
33816	CTRL_Z	0x1a	keys.h
33817	BACKSPACE	CTRL_H	keys.h
33818	TAB	CTRL_I	keys.h
33819	LF	CTRL_J	keys.h
33820	CR	CTRL_M	keys.h
33821	ESC	0x1b	keys.h
33822	KEY_MIN	0x101	keys.h
33823	KEY_UP	KEY_ANSI ( 'A' )	keys.h	*< Up arrow
33824	KEY_DOWN	KEY_ANSI ( 'B' )	keys.h	*< Down arrow
33825	KEY_RIGHT	KEY_ANSI ( 'C' )	keys.h	*< Right arrow
33826	KEY_LEFT	KEY_ANSI ( 'D' )	keys.h	*< Left arrow
33827	KEY_END	KEY_ANSI ( 'F' )	keys.h	*< End
33828	KEY_HOME	KEY_ANSI ( 'H' )	keys.h	*< Home
33829	KEY_IC	KEY_ANSI ( '2' )	keys.h	*< Insert
33830	KEY_DC	KEY_ANSI ( '3' )	keys.h	*< Delete
33831	KEY_PPAGE	KEY_ANSI ( '5' )	keys.h	*< Page up
33832	KEY_NPAGE	KEY_ANSI ( '6' )	keys.h	*< Page down
33833	KEY_MAX	0x1ff	keys.h
33834	KEY_BACKSPACE	BACKSPACE	keys.h
33835	KEY_ENTER	LF	keys.h
33836	printk	printf	linux_compat.h
33837	MCA_MOTHERBOARD_SETUP_REG	0x94	mca.h
33838	MCA_ADAPTER_SETUP_REG	0x96	mca.h
33839	MCA_MAX_SLOT_NR	0x07	mca.h	Must be 2^n - 1
33840	GENERIC_MCA_VENDOR	ISA_VENDOR ( 'M', 'C', 'A' )	mca.h
33841	__mca_driver	__table ( struct mca_driver, mca_drivers, 01 )	mca.h
33842	MD5_DIGEST_SIZE	16	md5.h
33843	MD5_BLOCK_WORDS	16	md5.h
33844	MD5_HASH_WORDS	4	md5.h
33845	MD5_CTX_SIZE	sizeof ( struct md5_ctx )	md5.h
33846	MAX_MEMORY_REGIONS	8	memmap.h
33847	NDP_STATE_INVALID	0	ndp.h
33848	NDP_STATE_INCOMPLETE	1	ndp.h
33849	NDP_STATE_REACHABLE	2	ndp.h
33850	NDP_STATE_DELAY	3	ndp.h
33851	NDP_STATE_PROBE	4	ndp.h
33852	NDP_STATE_STALE	5	ndp.h
33853	MAX_LL_ADDR_LEN	20	netdevice.h
33854	MAX_LL_HEADER_LEN	32	netdevice.h
33855	MAX_NET_ADDR_LEN	4	netdevice.h
33856	NETDEV_OPEN	0x0001	netdevice.h
33857	NETDEV_LINK_UP	0x0002	netdevice.h
33858	__ll_protocol	__table ( struct ll_protocol, ll_protocols, 01 )	netdevice.h
33859	__net_protocol	__table ( struct net_protocol, net_protocols, 01 )	netdevice.h
33860	__uri_opener	__table ( struct uri_opener, uri_openers, 01 )	open.h
33861	__socket_opener	__table ( struct socket_opener, socket_openers, 01 )	open.h
33862	PCI_COMMAND_IO	0x1	pci.h	Enable response in I/O space
33863	PCI_COMMAND_MEM	0x2	pci.h	Enable response in mem space
33864	PCI_COMMAND_MASTER	0x4	pci.h	Enable bus mastering
33865	PCI_CACHE_LINE_SIZE	0x0c	pci.h	8 bits
33866	PCI_LATENCY_TIMER	0x0d	pci.h	8 bits
33867	PCI_COMMAND_SPECIAL	0x8	pci.h	Enable response to special cycles
33868	PCI_COMMAND_INVALIDATE	0x10	pci.h	Use memory write and invalidate
33869	PCI_COMMAND_VGA_PALETTE	0x20	pci.h	Enable palette snooping
33870	PCI_COMMAND_PARITY	0x40	pci.h	Enable parity checking
33871	PCI_COMMAND_WAIT	0x80	pci.h	Enable address/data stepping
33872	PCI_COMMAND_SERR	0x100	pci.h	Enable SERR
33873	PCI_COMMAND_FAST_BACK	0x200	pci.h	Enable back-to-back writes
33874	PCI_VENDOR_ID	0x00	pci.h	16 bits
33875	PCI_DEVICE_ID	0x02	pci.h	16 bits
33876	PCI_COMMAND	0x04	pci.h	16 bits
33877	PCI_STATUS	0x06	pci.h	16 bits
33878	PCI_STATUS_CAP_LIST	0x10	pci.h	Support Capability List
33879	PCI_STATUS_66MHZ	0x20	pci.h	Support 66 Mhz PCI 2.1 bus
33880	PCI_STATUS_UDF	0x40	pci.h	Support User Definable Features [obsolete]
33881	PCI_STATUS_FAST_BACK	0x80	pci.h	Accept fast-back to back
33882	PCI_STATUS_PARITY	0x100	pci.h	Detected parity error
33883	PCI_STATUS_DEVSEL_MASK	0x600	pci.h	DEVSEL timing
33884	PCI_STATUS_DEVSEL_FAST	0x000	pci.h
33885	PCI_STATUS_DEVSEL_MEDIUM	0x200	pci.h
33886	PCI_STATUS_DEVSEL_SLOW	0x400	pci.h
33887	PCI_STATUS_SIG_TARGET_ABORT	0x800	pci.h	Set on target abort
33888	PCI_STATUS_REC_TARGET_ABORT	0x1000	pci.h	Master ack of "
33889	PCI_STATUS_REC_MASTER_ABORT	0x2000	pci.h	Set on master abort
33890	PCI_STATUS_SIG_SYSTEM_ERROR	0x4000	pci.h	Set when we drive SERR
33891	PCI_STATUS_DETECTED_PARITY	0x8000	pci.h	Set on parity error
33892	PCI_REVISION	0x08	pci.h	8 bits
33893	PCI_REVISION_ID	0x08	pci.h	8 bits
33894	PCI_CLASS_REVISION	0x08	pci.h	32 bits
33895	PCI_CLASS_CODE	0x0b	pci.h	8 bits
33896	PCI_SUBCLASS_CODE	0x0a	pci.h	8 bits
33897	PCI_HEADER_TYPE	0x0e	pci.h	8 bits
33898	PCI_HEADER_TYPE_NORMAL	0	pci.h
33899	PCI_HEADER_TYPE_BRIDGE	1	pci.h
33900	PCI_HEADER_TYPE_CARDBUS	2	pci.h
33901	PCI_CARDBUS_CIS	0x28	pci.h
33902	PCI_SUBSYSTEM_VENDOR_ID	0x2c	pci.h
33903	PCI_SUBSYSTEM_ID	0x2e	pci.h
33904	PCI_BASE_ADDRESS_0	0x10	pci.h	32 bits
33905	PCI_BASE_ADDRESS_1	0x14	pci.h	32 bits
33906	PCI_BASE_ADDRESS_2	0x18	pci.h	32 bits
33907	PCI_BASE_ADDRESS_3	0x1c	pci.h	32 bits
33908	PCI_BASE_ADDRESS_4	0x20	pci.h	32 bits
33909	PCI_BASE_ADDRESS_5	0x24	pci.h	32 bits
33910	PCI_BASE_ADDRESS_SPACE	0x01	pci.h	0 = memory, 1 = I/O
33911	PCI_BASE_ADDRESS_SPACE_IO	0x01	pci.h
33912	PCI_BASE_ADDRESS_SPACE_MEMORY	0x00	pci.h
33913	PCI_BASE_ADDRESS_MEM_TYPE_MASK	0x06	pci.h
33914	PCI_BASE_ADDRESS_MEM_TYPE_32	0x00	pci.h	32 bit address
33915	PCI_BASE_ADDRESS_MEM_TYPE_1M	0x02	pci.h	Below 1M [obsolete]
33916	PCI_BASE_ADDRESS_MEM_TYPE_64	0x04	pci.h	64 bit address
33917	PCI_BASE_ADDRESS_MEM_MASK	(~0x0f)	pci.h
33918	PCI_BASE_ADDRESS_IO_MASK	(~0x03)	pci.h
33919	PCI_ROM_ADDRESS	0x30	pci.h	32 bits
33920	PCI_ROM_ADDRESS_ENABLE	0x01	pci.h	Write 1 to enable ROM,
33921	PCI_CAPABILITY_LIST	0x34	pci.h	Offset of first capability list entry
33922	PCI_INTERRUPT_LINE	0x3c	pci.h	IRQ number (0-15)
33923	PCI_INTERRUPT_PIN	0x3d	pci.h	IRQ pin on PCI bus (A-D)
33924	PCI_PRIMARY_BUS	0x18	pci.h	Primary bus number
33925	PCI_SECONDARY_BUS	0x19	pci.h	Secondary bus number
33926	PCI_SUBORDINATE_BUS	0x1a	pci.h	Highest bus number behind the bridge
33927	PCI_SEC_LATENCY_TIMER	0x1b	pci.h	Latency timer for secondary interface
33928	PCI_IO_BASE	0x1c	pci.h	I/O range behind the bridge
33929	PCI_IO_LIMIT	0x1d	pci.h
33930	PCI_IO_RANGE_TYPE_MASK	0x0f	pci.h	I/O bridging type
33931	PCI_IO_RANGE_TYPE_16	0x00	pci.h
33932	PCI_IO_RANGE_TYPE_32	0x01	pci.h
33933	PCI_IO_RANGE_MASK	~0x0f	pci.h
33934	PCI_SEC_STATUS	0x1e	pci.h	Secondary status register, only bit 14 used
33935	PCI_MEMORY_BASE	0x20	pci.h	Memory range behind
33936	PCI_MEMORY_LIMIT	0x22	pci.h
33937	PCI_MEMORY_RANGE_TYPE_MASK	0x0f	pci.h
33938	PCI_MEMORY_RANGE_MASK	~0x0f	pci.h
33939	PCI_PREF_MEMORY_BASE	0x24	pci.h	Prefetchable memory range behind
33940	PCI_PREF_MEMORY_LIMIT	0x26	pci.h
33941	PCI_PREF_RANGE_TYPE_MASK	0x0f	pci.h
33942	PCI_PREF_RANGE_TYPE_32	0x00	pci.h
33943	PCI_PREF_RANGE_TYPE_64	0x01	pci.h
33944	PCI_PREF_RANGE_MASK	~0x0f	pci.h
33945	PCI_PREF_BASE_UPPER32	0x28	pci.h	Upper half of prefetchable memory range
33946	PCI_PREF_LIMIT_UPPER32	0x2c	pci.h
33947	PCI_IO_BASE_UPPER16	0x30	pci.h	Upper half of I/O addresses
33948	PCI_IO_LIMIT_UPPER16	0x32	pci.h
33949	PCI_ROM_ADDRESS1	0x38	pci.h	Same as PCI_ROM_ADDRESS, but for htype 1
33950	PCI_BRIDGE_CONTROL	0x3e	pci.h
33951	PCI_BRIDGE_CTL_PARITY	0x01	pci.h	Enable parity detection on secondary interface
33952	PCI_BRIDGE_CTL_SERR	0x02	pci.h	The same for SERR forwarding
33953	PCI_BRIDGE_CTL_NO_ISA	0x04	pci.h	Disable bridging of ISA ports
33954	PCI_BRIDGE_CTL_VGA	0x08	pci.h	Forward VGA addresses
33955	PCI_BRIDGE_CTL_MASTER_ABORT	0x20	pci.h	Report master aborts
33956	PCI_BRIDGE_CTL_BUS_RESET	0x40	pci.h	Secondary bus reset
33957	PCI_BRIDGE_CTL_FAST_BACK	0x80	pci.h	Fast Back2Back enabled on secondary interface
33958	PCI_CB_CAPABILITY_LIST	0x14	pci.h
33959	PCI_CAP_LIST_ID	0	pci.h	Capability ID
33960	PCI_CAP_ID_PM	0x01	pci.h	Power Management
33961	PCI_CAP_ID_AGP	0x02	pci.h	Accelerated Graphics Port
33962	PCI_CAP_ID_VPD	0x03	pci.h	Vital Product Data
33963	PCI_CAP_ID_SLOTID	0x04	pci.h	Slot Identification
33964	PCI_CAP_ID_MSI	0x05	pci.h	Message Signalled Interrupts
33965	PCI_CAP_ID_CHSWP	0x06	pci.h	CompactPCI HotSwap
33966	PCI_CAP_ID_EXP	0x10	pci.h	PCI Express
33967	PCI_CAP_LIST_NEXT	1	pci.h	Next capability in the list
33968	PCI_CAP_FLAGS	2	pci.h	Capability defined flags (16 bits)
33969	PCI_CAP_SIZEOF	4	pci.h
33970	PCI_PM_PMC	2	pci.h	PM Capabilities Register
33971	PCI_PM_CAP_VER_MASK	0x0007	pci.h	Version
33972	PCI_PM_CAP_PME_CLOCK	0x0008	pci.h	PME clock required
33973	PCI_PM_CAP_RESERVED	0x0010	pci.h	Reserved field
33974	PCI_PM_CAP_DSI	0x0020	pci.h	Device specific initialization
33975	PCI_PM_CAP_AUX_POWER	0x01C0	pci.h	Auxilliary power support mask
33976	PCI_PM_CAP_D1	0x0200	pci.h	D1 power state support
33977	PCI_PM_CAP_D2	0x0400	pci.h	D2 power state support
33978	PCI_PM_CAP_PME	0x0800	pci.h	PME pin supported
33979	PCI_PM_CAP_PME_MASK	0xF800	pci.h	PME Mask of all supported states
33980	PCI_PM_CAP_PME_D0	0x0800	pci.h	PME# from D0
33981	PCI_PM_CAP_PME_D1	0x1000	pci.h	PME# from D1
33982	PCI_PM_CAP_PME_D2	0x2000	pci.h	PME# from D2
33983	PCI_PM_CAP_PME_D3	0x4000	pci.h	PME# from D3 (hot)
33984	PCI_PM_CAP_PME_D3cold	0x8000	pci.h	PME# from D3 (cold)
33985	PCI_PM_CTRL	4	pci.h	PM control and status register
33986	PCI_PM_CTRL_STATE_MASK	0x0003	pci.h	Current power state (D0 to D3)
33987	PCI_PM_CTRL_PME_ENABLE	0x0100	pci.h	PME pin enable
33988	PCI_PM_CTRL_DATA_SEL_MASK	0x1e00	pci.h	Data select (??)
33989	PCI_PM_CTRL_DATA_SCALE_MASK	0x6000	pci.h	Data scale (??)
33990	PCI_PM_CTRL_PME_STATUS	0x8000	pci.h	PME pin status
33991	PCI_PM_PPB_EXTENSIONS	6	pci.h	PPB support extensions (??)
33992	PCI_PM_PPB_B2_B3	0x40	pci.h	Stop clock when in D3hot (??)
33993	PCI_PM_BPCC_ENABLE	0x80	pci.h	Bus power/clock control enable (??)
33994	PCI_PM_DATA_REGISTER	7	pci.h	(??)
33995	PCI_PM_SIZEOF	8	pci.h
33996	PCI_AGP_VERSION	2	pci.h	BCD version number
33997	PCI_AGP_RFU	3	pci.h	Rest of capability flags
33998	PCI_AGP_STATUS	4	pci.h	Status register
33999	PCI_AGP_STATUS_RQ_MASK	0xff000000	pci.h	Maximum number of requests - 1
34000	PCI_AGP_STATUS_SBA	0x0200	pci.h	Sideband addressing supported
34001	PCI_AGP_STATUS_64BIT	0x0020	pci.h	64-bit addressing supported
34002	PCI_AGP_STATUS_FW	0x0010	pci.h	FW transfers supported
34003	PCI_AGP_STATUS_RATE4	0x0004	pci.h	4x transfer rate supported
34004	PCI_AGP_STATUS_RATE2	0x0002	pci.h	2x transfer rate supported
34005	PCI_AGP_STATUS_RATE1	0x0001	pci.h	1x transfer rate supported
34006	PCI_AGP_COMMAND	8	pci.h	Control register
34007	PCI_AGP_COMMAND_RQ_MASK	0xff000000	pci.h	Master: Maximum number of requests
34008	PCI_AGP_COMMAND_SBA	0x0200	pci.h	Sideband addressing enabled
34009	PCI_AGP_COMMAND_AGP	0x0100	pci.h	Allow processing of AGP transactions
34010	PCI_AGP_COMMAND_64BIT	0x0020	pci.h	Allow processing of 64-bit addresses
34011	PCI_AGP_COMMAND_FW	0x0010	pci.h	Force FW transfers
34012	PCI_AGP_COMMAND_RATE4	0x0004	pci.h	Use 4x rate
34013	PCI_AGP_COMMAND_RATE2	0x0002	pci.h	Use 2x rate
34014	PCI_AGP_COMMAND_RATE1	0x0001	pci.h	Use 1x rate
34015	PCI_AGP_SIZEOF	12	pci.h
34016	PCI_SID_ESR	2	pci.h	Expansion Slot Register
34017	PCI_SID_ESR_NSLOTS	0x1f	pci.h	Number of expansion slots available
34018	PCI_SID_ESR_FIC	0x20	pci.h	First In Chassis Flag
34019	PCI_SID_CHASSIS_NR	3	pci.h	Chassis Number
34020	PCI_MSI_FLAGS	2	pci.h	Various flags
34021	PCI_MSI_FLAGS_64BIT	0x80	pci.h	64-bit addresses allowed
34022	PCI_MSI_FLAGS_QSIZE	0x70	pci.h	Message queue size configured
34023	PCI_MSI_FLAGS_QMASK	0x0e	pci.h	Maximum queue size available
34024	PCI_MSI_FLAGS_ENABLE	0x01	pci.h	MSI feature enabled
34025	PCI_MSI_RFU	3	pci.h	Rest of capability flags
34026	PCI_MSI_ADDRESS_LO	4	pci.h	Lower 32 bits
34027	PCI_MSI_ADDRESS_HI	8	pci.h	Upper 32 bits (if PCI_MSI_FLAGS_64BIT set)
34028	PCI_MSI_DATA_32	8	pci.h	16 bits of data for 32-bit devices
34029	PCI_MSI_DATA_64	12	pci.h	16 bits of data for 64-bit devices
34030	PCI_ANY_ID	0xffff	pci.h
34031	__pci_driver	__table ( struct pci_driver, pci_drivers, 01 )	pci.h
34032	PCI_CLASS_NOT_DEFINED	0x0000	pci_ids.h
34033	PCI_CLASS_NOT_DEFINED_VGA	0x0001	pci_ids.h
34034	PCI_BASE_CLASS_STORAGE	0x01	pci_ids.h
34035	PCI_CLASS_STORAGE_SCSI	0x0100	pci_ids.h
34036	PCI_CLASS_STORAGE_IDE	0x0101	pci_ids.h
34037	PCI_CLASS_STORAGE_FLOPPY	0x0102	pci_ids.h
34038	PCI_CLASS_STORAGE_IPI	0x0103	pci_ids.h
34039	PCI_CLASS_STORAGE_RAID	0x0104	pci_ids.h
34040	PCI_CLASS_STORAGE_OTHER	0x0180	pci_ids.h
34041	PCI_BASE_CLASS_NETWORK	0x02	pci_ids.h
34042	PCI_CLASS_NETWORK_ETHERNET	0x0200	pci_ids.h
34043	PCI_CLASS_NETWORK_TOKEN_RING	0x0201	pci_ids.h
34044	PCI_CLASS_NETWORK_FDDI	0x0202	pci_ids.h
34045	PCI_CLASS_NETWORK_ATM	0x0203	pci_ids.h
34046	PCI_CLASS_NETWORK_OTHER	0x0280	pci_ids.h
34047	PCI_BASE_CLASS_DISPLAY	0x03	pci_ids.h
34048	PCI_CLASS_DISPLAY_VGA	0x0300	pci_ids.h
34049	PCI_CLASS_DISPLAY_XGA	0x0301	pci_ids.h
34050	PCI_CLASS_DISPLAY_3D	0x0302	pci_ids.h
34051	PCI_CLASS_DISPLAY_OTHER	0x0380	pci_ids.h
34052	PCI_BASE_CLASS_MULTIMEDIA	0x04	pci_ids.h
34053	PCI_CLASS_MULTIMEDIA_VIDEO	0x0400	pci_ids.h
34054	PCI_CLASS_MULTIMEDIA_AUDIO	0x0401	pci_ids.h
34055	PCI_CLASS_MULTIMEDIA_PHONE	0x0402	pci_ids.h
34056	PCI_CLASS_MULTIMEDIA_OTHER	0x0480	pci_ids.h
34057	PCI_BASE_CLASS_MEMORY	0x05	pci_ids.h
34058	PCI_CLASS_MEMORY_RAM	0x0500	pci_ids.h
34059	PCI_CLASS_MEMORY_FLASH	0x0501	pci_ids.h
34060	PCI_CLASS_MEMORY_OTHER	0x0580	pci_ids.h
34061	PCI_BASE_CLASS_BRIDGE	0x06	pci_ids.h
34062	PCI_CLASS_BRIDGE_HOST	0x0600	pci_ids.h
34063	PCI_CLASS_BRIDGE_ISA	0x0601	pci_ids.h
34064	PCI_CLASS_BRIDGE_EISA	0x0602	pci_ids.h
34065	PCI_CLASS_BRIDGE_MC	0x0603	pci_ids.h
34066	PCI_CLASS_BRIDGE_PCI	0x0604	pci_ids.h
34067	PCI_CLASS_BRIDGE_PCMCIA	0x0605	pci_ids.h
34068	PCI_CLASS_BRIDGE_NUBUS	0x0606	pci_ids.h
34069	PCI_CLASS_BRIDGE_CARDBUS	0x0607	pci_ids.h
34070	PCI_CLASS_BRIDGE_RACEWAY	0x0608	pci_ids.h
34071	PCI_CLASS_BRIDGE_OTHER	0x0680	pci_ids.h
34072	PCI_BASE_CLASS_COMMUNICATION	0x07	pci_ids.h
34073	PCI_CLASS_COMMUNICATION_SERIAL	0x0700	pci_ids.h
34074	PCI_CLASS_COMMUNICATION_PARALLE	0x0701	pci_ids.h
34075	PCI_CLASS_COMMUNICATION_MULTISE	0x0702	pci_ids.h
34076	PCI_CLASS_COMMUNICATION_MODEM	0x0703	pci_ids.h
34077	PCI_CLASS_COMMUNICATION_OTHER	0x0780	pci_ids.h
34078	PCI_BASE_CLASS_SYSTEM	0x08	pci_ids.h
34079	PCI_CLASS_SYSTEM_PIC	0x0800	pci_ids.h
34080	PCI_CLASS_SYSTEM_DMA	0x0801	pci_ids.h
34081	PCI_CLASS_SYSTEM_TIMER	0x0802	pci_ids.h
34082	PCI_CLASS_SYSTEM_RTC	0x0803	pci_ids.h
34083	PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804	pci_ids.h
34084	PCI_CLASS_SYSTEM_OTHER	0x0880	pci_ids.h
34085	PCI_BASE_CLASS_INPUT	0x09	pci_ids.h
34086	PCI_CLASS_INPUT_KEYBOARD	0x0900	pci_ids.h
34087	PCI_CLASS_INPUT_PEN	0x0901	pci_ids.h
34088	PCI_CLASS_INPUT_MOUSE	0x0902	pci_ids.h
34089	PCI_CLASS_INPUT_SCANNER	0x0903	pci_ids.h
34090	PCI_CLASS_INPUT_GAMEPORT	0x0904	pci_ids.h
34091	PCI_CLASS_INPUT_OTHER	0x0980	pci_ids.h
34092	PCI_BASE_CLASS_DOCKING	0x0a	pci_ids.h
34093	PCI_CLASS_DOCKING_GENERIC	0x0a00	pci_ids.h
34094	PCI_CLASS_DOCKING_OTHER	0x0a80	pci_ids.h
34095	PCI_BASE_CLASS_PROCESSOR	0x0b	pci_ids.h
34096	PCI_CLASS_PROCESSOR_386	0x0b00	pci_ids.h
34097	PCI_CLASS_PROCESSOR_486	0x0b01	pci_ids.h
34098	PCI_CLASS_PROCESSOR_PENTIUM	0x0b02	pci_ids.h
34099	PCI_CLASS_PROCESSOR_ALPHA	0x0b10	pci_ids.h
34100	PCI_CLASS_PROCESSOR_POWERPC	0x0b20	pci_ids.h
34101	PCI_CLASS_PROCESSOR_MIPS	0x0b30	pci_ids.h
34102	PCI_CLASS_PROCESSOR_CO	0x0b40	pci_ids.h
34103	PCI_BASE_CLASS_SERIAL	0x0c	pci_ids.h
34104	PCI_CLASS_SERIAL_FIREWIRE	0x0c00	pci_ids.h
34105	PCI_CLASS_SERIAL_ACCESS	0x0c01	pci_ids.h
34106	PCI_CLASS_SERIAL_SSA	0x0c02	pci_ids.h
34107	PCI_CLASS_SERIAL_USB	0x0c03	pci_ids.h
34108	PCI_CLASS_SERIAL_FIBER	0x0c04	pci_ids.h
34109	PCI_CLASS_SERIAL_SMBUS	0x0c05	pci_ids.h
34110	PCI_BASE_CLASS_INTELLIGENT	0x0e	pci_ids.h
34111	PCI_CLASS_INTELLIGENT_I2O	0x0e00	pci_ids.h
34112	PCI_BASE_CLASS_SATELLITE	0x0f	pci_ids.h
34113	PCI_CLASS_SATELLITE_TV	0x0f00	pci_ids.h
34114	PCI_CLASS_SATELLITE_AUDIO	0x0f01	pci_ids.h
34115	PCI_CLASS_SATELLITE_VOICE	0x0f03	pci_ids.h
34116	PCI_CLASS_SATELLITE_DATA	0x0f04	pci_ids.h
34117	PCI_BASE_CLASS_CRYPT	0x10	pci_ids.h
34118	PCI_CLASS_CRYPT_NETWORK	0x1000	pci_ids.h
34119	PCI_CLASS_CRYPT_ENTERTAINMENT	0x1001	pci_ids.h
34120	PCI_CLASS_CRYPT_OTHER	0x1080	pci_ids.h
34121	PCI_BASE_CLASS_SIGNAL_PROCESSIN	0x11	pci_ids.h
34122	PCI_CLASS_SP_DPIO	0x1100	pci_ids.h
34123	PCI_CLASS_SP_OTHER	0x1180	pci_ids.h
34124	PCI_CLASS_OTHERS	0xff	pci_ids.h
34125	PCI_VENDOR_ID_DYNALINK	0x0675	pci_ids.h
34126	PCI_VENDOR_ID_BERKOM	0x0871	pci_ids.h
34127	PCI_VENDOR_ID_COMPAQ	0x0e11	pci_ids.h
34128	PCI_VENDOR_ID_NCR	0x1000	pci_ids.h
34129	PCI_VENDOR_ID_LSI_LOGIC	0x1000	pci_ids.h
34130	PCI_VENDOR_ID_ATI	0x1002	pci_ids.h
34131	PCI_VENDOR_ID_VLSI	0x1004	pci_ids.h
34132	PCI_VENDOR_ID_ADL	0x1005	pci_ids.h
34133	PCI_VENDOR_ID_NS	0x100b	pci_ids.h
34134	PCI_VENDOR_ID_TSENG	0x100c	pci_ids.h
34135	PCI_VENDOR_ID_WEITEK	0x100e	pci_ids.h
34136	PCI_VENDOR_ID_DEC	0x1011	pci_ids.h
34137	PCI_VENDOR_ID_CIRRUS	0x1013	pci_ids.h
34138	PCI_VENDOR_ID_IBM	0x1014	pci_ids.h
34139	PCI_VENDOR_ID_COMPEX2	0x101a	pci_ids.h
34140	PCI_VENDOR_ID_WD	0x101c	pci_ids.h
34141	PCI_VENDOR_ID_AMI	0x101e	pci_ids.h
34142	PCI_VENDOR_ID_AMD	0x1022	pci_ids.h
34143	PCI_VENDOR_ID_TRIDENT	0x1023	pci_ids.h
34144	PCI_VENDOR_ID_AI	0x1025	pci_ids.h
34145	PCI_VENDOR_ID_DELL	0x1028	pci_ids.h
34146	PCI_VENDOR_ID_MATROX	0x102B	pci_ids.h
34147	PCI_VENDOR_ID_CT	0x102c	pci_ids.h
34148	PCI_VENDOR_ID_MIRO	0x1031	pci_ids.h
34149	PCI_VENDOR_ID_NEC	0x1033	pci_ids.h
34150	PCI_VENDOR_ID_FD	0x1036	pci_ids.h
34151	PCI_VENDOR_ID_SIS	0x1039	pci_ids.h
34152	PCI_VENDOR_ID_SI	0x1039	pci_ids.h
34153	PCI_VENDOR_ID_HP	0x103c	pci_ids.h
34154	PCI_VENDOR_ID_PCTECH	0x1042	pci_ids.h
34155	PCI_VENDOR_ID_ASUSTEK	0x1043	pci_ids.h
34156	PCI_VENDOR_ID_DPT	0x1044	pci_ids.h
34157	PCI_VENDOR_ID_OPTI	0x1045	pci_ids.h
34158	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
34159	PCI_VENDOR_ID_ELSA	0x1048	pci_ids.h
34160	PCI_VENDOR_ID_SGS	0x104a	pci_ids.h
34161	PCI_VENDOR_ID_BUSLOGIC	0x104B	pci_ids.h
34162	PCI_VENDOR_ID_TI	0x104c	pci_ids.h
34163	PCI_VENDOR_ID_SONY	0x104d	pci_ids.h
34164	PCI_VENDOR_ID_OAK	0x104e	pci_ids.h
34165	PCI_VENDOR_ID_WINBOND2	0x1050	pci_ids.h
34166	PCI_VENDOR_ID_ANIGMA	0x1051	pci_ids.h
34167	PCI_VENDOR_ID_EFAR	0x1055	pci_ids.h
34168	PCI_VENDOR_ID_MOTOROLA	0x1057	pci_ids.h
34169	PCI_VENDOR_ID_MOTOROLA_OOPS	0x1507	pci_ids.h
34170	PCI_VENDOR_ID_PROMISE	0x105a	pci_ids.h
34171	PCI_VENDOR_ID_N9	0x105d	pci_ids.h
34172	PCI_VENDOR_ID_UMC	0x1060	pci_ids.h
34173	PCI_VENDOR_ID_X	0x1061	pci_ids.h
34174	PCI_VENDOR_ID_MYLEX	0x1069	pci_ids.h
34175	PCI_VENDOR_ID_PICOP	0x1066	pci_ids.h
34176	PCI_VENDOR_ID_APPLE	0x106b	pci_ids.h
34177	PCI_VENDOR_ID_YAMAHA	0x1073	pci_ids.h
34178	PCI_VENDOR_ID_NEXGEN	0x1074	pci_ids.h
34179	PCI_VENDOR_ID_QLOGIC	0x1077	pci_ids.h
34180	PCI_VENDOR_ID_CYRIX	0x1078	pci_ids.h
34181	PCI_VENDOR_ID_LEADTEK	0x107d	pci_ids.h
34182	PCI_VENDOR_ID_INTERPHASE	0x107e	pci_ids.h
34183	PCI_VENDOR_ID_CONTAQ	0x1080	pci_ids.h
34184	PCI_VENDOR_ID_FOREX	0x1083	pci_ids.h
34185	PCI_VENDOR_ID_OLICOM	0x108d	pci_ids.h
34186	PCI_VENDOR_ID_SUN	0x108e	pci_ids.h
34187	PCI_VENDOR_ID_CMD	0x1095	pci_ids.h
34188	PCI_VENDOR_ID_VISION	0x1098	pci_ids.h
34189	PCI_VENDOR_ID_BROOKTREE	0x109e	pci_ids.h
34190	PCI_VENDOR_ID_SIERRA	0x10a8	pci_ids.h
34191	PCI_VENDOR_ID_SGI	0x10a9	pci_ids.h
34192	PCI_VENDOR_ID_ACC	0x10aa	pci_ids.h
34193	PCI_VENDOR_ID_WINBOND	0x10ad	pci_ids.h
34194	PCI_VENDOR_ID_DATABOOK	0x10b3	pci_ids.h
34195	PCI_VENDOR_ID_PLX	0x10b5	pci_ids.h
34196	PCI_VENDOR_ID_MADGE	0x10b6	pci_ids.h
34197	PCI_VENDOR_ID_3COM	0x10b7	pci_ids.h
34198	PCI_VENDOR_ID_SMC	0x10b8	pci_ids.h
34199	PCI_VENDOR_ID_SUNDANCE	0x13F0	pci_ids.h
34200	PCI_VENDOR_ID_AL	0x10b9	pci_ids.h
34201	PCI_VENDOR_ID_MITSUBISHI	0x10ba	pci_ids.h
34202	PCI_VENDOR_ID_SURECOM	0x10bd	pci_ids.h
34203	PCI_VENDOR_ID_NEOMAGIC	0x10c8	pci_ids.h
34204	PCI_VENDOR_ID_ASP	0x10cd	pci_ids.h
34205	PCI_VENDOR_ID_MACRONIX	0x10d9	pci_ids.h
34206	PCI_VENDOR_ID_TCONRAD	0x10da	pci_ids.h
34207	PCI_VENDOR_ID_CERN	0x10dc	pci_ids.h
34208	PCI_VENDOR_ID_NVIDIA	0x10de	pci_ids.h
34209	PCI_VENDOR_ID_IMS	0x10e0	pci_ids.h
34210	PCI_VENDOR_ID_TEKRAM2	0x10e1	pci_ids.h
34211	PCI_VENDOR_ID_TUNDRA	0x10e3	pci_ids.h
34212	PCI_VENDOR_ID_AMCC	0x10e8	pci_ids.h
34213	PCI_VENDOR_ID_INTERG	0x10ea	pci_ids.h
34214	PCI_VENDOR_ID_REALTEK	0x10ec	pci_ids.h
34215	PCI_VENDOR_ID_XILINX	0x10ee	pci_ids.h
34216	PCI_VENDOR_ID_TRUEVISION	0x10fa	pci_ids.h
34217	PCI_VENDOR_ID_INIT	0x1101	pci_ids.h
34218	PCI_VENDOR_ID_CREATIVE	0x1102	pci_ids.h
34219	PCI_VENDOR_ID_ECTIVA	0x1102	pci_ids.h
34220	PCI_VENDOR_ID_TTI	0x1103	pci_ids.h
34221	PCI_VENDOR_ID_VIA	0x1106	pci_ids.h
34222	PCI_VENDOR_ID_VIATEC	0x1106	pci_ids.h
34223	PCI_VENDOR_ID_SIEMENS	0x110A	pci_ids.h
34224	PCI_VENDOR_ID_SMC2	0x1113	pci_ids.h
34225	PCI_VENDOR_ID_VORTEX	0x1119	pci_ids.h
34226	PCI_VENDOR_ID_EF	0x111a	pci_ids.h
34227	PCI_VENDOR_ID_IDT	0x111d	pci_ids.h
34228	PCI_VENDOR_ID_FORE	0x1127	pci_ids.h
34229	PCI_VENDOR_ID_IMAGINGTECH	0x112f	pci_ids.h
34230	PCI_VENDOR_ID_PHILIPS	0x1131	pci_ids.h
34231	PCI_VENDOR_ID_EICON	0x1133	pci_ids.h
34232	PCI_VENDOR_ID_CYCLONE	0x113c	pci_ids.h
34233	PCI_VENDOR_ID_ALLIANCE	0x1142	pci_ids.h
34234	PCI_VENDOR_ID_SYSKONNECT	0x1148	pci_ids.h
34235	PCI_VENDOR_ID_VMIC	0x114a	pci_ids.h
34236	PCI_VENDOR_ID_DIGI	0x114f	pci_ids.h
34237	PCI_VENDOR_ID_MUTECH	0x1159	pci_ids.h
34238	PCI_VENDOR_ID_XIRCOM	0x115d	pci_ids.h
34239	PCI_VENDOR_ID_RENDITION	0x1163	pci_ids.h
34240	PCI_VENDOR_ID_SERVERWORKS	0x1166	pci_ids.h
34241	PCI_VENDOR_ID_SBE	0x1176	pci_ids.h
34242	PCI_VENDOR_ID_TOSHIBA	0x1179	pci_ids.h
34243	PCI_VENDOR_ID_RICOH	0x1180	pci_ids.h
34244	PCI_VENDOR_ID_DLINK	0x1186	pci_ids.h
34245	PCI_VENDOR_ID_ARTOP	0x1191	pci_ids.h
34246	PCI_VENDOR_ID_ZEITNET	0x1193	pci_ids.h
34247	PCI_VENDOR_ID_OMEGA	0x119b	pci_ids.h
34248	PCI_VENDOR_ID_FUJITSU_ME	0x119e	pci_ids.h
34249	PCI_SUBVENDOR_ID_KEYSPAN	0x11a9	pci_ids.h
34250	PCI_VENDOR_ID_GALILEO	0x11ab	pci_ids.h
34251	PCI_VENDOR_ID_LINKSYS	0x11ad	pci_ids.h
34252	PCI_VENDOR_ID_LITEON	0x11ad	pci_ids.h
34253	PCI_VENDOR_ID_V3	0x11b0	pci_ids.h
34254	PCI_VENDOR_ID_NP	0x11bc	pci_ids.h
34255	PCI_VENDOR_ID_ATT	0x11c1	pci_ids.h
34256	PCI_VENDOR_ID_SPECIALIX	0x11cb	pci_ids.h
34257	PCI_VENDOR_ID_AURAVISION	0x11d1	pci_ids.h
34258	PCI_VENDOR_ID_ANALOG_DEVICES	0x11d4	pci_ids.h
34259	PCI_VENDOR_ID_IKON	0x11d5	pci_ids.h
34260	PCI_VENDOR_ID_ZORAN	0x11de	pci_ids.h
34261	PCI_VENDOR_ID_KINETIC	0x11f4	pci_ids.h
34262	PCI_VENDOR_ID_COMPEX	0x11f6	pci_ids.h
34263	PCI_VENDOR_ID_RP	0x11fe	pci_ids.h
34264	PCI_VENDOR_ID_CYCLADES	0x120e	pci_ids.h
34265	PCI_VENDOR_ID_ESSENTIAL	0x120f	pci_ids.h
34266	PCI_VENDOR_ID_O2	0x1217	pci_ids.h
34267	PCI_VENDOR_ID_3DFX	0x121a	pci_ids.h
34268	PCI_VENDOR_ID_SIGMADES	0x1236	pci_ids.h
34269	PCI_VENDOR_ID_CCUBE	0x123f	pci_ids.h
34270	PCI_VENDOR_ID_AVM	0x1244	pci_ids.h
34271	PCI_VENDOR_ID_DIPIX	0x1246	pci_ids.h
34272	PCI_VENDOR_ID_STALLION	0x124d	pci_ids.h
34273	PCI_VENDOR_ID_OPTIBASE	0x1255	pci_ids.h
34274	PCI_VENDOR_ID_ESS	0x125d	pci_ids.h
34275	PCI_VENDOR_ID_HARRIS	0x1260	pci_ids.h
34276	PCI_VENDOR_ID_SATSAGEM	0x1267	pci_ids.h
34277	PCI_VENDOR_ID_HUGHES	0x1273	pci_ids.h
34278	PCI_VENDOR_ID_ENSONIQ	0x1274	pci_ids.h
34279	PCI_VENDOR_ID_ROCKWELL	0x127A	pci_ids.h
34280	PCI_VENDOR_ID_DAVICOM	0x1282	pci_ids.h
34281	PCI_VENDOR_ID_ITE	0x1283	pci_ids.h
34282	PCI_VENDOR_ID_ESS_OLD	0x1285	pci_ids.h
34283	PCI_VENDOR_ID_ALTEON	0x12ae	pci_ids.h
34284	PCI_VENDOR_ID_USR	0x12B9	pci_ids.h
34285	PCI_VENDOR_ID_HOLTEK	0x12c3	pci_ids.h
34286	PCI_SUBVENDOR_ID_CONNECT_TECH	0x12c4	pci_ids.h
34287	PCI_VENDOR_ID_PICTUREL	0x12c5	pci_ids.h
34288	PCI_VENDOR_ID_NVIDIA_SGS	0x12d2	pci_ids.h
34289	PCI_SUBVENDOR_ID_CHASE_PCIFAST	0x12E0	pci_ids.h
34290	PCI_SUBVENDOR_ID_CHASE_PCIRAS	0x124D	pci_ids.h
34291	PCI_VENDOR_ID_AUREAL	0x12eb	pci_ids.h
34292	PCI_VENDOR_ID_CBOARDS	0x1307	pci_ids.h
34293	PCI_VENDOR_ID_SIIG	0x131f	pci_ids.h
34294	PCI_VENDOR_ID_ADMTEK	0x1317	pci_ids.h
34295	PCI_VENDOR_ID_DOMEX	0x134a	pci_ids.h
34296	PCI_VENDOR_ID_QUATECH	0x135C	pci_ids.h
34297	PCI_VENDOR_ID_SEALEVEL	0x135e	pci_ids.h
34298	PCI_VENDOR_ID_HYPERCOPE	0x1365	pci_ids.h
34299	PCI_VENDOR_ID_KAWASAKI	0x136b	pci_ids.h
34300	PCI_VENDOR_ID_LMC	0x1376	pci_ids.h
34301	PCI_VENDOR_ID_NETGEAR	0x1385	pci_ids.h
34302	PCI_VENDOR_ID_APPLICOM	0x1389	pci_ids.h
34303	PCI_VENDOR_ID_MOXA	0x1393	pci_ids.h
34304	PCI_VENDOR_ID_CCD	0x1397	pci_ids.h
34305	PCI_VENDOR_ID_MICROGATE	0x13c0	pci_ids.h
34306	PCI_VENDOR_ID_3WARE	0x13C1	pci_ids.h
34307	PCI_VENDOR_ID_ABOCOM	0x13D1	pci_ids.h
34308	PCI_VENDOR_ID_CMEDIA	0x13f6	pci_ids.h
34309	PCI_VENDOR_ID_LAVA	0x1407	pci_ids.h
34310	PCI_VENDOR_ID_TIMEDIA	0x1409	pci_ids.h
34311	PCI_VENDOR_ID_OXSEMI	0x1415	pci_ids.h
34312	PCI_VENDOR_ID_AIRONET	0x14b9	pci_ids.h
34313	PCI_VENDOR_ID_TITAN	0x14D2	pci_ids.h
34314	PCI_VENDOR_ID_PANACOM	0x14d4	pci_ids.h
34315	PCI_VENDOR_ID_BROADCOM	0x14e4	pci_ids.h
34316	PCI_VENDOR_ID_SYBA	0x1592	pci_ids.h
34317	PCI_VENDOR_ID_MORETON	0x15aa	pci_ids.h
34318	PCI_VENDOR_ID_ZOLTRIX	0x15b0	pci_ids.h
34319	PCI_VENDOR_ID_PDC	0x15e9	pci_ids.h
34320	PCI_VENDOR_ID_FSC	0x1734	pci_ids.h
34321	PCI_VENDOR_ID_SYMPHONY	0x1c1c	pci_ids.h
34322	PCI_VENDOR_ID_TEKRAM	0x1de1	pci_ids.h
34323	PCI_VENDOR_ID_3DLABS	0x3d3d	pci_ids.h
34324	PCI_VENDOR_ID_AVANCE	0x4005	pci_ids.h
34325	PCI_VENDOR_ID_AKS	0x416c	pci_ids.h
34326	PCI_VENDOR_ID_NETVIN	0x4a14	pci_ids.h
34327	PCI_VENDOR_ID_S3	0x5333	pci_ids.h
34328	PCI_VENDOR_ID_DCI	0x6666	pci_ids.h
34329	PCI_VENDOR_ID_GENROCO	0x5555	pci_ids.h
34330	PCI_VENDOR_ID_INTEL	0x8086	pci_ids.h
34331	PCI_VENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
34332	PCI_SUBVENDOR_ID_COMPUTONE	0x8e0e	pci_ids.h
34333	PCI_VENDOR_ID_KTI	0x8e2e	pci_ids.h
34334	PCI_VENDOR_ID_ADAPTEC	0x9004	pci_ids.h
34335	PCI_VENDOR_ID_ADAPTEC2	0x9005	pci_ids.h
34336	PCI_VENDOR_ID_ATRONICS	0x907f	pci_ids.h
34337	PCI_VENDOR_ID_HOLTEK2	0x9412	pci_ids.h
34338	PCI_VENDOR_ID_NETMOS	0x9710	pci_ids.h
34339	PCI_SUBVENDOR_ID_EXSYS	0xd84d	pci_ids.h
34340	PCI_VENDOR_ID_TIGERJET	0xe159	pci_ids.h
34341	PCI_VENDOR_ID_ARK	0xedd8	pci_ids.h
34342	POSIX_FD_MIN	( 1 )	posix_io.h
34343	POSIX_FD_MAX	( 31 )	posix_io.h
34344	RESOLV_NUMERIC	01	resolv.h
34345	RESOLV_NORMAL	02	resolv.h
34346	DEFAULT_MIN_TIMEOUT	( TICKS_PER_SEC / 4 )	retry.h
34347	DEFAULT_MAX_TIMEOUT	( 10 * TICKS_PER_SEC )	retry.h
34348	SCSI_OPCODE_READ_10	0x28	scsi.h	*< READ (10)
34349	SCSI_OPCODE_READ_16	0x88	scsi.h	*< READ (16)
34350	SCSI_OPCODE_WRITE_10	0x2a	scsi.h	*< WRITE (10)
34351	SCSI_OPCODE_WRITE_16	0x8a	scsi.h	*< WRITE (16)
34352	SCSI_OPCODE_READ_CAPACITY_10	0x25	scsi.h	*< READ CAPACITY (10)
34353	SCSI_OPCODE_SERVICE_ACTION_IN	0x9e	scsi.h	*< SERVICE ACTION IN
34354	SCSI_SERVICE_ACTION_READ_CAPACI	0x10	scsi.h	*< READ CAPACITY (16)
34355	SCSI_FL_FUA_NV	0x02	scsi.h	*< Force unit access to NVS
34356	SCSI_FL_FUA	0x08	scsi.h	*< Force unit access
34357	SCSI_FL_DPO	0x10	scsi.h	*< Disable cache page out
34358	SCSI_CDB_FORMAT	"%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:" \ "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x"	scsi.h
34359	__setting	__table ( struct setting, settings, 01 )	settings.h
34360	__setting_type	__table ( struct setting_type, setting_types, 01 )	settings.h
34361	__settings_applicator	__table ( struct settings_applicator, settings_applicators, 01 )	settings.h
34362	SHA1_CTX_SIZE	sizeof ( SHA1_CTX )	sha1.h
34363	SHA1_DIGEST_SIZE	SHA1_SIZE	sha1.h
34364	SOCK_STREAM	( ( int ) TCP_SOCK_STREAM )	socket.h
34365	SOCK_DGRAM	( ( int ) UDP_SOCK_DGRAM )	socket.h
34366	AF_INET	1	socket.h	*< IPv4 Internet addresses
34367	AF_INET6	2	socket.h	*< IPv6 Internet addresses
34368	SA_LEN	32	socket.h
34369	SPI_WRSR	0x01	spi.h
34370	SPI_WRITE	0x02	spi.h
34371	SPI_READ	0x03	spi.h
34372	SPI_WRDI	0x04	spi.h
34373	SPI_RDSR	0x05	spi.h
34374	SPI_WREN	0x06	spi.h
34375	ATMEL_SECTOR_ERASE	0x52	spi.h
34376	ATMEL_CHIP_ERASE	0x62	spi.h
34377	ATMEL_RDID	0x15	spi.h
34378	SPI_STATUS_WPEN	0x80	spi.h
34379	SPI_STATUS_BP2	0x10	spi.h
34380	SPI_STATUS_BP1	0x08	spi.h
34381	SPI_STATUS_BP0	0x04	spi.h
34382	SPI_STATUS_WEN	0x02	spi.h
34383	SPI_STATUS_NRDY	0x01	spi.h
34384	SPI_MODE_CPHA	0x01	spi.h
34385	SPI_MODE_CPOL	0x02	spi.h
34386	SPI_MODE_SSPOL	0x10	spi.h
34387	SPI_MODE_MICROWIRE	1	spi.h
34388	SPI_MODE_MICROWIRE_PLUS	0	spi.h
34389	SPI_MODE_THREEWIRE	( SPI_MODE_MICROWIRE_PLUS \| SPI_MODE_SSPOL )	spi.h
34390	SPI_BIT_UDELAY	1	spi_bit.h
34391	SPI_BIT_BIG_ENDIAN	0	spi_bit.h
34392	SPI_BIT_LITTLE_ENDIAN	1	spi_bit.h
34393	TCP_OPTION_END	0	tcp.h
34394	TCP_OPTION_NOP	1	tcp.h
34395	TCP_OPTION_MSS	2	tcp.h
34396	TCP_OPTION_TS	8	tcp.h
34397	TCP_CWR	0x80	tcp.h
34398	TCP_ECE	0x40	tcp.h
34399	TCP_URG	0x20	tcp.h
34400	TCP_ACK	0x10	tcp.h
34401	TCP_PSH	0x08	tcp.h
34402	TCP_RST	0x04	tcp.h
34403	TCP_SYN	0x02	tcp.h
34404	TCP_FIN	0x01	tcp.h
34405	TCP_CLOSED	TCP_RST	tcp.h
34406	TCP_LISTEN	0	tcp.h
34407	TCP_SYN_SENT	( TCP_STATE_SENT ( TCP_SYN ) )	tcp.h
34408	TCP_SYN_RCVD	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
34409	TCP_ESTABLISHED	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
34410	TCP_FIN_WAIT_1	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN ) )	tcp.h
34411	TCP_FIN_WAIT_2	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN )	tcp.h
34412	TCP_CLOSING_OR_LAST_ACK	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FI	tcp.h
34413	TCP_TIME_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK \| TCP_FIN ) \| \ TCP_STATE_ACKED ( TCP_SYN \| TCP_FIN ) \| \ TCP_STATE_RCVD ( TCP_SYN \|	tcp.h
34414	TCP_CLOSE_WAIT	( TCP_STATE_SENT ( TCP_SYN \| TCP_ACK ) \| \ TCP_STATE_ACKED ( TCP_SYN ) \| \ TCP_STATE_RCVD ( TCP_SYN \| TCP_FIN ) )	tcp.h
34415	TCP_MASK_HLEN	0xf0	tcp.h
34416	TCP_MIN_PORT	1	tcp.h
34417	MAX_HDR_LEN	100	tcp.h
34418	MAX_IOB_LEN	1500	tcp.h
34419	MIN_IOB_LEN	MAX_HDR_LEN + 100	tcp.h	To account for padding by LL
34420	TCP_MAX_WINDOW_SIZE	4096	tcp.h
34421	TCP_PATH_MTU	1460	tcp.h
34422	TCP_MSS	1460	tcp.h
34423	TCP_MSL	( 2 * 60 * TICKS_PER_SEC )	tcp.h
34424	TCPIP_EMPTY_CSUM	0xffff	tcpip.h
34425	__tcpip_protocol	__table ( struct tcpip_protocol, tcpip_protocols, 01 )	tcpip.h
34426	__tcpip_net_protocol	__table ( struct tcpip_net_protocol, tcpip_net_protocols, 01 )	tcpip.h
34427	TFTP_PORT	69	tftp.h	*< Default TFTP server port
34428	TFTP_DEFAULT_BLKSIZE	512	tftp.h	*< Default TFTP data block size
34429	TFTP_MAX_BLKSIZE	1432	tftp.h
34430	TFTP_RRQ	1	tftp.h	*< Read request opcode
34431	TFTP_WRQ	2	tftp.h	*< Write request opcode
34432	TFTP_DATA	3	tftp.h	*< Data block opcode
34433	TFTP_ACK	4	tftp.h	*< Data block acknowledgement opcode
34434	TFTP_ERROR	5	tftp.h	*< Error opcode
34435	TFTP_OACK	6	tftp.h	*< Options acknowledgement opcode
34436	TFTP_ERR_FILE_NOT_FOUND	1	tftp.h	*< File not found
34437	TFTP_ERR_ACCESS_DENIED	2	tftp.h	*< Access violation
34438	TFTP_ERR_DISK_FULL	3	tftp.h	*< Disk full or allocation exceeded
34439	TFTP_ERR_ILLEGAL_OP	4	tftp.h	*< Illegal TFTP operation
34440	TFTP_ERR_UNKNOWN_TID	5	tftp.h	*< Unknown transfer ID
34441	TFTP_ERR_FILE_EXISTS	6	tftp.h	*< File already exists
34442	TFTP_ERR_UNKNOWN_USER	7	tftp.h	*< No such user
34443	TFTP_ERR_BAD_OPTS	8	tftp.h	*< Option negotiation failed
34444	MTFTP_PORT	1759	tftp.h	*< Default MTFTP server port
34445	THREEWIRE_READ	0x6	threewire.h
34446	THREEWIRE_WRITE	0x5	threewire.h
34447	THREEWIRE_EWEN	0x4	threewire.h
34448	THREEWIRE_EWEN_ADDRESS	INT_MAX	threewire.h
34449	THREEWIRE_WRITE_MDELAY	10	threewire.h
34450	MSECS_IN_SEC	(1000)	timer.h
34451	USECS_IN_SEC	(1000*1000)	timer.h
34452	USECS_IN_MSEC	(1000)	timer.h
34453	TICKS_PER_SEC	USECS_IN_SEC	timer.h
34454	TLS_VERSION_TLS_1_0	0x0301	tls.h
34455	TLS_VERSION_TLS_1_1	0x0302	tls.h
34456	TLS_TYPE_CHANGE_CIPHER	20	tls.h
34457	TLS_TYPE_ALERT	21	tls.h
34458	TLS_TYPE_HANDSHAKE	22	tls.h
34459	TLS_TYPE_DATA	23	tls.h
34460	TLS_HELLO_REQUEST	0	tls.h
34461	TLS_CLIENT_HELLO	1	tls.h
34462	TLS_SERVER_HELLO	2	tls.h
34463	TLS_CERTIFICATE	11	tls.h
34464	TLS_SERVER_KEY_EXCHANGE	12	tls.h
34465	TLS_CERTIFICATE_REQUEST	13	tls.h
34466	TLS_SERVER_HELLO_DONE	14	tls.h
34467	TLS_CERTIFICATE_VERIFY	15	tls.h
34468	TLS_CLIENT_KEY_EXCHANGE	16	tls.h
34469	TLS_FINISHED	20	tls.h
34470	TLS_ALERT_WARNING	1	tls.h
34471	TLS_ALERT_FATAL	2	tls.h
34472	TLS_RSA_WITH_NULL_MD5	0x0001	tls.h
34473	TLS_RSA_WITH_NULL_SHA	0x0002	tls.h
34474	TLS_RSA_WITH_AES_128_CBC_SHA	0x002f	tls.h
34475	TLS_RSA_WITH_AES_256_CBC_SHA	0x0035	tls.h
34476	UNULL	( ( userptr_t ) 0 )	uaccess.h
34477	UDP_MAX_HLEN	72	udp.h
34478	UDP_MAX_TXIOB	ETH_MAX_MTU	udp.h
34479	UDP_MIN_TXIOB	ETH_ZLEN	udp.h
34480	cached_info	__use_data16 ( cached_info )	pxe_preboot.c
34481	PXE_TFTP_URI_LEN	256	pxe_tftp.c
34482	LIBGCC	__attribute__ (( cdecl ))	libgcc.h
34483	NUM_ARP_ENTRIES	4	arp.c
34484	arp_table_end	&arp_table[NUM_ARP_ENTRIES]	arp.c
34485	NUM_NDP_ENTRIES	4	ndp.c
34486	ndp_table_end	&ndp_table[NUM_NDP_ENTRIES]	ndp.c
34487	MIN_TIMEOUT	7	retry.c
34488	DHCP_CLIENT_UUID_TYPE	0	dhcp.c
34489	SLAM_DEFAULT_PORT	10000	slam.c
34490	SLAM_DEFAULT_MULTICAST_IP	( ( 239 << 24 ) \| ( 255 << 16 ) \| ( 1 << 8 ) \| ( 1 << 0 ) )	slam.c
34491	SLAM_DEFAULT_MULTICAST_PORT	10000	slam.c
34492	SLAM_MAX_HEADER_LEN	( 7 + 7 + \ 7 )	slam.c	block_size
34493	SLAM_MAX_BLOCKS_PER_NACK	4	slam.c
34494	SLAM_MAX_NACK_LEN	( 7 + 7 + 1 )	slam.c	block #blocks NUL
34495	SLAM_SLAVE_TIMEOUT	( 1 * TICKS_PER_SEC )	slam.c
34496	MTFTP_MAX_TIMEOUTS	3	tftp.c
34497	FSP_PORT	21	fsp.c
34498	CC_GET_FILE	0x42	fsp.c
34499	CC_BYE	0x4A	fsp.c
34500	CC_ERR	0x40	fsp.c
34501	CC_STAT	0x4D	fsp.c
34502	FSP_MAXFILENAME	255	fsp.c
34503	FSP_MAXPAYLOAD	(ETH_MAX_MTU - \ (sizeof(struct iphdr) + sizeof(struct udphdr) + sizeof(struct fsp_header)))	fsp.c
34504	START_OPORT	700	nfs.c	mountd usually insists on secure ports
34505	OPORT_SWEEP	200	nfs.c	make sure we don't leave secure range
34506	__regparm	__attribute__ (( regparm(3) ))	memcpy_test.c
34507	URI_MAX_LEN	1024	uri_test.c
34508	LINK_WAIT_MS	15000	autoboot.c
34509	SNAPLEN	1600	hijack.c
34510	HAVE_PCAP_INJECT	0	hijack.c
34511	UCLPACK_COMPAT	0	nrv2b.c
34512	NDEBUG	1	nrv2b.c
34513	wterr	0	nrv2b.c
34514	ENDIAN	0	nrv2b.c
34515	BITSIZE	32	nrv2b.c
34516	N	(65536ul)	nrv2b.c	size of ring buffer
34517	THRESHOLD	1	nrv2b.c	lower limit for match length
34518	F	2048	nrv2b.c	upper limit for match length
34519	M2_MAX_OFFSET	0xd00	nrv2b.c
34520	UCL_E_OK	0	nrv2b.c
34521	UCL_E_INVALID_ARGUMENT	1	nrv2b.c
34522	UCL_E_OUT_OF_MEMORY	2	nrv2b.c
34523	UCL_E_ERROR	3	nrv2b.c
34524	SWD_HSIZE	16384	nrv2b.c
34525	SWD_MAX_CHAIN	2048	nrv2b.c
34526	SWD_BEST_OFF	1	nrv2b.c
34527	NIL2	UINT_MAX	nrv2b.c

Access

See Also